2 * Driver for CPM (SCC/SMC) serial ports; core driver
4 * Based on arch/ppc/cpm2_io/uart.c by Dan Malek
5 * Based on ppc8xx.c by Thomas Gleixner
6 * Based on drivers/serial/amba.c by Russell King
8 * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
9 * Pantelis Antoniou (panto@intracom.gr) (CPM1)
11 * Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
12 * (C) 2004 Intracom, S.A.
13 * (C) 2005-2006 MontaVista Software, Inc.
14 * Vitaly Bordug <vbordug@ru.mvista.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <linux/module.h>
33 #include <linux/tty.h>
34 #include <linux/tty_flip.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/serial.h>
38 #include <linux/console.h>
39 #include <linux/sysrq.h>
40 #include <linux/device.h>
41 #include <linux/bootmem.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/fs_uart_pd.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/of_platform.h>
47 #include <linux/gpio.h>
48 #include <linux/of_gpio.h>
49 #include <linux/clk.h>
53 #include <asm/delay.h>
54 #include <asm/fs_pd.h>
57 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 #include <linux/serial_core.h>
62 #include <linux/kernel.h>
67 /**************************************************************/
69 static int cpm_uart_tx_pump(struct uart_port *port);
70 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
71 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
72 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
74 /**************************************************************/
76 #define HW_BUF_SPD_THRESHOLD 2400
79 * Check, if transmit buffers are processed
81 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
83 struct uart_cpm_port *pinfo =
84 container_of(port, struct uart_cpm_port, port);
85 cbd_t __iomem *bdp = pinfo->tx_bd_base;
89 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
92 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
99 pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
104 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
106 struct uart_cpm_port *pinfo =
107 container_of(port, struct uart_cpm_port, port);
109 if (pinfo->gpios[GPIO_RTS] >= 0)
110 gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
112 if (pinfo->gpios[GPIO_DTR] >= 0)
113 gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
116 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
118 struct uart_cpm_port *pinfo =
119 container_of(port, struct uart_cpm_port, port);
120 unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
122 if (pinfo->gpios[GPIO_CTS] >= 0) {
123 if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
127 if (pinfo->gpios[GPIO_DSR] >= 0) {
128 if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
132 if (pinfo->gpios[GPIO_DCD] >= 0) {
133 if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
137 if (pinfo->gpios[GPIO_RI] >= 0) {
138 if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
148 static void cpm_uart_stop_tx(struct uart_port *port)
150 struct uart_cpm_port *pinfo =
151 container_of(port, struct uart_cpm_port, port);
152 smc_t __iomem *smcp = pinfo->smcp;
153 scc_t __iomem *sccp = pinfo->sccp;
155 pr_debug("CPM uart[%d]:stop tx\n", port->line);
158 clrbits8(&smcp->smc_smcm, SMCM_TX);
160 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
166 static void cpm_uart_start_tx(struct uart_port *port)
168 struct uart_cpm_port *pinfo =
169 container_of(port, struct uart_cpm_port, port);
170 smc_t __iomem *smcp = pinfo->smcp;
171 scc_t __iomem *sccp = pinfo->sccp;
173 pr_debug("CPM uart[%d]:start tx\n", port->line);
176 if (in_8(&smcp->smc_smcm) & SMCM_TX)
179 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
183 if (cpm_uart_tx_pump(port) != 0) {
185 setbits8(&smcp->smc_smcm, SMCM_TX);
187 setbits16(&sccp->scc_sccm, UART_SCCM_TX);
195 static void cpm_uart_stop_rx(struct uart_port *port)
197 struct uart_cpm_port *pinfo =
198 container_of(port, struct uart_cpm_port, port);
199 smc_t __iomem *smcp = pinfo->smcp;
200 scc_t __iomem *sccp = pinfo->sccp;
202 pr_debug("CPM uart[%d]:stop rx\n", port->line);
205 clrbits8(&smcp->smc_smcm, SMCM_RX);
207 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
213 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
215 struct uart_cpm_port *pinfo =
216 container_of(port, struct uart_cpm_port, port);
218 pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
222 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
224 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
228 * Transmit characters, refill buffer descriptor, if possible
230 static void cpm_uart_int_tx(struct uart_port *port)
232 pr_debug("CPM uart[%d]:TX INT\n", port->line);
234 cpm_uart_tx_pump(port);
237 #ifdef CONFIG_CONSOLE_POLL
238 static int serial_polled;
244 static void cpm_uart_int_rx(struct uart_port *port)
249 struct tty_port *tport = &port->state->port;
250 struct uart_cpm_port *pinfo =
251 container_of(port, struct uart_cpm_port, port);
256 pr_debug("CPM uart[%d]:RX INT\n", port->line);
258 /* Just loop through the closed BDs and copy the characters into
263 #ifdef CONFIG_CONSOLE_POLL
264 if (unlikely(serial_polled)) {
270 status = in_be16(&bdp->cbd_sc);
271 /* If this one is empty, return happy */
272 if (status & BD_SC_EMPTY)
275 /* get number of characters, and check spce in flip-buffer */
276 i = in_be16(&bdp->cbd_datlen);
278 /* If we have not enough room in tty flip buffer, then we try
279 * later, which will be the next rx-interrupt or a timeout
281 if (tty_buffer_request_room(tport, i) < i) {
282 printk(KERN_WARNING "No room in flip buffer\n");
287 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
289 /* loop through the buffer */
296 (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
298 if (uart_handle_sysrq_char(port, ch))
300 #ifdef CONFIG_CONSOLE_POLL
301 if (unlikely(serial_polled)) {
307 tty_insert_flip_char(tport, ch, flg);
309 } /* End while (i--) */
311 /* This BD is ready to be used again. Clear status. get next */
312 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
313 BD_SC_OV | BD_SC_ID);
314 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
316 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
317 bdp = pinfo->rx_bd_base;
323 /* Write back buffer pointer */
326 /* activate BH processing */
327 tty_flip_buffer_push(tport);
331 /* Error processing */
335 if (status & BD_SC_BR)
337 if (status & BD_SC_PR)
338 port->icount.parity++;
339 if (status & BD_SC_FR)
340 port->icount.frame++;
341 if (status & BD_SC_OV)
342 port->icount.overrun++;
344 /* Mask out ignored conditions */
345 status &= port->read_status_mask;
347 /* Handle the remaining ones */
348 if (status & BD_SC_BR)
350 else if (status & BD_SC_PR)
352 else if (status & BD_SC_FR)
355 /* overrun does not affect the current character ! */
356 if (status & BD_SC_OV) {
359 /* We skip this buffer */
360 /* CHECK: Is really nothing senseful there */
361 /* ASSUMPTION: it contains nothing valid */
371 * Asynchron mode interrupt handler
373 static irqreturn_t cpm_uart_int(int irq, void *data)
376 struct uart_port *port = data;
377 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
378 smc_t __iomem *smcp = pinfo->smcp;
379 scc_t __iomem *sccp = pinfo->sccp;
381 pr_debug("CPM uart[%d]:IRQ\n", port->line);
384 events = in_8(&smcp->smc_smce);
385 out_8(&smcp->smc_smce, events);
386 if (events & SMCM_BRKE)
387 uart_handle_break(port);
388 if (events & SMCM_RX)
389 cpm_uart_int_rx(port);
390 if (events & SMCM_TX)
391 cpm_uart_int_tx(port);
393 events = in_be16(&sccp->scc_scce);
394 out_be16(&sccp->scc_scce, events);
395 if (events & UART_SCCM_BRKE)
396 uart_handle_break(port);
397 if (events & UART_SCCM_RX)
398 cpm_uart_int_rx(port);
399 if (events & UART_SCCM_TX)
400 cpm_uart_int_tx(port);
402 return (events) ? IRQ_HANDLED : IRQ_NONE;
405 static int cpm_uart_startup(struct uart_port *port)
408 struct uart_cpm_port *pinfo =
409 container_of(port, struct uart_cpm_port, port);
411 pr_debug("CPM uart[%d]:startup\n", port->line);
413 /* If the port is not the console, make sure rx is disabled. */
414 if (!(pinfo->flags & FLAG_CONSOLE)) {
415 /* Disable UART rx */
417 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
418 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
420 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
421 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
423 cpm_uart_initbd(pinfo);
425 out_be32(&pinfo->smcup->smc_rstate, 0);
426 out_be32(&pinfo->smcup->smc_tstate, 0);
427 out_be16(&pinfo->smcup->smc_rbptr,
428 in_be16(&pinfo->smcup->smc_rbase));
429 out_be16(&pinfo->smcup->smc_tbptr,
430 in_be16(&pinfo->smcup->smc_tbase));
432 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
435 /* Install interrupt handler. */
436 retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
442 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
443 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
445 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
446 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
452 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
454 set_current_state(TASK_UNINTERRUPTIBLE);
455 schedule_timeout(pinfo->wait_closing);
461 static void cpm_uart_shutdown(struct uart_port *port)
463 struct uart_cpm_port *pinfo =
464 container_of(port, struct uart_cpm_port, port);
466 pr_debug("CPM uart[%d]:shutdown\n", port->line);
468 /* free interrupt handler */
469 free_irq(port->irq, port);
471 /* If the port is not the console, disable Rx and Tx. */
472 if (!(pinfo->flags & FLAG_CONSOLE)) {
473 /* Wait for all the BDs marked sent */
474 while(!cpm_uart_tx_empty(port)) {
475 set_current_state(TASK_UNINTERRUPTIBLE);
479 if (pinfo->wait_closing)
480 cpm_uart_wait_until_send(pinfo);
484 smc_t __iomem *smcp = pinfo->smcp;
485 clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
486 clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
488 scc_t __iomem *sccp = pinfo->sccp;
489 clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
490 clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
493 /* Shut them really down and reinit buffer descriptors */
495 out_be16(&pinfo->smcup->smc_brkcr, 0);
496 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
498 out_be16(&pinfo->sccup->scc_brkcr, 0);
499 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
502 cpm_uart_initbd(pinfo);
506 static void cpm_uart_set_termios(struct uart_port *port,
507 struct ktermios *termios,
508 struct ktermios *old)
512 u16 cval, scval, prev_mode;
514 struct uart_cpm_port *pinfo =
515 container_of(port, struct uart_cpm_port, port);
516 smc_t __iomem *smcp = pinfo->smcp;
517 scc_t __iomem *sccp = pinfo->sccp;
520 pr_debug("CPM uart[%d]:set_termios\n", port->line);
522 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
523 if (baud < HW_BUF_SPD_THRESHOLD ||
524 (pinfo->port.state && pinfo->port.state->port.low_latency))
525 pinfo->rx_fifosize = 1;
527 pinfo->rx_fifosize = RX_BUF_SIZE;
529 /* MAXIDL is the timeout after which a receive buffer is closed
530 * when not full if no more characters are received.
531 * We calculate it from the baudrate so that the duration is
532 * always the same at standard rates: about 4ms.
534 maxidl = baud / 2400;
540 /* Character length programmed into the mode register is the
541 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
542 * 1 or 2 stop bits, minus 1.
543 * The value 'bits' counts this for us.
549 switch (termios->c_cflag & CSIZE) {
562 /* Never happens, but GCC is too dumb to figure it out */
569 if (termios->c_cflag & CSTOPB) {
570 cval |= SMCMR_SL; /* Two stops */
571 scval |= SCU_PSMR_SL;
575 if (termios->c_cflag & PARENB) {
577 scval |= SCU_PSMR_PEN;
579 if (!(termios->c_cflag & PARODD)) {
580 cval |= SMCMR_PM_EVEN;
581 scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
588 uart_update_timeout(port, termios->c_cflag, baud);
591 * Set up parity check flag
593 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
595 port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
596 if (termios->c_iflag & INPCK)
597 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
598 if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
599 port->read_status_mask |= BD_SC_BR;
602 * Characters to ignore
604 port->ignore_status_mask = 0;
605 if (termios->c_iflag & IGNPAR)
606 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
607 if (termios->c_iflag & IGNBRK) {
608 port->ignore_status_mask |= BD_SC_BR;
610 * If we're ignore parity and break indicators, ignore
611 * overruns too. (For real raw support).
613 if (termios->c_iflag & IGNPAR)
614 port->ignore_status_mask |= BD_SC_OV;
617 * !!! ignore all characters if CREAD is not set
619 if ((termios->c_cflag & CREAD) == 0)
620 port->read_status_mask &= ~BD_SC_EMPTY;
622 spin_lock_irqsave(&port->lock, flags);
624 /* Start bit has not been added (so don't, because we would just
625 * subtract it later), and we need to add one for the number of
626 * stops bits (there is always at least one).
631 * MRBLR can be changed while an SMC/SCC is operating only
632 * if it is done in a single bus cycle with one 16-bit move
633 * (not two 8-bit bus cycles back-to-back). This occurs when
634 * the cp shifts control to the next RxBD, so the change does
635 * not take effect immediately. To guarantee the exact RxBD
636 * on which the change occurs, change MRBLR only while the
637 * SMC/SCC receiver is disabled.
639 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
640 out_be16(&pinfo->smcup->smc_maxidl, maxidl);
642 /* Set the mode register. We want to keep a copy of the
643 * enables, because we want to put them back if they were
646 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
647 /* Output in *one* operation, so we don't interrupt RX/TX if they
648 * were already enabled. */
649 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
650 SMCMR_SM_UART | prev_mode);
652 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
653 out_be16(&pinfo->sccup->scc_maxidl, maxidl);
654 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
658 clk_set_rate(pinfo->clk, baud);
660 cpm_set_brg(pinfo->brg - 1, baud);
661 spin_unlock_irqrestore(&port->lock, flags);
664 static const char *cpm_uart_type(struct uart_port *port)
666 pr_debug("CPM uart[%d]:uart_type\n", port->line);
668 return port->type == PORT_CPM ? "CPM UART" : NULL;
672 * verify the new serial_struct (for TIOCSSERIAL).
674 static int cpm_uart_verify_port(struct uart_port *port,
675 struct serial_struct *ser)
679 pr_debug("CPM uart[%d]:verify_port\n", port->line);
681 if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
683 if (ser->irq < 0 || ser->irq >= nr_irqs)
685 if (ser->baud_base < 9600)
691 * Transmit characters, refill buffer descriptor, if possible
693 static int cpm_uart_tx_pump(struct uart_port *port)
698 struct uart_cpm_port *pinfo =
699 container_of(port, struct uart_cpm_port, port);
700 struct circ_buf *xmit = &port->state->xmit;
702 /* Handle xon/xoff */
704 /* Pick next descriptor and fill from buffer */
707 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
711 out_be16(&bdp->cbd_datlen, 1);
712 setbits16(&bdp->cbd_sc, BD_SC_READY);
714 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
715 bdp = pinfo->tx_bd_base;
725 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
726 cpm_uart_stop_tx(port);
730 /* Pick next descriptor and fill from buffer */
733 while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
734 xmit->tail != xmit->head) {
736 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
737 while (count < pinfo->tx_fifosize) {
738 *p++ = xmit->buf[xmit->tail];
739 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
742 if (xmit->head == xmit->tail)
745 out_be16(&bdp->cbd_datlen, count);
746 setbits16(&bdp->cbd_sc, BD_SC_READY);
748 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
749 bdp = pinfo->tx_bd_base;
755 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
756 uart_write_wakeup(port);
758 if (uart_circ_empty(xmit)) {
759 cpm_uart_stop_tx(port);
767 * init buffer descriptors
769 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
775 pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
777 /* Set the physical address of the host memory
778 * buffers in the buffer descriptors, and the
779 * virtual address for us to work with.
781 mem_addr = pinfo->mem_addr;
782 bdp = pinfo->rx_cur = pinfo->rx_bd_base;
783 for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
784 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
785 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
786 mem_addr += pinfo->rx_fifosize;
789 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
790 out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
792 /* Set the physical address of the host memory
793 * buffers in the buffer descriptors, and the
794 * virtual address for us to work with.
796 mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
797 bdp = pinfo->tx_cur = pinfo->tx_bd_base;
798 for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
799 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
800 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
801 mem_addr += pinfo->tx_fifosize;
804 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
805 out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
808 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
811 scc_uart_t __iomem *sup;
813 pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
819 out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
820 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
821 out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
822 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
824 /* Set up the uart parameters in the
828 cpm_set_scc_fcr(sup);
830 out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
831 out_be16(&sup->scc_maxidl, 0x10);
832 out_be16(&sup->scc_brkcr, 1);
833 out_be16(&sup->scc_parec, 0);
834 out_be16(&sup->scc_frmec, 0);
835 out_be16(&sup->scc_nosec, 0);
836 out_be16(&sup->scc_brkec, 0);
837 out_be16(&sup->scc_uaddr1, 0);
838 out_be16(&sup->scc_uaddr2, 0);
839 out_be16(&sup->scc_toseq, 0);
840 out_be16(&sup->scc_char1, 0x8000);
841 out_be16(&sup->scc_char2, 0x8000);
842 out_be16(&sup->scc_char3, 0x8000);
843 out_be16(&sup->scc_char4, 0x8000);
844 out_be16(&sup->scc_char5, 0x8000);
845 out_be16(&sup->scc_char6, 0x8000);
846 out_be16(&sup->scc_char7, 0x8000);
847 out_be16(&sup->scc_char8, 0x8000);
848 out_be16(&sup->scc_rccm, 0xc0ff);
850 /* Send the CPM an initialize command.
852 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
854 /* Set UART mode, 8 bit, no parity, one stop.
855 * Enable receive and transmit.
857 out_be32(&scp->scc_gsmrh, 0);
858 out_be32(&scp->scc_gsmrl,
859 SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
861 /* Enable rx interrupts and clear all pending events. */
862 out_be16(&scp->scc_sccm, 0);
863 out_be16(&scp->scc_scce, 0xffff);
864 out_be16(&scp->scc_dsr, 0x7e7e);
865 out_be16(&scp->scc_psmr, 0x3000);
867 setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
870 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
873 smc_uart_t __iomem *up;
875 pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
881 out_be16(&pinfo->smcup->smc_rbase,
882 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
883 out_be16(&pinfo->smcup->smc_tbase,
884 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
887 * In case SMC is being relocated...
889 out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
890 out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
891 out_be32(&up->smc_rstate, 0);
892 out_be32(&up->smc_tstate, 0);
893 out_be16(&up->smc_brkcr, 1); /* number of break chars */
894 out_be16(&up->smc_brkec, 0);
896 /* Set up the uart parameters in the
901 /* Using idle character time requires some additional tuning. */
902 out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
903 out_be16(&up->smc_maxidl, 0x10);
904 out_be16(&up->smc_brklen, 0);
905 out_be16(&up->smc_brkec, 0);
906 out_be16(&up->smc_brkcr, 1);
908 /* Set UART mode, 8 bit, no parity, one stop.
909 * Enable receive and transmit.
911 out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
913 /* Enable only rx interrupts clear all pending events. */
914 out_8(&sp->smc_smcm, 0);
915 out_8(&sp->smc_smce, 0xff);
917 setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
921 * Initialize port. This is called from early_console stuff
922 * so we have to be careful here !
924 static int cpm_uart_request_port(struct uart_port *port)
926 struct uart_cpm_port *pinfo =
927 container_of(port, struct uart_cpm_port, port);
930 pr_debug("CPM uart[%d]:request port\n", port->line);
932 if (pinfo->flags & FLAG_CONSOLE)
936 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
937 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
939 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
940 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
943 ret = cpm_uart_allocbuf(pinfo, 0);
948 cpm_uart_initbd(pinfo);
950 cpm_uart_init_smc(pinfo);
952 cpm_uart_init_scc(pinfo);
957 static void cpm_uart_release_port(struct uart_port *port)
959 struct uart_cpm_port *pinfo =
960 container_of(port, struct uart_cpm_port, port);
962 if (!(pinfo->flags & FLAG_CONSOLE))
963 cpm_uart_freebuf(pinfo);
967 * Configure/autoconfigure the port.
969 static void cpm_uart_config_port(struct uart_port *port, int flags)
971 pr_debug("CPM uart[%d]:config_port\n", port->line);
973 if (flags & UART_CONFIG_TYPE) {
974 port->type = PORT_CPM;
975 cpm_uart_request_port(port);
979 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
981 * Write a string to the serial port
982 * Note that this is called with interrupts already disabled
984 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
985 const char *string, u_int count, bool handle_linefeed)
988 cbd_t __iomem *bdp, *bdbase;
989 unsigned char *cpm_outp_addr;
991 /* Get the address of the host memory buffer.
994 bdbase = pinfo->tx_bd_base;
997 * Now, do each character. This is not as bad as it looks
998 * since this is a holding FIFO and not a transmitting FIFO.
999 * We could add the complexity of filling the entire transmit
1000 * buffer, but we would just wait longer between accesses......
1002 for (i = 0; i < count; i++, string++) {
1003 /* Wait for transmitter fifo to empty.
1004 * Ready indicates output is ready, and xmt is doing
1005 * that, not that it is ready for us to send.
1007 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1010 /* Send the character out.
1011 * If the buffer address is in the CPM DPRAM, don't
1014 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1016 *cpm_outp_addr = *string;
1018 out_be16(&bdp->cbd_datlen, 1);
1019 setbits16(&bdp->cbd_sc, BD_SC_READY);
1021 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1026 /* if a LF, also do CR... */
1027 if (handle_linefeed && *string == 10) {
1028 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1031 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1033 *cpm_outp_addr = 13;
1035 out_be16(&bdp->cbd_datlen, 1);
1036 setbits16(&bdp->cbd_sc, BD_SC_READY);
1038 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1046 * Finally, Wait for transmitter & holding register to empty
1047 * and restore the IER
1049 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1052 pinfo->tx_cur = bdp;
1056 #ifdef CONFIG_CONSOLE_POLL
1057 /* Serial polling routines for writing and reading from the uart while
1058 * in an interrupt or debug context.
1061 #define GDB_BUF_SIZE 512 /* power of 2, please */
1063 static char poll_buf[GDB_BUF_SIZE];
1065 static int poll_chars;
1067 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1070 volatile cbd_t *bdp;
1073 /* Get the address of the host memory buffer.
1075 bdp = pinfo->rx_cur;
1076 if (bdp->cbd_sc & BD_SC_EMPTY)
1077 return NO_POLL_CHAR;
1079 /* If the buffer address is in the CPM DPRAM, don't
1082 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1085 i = c = bdp->cbd_datlen;
1090 bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1091 bdp->cbd_sc |= BD_SC_EMPTY;
1093 if (bdp->cbd_sc & BD_SC_WRAP)
1094 bdp = pinfo->rx_bd_base;
1097 pinfo->rx_cur = (cbd_t *)bdp;
1102 static int cpm_get_poll_char(struct uart_port *port)
1104 struct uart_cpm_port *pinfo =
1105 container_of(port, struct uart_cpm_port, port);
1107 if (!serial_polled) {
1111 if (poll_chars <= 0) {
1112 int ret = poll_wait_key(poll_buf, pinfo);
1114 if (ret == NO_POLL_CHAR)
1123 static void cpm_put_poll_char(struct uart_port *port,
1126 struct uart_cpm_port *pinfo =
1127 container_of(port, struct uart_cpm_port, port);
1131 cpm_uart_early_write(pinfo, ch, 1, false);
1133 #endif /* CONFIG_CONSOLE_POLL */
1135 static struct uart_ops cpm_uart_pops = {
1136 .tx_empty = cpm_uart_tx_empty,
1137 .set_mctrl = cpm_uart_set_mctrl,
1138 .get_mctrl = cpm_uart_get_mctrl,
1139 .stop_tx = cpm_uart_stop_tx,
1140 .start_tx = cpm_uart_start_tx,
1141 .stop_rx = cpm_uart_stop_rx,
1142 .break_ctl = cpm_uart_break_ctl,
1143 .startup = cpm_uart_startup,
1144 .shutdown = cpm_uart_shutdown,
1145 .set_termios = cpm_uart_set_termios,
1146 .type = cpm_uart_type,
1147 .release_port = cpm_uart_release_port,
1148 .request_port = cpm_uart_request_port,
1149 .config_port = cpm_uart_config_port,
1150 .verify_port = cpm_uart_verify_port,
1151 #ifdef CONFIG_CONSOLE_POLL
1152 .poll_get_char = cpm_get_poll_char,
1153 .poll_put_char = cpm_put_poll_char,
1157 struct uart_cpm_port cpm_uart_ports[UART_NR];
1159 static int cpm_uart_init_port(struct device_node *np,
1160 struct uart_cpm_port *pinfo)
1163 void __iomem *mem, *pram;
1168 data = of_get_property(np, "clock", NULL);
1170 struct clk *clk = clk_get(NULL, (const char*)data);
1175 data = of_get_property(np, "fsl,cpm-brg", &len);
1176 if (!data || len != 4) {
1177 printk(KERN_ERR "CPM UART %s has no/invalid "
1178 "fsl,cpm-brg property.\n", np->name);
1184 data = of_get_property(np, "fsl,cpm-command", &len);
1185 if (!data || len != 4) {
1186 printk(KERN_ERR "CPM UART %s has no/invalid "
1187 "fsl,cpm-command property.\n", np->name);
1190 pinfo->command = *data;
1192 mem = of_iomap(np, 0);
1196 if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1197 of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1199 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1200 } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1201 of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1202 pinfo->flags |= FLAG_SMC;
1204 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1215 pinfo->tx_nrfifos = TX_NUM_FIFO;
1216 pinfo->tx_fifosize = TX_BUF_SIZE;
1217 pinfo->rx_nrfifos = RX_NUM_FIFO;
1218 pinfo->rx_fifosize = RX_BUF_SIZE;
1220 pinfo->port.uartclk = ppc_proc_freq;
1221 pinfo->port.mapbase = (unsigned long)mem;
1222 pinfo->port.type = PORT_CPM;
1223 pinfo->port.ops = &cpm_uart_pops,
1224 pinfo->port.iotype = UPIO_MEM;
1225 pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1226 spin_lock_init(&pinfo->port.lock);
1228 pinfo->port.irq = irq_of_parse_and_map(np, 0);
1229 if (pinfo->port.irq == NO_IRQ) {
1234 for (i = 0; i < NUM_GPIOS; i++) {
1237 pinfo->gpios[i] = -1;
1239 gpio = of_get_gpio(np, i);
1241 if (gpio_is_valid(gpio)) {
1242 ret = gpio_request(gpio, "cpm_uart");
1244 pr_err("can't request gpio #%d: %d\n", i, ret);
1247 if (i == GPIO_RTS || i == GPIO_DTR)
1248 ret = gpio_direction_output(gpio, 0);
1250 ret = gpio_direction_input(gpio);
1252 pr_err("can't set direction for gpio #%d: %d\n",
1257 pinfo->gpios[i] = gpio;
1261 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1265 return cpm_uart_request_port(&pinfo->port);
1268 cpm_uart_unmap_pram(pinfo, pram);
1274 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1276 * Print a string to the serial port trying not to disturb
1277 * any possible real use of the port...
1279 * Note that this is called with interrupts already disabled
1281 static void cpm_uart_console_write(struct console *co, const char *s,
1284 struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1285 unsigned long flags;
1286 int nolock = oops_in_progress;
1288 if (unlikely(nolock)) {
1289 local_irq_save(flags);
1291 spin_lock_irqsave(&pinfo->port.lock, flags);
1294 cpm_uart_early_write(pinfo, s, count, true);
1296 if (unlikely(nolock)) {
1297 local_irq_restore(flags);
1299 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1304 static int __init cpm_uart_console_setup(struct console *co, char *options)
1311 struct uart_cpm_port *pinfo;
1312 struct uart_port *port;
1314 struct device_node *np = NULL;
1317 if (co->index >= UART_NR) {
1318 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1324 np = of_find_node_by_type(np, "serial");
1328 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1329 !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1330 !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1331 !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1333 } while (i++ != co->index);
1335 pinfo = &cpm_uart_ports[co->index];
1337 pinfo->flags |= FLAG_CONSOLE;
1338 port = &pinfo->port;
1340 ret = cpm_uart_init_port(np, pinfo);
1346 uart_parse_options(options, &baud, &parity, &bits, &flow);
1348 if ((baud = uart_baudrate()) == -1)
1352 if (IS_SMC(pinfo)) {
1353 out_be16(&pinfo->smcup->smc_brkcr, 0);
1354 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1355 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1356 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1358 out_be16(&pinfo->sccup->scc_brkcr, 0);
1359 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1360 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1361 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1364 ret = cpm_uart_allocbuf(pinfo, 1);
1369 cpm_uart_initbd(pinfo);
1372 cpm_uart_init_smc(pinfo);
1374 cpm_uart_init_scc(pinfo);
1376 uart_set_options(port, co, baud, parity, bits, flow);
1377 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1382 static struct uart_driver cpm_reg;
1383 static struct console cpm_scc_uart_console = {
1385 .write = cpm_uart_console_write,
1386 .device = uart_console_device,
1387 .setup = cpm_uart_console_setup,
1388 .flags = CON_PRINTBUFFER,
1393 static int __init cpm_uart_console_init(void)
1395 register_console(&cpm_scc_uart_console);
1399 console_initcall(cpm_uart_console_init);
1401 #define CPM_UART_CONSOLE &cpm_scc_uart_console
1403 #define CPM_UART_CONSOLE NULL
1406 static struct uart_driver cpm_reg = {
1407 .owner = THIS_MODULE,
1408 .driver_name = "ttyCPM",
1409 .dev_name = "ttyCPM",
1410 .major = SERIAL_CPM_MAJOR,
1411 .minor = SERIAL_CPM_MINOR,
1412 .cons = CPM_UART_CONSOLE,
1416 static int probe_index;
1418 static int cpm_uart_probe(struct platform_device *ofdev)
1420 int index = probe_index++;
1421 struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1424 pinfo->port.line = index;
1426 if (index >= UART_NR)
1429 platform_set_drvdata(ofdev, pinfo);
1431 /* initialize the device pointer for the port */
1432 pinfo->port.dev = &ofdev->dev;
1434 ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1438 return uart_add_one_port(&cpm_reg, &pinfo->port);
1441 static int cpm_uart_remove(struct platform_device *ofdev)
1443 struct uart_cpm_port *pinfo = platform_get_drvdata(ofdev);
1444 return uart_remove_one_port(&cpm_reg, &pinfo->port);
1447 static const struct of_device_id cpm_uart_match[] = {
1449 .compatible = "fsl,cpm1-smc-uart",
1452 .compatible = "fsl,cpm1-scc-uart",
1455 .compatible = "fsl,cpm2-smc-uart",
1458 .compatible = "fsl,cpm2-scc-uart",
1462 MODULE_DEVICE_TABLE(of, cpm_uart_match);
1464 static struct platform_driver cpm_uart_driver = {
1467 .of_match_table = cpm_uart_match,
1469 .probe = cpm_uart_probe,
1470 .remove = cpm_uart_remove,
1473 static int __init cpm_uart_init(void)
1475 int ret = uart_register_driver(&cpm_reg);
1479 ret = platform_driver_register(&cpm_uart_driver);
1481 uart_unregister_driver(&cpm_reg);
1486 static void __exit cpm_uart_exit(void)
1488 platform_driver_unregister(&cpm_uart_driver);
1489 uart_unregister_driver(&cpm_reg);
1492 module_init(cpm_uart_init);
1493 module_exit(cpm_uart_exit);
1495 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1496 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1497 MODULE_LICENSE("GPL");
1498 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);