drivers/tty/serial/cpm_uart/cpm_uart_core.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Driver for CPM (SCC/SMC) serial ports; core driver
   4  *
   5  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   6  *  Based on ppc8xx.c by Thomas Gleixner
   7  *  Based on drivers/serial/amba.c by Russell King
   8  *
   9  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  10  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  11  *
  12  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  13  *            (C) 2004 Intracom, S.A.
  14  *            (C) 2005-2006 MontaVista Software, Inc.
  15  *              Vitaly Bordug <vbordug@ru.mvista.com>
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/tty.h>
  20 #include <linux/tty_flip.h>
  21 #include <linux/ioport.h>
  22 #include <linux/init.h>
  23 #include <linux/serial.h>
  24 #include <linux/console.h>
  25 #include <linux/sysrq.h>
  26 #include <linux/device.h>
  27 #include <linux/bootmem.h>
  28 #include <linux/dma-mapping.h>
  29 #include <linux/fs_uart_pd.h>
  30 #include <linux/of_address.h>
  31 #include <linux/of_irq.h>
  32 #include <linux/of_platform.h>
  33 #include <linux/gpio.h>
  34 #include <linux/of_gpio.h>
  35 #include <linux/clk.h>
  36
  37 #include <asm/io.h>
  38 #include <asm/irq.h>
  39 #include <asm/delay.h>
  40 #include <asm/fs_pd.h>
  41 #include <asm/udbg.h>
  42
  43 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  44 #define SUPPORT_SYSRQ
  45 #endif
  46
  47 #include <linux/serial_core.h>
  48 #include <linux/kernel.h>
  49
  50 #include "cpm_uart.h"
  51
  52
  53 /**************************************************************/
  54
  55 static int  cpm_uart_tx_pump(struct uart_port *port);
  56 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  57 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  58 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  59
  60 /**************************************************************/
  61
  62 #define HW_BUF_SPD_THRESHOLD    2400
  63
  64 /*
  65  * Check, if transmit buffers are processed
  66 */
  67 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  68 {
  69         struct uart_cpm_port *pinfo =
  70                 container_of(port, struct uart_cpm_port, port);
  71         cbd_t __iomem *bdp = pinfo->tx_bd_base;
  72         int ret = 0;
  73
  74         while (1) {
  75                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
  76                         break;
  77
  78                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
  79                         ret = TIOCSER_TEMT;
  80                         break;
  81                 }
  82                 bdp++;
  83         }
  84
  85         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
  86
  87         return ret;
  88 }
  89
  90 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  91 {
  92         struct uart_cpm_port *pinfo =
  93                 container_of(port, struct uart_cpm_port, port);
  94
  95         if (pinfo->gpios[GPIO_RTS] >= 0)
  96                 gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
  97
  98         if (pinfo->gpios[GPIO_DTR] >= 0)
  99                 gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
 100 }
 101
 102 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
 103 {
 104         struct uart_cpm_port *pinfo =
 105                 container_of(port, struct uart_cpm_port, port);
 106         unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 107
 108         if (pinfo->gpios[GPIO_CTS] >= 0) {
 109                 if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
 110                         mctrl &= ~TIOCM_CTS;
 111         }
 112
 113         if (pinfo->gpios[GPIO_DSR] >= 0) {
 114                 if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
 115                         mctrl &= ~TIOCM_DSR;
 116         }
 117
 118         if (pinfo->gpios[GPIO_DCD] >= 0) {
 119                 if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
 120                         mctrl &= ~TIOCM_CAR;
 121         }
 122
 123         if (pinfo->gpios[GPIO_RI] >= 0) {
 124                 if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
 125                         mctrl |= TIOCM_RNG;
 126         }
 127
 128         return mctrl;
 129 }
 130
 131 /*
 132  * Stop transmitter
 133  */
 134 static void cpm_uart_stop_tx(struct uart_port *port)
 135 {
 136         struct uart_cpm_port *pinfo =
 137                 container_of(port, struct uart_cpm_port, port);
 138         smc_t __iomem *smcp = pinfo->smcp;
 139         scc_t __iomem *sccp = pinfo->sccp;
 140
 141         pr_debug("CPM uart[%d]:stop tx\n", port->line);
 142
 143         if (IS_SMC(pinfo))
 144                 clrbits8(&smcp->smc_smcm, SMCM_TX);
 145         else
 146                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 147 }
 148
 149 /*
 150  * Start transmitter
 151  */
 152 static void cpm_uart_start_tx(struct uart_port *port)
 153 {
 154         struct uart_cpm_port *pinfo =
 155                 container_of(port, struct uart_cpm_port, port);
 156         smc_t __iomem *smcp = pinfo->smcp;
 157         scc_t __iomem *sccp = pinfo->sccp;
 158
 159         pr_debug("CPM uart[%d]:start tx\n", port->line);
 160
 161         if (IS_SMC(pinfo)) {
 162                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
 163                         return;
 164         } else {
 165                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 166                         return;
 167         }
 168
 169         if (cpm_uart_tx_pump(port) != 0) {
 170                 if (IS_SMC(pinfo)) {
 171                         setbits8(&smcp->smc_smcm, SMCM_TX);
 172                 } else {
 173                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 174                 }
 175         }
 176 }
 177
 178 /*
 179  * Stop receiver
 180  */
 181 static void cpm_uart_stop_rx(struct uart_port *port)
 182 {
 183         struct uart_cpm_port *pinfo =
 184                 container_of(port, struct uart_cpm_port, port);
 185         smc_t __iomem *smcp = pinfo->smcp;
 186         scc_t __iomem *sccp = pinfo->sccp;
 187
 188         pr_debug("CPM uart[%d]:stop rx\n", port->line);
 189
 190         if (IS_SMC(pinfo))
 191                 clrbits8(&smcp->smc_smcm, SMCM_RX);
 192         else
 193                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 194 }
 195
 196 /*
 197  * Generate a break.
 198  */
 199 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 200 {
 201         struct uart_cpm_port *pinfo =
 202                 container_of(port, struct uart_cpm_port, port);
 203
 204         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 205                 break_state);
 206
 207         if (break_state)
 208                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 209         else
 210                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 211 }
 212
 213 /*
 214  * Transmit characters, refill buffer descriptor, if possible
 215  */
 216 static void cpm_uart_int_tx(struct uart_port *port)
 217 {
 218         pr_debug("CPM uart[%d]:TX INT\n", port->line);
 219
 220         cpm_uart_tx_pump(port);
 221 }
 222
 223 #ifdef CONFIG_CONSOLE_POLL
 224 static int serial_polled;
 225 #endif
 226
 227 /*
 228  * Receive characters
 229  */
 230 static void cpm_uart_int_rx(struct uart_port *port)
 231 {
 232         int i;
 233         unsigned char ch;
 234         u8 *cp;
 235         struct tty_port *tport = &port->state->port;
 236         struct uart_cpm_port *pinfo =
 237                 container_of(port, struct uart_cpm_port, port);
 238         cbd_t __iomem *bdp;
 239         u16 status;
 240         unsigned int flg;
 241
 242         pr_debug("CPM uart[%d]:RX INT\n", port->line);
 243
 244         /* Just loop through the closed BDs and copy the characters into
 245          * the buffer.
 246          */
 247         bdp = pinfo->rx_cur;
 248         for (;;) {
 249 #ifdef CONFIG_CONSOLE_POLL
 250                 if (unlikely(serial_polled)) {
 251                         serial_polled = 0;
 252                         return;
 253                 }
 254 #endif
 255                 /* get status */
 256                 status = in_be16(&bdp->cbd_sc);
 257                 /* If this one is empty, return happy */
 258                 if (status & BD_SC_EMPTY)
 259                         break;
 260
 261                 /* get number of characters, and check spce in flip-buffer */
 262                 i = in_be16(&bdp->cbd_datlen);
 263
 264                 /* If we have not enough room in tty flip buffer, then we try
 265                  * later, which will be the next rx-interrupt or a timeout
 266                  */
 267                 if (tty_buffer_request_room(tport, i) < i) {
 268                         printk(KERN_WARNING "No room in flip buffer\n");
 269                         return;
 270                 }
 271
 272                 /* get pointer */
 273                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 274
 275                 /* loop through the buffer */
 276                 while (i-- > 0) {
 277                         ch = *cp++;
 278                         port->icount.rx++;
 279                         flg = TTY_NORMAL;
 280
 281                         if (status &
 282                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 283                                 goto handle_error;
 284                         if (uart_handle_sysrq_char(port, ch))
 285                                 continue;
 286 #ifdef CONFIG_CONSOLE_POLL
 287                         if (unlikely(serial_polled)) {
 288                                 serial_polled = 0;
 289                                 return;
 290                         }
 291 #endif
 292                       error_return:
 293                         tty_insert_flip_char(tport, ch, flg);
 294
 295                 }               /* End while (i--) */
 296
 297                 /* This BD is ready to be used again. Clear status. get next */
 298                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 299                                         BD_SC_OV | BD_SC_ID);
 300                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 301
 302                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 303                         bdp = pinfo->rx_bd_base;
 304                 else
 305                         bdp++;
 306
 307         } /* End for (;;) */
 308
 309         /* Write back buffer pointer */
 310         pinfo->rx_cur = bdp;
 311
 312         /* activate BH processing */
 313         tty_flip_buffer_push(tport);
 314
 315         return;
 316
 317         /* Error processing */
 318
 319       handle_error:
 320         /* Statistics */
 321         if (status & BD_SC_BR)
 322                 port->icount.brk++;
 323         if (status & BD_SC_PR)
 324                 port->icount.parity++;
 325         if (status & BD_SC_FR)
 326                 port->icount.frame++;
 327         if (status & BD_SC_OV)
 328                 port->icount.overrun++;
 329
 330         /* Mask out ignored conditions */
 331         status &= port->read_status_mask;
 332
 333         /* Handle the remaining ones */
 334         if (status & BD_SC_BR)
 335                 flg = TTY_BREAK;
 336         else if (status & BD_SC_PR)
 337                 flg = TTY_PARITY;
 338         else if (status & BD_SC_FR)
 339                 flg = TTY_FRAME;
 340
 341         /* overrun does not affect the current character ! */
 342         if (status & BD_SC_OV) {
 343                 ch = 0;
 344                 flg = TTY_OVERRUN;
 345                 /* We skip this buffer */
 346                 /* CHECK: Is really nothing senseful there */
 347                 /* ASSUMPTION: it contains nothing valid */
 348                 i = 0;
 349         }
 350 #ifdef SUPPORT_SYSRQ
 351         port->sysrq = 0;
 352 #endif
 353         goto error_return;
 354 }
 355
 356 /*
 357  * Asynchron mode interrupt handler
 358  */
 359 static irqreturn_t cpm_uart_int(int irq, void *data)
 360 {
 361         u8 events;
 362         struct uart_port *port = data;
 363         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 364         smc_t __iomem *smcp = pinfo->smcp;
 365         scc_t __iomem *sccp = pinfo->sccp;
 366
 367         pr_debug("CPM uart[%d]:IRQ\n", port->line);
 368
 369         if (IS_SMC(pinfo)) {
 370                 events = in_8(&smcp->smc_smce);
 371                 out_8(&smcp->smc_smce, events);
 372                 if (events & SMCM_BRKE)
 373                         uart_handle_break(port);
 374                 if (events & SMCM_RX)
 375                         cpm_uart_int_rx(port);
 376                 if (events & SMCM_TX)
 377                         cpm_uart_int_tx(port);
 378         } else {
 379                 events = in_be16(&sccp->scc_scce);
 380                 out_be16(&sccp->scc_scce, events);
 381                 if (events & UART_SCCM_BRKE)
 382                         uart_handle_break(port);
 383                 if (events & UART_SCCM_RX)
 384                         cpm_uart_int_rx(port);
 385                 if (events & UART_SCCM_TX)
 386                         cpm_uart_int_tx(port);
 387         }
 388         return (events) ? IRQ_HANDLED : IRQ_NONE;
 389 }
 390
 391 static int cpm_uart_startup(struct uart_port *port)
 392 {
 393         int retval;
 394         struct uart_cpm_port *pinfo =
 395                 container_of(port, struct uart_cpm_port, port);
 396
 397         pr_debug("CPM uart[%d]:startup\n", port->line);
 398
 399         /* If the port is not the console, make sure rx is disabled. */
 400         if (!(pinfo->flags & FLAG_CONSOLE)) {
 401                 /* Disable UART rx */
 402                 if (IS_SMC(pinfo)) {
 403                         clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
 404                         clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 405                 } else {
 406                         clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
 407                         clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 408                 }
 409                 cpm_uart_initbd(pinfo);
 410                 if (IS_SMC(pinfo)) {
 411                         out_be32(&pinfo->smcup->smc_rstate, 0);
 412                         out_be32(&pinfo->smcup->smc_tstate, 0);
 413                         out_be16(&pinfo->smcup->smc_rbptr,
 414                                  in_be16(&pinfo->smcup->smc_rbase));
 415                         out_be16(&pinfo->smcup->smc_tbptr,
 416                                  in_be16(&pinfo->smcup->smc_tbase));
 417                 } else {
 418                         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 419                 }
 420         }
 421         /* Install interrupt handler. */
 422         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 423         if (retval)
 424                 return retval;
 425
 426         /* Startup rx-int */
 427         if (IS_SMC(pinfo)) {
 428                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 429                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 430         } else {
 431                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 432                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 433         }
 434
 435         return 0;
 436 }
 437
 438 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 439 {
 440         set_current_state(TASK_UNINTERRUPTIBLE);
 441         schedule_timeout(pinfo->wait_closing);
 442 }
 443
 444 /*
 445  * Shutdown the uart
 446  */
 447 static void cpm_uart_shutdown(struct uart_port *port)
 448 {
 449         struct uart_cpm_port *pinfo =
 450                 container_of(port, struct uart_cpm_port, port);
 451
 452         pr_debug("CPM uart[%d]:shutdown\n", port->line);
 453
 454         /* free interrupt handler */
 455         free_irq(port->irq, port);
 456
 457         /* If the port is not the console, disable Rx and Tx. */
 458         if (!(pinfo->flags & FLAG_CONSOLE)) {
 459                 /* Wait for all the BDs marked sent */
 460                 while(!cpm_uart_tx_empty(port)) {
 461                         set_current_state(TASK_UNINTERRUPTIBLE);
 462                         schedule_timeout(2);
 463                 }
 464
 465                 if (pinfo->wait_closing)
 466                         cpm_uart_wait_until_send(pinfo);
 467
 468                 /* Stop uarts */
 469                 if (IS_SMC(pinfo)) {
 470                         smc_t __iomem *smcp = pinfo->smcp;
 471                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 472                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 473                 } else {
 474                         scc_t __iomem *sccp = pinfo->sccp;
 475                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 476                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 477                 }
 478
 479                 /* Shut them really down and reinit buffer descriptors */
 480                 if (IS_SMC(pinfo)) {
 481                         out_be16(&pinfo->smcup->smc_brkcr, 0);
 482                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 483                 } else {
 484                         out_be16(&pinfo->sccup->scc_brkcr, 0);
 485                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 486                 }
 487
 488                 cpm_uart_initbd(pinfo);
 489         }
 490 }
 491
 492 static void cpm_uart_set_termios(struct uart_port *port,
 493                                  struct ktermios *termios,
 494                                  struct ktermios *old)
 495 {
 496         int baud;
 497         unsigned long flags;
 498         u16 cval, scval, prev_mode;
 499         int bits, sbits;
 500         struct uart_cpm_port *pinfo =
 501                 container_of(port, struct uart_cpm_port, port);
 502         smc_t __iomem *smcp = pinfo->smcp;
 503         scc_t __iomem *sccp = pinfo->sccp;
 504         int maxidl;
 505
 506         pr_debug("CPM uart[%d]:set_termios\n", port->line);
 507
 508         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 509         if (baud < HW_BUF_SPD_THRESHOLD ||
 510             (pinfo->port.state && pinfo->port.state->port.low_latency))
 511                 pinfo->rx_fifosize = 1;
 512         else
 513                 pinfo->rx_fifosize = RX_BUF_SIZE;
 514
 515         /* MAXIDL is the timeout after which a receive buffer is closed
 516          * when not full if no more characters are received.
 517          * We calculate it from the baudrate so that the duration is
 518          * always the same at standard rates: about 4ms.
 519          */
 520         maxidl = baud / 2400;
 521         if (maxidl < 1)
 522                 maxidl = 1;
 523         if (maxidl > 0x10)
 524                 maxidl = 0x10;
 525
 526         /* Character length programmed into the mode register is the
 527          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 528          * 1 or 2 stop bits, minus 1.
 529          * The value 'bits' counts this for us.
 530          */
 531         cval = 0;
 532         scval = 0;
 533
 534         /* byte size */
 535         switch (termios->c_cflag & CSIZE) {
 536         case CS5:
 537                 bits = 5;
 538                 break;
 539         case CS6:
 540                 bits = 6;
 541                 break;
 542         case CS7:
 543                 bits = 7;
 544                 break;
 545         case CS8:
 546                 bits = 8;
 547                 break;
 548                 /* Never happens, but GCC is too dumb to figure it out */
 549         default:
 550                 bits = 8;
 551                 break;
 552         }
 553         sbits = bits - 5;
 554
 555         if (termios->c_cflag & CSTOPB) {
 556                 cval |= SMCMR_SL;       /* Two stops */
 557                 scval |= SCU_PSMR_SL;
 558                 bits++;
 559         }
 560
 561         if (termios->c_cflag & PARENB) {
 562                 cval |= SMCMR_PEN;
 563                 scval |= SCU_PSMR_PEN;
 564                 bits++;
 565                 if (!(termios->c_cflag & PARODD)) {
 566                         cval |= SMCMR_PM_EVEN;
 567                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 568                 }
 569         }
 570
 571         /*
 572          * Update the timeout
 573          */
 574         uart_update_timeout(port, termios->c_cflag, baud);
 575
 576         /*
 577          * Set up parity check flag
 578          */
 579 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 580
 581         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 582         if (termios->c_iflag & INPCK)
 583                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 584         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 585                 port->read_status_mask |= BD_SC_BR;
 586
 587         /*
 588          * Characters to ignore
 589          */
 590         port->ignore_status_mask = 0;
 591         if (termios->c_iflag & IGNPAR)
 592                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 593         if (termios->c_iflag & IGNBRK) {
 594                 port->ignore_status_mask |= BD_SC_BR;
 595                 /*
 596                  * If we're ignore parity and break indicators, ignore
 597                  * overruns too.  (For real raw support).
 598                  */
 599                 if (termios->c_iflag & IGNPAR)
 600                         port->ignore_status_mask |= BD_SC_OV;
 601         }
 602         /*
 603          * !!! ignore all characters if CREAD is not set
 604          */
 605         if ((termios->c_cflag & CREAD) == 0)
 606                 port->read_status_mask &= ~BD_SC_EMPTY;
 607
 608         spin_lock_irqsave(&port->lock, flags);
 609
 610         /* Start bit has not been added (so don't, because we would just
 611          * subtract it later), and we need to add one for the number of
 612          * stops bits (there is always at least one).
 613          */
 614         bits++;
 615         if (IS_SMC(pinfo)) {
 616                 /*
 617                  * MRBLR can be changed while an SMC/SCC is operating only
 618                  * if it is done in a single bus cycle with one 16-bit move
 619                  * (not two 8-bit bus cycles back-to-back). This occurs when
 620                  * the cp shifts control to the next RxBD, so the change does
 621                  * not take effect immediately. To guarantee the exact RxBD
 622                  * on which the change occurs, change MRBLR only while the
 623                  * SMC/SCC receiver is disabled.
 624                  */
 625                 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
 626                 out_be16(&pinfo->smcup->smc_maxidl, maxidl);
 627
 628                 /* Set the mode register.  We want to keep a copy of the
 629                  * enables, because we want to put them back if they were
 630                  * present.
 631                  */
 632                 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
 633                 /* Output in *one* operation, so we don't interrupt RX/TX if they
 634                  * were already enabled. */
 635                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
 636                     SMCMR_SM_UART | prev_mode);
 637         } else {
 638                 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 639                 out_be16(&pinfo->sccup->scc_maxidl, maxidl);
 640                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 641         }
 642
 643         if (pinfo->clk)
 644                 clk_set_rate(pinfo->clk, baud);
 645         else
 646                 cpm_set_brg(pinfo->brg - 1, baud);
 647         spin_unlock_irqrestore(&port->lock, flags);
 648 }
 649
 650 static const char *cpm_uart_type(struct uart_port *port)
 651 {
 652         pr_debug("CPM uart[%d]:uart_type\n", port->line);
 653
 654         return port->type == PORT_CPM ? "CPM UART" : NULL;
 655 }
 656
 657 /*
 658  * verify the new serial_struct (for TIOCSSERIAL).
 659  */
 660 static int cpm_uart_verify_port(struct uart_port *port,
 661                                 struct serial_struct *ser)
 662 {
 663         int ret = 0;
 664
 665         pr_debug("CPM uart[%d]:verify_port\n", port->line);
 666
 667         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 668                 ret = -EINVAL;
 669         if (ser->irq < 0 || ser->irq >= nr_irqs)
 670                 ret = -EINVAL;
 671         if (ser->baud_base < 9600)
 672                 ret = -EINVAL;
 673         return ret;
 674 }
 675
 676 /*
 677  * Transmit characters, refill buffer descriptor, if possible
 678  */
 679 static int cpm_uart_tx_pump(struct uart_port *port)
 680 {
 681         cbd_t __iomem *bdp;
 682         u8 *p;
 683         int count;
 684         struct uart_cpm_port *pinfo =
 685                 container_of(port, struct uart_cpm_port, port);
 686         struct circ_buf *xmit = &port->state->xmit;
 687
 688         /* Handle xon/xoff */
 689         if (port->x_char) {
 690                 /* Pick next descriptor and fill from buffer */
 691                 bdp = pinfo->tx_cur;
 692
 693                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 694
 695                 *p++ = port->x_char;
 696
 697                 out_be16(&bdp->cbd_datlen, 1);
 698                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 699                 /* Get next BD. */
 700                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 701                         bdp = pinfo->tx_bd_base;
 702                 else
 703                         bdp++;
 704                 pinfo->tx_cur = bdp;
 705
 706                 port->icount.tx++;
 707                 port->x_char = 0;
 708                 return 1;
 709         }
 710
 711         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 712                 cpm_uart_stop_tx(port);
 713                 return 0;
 714         }
 715
 716         /* Pick next descriptor and fill from buffer */
 717         bdp = pinfo->tx_cur;
 718
 719         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 720                xmit->tail != xmit->head) {
 721                 count = 0;
 722                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 723                 while (count < pinfo->tx_fifosize) {
 724                         *p++ = xmit->buf[xmit->tail];
 725                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 726                         port->icount.tx++;
 727                         count++;
 728                         if (xmit->head == xmit->tail)
 729                                 break;
 730                 }
 731                 out_be16(&bdp->cbd_datlen, count);
 732                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 733                 /* Get next BD. */
 734                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 735                         bdp = pinfo->tx_bd_base;
 736                 else
 737                         bdp++;
 738         }
 739         pinfo->tx_cur = bdp;
 740
 741         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 742                 uart_write_wakeup(port);
 743
 744         if (uart_circ_empty(xmit)) {
 745                 cpm_uart_stop_tx(port);
 746                 return 0;
 747         }
 748
 749         return 1;
 750 }
 751
 752 /*
 753  * init buffer descriptors
 754  */
 755 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 756 {
 757         int i;
 758         u8 *mem_addr;
 759         cbd_t __iomem *bdp;
 760
 761         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 762
 763         /* Set the physical address of the host memory
 764          * buffers in the buffer descriptors, and the
 765          * virtual address for us to work with.
 766          */
 767         mem_addr = pinfo->mem_addr;
 768         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 769         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 770                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 771                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 772                 mem_addr += pinfo->rx_fifosize;
 773         }
 774
 775         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 776         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 777
 778         /* Set the physical address of the host memory
 779          * buffers in the buffer descriptors, and the
 780          * virtual address for us to work with.
 781          */
 782         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 783         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 784         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 785                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 786                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 787                 mem_addr += pinfo->tx_fifosize;
 788         }
 789
 790         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 791         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 792 }
 793
 794 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 795 {
 796         scc_t __iomem *scp;
 797         scc_uart_t __iomem *sup;
 798
 799         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 800
 801         scp = pinfo->sccp;
 802         sup = pinfo->sccup;
 803
 804         /* Store address */
 805         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 806                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 807         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 808                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 809
 810         /* Set up the uart parameters in the
 811          * parameter ram.
 812          */
 813
 814         cpm_set_scc_fcr(sup);
 815
 816         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 817         out_be16(&sup->scc_maxidl, 0x10);
 818         out_be16(&sup->scc_brkcr, 1);
 819         out_be16(&sup->scc_parec, 0);
 820         out_be16(&sup->scc_frmec, 0);
 821         out_be16(&sup->scc_nosec, 0);
 822         out_be16(&sup->scc_brkec, 0);
 823         out_be16(&sup->scc_uaddr1, 0);
 824         out_be16(&sup->scc_uaddr2, 0);
 825         out_be16(&sup->scc_toseq, 0);
 826         out_be16(&sup->scc_char1, 0x8000);
 827         out_be16(&sup->scc_char2, 0x8000);
 828         out_be16(&sup->scc_char3, 0x8000);
 829         out_be16(&sup->scc_char4, 0x8000);
 830         out_be16(&sup->scc_char5, 0x8000);
 831         out_be16(&sup->scc_char6, 0x8000);
 832         out_be16(&sup->scc_char7, 0x8000);
 833         out_be16(&sup->scc_char8, 0x8000);
 834         out_be16(&sup->scc_rccm, 0xc0ff);
 835
 836         /* Send the CPM an initialize command.
 837          */
 838         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 839
 840         /* Set UART mode, 8 bit, no parity, one stop.
 841          * Enable receive and transmit.
 842          */
 843         out_be32(&scp->scc_gsmrh, 0);
 844         out_be32(&scp->scc_gsmrl,
 845                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 846
 847         /* Enable rx interrupts  and clear all pending events.  */
 848         out_be16(&scp->scc_sccm, 0);
 849         out_be16(&scp->scc_scce, 0xffff);
 850         out_be16(&scp->scc_dsr, 0x7e7e);
 851         out_be16(&scp->scc_psmr, 0x3000);
 852
 853         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 854 }
 855
 856 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 857 {
 858         smc_t __iomem *sp;
 859         smc_uart_t __iomem *up;
 860
 861         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 862
 863         sp = pinfo->smcp;
 864         up = pinfo->smcup;
 865
 866         /* Store address */
 867         out_be16(&pinfo->smcup->smc_rbase,
 868                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 869         out_be16(&pinfo->smcup->smc_tbase,
 870                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 871
 872 /*
 873  *  In case SMC is being relocated...
 874  */
 875         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 876         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 877         out_be32(&up->smc_rstate, 0);
 878         out_be32(&up->smc_tstate, 0);
 879         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 880         out_be16(&up->smc_brkec, 0);
 881
 882         /* Set up the uart parameters in the
 883          * parameter ram.
 884          */
 885         cpm_set_smc_fcr(up);
 886
 887         /* Using idle character time requires some additional tuning.  */
 888         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 889         out_be16(&up->smc_maxidl, 0x10);
 890         out_be16(&up->smc_brklen, 0);
 891         out_be16(&up->smc_brkec, 0);
 892         out_be16(&up->smc_brkcr, 1);
 893
 894         /* Set UART mode, 8 bit, no parity, one stop.
 895          * Enable receive and transmit.
 896          */
 897         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 898
 899         /* Enable only rx interrupts clear all pending events. */
 900         out_8(&sp->smc_smcm, 0);
 901         out_8(&sp->smc_smce, 0xff);
 902
 903         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 904 }
 905
 906 /*
 907  * Initialize port. This is called from early_console stuff
 908  * so we have to be careful here !
 909  */
 910 static int cpm_uart_request_port(struct uart_port *port)
 911 {
 912         struct uart_cpm_port *pinfo =
 913                 container_of(port, struct uart_cpm_port, port);
 914         int ret;
 915
 916         pr_debug("CPM uart[%d]:request port\n", port->line);
 917
 918         if (pinfo->flags & FLAG_CONSOLE)
 919                 return 0;
 920
 921         if (IS_SMC(pinfo)) {
 922                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 923                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 924         } else {
 925                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 926                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 927         }
 928
 929         ret = cpm_uart_allocbuf(pinfo, 0);
 930
 931         if (ret)
 932                 return ret;
 933
 934         cpm_uart_initbd(pinfo);
 935         if (IS_SMC(pinfo))
 936                 cpm_uart_init_smc(pinfo);
 937         else
 938                 cpm_uart_init_scc(pinfo);
 939
 940         return 0;
 941 }
 942
 943 static void cpm_uart_release_port(struct uart_port *port)
 944 {
 945         struct uart_cpm_port *pinfo =
 946                 container_of(port, struct uart_cpm_port, port);
 947
 948         if (!(pinfo->flags & FLAG_CONSOLE))
 949                 cpm_uart_freebuf(pinfo);
 950 }
 951
 952 /*
 953  * Configure/autoconfigure the port.
 954  */
 955 static void cpm_uart_config_port(struct uart_port *port, int flags)
 956 {
 957         pr_debug("CPM uart[%d]:config_port\n", port->line);
 958
 959         if (flags & UART_CONFIG_TYPE) {
 960                 port->type = PORT_CPM;
 961                 cpm_uart_request_port(port);
 962         }
 963 }
 964
 965 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
 966 /*
 967  * Write a string to the serial port
 968  * Note that this is called with interrupts already disabled
 969  */
 970 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
 971                 const char *string, u_int count, bool handle_linefeed)
 972 {
 973         unsigned int i;
 974         cbd_t __iomem *bdp, *bdbase;
 975         unsigned char *cpm_outp_addr;
 976
 977         /* Get the address of the host memory buffer.
 978          */
 979         bdp = pinfo->tx_cur;
 980         bdbase = pinfo->tx_bd_base;
 981
 982         /*
 983          * Now, do each character.  This is not as bad as it looks
 984          * since this is a holding FIFO and not a transmitting FIFO.
 985          * We could add the complexity of filling the entire transmit
 986          * buffer, but we would just wait longer between accesses......
 987          */
 988         for (i = 0; i < count; i++, string++) {
 989                 /* Wait for transmitter fifo to empty.
 990                  * Ready indicates output is ready, and xmt is doing
 991                  * that, not that it is ready for us to send.
 992                  */
 993                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
 994                         ;
 995
 996                 /* Send the character out.
 997                  * If the buffer address is in the CPM DPRAM, don't
 998                  * convert it.
 999                  */
1000                 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1001                                         pinfo);
1002                 *cpm_outp_addr = *string;
1003
1004                 out_be16(&bdp->cbd_datlen, 1);
1005                 setbits16(&bdp->cbd_sc, BD_SC_READY);
1006
1007                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1008                         bdp = bdbase;
1009                 else
1010                         bdp++;
1011
1012                 /* if a LF, also do CR... */
1013                 if (handle_linefeed && *string == 10) {
1014                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1015                                 ;
1016
1017                         cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1018                                                 pinfo);
1019                         *cpm_outp_addr = 13;
1020
1021                         out_be16(&bdp->cbd_datlen, 1);
1022                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1023
1024                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1025                                 bdp = bdbase;
1026                         else
1027                                 bdp++;
1028                 }
1029         }
1030
1031         /*
1032          * Finally, Wait for transmitter & holding register to empty
1033          *  and restore the IER
1034          */
1035         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1036                 ;
1037
1038         pinfo->tx_cur = bdp;
1039 }
1040 #endif
1041
1042 #ifdef CONFIG_CONSOLE_POLL
1043 /* Serial polling routines for writing and reading from the uart while
1044  * in an interrupt or debug context.
1045  */
1046
1047 #define GDB_BUF_SIZE    512     /* power of 2, please */
1048
1049 static char poll_buf[GDB_BUF_SIZE];
1050 static char *pollp;
1051 static int poll_chars;
1052
1053 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1054 {
1055         u_char          c, *cp;
1056         volatile cbd_t  *bdp;
1057         int             i;
1058
1059         /* Get the address of the host memory buffer.
1060          */
1061         bdp = pinfo->rx_cur;
1062         if (bdp->cbd_sc & BD_SC_EMPTY)
1063                 return NO_POLL_CHAR;
1064
1065         /* If the buffer address is in the CPM DPRAM, don't
1066          * convert it.
1067          */
1068         cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1069
1070         if (obuf) {
1071                 i = c = bdp->cbd_datlen;
1072                 while (i-- > 0)
1073                         *obuf++ = *cp++;
1074         } else
1075                 c = *cp;
1076         bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1077         bdp->cbd_sc |= BD_SC_EMPTY;
1078
1079         if (bdp->cbd_sc & BD_SC_WRAP)
1080                 bdp = pinfo->rx_bd_base;
1081         else
1082                 bdp++;
1083         pinfo->rx_cur = (cbd_t *)bdp;
1084
1085         return (int)c;
1086 }
1087
1088 static int cpm_get_poll_char(struct uart_port *port)
1089 {
1090         struct uart_cpm_port *pinfo =
1091                 container_of(port, struct uart_cpm_port, port);
1092
1093         if (!serial_polled) {
1094                 serial_polled = 1;
1095                 poll_chars = 0;
1096         }
1097         if (poll_chars <= 0) {
1098                 int ret = poll_wait_key(poll_buf, pinfo);
1099
1100                 if (ret == NO_POLL_CHAR)
1101                         return ret;
1102                 poll_chars = ret;
1103                 pollp = poll_buf;
1104         }
1105         poll_chars--;
1106         return *pollp++;
1107 }
1108
1109 static void cpm_put_poll_char(struct uart_port *port,
1110                          unsigned char c)
1111 {
1112         struct uart_cpm_port *pinfo =
1113                 container_of(port, struct uart_cpm_port, port);
1114         static char ch[2];
1115
1116         ch[0] = (char)c;
1117         cpm_uart_early_write(pinfo, ch, 1, false);
1118 }
1119 #endif /* CONFIG_CONSOLE_POLL */
1120
1121 static const struct uart_ops cpm_uart_pops = {
1122         .tx_empty       = cpm_uart_tx_empty,
1123         .set_mctrl      = cpm_uart_set_mctrl,
1124         .get_mctrl      = cpm_uart_get_mctrl,
1125         .stop_tx        = cpm_uart_stop_tx,
1126         .start_tx       = cpm_uart_start_tx,
1127         .stop_rx        = cpm_uart_stop_rx,
1128         .break_ctl      = cpm_uart_break_ctl,
1129         .startup        = cpm_uart_startup,
1130         .shutdown       = cpm_uart_shutdown,
1131         .set_termios    = cpm_uart_set_termios,
1132         .type           = cpm_uart_type,
1133         .release_port   = cpm_uart_release_port,
1134         .request_port   = cpm_uart_request_port,
1135         .config_port    = cpm_uart_config_port,
1136         .verify_port    = cpm_uart_verify_port,
1137 #ifdef CONFIG_CONSOLE_POLL
1138         .poll_get_char = cpm_get_poll_char,
1139         .poll_put_char = cpm_put_poll_char,
1140 #endif
1141 };
1142
1143 struct uart_cpm_port cpm_uart_ports[UART_NR];
1144
1145 static int cpm_uart_init_port(struct device_node *np,
1146                               struct uart_cpm_port *pinfo)
1147 {
1148         const u32 *data;
1149         void __iomem *mem, *pram;
1150         int len;
1151         int ret;
1152         int i;
1153
1154         data = of_get_property(np, "clock", NULL);
1155         if (data) {
1156                 struct clk *clk = clk_get(NULL, (const char*)data);
1157                 if (!IS_ERR(clk))
1158                         pinfo->clk = clk;
1159         }
1160         if (!pinfo->clk) {
1161                 data = of_get_property(np, "fsl,cpm-brg", &len);
1162                 if (!data || len != 4) {
1163                         printk(KERN_ERR "CPM UART %s has no/invalid "
1164                                         "fsl,cpm-brg property.\n", np->name);
1165                         return -EINVAL;
1166                 }
1167                 pinfo->brg = *data;
1168         }
1169
1170         data = of_get_property(np, "fsl,cpm-command", &len);
1171         if (!data || len != 4) {
1172                 printk(KERN_ERR "CPM UART %s has no/invalid "
1173                                 "fsl,cpm-command property.\n", np->name);
1174                 return -EINVAL;
1175         }
1176         pinfo->command = *data;
1177
1178         mem = of_iomap(np, 0);
1179         if (!mem)
1180                 return -ENOMEM;
1181
1182         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1183             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1184                 pinfo->sccp = mem;
1185                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1186         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1187                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1188                 pinfo->flags |= FLAG_SMC;
1189                 pinfo->smcp = mem;
1190                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1191         } else {
1192                 ret = -ENODEV;
1193                 goto out_mem;
1194         }
1195
1196         if (!pram) {
1197                 ret = -ENOMEM;
1198                 goto out_mem;
1199         }
1200
1201         pinfo->tx_nrfifos = TX_NUM_FIFO;
1202         pinfo->tx_fifosize = TX_BUF_SIZE;
1203         pinfo->rx_nrfifos = RX_NUM_FIFO;
1204         pinfo->rx_fifosize = RX_BUF_SIZE;
1205
1206         pinfo->port.uartclk = ppc_proc_freq;
1207         pinfo->port.mapbase = (unsigned long)mem;
1208         pinfo->port.type = PORT_CPM;
1209         pinfo->port.ops = &cpm_uart_pops,
1210         pinfo->port.iotype = UPIO_MEM;
1211         pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1212         spin_lock_init(&pinfo->port.lock);
1213
1214         pinfo->port.irq = irq_of_parse_and_map(np, 0);
1215         if (pinfo->port.irq == NO_IRQ) {
1216                 ret = -EINVAL;
1217                 goto out_pram;
1218         }
1219
1220         for (i = 0; i < NUM_GPIOS; i++) {
1221                 int gpio;
1222
1223                 pinfo->gpios[i] = -1;
1224
1225                 gpio = of_get_gpio(np, i);
1226
1227                 if (gpio_is_valid(gpio)) {
1228                         ret = gpio_request(gpio, "cpm_uart");
1229                         if (ret) {
1230                                 pr_err("can't request gpio #%d: %d\n", i, ret);
1231                                 continue;
1232                         }
1233                         if (i == GPIO_RTS || i == GPIO_DTR)
1234                                 ret = gpio_direction_output(gpio, 0);
1235                         else
1236                                 ret = gpio_direction_input(gpio);
1237                         if (ret) {
1238                                 pr_err("can't set direction for gpio #%d: %d\n",
1239                                         i, ret);
1240                                 gpio_free(gpio);
1241                                 continue;
1242                         }
1243                         pinfo->gpios[i] = gpio;
1244                 }
1245         }
1246
1247 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1248         udbg_putc = NULL;
1249 #endif
1250
1251         return cpm_uart_request_port(&pinfo->port);
1252
1253 out_pram:
1254         cpm_uart_unmap_pram(pinfo, pram);
1255 out_mem:
1256         iounmap(mem);
1257         return ret;
1258 }
1259
1260 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1261 /*
1262  *      Print a string to the serial port trying not to disturb
1263  *      any possible real use of the port...
1264  *
1265  *      Note that this is called with interrupts already disabled
1266  */
1267 static void cpm_uart_console_write(struct console *co, const char *s,
1268                                    u_int count)
1269 {
1270         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1271         unsigned long flags;
1272         int nolock = oops_in_progress;
1273
1274         if (unlikely(nolock)) {
1275                 local_irq_save(flags);
1276         } else {
1277                 spin_lock_irqsave(&pinfo->port.lock, flags);
1278         }
1279
1280         cpm_uart_early_write(pinfo, s, count, true);
1281
1282         if (unlikely(nolock)) {
1283                 local_irq_restore(flags);
1284         } else {
1285                 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1286         }
1287 }
1288
1289
1290 static int __init cpm_uart_console_setup(struct console *co, char *options)
1291 {
1292         int baud = 38400;
1293         int bits = 8;
1294         int parity = 'n';
1295         int flow = 'n';
1296         int ret;
1297         struct uart_cpm_port *pinfo;
1298         struct uart_port *port;
1299
1300         struct device_node *np;
1301         int i = 0;
1302
1303         if (co->index >= UART_NR) {
1304                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1305                        co->index);
1306                 return -ENODEV;
1307         }
1308
1309         for_each_node_by_type(np, "serial") {
1310                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1311                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1312                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1313                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1314                         continue;
1315
1316                 if (i++ == co->index)
1317                         break;
1318         }
1319
1320         if (!np)
1321                 return -ENODEV;
1322
1323         pinfo = &cpm_uart_ports[co->index];
1324
1325         pinfo->flags |= FLAG_CONSOLE;
1326         port = &pinfo->port;
1327
1328         ret = cpm_uart_init_port(np, pinfo);
1329         of_node_put(np);
1330         if (ret)
1331                 return ret;
1332
1333         if (options) {
1334                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1335         } else {
1336                 if ((baud = uart_baudrate()) == -1)
1337                         baud = 9600;
1338         }
1339
1340         if (IS_SMC(pinfo)) {
1341                 out_be16(&pinfo->smcup->smc_brkcr, 0);
1342                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1343                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1344                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1345         } else {
1346                 out_be16(&pinfo->sccup->scc_brkcr, 0);
1347                 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1348                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1349                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1350         }
1351
1352         ret = cpm_uart_allocbuf(pinfo, 1);
1353
1354         if (ret)
1355                 return ret;
1356
1357         cpm_uart_initbd(pinfo);
1358
1359         if (IS_SMC(pinfo))
1360                 cpm_uart_init_smc(pinfo);
1361         else
1362                 cpm_uart_init_scc(pinfo);
1363
1364         uart_set_options(port, co, baud, parity, bits, flow);
1365         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1366
1367         return 0;
1368 }
1369
1370 static struct uart_driver cpm_reg;
1371 static struct console cpm_scc_uart_console = {
1372         .name           = "ttyCPM",
1373         .write          = cpm_uart_console_write,
1374         .device         = uart_console_device,
1375         .setup          = cpm_uart_console_setup,
1376         .flags          = CON_PRINTBUFFER,
1377         .index          = -1,
1378         .data           = &cpm_reg,
1379 };
1380
1381 static int __init cpm_uart_console_init(void)
1382 {
1383         register_console(&cpm_scc_uart_console);
1384         return 0;
1385 }
1386
1387 console_initcall(cpm_uart_console_init);
1388
1389 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1390 #else
1391 #define CPM_UART_CONSOLE        NULL
1392 #endif
1393
1394 static struct uart_driver cpm_reg = {
1395         .owner          = THIS_MODULE,
1396         .driver_name    = "ttyCPM",
1397         .dev_name       = "ttyCPM",
1398         .major          = SERIAL_CPM_MAJOR,
1399         .minor          = SERIAL_CPM_MINOR,
1400         .cons           = CPM_UART_CONSOLE,
1401         .nr             = UART_NR,
1402 };
1403
1404 static int probe_index;
1405
1406 static int cpm_uart_probe(struct platform_device *ofdev)
1407 {
1408         int index = probe_index++;
1409         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1410         int ret;
1411
1412         pinfo->port.line = index;
1413
1414         if (index >= UART_NR)
1415                 return -ENODEV;
1416
1417         platform_set_drvdata(ofdev, pinfo);
1418
1419         /* initialize the device pointer for the port */
1420         pinfo->port.dev = &ofdev->dev;
1421
1422         ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1423         if (ret)
1424                 return ret;
1425
1426         return uart_add_one_port(&cpm_reg, &pinfo->port);
1427 }
1428
1429 static int cpm_uart_remove(struct platform_device *ofdev)
1430 {
1431         struct uart_cpm_port *pinfo = platform_get_drvdata(ofdev);
1432         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1433 }
1434
1435 static const struct of_device_id cpm_uart_match[] = {
1436         {
1437                 .compatible = "fsl,cpm1-smc-uart",
1438         },
1439         {
1440                 .compatible = "fsl,cpm1-scc-uart",
1441         },
1442         {
1443                 .compatible = "fsl,cpm2-smc-uart",
1444         },
1445         {
1446                 .compatible = "fsl,cpm2-scc-uart",
1447         },
1448         {}
1449 };
1450 MODULE_DEVICE_TABLE(of, cpm_uart_match);
1451
1452 static struct platform_driver cpm_uart_driver = {
1453         .driver = {
1454                 .name = "cpm_uart",
1455                 .of_match_table = cpm_uart_match,
1456         },
1457         .probe = cpm_uart_probe,
1458         .remove = cpm_uart_remove,
1459  };
1460
1461 static int __init cpm_uart_init(void)
1462 {
1463         int ret = uart_register_driver(&cpm_reg);
1464         if (ret)
1465                 return ret;
1466
1467         ret = platform_driver_register(&cpm_uart_driver);
1468         if (ret)
1469                 uart_unregister_driver(&cpm_reg);
1470
1471         return ret;
1472 }
1473
1474 static void __exit cpm_uart_exit(void)
1475 {
1476         platform_driver_unregister(&cpm_uart_driver);
1477         uart_unregister_driver(&cpm_reg);
1478 }
1479
1480 module_init(cpm_uart_init);
1481 module_exit(cpm_uart_exit);
1482
1483 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1484 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1485 MODULE_LICENSE("GPL");
1486 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);