1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for AMBA serial ports
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Copyright 1999 ARM Limited
8 * Copyright (C) 2000 Deep Blue Solutions Ltd.
10 * This is a generic driver for ARM AMBA-type serial ports. They
11 * have a lot of 16550-like features, but are not register compatible.
12 * Note that although they do have CTS, DCD and DSR inputs, they do
13 * not have an RI input, nor do they have DTR or RTS outputs. If
14 * required, these have to be supplied via some other means (eg, GPIO)
15 * and hooked into this driver.
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/sysrq.h>
23 #include <linux/device.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/serial_core.h>
27 #include <linux/serial.h>
28 #include <linux/amba/bus.h>
29 #include <linux/amba/serial.h>
30 #include <linux/clk.h>
31 #include <linux/slab.h>
36 #define SERIAL_AMBA_MAJOR 204
37 #define SERIAL_AMBA_MINOR 16
38 #define SERIAL_AMBA_NR UART_NR
40 #define AMBA_ISR_PASS_LIMIT 256
42 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
43 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
45 #define UART_DUMMY_RSR_RX 256
46 #define UART_PORT_SIZE 64
49 * We wrap our port structure around the generic uart_port.
51 struct uart_amba_port {
52 struct uart_port port;
54 struct amba_device *dev;
55 struct amba_pl010_data *data;
56 unsigned int old_status;
59 static void pl010_stop_tx(struct uart_port *port)
61 struct uart_amba_port *uap =
62 container_of(port, struct uart_amba_port, port);
65 cr = readb(uap->port.membase + UART010_CR);
66 cr &= ~UART010_CR_TIE;
67 writel(cr, uap->port.membase + UART010_CR);
70 static void pl010_start_tx(struct uart_port *port)
72 struct uart_amba_port *uap =
73 container_of(port, struct uart_amba_port, port);
76 cr = readb(uap->port.membase + UART010_CR);
78 writel(cr, uap->port.membase + UART010_CR);
81 static void pl010_stop_rx(struct uart_port *port)
83 struct uart_amba_port *uap =
84 container_of(port, struct uart_amba_port, port);
87 cr = readb(uap->port.membase + UART010_CR);
88 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
89 writel(cr, uap->port.membase + UART010_CR);
92 static void pl010_disable_ms(struct uart_port *port)
94 struct uart_amba_port *uap = (struct uart_amba_port *)port;
97 cr = readb(uap->port.membase + UART010_CR);
98 cr &= ~UART010_CR_MSIE;
99 writel(cr, uap->port.membase + UART010_CR);
102 static void pl010_enable_ms(struct uart_port *port)
104 struct uart_amba_port *uap =
105 container_of(port, struct uart_amba_port, port);
108 cr = readb(uap->port.membase + UART010_CR);
109 cr |= UART010_CR_MSIE;
110 writel(cr, uap->port.membase + UART010_CR);
113 static void pl010_rx_chars(struct uart_amba_port *uap)
115 unsigned int status, ch, flag, rsr, max_count = 256;
117 status = readb(uap->port.membase + UART01x_FR);
118 while (UART_RX_DATA(status) && max_count--) {
119 ch = readb(uap->port.membase + UART01x_DR);
122 uap->port.icount.rx++;
125 * Note that the error handling code is
126 * out of the main execution path
128 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
129 if (unlikely(rsr & UART01x_RSR_ANY)) {
130 writel(0, uap->port.membase + UART01x_ECR);
132 if (rsr & UART01x_RSR_BE) {
133 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
134 uap->port.icount.brk++;
135 if (uart_handle_break(&uap->port))
137 } else if (rsr & UART01x_RSR_PE)
138 uap->port.icount.parity++;
139 else if (rsr & UART01x_RSR_FE)
140 uap->port.icount.frame++;
141 if (rsr & UART01x_RSR_OE)
142 uap->port.icount.overrun++;
144 rsr &= uap->port.read_status_mask;
146 if (rsr & UART01x_RSR_BE)
148 else if (rsr & UART01x_RSR_PE)
150 else if (rsr & UART01x_RSR_FE)
154 if (uart_handle_sysrq_char(&uap->port, ch))
157 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
160 status = readb(uap->port.membase + UART01x_FR);
162 spin_unlock(&uap->port.lock);
163 tty_flip_buffer_push(&uap->port.state->port);
164 spin_lock(&uap->port.lock);
167 static void pl010_tx_chars(struct uart_amba_port *uap)
169 struct circ_buf *xmit = &uap->port.state->xmit;
172 if (uap->port.x_char) {
173 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
174 uap->port.icount.tx++;
175 uap->port.x_char = 0;
178 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
179 pl010_stop_tx(&uap->port);
183 count = uap->port.fifosize >> 1;
185 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
186 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
187 uap->port.icount.tx++;
188 if (uart_circ_empty(xmit))
190 } while (--count > 0);
192 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
193 uart_write_wakeup(&uap->port);
195 if (uart_circ_empty(xmit))
196 pl010_stop_tx(&uap->port);
199 static void pl010_modem_status(struct uart_amba_port *uap)
201 unsigned int status, delta;
203 writel(0, uap->port.membase + UART010_ICR);
205 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
207 delta = status ^ uap->old_status;
208 uap->old_status = status;
213 if (delta & UART01x_FR_DCD)
214 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
216 if (delta & UART01x_FR_DSR)
217 uap->port.icount.dsr++;
219 if (delta & UART01x_FR_CTS)
220 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
222 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
225 static irqreturn_t pl010_int(int irq, void *dev_id)
227 struct uart_amba_port *uap = dev_id;
228 unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
231 spin_lock(&uap->port.lock);
233 status = readb(uap->port.membase + UART010_IIR);
236 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
238 if (status & UART010_IIR_MIS)
239 pl010_modem_status(uap);
240 if (status & UART010_IIR_TIS)
243 if (pass_counter-- == 0)
246 status = readb(uap->port.membase + UART010_IIR);
247 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
252 spin_unlock(&uap->port.lock);
254 return IRQ_RETVAL(handled);
257 static unsigned int pl010_tx_empty(struct uart_port *port)
259 struct uart_amba_port *uap =
260 container_of(port, struct uart_amba_port, port);
261 unsigned int status = readb(uap->port.membase + UART01x_FR);
262 return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
265 static unsigned int pl010_get_mctrl(struct uart_port *port)
267 struct uart_amba_port *uap =
268 container_of(port, struct uart_amba_port, port);
269 unsigned int result = 0;
272 status = readb(uap->port.membase + UART01x_FR);
273 if (status & UART01x_FR_DCD)
275 if (status & UART01x_FR_DSR)
277 if (status & UART01x_FR_CTS)
283 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
285 struct uart_amba_port *uap =
286 container_of(port, struct uart_amba_port, port);
289 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
292 static void pl010_break_ctl(struct uart_port *port, int break_state)
294 struct uart_amba_port *uap =
295 container_of(port, struct uart_amba_port, port);
299 spin_lock_irqsave(&uap->port.lock, flags);
300 lcr_h = readb(uap->port.membase + UART010_LCRH);
301 if (break_state == -1)
302 lcr_h |= UART01x_LCRH_BRK;
304 lcr_h &= ~UART01x_LCRH_BRK;
305 writel(lcr_h, uap->port.membase + UART010_LCRH);
306 spin_unlock_irqrestore(&uap->port.lock, flags);
309 static int pl010_startup(struct uart_port *port)
311 struct uart_amba_port *uap =
312 container_of(port, struct uart_amba_port, port);
316 * Try to enable the clock producer.
318 retval = clk_prepare_enable(uap->clk);
322 uap->port.uartclk = clk_get_rate(uap->clk);
327 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
332 * initialise the old status of the modem signals
334 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
337 * Finally, enable interrupts
339 writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
340 uap->port.membase + UART010_CR);
345 clk_disable_unprepare(uap->clk);
350 static void pl010_shutdown(struct uart_port *port)
352 struct uart_amba_port *uap =
353 container_of(port, struct uart_amba_port, port);
358 free_irq(uap->port.irq, uap);
361 * disable all interrupts, disable the port
363 writel(0, uap->port.membase + UART010_CR);
365 /* disable break condition and fifos */
366 writel(readb(uap->port.membase + UART010_LCRH) &
367 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
368 uap->port.membase + UART010_LCRH);
371 * Shut down the clock producer
373 clk_disable_unprepare(uap->clk);
377 pl010_set_termios(struct uart_port *port, struct ktermios *termios,
378 struct ktermios *old)
380 struct uart_amba_port *uap =
381 container_of(port, struct uart_amba_port, port);
382 unsigned int lcr_h, old_cr;
384 unsigned int baud, quot;
387 * Ask the core to calculate the divisor for us.
389 baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
390 quot = uart_get_divisor(port, baud);
392 switch (termios->c_cflag & CSIZE) {
394 lcr_h = UART01x_LCRH_WLEN_5;
397 lcr_h = UART01x_LCRH_WLEN_6;
400 lcr_h = UART01x_LCRH_WLEN_7;
403 lcr_h = UART01x_LCRH_WLEN_8;
406 if (termios->c_cflag & CSTOPB)
407 lcr_h |= UART01x_LCRH_STP2;
408 if (termios->c_cflag & PARENB) {
409 lcr_h |= UART01x_LCRH_PEN;
410 if (!(termios->c_cflag & PARODD))
411 lcr_h |= UART01x_LCRH_EPS;
413 if (uap->port.fifosize > 1)
414 lcr_h |= UART01x_LCRH_FEN;
416 spin_lock_irqsave(&uap->port.lock, flags);
419 * Update the per-port timeout.
421 uart_update_timeout(port, termios->c_cflag, baud);
423 uap->port.read_status_mask = UART01x_RSR_OE;
424 if (termios->c_iflag & INPCK)
425 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
426 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
427 uap->port.read_status_mask |= UART01x_RSR_BE;
430 * Characters to ignore
432 uap->port.ignore_status_mask = 0;
433 if (termios->c_iflag & IGNPAR)
434 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
435 if (termios->c_iflag & IGNBRK) {
436 uap->port.ignore_status_mask |= UART01x_RSR_BE;
438 * If we're ignoring parity and break indicators,
439 * ignore overruns too (for real raw support).
441 if (termios->c_iflag & IGNPAR)
442 uap->port.ignore_status_mask |= UART01x_RSR_OE;
446 * Ignore all characters if CREAD is not set.
448 if ((termios->c_cflag & CREAD) == 0)
449 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
451 old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
453 if (UART_ENABLE_MS(port, termios->c_cflag))
454 old_cr |= UART010_CR_MSIE;
458 writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
459 writel(quot & 0xff, uap->port.membase + UART010_LCRL);
462 * ----------v----------v----------v----------v-----
463 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
464 * ----------^----------^----------^----------^-----
466 writel(lcr_h, uap->port.membase + UART010_LCRH);
467 writel(old_cr, uap->port.membase + UART010_CR);
469 spin_unlock_irqrestore(&uap->port.lock, flags);
472 static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios)
474 if (termios->c_line == N_PPS) {
475 port->flags |= UPF_HARDPPS_CD;
476 spin_lock_irq(&port->lock);
477 pl010_enable_ms(port);
478 spin_unlock_irq(&port->lock);
480 port->flags &= ~UPF_HARDPPS_CD;
481 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
482 spin_lock_irq(&port->lock);
483 pl010_disable_ms(port);
484 spin_unlock_irq(&port->lock);
489 static const char *pl010_type(struct uart_port *port)
491 return port->type == PORT_AMBA ? "AMBA" : NULL;
495 * Release the memory region(s) being used by 'port'
497 static void pl010_release_port(struct uart_port *port)
499 release_mem_region(port->mapbase, UART_PORT_SIZE);
503 * Request the memory region(s) being used by 'port'
505 static int pl010_request_port(struct uart_port *port)
507 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
508 != NULL ? 0 : -EBUSY;
512 * Configure/autoconfigure the port.
514 static void pl010_config_port(struct uart_port *port, int flags)
516 if (flags & UART_CONFIG_TYPE) {
517 port->type = PORT_AMBA;
518 pl010_request_port(port);
523 * verify the new serial_struct (for TIOCSSERIAL).
525 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
528 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
530 if (ser->irq < 0 || ser->irq >= nr_irqs)
532 if (ser->baud_base < 9600)
537 static const struct uart_ops amba_pl010_pops = {
538 .tx_empty = pl010_tx_empty,
539 .set_mctrl = pl010_set_mctrl,
540 .get_mctrl = pl010_get_mctrl,
541 .stop_tx = pl010_stop_tx,
542 .start_tx = pl010_start_tx,
543 .stop_rx = pl010_stop_rx,
544 .enable_ms = pl010_enable_ms,
545 .break_ctl = pl010_break_ctl,
546 .startup = pl010_startup,
547 .shutdown = pl010_shutdown,
548 .set_termios = pl010_set_termios,
549 .set_ldisc = pl010_set_ldisc,
551 .release_port = pl010_release_port,
552 .request_port = pl010_request_port,
553 .config_port = pl010_config_port,
554 .verify_port = pl010_verify_port,
557 static struct uart_amba_port *amba_ports[UART_NR];
559 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
561 static void pl010_console_putchar(struct uart_port *port, int ch)
563 struct uart_amba_port *uap =
564 container_of(port, struct uart_amba_port, port);
568 status = readb(uap->port.membase + UART01x_FR);
570 } while (!UART_TX_READY(status));
571 writel(ch, uap->port.membase + UART01x_DR);
575 pl010_console_write(struct console *co, const char *s, unsigned int count)
577 struct uart_amba_port *uap = amba_ports[co->index];
578 unsigned int status, old_cr;
580 clk_enable(uap->clk);
583 * First save the CR then disable the interrupts
585 old_cr = readb(uap->port.membase + UART010_CR);
586 writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
588 uart_console_write(&uap->port, s, count, pl010_console_putchar);
591 * Finally, wait for transmitter to become empty
592 * and restore the TCR
595 status = readb(uap->port.membase + UART01x_FR);
597 } while (status & UART01x_FR_BUSY);
598 writel(old_cr, uap->port.membase + UART010_CR);
600 clk_disable(uap->clk);
604 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
605 int *parity, int *bits)
607 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
608 unsigned int lcr_h, quot;
609 lcr_h = readb(uap->port.membase + UART010_LCRH);
612 if (lcr_h & UART01x_LCRH_PEN) {
613 if (lcr_h & UART01x_LCRH_EPS)
619 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
624 quot = readb(uap->port.membase + UART010_LCRL) |
625 readb(uap->port.membase + UART010_LCRM) << 8;
626 *baud = uap->port.uartclk / (16 * (quot + 1));
630 static int __init pl010_console_setup(struct console *co, char *options)
632 struct uart_amba_port *uap;
640 * Check whether an invalid uart number has been specified, and
641 * if so, search for the first available port that does have
644 if (co->index >= UART_NR)
646 uap = amba_ports[co->index];
650 ret = clk_prepare(uap->clk);
654 uap->port.uartclk = clk_get_rate(uap->clk);
657 uart_parse_options(options, &baud, &parity, &bits, &flow);
659 pl010_console_get_options(uap, &baud, &parity, &bits);
661 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
664 static struct uart_driver amba_reg;
665 static struct console amba_console = {
667 .write = pl010_console_write,
668 .device = uart_console_device,
669 .setup = pl010_console_setup,
670 .flags = CON_PRINTBUFFER,
675 #define AMBA_CONSOLE &amba_console
677 #define AMBA_CONSOLE NULL
680 static DEFINE_MUTEX(amba_reg_lock);
681 static struct uart_driver amba_reg = {
682 .owner = THIS_MODULE,
683 .driver_name = "ttyAM",
685 .major = SERIAL_AMBA_MAJOR,
686 .minor = SERIAL_AMBA_MINOR,
688 .cons = AMBA_CONSOLE,
691 static int pl010_probe(struct amba_device *dev, const struct amba_id *id)
693 struct uart_amba_port *uap;
697 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
698 if (amba_ports[i] == NULL)
701 if (i == ARRAY_SIZE(amba_ports))
704 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port),
709 base = devm_ioremap(&dev->dev, dev->res.start,
710 resource_size(&dev->res));
714 uap->clk = devm_clk_get(&dev->dev, NULL);
715 if (IS_ERR(uap->clk))
716 return PTR_ERR(uap->clk);
718 uap->port.dev = &dev->dev;
719 uap->port.mapbase = dev->res.start;
720 uap->port.membase = base;
721 uap->port.iotype = UPIO_MEM;
722 uap->port.irq = dev->irq[0];
723 uap->port.fifosize = 16;
724 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL010_CONSOLE);
725 uap->port.ops = &amba_pl010_pops;
726 uap->port.flags = UPF_BOOT_AUTOCONF;
729 uap->data = dev_get_platdata(&dev->dev);
733 amba_set_drvdata(dev, uap);
735 mutex_lock(&amba_reg_lock);
736 if (!amba_reg.state) {
737 ret = uart_register_driver(&amba_reg);
739 mutex_unlock(&amba_reg_lock);
740 dev_err(uap->port.dev,
741 "Failed to register AMBA-PL010 driver\n");
745 mutex_unlock(&amba_reg_lock);
747 ret = uart_add_one_port(&amba_reg, &uap->port);
749 amba_ports[i] = NULL;
754 static void pl010_remove(struct amba_device *dev)
756 struct uart_amba_port *uap = amba_get_drvdata(dev);
760 uart_remove_one_port(&amba_reg, &uap->port);
762 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
763 if (amba_ports[i] == uap)
764 amba_ports[i] = NULL;
765 else if (amba_ports[i])
769 uart_unregister_driver(&amba_reg);
772 #ifdef CONFIG_PM_SLEEP
773 static int pl010_suspend(struct device *dev)
775 struct uart_amba_port *uap = dev_get_drvdata(dev);
778 uart_suspend_port(&amba_reg, &uap->port);
783 static int pl010_resume(struct device *dev)
785 struct uart_amba_port *uap = dev_get_drvdata(dev);
788 uart_resume_port(&amba_reg, &uap->port);
794 static SIMPLE_DEV_PM_OPS(pl010_dev_pm_ops, pl010_suspend, pl010_resume);
796 static const struct amba_id pl010_ids[] = {
804 MODULE_DEVICE_TABLE(amba, pl010_ids);
806 static struct amba_driver pl010_driver = {
808 .name = "uart-pl010",
809 .pm = &pl010_dev_pm_ops,
811 .id_table = pl010_ids,
812 .probe = pl010_probe,
813 .remove = pl010_remove,
816 static int __init pl010_init(void)
818 printk(KERN_INFO "Serial: AMBA driver\n");
820 return amba_driver_register(&pl010_driver);
823 static void __exit pl010_exit(void)
825 amba_driver_unregister(&pl010_driver);
828 module_init(pl010_init);
829 module_exit(pl010_exit);
831 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
832 MODULE_DESCRIPTION("ARM AMBA serial port driver");
833 MODULE_LICENSE("GPL");