1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for AMBA serial ports
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Copyright 1999 ARM Limited
8 * Copyright (C) 2000 Deep Blue Solutions Ltd.
10 * This is a generic driver for ARM AMBA-type serial ports. They
11 * have a lot of 16550-like features, but are not register compatible.
12 * Note that although they do have CTS, DCD and DSR inputs, they do
13 * not have an RI input, nor do they have DTR or RTS outputs. If
14 * required, these have to be supplied via some other means (eg, GPIO)
15 * and hooked into this driver.
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/console.h>
22 #include <linux/sysrq.h>
23 #include <linux/device.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/serial_core.h>
27 #include <linux/serial.h>
28 #include <linux/amba/bus.h>
29 #include <linux/amba/serial.h>
30 #include <linux/clk.h>
31 #include <linux/slab.h>
36 #define SERIAL_AMBA_MAJOR 204
37 #define SERIAL_AMBA_MINOR 16
38 #define SERIAL_AMBA_NR UART_NR
40 #define AMBA_ISR_PASS_LIMIT 256
42 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
43 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
45 #define UART_DUMMY_RSR_RX 256
46 #define UART_PORT_SIZE 64
49 * We wrap our port structure around the generic uart_port.
51 struct uart_amba_port {
52 struct uart_port port;
54 struct amba_device *dev;
55 struct amba_pl010_data *data;
56 unsigned int old_status;
59 static void pl010_stop_tx(struct uart_port *port)
61 struct uart_amba_port *uap =
62 container_of(port, struct uart_amba_port, port);
65 cr = readb(uap->port.membase + UART010_CR);
66 cr &= ~UART010_CR_TIE;
67 writel(cr, uap->port.membase + UART010_CR);
70 static void pl010_start_tx(struct uart_port *port)
72 struct uart_amba_port *uap =
73 container_of(port, struct uart_amba_port, port);
76 cr = readb(uap->port.membase + UART010_CR);
78 writel(cr, uap->port.membase + UART010_CR);
81 static void pl010_stop_rx(struct uart_port *port)
83 struct uart_amba_port *uap =
84 container_of(port, struct uart_amba_port, port);
87 cr = readb(uap->port.membase + UART010_CR);
88 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
89 writel(cr, uap->port.membase + UART010_CR);
92 static void pl010_disable_ms(struct uart_port *port)
94 struct uart_amba_port *uap = (struct uart_amba_port *)port;
97 cr = readb(uap->port.membase + UART010_CR);
98 cr &= ~UART010_CR_MSIE;
99 writel(cr, uap->port.membase + UART010_CR);
102 static void pl010_enable_ms(struct uart_port *port)
104 struct uart_amba_port *uap =
105 container_of(port, struct uart_amba_port, port);
108 cr = readb(uap->port.membase + UART010_CR);
109 cr |= UART010_CR_MSIE;
110 writel(cr, uap->port.membase + UART010_CR);
113 static void pl010_rx_chars(struct uart_port *port)
115 unsigned int status, ch, flag, rsr, max_count = 256;
117 status = readb(port->membase + UART01x_FR);
118 while (UART_RX_DATA(status) && max_count--) {
119 ch = readb(port->membase + UART01x_DR);
125 * Note that the error handling code is
126 * out of the main execution path
128 rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
129 if (unlikely(rsr & UART01x_RSR_ANY)) {
130 writel(0, port->membase + UART01x_ECR);
132 if (rsr & UART01x_RSR_BE) {
133 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
135 if (uart_handle_break(port))
137 } else if (rsr & UART01x_RSR_PE)
138 port->icount.parity++;
139 else if (rsr & UART01x_RSR_FE)
140 port->icount.frame++;
141 if (rsr & UART01x_RSR_OE)
142 port->icount.overrun++;
144 rsr &= port->read_status_mask;
146 if (rsr & UART01x_RSR_BE)
148 else if (rsr & UART01x_RSR_PE)
150 else if (rsr & UART01x_RSR_FE)
154 if (uart_handle_sysrq_char(port, ch))
157 uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
160 status = readb(port->membase + UART01x_FR);
162 tty_flip_buffer_push(&port->state->port);
165 static void pl010_tx_chars(struct uart_port *port)
167 struct circ_buf *xmit = &port->state->xmit;
171 writel(port->x_char, port->membase + UART01x_DR);
176 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
181 count = port->fifosize >> 1;
183 writel(xmit->buf[xmit->tail], port->membase + UART01x_DR);
184 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
186 if (uart_circ_empty(xmit))
188 } while (--count > 0);
190 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
191 uart_write_wakeup(port);
193 if (uart_circ_empty(xmit))
197 static void pl010_modem_status(struct uart_amba_port *uap)
199 struct uart_port *port = &uap->port;
200 unsigned int status, delta;
202 writel(0, port->membase + UART010_ICR);
204 status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
206 delta = status ^ uap->old_status;
207 uap->old_status = status;
212 if (delta & UART01x_FR_DCD)
213 uart_handle_dcd_change(port, status & UART01x_FR_DCD);
215 if (delta & UART01x_FR_DSR)
218 if (delta & UART01x_FR_CTS)
219 uart_handle_cts_change(port, status & UART01x_FR_CTS);
221 wake_up_interruptible(&port->state->port.delta_msr_wait);
224 static irqreturn_t pl010_int(int irq, void *dev_id)
226 struct uart_amba_port *uap = dev_id;
227 struct uart_port *port = &uap->port;
228 unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
231 spin_lock(&port->lock);
233 status = readb(port->membase + UART010_IIR);
236 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
237 pl010_rx_chars(port);
238 if (status & UART010_IIR_MIS)
239 pl010_modem_status(uap);
240 if (status & UART010_IIR_TIS)
241 pl010_tx_chars(port);
243 if (pass_counter-- == 0)
246 status = readb(port->membase + UART010_IIR);
247 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
252 spin_unlock(&port->lock);
254 return IRQ_RETVAL(handled);
257 static unsigned int pl010_tx_empty(struct uart_port *port)
259 unsigned int status = readb(port->membase + UART01x_FR);
261 return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
264 static unsigned int pl010_get_mctrl(struct uart_port *port)
266 unsigned int result = 0;
269 status = readb(port->membase + UART01x_FR);
270 if (status & UART01x_FR_DCD)
272 if (status & UART01x_FR_DSR)
274 if (status & UART01x_FR_CTS)
280 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
282 struct uart_amba_port *uap =
283 container_of(port, struct uart_amba_port, port);
286 uap->data->set_mctrl(uap->dev, port->membase, mctrl);
289 static void pl010_break_ctl(struct uart_port *port, int break_state)
294 spin_lock_irqsave(&port->lock, flags);
295 lcr_h = readb(port->membase + UART010_LCRH);
296 if (break_state == -1)
297 lcr_h |= UART01x_LCRH_BRK;
299 lcr_h &= ~UART01x_LCRH_BRK;
300 writel(lcr_h, port->membase + UART010_LCRH);
301 spin_unlock_irqrestore(&port->lock, flags);
304 static int pl010_startup(struct uart_port *port)
306 struct uart_amba_port *uap =
307 container_of(port, struct uart_amba_port, port);
311 * Try to enable the clock producer.
313 retval = clk_prepare_enable(uap->clk);
317 port->uartclk = clk_get_rate(uap->clk);
322 retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", uap);
327 * initialise the old status of the modem signals
329 uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
332 * Finally, enable interrupts
334 writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
335 port->membase + UART010_CR);
340 clk_disable_unprepare(uap->clk);
345 static void pl010_shutdown(struct uart_port *port)
347 struct uart_amba_port *uap =
348 container_of(port, struct uart_amba_port, port);
353 free_irq(port->irq, uap);
356 * disable all interrupts, disable the port
358 writel(0, port->membase + UART010_CR);
360 /* disable break condition and fifos */
361 writel(readb(port->membase + UART010_LCRH) &
362 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
363 port->membase + UART010_LCRH);
366 * Shut down the clock producer
368 clk_disable_unprepare(uap->clk);
372 pl010_set_termios(struct uart_port *port, struct ktermios *termios,
373 struct ktermios *old)
375 unsigned int lcr_h, old_cr;
377 unsigned int baud, quot;
380 * Ask the core to calculate the divisor for us.
382 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
383 quot = uart_get_divisor(port, baud);
385 switch (termios->c_cflag & CSIZE) {
387 lcr_h = UART01x_LCRH_WLEN_5;
390 lcr_h = UART01x_LCRH_WLEN_6;
393 lcr_h = UART01x_LCRH_WLEN_7;
396 lcr_h = UART01x_LCRH_WLEN_8;
399 if (termios->c_cflag & CSTOPB)
400 lcr_h |= UART01x_LCRH_STP2;
401 if (termios->c_cflag & PARENB) {
402 lcr_h |= UART01x_LCRH_PEN;
403 if (!(termios->c_cflag & PARODD))
404 lcr_h |= UART01x_LCRH_EPS;
406 if (port->fifosize > 1)
407 lcr_h |= UART01x_LCRH_FEN;
409 spin_lock_irqsave(&port->lock, flags);
412 * Update the per-port timeout.
414 uart_update_timeout(port, termios->c_cflag, baud);
416 port->read_status_mask = UART01x_RSR_OE;
417 if (termios->c_iflag & INPCK)
418 port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
419 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
420 port->read_status_mask |= UART01x_RSR_BE;
423 * Characters to ignore
425 port->ignore_status_mask = 0;
426 if (termios->c_iflag & IGNPAR)
427 port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
428 if (termios->c_iflag & IGNBRK) {
429 port->ignore_status_mask |= UART01x_RSR_BE;
431 * If we're ignoring parity and break indicators,
432 * ignore overruns too (for real raw support).
434 if (termios->c_iflag & IGNPAR)
435 port->ignore_status_mask |= UART01x_RSR_OE;
439 * Ignore all characters if CREAD is not set.
441 if ((termios->c_cflag & CREAD) == 0)
442 port->ignore_status_mask |= UART_DUMMY_RSR_RX;
444 old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE;
446 if (UART_ENABLE_MS(port, termios->c_cflag))
447 old_cr |= UART010_CR_MSIE;
451 writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM);
452 writel(quot & 0xff, port->membase + UART010_LCRL);
455 * ----------v----------v----------v----------v-----
456 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
457 * ----------^----------^----------^----------^-----
459 writel(lcr_h, port->membase + UART010_LCRH);
460 writel(old_cr, port->membase + UART010_CR);
462 spin_unlock_irqrestore(&port->lock, flags);
465 static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios)
467 if (termios->c_line == N_PPS) {
468 port->flags |= UPF_HARDPPS_CD;
469 spin_lock_irq(&port->lock);
470 pl010_enable_ms(port);
471 spin_unlock_irq(&port->lock);
473 port->flags &= ~UPF_HARDPPS_CD;
474 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
475 spin_lock_irq(&port->lock);
476 pl010_disable_ms(port);
477 spin_unlock_irq(&port->lock);
482 static const char *pl010_type(struct uart_port *port)
484 return port->type == PORT_AMBA ? "AMBA" : NULL;
488 * Release the memory region(s) being used by 'port'
490 static void pl010_release_port(struct uart_port *port)
492 release_mem_region(port->mapbase, UART_PORT_SIZE);
496 * Request the memory region(s) being used by 'port'
498 static int pl010_request_port(struct uart_port *port)
500 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
501 != NULL ? 0 : -EBUSY;
505 * Configure/autoconfigure the port.
507 static void pl010_config_port(struct uart_port *port, int flags)
509 if (flags & UART_CONFIG_TYPE) {
510 port->type = PORT_AMBA;
511 pl010_request_port(port);
516 * verify the new serial_struct (for TIOCSSERIAL).
518 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
521 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
523 if (ser->irq < 0 || ser->irq >= nr_irqs)
525 if (ser->baud_base < 9600)
530 static const struct uart_ops amba_pl010_pops = {
531 .tx_empty = pl010_tx_empty,
532 .set_mctrl = pl010_set_mctrl,
533 .get_mctrl = pl010_get_mctrl,
534 .stop_tx = pl010_stop_tx,
535 .start_tx = pl010_start_tx,
536 .stop_rx = pl010_stop_rx,
537 .enable_ms = pl010_enable_ms,
538 .break_ctl = pl010_break_ctl,
539 .startup = pl010_startup,
540 .shutdown = pl010_shutdown,
541 .set_termios = pl010_set_termios,
542 .set_ldisc = pl010_set_ldisc,
544 .release_port = pl010_release_port,
545 .request_port = pl010_request_port,
546 .config_port = pl010_config_port,
547 .verify_port = pl010_verify_port,
550 static struct uart_amba_port *amba_ports[UART_NR];
552 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
554 static void pl010_console_putchar(struct uart_port *port, unsigned char ch)
559 status = readb(port->membase + UART01x_FR);
561 } while (!UART_TX_READY(status));
562 writel(ch, port->membase + UART01x_DR);
566 pl010_console_write(struct console *co, const char *s, unsigned int count)
568 struct uart_amba_port *uap = amba_ports[co->index];
569 struct uart_port *port = &uap->port;
570 unsigned int status, old_cr;
572 clk_enable(uap->clk);
575 * First save the CR then disable the interrupts
577 old_cr = readb(port->membase + UART010_CR);
578 writel(UART01x_CR_UARTEN, port->membase + UART010_CR);
580 uart_console_write(port, s, count, pl010_console_putchar);
583 * Finally, wait for transmitter to become empty
584 * and restore the TCR
587 status = readb(port->membase + UART01x_FR);
589 } while (status & UART01x_FR_BUSY);
590 writel(old_cr, port->membase + UART010_CR);
592 clk_disable(uap->clk);
596 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
597 int *parity, int *bits)
599 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
600 unsigned int lcr_h, quot;
601 lcr_h = readb(uap->port.membase + UART010_LCRH);
604 if (lcr_h & UART01x_LCRH_PEN) {
605 if (lcr_h & UART01x_LCRH_EPS)
611 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
616 quot = readb(uap->port.membase + UART010_LCRL) |
617 readb(uap->port.membase + UART010_LCRM) << 8;
618 *baud = uap->port.uartclk / (16 * (quot + 1));
622 static int __init pl010_console_setup(struct console *co, char *options)
624 struct uart_amba_port *uap;
632 * Check whether an invalid uart number has been specified, and
633 * if so, search for the first available port that does have
636 if (co->index >= UART_NR)
638 uap = amba_ports[co->index];
642 ret = clk_prepare(uap->clk);
646 uap->port.uartclk = clk_get_rate(uap->clk);
649 uart_parse_options(options, &baud, &parity, &bits, &flow);
651 pl010_console_get_options(uap, &baud, &parity, &bits);
653 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
656 static struct uart_driver amba_reg;
657 static struct console amba_console = {
659 .write = pl010_console_write,
660 .device = uart_console_device,
661 .setup = pl010_console_setup,
662 .flags = CON_PRINTBUFFER,
667 #define AMBA_CONSOLE &amba_console
669 #define AMBA_CONSOLE NULL
672 static DEFINE_MUTEX(amba_reg_lock);
673 static struct uart_driver amba_reg = {
674 .owner = THIS_MODULE,
675 .driver_name = "ttyAM",
677 .major = SERIAL_AMBA_MAJOR,
678 .minor = SERIAL_AMBA_MINOR,
680 .cons = AMBA_CONSOLE,
683 static int pl010_probe(struct amba_device *dev, const struct amba_id *id)
685 struct uart_amba_port *uap;
689 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
690 if (amba_ports[i] == NULL)
693 if (i == ARRAY_SIZE(amba_ports))
696 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port),
701 base = devm_ioremap(&dev->dev, dev->res.start,
702 resource_size(&dev->res));
706 uap->clk = devm_clk_get(&dev->dev, NULL);
707 if (IS_ERR(uap->clk))
708 return PTR_ERR(uap->clk);
710 uap->port.dev = &dev->dev;
711 uap->port.mapbase = dev->res.start;
712 uap->port.membase = base;
713 uap->port.iotype = UPIO_MEM;
714 uap->port.irq = dev->irq[0];
715 uap->port.fifosize = 16;
716 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL010_CONSOLE);
717 uap->port.ops = &amba_pl010_pops;
718 uap->port.flags = UPF_BOOT_AUTOCONF;
721 uap->data = dev_get_platdata(&dev->dev);
725 amba_set_drvdata(dev, uap);
727 mutex_lock(&amba_reg_lock);
728 if (!amba_reg.state) {
729 ret = uart_register_driver(&amba_reg);
731 mutex_unlock(&amba_reg_lock);
732 dev_err(uap->port.dev,
733 "Failed to register AMBA-PL010 driver\n");
737 mutex_unlock(&amba_reg_lock);
739 ret = uart_add_one_port(&amba_reg, &uap->port);
741 amba_ports[i] = NULL;
746 static void pl010_remove(struct amba_device *dev)
748 struct uart_amba_port *uap = amba_get_drvdata(dev);
752 uart_remove_one_port(&amba_reg, &uap->port);
754 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
755 if (amba_ports[i] == uap)
756 amba_ports[i] = NULL;
757 else if (amba_ports[i])
761 uart_unregister_driver(&amba_reg);
764 #ifdef CONFIG_PM_SLEEP
765 static int pl010_suspend(struct device *dev)
767 struct uart_amba_port *uap = dev_get_drvdata(dev);
770 uart_suspend_port(&amba_reg, &uap->port);
775 static int pl010_resume(struct device *dev)
777 struct uart_amba_port *uap = dev_get_drvdata(dev);
780 uart_resume_port(&amba_reg, &uap->port);
786 static SIMPLE_DEV_PM_OPS(pl010_dev_pm_ops, pl010_suspend, pl010_resume);
788 static const struct amba_id pl010_ids[] = {
796 MODULE_DEVICE_TABLE(amba, pl010_ids);
798 static struct amba_driver pl010_driver = {
800 .name = "uart-pl010",
801 .pm = &pl010_dev_pm_ops,
803 .id_table = pl010_ids,
804 .probe = pl010_probe,
805 .remove = pl010_remove,
808 static int __init pl010_init(void)
810 printk(KERN_INFO "Serial: AMBA driver\n");
812 return amba_driver_register(&pl010_driver);
815 static void __exit pl010_exit(void)
817 amba_driver_unregister(&pl010_driver);
820 module_init(pl010_init);
821 module_exit(pl010_exit);
823 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
824 MODULE_DESCRIPTION("ARM AMBA serial port driver");
825 MODULE_LICENSE("GPL");