drivers/tty/serial/8250/8250_of.c

   1 /*
   2  *  Serial Port driver for Open Firmware platform devices
   3  *
   4  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  *
  11  */
  12 #include <linux/console.h>
  13 #include <linux/module.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/serial_reg.h>
  18 #include <linux/of_address.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/of_platform.h>
  21 #include <linux/clk.h>
  22
  23 #include "8250.h"
  24
  25 struct of_serial_info {
  26         struct clk *clk;
  27         int type;
  28         int line;
  29 };
  30
  31 #ifdef CONFIG_ARCH_TEGRA
  32 static void tegra_serial_handle_break(struct uart_port *p)
  33 {
  34         unsigned int status, tmout = 10000;
  35
  36         do {
  37                 status = p->serial_in(p, UART_LSR);
  38                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  39                         status = p->serial_in(p, UART_RX);
  40                 else
  41                         break;
  42                 if (--tmout == 0)
  43                         break;
  44                 udelay(1);
  45         } while (1);
  46 }
  47 #else
  48 static inline void tegra_serial_handle_break(struct uart_port *port)
  49 {
  50 }
  51 #endif
  52
  53 /*
  54  * Fill a struct uart_port for a given device node
  55  */
  56 static int of_platform_serial_setup(struct platform_device *ofdev,
  57                         int type, struct uart_port *port,
  58                         struct of_serial_info *info)
  59 {
  60         struct resource resource;
  61         struct device_node *np = ofdev->dev.of_node;
  62         u32 clk, spd, prop;
  63         int ret;
  64
  65         memset(port, 0, sizeof *port);
  66         if (of_property_read_u32(np, "clock-frequency", &clk)) {
  67
  68                 /* Get clk rate through clk driver if present */
  69                 info->clk = devm_clk_get(&ofdev->dev, NULL);
  70                 if (IS_ERR(info->clk)) {
  71                         dev_warn(&ofdev->dev,
  72                                 "clk or clock-frequency not defined\n");
  73                         return PTR_ERR(info->clk);
  74                 }
  75
  76                 ret = clk_prepare_enable(info->clk);
  77                 if (ret < 0)
  78                         return ret;
  79
  80                 clk = clk_get_rate(info->clk);
  81         }
  82         /* If current-speed was set, then try not to change it. */
  83         if (of_property_read_u32(np, "current-speed", &spd) == 0)
  84                 port->custom_divisor = clk / (16 * spd);
  85
  86         ret = of_address_to_resource(np, 0, &resource);
  87         if (ret) {
  88                 dev_warn(&ofdev->dev, "invalid address\n");
  89                 goto out;
  90         }
  91
  92         spin_lock_init(&port->lock);
  93         port->mapbase = resource.start;
  94         port->mapsize = resource_size(&resource);
  95
  96         /* Check for shifted address mapping */
  97         if (of_property_read_u32(np, "reg-offset", &prop) == 0)
  98                 port->mapbase += prop;
  99
 100         /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
 101         if (of_device_is_compatible(np, "mrvl,mmp-uart"))
 102                 port->regshift = 2;
 103
 104         /* Check for registers offset within the devices address range */
 105         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
 106                 port->regshift = prop;
 107
 108         /* Check for fifo size */
 109         if (of_property_read_u32(np, "fifo-size", &prop) == 0)
 110                 port->fifosize = prop;
 111
 112         /* Check for a fixed line number */
 113         ret = of_alias_get_id(np, "serial");
 114         if (ret >= 0)
 115                 port->line = ret;
 116
 117         port->irq = irq_of_parse_and_map(np, 0);
 118         port->iotype = UPIO_MEM;
 119         if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
 120                 switch (prop) {
 121                 case 1:
 122                         port->iotype = UPIO_MEM;
 123                         break;
 124                 case 2:
 125                         port->iotype = UPIO_MEM16;
 126                         break;
 127                 case 4:
 128                         port->iotype = of_device_is_big_endian(np) ?
 129                                        UPIO_MEM32BE : UPIO_MEM32;
 130                         break;
 131                 default:
 132                         dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
 133                                  prop);
 134                         ret = -EINVAL;
 135                         goto out;
 136                 }
 137         }
 138
 139         port->type = type;
 140         port->uartclk = clk;
 141         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
 142                 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
 143
 144         if (of_find_property(np, "no-loopback-test", NULL))
 145                 port->flags |= UPF_SKIP_TEST;
 146
 147         port->dev = &ofdev->dev;
 148
 149         switch (type) {
 150         case PORT_TEGRA:
 151                 port->handle_break = tegra_serial_handle_break;
 152                 break;
 153
 154         case PORT_RT2880:
 155                 port->iotype = UPIO_AU;
 156                 break;
 157         }
 158
 159         if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
 160             (of_device_is_compatible(np, "fsl,ns16550") ||
 161              of_device_is_compatible(np, "fsl,16550-FIFO64")))
 162                 port->handle_irq = fsl8250_handle_irq;
 163
 164         return 0;
 165 out:
 166         if (info->clk)
 167                 clk_disable_unprepare(info->clk);
 168         return ret;
 169 }
 170
 171 /*
 172  * Try to register a serial port
 173  */
 174 static const struct of_device_id of_platform_serial_table[];
 175 static int of_platform_serial_probe(struct platform_device *ofdev)
 176 {
 177         const struct of_device_id *match;
 178         struct of_serial_info *info;
 179         struct uart_port port;
 180         int port_type;
 181         int ret;
 182
 183         match = of_match_device(of_platform_serial_table, &ofdev->dev);
 184         if (!match)
 185                 return -EINVAL;
 186
 187         if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
 188                 return -EBUSY;
 189
 190         info = kzalloc(sizeof(*info), GFP_KERNEL);
 191         if (info == NULL)
 192                 return -ENOMEM;
 193
 194         port_type = (unsigned long)match->data;
 195         ret = of_platform_serial_setup(ofdev, port_type, &port, info);
 196         if (ret)
 197                 goto out;
 198
 199         switch (port_type) {
 200         case PORT_8250 ... PORT_MAX_8250:
 201         {
 202                 u32 tx_threshold;
 203                 struct uart_8250_port port8250;
 204                 memset(&port8250, 0, sizeof(port8250));
 205                 port8250.port = port;
 206
 207                 if (port.fifosize)
 208                         port8250.capabilities = UART_CAP_FIFO;
 209
 210                 /* Check for TX FIFO threshold & set tx_loadsz */
 211                 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
 212                                           &tx_threshold) == 0) &&
 213                     (tx_threshold < port.fifosize))
 214                         port8250.tx_loadsz = port.fifosize - tx_threshold;
 215
 216                 if (of_property_read_bool(ofdev->dev.of_node,
 217                                           "auto-flow-control"))
 218                         port8250.capabilities |= UART_CAP_AFE;
 219
 220                 ret = serial8250_register_8250_port(&port8250);
 221                 break;
 222         }
 223         default:
 224                 /* need to add code for these */
 225         case PORT_UNKNOWN:
 226                 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
 227                 ret = -ENODEV;
 228                 break;
 229         }
 230         if (ret < 0)
 231                 goto out;
 232
 233         info->type = port_type;
 234         info->line = ret;
 235         platform_set_drvdata(ofdev, info);
 236         return 0;
 237 out:
 238         kfree(info);
 239         irq_dispose_mapping(port.irq);
 240         return ret;
 241 }
 242
 243 /*
 244  * Release a line
 245  */
 246 static int of_platform_serial_remove(struct platform_device *ofdev)
 247 {
 248         struct of_serial_info *info = platform_get_drvdata(ofdev);
 249         switch (info->type) {
 250         case PORT_8250 ... PORT_MAX_8250:
 251                 serial8250_unregister_port(info->line);
 252                 break;
 253         default:
 254                 /* need to add code for these */
 255                 break;
 256         }
 257
 258         if (info->clk)
 259                 clk_disable_unprepare(info->clk);
 260         kfree(info);
 261         return 0;
 262 }
 263
 264 #ifdef CONFIG_PM_SLEEP
 265 static void of_serial_suspend_8250(struct of_serial_info *info)
 266 {
 267         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 268         struct uart_port *port = &port8250->port;
 269
 270         serial8250_suspend_port(info->line);
 271         if (info->clk && (!uart_console(port) || console_suspend_enabled))
 272                 clk_disable_unprepare(info->clk);
 273 }
 274
 275 static void of_serial_resume_8250(struct of_serial_info *info)
 276 {
 277         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 278         struct uart_port *port = &port8250->port;
 279
 280         if (info->clk && (!uart_console(port) || console_suspend_enabled))
 281                 clk_prepare_enable(info->clk);
 282
 283         serial8250_resume_port(info->line);
 284 }
 285
 286 static int of_serial_suspend(struct device *dev)
 287 {
 288         struct of_serial_info *info = dev_get_drvdata(dev);
 289
 290         switch (info->type) {
 291         case PORT_8250 ... PORT_MAX_8250:
 292                 of_serial_suspend_8250(info);
 293                 break;
 294         default:
 295                 break;
 296         }
 297
 298         return 0;
 299 }
 300
 301 static int of_serial_resume(struct device *dev)
 302 {
 303         struct of_serial_info *info = dev_get_drvdata(dev);
 304
 305         switch (info->type) {
 306         case PORT_8250 ... PORT_MAX_8250:
 307                 of_serial_resume_8250(info);
 308                 break;
 309         default:
 310                 break;
 311         }
 312
 313         return 0;
 314 }
 315 #endif
 316 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
 317
 318 /*
 319  * A few common types, add more as needed.
 320  */
 321 static const struct of_device_id of_platform_serial_table[] = {
 322         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
 323         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
 324         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
 325         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
 326         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
 327         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
 328         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
 329         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
 330         { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
 331         { .compatible = "altr,16550-FIFO32",
 332                 .data = (void *)PORT_ALTR_16550_F32, },
 333         { .compatible = "altr,16550-FIFO64",
 334                 .data = (void *)PORT_ALTR_16550_F64, },
 335         { .compatible = "altr,16550-FIFO128",
 336                 .data = (void *)PORT_ALTR_16550_F128, },
 337         { .compatible = "mrvl,mmp-uart",
 338                 .data = (void *)PORT_XSCALE, },
 339         { .compatible = "mrvl,pxa-uart",
 340                 .data = (void *)PORT_XSCALE, },
 341         { /* end of list */ },
 342 };
 343 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
 344
 345 static struct platform_driver of_platform_serial_driver = {
 346         .driver = {
 347                 .name = "of_serial",
 348                 .of_match_table = of_platform_serial_table,
 349                 .pm = &of_serial_pm_ops,
 350         },
 351         .probe = of_platform_serial_probe,
 352         .remove = of_platform_serial_remove,
 353 };
 354
 355 module_platform_driver(of_platform_serial_driver);
 356
 357 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
 358 MODULE_LICENSE("GPL");
 359 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");