drivers/tty/serial/8250/8250_of.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Serial Port driver for Open Firmware platform devices
   4  *
   5  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
   6  */
   7 #include <linux/console.h>
   8 #include <linux/module.h>
   9 #include <linux/slab.h>
  10 #include <linux/delay.h>
  11 #include <linux/serial_core.h>
  12 #include <linux/serial_reg.h>
  13 #include <linux/of_address.h>
  14 #include <linux/of_irq.h>
  15 #include <linux/of_platform.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/clk.h>
  18 #include <linux/reset.h>
  19
  20 #include "8250.h"
  21
  22 struct of_serial_info {
  23         struct clk *clk;
  24         struct reset_control *rst;
  25         int type;
  26         int line;
  27 };
  28
  29 #ifdef CONFIG_ARCH_TEGRA
  30 static void tegra_serial_handle_break(struct uart_port *p)
  31 {
  32         unsigned int status, tmout = 10000;
  33
  34         do {
  35                 status = p->serial_in(p, UART_LSR);
  36                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  37                         status = p->serial_in(p, UART_RX);
  38                 else
  39                         break;
  40                 if (--tmout == 0)
  41                         break;
  42                 udelay(1);
  43         } while (1);
  44 }
  45 #else
  46 static inline void tegra_serial_handle_break(struct uart_port *port)
  47 {
  48 }
  49 #endif
  50
  51 /*
  52  * Fill a struct uart_port for a given device node
  53  */
  54 static int of_platform_serial_setup(struct platform_device *ofdev,
  55                         int type, struct uart_port *port,
  56                         struct of_serial_info *info)
  57 {
  58         struct resource resource;
  59         struct device_node *np = ofdev->dev.of_node;
  60         u32 clk, spd, prop;
  61         int ret, irq;
  62
  63         memset(port, 0, sizeof *port);
  64
  65         pm_runtime_enable(&ofdev->dev);
  66         pm_runtime_get_sync(&ofdev->dev);
  67
  68         if (of_property_read_u32(np, "clock-frequency", &clk)) {
  69
  70                 /* Get clk rate through clk driver if present */
  71                 info->clk = devm_clk_get(&ofdev->dev, NULL);
  72                 if (IS_ERR(info->clk)) {
  73                         dev_warn(&ofdev->dev,
  74                                 "clk or clock-frequency not defined\n");
  75                         ret = PTR_ERR(info->clk);
  76                         goto err_pmruntime;
  77                 }
  78
  79                 ret = clk_prepare_enable(info->clk);
  80                 if (ret < 0)
  81                         goto err_pmruntime;
  82
  83                 clk = clk_get_rate(info->clk);
  84         }
  85         /* If current-speed was set, then try not to change it. */
  86         if (of_property_read_u32(np, "current-speed", &spd) == 0)
  87                 port->custom_divisor = clk / (16 * spd);
  88
  89         ret = of_address_to_resource(np, 0, &resource);
  90         if (ret) {
  91                 dev_warn(&ofdev->dev, "invalid address\n");
  92                 goto err_unprepare;
  93         }
  94
  95         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
  96                                   UPF_FIXED_TYPE;
  97         spin_lock_init(&port->lock);
  98
  99         if (resource_type(&resource) == IORESOURCE_IO) {
 100                 port->iotype = UPIO_PORT;
 101                 port->iobase = resource.start;
 102         } else {
 103                 port->mapbase = resource.start;
 104                 port->mapsize = resource_size(&resource);
 105
 106                 /* Check for shifted address mapping */
 107                 if (of_property_read_u32(np, "reg-offset", &prop) == 0)
 108                         port->mapbase += prop;
 109
 110                 port->iotype = UPIO_MEM;
 111                 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
 112                         switch (prop) {
 113                         case 1:
 114                                 port->iotype = UPIO_MEM;
 115                                 break;
 116                         case 2:
 117                                 port->iotype = UPIO_MEM16;
 118                                 break;
 119                         case 4:
 120                                 port->iotype = of_device_is_big_endian(np) ?
 121                                                UPIO_MEM32BE : UPIO_MEM32;
 122                                 break;
 123                         default:
 124                                 dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
 125                                          prop);
 126                                 ret = -EINVAL;
 127                                 goto err_unprepare;
 128                         }
 129                 }
 130                 port->flags |= UPF_IOREMAP;
 131         }
 132
 133         /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
 134         if (of_device_is_compatible(np, "mrvl,mmp-uart"))
 135                 port->regshift = 2;
 136
 137         /* Check for registers offset within the devices address range */
 138         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
 139                 port->regshift = prop;
 140
 141         /* Check for fifo size */
 142         if (of_property_read_u32(np, "fifo-size", &prop) == 0)
 143                 port->fifosize = prop;
 144
 145         /* Check for a fixed line number */
 146         ret = of_alias_get_id(np, "serial");
 147         if (ret >= 0)
 148                 port->line = ret;
 149
 150         irq = of_irq_get(np, 0);
 151         if (irq < 0) {
 152                 if (irq == -EPROBE_DEFER) {
 153                         ret = -EPROBE_DEFER;
 154                         goto err_unprepare;
 155                 }
 156                 /* IRQ support not mandatory */
 157                 irq = 0;
 158         }
 159
 160         port->irq = irq;
 161
 162         info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
 163         if (IS_ERR(info->rst)) {
 164                 ret = PTR_ERR(info->rst);
 165                 goto err_unprepare;
 166         }
 167
 168         ret = reset_control_deassert(info->rst);
 169         if (ret)
 170                 goto err_unprepare;
 171
 172         port->type = type;
 173         port->uartclk = clk;
 174
 175         if (of_property_read_bool(np, "no-loopback-test"))
 176                 port->flags |= UPF_SKIP_TEST;
 177
 178         port->dev = &ofdev->dev;
 179
 180         switch (type) {
 181         case PORT_TEGRA:
 182                 port->handle_break = tegra_serial_handle_break;
 183                 break;
 184
 185         case PORT_RT2880:
 186                 port->iotype = UPIO_AU;
 187                 break;
 188         }
 189
 190         if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
 191             (of_device_is_compatible(np, "fsl,ns16550") ||
 192              of_device_is_compatible(np, "fsl,16550-FIFO64")))
 193                 port->handle_irq = fsl8250_handle_irq;
 194
 195         return 0;
 196 err_unprepare:
 197         clk_disable_unprepare(info->clk);
 198 err_pmruntime:
 199         pm_runtime_put_sync(&ofdev->dev);
 200         pm_runtime_disable(&ofdev->dev);
 201         return ret;
 202 }
 203
 204 /*
 205  * Try to register a serial port
 206  */
 207 static const struct of_device_id of_platform_serial_table[];
 208 static int of_platform_serial_probe(struct platform_device *ofdev)
 209 {
 210         const struct of_device_id *match;
 211         struct of_serial_info *info;
 212         struct uart_8250_port port8250;
 213         u32 tx_threshold;
 214         int port_type;
 215         int ret;
 216
 217         match = of_match_device(of_platform_serial_table, &ofdev->dev);
 218         if (!match)
 219                 return -EINVAL;
 220
 221         if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
 222                 return -EBUSY;
 223
 224         info = kzalloc(sizeof(*info), GFP_KERNEL);
 225         if (info == NULL)
 226                 return -ENOMEM;
 227
 228         port_type = (unsigned long)match->data;
 229         memset(&port8250, 0, sizeof(port8250));
 230         ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
 231         if (ret)
 232                 goto err_free;
 233
 234         if (port8250.port.fifosize)
 235                 port8250.capabilities = UART_CAP_FIFO;
 236
 237         /* Check for TX FIFO threshold & set tx_loadsz */
 238         if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
 239                                   &tx_threshold) == 0) &&
 240             (tx_threshold < port8250.port.fifosize))
 241                 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
 242
 243         if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
 244                 port8250.capabilities |= UART_CAP_AFE;
 245
 246         if (of_property_read_u32(ofdev->dev.of_node,
 247                         "overrun-throttle-ms",
 248                         &port8250.overrun_backoff_time_ms) != 0)
 249                 port8250.overrun_backoff_time_ms = 0;
 250
 251         ret = serial8250_register_8250_port(&port8250);
 252         if (ret < 0)
 253                 goto err_dispose;
 254
 255         info->type = port_type;
 256         info->line = ret;
 257         platform_set_drvdata(ofdev, info);
 258         return 0;
 259 err_dispose:
 260         irq_dispose_mapping(port8250.port.irq);
 261         pm_runtime_put_sync(&ofdev->dev);
 262         pm_runtime_disable(&ofdev->dev);
 263         clk_disable_unprepare(info->clk);
 264 err_free:
 265         kfree(info);
 266         return ret;
 267 }
 268
 269 /*
 270  * Release a line
 271  */
 272 static int of_platform_serial_remove(struct platform_device *ofdev)
 273 {
 274         struct of_serial_info *info = platform_get_drvdata(ofdev);
 275
 276         serial8250_unregister_port(info->line);
 277
 278         reset_control_assert(info->rst);
 279         pm_runtime_put_sync(&ofdev->dev);
 280         pm_runtime_disable(&ofdev->dev);
 281         clk_disable_unprepare(info->clk);
 282         kfree(info);
 283         return 0;
 284 }
 285
 286 #ifdef CONFIG_PM_SLEEP
 287 static int of_serial_suspend(struct device *dev)
 288 {
 289         struct of_serial_info *info = dev_get_drvdata(dev);
 290         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 291         struct uart_port *port = &port8250->port;
 292
 293         serial8250_suspend_port(info->line);
 294
 295         if (!uart_console(port) || console_suspend_enabled) {
 296                 pm_runtime_put_sync(dev);
 297                 clk_disable_unprepare(info->clk);
 298         }
 299         return 0;
 300 }
 301
 302 static int of_serial_resume(struct device *dev)
 303 {
 304         struct of_serial_info *info = dev_get_drvdata(dev);
 305         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 306         struct uart_port *port = &port8250->port;
 307
 308         if (!uart_console(port) || console_suspend_enabled) {
 309                 pm_runtime_get_sync(dev);
 310                 clk_prepare_enable(info->clk);
 311         }
 312
 313         serial8250_resume_port(info->line);
 314
 315         return 0;
 316 }
 317 #endif
 318 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
 319
 320 /*
 321  * A few common types, add more as needed.
 322  */
 323 static const struct of_device_id of_platform_serial_table[] = {
 324         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
 325         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
 326         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
 327         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
 328         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
 329         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
 330         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
 331         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
 332         { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
 333         { .compatible = "altr,16550-FIFO32",
 334                 .data = (void *)PORT_ALTR_16550_F32, },
 335         { .compatible = "altr,16550-FIFO64",
 336                 .data = (void *)PORT_ALTR_16550_F64, },
 337         { .compatible = "altr,16550-FIFO128",
 338                 .data = (void *)PORT_ALTR_16550_F128, },
 339         { .compatible = "mediatek,mtk-btif",
 340                 .data = (void *)PORT_MTK_BTIF, },
 341         { .compatible = "mrvl,mmp-uart",
 342                 .data = (void *)PORT_XSCALE, },
 343         { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
 344         { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
 345         { /* end of list */ },
 346 };
 347 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
 348
 349 static struct platform_driver of_platform_serial_driver = {
 350         .driver = {
 351                 .name = "of_serial",
 352                 .of_match_table = of_platform_serial_table,
 353                 .pm = &of_serial_pm_ops,
 354         },
 355         .probe = of_platform_serial_probe,
 356         .remove = of_platform_serial_remove,
 357 };
 358
 359 module_platform_driver(of_platform_serial_driver);
 360
 361 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
 362 MODULE_LICENSE("GPL");
 363 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");