drivers/tty/serial/8250/8250_of.c

   1 /*
   2  *  Serial Port driver for Open Firmware platform devices
   3  *
   4  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  *
  11  */
  12 #include <linux/console.h>
  13 #include <linux/module.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/serial_reg.h>
  18 #include <linux/of_address.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/of_platform.h>
  21 #include <linux/clk.h>
  22
  23 #include "8250.h"
  24
  25 struct of_serial_info {
  26         struct clk *clk;
  27         int type;
  28         int line;
  29 };
  30
  31 #ifdef CONFIG_ARCH_TEGRA
  32 static void tegra_serial_handle_break(struct uart_port *p)
  33 {
  34         unsigned int status, tmout = 10000;
  35
  36         do {
  37                 status = p->serial_in(p, UART_LSR);
  38                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  39                         status = p->serial_in(p, UART_RX);
  40                 else
  41                         break;
  42                 if (--tmout == 0)
  43                         break;
  44                 udelay(1);
  45         } while (1);
  46 }
  47 #else
  48 static inline void tegra_serial_handle_break(struct uart_port *port)
  49 {
  50 }
  51 #endif
  52
  53 /*
  54  * Fill a struct uart_port for a given device node
  55  */
  56 static int of_platform_serial_setup(struct platform_device *ofdev,
  57                         int type, struct uart_port *port,
  58                         struct of_serial_info *info)
  59 {
  60         struct resource resource;
  61         struct device_node *np = ofdev->dev.of_node;
  62         u32 clk, spd, prop;
  63         int ret;
  64
  65         memset(port, 0, sizeof *port);
  66         if (of_property_read_u32(np, "clock-frequency", &clk)) {
  67
  68                 /* Get clk rate through clk driver if present */
  69                 info->clk = devm_clk_get(&ofdev->dev, NULL);
  70                 if (IS_ERR(info->clk)) {
  71                         dev_warn(&ofdev->dev,
  72                                 "clk or clock-frequency not defined\n");
  73                         return PTR_ERR(info->clk);
  74                 }
  75
  76                 ret = clk_prepare_enable(info->clk);
  77                 if (ret < 0)
  78                         return ret;
  79
  80                 clk = clk_get_rate(info->clk);
  81         }
  82         /* If current-speed was set, then try not to change it. */
  83         if (of_property_read_u32(np, "current-speed", &spd) == 0)
  84                 port->custom_divisor = clk / (16 * spd);
  85
  86         ret = of_address_to_resource(np, 0, &resource);
  87         if (ret) {
  88                 dev_warn(&ofdev->dev, "invalid address\n");
  89                 goto err_unprepare;
  90         }
  91
  92         spin_lock_init(&port->lock);
  93         port->mapbase = resource.start;
  94         port->mapsize = resource_size(&resource);
  95
  96         /* Check for shifted address mapping */
  97         if (of_property_read_u32(np, "reg-offset", &prop) == 0) {
  98                 if (prop >= port->mapsize) {
  99                         dev_warn(&ofdev->dev, "reg-offset %u exceeds region size %pa\n",
 100                                  prop, &port->mapsize);
 101                         ret = -EINVAL;
 102                         goto err_unprepare;
 103                 }
 104
 105                 port->mapbase += prop;
 106                 port->mapsize -= prop;
 107         }
 108
 109         /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
 110         if (of_device_is_compatible(np, "mrvl,mmp-uart"))
 111                 port->regshift = 2;
 112
 113         /* Check for registers offset within the devices address range */
 114         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
 115                 port->regshift = prop;
 116
 117         /* Check for fifo size */
 118         if (of_property_read_u32(np, "fifo-size", &prop) == 0)
 119                 port->fifosize = prop;
 120
 121         /* Check for a fixed line number */
 122         ret = of_alias_get_id(np, "serial");
 123         if (ret >= 0)
 124                 port->line = ret;
 125
 126         port->irq = irq_of_parse_and_map(np, 0);
 127         port->iotype = UPIO_MEM;
 128         if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
 129                 switch (prop) {
 130                 case 1:
 131                         port->iotype = UPIO_MEM;
 132                         break;
 133                 case 2:
 134                         port->iotype = UPIO_MEM16;
 135                         break;
 136                 case 4:
 137                         port->iotype = of_device_is_big_endian(np) ?
 138                                        UPIO_MEM32BE : UPIO_MEM32;
 139                         break;
 140                 default:
 141                         dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
 142                                  prop);
 143                         ret = -EINVAL;
 144                         goto err_dispose;
 145                 }
 146         }
 147
 148         port->type = type;
 149         port->uartclk = clk;
 150         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
 151                 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
 152
 153         if (of_find_property(np, "no-loopback-test", NULL))
 154                 port->flags |= UPF_SKIP_TEST;
 155
 156         port->dev = &ofdev->dev;
 157
 158         switch (type) {
 159         case PORT_TEGRA:
 160                 port->handle_break = tegra_serial_handle_break;
 161                 break;
 162
 163         case PORT_RT2880:
 164                 port->iotype = UPIO_AU;
 165                 break;
 166         }
 167
 168         if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
 169             (of_device_is_compatible(np, "fsl,ns16550") ||
 170              of_device_is_compatible(np, "fsl,16550-FIFO64")))
 171                 port->handle_irq = fsl8250_handle_irq;
 172
 173         return 0;
 174 err_dispose:
 175         irq_dispose_mapping(port->irq);
 176 err_unprepare:
 177         if (info->clk)
 178                 clk_disable_unprepare(info->clk);
 179         return ret;
 180 }
 181
 182 /*
 183  * Try to register a serial port
 184  */
 185 static const struct of_device_id of_platform_serial_table[];
 186 static int of_platform_serial_probe(struct platform_device *ofdev)
 187 {
 188         const struct of_device_id *match;
 189         struct of_serial_info *info;
 190         struct uart_port port;
 191         int port_type;
 192         int ret;
 193
 194         match = of_match_device(of_platform_serial_table, &ofdev->dev);
 195         if (!match)
 196                 return -EINVAL;
 197
 198         if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
 199                 return -EBUSY;
 200
 201         info = kzalloc(sizeof(*info), GFP_KERNEL);
 202         if (info == NULL)
 203                 return -ENOMEM;
 204
 205         port_type = (unsigned long)match->data;
 206         ret = of_platform_serial_setup(ofdev, port_type, &port, info);
 207         if (ret)
 208                 goto err_free;
 209
 210         switch (port_type) {
 211         case PORT_8250 ... PORT_MAX_8250:
 212         {
 213                 u32 tx_threshold;
 214                 struct uart_8250_port port8250;
 215                 memset(&port8250, 0, sizeof(port8250));
 216                 port8250.port = port;
 217
 218                 if (port.fifosize)
 219                         port8250.capabilities = UART_CAP_FIFO;
 220
 221                 /* Check for TX FIFO threshold & set tx_loadsz */
 222                 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
 223                                           &tx_threshold) == 0) &&
 224                     (tx_threshold < port.fifosize))
 225                         port8250.tx_loadsz = port.fifosize - tx_threshold;
 226
 227                 if (of_property_read_bool(ofdev->dev.of_node,
 228                                           "auto-flow-control"))
 229                         port8250.capabilities |= UART_CAP_AFE;
 230
 231                 ret = serial8250_register_8250_port(&port8250);
 232                 break;
 233         }
 234         default:
 235                 /* need to add code for these */
 236         case PORT_UNKNOWN:
 237                 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
 238                 ret = -ENODEV;
 239                 break;
 240         }
 241         if (ret < 0)
 242                 goto err_dispose;
 243
 244         info->type = port_type;
 245         info->line = ret;
 246         platform_set_drvdata(ofdev, info);
 247         return 0;
 248 err_dispose:
 249         irq_dispose_mapping(port.irq);
 250         if (info->clk)
 251                 clk_disable_unprepare(info->clk);
 252 err_free:
 253         kfree(info);
 254         return ret;
 255 }
 256
 257 /*
 258  * Release a line
 259  */
 260 static int of_platform_serial_remove(struct platform_device *ofdev)
 261 {
 262         struct of_serial_info *info = platform_get_drvdata(ofdev);
 263         switch (info->type) {
 264         case PORT_8250 ... PORT_MAX_8250:
 265                 serial8250_unregister_port(info->line);
 266                 break;
 267         default:
 268                 /* need to add code for these */
 269                 break;
 270         }
 271
 272         if (info->clk)
 273                 clk_disable_unprepare(info->clk);
 274         kfree(info);
 275         return 0;
 276 }
 277
 278 #ifdef CONFIG_PM_SLEEP
 279 static void of_serial_suspend_8250(struct of_serial_info *info)
 280 {
 281         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 282         struct uart_port *port = &port8250->port;
 283
 284         serial8250_suspend_port(info->line);
 285         if (info->clk && (!uart_console(port) || console_suspend_enabled))
 286                 clk_disable_unprepare(info->clk);
 287 }
 288
 289 static void of_serial_resume_8250(struct of_serial_info *info)
 290 {
 291         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 292         struct uart_port *port = &port8250->port;
 293
 294         if (info->clk && (!uart_console(port) || console_suspend_enabled))
 295                 clk_prepare_enable(info->clk);
 296
 297         serial8250_resume_port(info->line);
 298 }
 299
 300 static int of_serial_suspend(struct device *dev)
 301 {
 302         struct of_serial_info *info = dev_get_drvdata(dev);
 303
 304         switch (info->type) {
 305         case PORT_8250 ... PORT_MAX_8250:
 306                 of_serial_suspend_8250(info);
 307                 break;
 308         default:
 309                 break;
 310         }
 311
 312         return 0;
 313 }
 314
 315 static int of_serial_resume(struct device *dev)
 316 {
 317         struct of_serial_info *info = dev_get_drvdata(dev);
 318
 319         switch (info->type) {
 320         case PORT_8250 ... PORT_MAX_8250:
 321                 of_serial_resume_8250(info);
 322                 break;
 323         default:
 324                 break;
 325         }
 326
 327         return 0;
 328 }
 329 #endif
 330 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
 331
 332 /*
 333  * A few common types, add more as needed.
 334  */
 335 static const struct of_device_id of_platform_serial_table[] = {
 336         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
 337         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
 338         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
 339         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
 340         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
 341         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
 342         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
 343         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
 344         { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
 345         { .compatible = "altr,16550-FIFO32",
 346                 .data = (void *)PORT_ALTR_16550_F32, },
 347         { .compatible = "altr,16550-FIFO64",
 348                 .data = (void *)PORT_ALTR_16550_F64, },
 349         { .compatible = "altr,16550-FIFO128",
 350                 .data = (void *)PORT_ALTR_16550_F128, },
 351         { .compatible = "mrvl,mmp-uart",
 352                 .data = (void *)PORT_XSCALE, },
 353         { .compatible = "mrvl,pxa-uart",
 354                 .data = (void *)PORT_XSCALE, },
 355         { /* end of list */ },
 356 };
 357 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
 358
 359 static struct platform_driver of_platform_serial_driver = {
 360         .driver = {
 361                 .name = "of_serial",
 362                 .of_match_table = of_platform_serial_table,
 363                 .pm = &of_serial_pm_ops,
 364         },
 365         .probe = of_platform_serial_probe,
 366         .remove = of_platform_serial_remove,
 367 };
 368
 369 module_platform_driver(of_platform_serial_driver);
 370
 371 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
 372 MODULE_LICENSE("GPL");
 373 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");