drivers/tty/serial/8250/8250_of.c

   1 /*
   2  *  Serial Port driver for Open Firmware platform devices
   3  *
   4  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  *
  11  */
  12 #include <linux/console.h>
  13 #include <linux/module.h>
  14 #include <linux/slab.h>
  15 #include <linux/delay.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/serial_reg.h>
  18 #include <linux/of_address.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/of_platform.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/clk.h>
  23 #include <linux/reset.h>
  24
  25 #include "8250.h"
  26
  27 struct of_serial_info {
  28         struct clk *clk;
  29         struct reset_control *rst;
  30         int type;
  31         int line;
  32 };
  33
  34 #ifdef CONFIG_ARCH_TEGRA
  35 static void tegra_serial_handle_break(struct uart_port *p)
  36 {
  37         unsigned int status, tmout = 10000;
  38
  39         do {
  40                 status = p->serial_in(p, UART_LSR);
  41                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  42                         status = p->serial_in(p, UART_RX);
  43                 else
  44                         break;
  45                 if (--tmout == 0)
  46                         break;
  47                 udelay(1);
  48         } while (1);
  49 }
  50 #else
  51 static inline void tegra_serial_handle_break(struct uart_port *port)
  52 {
  53 }
  54 #endif
  55
  56 /*
  57  * Fill a struct uart_port for a given device node
  58  */
  59 static int of_platform_serial_setup(struct platform_device *ofdev,
  60                         int type, struct uart_port *port,
  61                         struct of_serial_info *info)
  62 {
  63         struct resource resource;
  64         struct device_node *np = ofdev->dev.of_node;
  65         u32 clk, spd, prop;
  66         int ret;
  67
  68         memset(port, 0, sizeof *port);
  69
  70         pm_runtime_enable(&ofdev->dev);
  71         pm_runtime_get_sync(&ofdev->dev);
  72
  73         if (of_property_read_u32(np, "clock-frequency", &clk)) {
  74
  75                 /* Get clk rate through clk driver if present */
  76                 info->clk = devm_clk_get(&ofdev->dev, NULL);
  77                 if (IS_ERR(info->clk)) {
  78                         dev_warn(&ofdev->dev,
  79                                 "clk or clock-frequency not defined\n");
  80                         ret = PTR_ERR(info->clk);
  81                         goto err_pmruntime;
  82                 }
  83
  84                 ret = clk_prepare_enable(info->clk);
  85                 if (ret < 0)
  86                         goto err_pmruntime;
  87
  88                 clk = clk_get_rate(info->clk);
  89         }
  90         /* If current-speed was set, then try not to change it. */
  91         if (of_property_read_u32(np, "current-speed", &spd) == 0)
  92                 port->custom_divisor = clk / (16 * spd);
  93
  94         ret = of_address_to_resource(np, 0, &resource);
  95         if (ret) {
  96                 dev_warn(&ofdev->dev, "invalid address\n");
  97                 goto err_unprepare;
  98         }
  99
 100         spin_lock_init(&port->lock);
 101         port->mapbase = resource.start;
 102         port->mapsize = resource_size(&resource);
 103
 104         /* Check for shifted address mapping */
 105         if (of_property_read_u32(np, "reg-offset", &prop) == 0) {
 106                 if (prop >= port->mapsize) {
 107                         dev_warn(&ofdev->dev, "reg-offset %u exceeds region size %pa\n",
 108                                  prop, &port->mapsize);
 109                         ret = -EINVAL;
 110                         goto err_unprepare;
 111                 }
 112
 113                 port->mapbase += prop;
 114                 port->mapsize -= prop;
 115         }
 116
 117         /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
 118         if (of_device_is_compatible(np, "mrvl,mmp-uart"))
 119                 port->regshift = 2;
 120
 121         /* Check for registers offset within the devices address range */
 122         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
 123                 port->regshift = prop;
 124
 125         /* Check for fifo size */
 126         if (of_property_read_u32(np, "fifo-size", &prop) == 0)
 127                 port->fifosize = prop;
 128
 129         /* Check for a fixed line number */
 130         ret = of_alias_get_id(np, "serial");
 131         if (ret >= 0)
 132                 port->line = ret;
 133
 134         port->irq = irq_of_parse_and_map(np, 0);
 135         port->iotype = UPIO_MEM;
 136         if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
 137                 switch (prop) {
 138                 case 1:
 139                         port->iotype = UPIO_MEM;
 140                         break;
 141                 case 2:
 142                         port->iotype = UPIO_MEM16;
 143                         break;
 144                 case 4:
 145                         port->iotype = of_device_is_big_endian(np) ?
 146                                        UPIO_MEM32BE : UPIO_MEM32;
 147                         break;
 148                 default:
 149                         dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
 150                                  prop);
 151                         ret = -EINVAL;
 152                         goto err_dispose;
 153                 }
 154         }
 155
 156         info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
 157         if (IS_ERR(info->rst)) {
 158                 ret = PTR_ERR(info->rst);
 159                 goto err_dispose;
 160         }
 161
 162         ret = reset_control_deassert(info->rst);
 163         if (ret)
 164                 goto err_dispose;
 165
 166         port->type = type;
 167         port->uartclk = clk;
 168         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
 169                 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
 170
 171         if (of_property_read_bool(np, "no-loopback-test"))
 172                 port->flags |= UPF_SKIP_TEST;
 173
 174         port->dev = &ofdev->dev;
 175
 176         switch (type) {
 177         case PORT_TEGRA:
 178                 port->handle_break = tegra_serial_handle_break;
 179                 break;
 180
 181         case PORT_RT2880:
 182                 port->iotype = UPIO_AU;
 183                 break;
 184         }
 185
 186         if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
 187             (of_device_is_compatible(np, "fsl,ns16550") ||
 188              of_device_is_compatible(np, "fsl,16550-FIFO64")))
 189                 port->handle_irq = fsl8250_handle_irq;
 190
 191         return 0;
 192 err_dispose:
 193         irq_dispose_mapping(port->irq);
 194 err_unprepare:
 195         clk_disable_unprepare(info->clk);
 196 err_pmruntime:
 197         pm_runtime_put_sync(&ofdev->dev);
 198         pm_runtime_disable(&ofdev->dev);
 199         return ret;
 200 }
 201
 202 /*
 203  * Try to register a serial port
 204  */
 205 static const struct of_device_id of_platform_serial_table[];
 206 static int of_platform_serial_probe(struct platform_device *ofdev)
 207 {
 208         const struct of_device_id *match;
 209         struct of_serial_info *info;
 210         struct uart_8250_port port8250;
 211         u32 tx_threshold;
 212         int port_type;
 213         int ret;
 214
 215         match = of_match_device(of_platform_serial_table, &ofdev->dev);
 216         if (!match)
 217                 return -EINVAL;
 218
 219         if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
 220                 return -EBUSY;
 221
 222         info = kzalloc(sizeof(*info), GFP_KERNEL);
 223         if (info == NULL)
 224                 return -ENOMEM;
 225
 226         port_type = (unsigned long)match->data;
 227         memset(&port8250, 0, sizeof(port8250));
 228         ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
 229         if (ret)
 230                 goto err_free;
 231
 232         if (port8250.port.fifosize)
 233                 port8250.capabilities = UART_CAP_FIFO;
 234
 235         /* Check for TX FIFO threshold & set tx_loadsz */
 236         if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
 237                                   &tx_threshold) == 0) &&
 238             (tx_threshold < port8250.port.fifosize))
 239                 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
 240
 241         if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
 242                 port8250.capabilities |= UART_CAP_AFE;
 243
 244         if (of_property_read_u32(ofdev->dev.of_node,
 245                         "overrun-throttle-ms",
 246                         &port8250.overrun_backoff_time_ms) != 0)
 247                 port8250.overrun_backoff_time_ms = 0;
 248
 249         ret = serial8250_register_8250_port(&port8250);
 250         if (ret < 0)
 251                 goto err_dispose;
 252
 253         info->type = port_type;
 254         info->line = ret;
 255         platform_set_drvdata(ofdev, info);
 256         return 0;
 257 err_dispose:
 258         irq_dispose_mapping(port8250.port.irq);
 259         pm_runtime_put_sync(&ofdev->dev);
 260         pm_runtime_disable(&ofdev->dev);
 261         clk_disable_unprepare(info->clk);
 262 err_free:
 263         kfree(info);
 264         return ret;
 265 }
 266
 267 /*
 268  * Release a line
 269  */
 270 static int of_platform_serial_remove(struct platform_device *ofdev)
 271 {
 272         struct of_serial_info *info = platform_get_drvdata(ofdev);
 273
 274         serial8250_unregister_port(info->line);
 275
 276         reset_control_assert(info->rst);
 277         pm_runtime_put_sync(&ofdev->dev);
 278         pm_runtime_disable(&ofdev->dev);
 279         clk_disable_unprepare(info->clk);
 280         kfree(info);
 281         return 0;
 282 }
 283
 284 #ifdef CONFIG_PM_SLEEP
 285 static int of_serial_suspend(struct device *dev)
 286 {
 287         struct of_serial_info *info = dev_get_drvdata(dev);
 288         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 289         struct uart_port *port = &port8250->port;
 290
 291         serial8250_suspend_port(info->line);
 292
 293         if (!uart_console(port) || console_suspend_enabled) {
 294                 pm_runtime_put_sync(dev);
 295                 clk_disable_unprepare(info->clk);
 296         }
 297         return 0;
 298 }
 299
 300 static int of_serial_resume(struct device *dev)
 301 {
 302         struct of_serial_info *info = dev_get_drvdata(dev);
 303         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
 304         struct uart_port *port = &port8250->port;
 305
 306         if (!uart_console(port) || console_suspend_enabled) {
 307                 pm_runtime_get_sync(dev);
 308                 clk_prepare_enable(info->clk);
 309         }
 310
 311         serial8250_resume_port(info->line);
 312
 313         return 0;
 314 }
 315 #endif
 316 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
 317
 318 /*
 319  * A few common types, add more as needed.
 320  */
 321 static const struct of_device_id of_platform_serial_table[] = {
 322         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
 323         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
 324         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
 325         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
 326         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
 327         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
 328         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
 329         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
 330         { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
 331         { .compatible = "altr,16550-FIFO32",
 332                 .data = (void *)PORT_ALTR_16550_F32, },
 333         { .compatible = "altr,16550-FIFO64",
 334                 .data = (void *)PORT_ALTR_16550_F64, },
 335         { .compatible = "altr,16550-FIFO128",
 336                 .data = (void *)PORT_ALTR_16550_F128, },
 337         { .compatible = "mediatek,mtk-btif",
 338                 .data = (void *)PORT_MTK_BTIF, },
 339         { .compatible = "mrvl,mmp-uart",
 340                 .data = (void *)PORT_XSCALE, },
 341         { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
 342         { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
 343         { /* end of list */ },
 344 };
 345 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
 346
 347 static struct platform_driver of_platform_serial_driver = {
 348         .driver = {
 349                 .name = "of_serial",
 350                 .of_match_table = of_platform_serial_table,
 351                 .pm = &of_serial_pm_ops,
 352         },
 353         .probe = of_platform_serial_probe,
 354         .remove = of_platform_serial_remove,
 355 };
 356
 357 module_platform_driver(of_platform_serial_driver);
 358
 359 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
 360 MODULE_LICENSE("GPL");
 361 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");