1 // SPDX-License-Identifier: GPL-2.0
3 * 8250_moxa.c - MOXA Smartio/Industio MUE multiport serial driver.
5 * Author: Mathieu OTHACEHE <m.othacehe@gmail.com>
8 #include <linux/module.h>
13 #define PCI_DEVICE_ID_MOXA_CP102E 0x1024
14 #define PCI_DEVICE_ID_MOXA_CP102EL 0x1025
15 #define PCI_DEVICE_ID_MOXA_CP104EL_A 0x1045
16 #define PCI_DEVICE_ID_MOXA_CP114EL 0x1144
17 #define PCI_DEVICE_ID_MOXA_CP116E_A_A 0x1160
18 #define PCI_DEVICE_ID_MOXA_CP116E_A_B 0x1161
19 #define PCI_DEVICE_ID_MOXA_CP118EL_A 0x1182
20 #define PCI_DEVICE_ID_MOXA_CP118E_A_I 0x1183
21 #define PCI_DEVICE_ID_MOXA_CP132EL 0x1322
22 #define PCI_DEVICE_ID_MOXA_CP134EL_A 0x1342
23 #define PCI_DEVICE_ID_MOXA_CP138E_A 0x1381
24 #define PCI_DEVICE_ID_MOXA_CP168EL_A 0x1683
26 #define MOXA_BASE_BAUD 921600
27 #define MOXA_UART_OFFSET 0x200
28 #define MOXA_BASE_BAR 1
30 struct moxa8250_board {
31 unsigned int num_ports;
41 static struct moxa8250_board moxa8250_boards[] = {
42 [moxa8250_2p] = { .num_ports = 2},
43 [moxa8250_4p] = { .num_ports = 4},
44 [moxa8250_8p] = { .num_ports = 8},
47 static int moxa8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
49 struct uart_8250_port uart;
50 struct moxa8250_board *brd;
52 resource_size_t baseaddr;
53 unsigned int i, nr_ports;
57 brd = &moxa8250_boards[id->driver_data];
58 nr_ports = brd->num_ports;
60 ret = pcim_enable_device(pdev);
64 brd = devm_kzalloc(&pdev->dev, sizeof(struct moxa8250_board) +
65 sizeof(unsigned int) * nr_ports, GFP_KERNEL);
68 brd->num_ports = nr_ports;
70 memset(&uart, 0, sizeof(struct uart_8250_port));
72 uart.port.dev = &pdev->dev;
73 uart.port.irq = pdev->irq;
74 uart.port.uartclk = MOXA_BASE_BAUD * 16;
75 uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
77 baseaddr = pci_resource_start(pdev, MOXA_BASE_BAR);
78 ioaddr = pcim_iomap(pdev, MOXA_BASE_BAR, 0);
82 for (i = 0; i < nr_ports; i++) {
85 * MOXA Smartio MUE boards with 4 ports have
86 * a different offset for port #3
88 if (nr_ports == 4 && i == 3)
89 offset = 7 * MOXA_UART_OFFSET;
91 offset = i * MOXA_UART_OFFSET;
93 uart.port.iotype = UPIO_MEM;
95 uart.port.mapbase = baseaddr + offset;
96 uart.port.membase = ioaddr + offset;
97 uart.port.regshift = 0;
99 dev_dbg(&pdev->dev, "Setup PCI port: port %lx, irq %d, type %d\n",
100 uart.port.iobase, uart.port.irq, uart.port.iotype);
102 brd->line[i] = serial8250_register_8250_port(&uart);
103 if (brd->line[i] < 0) {
105 "Couldn't register serial port %lx, irq %d, type %d, error %d\n",
106 uart.port.iobase, uart.port.irq,
107 uart.port.iotype, brd->line[i]);
112 pci_set_drvdata(pdev, brd);
116 static void moxa8250_remove(struct pci_dev *pdev)
118 struct moxa8250_board *brd = pci_get_drvdata(pdev);
121 for (i = 0; i < brd->num_ports; i++)
122 serial8250_unregister_port(brd->line[i]);
125 #define MOXA_DEVICE(id, data) { PCI_VDEVICE(MOXA, id), (kernel_ulong_t)data }
127 static const struct pci_device_id pci_ids[] = {
128 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP102E, moxa8250_2p),
129 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP102EL, moxa8250_2p),
130 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP104EL_A, moxa8250_4p),
131 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP114EL, moxa8250_4p),
132 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP116E_A_A, moxa8250_8p),
133 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP116E_A_B, moxa8250_8p),
134 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP118EL_A, moxa8250_8p),
135 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP118E_A_I, moxa8250_8p),
136 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP132EL, moxa8250_2p),
137 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP134EL_A, moxa8250_4p),
138 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP138E_A, moxa8250_8p),
139 MOXA_DEVICE(PCI_DEVICE_ID_MOXA_CP168EL_A, moxa8250_8p),
142 MODULE_DEVICE_TABLE(pci, pci_ids);
144 static struct pci_driver moxa8250_pci_driver = {
147 .probe = moxa8250_probe,
148 .remove = moxa8250_remove,
151 module_pci_driver(moxa8250_pci_driver);
153 MODULE_AUTHOR("Mathieu OTHACEHE");
154 MODULE_DESCRIPTION("MOXA SmartIO MUE driver");
155 MODULE_LICENSE("GPL v2");