1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Driver for 8250/16550-type serial ports
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Copyright (C) 2001 Russell King.
10 #include <linux/serial_8250.h>
11 #include <linux/serial_reg.h>
12 #include <linux/dmaengine.h>
14 #include "../serial_mctrl_gpio.h"
16 struct uart_8250_dma {
17 int (*tx_dma)(struct uart_8250_port *p);
18 int (*rx_dma)(struct uart_8250_port *p);
22 /* Parameter to the filter function */
26 struct dma_slave_config rxconf;
27 struct dma_slave_config txconf;
29 struct dma_chan *rxchan;
30 struct dma_chan *txchan;
32 /* Device address base for DMA operations */
33 phys_addr_t rx_dma_addr;
34 phys_addr_t tx_dma_addr;
36 /* DMA address of the buffer in memory */
40 dma_cookie_t rx_cookie;
41 dma_cookie_t tx_cookie;
48 unsigned char tx_running;
50 unsigned char rx_running;
53 struct old_serial_port {
55 unsigned int baud_base;
59 unsigned char io_type;
60 unsigned char __iomem *iomem_base;
61 unsigned short iomem_reg_shift;
64 struct serial8250_config {
66 unsigned short fifo_size;
67 unsigned short tx_loadsz;
69 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
73 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
74 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
75 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
76 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
77 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
78 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
79 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
80 #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
81 #define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */
82 #define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks:
83 * STOP PARITY EPAR SPAR WLEN5 WLEN6
86 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
87 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
88 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
89 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
90 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
91 #define UART_BUG_TXRACE (1 << 5) /* UART Tx fails to set remote DR */
94 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
95 #define SERIAL8250_SHARE_IRQS 1
97 #define SERIAL8250_SHARE_IRQS 0
100 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
104 .uartclk = 1843200, \
105 .iotype = UPIO_PORT, \
106 .flags = UPF_BOOT_AUTOCONF | (_flags), \
109 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
112 static inline int serial_in(struct uart_8250_port *up, int offset)
114 return up->port.serial_in(&up->port, offset);
117 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
119 up->port.serial_out(&up->port, offset, value);
125 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
127 serial_out(up, UART_SCR, offset);
128 serial_out(up, UART_ICR, value);
131 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
136 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
137 serial_out(up, UART_SCR, offset);
138 value = serial_in(up, UART_ICR);
139 serial_icr_write(up, UART_ACR, up->acr);
144 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
146 static inline int serial_dl_read(struct uart_8250_port *up)
148 return up->dl_read(up);
151 static inline void serial_dl_write(struct uart_8250_port *up, int value)
153 up->dl_write(up, value);
156 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
158 if (up->ier & UART_IER_THRI)
160 up->ier |= UART_IER_THRI;
161 serial_out(up, UART_IER, up->ier);
165 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
167 if (!(up->ier & UART_IER_THRI))
169 up->ier &= ~UART_IER_THRI;
170 serial_out(up, UART_IER, up->ier);
174 struct uart_8250_port *serial8250_get_port(int line);
176 void serial8250_rpm_get(struct uart_8250_port *p);
177 void serial8250_rpm_put(struct uart_8250_port *p);
179 void serial8250_rpm_get_tx(struct uart_8250_port *p);
180 void serial8250_rpm_put_tx(struct uart_8250_port *p);
182 int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
183 void serial8250_em485_start_tx(struct uart_8250_port *p);
184 void serial8250_em485_stop_tx(struct uart_8250_port *p);
185 void serial8250_em485_destroy(struct uart_8250_port *p);
187 /* MCR <-> TIOCM conversion */
188 static inline int serial8250_TIOCM_to_MCR(int tiocm)
192 if (tiocm & TIOCM_RTS)
194 if (tiocm & TIOCM_DTR)
196 if (tiocm & TIOCM_OUT1)
197 mcr |= UART_MCR_OUT1;
198 if (tiocm & TIOCM_OUT2)
199 mcr |= UART_MCR_OUT2;
200 if (tiocm & TIOCM_LOOP)
201 mcr |= UART_MCR_LOOP;
206 static inline int serial8250_MCR_to_TIOCM(int mcr)
210 if (mcr & UART_MCR_RTS)
212 if (mcr & UART_MCR_DTR)
214 if (mcr & UART_MCR_OUT1)
216 if (mcr & UART_MCR_OUT2)
218 if (mcr & UART_MCR_LOOP)
224 /* MSR <-> TIOCM conversion */
225 static inline int serial8250_MSR_to_TIOCM(int msr)
229 if (msr & UART_MSR_DCD)
231 if (msr & UART_MSR_RI)
233 if (msr & UART_MSR_DSR)
235 if (msr & UART_MSR_CTS)
241 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
243 serial_out(up, UART_MCR, value);
246 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
249 static inline int serial8250_in_MCR(struct uart_8250_port *up)
253 mctrl = serial_in(up, UART_MCR);
256 unsigned int mctrl_gpio = 0;
258 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
259 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
265 #if defined(__alpha__) && !defined(CONFIG_PCI)
267 * Digital did something really horribly wrong with the OUT1 and OUT2
268 * lines on at least some ALPHA's. The failure mode is that if either
269 * is cleared, the machine locks up with endless interrupts.
271 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
273 #define ALPHA_KLUDGE_MCR 0
276 #ifdef CONFIG_SERIAL_8250_PNP
277 int serial8250_pnp_init(void);
278 void serial8250_pnp_exit(void);
280 static inline int serial8250_pnp_init(void) { return 0; }
281 static inline void serial8250_pnp_exit(void) { }
284 #ifdef CONFIG_SERIAL_8250_FINTEK
285 int fintek_8250_probe(struct uart_8250_port *uart);
287 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
290 #ifdef CONFIG_ARCH_OMAP1
291 static inline int is_omap1_8250(struct uart_8250_port *pt)
295 switch (pt->port.mapbase) {
296 case OMAP1_UART1_BASE:
297 case OMAP1_UART2_BASE:
298 case OMAP1_UART3_BASE:
309 static inline int is_omap1510_8250(struct uart_8250_port *pt)
311 if (!cpu_is_omap1510())
314 return is_omap1_8250(pt);
317 static inline int is_omap1_8250(struct uart_8250_port *pt)
321 static inline int is_omap1510_8250(struct uart_8250_port *pt)
327 #ifdef CONFIG_SERIAL_8250_DMA
328 extern int serial8250_tx_dma(struct uart_8250_port *);
329 extern int serial8250_rx_dma(struct uart_8250_port *);
330 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
331 extern int serial8250_request_dma(struct uart_8250_port *);
332 extern void serial8250_release_dma(struct uart_8250_port *);
334 static inline int serial8250_tx_dma(struct uart_8250_port *p)
338 static inline int serial8250_rx_dma(struct uart_8250_port *p)
342 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
343 static inline int serial8250_request_dma(struct uart_8250_port *p)
347 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
350 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
352 unsigned char status;
354 status = serial_in(up, 0x04); /* EXCR2 */
355 #define PRESL(x) ((x) & 0x30)
356 if (PRESL(status) == 0x10) {
357 /* already in high speed mode */
360 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
361 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
362 serial_out(up, 0x04, status);
367 static inline int serial_index(struct uart_port *port)
369 return port->minor - 64;