2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/serial_8250.h>
15 #include <linux/serial_reg.h>
16 #include <linux/dmaengine.h>
18 struct uart_8250_dma {
19 int (*tx_dma)(struct uart_8250_port *p);
20 int (*rx_dma)(struct uart_8250_port *p);
24 /* Parameter to the filter function */
28 struct dma_slave_config rxconf;
29 struct dma_slave_config txconf;
31 struct dma_chan *rxchan;
32 struct dma_chan *txchan;
34 /* Device address base for DMA operations */
35 phys_addr_t rx_dma_addr;
36 phys_addr_t tx_dma_addr;
38 /* DMA address of the buffer in memory */
42 dma_cookie_t rx_cookie;
43 dma_cookie_t tx_cookie;
50 unsigned char tx_running;
52 unsigned char rx_running;
55 struct old_serial_port {
57 unsigned int baud_base;
61 unsigned char io_type;
62 unsigned char __iomem *iomem_base;
63 unsigned short iomem_reg_shift;
66 struct serial8250_config {
68 unsigned short fifo_size;
69 unsigned short tx_loadsz;
71 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
75 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
76 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
77 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
78 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
79 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
80 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
81 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
82 #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
84 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
85 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
86 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
87 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
88 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
91 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
92 #define SERIAL8250_SHARE_IRQS 1
94 #define SERIAL8250_SHARE_IRQS 0
97 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
101 .uartclk = 1843200, \
102 .iotype = UPIO_PORT, \
103 .flags = UPF_BOOT_AUTOCONF | (_flags), \
106 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
109 static inline int serial_in(struct uart_8250_port *up, int offset)
111 return up->port.serial_in(&up->port, offset);
114 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
116 up->port.serial_out(&up->port, offset, value);
119 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
121 static inline int serial_dl_read(struct uart_8250_port *up)
123 return up->dl_read(up);
126 static inline void serial_dl_write(struct uart_8250_port *up, int value)
128 up->dl_write(up, value);
131 struct uart_8250_port *serial8250_get_port(int line);
132 void serial8250_rpm_get(struct uart_8250_port *p);
133 void serial8250_rpm_put(struct uart_8250_port *p);
134 int serial8250_em485_init(struct uart_8250_port *p);
135 void serial8250_em485_destroy(struct uart_8250_port *p);
137 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
139 serial_out(up, UART_MCR, value);
142 static inline int serial8250_in_MCR(struct uart_8250_port *up)
144 return serial_in(up, UART_MCR);
147 #if defined(__alpha__) && !defined(CONFIG_PCI)
149 * Digital did something really horribly wrong with the OUT1 and OUT2
150 * lines on at least some ALPHA's. The failure mode is that if either
151 * is cleared, the machine locks up with endless interrupts.
153 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
155 #define ALPHA_KLUDGE_MCR 0
158 #ifdef CONFIG_SERIAL_8250_PNP
159 int serial8250_pnp_init(void);
160 void serial8250_pnp_exit(void);
162 static inline int serial8250_pnp_init(void) { return 0; }
163 static inline void serial8250_pnp_exit(void) { }
166 #ifdef CONFIG_SERIAL_8250_FINTEK
167 int fintek_8250_probe(struct uart_8250_port *uart);
169 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
172 #ifdef CONFIG_ARCH_OMAP1
173 static inline int is_omap1_8250(struct uart_8250_port *pt)
177 switch (pt->port.mapbase) {
178 case OMAP1_UART1_BASE:
179 case OMAP1_UART2_BASE:
180 case OMAP1_UART3_BASE:
191 static inline int is_omap1510_8250(struct uart_8250_port *pt)
193 if (!cpu_is_omap1510())
196 return is_omap1_8250(pt);
199 static inline int is_omap1_8250(struct uart_8250_port *pt)
203 static inline int is_omap1510_8250(struct uart_8250_port *pt)
209 #ifdef CONFIG_SERIAL_8250_DMA
210 extern int serial8250_tx_dma(struct uart_8250_port *);
211 extern int serial8250_rx_dma(struct uart_8250_port *);
212 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
213 extern int serial8250_request_dma(struct uart_8250_port *);
214 extern void serial8250_release_dma(struct uart_8250_port *);
216 static inline int serial8250_tx_dma(struct uart_8250_port *p)
220 static inline int serial8250_rx_dma(struct uart_8250_port *p)
224 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
225 static inline int serial8250_request_dma(struct uart_8250_port *p)
229 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
232 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
234 unsigned char status;
236 status = serial_in(up, 0x04); /* EXCR2 */
237 #define PRESL(x) ((x) & 0x30)
238 if (PRESL(status) == 0x10) {
239 /* already in high speed mode */
242 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
243 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
244 serial_out(up, 0x04, status);
249 static inline int serial_index(struct uart_port *port)
251 return port->minor - 64;