1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
16 #define USB4_DATA_DWORDS 16
17 #define USB4_DATA_RETRIES 3
20 USB4_SWITCH_OP_QUERY_DP_RESOURCE = 0x10,
21 USB4_SWITCH_OP_ALLOC_DP_RESOURCE = 0x11,
22 USB4_SWITCH_OP_DEALLOC_DP_RESOURCE = 0x12,
23 USB4_SWITCH_OP_NVM_WRITE = 0x20,
24 USB4_SWITCH_OP_NVM_AUTH = 0x21,
25 USB4_SWITCH_OP_NVM_READ = 0x22,
26 USB4_SWITCH_OP_NVM_SET_OFFSET = 0x23,
27 USB4_SWITCH_OP_DROM_READ = 0x24,
28 USB4_SWITCH_OP_NVM_SECTOR_SIZE = 0x25,
32 USB4_SB_TARGET_ROUTER,
33 USB4_SB_TARGET_PARTNER,
34 USB4_SB_TARGET_RETIMER,
37 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
38 #define USB4_NVM_READ_OFFSET_SHIFT 2
39 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
40 #define USB4_NVM_READ_LENGTH_SHIFT 24
42 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
43 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
45 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
46 #define USB4_DROM_ADDRESS_SHIFT 2
47 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
48 #define USB4_DROM_SIZE_SHIFT 15
50 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
52 typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
53 typedef int (*write_block_fn)(void *, const void *, size_t);
55 static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
56 u32 value, int timeout_msec)
58 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
64 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
68 if ((val & bit) == value)
71 usleep_range(50, 100);
72 } while (ktime_before(ktime_get(), timeout));
77 static int usb4_switch_op_read_data(struct tb_switch *sw, void *data,
80 if (dwords > USB4_DATA_DWORDS)
83 return tb_sw_read(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords);
86 static int usb4_switch_op_write_data(struct tb_switch *sw, const void *data,
89 if (dwords > USB4_DATA_DWORDS)
92 return tb_sw_write(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords);
95 static int usb4_switch_op_read_metadata(struct tb_switch *sw, u32 *metadata)
97 return tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
100 static int usb4_switch_op_write_metadata(struct tb_switch *sw, u32 metadata)
102 return tb_sw_write(sw, &metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
105 static int usb4_do_read_data(u16 address, void *buf, size_t size,
106 read_block_fn read_block, void *read_block_data)
108 unsigned int retries = USB4_DATA_RETRIES;
112 unsigned int dwaddress, dwords;
113 u8 data[USB4_DATA_DWORDS * 4];
117 offset = address & 3;
118 nbytes = min_t(size_t, size + offset, USB4_DATA_DWORDS * 4);
120 dwaddress = address / 4;
121 dwords = ALIGN(nbytes, 4) / 4;
123 ret = read_block(read_block_data, dwaddress, data, dwords);
125 if (ret != -ENODEV && retries--)
131 memcpy(buf, data + offset, nbytes);
141 static int usb4_do_write_data(unsigned int address, const void *buf, size_t size,
142 write_block_fn write_next_block, void *write_block_data)
144 unsigned int retries = USB4_DATA_RETRIES;
147 offset = address & 3;
148 address = address & ~3;
151 u32 nbytes = min_t(u32, size, USB4_DATA_DWORDS * 4);
152 u8 data[USB4_DATA_DWORDS * 4];
155 memcpy(data + offset, buf, nbytes);
157 ret = write_next_block(write_block_data, data, nbytes / 4);
159 if (ret == -ETIMEDOUT) {
175 static int usb4_switch_op(struct tb_switch *sw, u16 opcode, u8 *status)
180 val = opcode | ROUTER_CS_26_OV;
181 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
185 ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
189 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
193 if (val & ROUTER_CS_26_ONS)
196 *status = (val & ROUTER_CS_26_STATUS_MASK) >> ROUTER_CS_26_STATUS_SHIFT;
201 * usb4_switch_check_wakes() - Check for wakes and notify PM core about them
202 * @sw: Router whose wakes to check
204 * Checks wakes occurred during suspend and notify the PM core about them.
206 void usb4_switch_check_wakes(struct tb_switch *sw)
208 struct tb_port *port;
213 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
216 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
217 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
218 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
220 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
223 /* Check for any connected downstream ports for USB4 wake */
224 tb_switch_for_each_port(sw, port) {
225 if (!tb_port_has_remote(port))
228 if (tb_port_read(port, &val, TB_CFG_PORT,
229 port->cap_usb4 + PORT_CS_18, 1))
232 tb_port_dbg(port, "USB4 wake: %s\n",
233 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
235 if (val & PORT_CS_18_WOU4S)
240 pm_wakeup_event(&sw->dev, 0);
243 static bool link_is_usb4(struct tb_port *port)
250 if (tb_port_read(port, &val, TB_CFG_PORT,
251 port->cap_usb4 + PORT_CS_18, 1))
254 return !(val & PORT_CS_18_TCM);
258 * usb4_switch_setup() - Additional setup for USB4 device
259 * @sw: USB4 router to setup
261 * USB4 routers need additional settings in order to enable all the
262 * tunneling. This function enables USB and PCIe tunneling if it can be
263 * enabled (e.g the parent switch also supports them). If USB tunneling
264 * is not available for some reason (like that there is Thunderbolt 3
265 * switch upstream) then the internal xHCI controller is enabled
268 int usb4_switch_setup(struct tb_switch *sw)
270 struct tb_port *downstream_port;
271 struct tb_switch *parent;
279 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
283 parent = tb_switch_parent(sw);
284 downstream_port = tb_port_at(tb_route(sw), parent);
285 sw->link_usb4 = link_is_usb4(downstream_port);
286 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT3");
288 xhci = val & ROUTER_CS_6_HCI;
289 tbt3 = !(val & ROUTER_CS_6_TNS);
291 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
292 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
294 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
298 if (sw->link_usb4 && tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
299 val |= ROUTER_CS_5_UTO;
303 /* Only enable PCIe tunneling if the parent router supports it */
304 if (tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
305 val |= ROUTER_CS_5_PTO;
307 * xHCI can be enabled if PCIe tunneling is supported
308 * and the parent does not have any USB3 dowstream
309 * adapters (so we cannot do USB 3.x tunneling).
312 val |= ROUTER_CS_5_HCO;
315 /* TBT3 supported by the CM */
316 val |= ROUTER_CS_5_C3S;
317 /* Tunneling configuration is ready now */
318 val |= ROUTER_CS_5_CV;
320 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
324 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
329 * usb4_switch_read_uid() - Read UID from USB4 router
331 * @uid: UID is stored here
333 * Reads 64-bit UID from USB4 router config space.
335 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
337 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
340 static int usb4_switch_drom_read_block(void *data,
341 unsigned int dwaddress, void *buf,
344 struct tb_switch *sw = data;
349 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
350 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
351 USB4_DROM_ADDRESS_MASK;
353 ret = usb4_switch_op_write_metadata(sw, metadata);
357 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DROM_READ, &status);
364 return usb4_switch_op_read_data(sw, buf, dwords);
368 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
370 * @address: Byte address inside DROM to start reading
371 * @buf: Buffer where the DROM content is stored
372 * @size: Number of bytes to read from DROM
374 * Uses USB4 router operations to read router DROM. For devices this
375 * should always work but for hosts it may return %-EOPNOTSUPP in which
376 * case the host router does not have DROM.
378 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
381 return usb4_do_read_data(address, buf, size,
382 usb4_switch_drom_read_block, sw);
386 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
389 * Checks whether conditions are met so that lane bonding can be
390 * established with the upstream router. Call only for device routers.
392 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
398 up = tb_upstream_port(sw);
399 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
403 return !!(val & PORT_CS_18_BE);
407 * usb4_switch_set_wake() - Enabled/disable wake
409 * @flags: Wakeup flags (%0 to disable)
411 * Enables/disables router to wake up from sleep.
413 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
415 struct tb_port *port;
416 u64 route = tb_route(sw);
421 * Enable wakes coming from all USB4 downstream ports (from
422 * child routers). For device routers do this also for the
423 * upstream USB4 port.
425 tb_switch_for_each_port(sw, port) {
426 if (!tb_port_is_null(port))
428 if (!route && tb_is_upstream_port(port))
433 ret = tb_port_read(port, &val, TB_CFG_PORT,
434 port->cap_usb4 + PORT_CS_19, 1);
438 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
440 if (flags & TB_WAKE_ON_CONNECT)
441 val |= PORT_CS_19_WOC;
442 if (flags & TB_WAKE_ON_DISCONNECT)
443 val |= PORT_CS_19_WOD;
444 if (flags & TB_WAKE_ON_USB4)
445 val |= PORT_CS_19_WOU4;
447 ret = tb_port_write(port, &val, TB_CFG_PORT,
448 port->cap_usb4 + PORT_CS_19, 1);
454 * Enable wakes from PCIe and USB 3.x on this router. Only
455 * needed for device routers.
458 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
462 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU);
463 if (flags & TB_WAKE_ON_USB3)
464 val |= ROUTER_CS_5_WOU;
465 if (flags & TB_WAKE_ON_PCIE)
466 val |= ROUTER_CS_5_WOP;
468 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
477 * usb4_switch_set_sleep() - Prepare the router to enter sleep
480 * Sets sleep bit for the router. Returns when the router sleep ready
481 * bit has been asserted.
483 int usb4_switch_set_sleep(struct tb_switch *sw)
488 /* Set sleep bit and wait for sleep ready to be asserted */
489 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
493 val |= ROUTER_CS_5_SLP;
495 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
499 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
500 ROUTER_CS_6_SLPR, 500);
504 * usb4_switch_nvm_sector_size() - Return router NVM sector size
507 * If the router supports NVM operations this function returns the NVM
508 * sector size in bytes. If NVM operations are not supported returns
511 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
517 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &status);
522 return status == 0x2 ? -EOPNOTSUPP : -EIO;
524 ret = usb4_switch_op_read_metadata(sw, &metadata);
528 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
531 static int usb4_switch_nvm_read_block(void *data,
532 unsigned int dwaddress, void *buf, size_t dwords)
534 struct tb_switch *sw = data;
539 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
540 USB4_NVM_READ_LENGTH_MASK;
541 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
542 USB4_NVM_READ_OFFSET_MASK;
544 ret = usb4_switch_op_write_metadata(sw, metadata);
548 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_READ, &status);
555 return usb4_switch_op_read_data(sw, buf, dwords);
559 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
561 * @address: Starting address in bytes
562 * @buf: Read data is placed here
563 * @size: How many bytes to read
565 * Reads NVM contents of the router. If NVM is not supported returns
568 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
571 return usb4_do_read_data(address, buf, size,
572 usb4_switch_nvm_read_block, sw);
575 static int usb4_switch_nvm_set_offset(struct tb_switch *sw,
576 unsigned int address)
578 u32 metadata, dwaddress;
582 dwaddress = address / 4;
583 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
584 USB4_NVM_SET_OFFSET_MASK;
586 ret = usb4_switch_op_write_metadata(sw, metadata);
590 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &status);
594 return status ? -EIO : 0;
597 static int usb4_switch_nvm_write_next_block(void *data, const void *buf,
600 struct tb_switch *sw = data;
604 ret = usb4_switch_op_write_data(sw, buf, dwords);
608 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_WRITE, &status);
612 return status ? -EIO : 0;
616 * usb4_switch_nvm_write() - Write to the router NVM
618 * @address: Start address where to write in bytes
619 * @buf: Pointer to the data to write
620 * @size: Size of @buf in bytes
622 * Writes @buf to the router NVM using USB4 router operations. If NVM
623 * write is not supported returns %-EOPNOTSUPP.
625 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
626 const void *buf, size_t size)
630 ret = usb4_switch_nvm_set_offset(sw, address);
634 return usb4_do_write_data(address, buf, size,
635 usb4_switch_nvm_write_next_block, sw);
639 * usb4_switch_nvm_authenticate() - Authenticate new NVM
642 * After the new NVM has been written via usb4_switch_nvm_write(), this
643 * function triggers NVM authentication process. If the authentication
644 * is successful the router is power cycled and the new NVM starts
645 * running. In case of failure returns negative errno.
647 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
652 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, &status);
658 tb_sw_dbg(sw, "NVM authentication successful\n");
672 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
676 * For DP tunneling this function can be used to query availability of
677 * DP IN resource. Returns true if the resource is available for DP
678 * tunneling, false otherwise.
680 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
685 ret = usb4_switch_op_write_metadata(sw, in->port);
689 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &status);
691 * If DP resource allocation is not supported assume it is
694 if (ret == -EOPNOTSUPP)
703 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
707 * Allocates DP IN resource for DP tunneling using USB4 router
708 * operations. If the resource was allocated returns %0. Otherwise
709 * returns negative errno, in particular %-EBUSY if the resource is
712 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
717 ret = usb4_switch_op_write_metadata(sw, in->port);
721 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &status);
722 if (ret == -EOPNOTSUPP)
727 return status ? -EBUSY : 0;
731 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
735 * Releases the previously allocated DP IN resource.
737 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
742 ret = usb4_switch_op_write_metadata(sw, in->port);
746 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &status);
747 if (ret == -EOPNOTSUPP)
752 return status ? -EIO : 0;
755 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
760 /* Assume port is primary */
761 tb_switch_for_each_port(sw, p) {
762 if (!tb_port_is_null(p))
764 if (tb_is_upstream_port(p))
777 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
781 * USB4 routers have direct mapping between USB4 ports and PCIe
782 * downstream adapters where the PCIe topology is extended. This
783 * function returns the corresponding downstream PCIe adapter or %NULL
784 * if no such mapping was possible.
786 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
787 const struct tb_port *port)
789 int usb4_idx = usb4_port_idx(sw, port);
793 /* Find PCIe down port matching usb4_port */
794 tb_switch_for_each_port(sw, p) {
795 if (!tb_port_is_pcie_down(p))
798 if (pcie_idx == usb4_idx)
808 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
812 * USB4 routers have direct mapping between USB4 ports and USB 3.x
813 * downstream adapters where the USB 3.x topology is extended. This
814 * function returns the corresponding downstream USB 3.x adapter or
815 * %NULL if no such mapping was possible.
817 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
818 const struct tb_port *port)
820 int usb4_idx = usb4_port_idx(sw, port);
824 /* Find USB3 down port matching usb4_port */
825 tb_switch_for_each_port(sw, p) {
826 if (!tb_port_is_usb3_down(p))
829 if (usb_idx == usb4_idx)
839 * usb4_port_unlock() - Unlock USB4 downstream port
840 * @port: USB4 port to unlock
842 * Unlocks USB4 downstream port so that the connection manager can
843 * access the router below this port.
845 int usb4_port_unlock(struct tb_port *port)
850 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
854 val &= ~ADP_CS_4_LCK;
855 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
859 * usb4_port_hotplug_enable() - Enables hotplug for a port
860 * @port: USB4 port to operate on
862 * Enables hot plug events on a given port. This is only intended
863 * to be used on lane, DP-IN, and DP-OUT adapters.
865 int usb4_port_hotplug_enable(struct tb_port *port)
870 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
874 val &= ~ADP_CS_5_DHP;
875 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
878 static int usb4_port_set_configured(struct tb_port *port, bool configured)
886 ret = tb_port_read(port, &val, TB_CFG_PORT,
887 port->cap_usb4 + PORT_CS_19, 1);
892 val |= PORT_CS_19_PC;
894 val &= ~PORT_CS_19_PC;
896 return tb_port_write(port, &val, TB_CFG_PORT,
897 port->cap_usb4 + PORT_CS_19, 1);
901 * usb4_port_configure() - Set USB4 port configured
904 * Sets the USB4 link to be configured for power management purposes.
906 int usb4_port_configure(struct tb_port *port)
908 return usb4_port_set_configured(port, true);
912 * usb4_port_unconfigure() - Set USB4 port unconfigured
915 * Sets the USB4 link to be unconfigured for power management purposes.
917 void usb4_port_unconfigure(struct tb_port *port)
919 usb4_port_set_configured(port, false);
922 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
930 ret = tb_port_read(port, &val, TB_CFG_PORT,
931 port->cap_usb4 + PORT_CS_19, 1);
936 val |= PORT_CS_19_PID;
938 val &= ~PORT_CS_19_PID;
940 return tb_port_write(port, &val, TB_CFG_PORT,
941 port->cap_usb4 + PORT_CS_19, 1);
945 * usb4_port_configure_xdomain() - Configure port for XDomain
946 * @port: USB4 port connected to another host
948 * Marks the USB4 port as being connected to another host. Returns %0 in
949 * success and negative errno in failure.
951 int usb4_port_configure_xdomain(struct tb_port *port)
953 return usb4_set_xdomain_configured(port, true);
957 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
958 * @port: USB4 port that was connected to another host
960 * Clears USB4 port from being marked as XDomain.
962 void usb4_port_unconfigure_xdomain(struct tb_port *port)
964 usb4_set_xdomain_configured(port, false);
967 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
968 u32 value, int timeout_msec)
970 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
976 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
980 if ((val & bit) == value)
983 usleep_range(50, 100);
984 } while (ktime_before(ktime_get(), timeout));
989 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
991 if (dwords > USB4_DATA_DWORDS)
994 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
998 static int usb4_port_write_data(struct tb_port *port, const void *data,
1001 if (dwords > USB4_DATA_DWORDS)
1004 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1008 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1009 u8 index, u8 reg, void *buf, u8 size)
1011 size_t dwords = DIV_ROUND_UP(size, 4);
1015 if (!port->cap_usb4)
1019 val |= size << PORT_CS_1_LENGTH_SHIFT;
1020 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1021 if (target == USB4_SB_TARGET_RETIMER)
1022 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1023 val |= PORT_CS_1_PND;
1025 ret = tb_port_write(port, &val, TB_CFG_PORT,
1026 port->cap_usb4 + PORT_CS_1, 1);
1030 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1031 PORT_CS_1_PND, 0, 500);
1035 ret = tb_port_read(port, &val, TB_CFG_PORT,
1036 port->cap_usb4 + PORT_CS_1, 1);
1040 if (val & PORT_CS_1_NR)
1042 if (val & PORT_CS_1_RC)
1045 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1048 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1049 u8 index, u8 reg, const void *buf, u8 size)
1051 size_t dwords = DIV_ROUND_UP(size, 4);
1055 if (!port->cap_usb4)
1059 ret = usb4_port_write_data(port, buf, dwords);
1065 val |= size << PORT_CS_1_LENGTH_SHIFT;
1066 val |= PORT_CS_1_WNR_WRITE;
1067 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1068 if (target == USB4_SB_TARGET_RETIMER)
1069 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1070 val |= PORT_CS_1_PND;
1072 ret = tb_port_write(port, &val, TB_CFG_PORT,
1073 port->cap_usb4 + PORT_CS_1, 1);
1077 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1078 PORT_CS_1_PND, 0, 500);
1082 ret = tb_port_read(port, &val, TB_CFG_PORT,
1083 port->cap_usb4 + PORT_CS_1, 1);
1087 if (val & PORT_CS_1_NR)
1089 if (val & PORT_CS_1_RC)
1095 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1096 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1103 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1108 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1112 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1121 case USB4_SB_OPCODE_ERR:
1124 case USB4_SB_OPCODE_ONS:
1132 } while (ktime_before(ktime_get(), timeout));
1138 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1141 * This forces the USB4 port to send broadcast RT transaction which
1142 * makes the retimers on the link to assign index to themselves. Returns
1143 * %0 in case of success and negative errno if there was an error.
1145 int usb4_port_enumerate_retimers(struct tb_port *port)
1149 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1150 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1151 USB4_SB_OPCODE, &val, sizeof(val));
1154 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1155 enum usb4_sb_opcode opcode,
1158 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1163 * usb4_port_retimer_read() - Read from retimer sideband registers
1165 * @index: Retimer index
1166 * @reg: Sideband register to read
1167 * @buf: Data from @reg is stored here
1168 * @size: Number of bytes to read
1170 * Function reads retimer sideband registers starting from @reg. The
1171 * retimer is connected to @port at @index. Returns %0 in case of
1172 * success, and read data is copied to @buf. If there is no retimer
1173 * present at given @index returns %-ENODEV. In any other failure
1174 * returns negative errno.
1176 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1179 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1184 * usb4_port_retimer_write() - Write to retimer sideband registers
1186 * @index: Retimer index
1187 * @reg: Sideband register to write
1188 * @buf: Data that is written starting from @reg
1189 * @size: Number of bytes to write
1191 * Writes retimer sideband registers starting from @reg. The retimer is
1192 * connected to @port at @index. Returns %0 in case of success. If there
1193 * is no retimer present at given @index returns %-ENODEV. In any other
1194 * failure returns negative errno.
1196 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1197 const void *buf, u8 size)
1199 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1204 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1206 * @index: Retimer index
1208 * If the retimer at @index is last one (connected directly to the
1209 * Type-C port) this function returns %1. If it is not returns %0. If
1210 * the retimer is not present returns %-ENODEV. Otherwise returns
1213 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1218 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1223 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1225 return ret ? ret : metadata & 1;
1229 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1231 * @index: Retimer index
1233 * Reads NVM sector size (in bytes) of a retimer at @index. This
1234 * operation can be used to determine whether the retimer supports NVM
1235 * upgrade for example. Returns sector size in bytes or negative errno
1236 * in case of error. Specifically returns %-ENODEV if there is no
1237 * retimer at @index.
1239 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1244 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1249 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1251 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1254 static int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1255 unsigned int address)
1257 u32 metadata, dwaddress;
1260 dwaddress = address / 4;
1261 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1262 USB4_NVM_SET_OFFSET_MASK;
1264 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1269 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1273 struct retimer_info {
1274 struct tb_port *port;
1278 static int usb4_port_retimer_nvm_write_next_block(void *data, const void *buf,
1282 const struct retimer_info *info = data;
1283 struct tb_port *port = info->port;
1284 u8 index = info->index;
1287 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1292 return usb4_port_retimer_op(port, index,
1293 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1297 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1299 * @index: Retimer index
1300 * @address: Byte address where to start the write
1301 * @buf: Data to write
1302 * @size: Size in bytes how much to write
1304 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1305 * upgrade. Returns %0 if the data was written successfully and negative
1306 * errno in case of failure. Specifically returns %-ENODEV if there is
1307 * no retimer at @index.
1309 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1310 const void *buf, size_t size)
1312 struct retimer_info info = { .port = port, .index = index };
1315 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1319 return usb4_do_write_data(address, buf, size,
1320 usb4_port_retimer_nvm_write_next_block, &info);
1324 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1326 * @index: Retimer index
1328 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1329 * this function can be used to trigger the NVM upgrade process. If
1330 * successful the retimer restarts with the new NVM and may not have the
1331 * index set so one needs to call usb4_port_enumerate_retimers() to
1332 * force index to be assigned.
1334 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1339 * We need to use the raw operation here because once the
1340 * authentication completes the retimer index is not set anymore
1341 * so we do not get back the status now.
1343 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1344 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1345 USB4_SB_OPCODE, &val, sizeof(val));
1349 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1351 * @index: Retimer index
1352 * @status: Raw status code read from metadata
1354 * This can be called after usb4_port_retimer_nvm_authenticate() and
1355 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1357 * Returns %0 if the authentication status was successfully read. The
1358 * completion metadata (the result) is then stored into @status. If
1359 * reading the status fails, returns negative errno.
1361 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1367 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1377 case USB4_SB_OPCODE_ERR:
1378 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1379 &metadata, sizeof(metadata));
1383 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1386 case USB4_SB_OPCODE_ONS:
1394 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1395 void *buf, size_t dwords)
1397 const struct retimer_info *info = data;
1398 struct tb_port *port = info->port;
1399 u8 index = info->index;
1403 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1404 if (dwords < USB4_DATA_DWORDS)
1405 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1407 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1412 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1416 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1421 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1423 * @index: Retimer index
1424 * @address: NVM address (in bytes) to start reading
1425 * @buf: Data read from NVM is stored here
1426 * @size: Number of bytes to read
1428 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1429 * read was successful and negative errno in case of failure.
1430 * Specifically returns %-ENODEV if there is no retimer at @index.
1432 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1433 unsigned int address, void *buf, size_t size)
1435 struct retimer_info info = { .port = port, .index = index };
1437 return usb4_do_read_data(address, buf, size,
1438 usb4_port_retimer_nvm_read_block, &info);
1442 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1443 * @port: USB3 adapter port
1445 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1446 * Negative errno in case of error.
1448 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1453 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1456 ret = tb_port_read(port, &val, TB_CFG_PORT,
1457 port->cap_adap + ADP_USB3_CS_4, 1);
1461 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1462 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1466 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1467 * @port: USB3 adapter port
1469 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1470 * link is not up returns %0 and negative errno in case of failure.
1472 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1477 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1480 ret = tb_port_read(port, &val, TB_CFG_PORT,
1481 port->cap_adap + ADP_USB3_CS_4, 1);
1485 if (!(val & ADP_USB3_CS_4_ULV))
1488 lr = val & ADP_USB3_CS_4_ALR_MASK;
1489 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1492 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1497 if (!tb_port_is_usb3_down(port))
1499 if (tb_route(port->sw))
1502 ret = tb_port_read(port, &val, TB_CFG_PORT,
1503 port->cap_adap + ADP_USB3_CS_2, 1);
1508 val |= ADP_USB3_CS_2_CMR;
1510 val &= ~ADP_USB3_CS_2_CMR;
1512 ret = tb_port_write(port, &val, TB_CFG_PORT,
1513 port->cap_adap + ADP_USB3_CS_2, 1);
1518 * We can use val here directly as the CMR bit is in the same place
1519 * as HCA. Just mask out others.
1521 val &= ADP_USB3_CS_2_CMR;
1522 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1523 ADP_USB3_CS_1_HCA, val, 1500);
1526 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1528 return usb4_usb3_port_cm_request(port, true);
1531 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1533 return usb4_usb3_port_cm_request(port, false);
1536 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1538 unsigned long uframes;
1540 uframes = bw * 512UL << scale;
1541 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1544 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1546 unsigned long uframes;
1548 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1549 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
1550 return DIV_ROUND_UP(uframes, 512UL << scale);
1553 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1560 ret = tb_port_read(port, &val, TB_CFG_PORT,
1561 port->cap_adap + ADP_USB3_CS_2, 1);
1565 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1566 port->cap_adap + ADP_USB3_CS_3, 1);
1570 scale &= ADP_USB3_CS_3_SCALE_MASK;
1572 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1573 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1575 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1576 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1582 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1583 * @port: USB3 adapter port
1584 * @upstream_bw: Allocated upstream bandwidth is stored here
1585 * @downstream_bw: Allocated downstream bandwidth is stored here
1587 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1588 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
1591 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1596 ret = usb4_usb3_port_set_cm_request(port);
1600 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
1602 usb4_usb3_port_clear_cm_request(port);
1607 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
1614 ret = tb_port_read(port, &val, TB_CFG_PORT,
1615 port->cap_adap + ADP_USB3_CS_1, 1);
1619 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1620 port->cap_adap + ADP_USB3_CS_3, 1);
1624 scale &= ADP_USB3_CS_3_SCALE_MASK;
1626 bw = val & ADP_USB3_CS_1_CUBW_MASK;
1627 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1629 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
1630 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1635 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
1639 u32 val, ubw, dbw, scale;
1642 /* Figure out suitable scale */
1644 max_bw = max(upstream_bw, downstream_bw);
1645 while (scale < 64) {
1646 if (mbps_to_usb3_bw(max_bw, scale) < 4096)
1651 if (WARN_ON(scale >= 64))
1654 ret = tb_port_write(port, &scale, TB_CFG_PORT,
1655 port->cap_adap + ADP_USB3_CS_3, 1);
1659 ubw = mbps_to_usb3_bw(upstream_bw, scale);
1660 dbw = mbps_to_usb3_bw(downstream_bw, scale);
1662 tb_port_dbg(port, "scaled bandwidth %u/%u, scale %u\n", ubw, dbw, scale);
1664 ret = tb_port_read(port, &val, TB_CFG_PORT,
1665 port->cap_adap + ADP_USB3_CS_2, 1);
1669 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
1670 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
1673 return tb_port_write(port, &val, TB_CFG_PORT,
1674 port->cap_adap + ADP_USB3_CS_2, 1);
1678 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
1679 * @port: USB3 adapter port
1680 * @upstream_bw: New upstream bandwidth
1681 * @downstream_bw: New downstream bandwidth
1683 * This can be used to set how much bandwidth is allocated for the USB3
1684 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
1685 * new values programmed to the USB3 adapter allocation registers. If
1686 * the values are lower than what is currently consumed the allocation
1687 * is set to what is currently consumed instead (consumed bandwidth
1688 * cannot be taken away by CM). The actual new values are returned in
1689 * @upstream_bw and @downstream_bw.
1691 * Returns %0 in case of success and negative errno if there was a
1694 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1697 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
1699 ret = usb4_usb3_port_set_cm_request(port);
1703 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1708 /* Don't allow it go lower than what is consumed */
1709 allocate_up = max(*upstream_bw, consumed_up);
1710 allocate_down = max(*downstream_bw, consumed_down);
1712 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
1717 *upstream_bw = allocate_up;
1718 *downstream_bw = allocate_down;
1721 usb4_usb3_port_clear_cm_request(port);
1726 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
1727 * @port: USB3 adapter port
1728 * @upstream_bw: New allocated upstream bandwidth
1729 * @downstream_bw: New allocated downstream bandwidth
1731 * Releases USB3 allocated bandwidth down to what is actually consumed.
1732 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
1734 * Returns 0% in success and negative errno in case of failure.
1736 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1739 int ret, consumed_up, consumed_down;
1741 ret = usb4_usb3_port_set_cm_request(port);
1745 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1751 * Always keep 1000 Mb/s to make sure xHCI has at least some
1752 * bandwidth available for isochronous traffic.
1754 if (consumed_up < 1000)
1756 if (consumed_down < 1000)
1757 consumed_down = 1000;
1759 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
1764 *upstream_bw = consumed_up;
1765 *downstream_bw = consumed_down;
1768 usb4_usb3_port_clear_cm_request(port);