1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
12 #include <linux/units.h>
17 #define USB4_DATA_RETRIES 3
18 #define USB4_DATA_DWORDS 16
21 USB4_SB_TARGET_ROUTER,
22 USB4_SB_TARGET_PARTNER,
23 USB4_SB_TARGET_RETIMER,
26 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
27 #define USB4_NVM_READ_OFFSET_SHIFT 2
28 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
29 #define USB4_NVM_READ_LENGTH_SHIFT 24
31 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
32 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
34 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
35 #define USB4_DROM_ADDRESS_SHIFT 2
36 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
37 #define USB4_DROM_SIZE_SHIFT 15
39 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
41 #define USB4_BA_LENGTH_MASK GENMASK(7, 0)
42 #define USB4_BA_INDEX_MASK GENMASK(15, 0)
45 USB4_BA_MAX_USB3 = 0x1,
46 USB4_BA_MIN_DP_AUX = 0x2,
47 USB4_BA_MIN_DP_MAIN = 0x3,
48 USB4_BA_MAX_PCIE = 0x4,
52 #define USB4_BA_VALUE_MASK GENMASK(31, 16)
53 #define USB4_BA_VALUE_SHIFT 16
55 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
56 u32 *metadata, u8 *status,
57 const void *tx_data, size_t tx_dwords,
58 void *rx_data, size_t rx_dwords)
64 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
69 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
75 val = opcode | ROUTER_CS_26_OV;
76 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
80 ret = tb_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
84 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
88 if (val & ROUTER_CS_26_ONS)
92 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
93 ROUTER_CS_26_STATUS_SHIFT;
96 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
101 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
110 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
111 u8 *status, const void *tx_data, size_t tx_dwords,
112 void *rx_data, size_t rx_dwords)
114 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
116 if (tx_dwords > USB4_DATA_DWORDS || rx_dwords > USB4_DATA_DWORDS)
120 * If the connection manager implementation provides USB4 router
121 * operation proxy callback, call it here instead of running the
122 * operation natively.
124 if (cm_ops->usb4_switch_op) {
127 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
128 tx_data, tx_dwords, rx_data,
130 if (ret != -EOPNOTSUPP)
134 * If the proxy was not supported then run the native
135 * router operation instead.
139 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
140 tx_dwords, rx_data, rx_dwords);
143 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
144 u32 *metadata, u8 *status)
146 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
149 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
150 u32 *metadata, u8 *status,
151 const void *tx_data, size_t tx_dwords,
152 void *rx_data, size_t rx_dwords)
154 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
155 tx_dwords, rx_data, rx_dwords);
158 static void usb4_switch_check_wakes(struct tb_switch *sw)
160 bool wakeup_usb4 = false;
161 struct usb4_port *usb4;
162 struct tb_port *port;
166 if (!device_may_wakeup(&sw->dev))
170 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
173 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
174 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
175 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
177 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
181 * Check for any downstream ports for USB4 wake,
182 * connection wake and disconnection wake.
184 tb_switch_for_each_port(sw, port) {
188 if (tb_port_read(port, &val, TB_CFG_PORT,
189 port->cap_usb4 + PORT_CS_18, 1))
192 tb_port_dbg(port, "USB4 wake: %s, connection wake: %s, disconnection wake: %s\n",
193 (val & PORT_CS_18_WOU4S) ? "yes" : "no",
194 (val & PORT_CS_18_WOCS) ? "yes" : "no",
195 (val & PORT_CS_18_WODS) ? "yes" : "no");
197 wakeup_usb4 = val & (PORT_CS_18_WOU4S | PORT_CS_18_WOCS |
201 if (device_may_wakeup(&usb4->dev) && wakeup_usb4)
202 pm_wakeup_event(&usb4->dev, 0);
204 wakeup |= wakeup_usb4;
208 pm_wakeup_event(&sw->dev, 0);
211 static bool link_is_usb4(struct tb_port *port)
218 if (tb_port_read(port, &val, TB_CFG_PORT,
219 port->cap_usb4 + PORT_CS_18, 1))
222 return !(val & PORT_CS_18_TCM);
226 * usb4_switch_setup() - Additional setup for USB4 device
227 * @sw: USB4 router to setup
229 * USB4 routers need additional settings in order to enable all the
230 * tunneling. This function enables USB and PCIe tunneling if it can be
231 * enabled (e.g the parent switch also supports them). If USB tunneling
232 * is not available for some reason (like that there is Thunderbolt 3
233 * switch upstream) then the internal xHCI controller is enabled
236 * This does not set the configuration valid bit of the router. To do
237 * that call usb4_switch_configuration_valid().
239 int usb4_switch_setup(struct tb_switch *sw)
241 struct tb_switch *parent = tb_switch_parent(sw);
242 struct tb_port *down;
247 usb4_switch_check_wakes(sw);
252 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
256 down = tb_switch_downstream_port(sw);
257 sw->link_usb4 = link_is_usb4(down);
258 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT");
260 xhci = val & ROUTER_CS_6_HCI;
261 tbt3 = !(val & ROUTER_CS_6_TNS);
263 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
264 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
266 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
270 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
271 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
272 val |= ROUTER_CS_5_UTO;
277 * Only enable PCIe tunneling if the parent router supports it
278 * and it is not disabled.
280 if (tb_acpi_may_tunnel_pcie() &&
281 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
282 val |= ROUTER_CS_5_PTO;
284 * xHCI can be enabled if PCIe tunneling is supported
285 * and the parent does not have any USB3 dowstream
286 * adapters (so we cannot do USB 3.x tunneling).
289 val |= ROUTER_CS_5_HCO;
292 /* TBT3 supported by the CM */
293 val &= ~ROUTER_CS_5_CNS;
295 return tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
299 * usb4_switch_configuration_valid() - Set tunneling configuration to be valid
302 * Sets configuration valid bit for the router. Must be called before
303 * any tunnels can be set through the router and after
304 * usb4_switch_setup() has been called. Can be called to host and device
305 * routers (does nothing for the latter).
307 * Returns %0 in success and negative errno otherwise.
309 int usb4_switch_configuration_valid(struct tb_switch *sw)
317 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
321 val |= ROUTER_CS_5_CV;
323 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
327 return tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
332 * usb4_switch_read_uid() - Read UID from USB4 router
334 * @uid: UID is stored here
336 * Reads 64-bit UID from USB4 router config space.
338 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
340 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
343 static int usb4_switch_drom_read_block(void *data,
344 unsigned int dwaddress, void *buf,
347 struct tb_switch *sw = data;
352 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
353 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
354 USB4_DROM_ADDRESS_MASK;
356 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
357 &status, NULL, 0, buf, dwords);
361 return status ? -EIO : 0;
365 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
367 * @address: Byte address inside DROM to start reading
368 * @buf: Buffer where the DROM content is stored
369 * @size: Number of bytes to read from DROM
371 * Uses USB4 router operations to read router DROM. For devices this
372 * should always work but for hosts it may return %-EOPNOTSUPP in which
373 * case the host router does not have DROM.
375 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
378 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
379 usb4_switch_drom_read_block, sw);
383 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
386 * Checks whether conditions are met so that lane bonding can be
387 * established with the upstream router. Call only for device routers.
389 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
395 up = tb_upstream_port(sw);
396 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
400 return !!(val & PORT_CS_18_BE);
404 * usb4_switch_set_wake() - Enabled/disable wake
406 * @flags: Wakeup flags (%0 to disable)
408 * Enables/disables router to wake up from sleep.
410 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
412 struct usb4_port *usb4;
413 struct tb_port *port;
414 u64 route = tb_route(sw);
419 * Enable wakes coming from all USB4 downstream ports (from
420 * child routers). For device routers do this also for the
421 * upstream USB4 port.
423 tb_switch_for_each_port(sw, port) {
424 if (!tb_port_is_null(port))
426 if (!route && tb_is_upstream_port(port))
431 ret = tb_port_read(port, &val, TB_CFG_PORT,
432 port->cap_usb4 + PORT_CS_19, 1);
436 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
438 if (tb_is_upstream_port(port)) {
439 val |= PORT_CS_19_WOU4;
441 bool configured = val & PORT_CS_19_PC;
444 if (((flags & TB_WAKE_ON_CONNECT) |
445 device_may_wakeup(&usb4->dev)) && !configured)
446 val |= PORT_CS_19_WOC;
447 if (((flags & TB_WAKE_ON_DISCONNECT) |
448 device_may_wakeup(&usb4->dev)) && configured)
449 val |= PORT_CS_19_WOD;
450 if ((flags & TB_WAKE_ON_USB4) && configured)
451 val |= PORT_CS_19_WOU4;
454 ret = tb_port_write(port, &val, TB_CFG_PORT,
455 port->cap_usb4 + PORT_CS_19, 1);
461 * Enable wakes from PCIe, USB 3.x and DP on this router. Only
462 * needed for device routers.
465 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
469 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU | ROUTER_CS_5_WOD);
470 if (flags & TB_WAKE_ON_USB3)
471 val |= ROUTER_CS_5_WOU;
472 if (flags & TB_WAKE_ON_PCIE)
473 val |= ROUTER_CS_5_WOP;
474 if (flags & TB_WAKE_ON_DP)
475 val |= ROUTER_CS_5_WOD;
477 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
486 * usb4_switch_set_sleep() - Prepare the router to enter sleep
489 * Sets sleep bit for the router. Returns when the router sleep ready
490 * bit has been asserted.
492 int usb4_switch_set_sleep(struct tb_switch *sw)
497 /* Set sleep bit and wait for sleep ready to be asserted */
498 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
502 val |= ROUTER_CS_5_SLP;
504 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
508 return tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
509 ROUTER_CS_6_SLPR, 500);
513 * usb4_switch_nvm_sector_size() - Return router NVM sector size
516 * If the router supports NVM operations this function returns the NVM
517 * sector size in bytes. If NVM operations are not supported returns
520 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
526 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
532 return status == 0x2 ? -EOPNOTSUPP : -EIO;
534 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
537 static int usb4_switch_nvm_read_block(void *data,
538 unsigned int dwaddress, void *buf, size_t dwords)
540 struct tb_switch *sw = data;
545 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
546 USB4_NVM_READ_LENGTH_MASK;
547 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
548 USB4_NVM_READ_OFFSET_MASK;
550 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
551 &status, NULL, 0, buf, dwords);
555 return status ? -EIO : 0;
559 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
561 * @address: Starting address in bytes
562 * @buf: Read data is placed here
563 * @size: How many bytes to read
565 * Reads NVM contents of the router. If NVM is not supported returns
568 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
571 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
572 usb4_switch_nvm_read_block, sw);
576 * usb4_switch_nvm_set_offset() - Set NVM write offset
578 * @address: Start offset
580 * Explicitly sets NVM write offset. Normally when writing to NVM this
581 * is done automatically by usb4_switch_nvm_write().
583 * Returns %0 in success and negative errno if there was a failure.
585 int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address)
587 u32 metadata, dwaddress;
591 dwaddress = address / 4;
592 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
593 USB4_NVM_SET_OFFSET_MASK;
595 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
600 return status ? -EIO : 0;
603 static int usb4_switch_nvm_write_next_block(void *data, unsigned int dwaddress,
604 const void *buf, size_t dwords)
606 struct tb_switch *sw = data;
610 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
611 buf, dwords, NULL, 0);
615 return status ? -EIO : 0;
619 * usb4_switch_nvm_write() - Write to the router NVM
621 * @address: Start address where to write in bytes
622 * @buf: Pointer to the data to write
623 * @size: Size of @buf in bytes
625 * Writes @buf to the router NVM using USB4 router operations. If NVM
626 * write is not supported returns %-EOPNOTSUPP.
628 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
629 const void *buf, size_t size)
633 ret = usb4_switch_nvm_set_offset(sw, address);
637 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
638 usb4_switch_nvm_write_next_block, sw);
642 * usb4_switch_nvm_authenticate() - Authenticate new NVM
645 * After the new NVM has been written via usb4_switch_nvm_write(), this
646 * function triggers NVM authentication process. The router gets power
647 * cycled and if the authentication is successful the new NVM starts
648 * running. In case of failure returns negative errno.
650 * The caller should call usb4_switch_nvm_authenticate_status() to read
651 * the status of the authentication after power cycle. It should be the
652 * first router operation to avoid the status being lost.
654 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
658 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
661 * The router is power cycled once NVM_AUTH is started so it is
662 * expected to get any of the following errors back.
675 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
677 * @status: Status code of the operation
679 * The function checks if there is status available from the last NVM
680 * authenticate router operation. If there is status then %0 is returned
681 * and the status code is placed in @status. Returns negative errno in case
684 * Must be called before any other router operation.
686 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
688 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
693 if (cm_ops->usb4_switch_nvm_authenticate_status) {
694 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
695 if (ret != -EOPNOTSUPP)
699 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
703 /* Check that the opcode is correct */
704 opcode = val & ROUTER_CS_26_OPCODE_MASK;
705 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
706 if (val & ROUTER_CS_26_OV)
708 if (val & ROUTER_CS_26_ONS)
711 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
712 ROUTER_CS_26_STATUS_SHIFT;
721 * usb4_switch_credits_init() - Read buffer allocation parameters
724 * Reads @sw buffer allocation parameters and initializes @sw buffer
725 * allocation fields accordingly. Specifically @sw->credits_allocation
726 * is set to %true if these parameters can be used in tunneling.
728 * Returns %0 on success and negative errno otherwise.
730 int usb4_switch_credits_init(struct tb_switch *sw)
732 int max_usb3, min_dp_aux, min_dp_main, max_pcie, max_dma;
733 int ret, length, i, nports;
734 const struct tb_port *port;
735 u32 data[USB4_DATA_DWORDS];
739 memset(data, 0, sizeof(data));
740 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_BUFFER_ALLOC, &metadata,
741 &status, NULL, 0, data, ARRAY_SIZE(data));
747 length = metadata & USB4_BA_LENGTH_MASK;
748 if (WARN_ON(length > ARRAY_SIZE(data)))
757 tb_sw_dbg(sw, "credit allocation parameters:\n");
759 for (i = 0; i < length; i++) {
762 index = data[i] & USB4_BA_INDEX_MASK;
763 value = (data[i] & USB4_BA_VALUE_MASK) >> USB4_BA_VALUE_SHIFT;
766 case USB4_BA_MAX_USB3:
767 tb_sw_dbg(sw, " USB3: %u\n", value);
770 case USB4_BA_MIN_DP_AUX:
771 tb_sw_dbg(sw, " DP AUX: %u\n", value);
774 case USB4_BA_MIN_DP_MAIN:
775 tb_sw_dbg(sw, " DP main: %u\n", value);
778 case USB4_BA_MAX_PCIE:
779 tb_sw_dbg(sw, " PCIe: %u\n", value);
783 tb_sw_dbg(sw, " DMA: %u\n", value);
787 tb_sw_dbg(sw, " unknown credit allocation index %#x, skipping\n",
794 * Validate the buffer allocation preferences. If we find
795 * issues, log a warning and fall back using the hard-coded
799 /* Host router must report baMaxHI */
800 if (!tb_route(sw) && max_dma < 0) {
801 tb_sw_warn(sw, "host router is missing baMaxHI\n");
806 tb_switch_for_each_port(sw, port) {
807 if (tb_port_is_null(port))
811 /* Must have DP buffer allocation (multiple USB4 ports) */
812 if (nports > 2 && (min_dp_aux < 0 || min_dp_main < 0)) {
813 tb_sw_warn(sw, "multiple USB4 ports require baMinDPaux/baMinDPmain\n");
817 tb_switch_for_each_port(sw, port) {
818 if (tb_port_is_dpout(port) && min_dp_main < 0) {
819 tb_sw_warn(sw, "missing baMinDPmain");
822 if ((tb_port_is_dpin(port) || tb_port_is_dpout(port)) &&
824 tb_sw_warn(sw, "missing baMinDPaux");
827 if ((tb_port_is_usb3_down(port) || tb_port_is_usb3_up(port)) &&
829 tb_sw_warn(sw, "missing baMaxUSB3");
832 if ((tb_port_is_pcie_down(port) || tb_port_is_pcie_up(port)) &&
834 tb_sw_warn(sw, "missing baMaxPCIe");
840 * Buffer allocation passed the validation so we can use it in
843 sw->credit_allocation = true;
845 sw->max_usb3_credits = max_usb3;
847 sw->min_dp_aux_credits = min_dp_aux;
849 sw->min_dp_main_credits = min_dp_main;
851 sw->max_pcie_credits = max_pcie;
853 sw->max_dma_credits = max_dma;
862 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
866 * For DP tunneling this function can be used to query availability of
867 * DP IN resource. Returns true if the resource is available for DP
868 * tunneling, false otherwise.
870 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
872 u32 metadata = in->port;
876 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
879 * If DP resource allocation is not supported assume it is
882 if (ret == -EOPNOTSUPP)
891 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
895 * Allocates DP IN resource for DP tunneling using USB4 router
896 * operations. If the resource was allocated returns %0. Otherwise
897 * returns negative errno, in particular %-EBUSY if the resource is
900 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
902 u32 metadata = in->port;
906 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
908 if (ret == -EOPNOTSUPP)
913 return status ? -EBUSY : 0;
917 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
921 * Releases the previously allocated DP IN resource.
923 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
925 u32 metadata = in->port;
929 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
931 if (ret == -EOPNOTSUPP)
936 return status ? -EIO : 0;
939 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
944 /* Assume port is primary */
945 tb_switch_for_each_port(sw, p) {
946 if (!tb_port_is_null(p))
948 if (tb_is_upstream_port(p))
961 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
965 * USB4 routers have direct mapping between USB4 ports and PCIe
966 * downstream adapters where the PCIe topology is extended. This
967 * function returns the corresponding downstream PCIe adapter or %NULL
968 * if no such mapping was possible.
970 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
971 const struct tb_port *port)
973 int usb4_idx = usb4_port_idx(sw, port);
977 /* Find PCIe down port matching usb4_port */
978 tb_switch_for_each_port(sw, p) {
979 if (!tb_port_is_pcie_down(p))
982 if (pcie_idx == usb4_idx)
992 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
996 * USB4 routers have direct mapping between USB4 ports and USB 3.x
997 * downstream adapters where the USB 3.x topology is extended. This
998 * function returns the corresponding downstream USB 3.x adapter or
999 * %NULL if no such mapping was possible.
1001 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1002 const struct tb_port *port)
1004 int usb4_idx = usb4_port_idx(sw, port);
1008 /* Find USB3 down port matching usb4_port */
1009 tb_switch_for_each_port(sw, p) {
1010 if (!tb_port_is_usb3_down(p))
1013 if (usb_idx == usb4_idx)
1023 * usb4_switch_add_ports() - Add USB4 ports for this router
1026 * For USB4 router finds all USB4 ports and registers devices for each.
1027 * Can be called to any router.
1029 * Return %0 in case of success and negative errno in case of failure.
1031 int usb4_switch_add_ports(struct tb_switch *sw)
1033 struct tb_port *port;
1035 if (tb_switch_is_icm(sw) || !tb_switch_is_usb4(sw))
1038 tb_switch_for_each_port(sw, port) {
1039 struct usb4_port *usb4;
1041 if (!tb_port_is_null(port))
1043 if (!port->cap_usb4)
1046 usb4 = usb4_port_device_add(port);
1048 usb4_switch_remove_ports(sw);
1049 return PTR_ERR(usb4);
1059 * usb4_switch_remove_ports() - Removes USB4 ports from this router
1062 * Unregisters previously registered USB4 ports.
1064 void usb4_switch_remove_ports(struct tb_switch *sw)
1066 struct tb_port *port;
1068 tb_switch_for_each_port(sw, port) {
1070 usb4_port_device_remove(port->usb4);
1077 * usb4_port_unlock() - Unlock USB4 downstream port
1078 * @port: USB4 port to unlock
1080 * Unlocks USB4 downstream port so that the connection manager can
1081 * access the router below this port.
1083 int usb4_port_unlock(struct tb_port *port)
1088 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1092 val &= ~ADP_CS_4_LCK;
1093 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1097 * usb4_port_hotplug_enable() - Enables hotplug for a port
1098 * @port: USB4 port to operate on
1100 * Enables hot plug events on a given port. This is only intended
1101 * to be used on lane, DP-IN, and DP-OUT adapters.
1103 int usb4_port_hotplug_enable(struct tb_port *port)
1108 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1112 val &= ~ADP_CS_5_DHP;
1113 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1116 static int usb4_port_set_configured(struct tb_port *port, bool configured)
1121 if (!port->cap_usb4)
1124 ret = tb_port_read(port, &val, TB_CFG_PORT,
1125 port->cap_usb4 + PORT_CS_19, 1);
1130 val |= PORT_CS_19_PC;
1132 val &= ~PORT_CS_19_PC;
1134 return tb_port_write(port, &val, TB_CFG_PORT,
1135 port->cap_usb4 + PORT_CS_19, 1);
1139 * usb4_port_configure() - Set USB4 port configured
1140 * @port: USB4 router
1142 * Sets the USB4 link to be configured for power management purposes.
1144 int usb4_port_configure(struct tb_port *port)
1146 return usb4_port_set_configured(port, true);
1150 * usb4_port_unconfigure() - Set USB4 port unconfigured
1151 * @port: USB4 router
1153 * Sets the USB4 link to be unconfigured for power management purposes.
1155 void usb4_port_unconfigure(struct tb_port *port)
1157 usb4_port_set_configured(port, false);
1160 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
1165 if (!port->cap_usb4)
1168 ret = tb_port_read(port, &val, TB_CFG_PORT,
1169 port->cap_usb4 + PORT_CS_19, 1);
1174 val |= PORT_CS_19_PID;
1176 val &= ~PORT_CS_19_PID;
1178 return tb_port_write(port, &val, TB_CFG_PORT,
1179 port->cap_usb4 + PORT_CS_19, 1);
1183 * usb4_port_configure_xdomain() - Configure port for XDomain
1184 * @port: USB4 port connected to another host
1185 * @xd: XDomain that is connected to the port
1187 * Marks the USB4 port as being connected to another host and updates
1188 * the link type. Returns %0 in success and negative errno in failure.
1190 int usb4_port_configure_xdomain(struct tb_port *port, struct tb_xdomain *xd)
1192 xd->link_usb4 = link_is_usb4(port);
1193 return usb4_set_xdomain_configured(port, true);
1197 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
1198 * @port: USB4 port that was connected to another host
1200 * Clears USB4 port from being marked as XDomain.
1202 void usb4_port_unconfigure_xdomain(struct tb_port *port)
1204 usb4_set_xdomain_configured(port, false);
1207 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1208 u32 value, int timeout_msec)
1210 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1216 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1220 if ((val & bit) == value)
1223 usleep_range(50, 100);
1224 } while (ktime_before(ktime_get(), timeout));
1229 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1231 if (dwords > USB4_DATA_DWORDS)
1234 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1238 static int usb4_port_write_data(struct tb_port *port, const void *data,
1241 if (dwords > USB4_DATA_DWORDS)
1244 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1248 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1249 u8 index, u8 reg, void *buf, u8 size)
1251 size_t dwords = DIV_ROUND_UP(size, 4);
1255 if (!port->cap_usb4)
1259 val |= size << PORT_CS_1_LENGTH_SHIFT;
1260 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1261 if (target == USB4_SB_TARGET_RETIMER)
1262 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1263 val |= PORT_CS_1_PND;
1265 ret = tb_port_write(port, &val, TB_CFG_PORT,
1266 port->cap_usb4 + PORT_CS_1, 1);
1270 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1271 PORT_CS_1_PND, 0, 500);
1275 ret = tb_port_read(port, &val, TB_CFG_PORT,
1276 port->cap_usb4 + PORT_CS_1, 1);
1280 if (val & PORT_CS_1_NR)
1282 if (val & PORT_CS_1_RC)
1285 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1288 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1289 u8 index, u8 reg, const void *buf, u8 size)
1291 size_t dwords = DIV_ROUND_UP(size, 4);
1295 if (!port->cap_usb4)
1299 ret = usb4_port_write_data(port, buf, dwords);
1305 val |= size << PORT_CS_1_LENGTH_SHIFT;
1306 val |= PORT_CS_1_WNR_WRITE;
1307 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1308 if (target == USB4_SB_TARGET_RETIMER)
1309 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1310 val |= PORT_CS_1_PND;
1312 ret = tb_port_write(port, &val, TB_CFG_PORT,
1313 port->cap_usb4 + PORT_CS_1, 1);
1317 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1318 PORT_CS_1_PND, 0, 500);
1322 ret = tb_port_read(port, &val, TB_CFG_PORT,
1323 port->cap_usb4 + PORT_CS_1, 1);
1327 if (val & PORT_CS_1_NR)
1329 if (val & PORT_CS_1_RC)
1335 static int usb4_port_sb_opcode_err_to_errno(u32 val)
1340 case USB4_SB_OPCODE_ERR:
1342 case USB4_SB_OPCODE_ONS:
1349 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1350 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1357 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1362 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1366 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1372 return usb4_port_sb_opcode_err_to_errno(val);
1373 } while (ktime_before(ktime_get(), timeout));
1378 static int usb4_port_set_router_offline(struct tb_port *port, bool offline)
1383 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1384 USB4_SB_METADATA, &val, sizeof(val));
1388 val = USB4_SB_OPCODE_ROUTER_OFFLINE;
1389 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1390 USB4_SB_OPCODE, &val, sizeof(val));
1394 * usb4_port_router_offline() - Put the USB4 port to offline mode
1397 * This function puts the USB4 port into offline mode. In this mode the
1398 * port does not react on hotplug events anymore. This needs to be
1399 * called before retimer access is done when the USB4 links is not up.
1401 * Returns %0 in case of success and negative errno if there was an
1404 int usb4_port_router_offline(struct tb_port *port)
1406 return usb4_port_set_router_offline(port, true);
1410 * usb4_port_router_online() - Put the USB4 port back to online
1413 * Makes the USB4 port functional again.
1415 int usb4_port_router_online(struct tb_port *port)
1417 return usb4_port_set_router_offline(port, false);
1421 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1424 * This forces the USB4 port to send broadcast RT transaction which
1425 * makes the retimers on the link to assign index to themselves. Returns
1426 * %0 in case of success and negative errno if there was an error.
1428 int usb4_port_enumerate_retimers(struct tb_port *port)
1432 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1433 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1434 USB4_SB_OPCODE, &val, sizeof(val));
1438 * usb4_port_clx_supported() - Check if CLx is supported by the link
1439 * @port: Port to check for CLx support for
1441 * PORT_CS_18_CPS bit reflects if the link supports CLx including
1442 * active cables (if connected on the link).
1444 bool usb4_port_clx_supported(struct tb_port *port)
1449 ret = tb_port_read(port, &val, TB_CFG_PORT,
1450 port->cap_usb4 + PORT_CS_18, 1);
1454 return !!(val & PORT_CS_18_CPS);
1458 * usb4_port_asym_supported() - If the port supports asymmetric link
1461 * Checks if the port and the cable supports asymmetric link and returns
1462 * %true in that case.
1464 bool usb4_port_asym_supported(struct tb_port *port)
1468 if (!port->cap_usb4)
1471 if (tb_port_read(port, &val, TB_CFG_PORT, port->cap_usb4 + PORT_CS_18, 1))
1474 return !!(val & PORT_CS_18_CSA);
1478 * usb4_port_asym_set_link_width() - Set link width to asymmetric or symmetric
1480 * @width: Asymmetric width to configure
1482 * Sets USB4 port link width to @width. Can be called for widths where
1483 * usb4_port_asym_width_supported() returned @true.
1485 int usb4_port_asym_set_link_width(struct tb_port *port, enum tb_link_width width)
1493 ret = tb_port_read(port, &val, TB_CFG_PORT,
1494 port->cap_phy + LANE_ADP_CS_1, 1);
1498 val &= ~LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK;
1500 case TB_LINK_WIDTH_DUAL:
1501 val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK,
1502 LANE_ADP_CS_1_TARGET_WIDTH_ASYM_DUAL);
1504 case TB_LINK_WIDTH_ASYM_TX:
1505 val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK,
1506 LANE_ADP_CS_1_TARGET_WIDTH_ASYM_TX);
1508 case TB_LINK_WIDTH_ASYM_RX:
1509 val |= FIELD_PREP(LANE_ADP_CS_1_TARGET_WIDTH_ASYM_MASK,
1510 LANE_ADP_CS_1_TARGET_WIDTH_ASYM_RX);
1516 return tb_port_write(port, &val, TB_CFG_PORT,
1517 port->cap_phy + LANE_ADP_CS_1, 1);
1521 * usb4_port_asym_start() - Start symmetry change and wait for completion
1524 * Start symmetry change of the link to asymmetric or symmetric
1525 * (according to what was previously set in tb_port_set_link_width().
1526 * Wait for completion of the change.
1528 * Returns %0 in case of success, %-ETIMEDOUT if case of timeout or
1529 * a negative errno in case of a failure.
1531 int usb4_port_asym_start(struct tb_port *port)
1536 ret = tb_port_read(port, &val, TB_CFG_PORT,
1537 port->cap_usb4 + PORT_CS_19, 1);
1541 val &= ~PORT_CS_19_START_ASYM;
1542 val |= FIELD_PREP(PORT_CS_19_START_ASYM, 1);
1544 ret = tb_port_write(port, &val, TB_CFG_PORT,
1545 port->cap_usb4 + PORT_CS_19, 1);
1550 * Wait for PORT_CS_19_START_ASYM to be 0. This means the USB4
1551 * port started the symmetry transition.
1553 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_19,
1554 PORT_CS_19_START_ASYM, 0, 1000);
1558 /* Then wait for the transtion to be completed */
1559 return usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_18,
1560 PORT_CS_18_TIP, 0, 5000);
1564 * usb4_port_margining_caps() - Read USB4 port marginig capabilities
1566 * @caps: Array with at least two elements to hold the results
1568 * Reads the USB4 port lane margining capabilities into @caps.
1570 int usb4_port_margining_caps(struct tb_port *port, u32 *caps)
1574 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1575 USB4_SB_OPCODE_READ_LANE_MARGINING_CAP, 500);
1579 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1580 USB4_SB_DATA, caps, sizeof(*caps) * 2);
1584 * usb4_port_hw_margin() - Run hardware lane margining on port
1586 * @lanes: Which lanes to run (must match the port capabilities). Can be
1588 * @ber_level: BER level contour value
1589 * @timing: Perform timing margining instead of voltage
1590 * @right_high: Use Right/high margin instead of left/low
1591 * @results: Array with at least two elements to hold the results
1593 * Runs hardware lane margining on USB4 port and returns the result in
1596 int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes,
1597 unsigned int ber_level, bool timing, bool right_high,
1605 val |= USB4_MARGIN_HW_TIME;
1607 val |= USB4_MARGIN_HW_RH;
1609 val |= (ber_level << USB4_MARGIN_HW_BER_SHIFT) &
1610 USB4_MARGIN_HW_BER_MASK;
1612 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1613 USB4_SB_METADATA, &val, sizeof(val));
1617 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1618 USB4_SB_OPCODE_RUN_HW_LANE_MARGINING, 2500);
1622 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1623 USB4_SB_DATA, results, sizeof(*results) * 2);
1627 * usb4_port_sw_margin() - Run software lane margining on port
1629 * @lanes: Which lanes to run (must match the port capabilities). Can be
1631 * @timing: Perform timing margining instead of voltage
1632 * @right_high: Use Right/high margin instead of left/low
1633 * @counter: What to do with the error counter
1635 * Runs software lane margining on USB4 port. Read back the error
1636 * counters by calling usb4_port_sw_margin_errors(). Returns %0 in
1637 * success and negative errno otherwise.
1639 int usb4_port_sw_margin(struct tb_port *port, unsigned int lanes, bool timing,
1640 bool right_high, u32 counter)
1647 val |= USB4_MARGIN_SW_TIME;
1649 val |= USB4_MARGIN_SW_RH;
1650 val |= (counter << USB4_MARGIN_SW_COUNTER_SHIFT) &
1651 USB4_MARGIN_SW_COUNTER_MASK;
1653 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1654 USB4_SB_METADATA, &val, sizeof(val));
1658 return usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1659 USB4_SB_OPCODE_RUN_SW_LANE_MARGINING, 2500);
1663 * usb4_port_sw_margin_errors() - Read the software margining error counters
1665 * @errors: Error metadata is copied here.
1667 * This reads back the software margining error counters from the port.
1668 * Returns %0 in success and negative errno otherwise.
1670 int usb4_port_sw_margin_errors(struct tb_port *port, u32 *errors)
1674 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1675 USB4_SB_OPCODE_READ_SW_MARGIN_ERR, 150);
1679 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1680 USB4_SB_METADATA, errors, sizeof(*errors));
1683 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1684 enum usb4_sb_opcode opcode,
1687 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1692 * usb4_port_retimer_set_inbound_sbtx() - Enable sideband channel transactions
1694 * @index: Retimer index
1696 * Enables sideband channel transations on SBTX. Can be used when USB4
1697 * link does not go up, for example if there is no device connected.
1699 int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index)
1703 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1710 * Per the USB4 retimer spec, the retimer is not required to
1711 * send an RT (Retimer Transaction) response for the first
1712 * SET_INBOUND_SBTX command
1714 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1719 * usb4_port_retimer_unset_inbound_sbtx() - Disable sideband channel transactions
1721 * @index: Retimer index
1723 * Disables sideband channel transations on SBTX. The reverse of
1724 * usb4_port_retimer_set_inbound_sbtx().
1726 int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index)
1728 return usb4_port_retimer_op(port, index,
1729 USB4_SB_OPCODE_UNSET_INBOUND_SBTX, 500);
1733 * usb4_port_retimer_read() - Read from retimer sideband registers
1735 * @index: Retimer index
1736 * @reg: Sideband register to read
1737 * @buf: Data from @reg is stored here
1738 * @size: Number of bytes to read
1740 * Function reads retimer sideband registers starting from @reg. The
1741 * retimer is connected to @port at @index. Returns %0 in case of
1742 * success, and read data is copied to @buf. If there is no retimer
1743 * present at given @index returns %-ENODEV. In any other failure
1744 * returns negative errno.
1746 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1749 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1754 * usb4_port_retimer_write() - Write to retimer sideband registers
1756 * @index: Retimer index
1757 * @reg: Sideband register to write
1758 * @buf: Data that is written starting from @reg
1759 * @size: Number of bytes to write
1761 * Writes retimer sideband registers starting from @reg. The retimer is
1762 * connected to @port at @index. Returns %0 in case of success. If there
1763 * is no retimer present at given @index returns %-ENODEV. In any other
1764 * failure returns negative errno.
1766 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1767 const void *buf, u8 size)
1769 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1774 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1776 * @index: Retimer index
1778 * If the retimer at @index is last one (connected directly to the
1779 * Type-C port) this function returns %1. If it is not returns %0. If
1780 * the retimer is not present returns %-ENODEV. Otherwise returns
1783 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1788 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1793 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1795 return ret ? ret : metadata & 1;
1799 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1801 * @index: Retimer index
1803 * Reads NVM sector size (in bytes) of a retimer at @index. This
1804 * operation can be used to determine whether the retimer supports NVM
1805 * upgrade for example. Returns sector size in bytes or negative errno
1806 * in case of error. Specifically returns %-ENODEV if there is no
1807 * retimer at @index.
1809 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1814 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1819 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1821 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1825 * usb4_port_retimer_nvm_set_offset() - Set NVM write offset
1827 * @index: Retimer index
1828 * @address: Start offset
1830 * Exlicitly sets NVM write offset. Normally when writing to NVM this is
1831 * done automatically by usb4_port_retimer_nvm_write().
1833 * Returns %0 in success and negative errno if there was a failure.
1835 int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1836 unsigned int address)
1838 u32 metadata, dwaddress;
1841 dwaddress = address / 4;
1842 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1843 USB4_NVM_SET_OFFSET_MASK;
1845 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1850 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1854 struct retimer_info {
1855 struct tb_port *port;
1859 static int usb4_port_retimer_nvm_write_next_block(void *data,
1860 unsigned int dwaddress, const void *buf, size_t dwords)
1863 const struct retimer_info *info = data;
1864 struct tb_port *port = info->port;
1865 u8 index = info->index;
1868 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1873 return usb4_port_retimer_op(port, index,
1874 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1878 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1880 * @index: Retimer index
1881 * @address: Byte address where to start the write
1882 * @buf: Data to write
1883 * @size: Size in bytes how much to write
1885 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1886 * upgrade. Returns %0 if the data was written successfully and negative
1887 * errno in case of failure. Specifically returns %-ENODEV if there is
1888 * no retimer at @index.
1890 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1891 const void *buf, size_t size)
1893 struct retimer_info info = { .port = port, .index = index };
1896 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1900 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
1901 usb4_port_retimer_nvm_write_next_block, &info);
1905 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1907 * @index: Retimer index
1909 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1910 * this function can be used to trigger the NVM upgrade process. If
1911 * successful the retimer restarts with the new NVM and may not have the
1912 * index set so one needs to call usb4_port_enumerate_retimers() to
1913 * force index to be assigned.
1915 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1920 * We need to use the raw operation here because once the
1921 * authentication completes the retimer index is not set anymore
1922 * so we do not get back the status now.
1924 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1925 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1926 USB4_SB_OPCODE, &val, sizeof(val));
1930 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1932 * @index: Retimer index
1933 * @status: Raw status code read from metadata
1935 * This can be called after usb4_port_retimer_nvm_authenticate() and
1936 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1938 * Returns %0 if the authentication status was successfully read. The
1939 * completion metadata (the result) is then stored into @status. If
1940 * reading the status fails, returns negative errno.
1942 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1948 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1953 ret = usb4_port_sb_opcode_err_to_errno(val);
1960 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1961 &metadata, sizeof(metadata));
1965 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1973 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1974 void *buf, size_t dwords)
1976 const struct retimer_info *info = data;
1977 struct tb_port *port = info->port;
1978 u8 index = info->index;
1982 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1983 if (dwords < USB4_DATA_DWORDS)
1984 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1986 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1991 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1995 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
2000 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
2002 * @index: Retimer index
2003 * @address: NVM address (in bytes) to start reading
2004 * @buf: Data read from NVM is stored here
2005 * @size: Number of bytes to read
2007 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
2008 * read was successful and negative errno in case of failure.
2009 * Specifically returns %-ENODEV if there is no retimer at @index.
2011 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
2012 unsigned int address, void *buf, size_t size)
2014 struct retimer_info info = { .port = port, .index = index };
2016 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
2017 usb4_port_retimer_nvm_read_block, &info);
2020 static inline unsigned int
2021 usb4_usb3_port_max_bandwidth(const struct tb_port *port, unsigned int bw)
2023 /* Take the possible bandwidth limitation into account */
2025 return min(bw, port->max_bw);
2030 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
2031 * @port: USB3 adapter port
2033 * Return maximum supported link rate of a USB3 adapter in Mb/s.
2034 * Negative errno in case of error.
2036 int usb4_usb3_port_max_link_rate(struct tb_port *port)
2041 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
2044 ret = tb_port_read(port, &val, TB_CFG_PORT,
2045 port->cap_adap + ADP_USB3_CS_4, 1);
2049 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
2050 ret = lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
2052 return usb4_usb3_port_max_bandwidth(port, ret);
2055 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
2060 if (!tb_port_is_usb3_down(port))
2062 if (tb_route(port->sw))
2065 ret = tb_port_read(port, &val, TB_CFG_PORT,
2066 port->cap_adap + ADP_USB3_CS_2, 1);
2071 val |= ADP_USB3_CS_2_CMR;
2073 val &= ~ADP_USB3_CS_2_CMR;
2075 ret = tb_port_write(port, &val, TB_CFG_PORT,
2076 port->cap_adap + ADP_USB3_CS_2, 1);
2081 * We can use val here directly as the CMR bit is in the same place
2082 * as HCA. Just mask out others.
2084 val &= ADP_USB3_CS_2_CMR;
2085 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
2086 ADP_USB3_CS_1_HCA, val, 1500);
2089 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
2091 return usb4_usb3_port_cm_request(port, true);
2094 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
2096 return usb4_usb3_port_cm_request(port, false);
2099 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
2101 unsigned long uframes;
2103 uframes = bw * 512UL << scale;
2104 return DIV_ROUND_CLOSEST(uframes * 8000, MEGA);
2107 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
2109 unsigned long uframes;
2111 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
2112 uframes = ((unsigned long)mbps * MEGA) / 8000;
2113 return DIV_ROUND_UP(uframes, 512UL << scale);
2116 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
2123 ret = tb_port_read(port, &val, TB_CFG_PORT,
2124 port->cap_adap + ADP_USB3_CS_2, 1);
2128 ret = tb_port_read(port, &scale, TB_CFG_PORT,
2129 port->cap_adap + ADP_USB3_CS_3, 1);
2133 scale &= ADP_USB3_CS_3_SCALE_MASK;
2135 bw = val & ADP_USB3_CS_2_AUBW_MASK;
2136 *upstream_bw = usb3_bw_to_mbps(bw, scale);
2138 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
2139 *downstream_bw = usb3_bw_to_mbps(bw, scale);
2145 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
2146 * @port: USB3 adapter port
2147 * @upstream_bw: Allocated upstream bandwidth is stored here
2148 * @downstream_bw: Allocated downstream bandwidth is stored here
2150 * Stores currently allocated USB3 bandwidth into @upstream_bw and
2151 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
2154 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
2159 ret = usb4_usb3_port_set_cm_request(port);
2163 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
2165 usb4_usb3_port_clear_cm_request(port);
2170 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
2177 ret = tb_port_read(port, &val, TB_CFG_PORT,
2178 port->cap_adap + ADP_USB3_CS_1, 1);
2182 ret = tb_port_read(port, &scale, TB_CFG_PORT,
2183 port->cap_adap + ADP_USB3_CS_3, 1);
2187 scale &= ADP_USB3_CS_3_SCALE_MASK;
2189 bw = val & ADP_USB3_CS_1_CUBW_MASK;
2190 *upstream_bw = usb3_bw_to_mbps(bw, scale);
2192 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
2193 *downstream_bw = usb3_bw_to_mbps(bw, scale);
2198 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
2202 u32 val, ubw, dbw, scale;
2205 /* Figure out suitable scale */
2207 max_bw = max(upstream_bw, downstream_bw);
2208 while (scale < 64) {
2209 if (mbps_to_usb3_bw(max_bw, scale) < 4096)
2214 if (WARN_ON(scale >= 64))
2217 ret = tb_port_write(port, &scale, TB_CFG_PORT,
2218 port->cap_adap + ADP_USB3_CS_3, 1);
2222 ubw = mbps_to_usb3_bw(upstream_bw, scale);
2223 dbw = mbps_to_usb3_bw(downstream_bw, scale);
2225 tb_port_dbg(port, "scaled bandwidth %u/%u, scale %u\n", ubw, dbw, scale);
2227 ret = tb_port_read(port, &val, TB_CFG_PORT,
2228 port->cap_adap + ADP_USB3_CS_2, 1);
2232 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
2233 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
2236 return tb_port_write(port, &val, TB_CFG_PORT,
2237 port->cap_adap + ADP_USB3_CS_2, 1);
2241 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
2242 * @port: USB3 adapter port
2243 * @upstream_bw: New upstream bandwidth
2244 * @downstream_bw: New downstream bandwidth
2246 * This can be used to set how much bandwidth is allocated for the USB3
2247 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
2248 * new values programmed to the USB3 adapter allocation registers. If
2249 * the values are lower than what is currently consumed the allocation
2250 * is set to what is currently consumed instead (consumed bandwidth
2251 * cannot be taken away by CM). The actual new values are returned in
2252 * @upstream_bw and @downstream_bw.
2254 * Returns %0 in case of success and negative errno if there was a
2257 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
2260 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
2262 ret = usb4_usb3_port_set_cm_request(port);
2266 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
2271 /* Don't allow it go lower than what is consumed */
2272 allocate_up = max(*upstream_bw, consumed_up);
2273 allocate_down = max(*downstream_bw, consumed_down);
2275 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
2280 *upstream_bw = allocate_up;
2281 *downstream_bw = allocate_down;
2284 usb4_usb3_port_clear_cm_request(port);
2289 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
2290 * @port: USB3 adapter port
2291 * @upstream_bw: New allocated upstream bandwidth
2292 * @downstream_bw: New allocated downstream bandwidth
2294 * Releases USB3 allocated bandwidth down to what is actually consumed.
2295 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
2297 * Returns 0% in success and negative errno in case of failure.
2299 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
2302 int ret, consumed_up, consumed_down;
2304 ret = usb4_usb3_port_set_cm_request(port);
2308 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
2314 * Always keep 900 Mb/s to make sure xHCI has at least some
2315 * bandwidth available for isochronous traffic.
2317 if (consumed_up < 900)
2319 if (consumed_down < 900)
2320 consumed_down = 900;
2322 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
2327 *upstream_bw = consumed_up;
2328 *downstream_bw = consumed_down;
2331 usb4_usb3_port_clear_cm_request(port);
2335 static bool is_usb4_dpin(const struct tb_port *port)
2337 if (!tb_port_is_dpin(port))
2339 if (!tb_switch_is_usb4(port->sw))
2345 * usb4_dp_port_set_cm_id() - Assign CM ID to the DP IN adapter
2346 * @port: DP IN adapter
2347 * @cm_id: CM ID to assign
2349 * Sets CM ID for the @port. Returns %0 on success and negative errno
2350 * otherwise. Speficially returns %-EOPNOTSUPP if the @port does not
2353 int usb4_dp_port_set_cm_id(struct tb_port *port, int cm_id)
2358 if (!is_usb4_dpin(port))
2361 ret = tb_port_read(port, &val, TB_CFG_PORT,
2362 port->cap_adap + ADP_DP_CS_2, 1);
2366 val &= ~ADP_DP_CS_2_CM_ID_MASK;
2367 val |= cm_id << ADP_DP_CS_2_CM_ID_SHIFT;
2369 return tb_port_write(port, &val, TB_CFG_PORT,
2370 port->cap_adap + ADP_DP_CS_2, 1);
2374 * usb4_dp_port_bandwidth_mode_supported() - Is the bandwidth allocation mode
2376 * @port: DP IN adapter to check
2378 * Can be called to any DP IN adapter. Returns true if the adapter
2379 * supports USB4 bandwidth allocation mode, false otherwise.
2381 bool usb4_dp_port_bandwidth_mode_supported(struct tb_port *port)
2386 if (!is_usb4_dpin(port))
2389 ret = tb_port_read(port, &val, TB_CFG_PORT,
2390 port->cap_adap + DP_LOCAL_CAP, 1);
2394 return !!(val & DP_COMMON_CAP_BW_MODE);
2398 * usb4_dp_port_bandwidth_mode_enabled() - Is the bandwidth allocation mode
2400 * @port: DP IN adapter to check
2402 * Can be called to any DP IN adapter. Returns true if the bandwidth
2403 * allocation mode has been enabled, false otherwise.
2405 bool usb4_dp_port_bandwidth_mode_enabled(struct tb_port *port)
2410 if (!is_usb4_dpin(port))
2413 ret = tb_port_read(port, &val, TB_CFG_PORT,
2414 port->cap_adap + ADP_DP_CS_8, 1);
2418 return !!(val & ADP_DP_CS_8_DPME);
2422 * usb4_dp_port_set_cm_bandwidth_mode_supported() - Set/clear CM support for
2423 * bandwidth allocation mode
2424 * @port: DP IN adapter
2425 * @supported: Does the CM support bandwidth allocation mode
2427 * Can be called to any DP IN adapter. Sets or clears the CM support bit
2428 * of the DP IN adapter. Returns %0 in success and negative errno
2429 * otherwise. Specifically returns %-OPNOTSUPP if the passed in adapter
2430 * does not support this.
2432 int usb4_dp_port_set_cm_bandwidth_mode_supported(struct tb_port *port,
2438 if (!is_usb4_dpin(port))
2441 ret = tb_port_read(port, &val, TB_CFG_PORT,
2442 port->cap_adap + ADP_DP_CS_2, 1);
2447 val |= ADP_DP_CS_2_CMMS;
2449 val &= ~ADP_DP_CS_2_CMMS;
2451 return tb_port_write(port, &val, TB_CFG_PORT,
2452 port->cap_adap + ADP_DP_CS_2, 1);
2456 * usb4_dp_port_group_id() - Return Group ID assigned for the adapter
2457 * @port: DP IN adapter
2459 * Reads bandwidth allocation Group ID from the DP IN adapter and
2460 * returns it. If the adapter does not support setting Group_ID
2461 * %-EOPNOTSUPP is returned.
2463 int usb4_dp_port_group_id(struct tb_port *port)
2468 if (!is_usb4_dpin(port))
2471 ret = tb_port_read(port, &val, TB_CFG_PORT,
2472 port->cap_adap + ADP_DP_CS_2, 1);
2476 return (val & ADP_DP_CS_2_GROUP_ID_MASK) >> ADP_DP_CS_2_GROUP_ID_SHIFT;
2480 * usb4_dp_port_set_group_id() - Set adapter Group ID
2481 * @port: DP IN adapter
2482 * @group_id: Group ID for the adapter
2484 * Sets bandwidth allocation mode Group ID for the DP IN adapter.
2485 * Returns %0 in case of success and negative errno otherwise.
2486 * Specifically returns %-EOPNOTSUPP if the adapter does not support
2489 int usb4_dp_port_set_group_id(struct tb_port *port, int group_id)
2494 if (!is_usb4_dpin(port))
2497 ret = tb_port_read(port, &val, TB_CFG_PORT,
2498 port->cap_adap + ADP_DP_CS_2, 1);
2502 val &= ~ADP_DP_CS_2_GROUP_ID_MASK;
2503 val |= group_id << ADP_DP_CS_2_GROUP_ID_SHIFT;
2505 return tb_port_write(port, &val, TB_CFG_PORT,
2506 port->cap_adap + ADP_DP_CS_2, 1);
2510 * usb4_dp_port_nrd() - Read non-reduced rate and lanes
2511 * @port: DP IN adapter
2512 * @rate: Non-reduced rate in Mb/s is placed here
2513 * @lanes: Non-reduced lanes are placed here
2515 * Reads the non-reduced rate and lanes from the DP IN adapter. Returns
2516 * %0 in success and negative errno otherwise. Specifically returns
2517 * %-EOPNOTSUPP if the adapter does not support this.
2519 int usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes)
2524 if (!is_usb4_dpin(port))
2527 ret = tb_port_read(port, &val, TB_CFG_PORT,
2528 port->cap_adap + ADP_DP_CS_2, 1);
2532 tmp = (val & ADP_DP_CS_2_NRD_MLR_MASK) >> ADP_DP_CS_2_NRD_MLR_SHIFT;
2534 case DP_COMMON_CAP_RATE_RBR:
2537 case DP_COMMON_CAP_RATE_HBR:
2540 case DP_COMMON_CAP_RATE_HBR2:
2543 case DP_COMMON_CAP_RATE_HBR3:
2548 tmp = val & ADP_DP_CS_2_NRD_MLC_MASK;
2550 case DP_COMMON_CAP_1_LANE:
2553 case DP_COMMON_CAP_2_LANES:
2556 case DP_COMMON_CAP_4_LANES:
2565 * usb4_dp_port_set_nrd() - Set non-reduced rate and lanes
2566 * @port: DP IN adapter
2567 * @rate: Non-reduced rate in Mb/s
2568 * @lanes: Non-reduced lanes
2570 * Before the capabilities reduction this function can be used to set
2571 * the non-reduced values for the DP IN adapter. Returns %0 in success
2572 * and negative errno otherwise. If the adapter does not support this
2573 * %-EOPNOTSUPP is returned.
2575 int usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes)
2580 if (!is_usb4_dpin(port))
2583 ret = tb_port_read(port, &val, TB_CFG_PORT,
2584 port->cap_adap + ADP_DP_CS_2, 1);
2588 val &= ~ADP_DP_CS_2_NRD_MLR_MASK;
2594 val |= (DP_COMMON_CAP_RATE_HBR << ADP_DP_CS_2_NRD_MLR_SHIFT)
2595 & ADP_DP_CS_2_NRD_MLR_MASK;
2598 val |= (DP_COMMON_CAP_RATE_HBR2 << ADP_DP_CS_2_NRD_MLR_SHIFT)
2599 & ADP_DP_CS_2_NRD_MLR_MASK;
2602 val |= (DP_COMMON_CAP_RATE_HBR3 << ADP_DP_CS_2_NRD_MLR_SHIFT)
2603 & ADP_DP_CS_2_NRD_MLR_MASK;
2609 val &= ~ADP_DP_CS_2_NRD_MLC_MASK;
2615 val |= DP_COMMON_CAP_2_LANES;
2618 val |= DP_COMMON_CAP_4_LANES;
2624 return tb_port_write(port, &val, TB_CFG_PORT,
2625 port->cap_adap + ADP_DP_CS_2, 1);
2629 * usb4_dp_port_granularity() - Return granularity for the bandwidth values
2630 * @port: DP IN adapter
2632 * Reads the programmed granularity from @port. If the DP IN adapter does
2633 * not support bandwidth allocation mode returns %-EOPNOTSUPP and negative
2634 * errno in other error cases.
2636 int usb4_dp_port_granularity(struct tb_port *port)
2641 if (!is_usb4_dpin(port))
2644 ret = tb_port_read(port, &val, TB_CFG_PORT,
2645 port->cap_adap + ADP_DP_CS_2, 1);
2649 val &= ADP_DP_CS_2_GR_MASK;
2650 val >>= ADP_DP_CS_2_GR_SHIFT;
2653 case ADP_DP_CS_2_GR_0_25G:
2655 case ADP_DP_CS_2_GR_0_5G:
2657 case ADP_DP_CS_2_GR_1G:
2665 * usb4_dp_port_set_granularity() - Set granularity for the bandwidth values
2666 * @port: DP IN adapter
2667 * @granularity: Granularity in Mb/s. Supported values: 1000, 500 and 250.
2669 * Sets the granularity used with the estimated, allocated and requested
2670 * bandwidth. Returns %0 in success and negative errno otherwise. If the
2671 * adapter does not support this %-EOPNOTSUPP is returned.
2673 int usb4_dp_port_set_granularity(struct tb_port *port, int granularity)
2678 if (!is_usb4_dpin(port))
2681 ret = tb_port_read(port, &val, TB_CFG_PORT,
2682 port->cap_adap + ADP_DP_CS_2, 1);
2686 val &= ~ADP_DP_CS_2_GR_MASK;
2688 switch (granularity) {
2690 val |= ADP_DP_CS_2_GR_0_25G << ADP_DP_CS_2_GR_SHIFT;
2693 val |= ADP_DP_CS_2_GR_0_5G << ADP_DP_CS_2_GR_SHIFT;
2696 val |= ADP_DP_CS_2_GR_1G << ADP_DP_CS_2_GR_SHIFT;
2702 return tb_port_write(port, &val, TB_CFG_PORT,
2703 port->cap_adap + ADP_DP_CS_2, 1);
2707 * usb4_dp_port_set_estimated_bandwidth() - Set estimated bandwidth
2708 * @port: DP IN adapter
2709 * @bw: Estimated bandwidth in Mb/s.
2711 * Sets the estimated bandwidth to @bw. Set the granularity by calling
2712 * usb4_dp_port_set_granularity() before calling this. The @bw is round
2713 * down to the closest granularity multiplier. Returns %0 in success
2714 * and negative errno otherwise. Specifically returns %-EOPNOTSUPP if
2715 * the adapter does not support this.
2717 int usb4_dp_port_set_estimated_bandwidth(struct tb_port *port, int bw)
2719 u32 val, granularity;
2722 if (!is_usb4_dpin(port))
2725 ret = usb4_dp_port_granularity(port);
2730 ret = tb_port_read(port, &val, TB_CFG_PORT,
2731 port->cap_adap + ADP_DP_CS_2, 1);
2735 val &= ~ADP_DP_CS_2_ESTIMATED_BW_MASK;
2736 val |= (bw / granularity) << ADP_DP_CS_2_ESTIMATED_BW_SHIFT;
2738 return tb_port_write(port, &val, TB_CFG_PORT,
2739 port->cap_adap + ADP_DP_CS_2, 1);
2743 * usb4_dp_port_allocated_bandwidth() - Return allocated bandwidth
2744 * @port: DP IN adapter
2746 * Reads and returns allocated bandwidth for @port in Mb/s (taking into
2747 * account the programmed granularity). Returns negative errno in case
2750 int usb4_dp_port_allocated_bandwidth(struct tb_port *port)
2752 u32 val, granularity;
2755 if (!is_usb4_dpin(port))
2758 ret = usb4_dp_port_granularity(port);
2763 ret = tb_port_read(port, &val, TB_CFG_PORT,
2764 port->cap_adap + DP_STATUS, 1);
2768 val &= DP_STATUS_ALLOCATED_BW_MASK;
2769 val >>= DP_STATUS_ALLOCATED_BW_SHIFT;
2771 return val * granularity;
2774 static int __usb4_dp_port_set_cm_ack(struct tb_port *port, bool ack)
2779 ret = tb_port_read(port, &val, TB_CFG_PORT,
2780 port->cap_adap + ADP_DP_CS_2, 1);
2785 val |= ADP_DP_CS_2_CA;
2787 val &= ~ADP_DP_CS_2_CA;
2789 return tb_port_write(port, &val, TB_CFG_PORT,
2790 port->cap_adap + ADP_DP_CS_2, 1);
2793 static inline int usb4_dp_port_set_cm_ack(struct tb_port *port)
2795 return __usb4_dp_port_set_cm_ack(port, true);
2798 static int usb4_dp_port_wait_and_clear_cm_ack(struct tb_port *port,
2805 ret = __usb4_dp_port_set_cm_ack(port, false);
2809 end = ktime_add_ms(ktime_get(), timeout_msec);
2811 ret = tb_port_read(port, &val, TB_CFG_PORT,
2812 port->cap_adap + ADP_DP_CS_8, 1);
2816 if (!(val & ADP_DP_CS_8_DR))
2819 usleep_range(50, 100);
2820 } while (ktime_before(ktime_get(), end));
2822 if (val & ADP_DP_CS_8_DR)
2825 ret = tb_port_read(port, &val, TB_CFG_PORT,
2826 port->cap_adap + ADP_DP_CS_2, 1);
2830 val &= ~ADP_DP_CS_2_CA;
2831 return tb_port_write(port, &val, TB_CFG_PORT,
2832 port->cap_adap + ADP_DP_CS_2, 1);
2836 * usb4_dp_port_allocate_bandwidth() - Set allocated bandwidth
2837 * @port: DP IN adapter
2838 * @bw: New allocated bandwidth in Mb/s
2840 * Communicates the new allocated bandwidth with the DPCD (graphics
2841 * driver). Takes into account the programmed granularity. Returns %0 in
2842 * success and negative errno in case of error.
2844 int usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw)
2846 u32 val, granularity;
2849 if (!is_usb4_dpin(port))
2852 ret = usb4_dp_port_granularity(port);
2857 ret = tb_port_read(port, &val, TB_CFG_PORT,
2858 port->cap_adap + DP_STATUS, 1);
2862 val &= ~DP_STATUS_ALLOCATED_BW_MASK;
2863 val |= (bw / granularity) << DP_STATUS_ALLOCATED_BW_SHIFT;
2865 ret = tb_port_write(port, &val, TB_CFG_PORT,
2866 port->cap_adap + DP_STATUS, 1);
2870 ret = usb4_dp_port_set_cm_ack(port);
2874 return usb4_dp_port_wait_and_clear_cm_ack(port, 500);
2878 * usb4_dp_port_requested_bandwidth() - Read requested bandwidth
2879 * @port: DP IN adapter
2881 * Reads the DPCD (graphics driver) requested bandwidth and returns it
2882 * in Mb/s. Takes the programmed granularity into account. In case of
2883 * error returns negative errno. Specifically returns %-EOPNOTSUPP if
2884 * the adapter does not support bandwidth allocation mode, and %ENODATA
2885 * if there is no active bandwidth request from the graphics driver.
2887 int usb4_dp_port_requested_bandwidth(struct tb_port *port)
2889 u32 val, granularity;
2892 if (!is_usb4_dpin(port))
2895 ret = usb4_dp_port_granularity(port);
2900 ret = tb_port_read(port, &val, TB_CFG_PORT,
2901 port->cap_adap + ADP_DP_CS_8, 1);
2905 if (!(val & ADP_DP_CS_8_DR))
2908 return (val & ADP_DP_CS_8_REQUESTED_BW_MASK) * granularity;
2912 * usb4_pci_port_set_ext_encapsulation() - Enable/disable extended encapsulation
2913 * @port: PCIe adapter
2914 * @enable: Enable/disable extended encapsulation
2916 * Enables or disables extended encapsulation used in PCIe tunneling. Caller
2917 * needs to make sure both adapters support this before enabling. Returns %0 on
2918 * success and negative errno otherwise.
2920 int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable)
2925 if (!tb_port_is_pcie_up(port) && !tb_port_is_pcie_down(port))
2928 ret = tb_port_read(port, &val, TB_CFG_PORT,
2929 port->cap_adap + ADP_PCIE_CS_1, 1);
2934 val |= ADP_PCIE_CS_1_EE;
2936 val &= ~ADP_PCIE_CS_1_EE;
2938 return tb_port_write(port, &val, TB_CFG_PORT,
2939 port->cap_adap + ADP_PCIE_CS_1, 1);