drivers/thunderbolt/nhi.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Thunderbolt driver - NHI driver
   4  *
   5  * The NHI (native host interface) is the pci device that allows us to send and
   6  * receive frames from the thunderbolt bus.
   7  *
   8  * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
   9  * Copyright (C) 2018, Intel Corporation
  10  */
  11
  12 #include <linux/pm_runtime.h>
  13 #include <linux/slab.h>
  14 #include <linux/errno.h>
  15 #include <linux/pci.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18 #include <linux/delay.h>
  19 #include <linux/property.h>
  20
  21 #include "nhi.h"
  22 #include "nhi_regs.h"
  23 #include "tb.h"
  24
  25 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
  26
  27 /*
  28  * Used to enable end-to-end workaround for missing RX packets. Do not
  29  * use this ring for anything else.
  30  */
  31 #define RING_E2E_UNUSED_HOPID   2
  32 #define RING_FIRST_USABLE_HOPID TB_PATH_MIN_HOPID
  33
  34 /*
  35  * Minimal number of vectors when we use MSI-X. Two for control channel
  36  * Rx/Tx and the rest four are for cross domain DMA paths.
  37  */
  38 #define MSIX_MIN_VECS           6
  39 #define MSIX_MAX_VECS           16
  40
  41 #define NHI_MAILBOX_TIMEOUT     500 /* ms */
  42
  43 static int ring_interrupt_index(struct tb_ring *ring)
  44 {
  45         int bit = ring->hop;
  46         if (!ring->is_tx)
  47                 bit += ring->nhi->hop_count;
  48         return bit;
  49 }
  50
  51 /**
  52  * ring_interrupt_active() - activate/deactivate interrupts for a single ring
  53  *
  54  * ring->nhi->lock must be held.
  55  */
  56 static void ring_interrupt_active(struct tb_ring *ring, bool active)
  57 {
  58         int reg = REG_RING_INTERRUPT_BASE +
  59                   ring_interrupt_index(ring) / 32 * 4;
  60         int bit = ring_interrupt_index(ring) & 31;
  61         int mask = 1 << bit;
  62         u32 old, new;
  63
  64         if (ring->irq > 0) {
  65                 u32 step, shift, ivr, misc;
  66                 void __iomem *ivr_base;
  67                 int index;
  68
  69                 if (ring->is_tx)
  70                         index = ring->hop;
  71                 else
  72                         index = ring->hop + ring->nhi->hop_count;
  73
  74                 /*
  75                  * Ask the hardware to clear interrupt status bits automatically
  76                  * since we already know which interrupt was triggered.
  77                  */
  78                 misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
  79                 if (!(misc & REG_DMA_MISC_INT_AUTO_CLEAR)) {
  80                         misc |= REG_DMA_MISC_INT_AUTO_CLEAR;
  81                         iowrite32(misc, ring->nhi->iobase + REG_DMA_MISC);
  82                 }
  83
  84                 ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
  85                 step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
  86                 shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
  87                 ivr = ioread32(ivr_base + step);
  88                 ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);
  89                 if (active)
  90                         ivr |= ring->vector << shift;
  91                 iowrite32(ivr, ivr_base + step);
  92         }
  93
  94         old = ioread32(ring->nhi->iobase + reg);
  95         if (active)
  96                 new = old | mask;
  97         else
  98                 new = old & ~mask;
  99
 100         dev_dbg(&ring->nhi->pdev->dev,
 101                 "%s interrupt at register %#x bit %d (%#x -> %#x)\n",
 102                 active ? "enabling" : "disabling", reg, bit, old, new);
 103
 104         if (new == old)
 105                 dev_WARN(&ring->nhi->pdev->dev,
 106                                          "interrupt for %s %d is already %s\n",
 107                                          RING_TYPE(ring), ring->hop,
 108                                          active ? "enabled" : "disabled");
 109         iowrite32(new, ring->nhi->iobase + reg);
 110 }
 111
 112 /**
 113  * nhi_disable_interrupts() - disable interrupts for all rings
 114  *
 115  * Use only during init and shutdown.
 116  */
 117 static void nhi_disable_interrupts(struct tb_nhi *nhi)
 118 {
 119         int i = 0;
 120         /* disable interrupts */
 121         for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
 122                 iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
 123
 124         /* clear interrupt status bits */
 125         for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
 126                 ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
 127 }
 128
 129 /* ring helper methods */
 130
 131 static void __iomem *ring_desc_base(struct tb_ring *ring)
 132 {
 133         void __iomem *io = ring->nhi->iobase;
 134         io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
 135         io += ring->hop * 16;
 136         return io;
 137 }
 138
 139 static void __iomem *ring_options_base(struct tb_ring *ring)
 140 {
 141         void __iomem *io = ring->nhi->iobase;
 142         io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
 143         io += ring->hop * 32;
 144         return io;
 145 }
 146
 147 static void ring_iowrite_cons(struct tb_ring *ring, u16 cons)
 148 {
 149         /*
 150          * The other 16-bits in the register is read-only and writes to it
 151          * are ignored by the hardware so we can save one ioread32() by
 152          * filling the read-only bits with zeroes.
 153          */
 154         iowrite32(cons, ring_desc_base(ring) + 8);
 155 }
 156
 157 static void ring_iowrite_prod(struct tb_ring *ring, u16 prod)
 158 {
 159         /* See ring_iowrite_cons() above for explanation */
 160         iowrite32(prod << 16, ring_desc_base(ring) + 8);
 161 }
 162
 163 static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
 164 {
 165         iowrite32(value, ring_desc_base(ring) + offset);
 166 }
 167
 168 static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
 169 {
 170         iowrite32(value, ring_desc_base(ring) + offset);
 171         iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
 172 }
 173
 174 static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
 175 {
 176         iowrite32(value, ring_options_base(ring) + offset);
 177 }
 178
 179 static bool ring_full(struct tb_ring *ring)
 180 {
 181         return ((ring->head + 1) % ring->size) == ring->tail;
 182 }
 183
 184 static bool ring_empty(struct tb_ring *ring)
 185 {
 186         return ring->head == ring->tail;
 187 }
 188
 189 /**
 190  * ring_write_descriptors() - post frames from ring->queue to the controller
 191  *
 192  * ring->lock is held.
 193  */
 194 static void ring_write_descriptors(struct tb_ring *ring)
 195 {
 196         struct ring_frame *frame, *n;
 197         struct ring_desc *descriptor;
 198         list_for_each_entry_safe(frame, n, &ring->queue, list) {
 199                 if (ring_full(ring))
 200                         break;
 201                 list_move_tail(&frame->list, &ring->in_flight);
 202                 descriptor = &ring->descriptors[ring->head];
 203                 descriptor->phys = frame->buffer_phy;
 204                 descriptor->time = 0;
 205                 descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
 206                 if (ring->is_tx) {
 207                         descriptor->length = frame->size;
 208                         descriptor->eof = frame->eof;
 209                         descriptor->sof = frame->sof;
 210                 }
 211                 ring->head = (ring->head + 1) % ring->size;
 212                 if (ring->is_tx)
 213                         ring_iowrite_prod(ring, ring->head);
 214                 else
 215                         ring_iowrite_cons(ring, ring->head);
 216         }
 217 }
 218
 219 /**
 220  * ring_work() - progress completed frames
 221  *
 222  * If the ring is shutting down then all frames are marked as canceled and
 223  * their callbacks are invoked.
 224  *
 225  * Otherwise we collect all completed frame from the ring buffer, write new
 226  * frame to the ring buffer and invoke the callbacks for the completed frames.
 227  */
 228 static void ring_work(struct work_struct *work)
 229 {
 230         struct tb_ring *ring = container_of(work, typeof(*ring), work);
 231         struct ring_frame *frame;
 232         bool canceled = false;
 233         unsigned long flags;
 234         LIST_HEAD(done);
 235
 236         spin_lock_irqsave(&ring->lock, flags);
 237
 238         if (!ring->running) {
 239                 /*  Move all frames to done and mark them as canceled. */
 240                 list_splice_tail_init(&ring->in_flight, &done);
 241                 list_splice_tail_init(&ring->queue, &done);
 242                 canceled = true;
 243                 goto invoke_callback;
 244         }
 245
 246         while (!ring_empty(ring)) {
 247                 if (!(ring->descriptors[ring->tail].flags
 248                                 & RING_DESC_COMPLETED))
 249                         break;
 250                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
 251                                          list);
 252                 list_move_tail(&frame->list, &done);
 253                 if (!ring->is_tx) {
 254                         frame->size = ring->descriptors[ring->tail].length;
 255                         frame->eof = ring->descriptors[ring->tail].eof;
 256                         frame->sof = ring->descriptors[ring->tail].sof;
 257                         frame->flags = ring->descriptors[ring->tail].flags;
 258                 }
 259                 ring->tail = (ring->tail + 1) % ring->size;
 260         }
 261         ring_write_descriptors(ring);
 262
 263 invoke_callback:
 264         /* allow callbacks to schedule new work */
 265         spin_unlock_irqrestore(&ring->lock, flags);
 266         while (!list_empty(&done)) {
 267                 frame = list_first_entry(&done, typeof(*frame), list);
 268                 /*
 269                  * The callback may reenqueue or delete frame.
 270                  * Do not hold on to it.
 271                  */
 272                 list_del_init(&frame->list);
 273                 if (frame->callback)
 274                         frame->callback(ring, frame, canceled);
 275         }
 276 }
 277
 278 int __tb_ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
 279 {
 280         unsigned long flags;
 281         int ret = 0;
 282
 283         spin_lock_irqsave(&ring->lock, flags);
 284         if (ring->running) {
 285                 list_add_tail(&frame->list, &ring->queue);
 286                 ring_write_descriptors(ring);
 287         } else {
 288                 ret = -ESHUTDOWN;
 289         }
 290         spin_unlock_irqrestore(&ring->lock, flags);
 291         return ret;
 292 }
 293 EXPORT_SYMBOL_GPL(__tb_ring_enqueue);
 294
 295 /**
 296  * tb_ring_poll() - Poll one completed frame from the ring
 297  * @ring: Ring to poll
 298  *
 299  * This function can be called when @start_poll callback of the @ring
 300  * has been called. It will read one completed frame from the ring and
 301  * return it to the caller. Returns %NULL if there is no more completed
 302  * frames.
 303  */
 304 struct ring_frame *tb_ring_poll(struct tb_ring *ring)
 305 {
 306         struct ring_frame *frame = NULL;
 307         unsigned long flags;
 308
 309         spin_lock_irqsave(&ring->lock, flags);
 310         if (!ring->running)
 311                 goto unlock;
 312         if (ring_empty(ring))
 313                 goto unlock;
 314
 315         if (ring->descriptors[ring->tail].flags & RING_DESC_COMPLETED) {
 316                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
 317                                          list);
 318                 list_del_init(&frame->list);
 319
 320                 if (!ring->is_tx) {
 321                         frame->size = ring->descriptors[ring->tail].length;
 322                         frame->eof = ring->descriptors[ring->tail].eof;
 323                         frame->sof = ring->descriptors[ring->tail].sof;
 324                         frame->flags = ring->descriptors[ring->tail].flags;
 325                 }
 326
 327                 ring->tail = (ring->tail + 1) % ring->size;
 328         }
 329
 330 unlock:
 331         spin_unlock_irqrestore(&ring->lock, flags);
 332         return frame;
 333 }
 334 EXPORT_SYMBOL_GPL(tb_ring_poll);
 335
 336 static void __ring_interrupt_mask(struct tb_ring *ring, bool mask)
 337 {
 338         int idx = ring_interrupt_index(ring);
 339         int reg = REG_RING_INTERRUPT_BASE + idx / 32 * 4;
 340         int bit = idx % 32;
 341         u32 val;
 342
 343         val = ioread32(ring->nhi->iobase + reg);
 344         if (mask)
 345                 val &= ~BIT(bit);
 346         else
 347                 val |= BIT(bit);
 348         iowrite32(val, ring->nhi->iobase + reg);
 349 }
 350
 351 /* Both @nhi->lock and @ring->lock should be held */
 352 static void __ring_interrupt(struct tb_ring *ring)
 353 {
 354         if (!ring->running)
 355                 return;
 356
 357         if (ring->start_poll) {
 358                 __ring_interrupt_mask(ring, true);
 359                 ring->start_poll(ring->poll_data);
 360         } else {
 361                 schedule_work(&ring->work);
 362         }
 363 }
 364
 365 /**
 366  * tb_ring_poll_complete() - Re-start interrupt for the ring
 367  * @ring: Ring to re-start the interrupt
 368  *
 369  * This will re-start (unmask) the ring interrupt once the user is done
 370  * with polling.
 371  */
 372 void tb_ring_poll_complete(struct tb_ring *ring)
 373 {
 374         unsigned long flags;
 375
 376         spin_lock_irqsave(&ring->nhi->lock, flags);
 377         spin_lock(&ring->lock);
 378         if (ring->start_poll)
 379                 __ring_interrupt_mask(ring, false);
 380         spin_unlock(&ring->lock);
 381         spin_unlock_irqrestore(&ring->nhi->lock, flags);
 382 }
 383 EXPORT_SYMBOL_GPL(tb_ring_poll_complete);
 384
 385 static irqreturn_t ring_msix(int irq, void *data)
 386 {
 387         struct tb_ring *ring = data;
 388
 389         spin_lock(&ring->nhi->lock);
 390         spin_lock(&ring->lock);
 391         __ring_interrupt(ring);
 392         spin_unlock(&ring->lock);
 393         spin_unlock(&ring->nhi->lock);
 394
 395         return IRQ_HANDLED;
 396 }
 397
 398 static int ring_request_msix(struct tb_ring *ring, bool no_suspend)
 399 {
 400         struct tb_nhi *nhi = ring->nhi;
 401         unsigned long irqflags;
 402         int ret;
 403
 404         if (!nhi->pdev->msix_enabled)
 405                 return 0;
 406
 407         ret = ida_simple_get(&nhi->msix_ida, 0, MSIX_MAX_VECS, GFP_KERNEL);
 408         if (ret < 0)
 409                 return ret;
 410
 411         ring->vector = ret;
 412
 413         ret = pci_irq_vector(ring->nhi->pdev, ring->vector);
 414         if (ret < 0)
 415                 goto err_ida_remove;
 416
 417         ring->irq = ret;
 418
 419         irqflags = no_suspend ? IRQF_NO_SUSPEND : 0;
 420         ret = request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring);
 421         if (ret)
 422                 goto err_ida_remove;
 423
 424         return 0;
 425
 426 err_ida_remove:
 427         ida_simple_remove(&nhi->msix_ida, ring->vector);
 428
 429         return ret;
 430 }
 431
 432 static void ring_release_msix(struct tb_ring *ring)
 433 {
 434         if (ring->irq <= 0)
 435                 return;
 436
 437         free_irq(ring->irq, ring);
 438         ida_simple_remove(&ring->nhi->msix_ida, ring->vector);
 439         ring->vector = 0;
 440         ring->irq = 0;
 441 }
 442
 443 static int nhi_alloc_hop(struct tb_nhi *nhi, struct tb_ring *ring)
 444 {
 445         int ret = 0;
 446
 447         spin_lock_irq(&nhi->lock);
 448
 449         if (ring->hop < 0) {
 450                 unsigned int i;
 451
 452                 /*
 453                  * Automatically allocate HopID from the non-reserved
 454                  * range 8 .. hop_count - 1.
 455                  */
 456                 for (i = RING_FIRST_USABLE_HOPID; i < nhi->hop_count; i++) {
 457                         if (ring->is_tx) {
 458                                 if (!nhi->tx_rings[i]) {
 459                                         ring->hop = i;
 460                                         break;
 461                                 }
 462                         } else {
 463                                 if (!nhi->rx_rings[i]) {
 464                                         ring->hop = i;
 465                                         break;
 466                                 }
 467                         }
 468                 }
 469         }
 470
 471         if (ring->hop < 0 || ring->hop >= nhi->hop_count) {
 472                 dev_warn(&nhi->pdev->dev, "invalid hop: %d\n", ring->hop);
 473                 ret = -EINVAL;
 474                 goto err_unlock;
 475         }
 476         if (ring->is_tx && nhi->tx_rings[ring->hop]) {
 477                 dev_warn(&nhi->pdev->dev, "TX hop %d already allocated\n",
 478                          ring->hop);
 479                 ret = -EBUSY;
 480                 goto err_unlock;
 481         } else if (!ring->is_tx && nhi->rx_rings[ring->hop]) {
 482                 dev_warn(&nhi->pdev->dev, "RX hop %d already allocated\n",
 483                          ring->hop);
 484                 ret = -EBUSY;
 485                 goto err_unlock;
 486         }
 487
 488         if (ring->is_tx)
 489                 nhi->tx_rings[ring->hop] = ring;
 490         else
 491                 nhi->rx_rings[ring->hop] = ring;
 492
 493 err_unlock:
 494         spin_unlock_irq(&nhi->lock);
 495
 496         return ret;
 497 }
 498
 499 static struct tb_ring *tb_ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
 500                                      bool transmit, unsigned int flags,
 501                                      u16 sof_mask, u16 eof_mask,
 502                                      void (*start_poll)(void *),
 503                                      void *poll_data)
 504 {
 505         struct tb_ring *ring = NULL;
 506
 507         dev_dbg(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
 508                 transmit ? "TX" : "RX", hop, size);
 509
 510         /* Tx Ring 2 is reserved for E2E workaround */
 511         if (transmit && hop == RING_E2E_UNUSED_HOPID)
 512                 return NULL;
 513
 514         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
 515         if (!ring)
 516                 return NULL;
 517
 518         spin_lock_init(&ring->lock);
 519         INIT_LIST_HEAD(&ring->queue);
 520         INIT_LIST_HEAD(&ring->in_flight);
 521         INIT_WORK(&ring->work, ring_work);
 522
 523         ring->nhi = nhi;
 524         ring->hop = hop;
 525         ring->is_tx = transmit;
 526         ring->size = size;
 527         ring->flags = flags;
 528         ring->sof_mask = sof_mask;
 529         ring->eof_mask = eof_mask;
 530         ring->head = 0;
 531         ring->tail = 0;
 532         ring->running = false;
 533         ring->start_poll = start_poll;
 534         ring->poll_data = poll_data;
 535
 536         ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
 537                         size * sizeof(*ring->descriptors),
 538                         &ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
 539         if (!ring->descriptors)
 540                 goto err_free_ring;
 541
 542         if (ring_request_msix(ring, flags & RING_FLAG_NO_SUSPEND))
 543                 goto err_free_descs;
 544
 545         if (nhi_alloc_hop(nhi, ring))
 546                 goto err_release_msix;
 547
 548         return ring;
 549
 550 err_release_msix:
 551         ring_release_msix(ring);
 552 err_free_descs:
 553         dma_free_coherent(&ring->nhi->pdev->dev,
 554                           ring->size * sizeof(*ring->descriptors),
 555                           ring->descriptors, ring->descriptors_dma);
 556 err_free_ring:
 557         kfree(ring);
 558
 559         return NULL;
 560 }
 561
 562 /**
 563  * tb_ring_alloc_tx() - Allocate DMA ring for transmit
 564  * @nhi: Pointer to the NHI the ring is to be allocated
 565  * @hop: HopID (ring) to allocate
 566  * @size: Number of entries in the ring
 567  * @flags: Flags for the ring
 568  */
 569 struct tb_ring *tb_ring_alloc_tx(struct tb_nhi *nhi, int hop, int size,
 570                                  unsigned int flags)
 571 {
 572         return tb_ring_alloc(nhi, hop, size, true, flags, 0, 0, NULL, NULL);
 573 }
 574 EXPORT_SYMBOL_GPL(tb_ring_alloc_tx);
 575
 576 /**
 577  * tb_ring_alloc_rx() - Allocate DMA ring for receive
 578  * @nhi: Pointer to the NHI the ring is to be allocated
 579  * @hop: HopID (ring) to allocate. Pass %-1 for automatic allocation.
 580  * @size: Number of entries in the ring
 581  * @flags: Flags for the ring
 582  * @sof_mask: Mask of PDF values that start a frame
 583  * @eof_mask: Mask of PDF values that end a frame
 584  * @start_poll: If not %NULL the ring will call this function when an
 585  *              interrupt is triggered and masked, instead of callback
 586  *              in each Rx frame.
 587  * @poll_data: Optional data passed to @start_poll
 588  */
 589 struct tb_ring *tb_ring_alloc_rx(struct tb_nhi *nhi, int hop, int size,
 590                                  unsigned int flags, u16 sof_mask, u16 eof_mask,
 591                                  void (*start_poll)(void *), void *poll_data)
 592 {
 593         return tb_ring_alloc(nhi, hop, size, false, flags, sof_mask, eof_mask,
 594                              start_poll, poll_data);
 595 }
 596 EXPORT_SYMBOL_GPL(tb_ring_alloc_rx);
 597
 598 /**
 599  * tb_ring_start() - enable a ring
 600  *
 601  * Must not be invoked in parallel with tb_ring_stop().
 602  */
 603 void tb_ring_start(struct tb_ring *ring)
 604 {
 605         u16 frame_size;
 606         u32 flags;
 607
 608         spin_lock_irq(&ring->nhi->lock);
 609         spin_lock(&ring->lock);
 610         if (ring->nhi->going_away)
 611                 goto err;
 612         if (ring->running) {
 613                 dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
 614                 goto err;
 615         }
 616         dev_dbg(&ring->nhi->pdev->dev, "starting %s %d\n",
 617                 RING_TYPE(ring), ring->hop);
 618
 619         if (ring->flags & RING_FLAG_FRAME) {
 620                 /* Means 4096 */
 621                 frame_size = 0;
 622                 flags = RING_FLAG_ENABLE;
 623         } else {
 624                 frame_size = TB_FRAME_SIZE;
 625                 flags = RING_FLAG_ENABLE | RING_FLAG_RAW;
 626         }
 627
 628         if (ring->flags & RING_FLAG_E2E && !ring->is_tx) {
 629                 u32 hop;
 630
 631                 /*
 632                  * In order not to lose Rx packets we enable end-to-end
 633                  * workaround which transfers Rx credits to an unused Tx
 634                  * HopID.
 635                  */
 636                 hop = RING_E2E_UNUSED_HOPID << REG_RX_OPTIONS_E2E_HOP_SHIFT;
 637                 hop &= REG_RX_OPTIONS_E2E_HOP_MASK;
 638                 flags |= hop | RING_FLAG_E2E_FLOW_CONTROL;
 639         }
 640
 641         ring_iowrite64desc(ring, ring->descriptors_dma, 0);
 642         if (ring->is_tx) {
 643                 ring_iowrite32desc(ring, ring->size, 12);
 644                 ring_iowrite32options(ring, 0, 4); /* time releated ? */
 645                 ring_iowrite32options(ring, flags, 0);
 646         } else {
 647                 u32 sof_eof_mask = ring->sof_mask << 16 | ring->eof_mask;
 648
 649                 ring_iowrite32desc(ring, (frame_size << 16) | ring->size, 12);
 650                 ring_iowrite32options(ring, sof_eof_mask, 4);
 651                 ring_iowrite32options(ring, flags, 0);
 652         }
 653         ring_interrupt_active(ring, true);
 654         ring->running = true;
 655 err:
 656         spin_unlock(&ring->lock);
 657         spin_unlock_irq(&ring->nhi->lock);
 658 }
 659 EXPORT_SYMBOL_GPL(tb_ring_start);
 660
 661 /**
 662  * tb_ring_stop() - shutdown a ring
 663  *
 664  * Must not be invoked from a callback.
 665  *
 666  * This method will disable the ring. Further calls to
 667  * tb_ring_tx/tb_ring_rx will return -ESHUTDOWN until ring_stop has been
 668  * called.
 669  *
 670  * All enqueued frames will be canceled and their callbacks will be executed
 671  * with frame->canceled set to true (on the callback thread). This method
 672  * returns only after all callback invocations have finished.
 673  */
 674 void tb_ring_stop(struct tb_ring *ring)
 675 {
 676         spin_lock_irq(&ring->nhi->lock);
 677         spin_lock(&ring->lock);
 678         dev_dbg(&ring->nhi->pdev->dev, "stopping %s %d\n",
 679                 RING_TYPE(ring), ring->hop);
 680         if (ring->nhi->going_away)
 681                 goto err;
 682         if (!ring->running) {
 683                 dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
 684                          RING_TYPE(ring), ring->hop);
 685                 goto err;
 686         }
 687         ring_interrupt_active(ring, false);
 688
 689         ring_iowrite32options(ring, 0, 0);
 690         ring_iowrite64desc(ring, 0, 0);
 691         ring_iowrite32desc(ring, 0, 8);
 692         ring_iowrite32desc(ring, 0, 12);
 693         ring->head = 0;
 694         ring->tail = 0;
 695         ring->running = false;
 696
 697 err:
 698         spin_unlock(&ring->lock);
 699         spin_unlock_irq(&ring->nhi->lock);
 700
 701         /*
 702          * schedule ring->work to invoke callbacks on all remaining frames.
 703          */
 704         schedule_work(&ring->work);
 705         flush_work(&ring->work);
 706 }
 707 EXPORT_SYMBOL_GPL(tb_ring_stop);
 708
 709 /*
 710  * tb_ring_free() - free ring
 711  *
 712  * When this method returns all invocations of ring->callback will have
 713  * finished.
 714  *
 715  * Ring must be stopped.
 716  *
 717  * Must NOT be called from ring_frame->callback!
 718  */
 719 void tb_ring_free(struct tb_ring *ring)
 720 {
 721         spin_lock_irq(&ring->nhi->lock);
 722         /*
 723          * Dissociate the ring from the NHI. This also ensures that
 724          * nhi_interrupt_work cannot reschedule ring->work.
 725          */
 726         if (ring->is_tx)
 727                 ring->nhi->tx_rings[ring->hop] = NULL;
 728         else
 729                 ring->nhi->rx_rings[ring->hop] = NULL;
 730
 731         if (ring->running) {
 732                 dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
 733                          RING_TYPE(ring), ring->hop);
 734         }
 735         spin_unlock_irq(&ring->nhi->lock);
 736
 737         ring_release_msix(ring);
 738
 739         dma_free_coherent(&ring->nhi->pdev->dev,
 740                           ring->size * sizeof(*ring->descriptors),
 741                           ring->descriptors, ring->descriptors_dma);
 742
 743         ring->descriptors = NULL;
 744         ring->descriptors_dma = 0;
 745
 746
 747         dev_dbg(&ring->nhi->pdev->dev, "freeing %s %d\n", RING_TYPE(ring),
 748                 ring->hop);
 749
 750         /**
 751          * ring->work can no longer be scheduled (it is scheduled only
 752          * by nhi_interrupt_work, ring_stop and ring_msix). Wait for it
 753          * to finish before freeing the ring.
 754          */
 755         flush_work(&ring->work);
 756         kfree(ring);
 757 }
 758 EXPORT_SYMBOL_GPL(tb_ring_free);
 759
 760 /**
 761  * nhi_mailbox_cmd() - Send a command through NHI mailbox
 762  * @nhi: Pointer to the NHI structure
 763  * @cmd: Command to send
 764  * @data: Data to be send with the command
 765  *
 766  * Sends mailbox command to the firmware running on NHI. Returns %0 in
 767  * case of success and negative errno in case of failure.
 768  */
 769 int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data)
 770 {
 771         ktime_t timeout;
 772         u32 val;
 773
 774         iowrite32(data, nhi->iobase + REG_INMAIL_DATA);
 775
 776         val = ioread32(nhi->iobase + REG_INMAIL_CMD);
 777         val &= ~(REG_INMAIL_CMD_MASK | REG_INMAIL_ERROR);
 778         val |= REG_INMAIL_OP_REQUEST | cmd;
 779         iowrite32(val, nhi->iobase + REG_INMAIL_CMD);
 780
 781         timeout = ktime_add_ms(ktime_get(), NHI_MAILBOX_TIMEOUT);
 782         do {
 783                 val = ioread32(nhi->iobase + REG_INMAIL_CMD);
 784                 if (!(val & REG_INMAIL_OP_REQUEST))
 785                         break;
 786                 usleep_range(10, 20);
 787         } while (ktime_before(ktime_get(), timeout));
 788
 789         if (val & REG_INMAIL_OP_REQUEST)
 790                 return -ETIMEDOUT;
 791         if (val & REG_INMAIL_ERROR)
 792                 return -EIO;
 793
 794         return 0;
 795 }
 796
 797 /**
 798  * nhi_mailbox_mode() - Return current firmware operation mode
 799  * @nhi: Pointer to the NHI structure
 800  *
 801  * The function reads current firmware operation mode using NHI mailbox
 802  * registers and returns it to the caller.
 803  */
 804 enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi)
 805 {
 806         u32 val;
 807
 808         val = ioread32(nhi->iobase + REG_OUTMAIL_CMD);
 809         val &= REG_OUTMAIL_CMD_OPMODE_MASK;
 810         val >>= REG_OUTMAIL_CMD_OPMODE_SHIFT;
 811
 812         return (enum nhi_fw_mode)val;
 813 }
 814
 815 static void nhi_interrupt_work(struct work_struct *work)
 816 {
 817         struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
 818         int value = 0; /* Suppress uninitialized usage warning. */
 819         int bit;
 820         int hop = -1;
 821         int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
 822         struct tb_ring *ring;
 823
 824         spin_lock_irq(&nhi->lock);
 825
 826         /*
 827          * Starting at REG_RING_NOTIFY_BASE there are three status bitfields
 828          * (TX, RX, RX overflow). We iterate over the bits and read a new
 829          * dwords as required. The registers are cleared on read.
 830          */
 831         for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
 832                 if (bit % 32 == 0)
 833                         value = ioread32(nhi->iobase
 834                                          + REG_RING_NOTIFY_BASE
 835                                          + 4 * (bit / 32));
 836                 if (++hop == nhi->hop_count) {
 837                         hop = 0;
 838                         type++;
 839                 }
 840                 if ((value & (1 << (bit % 32))) == 0)
 841                         continue;
 842                 if (type == 2) {
 843                         dev_warn(&nhi->pdev->dev,
 844                                  "RX overflow for ring %d\n",
 845                                  hop);
 846                         continue;
 847                 }
 848                 if (type == 0)
 849                         ring = nhi->tx_rings[hop];
 850                 else
 851                         ring = nhi->rx_rings[hop];
 852                 if (ring == NULL) {
 853                         dev_warn(&nhi->pdev->dev,
 854                                  "got interrupt for inactive %s ring %d\n",
 855                                  type ? "RX" : "TX",
 856                                  hop);
 857                         continue;
 858                 }
 859
 860                 spin_lock(&ring->lock);
 861                 __ring_interrupt(ring);
 862                 spin_unlock(&ring->lock);
 863         }
 864         spin_unlock_irq(&nhi->lock);
 865 }
 866
 867 static irqreturn_t nhi_msi(int irq, void *data)
 868 {
 869         struct tb_nhi *nhi = data;
 870         schedule_work(&nhi->interrupt_work);
 871         return IRQ_HANDLED;
 872 }
 873
 874 static int __nhi_suspend_noirq(struct device *dev, bool wakeup)
 875 {
 876         struct pci_dev *pdev = to_pci_dev(dev);
 877         struct tb *tb = pci_get_drvdata(pdev);
 878         struct tb_nhi *nhi = tb->nhi;
 879         int ret;
 880
 881         ret = tb_domain_suspend_noirq(tb);
 882         if (ret)
 883                 return ret;
 884
 885         if (nhi->ops && nhi->ops->suspend_noirq) {
 886                 ret = nhi->ops->suspend_noirq(tb->nhi, wakeup);
 887                 if (ret)
 888                         return ret;
 889         }
 890
 891         return 0;
 892 }
 893
 894 static int nhi_suspend_noirq(struct device *dev)
 895 {
 896         return __nhi_suspend_noirq(dev, device_may_wakeup(dev));
 897 }
 898
 899 static bool nhi_wake_supported(struct pci_dev *pdev)
 900 {
 901         u8 val;
 902
 903         /*
 904          * If power rails are sustainable for wakeup from S4 this
 905          * property is set by the BIOS.
 906          */
 907         if (device_property_read_u8(&pdev->dev, "WAKE_SUPPORTED", &val))
 908                 return !!val;
 909
 910         return true;
 911 }
 912
 913 static int nhi_poweroff_noirq(struct device *dev)
 914 {
 915         struct pci_dev *pdev = to_pci_dev(dev);
 916         bool wakeup;
 917
 918         wakeup = device_may_wakeup(dev) && nhi_wake_supported(pdev);
 919         return __nhi_suspend_noirq(dev, wakeup);
 920 }
 921
 922 static void nhi_enable_int_throttling(struct tb_nhi *nhi)
 923 {
 924         /* Throttling is specified in 256ns increments */
 925         u32 throttle = DIV_ROUND_UP(128 * NSEC_PER_USEC, 256);
 926         unsigned int i;
 927
 928         /*
 929          * Configure interrupt throttling for all vectors even if we
 930          * only use few.
 931          */
 932         for (i = 0; i < MSIX_MAX_VECS; i++) {
 933                 u32 reg = REG_INT_THROTTLING_RATE + i * 4;
 934                 iowrite32(throttle, nhi->iobase + reg);
 935         }
 936 }
 937
 938 static int nhi_resume_noirq(struct device *dev)
 939 {
 940         struct pci_dev *pdev = to_pci_dev(dev);
 941         struct tb *tb = pci_get_drvdata(pdev);
 942         struct tb_nhi *nhi = tb->nhi;
 943         int ret;
 944
 945         /*
 946          * Check that the device is still there. It may be that the user
 947          * unplugged last device which causes the host controller to go
 948          * away on PCs.
 949          */
 950         if (!pci_device_is_present(pdev)) {
 951                 nhi->going_away = true;
 952         } else {
 953                 if (nhi->ops && nhi->ops->resume_noirq) {
 954                         ret = nhi->ops->resume_noirq(nhi);
 955                         if (ret)
 956                                 return ret;
 957                 }
 958                 nhi_enable_int_throttling(tb->nhi);
 959         }
 960
 961         return tb_domain_resume_noirq(tb);
 962 }
 963
 964 static int nhi_suspend(struct device *dev)
 965 {
 966         struct pci_dev *pdev = to_pci_dev(dev);
 967         struct tb *tb = pci_get_drvdata(pdev);
 968
 969         return tb_domain_suspend(tb);
 970 }
 971
 972 static void nhi_complete(struct device *dev)
 973 {
 974         struct pci_dev *pdev = to_pci_dev(dev);
 975         struct tb *tb = pci_get_drvdata(pdev);
 976
 977         /*
 978          * If we were runtime suspended when system suspend started,
 979          * schedule runtime resume now. It should bring the domain back
 980          * to functional state.
 981          */
 982         if (pm_runtime_suspended(&pdev->dev))
 983                 pm_runtime_resume(&pdev->dev);
 984         else
 985                 tb_domain_complete(tb);
 986 }
 987
 988 static int nhi_runtime_suspend(struct device *dev)
 989 {
 990         struct pci_dev *pdev = to_pci_dev(dev);
 991         struct tb *tb = pci_get_drvdata(pdev);
 992         struct tb_nhi *nhi = tb->nhi;
 993         int ret;
 994
 995         ret = tb_domain_runtime_suspend(tb);
 996         if (ret)
 997                 return ret;
 998
 999         if (nhi->ops && nhi->ops->runtime_suspend) {
1000                 ret = nhi->ops->runtime_suspend(tb->nhi);
1001                 if (ret)
1002                         return ret;
1003         }
1004         return 0;
1005 }
1006
1007 static int nhi_runtime_resume(struct device *dev)
1008 {
1009         struct pci_dev *pdev = to_pci_dev(dev);
1010         struct tb *tb = pci_get_drvdata(pdev);
1011         struct tb_nhi *nhi = tb->nhi;
1012         int ret;
1013
1014         if (nhi->ops && nhi->ops->runtime_resume) {
1015                 ret = nhi->ops->runtime_resume(nhi);
1016                 if (ret)
1017                         return ret;
1018         }
1019
1020         nhi_enable_int_throttling(nhi);
1021         return tb_domain_runtime_resume(tb);
1022 }
1023
1024 static void nhi_shutdown(struct tb_nhi *nhi)
1025 {
1026         int i;
1027
1028         dev_dbg(&nhi->pdev->dev, "shutdown\n");
1029
1030         for (i = 0; i < nhi->hop_count; i++) {
1031                 if (nhi->tx_rings[i])
1032                         dev_WARN(&nhi->pdev->dev,
1033                                  "TX ring %d is still active\n", i);
1034                 if (nhi->rx_rings[i])
1035                         dev_WARN(&nhi->pdev->dev,
1036                                  "RX ring %d is still active\n", i);
1037         }
1038         nhi_disable_interrupts(nhi);
1039         /*
1040          * We have to release the irq before calling flush_work. Otherwise an
1041          * already executing IRQ handler could call schedule_work again.
1042          */
1043         if (!nhi->pdev->msix_enabled) {
1044                 devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
1045                 flush_work(&nhi->interrupt_work);
1046         }
1047         ida_destroy(&nhi->msix_ida);
1048
1049         if (nhi->ops && nhi->ops->shutdown)
1050                 nhi->ops->shutdown(nhi);
1051 }
1052
1053 static int nhi_init_msi(struct tb_nhi *nhi)
1054 {
1055         struct pci_dev *pdev = nhi->pdev;
1056         int res, irq, nvec;
1057
1058         /* In case someone left them on. */
1059         nhi_disable_interrupts(nhi);
1060
1061         nhi_enable_int_throttling(nhi);
1062
1063         ida_init(&nhi->msix_ida);
1064
1065         /*
1066          * The NHI has 16 MSI-X vectors or a single MSI. We first try to
1067          * get all MSI-X vectors and if we succeed, each ring will have
1068          * one MSI-X. If for some reason that does not work out, we
1069          * fallback to a single MSI.
1070          */
1071         nvec = pci_alloc_irq_vectors(pdev, MSIX_MIN_VECS, MSIX_MAX_VECS,
1072                                      PCI_IRQ_MSIX);
1073         if (nvec < 0) {
1074                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
1075                 if (nvec < 0)
1076                         return nvec;
1077
1078                 INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
1079
1080                 irq = pci_irq_vector(nhi->pdev, 0);
1081                 if (irq < 0)
1082                         return irq;
1083
1084                 res = devm_request_irq(&pdev->dev, irq, nhi_msi,
1085                                        IRQF_NO_SUSPEND, "thunderbolt", nhi);
1086                 if (res) {
1087                         dev_err(&pdev->dev, "request_irq failed, aborting\n");
1088                         return res;
1089                 }
1090         }
1091
1092         return 0;
1093 }
1094
1095 static bool nhi_imr_valid(struct pci_dev *pdev)
1096 {
1097         u8 val;
1098
1099         if (!device_property_read_u8(&pdev->dev, "IMR_VALID", &val))
1100                 return !!val;
1101
1102         return true;
1103 }
1104
1105 static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1106 {
1107         struct tb_nhi *nhi;
1108         struct tb *tb;
1109         int res;
1110
1111         if (!nhi_imr_valid(pdev)) {
1112                 dev_warn(&pdev->dev, "firmware image not valid, aborting\n");
1113                 return -ENODEV;
1114         }
1115
1116         res = pcim_enable_device(pdev);
1117         if (res) {
1118                 dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
1119                 return res;
1120         }
1121
1122         res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
1123         if (res) {
1124                 dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
1125                 return res;
1126         }
1127
1128         nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
1129         if (!nhi)
1130                 return -ENOMEM;
1131
1132         nhi->pdev = pdev;
1133         nhi->ops = (const struct tb_nhi_ops *)id->driver_data;
1134         /* cannot fail - table is allocated bin pcim_iomap_regions */
1135         nhi->iobase = pcim_iomap_table(pdev)[0];
1136         nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
1137         if (nhi->hop_count != 12 && nhi->hop_count != 32)
1138                 dev_warn(&pdev->dev, "unexpected hop count: %d\n",
1139                          nhi->hop_count);
1140
1141         nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1142                                      sizeof(*nhi->tx_rings), GFP_KERNEL);
1143         nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1144                                      sizeof(*nhi->rx_rings), GFP_KERNEL);
1145         if (!nhi->tx_rings || !nhi->rx_rings)
1146                 return -ENOMEM;
1147
1148         res = nhi_init_msi(nhi);
1149         if (res) {
1150                 dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
1151                 return res;
1152         }
1153
1154         spin_lock_init(&nhi->lock);
1155
1156         res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1157         if (res)
1158                 res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1159         if (res) {
1160                 dev_err(&pdev->dev, "failed to set DMA mask\n");
1161                 return res;
1162         }
1163
1164         pci_set_master(pdev);
1165
1166         if (nhi->ops && nhi->ops->init) {
1167                 res = nhi->ops->init(nhi);
1168                 if (res)
1169                         return res;
1170         }
1171
1172         tb = icm_probe(nhi);
1173         if (!tb)
1174                 tb = tb_probe(nhi);
1175         if (!tb) {
1176                 dev_err(&nhi->pdev->dev,
1177                         "failed to determine connection manager, aborting\n");
1178                 return -ENODEV;
1179         }
1180
1181         dev_dbg(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
1182
1183         res = tb_domain_add(tb);
1184         if (res) {
1185                 /*
1186                  * At this point the RX/TX rings might already have been
1187                  * activated. Do a proper shutdown.
1188                  */
1189                 tb_domain_put(tb);
1190                 nhi_shutdown(nhi);
1191                 return res;
1192         }
1193         pci_set_drvdata(pdev, tb);
1194
1195         pm_runtime_allow(&pdev->dev);
1196         pm_runtime_set_autosuspend_delay(&pdev->dev, TB_AUTOSUSPEND_DELAY);
1197         pm_runtime_use_autosuspend(&pdev->dev);
1198         pm_runtime_put_autosuspend(&pdev->dev);
1199
1200         return 0;
1201 }
1202
1203 static void nhi_remove(struct pci_dev *pdev)
1204 {
1205         struct tb *tb = pci_get_drvdata(pdev);
1206         struct tb_nhi *nhi = tb->nhi;
1207
1208         pm_runtime_get_sync(&pdev->dev);
1209         pm_runtime_dont_use_autosuspend(&pdev->dev);
1210         pm_runtime_forbid(&pdev->dev);
1211
1212         tb_domain_remove(tb);
1213         nhi_shutdown(nhi);
1214 }
1215
1216 /*
1217  * The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
1218  * the tunnels asap. A corresponding pci quirk blocks the downstream bridges
1219  * resume_noirq until we are done.
1220  */
1221 static const struct dev_pm_ops nhi_pm_ops = {
1222         .suspend_noirq = nhi_suspend_noirq,
1223         .resume_noirq = nhi_resume_noirq,
1224         .freeze_noirq = nhi_suspend_noirq, /*
1225                                             * we just disable hotplug, the
1226                                             * pci-tunnels stay alive.
1227                                             */
1228         .thaw_noirq = nhi_resume_noirq,
1229         .restore_noirq = nhi_resume_noirq,
1230         .suspend = nhi_suspend,
1231         .freeze = nhi_suspend,
1232         .poweroff_noirq = nhi_poweroff_noirq,
1233         .poweroff = nhi_suspend,
1234         .complete = nhi_complete,
1235         .runtime_suspend = nhi_runtime_suspend,
1236         .runtime_resume = nhi_runtime_resume,
1237 };
1238
1239 static struct pci_device_id nhi_ids[] = {
1240         /*
1241          * We have to specify class, the TB bridges use the same device and
1242          * vendor (sub)id on gen 1 and gen 2 controllers.
1243          */
1244         {
1245                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1246                 .vendor = PCI_VENDOR_ID_INTEL,
1247                 .device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
1248                 .subvendor = 0x2222, .subdevice = 0x1111,
1249         },
1250         {
1251                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1252                 .vendor = PCI_VENDOR_ID_INTEL,
1253                 .device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
1254                 .subvendor = 0x2222, .subdevice = 0x1111,
1255         },
1256         {
1257                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1258                 .vendor = PCI_VENDOR_ID_INTEL,
1259                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
1260                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1261         },
1262         {
1263                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1264                 .vendor = PCI_VENDOR_ID_INTEL,
1265                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
1266                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1267         },
1268
1269         /* Thunderbolt 3 */
1270         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI) },
1271         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI) },
1272         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI) },
1273         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI) },
1274         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI) },
1275         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI) },
1276         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI) },
1277         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI) },
1278         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI) },
1279         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI) },
1280         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICL_NHI0),
1281           .driver_data = (kernel_ulong_t)&icl_nhi_ops },
1282         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICL_NHI1),
1283           .driver_data = (kernel_ulong_t)&icl_nhi_ops },
1284
1285         { 0,}
1286 };
1287
1288 MODULE_DEVICE_TABLE(pci, nhi_ids);
1289 MODULE_LICENSE("GPL");
1290
1291 static struct pci_driver nhi_driver = {
1292         .name = "thunderbolt",
1293         .id_table = nhi_ids,
1294         .probe = nhi_probe,
1295         .remove = nhi_remove,
1296         .driver.pm = &nhi_pm_ops,
1297 };
1298
1299 static int __init nhi_init(void)
1300 {
1301         int ret;
1302
1303         ret = tb_domain_init();
1304         if (ret)
1305                 return ret;
1306         ret = pci_register_driver(&nhi_driver);
1307         if (ret)
1308                 tb_domain_exit();
1309         return ret;
1310 }
1311
1312 static void __exit nhi_unload(void)
1313 {
1314         pci_unregister_driver(&nhi_driver);
1315         tb_domain_exit();
1316 }
1317
1318 rootfs_initcall(nhi_init);
1319 module_exit(nhi_unload);