1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen3 THS thermal sensor driver
4 * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
6 * Copyright (C) 2016 Renesas Electronics Corporation.
7 * Copyright (C) 2016 Sang Engineering
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/sys_soc.h>
18 #include <linux/thermal.h>
20 #include "thermal_core.h"
21 #include "thermal_hwmon.h"
23 /* Register offsets */
24 #define REG_GEN3_IRQSTR 0x04
25 #define REG_GEN3_IRQMSK 0x08
26 #define REG_GEN3_IRQCTL 0x0C
27 #define REG_GEN3_IRQEN 0x10
28 #define REG_GEN3_IRQTEMP1 0x14
29 #define REG_GEN3_IRQTEMP2 0x18
30 #define REG_GEN3_IRQTEMP3 0x1C
31 #define REG_GEN3_CTSR 0x20
32 #define REG_GEN3_THCTR 0x20
33 #define REG_GEN3_TEMP 0x28
34 #define REG_GEN3_THCODE1 0x50
35 #define REG_GEN3_THCODE2 0x54
36 #define REG_GEN3_THCODE3 0x58
38 /* IRQ{STR,MSK,EN} bits */
39 #define IRQ_TEMP1 BIT(0)
40 #define IRQ_TEMP2 BIT(1)
41 #define IRQ_TEMP3 BIT(2)
42 #define IRQ_TEMPD1 BIT(3)
43 #define IRQ_TEMPD2 BIT(4)
44 #define IRQ_TEMPD3 BIT(5)
47 #define CTSR_PONM BIT(8)
48 #define CTSR_AOUT BIT(7)
49 #define CTSR_THBGR BIT(5)
50 #define CTSR_VMEN BIT(4)
51 #define CTSR_VMST BIT(1)
52 #define CTSR_THSST BIT(0)
55 #define THCTR_PONM BIT(6)
56 #define THCTR_THSST BIT(0)
58 #define CTEMP_MASK 0xFFF
60 #define MCELSIUS(temp) ((temp) * 1000)
61 #define GEN3_FUSE_MASK 0xFFF
65 /* default THCODE values if FUSEs are missing */
66 static const int thcodes[TSC_MAX_NUM][3] = {
74 /* Structure for thermal temperature calculation */
75 struct equation_coefs {
82 struct rcar_gen3_thermal_tsc {
84 struct thermal_zone_device *zone;
85 struct equation_coefs coef;
87 unsigned int id; /* thermal channel id */
90 struct rcar_gen3_thermal_priv {
91 struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
92 unsigned int num_tscs;
93 void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
96 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
99 return ioread32(tsc->base + reg);
102 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
105 iowrite32(data, tsc->base + reg);
109 * Linear approximation for temperature
111 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
113 * The constants a and b are calculated using two triplets of int values PTAT
114 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
115 * coded values from driver. The formula to calculate a and b are taken from
116 * BSP and sparsely documented and understood.
118 * Examining the linear formula and the formula used to calculate constants a
119 * and b while knowing that the span for PTAT and THCODE values are between
120 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
121 * Integer also needs to be signed so that leaves 7 bits for binary
122 * fixed point scaling.
125 #define FIXPT_SHIFT 7
126 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
127 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
128 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
129 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
131 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
133 /* no idea where these constants come from */
136 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc,
137 int *ptat, const int *thcode,
140 /* TODO: Find documentation and document constant calculation formula */
143 * Division is not scaled in BSP and if scaled it might overflow
144 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
146 tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * (ths_tj_1 - TJ_3))
147 / (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
149 tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
150 tsc->tj_t - FIXPT_INT(TJ_3));
151 tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3;
153 tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
154 tsc->tj_t - FIXPT_INT(ths_tj_1));
155 tsc->coef.b2 = FIXPT_INT(thcode[0]) - tsc->coef.a2 * ths_tj_1;
158 static int rcar_gen3_thermal_round(int temp)
160 int result, round_offs;
162 round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
163 -RCAR3_THERMAL_GRAN / 2;
164 result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
165 return result * RCAR3_THERMAL_GRAN;
168 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
170 struct rcar_gen3_thermal_tsc *tsc = devdata;
174 /* Read register and convert to mili Celsius */
175 reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
177 if (reg <= thcodes[tsc->id][1])
178 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
181 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
183 mcelsius = FIXPT_TO_MCELSIUS(val);
185 /* Guaranteed operating range is -40C to 125C. */
187 /* Round value to device granularity setting */
188 *temp = rcar_gen3_thermal_round(mcelsius);
193 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
198 celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
199 if (celsius <= INT_FIXPT(tsc->tj_t))
200 val = celsius * tsc->coef.a1 + tsc->coef.b1;
202 val = celsius * tsc->coef.a2 + tsc->coef.b2;
204 return INT_FIXPT(val);
207 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
209 struct rcar_gen3_thermal_tsc *tsc = devdata;
212 if (low != -INT_MAX) {
213 irqmsk |= IRQ_TEMPD1;
214 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
215 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
218 if (high != INT_MAX) {
220 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
221 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
224 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);
229 static struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
230 .get_temp = rcar_gen3_thermal_get_temp,
231 .set_trips = rcar_gen3_thermal_set_trips,
234 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
236 struct rcar_gen3_thermal_priv *priv = data;
240 for (i = 0; i < priv->num_tscs; i++) {
241 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
242 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
244 thermal_zone_device_update(priv->tscs[i]->zone,
245 THERMAL_EVENT_UNSPECIFIED);
251 static const struct soc_device_attribute r8a7795es1[] = {
252 { .soc_id = "r8a7795", .revision = "ES1.*" },
256 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
258 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
259 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
261 usleep_range(1000, 2000);
263 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
265 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
266 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
267 if (tsc->zone->ops->set_trips)
268 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
269 IRQ_TEMPD1 | IRQ_TEMP2);
271 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
272 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
274 usleep_range(100, 200);
276 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
277 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
278 CTSR_VMST | CTSR_THSST);
280 usleep_range(1000, 2000);
283 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
287 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
288 reg_val &= ~THCTR_PONM;
289 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
291 usleep_range(1000, 2000);
293 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
294 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
295 if (tsc->zone->ops->set_trips)
296 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
297 IRQ_TEMPD1 | IRQ_TEMP2);
299 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
300 reg_val |= THCTR_THSST;
301 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
303 usleep_range(1000, 2000);
306 static const int rcar_gen3_ths_tj_1 = 126;
307 static const int rcar_gen3_ths_tj_1_m3_w = 116;
308 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
310 .compatible = "renesas,r8a774a1-thermal",
311 .data = &rcar_gen3_ths_tj_1_m3_w,
314 .compatible = "renesas,r8a774b1-thermal",
315 .data = &rcar_gen3_ths_tj_1,
318 .compatible = "renesas,r8a774e1-thermal",
319 .data = &rcar_gen3_ths_tj_1,
322 .compatible = "renesas,r8a7795-thermal",
323 .data = &rcar_gen3_ths_tj_1,
326 .compatible = "renesas,r8a7796-thermal",
327 .data = &rcar_gen3_ths_tj_1_m3_w,
330 .compatible = "renesas,r8a77961-thermal",
331 .data = &rcar_gen3_ths_tj_1_m3_w,
334 .compatible = "renesas,r8a77965-thermal",
335 .data = &rcar_gen3_ths_tj_1,
338 .compatible = "renesas,r8a77980-thermal",
339 .data = &rcar_gen3_ths_tj_1,
342 .compatible = "renesas,r8a779a0-thermal",
343 .data = &rcar_gen3_ths_tj_1,
347 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
349 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
351 struct device *dev = &pdev->dev;
354 pm_runtime_disable(dev);
359 static void rcar_gen3_hwmon_action(void *data)
361 struct thermal_zone_device *zone = data;
363 thermal_remove_hwmon_sysfs(zone);
366 static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
367 struct platform_device *pdev)
369 struct device *dev = &pdev->dev;
374 for (i = 0; i < 2; i++) {
375 irq = platform_get_irq_optional(pdev, i);
379 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
384 ret = devm_request_threaded_irq(dev, irq, NULL,
385 rcar_gen3_thermal_irq,
386 IRQF_ONESHOT, irqname, priv);
394 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
396 struct rcar_gen3_thermal_priv *priv;
397 struct device *dev = &pdev->dev;
398 const int *ths_tj_1 = of_device_get_match_data(dev);
399 struct resource *res;
400 struct thermal_zone_device *zone;
404 /* default values if FUSEs are missing */
405 /* TODO: Read values from hardware on supported platforms */
406 int ptat[3] = { 2631, 1509, 435 };
408 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
412 priv->thermal_init = rcar_gen3_thermal_init;
413 if (soc_device_match(r8a7795es1))
414 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
416 platform_set_drvdata(pdev, priv);
418 if (rcar_gen3_thermal_request_irqs(priv, pdev))
419 rcar_gen3_tz_of_ops.set_trips = NULL;
421 pm_runtime_enable(dev);
422 pm_runtime_get_sync(dev);
424 for (i = 0; i < TSC_MAX_NUM; i++) {
425 struct rcar_gen3_thermal_tsc *tsc;
427 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
431 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
434 goto error_unregister;
437 tsc->base = devm_ioremap_resource(dev, res);
438 if (IS_ERR(tsc->base)) {
439 ret = PTR_ERR(tsc->base);
440 goto error_unregister;
446 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
447 &rcar_gen3_tz_of_ops);
449 dev_err(dev, "Can't register thermal zone\n");
451 goto error_unregister;
455 priv->thermal_init(tsc);
456 rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i], *ths_tj_1);
458 tsc->zone->tzp->no_hwmon = false;
459 ret = thermal_add_hwmon_sysfs(tsc->zone);
461 goto error_unregister;
463 ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
465 goto error_unregister;
467 ret = of_thermal_get_ntrips(tsc->zone);
469 goto error_unregister;
471 dev_info(dev, "TSC%u: Loaded %d trip points\n", i, ret);
476 if (!priv->num_tscs) {
478 goto error_unregister;
484 rcar_gen3_thermal_remove(pdev);
489 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
491 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
494 for (i = 0; i < priv->num_tscs; i++) {
495 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
496 struct thermal_zone_device *zone = tsc->zone;
498 priv->thermal_init(tsc);
499 if (zone->ops->set_trips)
500 rcar_gen3_thermal_set_trips(tsc, zone->prev_low_trip,
501 zone->prev_high_trip);
507 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
508 rcar_gen3_thermal_resume);
510 static struct platform_driver rcar_gen3_thermal_driver = {
512 .name = "rcar_gen3_thermal",
513 .pm = &rcar_gen3_thermal_pm_ops,
514 .of_match_table = rcar_gen3_thermal_dt_ids,
516 .probe = rcar_gen3_thermal_probe,
517 .remove = rcar_gen3_thermal_remove,
519 module_platform_driver(rcar_gen3_thermal_driver);
521 MODULE_LICENSE("GPL v2");
522 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
523 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");