1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2019, 2020, Linaro Ltd.
7 #include <linux/debugfs.h>
10 #include <linux/module.h>
11 #include <linux/nvmem-consumer.h>
13 #include <linux/of_address.h>
14 #include <linux/of_platform.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/platform_device.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/thermal.h>
21 #include "../thermal_hwmon.h"
25 * struct tsens_irq_data - IRQ status and temperature violations
26 * @up_viol: upper threshold violated
27 * @up_thresh: upper threshold temperature value
28 * @up_irq_mask: mask register for upper threshold irqs
29 * @up_irq_clear: clear register for uppper threshold irqs
30 * @low_viol: lower threshold violated
31 * @low_thresh: lower threshold temperature value
32 * @low_irq_mask: mask register for lower threshold irqs
33 * @low_irq_clear: clear register for lower threshold irqs
34 * @crit_viol: critical threshold violated
35 * @crit_thresh: critical threshold temperature value
36 * @crit_irq_mask: mask register for critical threshold irqs
37 * @crit_irq_clear: clear register for critical threshold irqs
39 * Structure containing data about temperature threshold settings and
40 * irq status if they were violated.
42 struct tsens_irq_data {
57 char *qfprom_read(struct device *dev, const char *cname)
59 struct nvmem_cell *cell;
63 cell = nvmem_cell_get(dev, cname);
65 return ERR_CAST(cell);
67 ret = nvmem_cell_read(cell, &data);
74 * Use this function on devices where slope and offset calculations
75 * depend on calibration data read from qfprom. On others the slope
76 * and offset values are derived from tz->tzp->slope and tz->tzp->offset
79 void compute_intercept_slope(struct tsens_priv *priv, u32 *p1,
85 for (i = 0; i < priv->num_sensors; i++) {
87 "%s: sensor%d - data_point1:%#x data_point2:%#x\n",
88 __func__, i, p1[i], p2[i]);
90 if (!priv->sensor[i].slope)
91 priv->sensor[i].slope = SLOPE_DEFAULT;
92 if (mode == TWO_PT_CALIB) {
94 * slope (m) = adc_code2 - adc_code1 (y2 - y1)/
95 * temp_120_degc - temp_30_degc (x2 - x1)
99 den = CAL_DEGC_PT2 - CAL_DEGC_PT1;
100 priv->sensor[i].slope = num / den;
103 priv->sensor[i].offset = (p1[i] * SLOPE_FACTOR) -
105 priv->sensor[i].slope);
106 dev_dbg(priv->dev, "%s: offset:%d\n", __func__,
107 priv->sensor[i].offset);
111 static inline u32 degc_to_code(int degc, const struct tsens_sensor *s)
113 u64 code = div_u64(((u64)degc * s->slope + s->offset), SLOPE_FACTOR);
115 pr_debug("%s: raw_code: 0x%llx, degc:%d\n", __func__, code, degc);
116 return clamp_val(code, THRESHOLD_MIN_ADC_CODE, THRESHOLD_MAX_ADC_CODE);
119 static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s)
123 num = (adc_code * SLOPE_FACTOR) - s->offset;
127 degc = num + (den / 2);
129 degc = num - (den / 2);
139 * tsens_hw_to_mC - Return sign-extended temperature in mCelsius.
140 * @s: Pointer to sensor struct
141 * @field: Index into regmap_field array pointing to temperature data
143 * This function handles temperature returned in ADC code or deciCelsius
144 * depending on IP version.
146 * Return: Temperature in milliCelsius on success, a negative errno will
147 * be returned in error cases
149 static int tsens_hw_to_mC(const struct tsens_sensor *s, int field)
151 struct tsens_priv *priv = s->priv;
156 resolution = priv->fields[LAST_TEMP_0].msb -
157 priv->fields[LAST_TEMP_0].lsb;
159 ret = regmap_field_read(priv->rf[field], &temp);
163 /* Convert temperature from ADC code to milliCelsius */
165 return code_to_degc(temp, s) * 1000;
167 /* deciCelsius -> milliCelsius along with sign extension */
168 return sign_extend32(temp, resolution) * 100;
172 * tsens_mC_to_hw - Convert temperature to hardware register value
173 * @s: Pointer to sensor struct
174 * @temp: temperature in milliCelsius to be programmed to hardware
176 * This function outputs the value to be written to hardware in ADC code
177 * or deciCelsius depending on IP version.
179 * Return: ADC code or temperature in deciCelsius.
181 static int tsens_mC_to_hw(const struct tsens_sensor *s, int temp)
183 struct tsens_priv *priv = s->priv;
185 /* milliC to adc code */
187 return degc_to_code(temp / 1000, s);
189 /* milliC to deciC */
193 static inline enum tsens_ver tsens_version(struct tsens_priv *priv)
195 return priv->feat->ver_major;
198 static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,
199 enum tsens_irq_type irq_type, bool enable)
205 index = UP_INT_CLEAR_0 + hw_id;
208 index = LOW_INT_CLEAR_0 + hw_id;
211 /* No critical interrupts before v2 */
214 regmap_field_write(priv->rf[index], enable ? 0 : 1);
217 static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id,
218 enum tsens_irq_type irq_type, bool enable)
220 u32 index_mask = 0, index_clear = 0;
223 * To enable the interrupt flag for a sensor:
224 * - clear the mask bit
225 * To disable the interrupt flag for a sensor:
226 * - Mask further interrupts for this sensor
227 * - Write 1 followed by 0 to clear the interrupt
231 index_mask = UP_INT_MASK_0 + hw_id;
232 index_clear = UP_INT_CLEAR_0 + hw_id;
235 index_mask = LOW_INT_MASK_0 + hw_id;
236 index_clear = LOW_INT_CLEAR_0 + hw_id;
239 index_mask = CRIT_INT_MASK_0 + hw_id;
240 index_clear = CRIT_INT_CLEAR_0 + hw_id;
245 regmap_field_write(priv->rf[index_mask], 0);
247 regmap_field_write(priv->rf[index_mask], 1);
248 regmap_field_write(priv->rf[index_clear], 1);
249 regmap_field_write(priv->rf[index_clear], 0);
254 * tsens_set_interrupt - Set state of an interrupt
255 * @priv: Pointer to tsens controller private data
256 * @hw_id: Hardware ID aka. sensor number
257 * @irq_type: irq_type from enum tsens_irq_type
258 * @enable: false = disable, true = enable
260 * Call IP-specific function to set state of an interrupt
264 static void tsens_set_interrupt(struct tsens_priv *priv, u32 hw_id,
265 enum tsens_irq_type irq_type, bool enable)
267 dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__,
268 irq_type ? ((irq_type == 1) ? "UP" : "CRITICAL") : "LOW",
269 enable ? "en" : "dis");
270 if (tsens_version(priv) > VER_1_X)
271 tsens_set_interrupt_v2(priv, hw_id, irq_type, enable);
273 tsens_set_interrupt_v1(priv, hw_id, irq_type, enable);
277 * tsens_threshold_violated - Check if a sensor temperature violated a preset threshold
278 * @priv: Pointer to tsens controller private data
279 * @hw_id: Hardware ID aka. sensor number
280 * @d: Pointer to irq state data
282 * Return: 0 if threshold was not violated, 1 if it was violated and negative
283 * errno in case of errors
285 static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id,
286 struct tsens_irq_data *d)
290 ret = regmap_field_read(priv->rf[UPPER_STATUS_0 + hw_id], &d->up_viol);
293 ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol);
297 if (priv->feat->crit_int) {
298 ret = regmap_field_read(priv->rf[CRITICAL_STATUS_0 + hw_id],
304 if (d->up_viol || d->low_viol || d->crit_viol)
310 static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id,
311 const struct tsens_sensor *s,
312 struct tsens_irq_data *d)
316 ret = regmap_field_read(priv->rf[UP_INT_CLEAR_0 + hw_id], &d->up_irq_clear);
319 ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);
322 if (tsens_version(priv) > VER_1_X) {
323 ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);
326 ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);
329 ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id],
333 ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id],
338 d->crit_thresh = tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id);
340 /* No mask register on older TSENS */
343 d->crit_irq_clear = 0;
344 d->crit_irq_mask = 0;
348 d->up_thresh = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id);
349 d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id);
351 dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u|%u) | clr(%u|%u|%u) | mask(%u|%u|%u)\n",
353 (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "",
354 d->low_viol, d->up_viol, d->crit_viol,
355 d->low_irq_clear, d->up_irq_clear, d->crit_irq_clear,
356 d->low_irq_mask, d->up_irq_mask, d->crit_irq_mask);
357 dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d:%d)\n", hw_id, __func__,
358 (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "",
359 d->low_thresh, d->up_thresh, d->crit_thresh);
364 static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
367 return mask & (1 << hw_id);
369 /* v1, v0.1 don't have a irq mask register */
374 * tsens_critical_irq_thread() - Threaded handler for critical interrupts
376 * @data: tsens controller private data
378 * Check FSM watchdog bark status and clear if needed.
379 * Check all sensors to find ones that violated their critical threshold limits.
380 * Clear and then re-enable the interrupt.
382 * The level-triggered interrupt might deassert if the temperature returned to
383 * within the threshold limits by the time the handler got scheduled. We
384 * consider the irq to have been handled in that case.
386 * Return: IRQ_HANDLED
388 static irqreturn_t tsens_critical_irq_thread(int irq, void *data)
390 struct tsens_priv *priv = data;
391 struct tsens_irq_data d;
393 u32 wdog_status, wdog_count;
395 if (priv->feat->has_watchdog) {
396 ret = regmap_field_read(priv->rf[WDOG_BARK_STATUS],
402 /* Clear WDOG interrupt */
403 regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1);
404 regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0);
405 ret = regmap_field_read(priv->rf[WDOG_BARK_COUNT],
410 dev_dbg(priv->dev, "%s: watchdog count: %d\n",
411 __func__, wdog_count);
413 /* Fall through to handle critical interrupts if any */
417 for (i = 0; i < priv->num_sensors; i++) {
418 const struct tsens_sensor *s = &priv->sensor[i];
419 u32 hw_id = s->hw_id;
423 if (!tsens_threshold_violated(priv, hw_id, &d))
425 ret = get_temp_tsens_valid(s, &temp);
427 dev_err(priv->dev, "[%u] %s: error reading sensor\n",
432 tsens_read_irq_state(priv, hw_id, s, &d);
434 !masked_irq(hw_id, d.crit_irq_mask, tsens_version(priv))) {
435 /* Mask critical interrupts, unused on Linux */
436 tsens_set_interrupt(priv, hw_id, CRITICAL, false);
444 * tsens_irq_thread - Threaded interrupt handler for uplow interrupts
446 * @data: tsens controller private data
448 * Check all sensors to find ones that violated their threshold limits. If the
449 * temperature is still outside the limits, call thermal_zone_device_update() to
450 * update the thresholds, else re-enable the interrupts.
452 * The level-triggered interrupt might deassert if the temperature returned to
453 * within the threshold limits by the time the handler got scheduled. We
454 * consider the irq to have been handled in that case.
456 * Return: IRQ_HANDLED
458 static irqreturn_t tsens_irq_thread(int irq, void *data)
460 struct tsens_priv *priv = data;
461 struct tsens_irq_data d;
462 bool enable = true, disable = false;
466 for (i = 0; i < priv->num_sensors; i++) {
467 bool trigger = false;
468 const struct tsens_sensor *s = &priv->sensor[i];
469 u32 hw_id = s->hw_id;
473 if (!tsens_threshold_violated(priv, hw_id, &d))
475 ret = get_temp_tsens_valid(s, &temp);
477 dev_err(priv->dev, "[%u] %s: error reading sensor\n",
482 spin_lock_irqsave(&priv->ul_lock, flags);
484 tsens_read_irq_state(priv, hw_id, s, &d);
487 !masked_irq(hw_id, d.up_irq_mask, tsens_version(priv))) {
488 tsens_set_interrupt(priv, hw_id, UPPER, disable);
489 if (d.up_thresh > temp) {
490 dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
492 tsens_set_interrupt(priv, hw_id, UPPER, enable);
495 /* Keep irq masked */
497 } else if (d.low_viol &&
498 !masked_irq(hw_id, d.low_irq_mask, tsens_version(priv))) {
499 tsens_set_interrupt(priv, hw_id, LOWER, disable);
500 if (d.low_thresh < temp) {
501 dev_dbg(priv->dev, "[%u] %s: re-arm low\n",
503 tsens_set_interrupt(priv, hw_id, LOWER, enable);
506 /* Keep irq masked */
510 spin_unlock_irqrestore(&priv->ul_lock, flags);
513 dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
514 hw_id, __func__, temp);
515 thermal_zone_device_update(s->tzd,
516 THERMAL_EVENT_UNSPECIFIED);
518 dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
519 hw_id, __func__, temp);
522 if (tsens_version(priv) < VER_0_1) {
523 /* Constraint: There is only 1 interrupt control register for all
524 * 11 temperature sensor. So monitoring more than 1 sensor based
525 * on interrupts will yield inconsistent result. To overcome this
526 * issue we will monitor only sensor 0 which is the master sensor.
535 static int tsens_set_trips(void *_sensor, int low, int high)
537 struct tsens_sensor *s = _sensor;
538 struct tsens_priv *priv = s->priv;
539 struct device *dev = priv->dev;
540 struct tsens_irq_data d;
542 int high_val, low_val, cl_high, cl_low;
543 u32 hw_id = s->hw_id;
545 if (tsens_version(priv) < VER_0_1) {
546 /* Pre v0.1 IP had a single register for each type of interrupt
552 dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
553 hw_id, __func__, low, high);
555 cl_high = clamp_val(high, -40000, 120000);
556 cl_low = clamp_val(low, -40000, 120000);
558 high_val = tsens_mC_to_hw(s, cl_high);
559 low_val = tsens_mC_to_hw(s, cl_low);
561 spin_lock_irqsave(&priv->ul_lock, flags);
563 tsens_read_irq_state(priv, hw_id, s, &d);
565 /* Write the new thresholds and clear the status */
566 regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val);
567 regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val);
568 tsens_set_interrupt(priv, hw_id, LOWER, true);
569 tsens_set_interrupt(priv, hw_id, UPPER, true);
571 spin_unlock_irqrestore(&priv->ul_lock, flags);
573 dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n",
574 hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
579 static int tsens_enable_irq(struct tsens_priv *priv)
582 int val = tsens_version(priv) > VER_1_X ? 7 : 1;
584 ret = regmap_field_write(priv->rf[INT_EN], val);
586 dev_err(priv->dev, "%s: failed to enable interrupts\n",
592 static void tsens_disable_irq(struct tsens_priv *priv)
594 regmap_field_write(priv->rf[INT_EN], 0);
597 int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp)
599 struct tsens_priv *priv = s->priv;
600 int hw_id = s->hw_id;
601 u32 temp_idx = LAST_TEMP_0 + hw_id;
602 u32 valid_idx = VALID_0 + hw_id;
606 /* VER_0 doesn't have VALID bit */
607 if (tsens_version(priv) == VER_0)
610 /* Valid bit is 0 for 6 AHB clock cycles.
611 * At 19.2MHz, 1 AHB clock is ~60ns.
612 * We should enter this loop very, very rarely.
613 * Wait 1 us since it's the min of poll_timeout macro.
614 * Old value was 400 ns.
616 ret = regmap_field_read_poll_timeout(priv->rf[valid_idx], valid,
617 valid, 1, 20 * USEC_PER_MSEC);
622 /* Valid bit is set, OK to read the temperature */
623 *temp = tsens_hw_to_mC(s, temp_idx);
628 int get_temp_common(const struct tsens_sensor *s, int *temp)
630 struct tsens_priv *priv = s->priv;
631 int hw_id = s->hw_id;
632 int last_temp = 0, ret, trdy;
633 unsigned long timeout;
635 timeout = jiffies + usecs_to_jiffies(TIMEOUT_US);
637 if (tsens_version(priv) == VER_0) {
638 ret = regmap_field_read(priv->rf[TRDY], &trdy);
645 ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
649 *temp = code_to_degc(last_temp, s) * 1000;
652 } while (time_before(jiffies, timeout));
657 #ifdef CONFIG_DEBUG_FS
658 static int dbg_sensors_show(struct seq_file *s, void *data)
660 struct platform_device *pdev = s->private;
661 struct tsens_priv *priv = platform_get_drvdata(pdev);
664 seq_printf(s, "max: %2d\nnum: %2d\n\n",
665 priv->feat->max_sensors, priv->num_sensors);
667 seq_puts(s, " id slope offset\n--------------------------\n");
668 for (i = 0; i < priv->num_sensors; i++) {
669 seq_printf(s, "%8d %8d %8d\n", priv->sensor[i].hw_id,
670 priv->sensor[i].slope, priv->sensor[i].offset);
676 static int dbg_version_show(struct seq_file *s, void *data)
678 struct platform_device *pdev = s->private;
679 struct tsens_priv *priv = platform_get_drvdata(pdev);
680 u32 maj_ver, min_ver, step_ver;
683 if (tsens_version(priv) > VER_0_1) {
684 ret = regmap_field_read(priv->rf[VER_MAJOR], &maj_ver);
687 ret = regmap_field_read(priv->rf[VER_MINOR], &min_ver);
690 ret = regmap_field_read(priv->rf[VER_STEP], &step_ver);
693 seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver);
695 seq_puts(s, "0.1.0\n");
701 DEFINE_SHOW_ATTRIBUTE(dbg_version);
702 DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
704 static void tsens_debug_init(struct platform_device *pdev)
706 struct tsens_priv *priv = platform_get_drvdata(pdev);
707 struct dentry *root, *file;
709 root = debugfs_lookup("tsens", NULL);
711 priv->debug_root = debugfs_create_dir("tsens", NULL);
713 priv->debug_root = root;
715 file = debugfs_lookup("version", priv->debug_root);
717 debugfs_create_file("version", 0444, priv->debug_root,
718 pdev, &dbg_version_fops);
720 /* A directory for each instance of the TSENS IP */
721 priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root);
722 debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops);
725 static inline void tsens_debug_init(struct platform_device *pdev) {}
728 static const struct regmap_config tsens_config = {
735 static const struct regmap_config tsens_srot_config = {
742 int __init init_common(struct tsens_priv *priv)
744 void __iomem *tm_base, *srot_base;
745 struct device *dev = priv->dev;
747 struct resource *res;
750 struct platform_device *op = of_find_device_by_node(priv->dev->of_node);
755 if (op->num_resources > 1) {
756 /* DT with separate SROT and TM address space */
758 res = platform_get_resource(op, IORESOURCE_MEM, 1);
759 srot_base = devm_ioremap_resource(dev, res);
760 if (IS_ERR(srot_base)) {
761 ret = PTR_ERR(srot_base);
765 priv->srot_map = devm_regmap_init_mmio(dev, srot_base,
767 if (IS_ERR(priv->srot_map)) {
768 ret = PTR_ERR(priv->srot_map);
772 /* old DTs where SROT and TM were in a contiguous 2K block */
773 priv->tm_offset = 0x1000;
776 if (tsens_version(priv) >= VER_0_1) {
777 res = platform_get_resource(op, IORESOURCE_MEM, 0);
778 tm_base = devm_ioremap_resource(dev, res);
779 if (IS_ERR(tm_base)) {
780 ret = PTR_ERR(tm_base);
784 priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
785 } else { /* VER_0 share the same gcc regs using a syscon */
786 struct device *parent = priv->dev->parent;
789 priv->tm_map = syscon_node_to_regmap(parent->of_node);
792 if (IS_ERR_OR_NULL(priv->tm_map)) {
796 ret = PTR_ERR(priv->tm_map);
800 /* VER_0 have only tm_map */
802 priv->srot_map = priv->tm_map;
804 if (tsens_version(priv) > VER_0_1) {
805 for (i = VER_MAJOR; i <= VER_STEP; i++) {
806 priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
808 if (IS_ERR(priv->rf[i])) {
809 ret = PTR_ERR(priv->rf[i]);
813 ret = regmap_field_read(priv->rf[VER_MINOR], &ver_minor);
818 priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
819 priv->fields[TSENS_EN]);
820 if (IS_ERR(priv->rf[TSENS_EN])) {
821 ret = PTR_ERR(priv->rf[TSENS_EN]);
824 /* in VER_0 TSENS need to be explicitly enabled */
825 if (tsens_version(priv) == VER_0)
826 regmap_field_write(priv->rf[TSENS_EN], 1);
828 ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
832 dev_err(dev, "%s: device not enabled\n", __func__);
837 priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
838 priv->fields[SENSOR_EN]);
839 if (IS_ERR(priv->rf[SENSOR_EN])) {
840 ret = PTR_ERR(priv->rf[SENSOR_EN]);
843 priv->rf[INT_EN] = devm_regmap_field_alloc(dev, priv->tm_map,
844 priv->fields[INT_EN]);
845 if (IS_ERR(priv->rf[INT_EN])) {
846 ret = PTR_ERR(priv->rf[INT_EN]);
850 priv->rf[TSENS_SW_RST] =
851 devm_regmap_field_alloc(dev, priv->srot_map, priv->fields[TSENS_SW_RST]);
852 if (IS_ERR(priv->rf[TSENS_SW_RST])) {
853 ret = PTR_ERR(priv->rf[TSENS_SW_RST]);
857 priv->rf[TRDY] = devm_regmap_field_alloc(dev, priv->tm_map, priv->fields[TRDY]);
858 if (IS_ERR(priv->rf[TRDY])) {
859 ret = PTR_ERR(priv->rf[TRDY]);
863 /* This loop might need changes if enum regfield_ids is reordered */
864 for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
865 for (i = 0; i < priv->feat->max_sensors; i++) {
868 priv->rf[idx] = devm_regmap_field_alloc(dev,
871 if (IS_ERR(priv->rf[idx])) {
872 ret = PTR_ERR(priv->rf[idx]);
878 if (priv->feat->crit_int || tsens_version(priv) < VER_0_1) {
879 /* Loop might need changes if enum regfield_ids is reordered */
880 for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
881 for (i = 0; i < priv->feat->max_sensors; i++) {
885 devm_regmap_field_alloc(dev,
888 if (IS_ERR(priv->rf[idx])) {
889 ret = PTR_ERR(priv->rf[idx]);
896 if (tsens_version(priv) > VER_1_X && ver_minor > 2) {
897 /* Watchdog is present only on v2.3+ */
898 priv->feat->has_watchdog = 1;
899 for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) {
900 priv->rf[i] = devm_regmap_field_alloc(dev, priv->tm_map,
902 if (IS_ERR(priv->rf[i])) {
903 ret = PTR_ERR(priv->rf[i]);
908 * Watchdog is already enabled, unmask the bark.
909 * Disable cycle completion monitoring
911 regmap_field_write(priv->rf[WDOG_BARK_MASK], 0);
912 regmap_field_write(priv->rf[CC_MON_MASK], 1);
915 spin_lock_init(&priv->ul_lock);
917 /* VER_0 interrupt doesn't need to be enabled */
918 if (tsens_version(priv) >= VER_0_1)
919 tsens_enable_irq(priv);
921 tsens_debug_init(op);
924 put_device(&op->dev);
928 static int tsens_get_temp(void *data, int *temp)
930 struct tsens_sensor *s = data;
931 struct tsens_priv *priv = s->priv;
933 return priv->ops->get_temp(s, temp);
936 static int tsens_get_trend(void *data, int trip, enum thermal_trend *trend)
938 struct tsens_sensor *s = data;
939 struct tsens_priv *priv = s->priv;
941 if (priv->ops->get_trend)
942 return priv->ops->get_trend(s, trend);
947 static int __maybe_unused tsens_suspend(struct device *dev)
949 struct tsens_priv *priv = dev_get_drvdata(dev);
951 if (priv->ops && priv->ops->suspend)
952 return priv->ops->suspend(priv);
957 static int __maybe_unused tsens_resume(struct device *dev)
959 struct tsens_priv *priv = dev_get_drvdata(dev);
961 if (priv->ops && priv->ops->resume)
962 return priv->ops->resume(priv);
967 static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume);
969 static const struct of_device_id tsens_table[] = {
971 .compatible = "qcom,ipq8064-tsens",
974 .compatible = "qcom,mdm9607-tsens",
977 .compatible = "qcom,msm8916-tsens",
980 .compatible = "qcom,msm8939-tsens",
983 .compatible = "qcom,msm8960-tsens",
986 .compatible = "qcom,msm8974-tsens",
989 .compatible = "qcom,msm8976-tsens",
992 .compatible = "qcom,msm8996-tsens",
995 .compatible = "qcom,tsens-v1",
996 .data = &data_tsens_v1,
998 .compatible = "qcom,tsens-v2",
999 .data = &data_tsens_v2,
1003 MODULE_DEVICE_TABLE(of, tsens_table);
1005 static const struct thermal_zone_of_device_ops tsens_of_ops = {
1006 .get_temp = tsens_get_temp,
1007 .get_trend = tsens_get_trend,
1008 .set_trips = tsens_set_trips,
1011 static int tsens_register_irq(struct tsens_priv *priv, char *irqname,
1012 irq_handler_t thread_fn)
1014 struct platform_device *pdev;
1017 pdev = of_find_device_by_node(priv->dev->of_node);
1021 irq = platform_get_irq_byname(pdev, irqname);
1024 /* For old DTs with no IRQ defined */
1028 /* VER_0 interrupt is TRIGGER_RISING, VER_0_1 and up is ONESHOT */
1029 if (tsens_version(priv) == VER_0)
1030 ret = devm_request_threaded_irq(&pdev->dev, irq,
1032 IRQF_TRIGGER_RISING,
1033 dev_name(&pdev->dev),
1036 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1037 thread_fn, IRQF_ONESHOT,
1038 dev_name(&pdev->dev),
1042 dev_err(&pdev->dev, "%s: failed to get irq\n",
1045 enable_irq_wake(irq);
1048 put_device(&pdev->dev);
1052 static int tsens_register(struct tsens_priv *priv)
1055 struct thermal_zone_device *tzd;
1057 for (i = 0; i < priv->num_sensors; i++) {
1058 priv->sensor[i].priv = priv;
1059 tzd = devm_thermal_zone_of_sensor_register(priv->dev, priv->sensor[i].hw_id,
1064 priv->sensor[i].tzd = tzd;
1065 if (priv->ops->enable)
1066 priv->ops->enable(priv, i);
1068 if (devm_thermal_add_hwmon_sysfs(tzd))
1070 "Failed to add hwmon sysfs attributes\n");
1073 /* VER_0 require to set MIN and MAX THRESH
1074 * These 2 regs are set using the:
1075 * - CRIT_THRESH_0 for MAX THRESH hardcoded to 120°C
1076 * - CRIT_THRESH_1 for MIN THRESH hardcoded to 0°C
1078 if (tsens_version(priv) < VER_0_1) {
1079 regmap_field_write(priv->rf[CRIT_THRESH_0],
1080 tsens_mC_to_hw(priv->sensor, 120000));
1082 regmap_field_write(priv->rf[CRIT_THRESH_1],
1083 tsens_mC_to_hw(priv->sensor, 0));
1086 ret = tsens_register_irq(priv, "uplow", tsens_irq_thread);
1090 if (priv->feat->crit_int)
1091 ret = tsens_register_irq(priv, "critical",
1092 tsens_critical_irq_thread);
1097 static int tsens_probe(struct platform_device *pdev)
1101 struct device_node *np;
1102 struct tsens_priv *priv;
1103 const struct tsens_plat_data *data;
1104 const struct of_device_id *id;
1107 if (pdev->dev.of_node)
1110 dev = pdev->dev.parent;
1114 id = of_match_node(tsens_table, np);
1120 num_sensors = data->num_sensors;
1123 of_property_read_u32(np, "#qcom,sensors", &num_sensors);
1125 if (num_sensors <= 0) {
1126 dev_err(dev, "%s: invalid number of sensors\n", __func__);
1130 priv = devm_kzalloc(dev,
1131 struct_size(priv, sensor, num_sensors),
1137 priv->num_sensors = num_sensors;
1138 priv->ops = data->ops;
1139 for (i = 0; i < priv->num_sensors; i++) {
1141 priv->sensor[i].hw_id = data->hw_ids[i];
1143 priv->sensor[i].hw_id = i;
1145 priv->feat = data->feat;
1146 priv->fields = data->fields;
1148 platform_set_drvdata(pdev, priv);
1150 if (!priv->ops || !priv->ops->init || !priv->ops->get_temp)
1153 ret = priv->ops->init(priv);
1155 dev_err(dev, "%s: init failed\n", __func__);
1159 if (priv->ops->calibrate) {
1160 ret = priv->ops->calibrate(priv);
1162 if (ret != -EPROBE_DEFER)
1163 dev_err(dev, "%s: calibration failed\n", __func__);
1168 return tsens_register(priv);
1171 static int tsens_remove(struct platform_device *pdev)
1173 struct tsens_priv *priv = platform_get_drvdata(pdev);
1175 debugfs_remove_recursive(priv->debug_root);
1176 tsens_disable_irq(priv);
1177 if (priv->ops->disable)
1178 priv->ops->disable(priv);
1183 static struct platform_driver tsens_driver = {
1184 .probe = tsens_probe,
1185 .remove = tsens_remove,
1187 .name = "qcom-tsens",
1188 .pm = &tsens_pm_ops,
1189 .of_match_table = tsens_table,
1192 module_platform_driver(tsens_driver);
1194 MODULE_LICENSE("GPL v2");
1195 MODULE_DESCRIPTION("QCOM Temperature Sensor driver");
1196 MODULE_ALIAS("platform:qcom-tsens");