1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2015, Intel Corporation.
7 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/slab.h>
12 #include <linux/interrupt.h>
13 #include <asm/iosf_mbi.h>
14 #include "intel_soc_dts_iosf.h"
16 #define SOC_DTS_OFFSET_ENABLE 0xB0
17 #define SOC_DTS_OFFSET_TEMP 0xB1
19 #define SOC_DTS_OFFSET_PTPS 0xB2
20 #define SOC_DTS_OFFSET_PTTS 0xB3
21 #define SOC_DTS_OFFSET_PTTSS 0xB4
22 #define SOC_DTS_OFFSET_PTMC 0x80
23 #define SOC_DTS_TE_AUX0 0xB5
24 #define SOC_DTS_TE_AUX1 0xB6
26 #define SOC_DTS_AUX0_ENABLE_BIT BIT(0)
27 #define SOC_DTS_AUX1_ENABLE_BIT BIT(1)
28 #define SOC_DTS_CPU_MODULE0_ENABLE_BIT BIT(16)
29 #define SOC_DTS_CPU_MODULE1_ENABLE_BIT BIT(17)
30 #define SOC_DTS_TE_SCI_ENABLE BIT(9)
31 #define SOC_DTS_TE_SMI_ENABLE BIT(10)
32 #define SOC_DTS_TE_MSI_ENABLE BIT(11)
33 #define SOC_DTS_TE_APICA_ENABLE BIT(14)
34 #define SOC_DTS_PTMC_APIC_DEASSERT_BIT BIT(4)
36 /* DTS encoding for TJ MAX temperature */
37 #define SOC_DTS_TJMAX_ENCODING 0x7F
39 /* Only 2 out of 4 is allowed for OSPM */
40 #define SOC_MAX_DTS_TRIPS 2
42 /* Mask for two trips in status bits */
43 #define SOC_DTS_TRIP_MASK 0x03
46 #define SOC_MAX_DTS_SENSORS 2
48 static int get_tj_max(u32 *tj_max)
54 err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
58 val = (eax >> 16) & 0xff;
74 static int sys_get_trip_temp(struct thermal_zone_device *tzd, int trip,
79 struct intel_soc_dts_sensor_entry *dts;
80 struct intel_soc_dts_sensors *sensors;
83 sensors = dts->sensors;
84 mutex_lock(&sensors->dts_update_lock);
85 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
86 SOC_DTS_OFFSET_PTPS, &out);
87 mutex_unlock(&sensors->dts_update_lock);
91 out = (out >> (trip * 8)) & SOC_DTS_TJMAX_ENCODING;
95 *temp = sensors->tj_max - out * 1000;
100 static int update_trip_temp(struct intel_soc_dts_sensor_entry *dts,
101 int thres_index, int temp,
102 enum thermal_trip_type trip_type)
107 unsigned long update_ptps;
112 u32 int_enable_bit = SOC_DTS_TE_APICA_ENABLE;
113 struct intel_soc_dts_sensors *sensors = dts->sensors;
115 if (sensors->intr_type == INTEL_SOC_DTS_INTERRUPT_MSI)
116 int_enable_bit |= SOC_DTS_TE_MSI_ENABLE;
118 temp_out = (sensors->tj_max - temp) / 1000;
120 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
121 SOC_DTS_OFFSET_PTPS, &store_ptps);
125 update_ptps = store_ptps;
126 bitmap_set_value8(&update_ptps, temp_out & 0xFF, thres_index * 8);
129 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
130 SOC_DTS_OFFSET_PTPS, out);
134 pr_debug("update_trip_temp PTPS = %x\n", out);
135 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
136 SOC_DTS_OFFSET_PTMC, &out);
138 goto err_restore_ptps;
142 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
143 SOC_DTS_TE_AUX0 + thres_index,
146 goto err_restore_ptmc;
148 store_te_out = te_out;
149 /* Enable for CPU module 0 and module 1 */
150 out |= (SOC_DTS_CPU_MODULE0_ENABLE_BIT |
151 SOC_DTS_CPU_MODULE1_ENABLE_BIT);
154 out |= SOC_DTS_AUX1_ENABLE_BIT;
156 out |= SOC_DTS_AUX0_ENABLE_BIT;
157 te_out |= int_enable_bit;
160 out &= ~SOC_DTS_AUX1_ENABLE_BIT;
162 out &= ~SOC_DTS_AUX0_ENABLE_BIT;
163 te_out &= ~int_enable_bit;
165 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
166 SOC_DTS_OFFSET_PTMC, out);
168 goto err_restore_te_out;
170 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
171 SOC_DTS_TE_AUX0 + thres_index,
174 goto err_restore_te_out;
176 dts->trip_types[thres_index] = trip_type;
180 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
181 SOC_DTS_OFFSET_PTMC, store_te_out);
183 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
184 SOC_DTS_OFFSET_PTMC, store_ptmc);
186 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
187 SOC_DTS_OFFSET_PTPS, store_ptps);
188 /* Nothing we can do if restore fails */
193 static int sys_set_trip_temp(struct thermal_zone_device *tzd, int trip,
196 struct intel_soc_dts_sensor_entry *dts = tzd->devdata;
197 struct intel_soc_dts_sensors *sensors = dts->sensors;
200 if (temp > sensors->tj_max)
203 mutex_lock(&sensors->dts_update_lock);
204 status = update_trip_temp(tzd->devdata, trip, temp,
205 dts->trip_types[trip]);
206 mutex_unlock(&sensors->dts_update_lock);
211 static int sys_get_trip_type(struct thermal_zone_device *tzd,
212 int trip, enum thermal_trip_type *type)
214 struct intel_soc_dts_sensor_entry *dts;
218 *type = dts->trip_types[trip];
223 static int sys_get_curr_temp(struct thermal_zone_device *tzd,
228 struct intel_soc_dts_sensor_entry *dts;
229 struct intel_soc_dts_sensors *sensors;
233 sensors = dts->sensors;
234 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
235 SOC_DTS_OFFSET_TEMP, &out);
240 out = bitmap_get_value8(&raw, dts->id * 8) - SOC_DTS_TJMAX_ENCODING;
241 *temp = sensors->tj_max - out * 1000;
246 static struct thermal_zone_device_ops tzone_ops = {
247 .get_temp = sys_get_curr_temp,
248 .get_trip_temp = sys_get_trip_temp,
249 .get_trip_type = sys_get_trip_type,
250 .set_trip_temp = sys_set_trip_temp,
253 static int soc_dts_enable(int id)
258 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
259 SOC_DTS_OFFSET_ENABLE, &out);
263 if (!(out & BIT(id))) {
265 ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
266 SOC_DTS_OFFSET_ENABLE, out);
274 static void remove_dts_thermal_zone(struct intel_soc_dts_sensor_entry *dts)
277 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
278 SOC_DTS_OFFSET_ENABLE, dts->store_status);
279 thermal_zone_device_unregister(dts->tzone);
283 static int add_dts_thermal_zone(int id, struct intel_soc_dts_sensor_entry *dts,
284 bool notification_support, int trip_cnt,
285 int read_only_trip_cnt)
291 int writable_trip_cnt = 0;
297 /* Store status to restor on exit */
298 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
299 SOC_DTS_OFFSET_ENABLE, &dts->store_status);
304 if (notification_support) {
305 trip_count = min(SOC_MAX_DTS_TRIPS, trip_cnt);
306 writable_trip_cnt = trip_count - read_only_trip_cnt;
307 trip_mask = GENMASK(writable_trip_cnt - 1, 0);
310 /* Check if the writable trip we provide is not used by BIOS */
311 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
312 SOC_DTS_OFFSET_PTPS, &store_ptps);
317 for_each_set_clump8(i, trip, &ptps, writable_trip_cnt * 8)
318 trip_mask &= ~BIT(i / 8);
320 dts->trip_mask = trip_mask;
321 dts->trip_count = trip_count;
322 snprintf(name, sizeof(name), "soc_dts%d", id);
323 dts->tzone = thermal_zone_device_register(name,
328 if (IS_ERR(dts->tzone)) {
329 ret = PTR_ERR(dts->tzone);
332 ret = thermal_zone_device_enable(dts->tzone);
336 ret = soc_dts_enable(id);
342 thermal_zone_device_unregister(dts->tzone);
347 int intel_soc_dts_iosf_add_read_only_critical_trip(
348 struct intel_soc_dts_sensors *sensors, int critical_offset)
352 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
353 for (j = 0; j < sensors->soc_dts[i].trip_count; ++j) {
354 if (!(sensors->soc_dts[i].trip_mask & BIT(j))) {
355 return update_trip_temp(&sensors->soc_dts[i], j,
356 sensors->tj_max - critical_offset,
357 THERMAL_TRIP_CRITICAL);
364 EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_add_read_only_critical_trip);
366 void intel_soc_dts_iosf_interrupt_handler(struct intel_soc_dts_sensors *sensors)
373 spin_lock_irqsave(&sensors->intr_notify_lock, flags);
375 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
376 SOC_DTS_OFFSET_PTMC, &ptmc_out);
377 ptmc_out |= SOC_DTS_PTMC_APIC_DEASSERT_BIT;
378 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
379 SOC_DTS_OFFSET_PTMC, ptmc_out);
381 status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
382 SOC_DTS_OFFSET_PTTSS, &sticky_out);
383 pr_debug("status %d PTTSS %x\n", status, sticky_out);
384 if (sticky_out & SOC_DTS_TRIP_MASK) {
386 /* reset sticky bit */
387 status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
388 SOC_DTS_OFFSET_PTTSS, sticky_out);
389 spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
391 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
392 pr_debug("TZD update for zone %d\n", i);
393 thermal_zone_device_update(sensors->soc_dts[i].tzone,
394 THERMAL_EVENT_UNSPECIFIED);
397 spin_unlock_irqrestore(&sensors->intr_notify_lock, flags);
399 EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_interrupt_handler);
401 struct intel_soc_dts_sensors *intel_soc_dts_iosf_init(
402 enum intel_soc_dts_interrupt_type intr_type, int trip_count,
403 int read_only_trip_count)
405 struct intel_soc_dts_sensors *sensors;
411 if (!iosf_mbi_available())
412 return ERR_PTR(-ENODEV);
414 if (!trip_count || read_only_trip_count > trip_count)
415 return ERR_PTR(-EINVAL);
417 if (get_tj_max(&tj_max))
418 return ERR_PTR(-EINVAL);
420 sensors = kzalloc(sizeof(*sensors), GFP_KERNEL);
422 return ERR_PTR(-ENOMEM);
424 spin_lock_init(&sensors->intr_notify_lock);
425 mutex_init(&sensors->dts_update_lock);
426 sensors->intr_type = intr_type;
427 sensors->tj_max = tj_max;
428 if (intr_type == INTEL_SOC_DTS_INTERRUPT_NONE)
429 notification = false;
432 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
433 sensors->soc_dts[i].sensors = sensors;
434 ret = add_dts_thermal_zone(i, &sensors->soc_dts[i],
435 notification, trip_count,
436 read_only_trip_count);
441 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
442 ret = update_trip_temp(&sensors->soc_dts[i], 0, 0,
443 THERMAL_TRIP_PASSIVE);
445 goto err_remove_zone;
447 ret = update_trip_temp(&sensors->soc_dts[i], 1, 0,
448 THERMAL_TRIP_PASSIVE);
450 goto err_remove_zone;
455 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i)
456 remove_dts_thermal_zone(&sensors->soc_dts[i]);
462 EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_init);
464 void intel_soc_dts_iosf_exit(struct intel_soc_dts_sensors *sensors)
468 for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
469 update_trip_temp(&sensors->soc_dts[i], 0, 0, 0);
470 update_trip_temp(&sensors->soc_dts[i], 1, 0, 0);
471 remove_dts_thermal_zone(&sensors->soc_dts[i]);
475 EXPORT_SYMBOL_GPL(intel_soc_dts_iosf_exit);
477 MODULE_LICENSE("GPL v2");