1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
6 * Purpose: Provide functions to setup NIC operation mode
8 * s_vSafeResetTx - Rest Tx
9 * card_set_rspinf - Set RSPINF
10 * CARDvUpdateBasicTopRate - Update BasicTopRate
11 * CARDbAddBasicRate - Add to BasicRateSet
12 * CARDbIsOFDMinBasicRate - Check if any OFDM rate is in BasicRateSet
13 * card_get_tsf_offset - Calculate TSFOffset
14 * vt6655_get_current_tsf - Read Current NIC TSF counter
15 * card_get_next_tbtt - Calculate Next Beacon TSF counter
16 * CARDvSetFirstNextTBTT - Set NIC Beacon time
17 * CARDvUpdateNextTBTT - Sync. NIC Beacon time
18 * card_radio_power_off - Turn Off NIC Radio Power
21 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
22 * 08-26-2003 Kyle Hsu: Modify the definition type of iobase.
23 * 09-01-2003 Bryan YC Fan: Add vUpdateIFS().
34 /*--------------------- Static Definitions -------------------------*/
36 #define C_SIFS_A 16 /* micro sec. */
39 #define C_EIFS 80 /* micro sec. */
41 #define C_SLOT_SHORT 9 /* micro sec. */
42 #define C_SLOT_LONG 20
44 #define C_CWMIN_A 15 /* slot time */
47 #define C_CWMAX 1023 /* slot time */
49 #define WAIT_BEACON_TX_DOWN_TMO 3 /* Times */
51 /*--------------------- Static Variables --------------------------*/
53 static const unsigned short rx_bcn_tsf_off[MAX_RATE] = {
54 17, 17, 17, 17, 34, 23, 17, 11, 8, 5, 4, 3};
56 /*--------------------- Static Functions --------------------------*/
58 static void vt6655_mac_set_bb_type(void __iomem *iobase, u32 mask)
62 reg_value = ioread32(iobase + MAC_REG_ENCFG);
63 reg_value = reg_value & ~ENCFG_BBTYPE_MASK;
64 reg_value = reg_value | mask;
65 iowrite32(reg_value, iobase + MAC_REG_ENCFG);
68 /*--------------------- Export Functions --------------------------*/
71 * Description: Calculate TxRate and RsvTime fields for RSPINF in OFDM mode.
76 * byPktType - Tx Packet type
78 * tx_rate - pointer to RSPINF TxRate field
79 * rsv_time - pointer to RSPINF RsvTime field
83 static void calculate_ofdmr_parameter(unsigned char rate,
85 unsigned char *tx_rate,
86 unsigned char *rsv_time)
90 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
100 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
110 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
120 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
130 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
140 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
150 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
161 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
172 /*--------------------- Export Functions --------------------------*/
175 * Description: Update IFS
179 * priv - The adapter to be set
183 * Return Value: None.
185 bool card_set_phy_parameter(struct vnt_private *priv, u8 bb_type)
187 unsigned char cw_max_min = 0;
188 unsigned char slot = 0;
189 unsigned char sifs = 0;
190 unsigned char difs = 0;
193 /* Set SIFS, DIFS, EIFS, SlotTime, CwMin */
194 if (bb_type == BB_TYPE_11A) {
195 vt6655_mac_set_bb_type(priv->port_offset, BB_TYPE_11A);
196 bb_write_embedded(priv, 0x88, 0x03);
199 difs = C_SIFS_A + 2 * C_SLOT_SHORT;
201 } else if (bb_type == BB_TYPE_11B) {
202 vt6655_mac_set_bb_type(priv->port_offset, BB_TYPE_11B);
203 bb_write_embedded(priv, 0x88, 0x02);
206 difs = C_SIFS_BG + 2 * C_SLOT_LONG;
208 } else { /* PK_TYPE_11GA & PK_TYPE_11GB */
209 vt6655_mac_set_bb_type(priv->port_offset, BB_TYPE_11G);
210 bb_write_embedded(priv, 0x88, 0x08);
213 if (priv->short_slot_time) {
215 difs = C_SIFS_BG + 2 * C_SLOT_SHORT;
218 difs = C_SIFS_BG + 2 * C_SLOT_LONG;
223 for (i = RATE_54M; i >= RATE_6M; i--) {
224 if (priv->basic_rates & ((u32)(0x1 << i))) {
231 if (priv->rf_type == RF_RFMD2959) {
233 * bcs TX_PE will reserve 3 us hardware's processing
239 * TX_PE will reserve 3 us for MAX2829 A mode only, it is for
240 * better TX throughput; MAC will need 2 us to process, so the
241 * SIFS, DIFS can be shorter by 2 us.
245 if (priv->sifs != sifs) {
247 iowrite8(priv->sifs, priv->port_offset + MAC_REG_SIFS);
249 if (priv->difs != difs) {
251 iowrite8(priv->difs, priv->port_offset + MAC_REG_DIFS);
253 if (priv->eifs != C_EIFS) {
255 iowrite8(priv->eifs, priv->port_offset + MAC_REG_EIFS);
257 if (priv->slot != slot) {
259 iowrite8(priv->slot, priv->port_offset + MAC_REG_SLOT);
261 bb_set_short_slot_time(priv);
263 if (priv->cw_max_min != cw_max_min) {
264 priv->cw_max_min = cw_max_min;
265 iowrite8(priv->cw_max_min, priv->port_offset + MAC_REG_CWMAXMIN0);
268 priv->packet_type = card_get_pkt_type(priv);
270 card_set_rspinf(priv, bb_type);
276 * Description: Sync. TSF counter to BSS
277 * Get TSF offset and write to HW
281 * priv - The adapter to be sync.
282 * rx_rate - data rate of receive beacon
283 * bss_timestamp - Rx BCN's TSF
284 * qwLocalTSF - Local TSF
290 bool card_update_tsf(struct vnt_private *priv, unsigned char rx_rate,
296 local_tsf = vt6655_get_current_tsf(priv);
298 if (bss_timestamp != local_tsf) {
299 tsf_offset = card_get_tsf_offset(rx_rate, bss_timestamp,
301 /* adjust TSF, HW's TSF add TSF Offset reg */
302 tsf_offset = le64_to_cpu(tsf_offset);
303 iowrite32((u32)tsf_offset, priv->port_offset + MAC_REG_TSFOFST);
304 iowrite32((u32)(tsf_offset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4);
305 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
311 * Description: Set NIC TSF counter for first Beacon time
312 * Get NEXTTBTT from adjusted TSF and Beacon Interval
316 * priv - The adapter to be set.
317 * beacon_interval - Beacon Interval
321 * Return Value: true if succeed; otherwise false
323 bool card_set_beacon_period(struct vnt_private *priv,
324 unsigned short beacon_interval)
328 next_tbtt = vt6655_get_current_tsf(priv); /* Get Local TSF counter */
330 next_tbtt = card_get_next_tbtt(next_tbtt, beacon_interval);
332 /* set HW beacon interval */
333 iowrite16(beacon_interval, priv->port_offset + MAC_REG_BI);
334 priv->beacon_interval = beacon_interval;
336 next_tbtt = le64_to_cpu(next_tbtt);
337 iowrite32((u32)next_tbtt, priv->port_offset + MAC_REG_NEXTTBTT);
338 iowrite32((u32)(next_tbtt >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4);
339 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
345 * Description: Turn off Radio power
349 * priv - The adapter to be turned off
354 void card_radio_power_off(struct vnt_private *priv)
359 switch (priv->rf_type) {
361 vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
363 vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_SOFTPWRCTL,
369 vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
371 vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
376 vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
378 bb_set_deep_sleep(priv, priv->local_id);
380 priv->radio_off = true;
381 pr_debug("chester power off\n");
382 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET); /* LED issue */
385 void card_safe_reset_tx(struct vnt_private *priv)
388 struct vnt_tx_desc *curr_td;
390 /* initialize TD index */
391 priv->tail_td[0] = &priv->apTD0Rings[0];
392 priv->apCurrTD[0] = &priv->apTD0Rings[0];
394 priv->tail_td[1] = &priv->apTD1Rings[0];
395 priv->apCurrTD[1] = &priv->apTD1Rings[0];
397 for (uu = 0; uu < TYPE_MAXTD; uu++)
398 priv->iTDUsed[uu] = 0;
400 for (uu = 0; uu < priv->opts.tx_descs[0]; uu++) {
401 curr_td = &priv->apTD0Rings[uu];
402 curr_td->td0.owner = OWNED_BY_HOST;
403 /* init all Tx Packet pointer to NULL */
405 for (uu = 0; uu < priv->opts.tx_descs[1]; uu++) {
406 curr_td = &priv->apTD1Rings[uu];
407 curr_td->td0.owner = OWNED_BY_HOST;
408 /* init all Tx Packet pointer to NULL */
411 /* set MAC TD pointer */
412 vt6655_mac_set_curr_tx_desc_addr(TYPE_TXDMA0, priv, priv->td0_pool_dma);
414 vt6655_mac_set_curr_tx_desc_addr(TYPE_AC0DMA, priv, priv->td1_pool_dma);
416 /* set MAC Beacon TX pointer */
417 iowrite32((u32)priv->tx_beacon_dma, priv->port_offset + MAC_REG_BCNDMAPTR);
426 * priv - Pointer to the adapter
432 void CARDvSafeResetRx(struct vnt_private *priv)
435 struct vnt_rx_desc *pDesc;
437 /* initialize RD index */
438 priv->pCurrRD[0] = &priv->aRD0Ring[0];
439 priv->pCurrRD[1] = &priv->aRD1Ring[0];
441 /* init state, all RD is chip's */
442 for (uu = 0; uu < priv->opts.rx_descs0; uu++) {
443 pDesc = &priv->aRD0Ring[uu];
444 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
445 pDesc->rd0.owner = OWNED_BY_NIC;
446 pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
449 /* init state, all RD is chip's */
450 for (uu = 0; uu < priv->opts.rx_descs1; uu++) {
451 pDesc = &priv->aRD1Ring[uu];
452 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
453 pDesc->rd0.owner = OWNED_BY_NIC;
454 pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
457 /* set perPkt mode */
458 iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL0);
459 iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL1);
460 /* set MAC RD pointer */
461 vt6655_mac_set_curr_rx_0_desc_addr(priv, priv->rd0_pool_dma);
463 vt6655_mac_set_curr_rx_1_desc_addr(priv, priv->rd1_pool_dma);
467 * Description: Get response Control frame rate in CCK mode
471 * priv - The adapter to be set
472 * wRateIdx - Receiving data rate
476 * Return Value: response Control frame rate
478 static unsigned short CARDwGetCCKControlRate(struct vnt_private *priv,
479 unsigned short wRateIdx)
481 unsigned int ui = (unsigned int)wRateIdx;
483 while (ui > RATE_1M) {
484 if (priv->basic_rates & ((u32)0x1 << ui))
485 return (unsigned short)ui;
489 return (unsigned short)RATE_1M;
493 * Description: Get response Control frame rate in OFDM mode
497 * priv - The adapter to be set
498 * wRateIdx - Receiving data rate
502 * Return Value: response Control frame rate
504 static unsigned short CARDwGetOFDMControlRate(struct vnt_private *priv,
505 unsigned short wRateIdx)
507 unsigned int ui = (unsigned int)wRateIdx;
509 pr_debug("BASIC RATE: %X\n", priv->basic_rates);
511 if (!CARDbIsOFDMinBasicRate((void *)priv)) {
512 pr_debug("%s:(NO OFDM) %d\n", __func__, wRateIdx);
513 if (wRateIdx > RATE_24M)
517 while (ui > RATE_11M) {
518 if (priv->basic_rates & ((u32)0x1 << ui)) {
519 pr_debug("%s : %d\n", __func__, ui);
520 return (unsigned short)ui;
524 pr_debug("%s: 6M\n", __func__);
525 return (unsigned short)RATE_24M;
529 * Description: Set RSPINF
533 * priv - The adapter to be set
537 * Return Value: None.
539 void card_set_rspinf(struct vnt_private *priv, u8 bb_type)
541 union vnt_phy_field_swap phy;
542 unsigned char byTxRate, byRsvTime; /* For OFDM */
545 spin_lock_irqsave(&priv->lock, flags);
548 VT6655_MAC_SELECT_PAGE1(priv->port_offset);
551 vnt_get_phy_field(priv, 14,
552 CARDwGetCCKControlRate(priv, RATE_1M),
553 PK_TYPE_11B, &phy.field_read);
555 /* swap over to get correct write order */
556 swap(phy.swap[0], phy.swap[1]);
558 iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_1);
561 vnt_get_phy_field(priv, 14,
562 CARDwGetCCKControlRate(priv, RATE_2M),
563 PK_TYPE_11B, &phy.field_read);
565 swap(phy.swap[0], phy.swap[1]);
567 iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_2);
570 vnt_get_phy_field(priv, 14,
571 CARDwGetCCKControlRate(priv, RATE_5M),
572 PK_TYPE_11B, &phy.field_read);
574 swap(phy.swap[0], phy.swap[1]);
576 iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_5);
579 vnt_get_phy_field(priv, 14,
580 CARDwGetCCKControlRate(priv, RATE_11M),
581 PK_TYPE_11B, &phy.field_read);
583 swap(phy.swap[0], phy.swap[1]);
585 iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_11);
588 calculate_ofdmr_parameter(RATE_6M,
592 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_6);
594 calculate_ofdmr_parameter(RATE_9M,
598 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_9);
600 calculate_ofdmr_parameter(RATE_12M,
604 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_12);
606 calculate_ofdmr_parameter(RATE_18M,
610 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_18);
612 calculate_ofdmr_parameter(RATE_24M,
616 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_24);
618 calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv,
623 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_36);
625 calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv,
630 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_48);
632 calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv,
637 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_54);
639 calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv,
644 iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_72);
646 VT6655_MAC_SELECT_PAGE0(priv->port_offset);
648 spin_unlock_irqrestore(&priv->lock, flags);
651 void CARDvUpdateBasicTopRate(struct vnt_private *priv)
653 unsigned char byTopOFDM = RATE_24M, byTopCCK = RATE_1M;
656 /* Determines the highest basic rate. */
657 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
658 if ((priv->basic_rates) & ((u32)(1 << ii))) {
663 priv->byTopOFDMBasicRate = byTopOFDM;
665 for (ii = RATE_11M;; ii--) {
666 if ((priv->basic_rates) & ((u32)(1 << ii))) {
673 priv->byTopCCKBasicRate = byTopCCK;
676 bool CARDbIsOFDMinBasicRate(struct vnt_private *priv)
680 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
681 if ((priv->basic_rates) & ((u32)BIT(ii)))
687 unsigned char card_get_pkt_type(struct vnt_private *priv)
689 if (priv->byBBType == BB_TYPE_11A || priv->byBBType == BB_TYPE_11B)
690 return (unsigned char)priv->byBBType;
691 else if (CARDbIsOFDMinBasicRate((void *)priv))
698 * Description: Calculate TSF offset of two TSF input
699 * Get TSF Offset from RxBCN's TSF and local TSF
703 * priv - The adapter to be sync.
704 * qwTSF1 - Rx BCN's TSF
709 * Return Value: TSF Offset value
711 u64 card_get_tsf_offset(unsigned char rx_rate, u64 qwTSF1, u64 qwTSF2)
713 unsigned short wRxBcnTSFOffst;
715 wRxBcnTSFOffst = rx_bcn_tsf_off[rx_rate % MAX_RATE];
717 qwTSF2 += (u64)wRxBcnTSFOffst;
719 return qwTSF1 - qwTSF2;
723 * Description: Read NIC TSF counter
724 * Get local TSF counter
728 * priv - The adapter to be read
732 * Return Value: Current TSF counter
734 u64 vt6655_get_current_tsf(struct vnt_private *priv)
736 void __iomem *iobase = priv->port_offset;
741 vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
742 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
743 data = ioread8(iobase + MAC_REG_TFTCTL);
744 if (!(data & TFTCTL_TSFCNTRRD))
747 if (ww == W_MAX_TIMEOUT)
749 low = ioread32(iobase + MAC_REG_TSFCNTR);
750 high = ioread32(iobase + MAC_REG_TSFCNTR + 4);
751 return le64_to_cpu(low + ((u64)high << 32));
755 * Description: Read NIC TSF counter
756 * Get NEXTTBTT from adjusted TSF and Beacon Interval
760 * qwTSF - Current TSF counter
761 * wbeaconInterval - Beacon Interval
763 * qwCurrTSF - Current TSF counter
765 * Return Value: TSF value of next Beacon
767 u64 card_get_next_tbtt(u64 qwTSF, unsigned short beacon_interval)
771 beacon_int = beacon_interval * 1024;
773 do_div(qwTSF, beacon_int);
782 * Description: Set NIC TSF counter for first Beacon time
783 * Get NEXTTBTT from adjusted TSF and Beacon Interval
788 * beacon_interval - Beacon Interval
794 void CARDvSetFirstNextTBTT(struct vnt_private *priv,
795 unsigned short beacon_interval)
797 void __iomem *iobase = priv->port_offset;
800 next_tbtt = vt6655_get_current_tsf(priv); /* Get Local TSF counter */
802 next_tbtt = card_get_next_tbtt(next_tbtt, beacon_interval);
804 next_tbtt = le64_to_cpu(next_tbtt);
805 iowrite32((u32)next_tbtt, iobase + MAC_REG_NEXTTBTT);
806 iowrite32((u32)(next_tbtt >> 32), iobase + MAC_REG_NEXTTBTT + 4);
807 vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
811 * Description: Sync NIC TSF counter for Beacon time
812 * Get NEXTTBTT and write to HW
816 * priv - The adapter to be set
817 * qwTSF - Current TSF counter
818 * beacon_interval - Beacon Interval
824 void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF,
825 unsigned short beacon_interval)
827 void __iomem *iobase = priv->port_offset;
829 qwTSF = card_get_next_tbtt(qwTSF, beacon_interval);
831 qwTSF = le64_to_cpu(qwTSF);
832 iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT);
833 iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4);
834 vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
835 pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);