drivers/staging/rts5208/sd.c

   1 /* Driver for Realtek PCI-Express card reader
   2  *
   3  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   Wei WANG (wei_wang@realsil.com.cn)
  20  *   Micky Ching (micky_ching@realsil.com.cn)
  21  */
  22
  23 #include <linux/blkdev.h>
  24 #include <linux/kthread.h>
  25 #include <linux/sched.h>
  26
  27 #include "rtsx.h"
  28 #include "sd.h"
  29
  30 #define SD_MAX_RETRY_COUNT      3
  31
  32 static u16 REG_SD_CFG1;
  33 static u16 REG_SD_CFG2;
  34 static u16 REG_SD_CFG3;
  35 static u16 REG_SD_STAT1;
  36 static u16 REG_SD_STAT2;
  37 static u16 REG_SD_BUS_STAT;
  38 static u16 REG_SD_PAD_CTL;
  39 static u16 REG_SD_SAMPLE_POINT_CTL;
  40 static u16 REG_SD_PUSH_POINT_CTL;
  41 static u16 REG_SD_CMD0;
  42 static u16 REG_SD_CMD1;
  43 static u16 REG_SD_CMD2;
  44 static u16 REG_SD_CMD3;
  45 static u16 REG_SD_CMD4;
  46 static u16 REG_SD_CMD5;
  47 static u16 REG_SD_BYTE_CNT_L;
  48 static u16 REG_SD_BYTE_CNT_H;
  49 static u16 REG_SD_BLOCK_CNT_L;
  50 static u16 REG_SD_BLOCK_CNT_H;
  51 static u16 REG_SD_TRANSFER;
  52 static u16 REG_SD_VPCLK0_CTL;
  53 static u16 REG_SD_VPCLK1_CTL;
  54 static u16 REG_SD_DCMPS0_CTL;
  55 static u16 REG_SD_DCMPS1_CTL;
  56
  57 static inline void sd_set_err_code(struct rtsx_chip *chip, u8 err_code)
  58 {
  59         struct sd_info *sd_card = &chip->sd_card;
  60
  61         sd_card->err_code |= err_code;
  62 }
  63
  64 static inline void sd_clr_err_code(struct rtsx_chip *chip)
  65 {
  66         struct sd_info *sd_card = &chip->sd_card;
  67
  68         sd_card->err_code = 0;
  69 }
  70
  71 static inline int sd_check_err_code(struct rtsx_chip *chip, u8 err_code)
  72 {
  73         struct sd_info *sd_card = &chip->sd_card;
  74
  75         return sd_card->err_code & err_code;
  76 }
  77
  78 static void sd_init_reg_addr(struct rtsx_chip *chip)
  79 {
  80         REG_SD_CFG1 = 0xFD31;
  81         REG_SD_CFG2 = 0xFD33;
  82         REG_SD_CFG3 = 0xFD3E;
  83         REG_SD_STAT1 = 0xFD30;
  84         REG_SD_STAT2 = 0;
  85         REG_SD_BUS_STAT = 0;
  86         REG_SD_PAD_CTL = 0;
  87         REG_SD_SAMPLE_POINT_CTL = 0;
  88         REG_SD_PUSH_POINT_CTL = 0;
  89         REG_SD_CMD0 = 0xFD34;
  90         REG_SD_CMD1 = 0xFD35;
  91         REG_SD_CMD2 = 0xFD36;
  92         REG_SD_CMD3 = 0xFD37;
  93         REG_SD_CMD4 = 0xFD38;
  94         REG_SD_CMD5 = 0xFD5A;
  95         REG_SD_BYTE_CNT_L = 0xFD39;
  96         REG_SD_BYTE_CNT_H = 0xFD3A;
  97         REG_SD_BLOCK_CNT_L = 0xFD3B;
  98         REG_SD_BLOCK_CNT_H = 0xFD3C;
  99         REG_SD_TRANSFER = 0xFD32;
 100         REG_SD_VPCLK0_CTL = 0;
 101         REG_SD_VPCLK1_CTL = 0;
 102         REG_SD_DCMPS0_CTL = 0;
 103         REG_SD_DCMPS1_CTL = 0;
 104 }
 105
 106 static int sd_check_data0_status(struct rtsx_chip *chip)
 107 {
 108         int retval;
 109         u8 stat;
 110
 111         retval = rtsx_read_register(chip, REG_SD_STAT1, &stat);
 112         if (retval) {
 113                 rtsx_trace(chip);
 114                 return retval;
 115         }
 116
 117         if (!(stat & SD_DAT0_STATUS)) {
 118                 sd_set_err_code(chip, SD_BUSY);
 119                 rtsx_trace(chip);
 120                 return STATUS_FAIL;
 121         }
 122
 123         return STATUS_SUCCESS;
 124 }
 125
 126 static int sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
 127                                u32 arg, u8 rsp_type, u8 *rsp, int rsp_len)
 128 {
 129         struct sd_info *sd_card = &chip->sd_card;
 130         int retval;
 131         int timeout = 100;
 132         u16 reg_addr;
 133         u8 *ptr;
 134         int stat_idx = 0;
 135         int rty_cnt = 0;
 136
 137         sd_clr_err_code(chip);
 138
 139         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d, arg = 0x%08x\n", cmd_idx, arg);
 140
 141         if (rsp_type == SD_RSP_TYPE_R1b)
 142                 timeout = 3000;
 143
 144 RTY_SEND_CMD:
 145
 146         rtsx_init_cmd(chip);
 147
 148         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
 149         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
 150         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
 151         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
 152         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
 153
 154         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
 155         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
 156                      0x01, PINGPONG_BUFFER);
 157         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
 158                      0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
 159         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
 160                      SD_TRANSFER_END | SD_STAT_IDLE, SD_TRANSFER_END |
 161                      SD_STAT_IDLE);
 162
 163         if (rsp_type == SD_RSP_TYPE_R2) {
 164                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
 165                      reg_addr++)
 166                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
 167
 168                 stat_idx = 16;
 169         } else if (rsp_type != SD_RSP_TYPE_R0) {
 170                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
 171                      reg_addr++)
 172                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
 173
 174                 stat_idx = 5;
 175         }
 176
 177         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
 178
 179         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 180         if (retval < 0) {
 181                 u8 val;
 182
 183                 rtsx_read_register(chip, REG_SD_STAT1, &val);
 184                 dev_dbg(rtsx_dev(chip), "SD_STAT1: 0x%x\n", val);
 185
 186                 rtsx_read_register(chip, REG_SD_CFG3, &val);
 187                 dev_dbg(rtsx_dev(chip), "SD_CFG3: 0x%x\n", val);
 188
 189                 if (retval == -ETIMEDOUT) {
 190                         if (rsp_type & SD_WAIT_BUSY_END) {
 191                                 retval = sd_check_data0_status(chip);
 192                                 if (retval != STATUS_SUCCESS) {
 193                                         rtsx_clear_sd_error(chip);
 194                                         rtsx_trace(chip);
 195                                         return retval;
 196                                 }
 197                         } else {
 198                                 sd_set_err_code(chip, SD_TO_ERR);
 199                         }
 200                         retval = STATUS_TIMEDOUT;
 201                 } else {
 202                         retval = STATUS_FAIL;
 203                 }
 204                 rtsx_clear_sd_error(chip);
 205
 206                 rtsx_trace(chip);
 207                 return retval;
 208         }
 209
 210         if (rsp_type == SD_RSP_TYPE_R0)
 211                 return STATUS_SUCCESS;
 212
 213         ptr = rtsx_get_cmd_data(chip) + 1;
 214
 215         if ((ptr[0] & 0xC0) != 0) {
 216                 sd_set_err_code(chip, SD_STS_ERR);
 217                 rtsx_trace(chip);
 218                 return STATUS_FAIL;
 219         }
 220
 221         if (!(rsp_type & SD_NO_CHECK_CRC7)) {
 222                 if (ptr[stat_idx] & SD_CRC7_ERR) {
 223                         if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
 224                                 sd_set_err_code(chip, SD_CRC_ERR);
 225                                 rtsx_trace(chip);
 226                                 return STATUS_FAIL;
 227                         }
 228                         if (rty_cnt < SD_MAX_RETRY_COUNT) {
 229                                 wait_timeout(20);
 230                                 rty_cnt++;
 231                                 goto RTY_SEND_CMD;
 232                         } else {
 233                                 sd_set_err_code(chip, SD_CRC_ERR);
 234                                 rtsx_trace(chip);
 235                                 return STATUS_FAIL;
 236                         }
 237                 }
 238         }
 239
 240         if ((rsp_type == SD_RSP_TYPE_R1) || (rsp_type == SD_RSP_TYPE_R1b)) {
 241                 if ((cmd_idx != SEND_RELATIVE_ADDR) &&
 242                     (cmd_idx != SEND_IF_COND)) {
 243                         if (cmd_idx != STOP_TRANSMISSION) {
 244                                 if (ptr[1] & 0x80) {
 245                                         rtsx_trace(chip);
 246                                         return STATUS_FAIL;
 247                                 }
 248                         }
 249 #ifdef SUPPORT_SD_LOCK
 250                         if (ptr[1] & 0x7D) {
 251 #else
 252                         if (ptr[1] & 0x7F) {
 253 #endif
 254                                 dev_dbg(rtsx_dev(chip), "ptr[1]: 0x%02x\n",
 255                                         ptr[1]);
 256                                 rtsx_trace(chip);
 257                                 return STATUS_FAIL;
 258                         }
 259                         if (ptr[2] & 0xFF) {
 260                                 dev_dbg(rtsx_dev(chip), "ptr[2]: 0x%02x\n",
 261                                         ptr[2]);
 262                                 rtsx_trace(chip);
 263                                 return STATUS_FAIL;
 264                         }
 265                         if (ptr[3] & 0x80) {
 266                                 dev_dbg(rtsx_dev(chip), "ptr[3]: 0x%02x\n",
 267                                         ptr[3]);
 268                                 rtsx_trace(chip);
 269                                 return STATUS_FAIL;
 270                         }
 271                         if (ptr[3] & 0x01)
 272                                 sd_card->sd_data_buf_ready = 1;
 273                         else
 274                                 sd_card->sd_data_buf_ready = 0;
 275                 }
 276         }
 277
 278         if (rsp && rsp_len)
 279                 memcpy(rsp, ptr, rsp_len);
 280
 281         return STATUS_SUCCESS;
 282 }
 283
 284 static int sd_read_data(struct rtsx_chip *chip,
 285                         u8 trans_mode, u8 *cmd, int cmd_len, u16 byte_cnt,
 286                         u16 blk_cnt, u8 bus_width, u8 *buf, int buf_len,
 287                         int timeout)
 288 {
 289         struct sd_info *sd_card = &chip->sd_card;
 290         int retval;
 291         int i;
 292
 293         sd_clr_err_code(chip);
 294
 295         if (!buf)
 296                 buf_len = 0;
 297
 298         if (buf_len > 512) {
 299                 rtsx_trace(chip);
 300                 return STATUS_FAIL;
 301         }
 302
 303         rtsx_init_cmd(chip);
 304
 305         if (cmd_len) {
 306                 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
 307                 for (i = 0; i < (min(cmd_len, 6)); i++)
 308                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i,
 309                                      0xFF, cmd[i]);
 310         }
 311         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
 312                      (u8)byte_cnt);
 313         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
 314                      (u8)(byte_cnt >> 8));
 315         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
 316                      (u8)blk_cnt);
 317         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
 318                      (u8)(blk_cnt >> 8));
 319
 320         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
 321
 322         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
 323                      SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
 324                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
 325         if (trans_mode != SD_TM_AUTO_TUNING)
 326                 rtsx_add_cmd(chip, WRITE_REG_CMD,
 327                              CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
 328
 329         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
 330                      trans_mode | SD_TRANSFER_START);
 331         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
 332                      SD_TRANSFER_END);
 333
 334         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 335         if (retval < 0) {
 336                 if (retval == -ETIMEDOUT) {
 337                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 338                                             SD_RSP_TYPE_R1, NULL, 0);
 339                 }
 340
 341                 rtsx_trace(chip);
 342                 return STATUS_FAIL;
 343         }
 344
 345         if (buf && buf_len) {
 346                 retval = rtsx_read_ppbuf(chip, buf, buf_len);
 347                 if (retval != STATUS_SUCCESS) {
 348                         rtsx_trace(chip);
 349                         return STATUS_FAIL;
 350                 }
 351         }
 352
 353         return STATUS_SUCCESS;
 354 }
 355
 356 static int sd_write_data(struct rtsx_chip *chip, u8 trans_mode,
 357                          u8 *cmd, int cmd_len, u16 byte_cnt, u16 blk_cnt,
 358                          u8 bus_width, u8 *buf, int buf_len, int timeout)
 359 {
 360         struct sd_info *sd_card = &chip->sd_card;
 361         int retval;
 362         int i;
 363
 364         sd_clr_err_code(chip);
 365
 366         if (!buf)
 367                 buf_len = 0;
 368
 369         if (buf_len > 512) {
 370                 /* This function can't write data more than one page */
 371                 rtsx_trace(chip);
 372                 return STATUS_FAIL;
 373         }
 374
 375         if (buf && buf_len) {
 376                 retval = rtsx_write_ppbuf(chip, buf, buf_len);
 377                 if (retval != STATUS_SUCCESS) {
 378                         rtsx_trace(chip);
 379                         return STATUS_FAIL;
 380                 }
 381         }
 382
 383         rtsx_init_cmd(chip);
 384
 385         if (cmd_len) {
 386                 dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
 387                 for (i = 0; i < (min(cmd_len, 6)); i++) {
 388                         rtsx_add_cmd(chip, WRITE_REG_CMD,
 389                                      REG_SD_CMD0 + i, 0xFF, cmd[i]);
 390                 }
 391         }
 392         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
 393                      (u8)byte_cnt);
 394         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
 395                      (u8)(byte_cnt >> 8));
 396         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
 397                      (u8)blk_cnt);
 398         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
 399                      (u8)(blk_cnt >> 8));
 400
 401         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
 402
 403         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
 404                      SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
 405                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
 406
 407         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
 408                      trans_mode | SD_TRANSFER_START);
 409         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
 410                      SD_TRANSFER_END);
 411
 412         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
 413         if (retval < 0) {
 414                 if (retval == -ETIMEDOUT) {
 415                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 416                                             SD_RSP_TYPE_R1, NULL, 0);
 417                 }
 418
 419                 rtsx_trace(chip);
 420                 return STATUS_FAIL;
 421         }
 422
 423         return STATUS_SUCCESS;
 424 }
 425
 426 static int sd_check_csd(struct rtsx_chip *chip, char check_wp)
 427 {
 428         struct sd_info *sd_card = &chip->sd_card;
 429         int retval;
 430         int i;
 431         u8 csd_ver, trans_speed;
 432         u8 rsp[16];
 433
 434         for (i = 0; i < 6; i++) {
 435                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
 436                         sd_set_err_code(chip, SD_NO_CARD);
 437                         rtsx_trace(chip);
 438                         return STATUS_FAIL;
 439                 }
 440
 441                 retval = sd_send_cmd_get_rsp(chip, SEND_CSD, sd_card->sd_addr,
 442                                              SD_RSP_TYPE_R2, rsp, 16);
 443                 if (retval == STATUS_SUCCESS)
 444                         break;
 445         }
 446
 447         if (i == 6) {
 448                 rtsx_trace(chip);
 449                 return STATUS_FAIL;
 450         }
 451
 452         memcpy(sd_card->raw_csd, rsp + 1, 15);
 453
 454         dev_dbg(rtsx_dev(chip), "CSD Response:\n");
 455         dev_dbg(rtsx_dev(chip), "%*ph\n", 16, sd_card->raw_csd);
 456
 457         csd_ver = (rsp[1] & 0xc0) >> 6;
 458         dev_dbg(rtsx_dev(chip), "csd_ver = %d\n", csd_ver);
 459
 460         trans_speed = rsp[4];
 461         if ((trans_speed & 0x07) == 0x02) {
 462                 if ((trans_speed & 0xf8) >= 0x30) {
 463                         if (chip->asic_code)
 464                                 sd_card->sd_clock = 47;
 465                         else
 466                                 sd_card->sd_clock = CLK_50;
 467
 468                 } else if ((trans_speed & 0xf8) == 0x28) {
 469                         if (chip->asic_code)
 470                                 sd_card->sd_clock = 39;
 471                         else
 472                                 sd_card->sd_clock = CLK_40;
 473
 474                 } else if ((trans_speed & 0xf8) == 0x20) {
 475                         if (chip->asic_code)
 476                                 sd_card->sd_clock = 29;
 477                         else
 478                                 sd_card->sd_clock = CLK_30;
 479
 480                 } else if ((trans_speed & 0xf8) >= 0x10) {
 481                         if (chip->asic_code)
 482                                 sd_card->sd_clock = 23;
 483                         else
 484                                 sd_card->sd_clock = CLK_20;
 485
 486                 } else if ((trans_speed & 0x08) >= 0x08) {
 487                         if (chip->asic_code)
 488                                 sd_card->sd_clock = 19;
 489                         else
 490                                 sd_card->sd_clock = CLK_20;
 491                 } else {
 492                         rtsx_trace(chip);
 493                         return STATUS_FAIL;
 494                 }
 495         } else {
 496                 rtsx_trace(chip);
 497                 return STATUS_FAIL;
 498         }
 499
 500         if (CHK_MMC_SECTOR_MODE(sd_card)) {
 501                 sd_card->capacity = 0;
 502         } else {
 503                 if ((!CHK_SD_HCXC(sd_card)) || (csd_ver == 0)) {
 504                         u8 blk_size, c_size_mult;
 505                         u16 c_size;
 506
 507                         blk_size = rsp[6] & 0x0F;
 508                         c_size =  ((u16)(rsp[7] & 0x03) << 10)
 509                                         + ((u16)rsp[8] << 2)
 510                                         + ((u16)(rsp[9] & 0xC0) >> 6);
 511                         c_size_mult = (u8)((rsp[10] & 0x03) << 1);
 512                         c_size_mult += (rsp[11] & 0x80) >> 7;
 513                         sd_card->capacity = (((u32)(c_size + 1)) *
 514                                         (1 << (c_size_mult + 2)))
 515                                 << (blk_size - 9);
 516                 } else {
 517                         u32 total_sector = 0;
 518
 519                         total_sector = (((u32)rsp[8] & 0x3f) << 16) |
 520                                 ((u32)rsp[9] << 8) | (u32)rsp[10];
 521                         sd_card->capacity = (total_sector + 1) << 10;
 522                 }
 523         }
 524
 525         if (check_wp) {
 526                 if (rsp[15] & 0x30)
 527                         chip->card_wp |= SD_CARD;
 528
 529                 dev_dbg(rtsx_dev(chip), "CSD WP Status: 0x%x\n", rsp[15]);
 530         }
 531
 532         return STATUS_SUCCESS;
 533 }
 534
 535 static int sd_set_sample_push_timing(struct rtsx_chip *chip)
 536 {
 537         int retval;
 538         struct sd_info *sd_card = &chip->sd_card;
 539         u8 val = 0;
 540
 541         if ((chip->sd_ctl & SD_PUSH_POINT_CTL_MASK) == SD_PUSH_POINT_DELAY)
 542                 val |= 0x10;
 543
 544         if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) == SD_SAMPLE_POINT_AUTO) {
 545                 if (chip->asic_code) {
 546                         if (CHK_SD_HS(sd_card) || CHK_MMC_52M(sd_card)) {
 547                                 if (val & 0x10)
 548                                         val |= 0x04;
 549                                 else
 550                                         val |= 0x08;
 551                         }
 552                 } else {
 553                         if (val & 0x10)
 554                                 val |= 0x04;
 555                         else
 556                                 val |= 0x08;
 557                 }
 558         } else if ((chip->sd_ctl & SD_SAMPLE_POINT_CTL_MASK) ==
 559                 SD_SAMPLE_POINT_DELAY) {
 560                 if (val & 0x10)
 561                         val |= 0x04;
 562                 else
 563                         val |= 0x08;
 564         }
 565
 566         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x1C, val);
 567         if (retval) {
 568                 rtsx_trace(chip);
 569                 return retval;
 570         }
 571
 572         return STATUS_SUCCESS;
 573 }
 574
 575 static void sd_choose_proper_clock(struct rtsx_chip *chip)
 576 {
 577         struct sd_info *sd_card = &chip->sd_card;
 578
 579         if (CHK_SD_SDR104(sd_card)) {
 580                 if (chip->asic_code)
 581                         sd_card->sd_clock = chip->asic_sd_sdr104_clk;
 582                 else
 583                         sd_card->sd_clock = chip->fpga_sd_sdr104_clk;
 584
 585         } else if (CHK_SD_DDR50(sd_card)) {
 586                 if (chip->asic_code)
 587                         sd_card->sd_clock = chip->asic_sd_ddr50_clk;
 588                 else
 589                         sd_card->sd_clock = chip->fpga_sd_ddr50_clk;
 590
 591         } else if (CHK_SD_SDR50(sd_card)) {
 592                 if (chip->asic_code)
 593                         sd_card->sd_clock = chip->asic_sd_sdr50_clk;
 594                 else
 595                         sd_card->sd_clock = chip->fpga_sd_sdr50_clk;
 596
 597         } else if (CHK_SD_HS(sd_card)) {
 598                 if (chip->asic_code)
 599                         sd_card->sd_clock = chip->asic_sd_hs_clk;
 600                 else
 601                         sd_card->sd_clock = chip->fpga_sd_hs_clk;
 602
 603         } else if (CHK_MMC_52M(sd_card) || CHK_MMC_DDR52(sd_card)) {
 604                 if (chip->asic_code)
 605                         sd_card->sd_clock = chip->asic_mmc_52m_clk;
 606                 else
 607                         sd_card->sd_clock = chip->fpga_mmc_52m_clk;
 608
 609         } else if (CHK_MMC_26M(sd_card)) {
 610                 if (chip->asic_code)
 611                         sd_card->sd_clock = 48;
 612                 else
 613                         sd_card->sd_clock = CLK_50;
 614         }
 615 }
 616
 617 static int sd_set_clock_divider(struct rtsx_chip *chip, u8 clk_div)
 618 {
 619         int retval;
 620         u8 mask = 0, val = 0;
 621
 622         mask = 0x60;
 623         if (clk_div == SD_CLK_DIVIDE_0)
 624                 val = 0x00;
 625         else if (clk_div == SD_CLK_DIVIDE_128)
 626                 val = 0x40;
 627         else if (clk_div == SD_CLK_DIVIDE_256)
 628                 val = 0x20;
 629
 630         retval = rtsx_write_register(chip, REG_SD_CFG1, mask, val);
 631         if (retval) {
 632                 rtsx_trace(chip);
 633                 return retval;
 634         }
 635
 636         return STATUS_SUCCESS;
 637 }
 638
 639 static int sd_set_init_para(struct rtsx_chip *chip)
 640 {
 641         struct sd_info *sd_card = &chip->sd_card;
 642         int retval;
 643
 644         retval = sd_set_sample_push_timing(chip);
 645         if (retval != STATUS_SUCCESS) {
 646                 rtsx_trace(chip);
 647                 return STATUS_FAIL;
 648         }
 649
 650         sd_choose_proper_clock(chip);
 651
 652         retval = switch_clock(chip, sd_card->sd_clock);
 653         if (retval != STATUS_SUCCESS) {
 654                 rtsx_trace(chip);
 655                 return STATUS_FAIL;
 656         }
 657
 658         return STATUS_SUCCESS;
 659 }
 660
 661 int sd_select_card(struct rtsx_chip *chip, int select)
 662 {
 663         struct sd_info *sd_card = &chip->sd_card;
 664         int retval;
 665         u8 cmd_idx, cmd_type;
 666         u32 addr;
 667
 668         if (select) {
 669                 cmd_idx = SELECT_CARD;
 670                 cmd_type = SD_RSP_TYPE_R1;
 671                 addr = sd_card->sd_addr;
 672         } else {
 673                 cmd_idx = DESELECT_CARD;
 674                 cmd_type = SD_RSP_TYPE_R0;
 675                 addr = 0;
 676         }
 677
 678         retval = sd_send_cmd_get_rsp(chip, cmd_idx, addr, cmd_type, NULL, 0);
 679         if (retval != STATUS_SUCCESS) {
 680                 rtsx_trace(chip);
 681                 return STATUS_FAIL;
 682         }
 683
 684         return STATUS_SUCCESS;
 685 }
 686
 687 #ifdef SUPPORT_SD_LOCK
 688 static int sd_update_lock_status(struct rtsx_chip *chip)
 689 {
 690         struct sd_info *sd_card = &chip->sd_card;
 691         int retval;
 692         u8 rsp[5];
 693
 694         retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
 695                                      SD_RSP_TYPE_R1, rsp, 5);
 696         if (retval != STATUS_SUCCESS) {
 697                 rtsx_trace(chip);
 698                 return STATUS_FAIL;
 699         }
 700
 701         if (rsp[1] & 0x02)
 702                 sd_card->sd_lock_status |= SD_LOCKED;
 703         else
 704                 sd_card->sd_lock_status &= ~SD_LOCKED;
 705
 706         dev_dbg(rtsx_dev(chip), "sd_card->sd_lock_status = 0x%x\n",
 707                 sd_card->sd_lock_status);
 708
 709         if (rsp[1] & 0x01) {
 710                 rtsx_trace(chip);
 711                 return STATUS_FAIL;
 712         }
 713
 714         return STATUS_SUCCESS;
 715 }
 716 #endif
 717
 718 static int sd_wait_state_data_ready(struct rtsx_chip *chip, u8 state,
 719                                     u8 data_ready, int polling_cnt)
 720 {
 721         struct sd_info *sd_card = &chip->sd_card;
 722         int retval, i;
 723         u8 rsp[5];
 724
 725         for (i = 0; i < polling_cnt; i++) {
 726                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
 727                                              sd_card->sd_addr, SD_RSP_TYPE_R1,
 728                                              rsp, 5);
 729                 if (retval != STATUS_SUCCESS) {
 730                         rtsx_trace(chip);
 731                         return STATUS_FAIL;
 732                 }
 733
 734                 if (((rsp[3] & 0x1E) == state) &&
 735                     ((rsp[3] & 0x01) == data_ready))
 736                         return STATUS_SUCCESS;
 737         }
 738
 739         rtsx_trace(chip);
 740         return STATUS_FAIL;
 741 }
 742
 743 static int sd_change_bank_voltage(struct rtsx_chip *chip, u8 voltage)
 744 {
 745         int retval;
 746
 747         if (voltage == SD_IO_3V3) {
 748                 if (chip->asic_code) {
 749                         retval = rtsx_write_phy_register(chip, 0x08,
 750                                                          0x4FC0 |
 751                                                          chip->phy_voltage);
 752                         if (retval != STATUS_SUCCESS) {
 753                                 rtsx_trace(chip);
 754                                 return STATUS_FAIL;
 755                         }
 756                 } else {
 757                         retval = rtsx_write_register(chip, SD_PAD_CTL,
 758                                                      SD_IO_USING_1V8, 0);
 759                         if (retval) {
 760                                 rtsx_trace(chip);
 761                                 return retval;
 762                         }
 763                 }
 764         } else if (voltage == SD_IO_1V8) {
 765                 if (chip->asic_code) {
 766                         retval = rtsx_write_phy_register(chip, 0x08,
 767                                                          0x4C40 |
 768                                                          chip->phy_voltage);
 769                         if (retval != STATUS_SUCCESS) {
 770                                 rtsx_trace(chip);
 771                                 return STATUS_FAIL;
 772                         }
 773                 } else {
 774                         retval = rtsx_write_register(chip, SD_PAD_CTL,
 775                                                      SD_IO_USING_1V8,
 776                                                      SD_IO_USING_1V8);
 777                         if (retval) {
 778                                 rtsx_trace(chip);
 779                                 return retval;
 780                         }
 781                 }
 782         } else {
 783                 rtsx_trace(chip);
 784                 return STATUS_FAIL;
 785         }
 786
 787         return STATUS_SUCCESS;
 788 }
 789
 790 static int sd_voltage_switch(struct rtsx_chip *chip)
 791 {
 792         int retval;
 793         u8 stat;
 794
 795         retval = rtsx_write_register(chip, SD_BUS_STAT,
 796                                      SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
 797                                      SD_CLK_TOGGLE_EN);
 798         if (retval) {
 799                 rtsx_trace(chip);
 800                 return retval;
 801         }
 802
 803         retval = sd_send_cmd_get_rsp(chip, VOLTAGE_SWITCH, 0, SD_RSP_TYPE_R1,
 804                                      NULL, 0);
 805         if (retval != STATUS_SUCCESS) {
 806                 rtsx_trace(chip);
 807                 return STATUS_FAIL;
 808         }
 809
 810         udelay(chip->sd_voltage_switch_delay);
 811
 812         retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
 813         if (retval) {
 814                 rtsx_trace(chip);
 815                 return retval;
 816         }
 817         if (stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 818                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
 819                 rtsx_trace(chip);
 820                 return STATUS_FAIL;
 821         }
 822
 823         retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
 824                                      SD_CLK_FORCE_STOP);
 825         if (retval) {
 826                 rtsx_trace(chip);
 827                 return retval;
 828         }
 829         retval = sd_change_bank_voltage(chip, SD_IO_1V8);
 830         if (retval != STATUS_SUCCESS) {
 831                 rtsx_trace(chip);
 832                 return STATUS_FAIL;
 833         }
 834
 835         wait_timeout(50);
 836
 837         retval = rtsx_write_register(chip, SD_BUS_STAT, 0xFF,
 838                                      SD_CLK_TOGGLE_EN);
 839         if (retval) {
 840                 rtsx_trace(chip);
 841                 return retval;
 842         }
 843         wait_timeout(10);
 844
 845         retval = rtsx_read_register(chip, SD_BUS_STAT, &stat);
 846         if (retval) {
 847                 rtsx_trace(chip);
 848                 return retval;
 849         }
 850         if ((stat & (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 851                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) !=
 852                         (SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
 853                                 SD_DAT1_STATUS | SD_DAT0_STATUS)) {
 854                 dev_dbg(rtsx_dev(chip), "SD_BUS_STAT: 0x%x\n", stat);
 855                 rtsx_write_register(chip, SD_BUS_STAT, SD_CLK_TOGGLE_EN |
 856                                     SD_CLK_FORCE_STOP, 0);
 857                 rtsx_write_register(chip, CARD_CLK_EN, 0xFF, 0);
 858                 rtsx_trace(chip);
 859                 return STATUS_FAIL;
 860         }
 861
 862         retval = rtsx_write_register(chip, SD_BUS_STAT,
 863                                      SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
 864         if (retval) {
 865                 rtsx_trace(chip);
 866                 return retval;
 867         }
 868
 869         return STATUS_SUCCESS;
 870 }
 871
 872 static int sd_reset_dcm(struct rtsx_chip *chip, u8 tune_dir)
 873 {
 874         int retval;
 875
 876         if (tune_dir == TUNE_RX) {
 877                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
 878                                              DCM_RESET | DCM_RX);
 879                 if (retval) {
 880                         rtsx_trace(chip);
 881                         return retval;
 882                 }
 883                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_RX);
 884                 if (retval) {
 885                         rtsx_trace(chip);
 886                         return retval;
 887                 }
 888         } else {
 889                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF,
 890                                              DCM_RESET | DCM_TX);
 891                 if (retval) {
 892                         rtsx_trace(chip);
 893                         return retval;
 894                 }
 895                 retval = rtsx_write_register(chip, DCM_DRP_CTL, 0xFF, DCM_TX);
 896                 if (retval) {
 897                         rtsx_trace(chip);
 898                         return retval;
 899                 }
 900         }
 901
 902         return STATUS_SUCCESS;
 903 }
 904
 905 static int sd_change_phase(struct rtsx_chip *chip, u8 sample_point, u8 tune_dir)
 906 {
 907         struct sd_info *sd_card = &chip->sd_card;
 908         u16 SD_VP_CTL, SD_DCMPS_CTL;
 909         u8 val;
 910         int retval;
 911         bool ddr_rx = false;
 912
 913         dev_dbg(rtsx_dev(chip), "%s (sample_point = %d, tune_dir = %d)\n",
 914                 __func__, sample_point, tune_dir);
 915
 916         if (tune_dir == TUNE_RX) {
 917                 SD_VP_CTL = SD_VPRX_CTL;
 918                 SD_DCMPS_CTL = SD_DCMPS_RX_CTL;
 919                 if (CHK_SD_DDR50(sd_card))
 920                         ddr_rx = true;
 921         } else {
 922                 SD_VP_CTL = SD_VPTX_CTL;
 923                 SD_DCMPS_CTL = SD_DCMPS_TX_CTL;
 924         }
 925
 926         if (chip->asic_code) {
 927                 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK,
 928                                              CHANGE_CLK);
 929                 if (retval) {
 930                         rtsx_trace(chip);
 931                         return retval;
 932                 }
 933                 retval = rtsx_write_register(chip, SD_VP_CTL, 0x1F,
 934                                              sample_point);
 935                 if (retval) {
 936                         rtsx_trace(chip);
 937                         return retval;
 938                 }
 939                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 940                                              PHASE_NOT_RESET, 0);
 941                 if (retval) {
 942                         rtsx_trace(chip);
 943                         return retval;
 944                 }
 945                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 946                                              PHASE_NOT_RESET, PHASE_NOT_RESET);
 947                 if (retval) {
 948                         rtsx_trace(chip);
 949                         return retval;
 950                 }
 951                 retval = rtsx_write_register(chip, CLK_CTL, CHANGE_CLK, 0);
 952                 if (retval) {
 953                         rtsx_trace(chip);
 954                         return retval;
 955                 }
 956         } else {
 957                 rtsx_read_register(chip, SD_VP_CTL, &val);
 958                 dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
 959                 rtsx_read_register(chip, SD_DCMPS_CTL, &val);
 960                 dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
 961
 962                 if (ddr_rx) {
 963                         retval = rtsx_write_register(chip, SD_VP_CTL,
 964                                                      PHASE_CHANGE,
 965                                                      PHASE_CHANGE);
 966                         if (retval) {
 967                                 rtsx_trace(chip);
 968                                 return retval;
 969                         }
 970                         udelay(50);
 971                         retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 972                                                      PHASE_CHANGE |
 973                                                      PHASE_NOT_RESET |
 974                                                      sample_point);
 975                         if (retval) {
 976                                 rtsx_trace(chip);
 977                                 return retval;
 978                         }
 979                 } else {
 980                         retval = rtsx_write_register(chip, CLK_CTL,
 981                                                      CHANGE_CLK, CHANGE_CLK);
 982                         if (retval) {
 983                                 rtsx_trace(chip);
 984                                 return retval;
 985                         }
 986                         udelay(50);
 987                         retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
 988                                                      PHASE_NOT_RESET |
 989                                                      sample_point);
 990                         if (retval) {
 991                                 rtsx_trace(chip);
 992                                 return retval;
 993                         }
 994                 }
 995                 udelay(100);
 996
 997                 rtsx_init_cmd(chip);
 998                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE,
 999                              DCMPS_CHANGE);
1000                 rtsx_add_cmd(chip, CHECK_REG_CMD, SD_DCMPS_CTL,
1001                              DCMPS_CHANGE_DONE, DCMPS_CHANGE_DONE);
1002                 retval = rtsx_send_cmd(chip, SD_CARD, 100);
1003                 if (retval != STATUS_SUCCESS) {
1004                         rtsx_trace(chip);
1005                         goto fail;
1006                 }
1007
1008                 val = *rtsx_get_cmd_data(chip);
1009                 if (val & DCMPS_ERROR) {
1010                         rtsx_trace(chip);
1011                         goto fail;
1012                 }
1013
1014                 if ((val & DCMPS_CURRENT_PHASE) != sample_point) {
1015                         rtsx_trace(chip);
1016                         goto fail;
1017                 }
1018
1019                 retval = rtsx_write_register(chip, SD_DCMPS_CTL,
1020                                              DCMPS_CHANGE, 0);
1021                 if (retval) {
1022                         rtsx_trace(chip);
1023                         return retval;
1024                 }
1025                 if (ddr_rx) {
1026                         retval = rtsx_write_register(chip, SD_VP_CTL,
1027                                                      PHASE_CHANGE, 0);
1028                         if (retval) {
1029                                 rtsx_trace(chip);
1030                                 return retval;
1031                         }
1032                 } else {
1033                         retval = rtsx_write_register(chip, CLK_CTL,
1034                                                      CHANGE_CLK, 0);
1035                         if (retval) {
1036                                 rtsx_trace(chip);
1037                                 return retval;
1038                         }
1039                 }
1040
1041                 udelay(50);
1042         }
1043
1044         retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
1045         if (retval) {
1046                 rtsx_trace(chip);
1047                 return retval;
1048         }
1049
1050         return STATUS_SUCCESS;
1051
1052 fail:
1053         rtsx_read_register(chip, SD_VP_CTL, &val);
1054         dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
1055         rtsx_read_register(chip, SD_DCMPS_CTL, &val);
1056         dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
1057
1058         rtsx_write_register(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
1059         rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, 0);
1060         mdelay(10);
1061         sd_reset_dcm(chip, tune_dir);
1062         return STATUS_FAIL;
1063 }
1064
1065 static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width)
1066 {
1067         struct sd_info *sd_card = &chip->sd_card;
1068         int retval;
1069         u8 cmd[5], buf[8];
1070
1071         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
1072                                      SD_RSP_TYPE_R1, NULL, 0);
1073         if (retval != STATUS_SUCCESS) {
1074                 rtsx_trace(chip);
1075                 return STATUS_FAIL;
1076         }
1077
1078         cmd[0] = 0x40 | SEND_SCR;
1079         cmd[1] = 0;
1080         cmd[2] = 0;
1081         cmd[3] = 0;
1082         cmd[4] = 0;
1083
1084         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 8, 1, bus_width,
1085                               buf, 8, 250);
1086         if (retval != STATUS_SUCCESS) {
1087                 rtsx_clear_sd_error(chip);
1088                 rtsx_trace(chip);
1089                 return STATUS_FAIL;
1090         }
1091
1092         memcpy(sd_card->raw_scr, buf, 8);
1093
1094         if ((buf[0] & 0x0F) == 0) {
1095                 rtsx_trace(chip);
1096                 return STATUS_FAIL;
1097         }
1098
1099         return STATUS_SUCCESS;
1100 }
1101
1102 static int sd_query_switch_result(struct rtsx_chip *chip, u8 func_group,
1103                                   u8 func_to_switch, u8 *buf, int buf_len)
1104 {
1105         u8 support_mask = 0, query_switch = 0, switch_busy = 0;
1106         int support_offset = 0, query_switch_offset = 0, check_busy_offset = 0;
1107
1108         if (func_group == SD_FUNC_GROUP_1) {
1109                 support_offset = FUNCTION_GROUP1_SUPPORT_OFFSET;
1110                 query_switch_offset = FUNCTION_GROUP1_QUERY_SWITCH_OFFSET;
1111                 check_busy_offset = FUNCTION_GROUP1_CHECK_BUSY_OFFSET;
1112
1113                 switch (func_to_switch) {
1114                 case HS_SUPPORT:
1115                         support_mask = HS_SUPPORT_MASK;
1116                         query_switch = HS_QUERY_SWITCH_OK;
1117                         switch_busy = HS_SWITCH_BUSY;
1118                         break;
1119
1120                 case SDR50_SUPPORT:
1121                         support_mask = SDR50_SUPPORT_MASK;
1122                         query_switch = SDR50_QUERY_SWITCH_OK;
1123                         switch_busy = SDR50_SWITCH_BUSY;
1124                         break;
1125
1126                 case SDR104_SUPPORT:
1127                         support_mask = SDR104_SUPPORT_MASK;
1128                         query_switch = SDR104_QUERY_SWITCH_OK;
1129                         switch_busy = SDR104_SWITCH_BUSY;
1130                         break;
1131
1132                 case DDR50_SUPPORT:
1133                         support_mask = DDR50_SUPPORT_MASK;
1134                         query_switch = DDR50_QUERY_SWITCH_OK;
1135                         switch_busy = DDR50_SWITCH_BUSY;
1136                         break;
1137
1138                 default:
1139                         rtsx_trace(chip);
1140                         return STATUS_FAIL;
1141                 }
1142         } else if (func_group == SD_FUNC_GROUP_3) {
1143                 support_offset = FUNCTION_GROUP3_SUPPORT_OFFSET;
1144                 query_switch_offset = FUNCTION_GROUP3_QUERY_SWITCH_OFFSET;
1145                 check_busy_offset = FUNCTION_GROUP3_CHECK_BUSY_OFFSET;
1146
1147                 switch (func_to_switch) {
1148                 case DRIVING_TYPE_A:
1149                         support_mask = DRIVING_TYPE_A_MASK;
1150                         query_switch = TYPE_A_QUERY_SWITCH_OK;
1151                         switch_busy = TYPE_A_SWITCH_BUSY;
1152                         break;
1153
1154                 case DRIVING_TYPE_C:
1155                         support_mask = DRIVING_TYPE_C_MASK;
1156                         query_switch = TYPE_C_QUERY_SWITCH_OK;
1157                         switch_busy = TYPE_C_SWITCH_BUSY;
1158                         break;
1159
1160                 case DRIVING_TYPE_D:
1161                         support_mask = DRIVING_TYPE_D_MASK;
1162                         query_switch = TYPE_D_QUERY_SWITCH_OK;
1163                         switch_busy = TYPE_D_SWITCH_BUSY;
1164                         break;
1165
1166                 default:
1167                         rtsx_trace(chip);
1168                         return STATUS_FAIL;
1169                 }
1170         } else if (func_group == SD_FUNC_GROUP_4) {
1171                 support_offset = FUNCTION_GROUP4_SUPPORT_OFFSET;
1172                 query_switch_offset = FUNCTION_GROUP4_QUERY_SWITCH_OFFSET;
1173                 check_busy_offset = FUNCTION_GROUP4_CHECK_BUSY_OFFSET;
1174
1175                 switch (func_to_switch) {
1176                 case CURRENT_LIMIT_400:
1177                         support_mask = CURRENT_LIMIT_400_MASK;
1178                         query_switch = CURRENT_LIMIT_400_QUERY_SWITCH_OK;
1179                         switch_busy = CURRENT_LIMIT_400_SWITCH_BUSY;
1180                         break;
1181
1182                 case CURRENT_LIMIT_600:
1183                         support_mask = CURRENT_LIMIT_600_MASK;
1184                         query_switch = CURRENT_LIMIT_600_QUERY_SWITCH_OK;
1185                         switch_busy = CURRENT_LIMIT_600_SWITCH_BUSY;
1186                         break;
1187
1188                 case CURRENT_LIMIT_800:
1189                         support_mask = CURRENT_LIMIT_800_MASK;
1190                         query_switch = CURRENT_LIMIT_800_QUERY_SWITCH_OK;
1191                         switch_busy = CURRENT_LIMIT_800_SWITCH_BUSY;
1192                         break;
1193
1194                 default:
1195                         rtsx_trace(chip);
1196                         return STATUS_FAIL;
1197                 }
1198         } else {
1199                 rtsx_trace(chip);
1200                 return STATUS_FAIL;
1201         }
1202
1203         if (func_group == SD_FUNC_GROUP_1) {
1204                 if (!(buf[support_offset] & support_mask) ||
1205                     ((buf[query_switch_offset] & 0x0F) != query_switch)) {
1206                         rtsx_trace(chip);
1207                         return STATUS_FAIL;
1208                 }
1209         }
1210
1211         /* Check 'Busy Status' */
1212         if ((buf[DATA_STRUCTURE_VER_OFFSET] == 0x01) &&
1213             ((buf[check_busy_offset] & switch_busy) == switch_busy)) {
1214                 rtsx_trace(chip);
1215                 return STATUS_FAIL;
1216         }
1217
1218         return STATUS_SUCCESS;
1219 }
1220
1221 static int sd_check_switch_mode(struct rtsx_chip *chip, u8 mode, u8 func_group,
1222                                 u8 func_to_switch, u8 bus_width)
1223 {
1224         struct sd_info *sd_card = &chip->sd_card;
1225         int retval;
1226         u8 cmd[5], buf[64];
1227
1228         dev_dbg(rtsx_dev(chip), "%s (mode = %d, func_group = %d, func_to_switch = %d)\n",
1229                 __func__, mode, func_group, func_to_switch);
1230
1231         cmd[0] = 0x40 | SWITCH;
1232         cmd[1] = mode;
1233
1234         if (func_group == SD_FUNC_GROUP_1) {
1235                 cmd[2] = 0xFF;
1236                 cmd[3] = 0xFF;
1237                 cmd[4] = 0xF0 + func_to_switch;
1238         } else if (func_group == SD_FUNC_GROUP_3) {
1239                 cmd[2] = 0xFF;
1240                 cmd[3] = 0xF0 + func_to_switch;
1241                 cmd[4] = 0xFF;
1242         } else if (func_group == SD_FUNC_GROUP_4) {
1243                 cmd[2] = 0xFF;
1244                 cmd[3] = 0x0F + (func_to_switch << 4);
1245                 cmd[4] = 0xFF;
1246         } else {
1247                 cmd[1] = SD_CHECK_MODE;
1248                 cmd[2] = 0xFF;
1249                 cmd[3] = 0xFF;
1250                 cmd[4] = 0xFF;
1251         }
1252
1253         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, bus_width,
1254                               buf, 64, 250);
1255         if (retval != STATUS_SUCCESS) {
1256                 rtsx_clear_sd_error(chip);
1257                 rtsx_trace(chip);
1258                 return STATUS_FAIL;
1259         }
1260
1261         dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf);
1262
1263         if (func_group == NO_ARGUMENT) {
1264                 sd_card->func_group1_mask = buf[0x0D];
1265                 sd_card->func_group2_mask = buf[0x0B];
1266                 sd_card->func_group3_mask = buf[0x09];
1267                 sd_card->func_group4_mask = buf[0x07];
1268
1269                 dev_dbg(rtsx_dev(chip), "func_group1_mask = 0x%02x\n",
1270                         buf[0x0D]);
1271                 dev_dbg(rtsx_dev(chip), "func_group2_mask = 0x%02x\n",
1272                         buf[0x0B]);
1273                 dev_dbg(rtsx_dev(chip), "func_group3_mask = 0x%02x\n",
1274                         buf[0x09]);
1275                 dev_dbg(rtsx_dev(chip), "func_group4_mask = 0x%02x\n",
1276                         buf[0x07]);
1277         } else {
1278                 /* Maximum current consumption, check whether current is
1279                  * acceptable; bit[511:496] = 0x0000 means some error happened.
1280                  */
1281                 u16 cc = ((u16)buf[0] << 8) | buf[1];
1282
1283                 dev_dbg(rtsx_dev(chip), "Maximum current consumption: %dmA\n",
1284                         cc);
1285                 if ((cc == 0) || (cc > 800)) {
1286                         rtsx_trace(chip);
1287                         return STATUS_FAIL;
1288                 }
1289
1290                 retval = sd_query_switch_result(chip, func_group,
1291                                                 func_to_switch, buf, 64);
1292                 if (retval != STATUS_SUCCESS) {
1293                         rtsx_trace(chip);
1294                         return STATUS_FAIL;
1295                 }
1296
1297                 if ((cc > 400) || (func_to_switch > CURRENT_LIMIT_400)) {
1298                         retval = rtsx_write_register(chip, OCPPARA2,
1299                                                      SD_OCP_THD_MASK,
1300                                                      chip->sd_800mA_ocp_thd);
1301                         if (retval) {
1302                                 rtsx_trace(chip);
1303                                 return retval;
1304                         }
1305                         retval = rtsx_write_register(chip, CARD_PWR_CTL,
1306                                                      PMOS_STRG_MASK,
1307                                                      PMOS_STRG_800mA);
1308                         if (retval) {
1309                                 rtsx_trace(chip);
1310                                 return retval;
1311                         }
1312                 }
1313         }
1314
1315         return STATUS_SUCCESS;
1316 }
1317
1318 static u8 downgrade_switch_mode(u8 func_group, u8 func_to_switch)
1319 {
1320         if (func_group == SD_FUNC_GROUP_1) {
1321                 if (func_to_switch > HS_SUPPORT)
1322                         func_to_switch--;
1323
1324         } else if (func_group == SD_FUNC_GROUP_4) {
1325                 if (func_to_switch > CURRENT_LIMIT_200)
1326                         func_to_switch--;
1327         }
1328
1329         return func_to_switch;
1330 }
1331
1332 static int sd_check_switch(struct rtsx_chip *chip,
1333                            u8 func_group, u8 func_to_switch, u8 bus_width)
1334 {
1335         int retval;
1336         int i;
1337         bool switch_good = false;
1338
1339         for (i = 0; i < 3; i++) {
1340                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1341                         sd_set_err_code(chip, SD_NO_CARD);
1342                         rtsx_trace(chip);
1343                         return STATUS_FAIL;
1344                 }
1345
1346                 retval = sd_check_switch_mode(chip, SD_CHECK_MODE, func_group,
1347                                               func_to_switch, bus_width);
1348                 if (retval == STATUS_SUCCESS) {
1349                         u8 stat;
1350
1351                         retval = sd_check_switch_mode(chip, SD_SWITCH_MODE,
1352                                                       func_group,
1353                                                       func_to_switch,
1354                                                       bus_width);
1355                         if (retval == STATUS_SUCCESS) {
1356                                 switch_good = true;
1357                                 break;
1358                         }
1359
1360                         retval = rtsx_read_register(chip, SD_STAT1, &stat);
1361                         if (retval) {
1362                                 rtsx_trace(chip);
1363                                 return retval;
1364                         }
1365                         if (stat & SD_CRC16_ERR) {
1366                                 dev_dbg(rtsx_dev(chip), "SD CRC16 error when switching mode\n");
1367                                 rtsx_trace(chip);
1368                                 return STATUS_FAIL;
1369                         }
1370                 }
1371
1372                 func_to_switch = downgrade_switch_mode(func_group,
1373                                                        func_to_switch);
1374
1375                 wait_timeout(20);
1376         }
1377
1378         if (!switch_good) {
1379                 rtsx_trace(chip);
1380                 return STATUS_FAIL;
1381         }
1382
1383         return STATUS_SUCCESS;
1384 }
1385
1386 static int sd_switch_function(struct rtsx_chip *chip, u8 bus_width)
1387 {
1388         struct sd_info *sd_card = &chip->sd_card;
1389         int retval;
1390         int i;
1391         u8 func_to_switch = 0;
1392
1393         /* Get supported functions */
1394         retval = sd_check_switch_mode(chip, SD_CHECK_MODE, NO_ARGUMENT,
1395                                       NO_ARGUMENT, bus_width);
1396         if (retval != STATUS_SUCCESS) {
1397                 rtsx_trace(chip);
1398                 return STATUS_FAIL;
1399         }
1400
1401         sd_card->func_group1_mask &= ~(sd_card->sd_switch_fail);
1402
1403         /* Function Group 1: Access Mode */
1404         for (i = 0; i < 4; i++) {
1405                 switch ((u8)(chip->sd_speed_prior >> (i * 8))) {
1406                 case SDR104_SUPPORT:
1407                         if ((sd_card->func_group1_mask & SDR104_SUPPORT_MASK) &&
1408                             chip->sdr104_en) {
1409                                 func_to_switch = SDR104_SUPPORT;
1410                         }
1411                         break;
1412
1413                 case DDR50_SUPPORT:
1414                         if ((sd_card->func_group1_mask & DDR50_SUPPORT_MASK) &&
1415                             chip->ddr50_en) {
1416                                 func_to_switch = DDR50_SUPPORT;
1417                         }
1418                         break;
1419
1420                 case SDR50_SUPPORT:
1421                         if ((sd_card->func_group1_mask & SDR50_SUPPORT_MASK) &&
1422                             chip->sdr50_en) {
1423                                 func_to_switch = SDR50_SUPPORT;
1424                         }
1425                         break;
1426
1427                 case HS_SUPPORT:
1428                         if (sd_card->func_group1_mask & HS_SUPPORT_MASK)
1429                                 func_to_switch = HS_SUPPORT;
1430
1431                         break;
1432
1433                 default:
1434                         continue;
1435                 }
1436
1437                 if (func_to_switch)
1438                         break;
1439         }
1440         dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_1: func_to_switch = 0x%02x",
1441                 func_to_switch);
1442
1443 #ifdef SUPPORT_SD_LOCK
1444         if ((sd_card->sd_lock_status & SD_SDR_RST) &&
1445             (func_to_switch == DDR50_SUPPORT) &&
1446             (sd_card->func_group1_mask & SDR50_SUPPORT_MASK)) {
1447                 func_to_switch = SDR50_SUPPORT;
1448                 dev_dbg(rtsx_dev(chip), "Using SDR50 instead of DDR50 for SD Lock\n");
1449         }
1450 #endif
1451
1452         if (func_to_switch) {
1453                 retval = sd_check_switch(chip, SD_FUNC_GROUP_1, func_to_switch,
1454                                          bus_width);
1455                 if (retval != STATUS_SUCCESS) {
1456                         if (func_to_switch == SDR104_SUPPORT) {
1457                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK;
1458                         } else if (func_to_switch == DDR50_SUPPORT) {
1459                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
1460                                         DDR50_SUPPORT_MASK;
1461                         } else if (func_to_switch == SDR50_SUPPORT) {
1462                                 sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
1463                                         DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
1464                         }
1465                         rtsx_trace(chip);
1466                         return STATUS_FAIL;
1467                 }
1468
1469                 if (func_to_switch == SDR104_SUPPORT)
1470                         SET_SD_SDR104(sd_card);
1471                 else if (func_to_switch == DDR50_SUPPORT)
1472                         SET_SD_DDR50(sd_card);
1473                 else if (func_to_switch == SDR50_SUPPORT)
1474                         SET_SD_SDR50(sd_card);
1475                 else
1476                         SET_SD_HS(sd_card);
1477         }
1478
1479         if (CHK_SD_DDR50(sd_card)) {
1480                 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06,
1481                                              0x04);
1482                 if (retval) {
1483                         rtsx_trace(chip);
1484                         return retval;
1485                 }
1486                 retval = sd_set_sample_push_timing(chip);
1487                 if (retval != STATUS_SUCCESS) {
1488                         rtsx_trace(chip);
1489                         return STATUS_FAIL;
1490                 }
1491         }
1492
1493         if (!func_to_switch || (func_to_switch == HS_SUPPORT)) {
1494                 /* Do not try to switch current limit if the card doesn't
1495                  * support UHS mode or we don't want it to support UHS mode
1496                  */
1497                 return STATUS_SUCCESS;
1498         }
1499
1500         /* Function Group 4: Current Limit */
1501         func_to_switch = 0xFF;
1502
1503         for (i = 0; i < 4; i++) {
1504                 switch ((u8)(chip->sd_current_prior >> (i * 8))) {
1505                 case CURRENT_LIMIT_800:
1506                         if (sd_card->func_group4_mask & CURRENT_LIMIT_800_MASK)
1507                                 func_to_switch = CURRENT_LIMIT_800;
1508
1509                         break;
1510
1511                 case CURRENT_LIMIT_600:
1512                         if (sd_card->func_group4_mask & CURRENT_LIMIT_600_MASK)
1513                                 func_to_switch = CURRENT_LIMIT_600;
1514
1515                         break;
1516
1517                 case CURRENT_LIMIT_400:
1518                         if (sd_card->func_group4_mask & CURRENT_LIMIT_400_MASK)
1519                                 func_to_switch = CURRENT_LIMIT_400;
1520
1521                         break;
1522
1523                 case CURRENT_LIMIT_200:
1524                         if (sd_card->func_group4_mask & CURRENT_LIMIT_200_MASK)
1525                                 func_to_switch = CURRENT_LIMIT_200;
1526
1527                         break;
1528
1529                 default:
1530                         continue;
1531                 }
1532
1533                 if (func_to_switch != 0xFF)
1534                         break;
1535         }
1536
1537         dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_4: func_to_switch = 0x%02x",
1538                 func_to_switch);
1539
1540         if (func_to_switch <= CURRENT_LIMIT_800) {
1541                 retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch,
1542                                          bus_width);
1543                 if (retval != STATUS_SUCCESS) {
1544                         if (sd_check_err_code(chip, SD_NO_CARD)) {
1545                                 rtsx_trace(chip);
1546                                 return STATUS_FAIL;
1547                         }
1548                 }
1549                 dev_dbg(rtsx_dev(chip), "Switch current limit finished! (%d)\n",
1550                         retval);
1551         }
1552
1553         if (CHK_SD_DDR50(sd_card)) {
1554                 retval = rtsx_write_register(chip, SD_PUSH_POINT_CTL, 0x06, 0);
1555                 if (retval) {
1556                         rtsx_trace(chip);
1557                         return retval;
1558                 }
1559         }
1560
1561         return STATUS_SUCCESS;
1562 }
1563
1564 static int sd_wait_data_idle(struct rtsx_chip *chip)
1565 {
1566         int retval = STATUS_TIMEDOUT;
1567         int i;
1568         u8 val = 0;
1569
1570         for (i = 0; i < 100; i++) {
1571                 retval = rtsx_read_register(chip, SD_DATA_STATE, &val);
1572                 if (retval) {
1573                         rtsx_trace(chip);
1574                         return retval;
1575                 }
1576                 if (val & SD_DATA_IDLE) {
1577                         retval = STATUS_SUCCESS;
1578                         break;
1579                 }
1580                 udelay(100);
1581         }
1582         dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
1583
1584         return retval;
1585 }
1586
1587 static int sd_sdr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1588 {
1589         int retval;
1590         u8 cmd[5];
1591
1592         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1593         if (retval != STATUS_SUCCESS) {
1594                 rtsx_trace(chip);
1595                 return STATUS_FAIL;
1596         }
1597
1598         cmd[0] = 0x40 | SEND_TUNING_PATTERN;
1599         cmd[1] = 0;
1600         cmd[2] = 0;
1601         cmd[3] = 0;
1602         cmd[4] = 0;
1603
1604         retval = sd_read_data(chip, SD_TM_AUTO_TUNING, cmd, 5, 0x40, 1,
1605                               SD_BUS_WIDTH_4, NULL, 0, 100);
1606         if (retval != STATUS_SUCCESS) {
1607                 (void)sd_wait_data_idle(chip);
1608
1609                 rtsx_clear_sd_error(chip);
1610                 rtsx_trace(chip);
1611                 return STATUS_FAIL;
1612         }
1613
1614         return STATUS_SUCCESS;
1615 }
1616
1617 static int sd_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1618 {
1619         struct sd_info *sd_card = &chip->sd_card;
1620         int retval;
1621         u8 cmd[5];
1622
1623         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1624         if (retval != STATUS_SUCCESS) {
1625                 rtsx_trace(chip);
1626                 return STATUS_FAIL;
1627         }
1628
1629         dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n");
1630
1631         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
1632                                      SD_RSP_TYPE_R1, NULL, 0);
1633         if (retval != STATUS_SUCCESS) {
1634                 rtsx_trace(chip);
1635                 return STATUS_FAIL;
1636         }
1637
1638         cmd[0] = 0x40 | SD_STATUS;
1639         cmd[1] = 0;
1640         cmd[2] = 0;
1641         cmd[3] = 0;
1642         cmd[4] = 0;
1643
1644         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1,
1645                               SD_BUS_WIDTH_4, NULL, 0, 100);
1646         if (retval != STATUS_SUCCESS) {
1647                 (void)sd_wait_data_idle(chip);
1648
1649                 rtsx_clear_sd_error(chip);
1650                 rtsx_trace(chip);
1651                 return STATUS_FAIL;
1652         }
1653
1654         return STATUS_SUCCESS;
1655 }
1656
1657 static int mmc_ddr_tuning_rx_cmd(struct rtsx_chip *chip, u8 sample_point)
1658 {
1659         struct sd_info *sd_card = &chip->sd_card;
1660         int retval;
1661         u8 cmd[5], bus_width;
1662
1663         if (CHK_MMC_8BIT(sd_card))
1664                 bus_width = SD_BUS_WIDTH_8;
1665         else if (CHK_MMC_4BIT(sd_card))
1666                 bus_width = SD_BUS_WIDTH_4;
1667         else
1668                 bus_width = SD_BUS_WIDTH_1;
1669
1670         retval = sd_change_phase(chip, sample_point, TUNE_RX);
1671         if (retval != STATUS_SUCCESS) {
1672                 rtsx_trace(chip);
1673                 return STATUS_FAIL;
1674         }
1675
1676         dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n");
1677
1678         cmd[0] = 0x40 | SEND_EXT_CSD;
1679         cmd[1] = 0;
1680         cmd[2] = 0;
1681         cmd[3] = 0;
1682         cmd[4] = 0;
1683
1684         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 0x200, 1,
1685                               bus_width, NULL, 0, 100);
1686         if (retval != STATUS_SUCCESS) {
1687                 (void)sd_wait_data_idle(chip);
1688
1689                 rtsx_clear_sd_error(chip);
1690                 rtsx_trace(chip);
1691                 return STATUS_FAIL;
1692         }
1693
1694         return STATUS_SUCCESS;
1695 }
1696
1697 static int sd_sdr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1698 {
1699         struct sd_info *sd_card = &chip->sd_card;
1700         int retval;
1701
1702         retval = sd_change_phase(chip, sample_point, TUNE_TX);
1703         if (retval != STATUS_SUCCESS) {
1704                 rtsx_trace(chip);
1705                 return STATUS_FAIL;
1706         }
1707
1708         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1709                                      SD_RSP_80CLK_TIMEOUT_EN);
1710         if (retval) {
1711                 rtsx_trace(chip);
1712                 return retval;
1713         }
1714
1715         retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
1716                                      SD_RSP_TYPE_R1, NULL, 0);
1717         if (retval != STATUS_SUCCESS) {
1718                 if (sd_check_err_code(chip, SD_RSP_TIMEOUT)) {
1719                         rtsx_write_register(chip, SD_CFG3,
1720                                             SD_RSP_80CLK_TIMEOUT_EN, 0);
1721                         rtsx_trace(chip);
1722                         return STATUS_FAIL;
1723                 }
1724         }
1725
1726         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1727                                      0);
1728         if (retval) {
1729                 rtsx_trace(chip);
1730                 return retval;
1731         }
1732
1733         return STATUS_SUCCESS;
1734 }
1735
1736 static int sd_ddr_tuning_tx_cmd(struct rtsx_chip *chip, u8 sample_point)
1737 {
1738         struct sd_info *sd_card = &chip->sd_card;
1739         int retval;
1740         u8 cmd[5], bus_width;
1741
1742         retval = sd_change_phase(chip, sample_point, TUNE_TX);
1743         if (retval != STATUS_SUCCESS) {
1744                 rtsx_trace(chip);
1745                 return STATUS_FAIL;
1746         }
1747
1748         if (CHK_SD(sd_card)) {
1749                 bus_width = SD_BUS_WIDTH_4;
1750         } else {
1751                 if (CHK_MMC_8BIT(sd_card))
1752                         bus_width = SD_BUS_WIDTH_8;
1753                 else if (CHK_MMC_4BIT(sd_card))
1754                         bus_width = SD_BUS_WIDTH_4;
1755                 else
1756                         bus_width = SD_BUS_WIDTH_1;
1757         }
1758
1759         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
1760         if (retval != STATUS_SUCCESS) {
1761                 rtsx_trace(chip);
1762                 return STATUS_FAIL;
1763         }
1764
1765         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1766                                      SD_RSP_80CLK_TIMEOUT_EN);
1767         if (retval) {
1768                 rtsx_trace(chip);
1769                 return retval;
1770         }
1771
1772         cmd[0] = 0x40 | PROGRAM_CSD;
1773         cmd[1] = 0;
1774         cmd[2] = 0;
1775         cmd[3] = 0;
1776         cmd[4] = 0;
1777
1778         retval = sd_write_data(chip, SD_TM_AUTO_WRITE_2, cmd, 5, 16, 1,
1779                                bus_width, sd_card->raw_csd, 16, 100);
1780         if (retval != STATUS_SUCCESS) {
1781                 rtsx_clear_sd_error(chip);
1782                 rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
1783                 rtsx_trace(chip);
1784                 return STATUS_FAIL;
1785         }
1786
1787         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1788                                      0);
1789         if (retval) {
1790                 rtsx_trace(chip);
1791                 return retval;
1792         }
1793
1794         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1,
1795                             NULL, 0);
1796
1797         return STATUS_SUCCESS;
1798 }
1799
1800 static u8 sd_search_final_phase(struct rtsx_chip *chip, u32 phase_map,
1801                                 u8 tune_dir)
1802 {
1803         struct sd_info *sd_card = &chip->sd_card;
1804         struct timing_phase_path path[MAX_PHASE + 1];
1805         int i, j, cont_path_cnt;
1806         bool new_block;
1807         int max_len, final_path_idx;
1808         u8 final_phase = 0xFF;
1809
1810         if (phase_map == 0xFFFFFFFF) {
1811                 if (tune_dir == TUNE_RX)
1812                         final_phase = (u8)chip->sd_default_rx_phase;
1813                 else
1814                         final_phase = (u8)chip->sd_default_tx_phase;
1815
1816                 goto search_finish;
1817         }
1818
1819         cont_path_cnt = 0;
1820         new_block = true;
1821         j = 0;
1822         for (i = 0; i < MAX_PHASE + 1; i++) {
1823                 if (phase_map & (1 << i)) {
1824                         if (new_block) {
1825                                 new_block = false;
1826                                 j = cont_path_cnt++;
1827                                 path[j].start = i;
1828                                 path[j].end = i;
1829                         } else {
1830                                 path[j].end = i;
1831                         }
1832                 } else {
1833                         new_block = true;
1834                         if (cont_path_cnt) {
1835                                 int idx = cont_path_cnt - 1;
1836
1837                                 path[idx].len = path[idx].end -
1838                                         path[idx].start + 1;
1839                                 path[idx].mid = path[idx].start +
1840                                         path[idx].len / 2;
1841                         }
1842                 }
1843         }
1844
1845         if (cont_path_cnt == 0) {
1846                 dev_dbg(rtsx_dev(chip), "No continuous phase path\n");
1847                 goto search_finish;
1848         } else {
1849                 int idx = cont_path_cnt - 1;
1850
1851                 path[idx].len = path[idx].end - path[idx].start + 1;
1852                 path[idx].mid = path[idx].start + path[idx].len / 2;
1853         }
1854
1855         if ((path[0].start == 0) &&
1856             (path[cont_path_cnt - 1].end == MAX_PHASE)) {
1857                 path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1;
1858                 path[0].len += path[cont_path_cnt - 1].len;
1859                 path[0].mid = path[0].start + path[0].len / 2;
1860                 if (path[0].mid < 0)
1861                         path[0].mid += MAX_PHASE + 1;
1862
1863                 cont_path_cnt--;
1864         }
1865
1866         max_len = 0;
1867         final_phase = 0;
1868         final_path_idx = 0;
1869         for (i = 0; i < cont_path_cnt; i++) {
1870                 if (path[i].len > max_len) {
1871                         max_len = path[i].len;
1872                         final_phase = (u8)path[i].mid;
1873                         final_path_idx = i;
1874                 }
1875
1876                 dev_dbg(rtsx_dev(chip), "path[%d].start = %d\n",
1877                         i, path[i].start);
1878                 dev_dbg(rtsx_dev(chip), "path[%d].end = %d\n", i, path[i].end);
1879                 dev_dbg(rtsx_dev(chip), "path[%d].len = %d\n", i, path[i].len);
1880                 dev_dbg(rtsx_dev(chip), "path[%d].mid = %d\n", i, path[i].mid);
1881                 dev_dbg(rtsx_dev(chip), "\n");
1882         }
1883
1884         if (tune_dir == TUNE_TX) {
1885                 if (CHK_SD_SDR104(sd_card)) {
1886                         if (max_len > 15) {
1887                                 int temp_mid = (max_len - 16) / 2;
1888                                 int temp_final_phase =
1889                                         path[final_path_idx].end -
1890                                         (max_len - (6 + temp_mid));
1891
1892                                 if (temp_final_phase < 0)
1893                                         final_phase = (u8)(temp_final_phase +
1894                                                         MAX_PHASE + 1);
1895                                 else
1896                                         final_phase = (u8)temp_final_phase;
1897                         }
1898                 } else if (CHK_SD_SDR50(sd_card)) {
1899                         if (max_len > 12) {
1900                                 int temp_mid = (max_len - 13) / 2;
1901                                 int temp_final_phase =
1902                                         path[final_path_idx].end -
1903                                         (max_len - (3 + temp_mid));
1904
1905                                 if (temp_final_phase < 0)
1906                                         final_phase = (u8)(temp_final_phase +
1907                                                         MAX_PHASE + 1);
1908                                 else
1909                                         final_phase = (u8)temp_final_phase;
1910                         }
1911                 }
1912         }
1913
1914 search_finish:
1915         dev_dbg(rtsx_dev(chip), "Final chosen phase: %d\n", final_phase);
1916         return final_phase;
1917 }
1918
1919 static int sd_tuning_rx(struct rtsx_chip *chip)
1920 {
1921         struct sd_info *sd_card = &chip->sd_card;
1922         int retval;
1923         int i, j;
1924         u32 raw_phase_map[3], phase_map;
1925         u8 final_phase;
1926         int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
1927
1928         if (CHK_SD(sd_card)) {
1929                 if (CHK_SD_DDR50(sd_card))
1930                         tuning_cmd = sd_ddr_tuning_rx_cmd;
1931                 else
1932                         tuning_cmd = sd_sdr_tuning_rx_cmd;
1933
1934         } else {
1935                 if (CHK_MMC_DDR52(sd_card)) {
1936                         tuning_cmd = mmc_ddr_tuning_rx_cmd;
1937                 } else {
1938                         rtsx_trace(chip);
1939                         return STATUS_FAIL;
1940                 }
1941         }
1942
1943         for (i = 0; i < 3; i++) {
1944                 raw_phase_map[i] = 0;
1945                 for (j = MAX_PHASE; j >= 0; j--) {
1946                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1947                                 sd_set_err_code(chip, SD_NO_CARD);
1948                                 rtsx_trace(chip);
1949                                 return STATUS_FAIL;
1950                         }
1951
1952                         retval = tuning_cmd(chip, (u8)j);
1953                         if (retval == STATUS_SUCCESS)
1954                                 raw_phase_map[i] |= 1 << j;
1955                 }
1956         }
1957
1958         phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
1959         for (i = 0; i < 3; i++)
1960                 dev_dbg(rtsx_dev(chip), "RX raw_phase_map[%d] = 0x%08x\n",
1961                         i, raw_phase_map[i]);
1962
1963         dev_dbg(rtsx_dev(chip), "RX phase_map = 0x%08x\n", phase_map);
1964
1965         final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX);
1966         if (final_phase == 0xFF) {
1967                 rtsx_trace(chip);
1968                 return STATUS_FAIL;
1969         }
1970
1971         retval = sd_change_phase(chip, final_phase, TUNE_RX);
1972         if (retval != STATUS_SUCCESS) {
1973                 rtsx_trace(chip);
1974                 return STATUS_FAIL;
1975         }
1976
1977         return STATUS_SUCCESS;
1978 }
1979
1980 static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip)
1981 {
1982         struct sd_info *sd_card = &chip->sd_card;
1983         int retval;
1984         int i;
1985         u32 phase_map;
1986         u8 final_phase;
1987
1988         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
1989                                      SD_RSP_80CLK_TIMEOUT_EN);
1990         if (retval) {
1991                 rtsx_trace(chip);
1992                 return retval;
1993         }
1994
1995         phase_map = 0;
1996         for (i = MAX_PHASE; i >= 0; i--) {
1997                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
1998                         sd_set_err_code(chip, SD_NO_CARD);
1999                         rtsx_write_register(chip, SD_CFG3,
2000                                             SD_RSP_80CLK_TIMEOUT_EN, 0);
2001                         rtsx_trace(chip);
2002                         return STATUS_FAIL;
2003                 }
2004
2005                 retval = sd_change_phase(chip, (u8)i, TUNE_TX);
2006                 if (retval != STATUS_SUCCESS)
2007                         continue;
2008
2009                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
2010                                              sd_card->sd_addr, SD_RSP_TYPE_R1,
2011                                              NULL, 0);
2012                 if ((retval == STATUS_SUCCESS) ||
2013                     !sd_check_err_code(chip, SD_RSP_TIMEOUT))
2014                         phase_map |= 1 << i;
2015         }
2016
2017         retval = rtsx_write_register(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN,
2018                                      0);
2019         if (retval) {
2020                 rtsx_trace(chip);
2021                 return retval;
2022         }
2023
2024         dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase_map = 0x%08x\n",
2025                 phase_map);
2026
2027         final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
2028         if (final_phase == 0xFF) {
2029                 rtsx_trace(chip);
2030                 return STATUS_FAIL;
2031         }
2032
2033         retval = sd_change_phase(chip, final_phase, TUNE_TX);
2034         if (retval != STATUS_SUCCESS) {
2035                 rtsx_trace(chip);
2036                 return STATUS_FAIL;
2037         }
2038
2039         dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase: %d\n",
2040                 (int)final_phase);
2041
2042         return STATUS_SUCCESS;
2043 }
2044
2045 static int sd_tuning_tx(struct rtsx_chip *chip)
2046 {
2047         struct sd_info *sd_card = &chip->sd_card;
2048         int retval;
2049         int i, j;
2050         u32 raw_phase_map[3], phase_map;
2051         u8 final_phase;
2052         int (*tuning_cmd)(struct rtsx_chip *chip, u8 sample_point);
2053
2054         if (CHK_SD(sd_card)) {
2055                 if (CHK_SD_DDR50(sd_card))
2056                         tuning_cmd = sd_ddr_tuning_tx_cmd;
2057                 else
2058                         tuning_cmd = sd_sdr_tuning_tx_cmd;
2059
2060         } else {
2061                 if (CHK_MMC_DDR52(sd_card)) {
2062                         tuning_cmd = sd_ddr_tuning_tx_cmd;
2063                 } else {
2064                         rtsx_trace(chip);
2065                         return STATUS_FAIL;
2066                 }
2067         }
2068
2069         for (i = 0; i < 3; i++) {
2070                 raw_phase_map[i] = 0;
2071                 for (j = MAX_PHASE; j >= 0; j--) {
2072                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2073                                 sd_set_err_code(chip, SD_NO_CARD);
2074                                 rtsx_write_register(chip, SD_CFG3,
2075                                                     SD_RSP_80CLK_TIMEOUT_EN, 0);
2076                                 rtsx_trace(chip);
2077                                 return STATUS_FAIL;
2078                         }
2079
2080                         retval = tuning_cmd(chip, (u8)j);
2081                         if (retval == STATUS_SUCCESS)
2082                                 raw_phase_map[i] |= 1 << j;
2083                 }
2084         }
2085
2086         phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
2087         for (i = 0; i < 3; i++)
2088                 dev_dbg(rtsx_dev(chip), "TX raw_phase_map[%d] = 0x%08x\n",
2089                         i, raw_phase_map[i]);
2090
2091         dev_dbg(rtsx_dev(chip), "TX phase_map = 0x%08x\n", phase_map);
2092
2093         final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
2094         if (final_phase == 0xFF) {
2095                 rtsx_trace(chip);
2096                 return STATUS_FAIL;
2097         }
2098
2099         retval = sd_change_phase(chip, final_phase, TUNE_TX);
2100         if (retval != STATUS_SUCCESS) {
2101                 rtsx_trace(chip);
2102                 return STATUS_FAIL;
2103         }
2104
2105         return STATUS_SUCCESS;
2106 }
2107
2108 static int sd_sdr_tuning(struct rtsx_chip *chip)
2109 {
2110         int retval;
2111
2112         retval = sd_tuning_tx(chip);
2113         if (retval != STATUS_SUCCESS) {
2114                 rtsx_trace(chip);
2115                 return STATUS_FAIL;
2116         }
2117
2118         retval = sd_tuning_rx(chip);
2119         if (retval != STATUS_SUCCESS) {
2120                 rtsx_trace(chip);
2121                 return STATUS_FAIL;
2122         }
2123
2124         return STATUS_SUCCESS;
2125 }
2126
2127 static int sd_ddr_tuning(struct rtsx_chip *chip)
2128 {
2129         int retval;
2130
2131         if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
2132                 retval = sd_ddr_pre_tuning_tx(chip);
2133                 if (retval != STATUS_SUCCESS) {
2134                         rtsx_trace(chip);
2135                         return STATUS_FAIL;
2136                 }
2137         } else {
2138                 retval = sd_change_phase(chip, (u8)chip->sd_ddr_tx_phase,
2139                                          TUNE_TX);
2140                 if (retval != STATUS_SUCCESS) {
2141                         rtsx_trace(chip);
2142                         return STATUS_FAIL;
2143                 }
2144         }
2145
2146         retval = sd_tuning_rx(chip);
2147         if (retval != STATUS_SUCCESS) {
2148                 rtsx_trace(chip);
2149                 return STATUS_FAIL;
2150         }
2151
2152         if (!(chip->sd_ctl & SD_DDR_TX_PHASE_SET_BY_USER)) {
2153                 retval = sd_tuning_tx(chip);
2154                 if (retval != STATUS_SUCCESS) {
2155                         rtsx_trace(chip);
2156                         return STATUS_FAIL;
2157                 }
2158         }
2159
2160         return STATUS_SUCCESS;
2161 }
2162
2163 static int mmc_ddr_tuning(struct rtsx_chip *chip)
2164 {
2165         int retval;
2166
2167         if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
2168                 retval = sd_ddr_pre_tuning_tx(chip);
2169                 if (retval != STATUS_SUCCESS) {
2170                         rtsx_trace(chip);
2171                         return STATUS_FAIL;
2172                 }
2173         } else {
2174                 retval = sd_change_phase(chip, (u8)chip->mmc_ddr_tx_phase,
2175                                          TUNE_TX);
2176                 if (retval != STATUS_SUCCESS) {
2177                         rtsx_trace(chip);
2178                         return STATUS_FAIL;
2179                 }
2180         }
2181
2182         retval = sd_tuning_rx(chip);
2183         if (retval != STATUS_SUCCESS) {
2184                 rtsx_trace(chip);
2185                 return STATUS_FAIL;
2186         }
2187
2188         if (!(chip->sd_ctl & MMC_DDR_TX_PHASE_SET_BY_USER)) {
2189                 retval = sd_tuning_tx(chip);
2190                 if (retval != STATUS_SUCCESS) {
2191                         rtsx_trace(chip);
2192                         return STATUS_FAIL;
2193                 }
2194         }
2195
2196         return STATUS_SUCCESS;
2197 }
2198
2199 int sd_switch_clock(struct rtsx_chip *chip)
2200 {
2201         struct sd_info *sd_card = &chip->sd_card;
2202         int retval;
2203         int re_tuning = 0;
2204
2205         retval = select_card(chip, SD_CARD);
2206         if (retval != STATUS_SUCCESS) {
2207                 rtsx_trace(chip);
2208                 return STATUS_FAIL;
2209         }
2210
2211         retval = switch_clock(chip, sd_card->sd_clock);
2212         if (retval != STATUS_SUCCESS) {
2213                 rtsx_trace(chip);
2214                 return STATUS_FAIL;
2215         }
2216
2217         if (re_tuning) {
2218                 if (CHK_SD(sd_card)) {
2219                         if (CHK_SD_DDR50(sd_card))
2220                                 retval = sd_ddr_tuning(chip);
2221                         else
2222                                 retval = sd_sdr_tuning(chip);
2223                 } else {
2224                         if (CHK_MMC_DDR52(sd_card))
2225                                 retval = mmc_ddr_tuning(chip);
2226                 }
2227
2228                 if (retval != STATUS_SUCCESS) {
2229                         rtsx_trace(chip);
2230                         return STATUS_FAIL;
2231                 }
2232         }
2233
2234         return STATUS_SUCCESS;
2235 }
2236
2237 static int sd_prepare_reset(struct rtsx_chip *chip)
2238 {
2239         struct sd_info *sd_card = &chip->sd_card;
2240         int retval;
2241
2242         if (chip->asic_code)
2243                 sd_card->sd_clock = 29;
2244         else
2245                 sd_card->sd_clock = CLK_30;
2246
2247         sd_card->sd_type = 0;
2248         sd_card->seq_mode = 0;
2249         sd_card->sd_data_buf_ready = 0;
2250         sd_card->capacity = 0;
2251
2252 #ifdef SUPPORT_SD_LOCK
2253         sd_card->sd_lock_status = 0;
2254         sd_card->sd_erase_status = 0;
2255 #endif
2256
2257         chip->capacity[chip->card2lun[SD_CARD]] = 0;
2258         chip->sd_io = 0;
2259
2260         retval = sd_set_init_para(chip);
2261         if (retval != STATUS_SUCCESS) {
2262                 rtsx_trace(chip);
2263                 return retval;
2264         }
2265
2266         retval = rtsx_write_register(chip, REG_SD_CFG1, 0xFF, 0x40);
2267         if (retval) {
2268                 rtsx_trace(chip);
2269                 return retval;
2270         }
2271
2272         retval = rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
2273                                      SD_STOP | SD_CLR_ERR);
2274         if (retval) {
2275                 rtsx_trace(chip);
2276                 return retval;
2277         }
2278
2279         retval = select_card(chip, SD_CARD);
2280         if (retval != STATUS_SUCCESS) {
2281                 rtsx_trace(chip);
2282                 return STATUS_FAIL;
2283         }
2284
2285         return STATUS_SUCCESS;
2286 }
2287
2288 static int sd_pull_ctl_disable(struct rtsx_chip *chip)
2289 {
2290         int retval;
2291
2292         if (CHECK_PID(chip, 0x5208)) {
2293                 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
2294                                              XD_D3_PD | SD_D7_PD | SD_CLK_PD |
2295                                              SD_D5_PD);
2296                 if (retval) {
2297                         rtsx_trace(chip);
2298                         return retval;
2299                 }
2300                 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
2301                                              SD_D6_PD | SD_D0_PD | SD_D1_PD |
2302                                              XD_D5_PD);
2303                 if (retval) {
2304                         rtsx_trace(chip);
2305                         return retval;
2306                 }
2307                 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
2308                                              SD_D4_PD | XD_CE_PD | XD_CLE_PD |
2309                                              XD_CD_PU);
2310                 if (retval) {
2311                         rtsx_trace(chip);
2312                         return retval;
2313                 }
2314                 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
2315                                              XD_RDY_PD | SD_D3_PD | SD_D2_PD |
2316                                              XD_ALE_PD);
2317                 if (retval) {
2318                         rtsx_trace(chip);
2319                         return retval;
2320                 }
2321                 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
2322                                              MS_INS_PU | SD_WP_PD | SD_CD_PU |
2323                                              SD_CMD_PD);
2324                 if (retval) {
2325                         rtsx_trace(chip);
2326                         return retval;
2327                 }
2328                 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
2329                                              MS_D5_PD | MS_D4_PD);
2330                 if (retval) {
2331                         rtsx_trace(chip);
2332                         return retval;
2333                 }
2334         } else if (CHECK_PID(chip, 0x5288)) {
2335                 if (CHECK_BARO_PKG(chip, QFN)) {
2336                         retval = rtsx_write_register(chip, CARD_PULL_CTL1,
2337                                                      0xFF, 0x55);
2338                         if (retval) {
2339                                 rtsx_trace(chip);
2340                                 return retval;
2341                         }
2342                         retval = rtsx_write_register(chip, CARD_PULL_CTL2,
2343                                                      0xFF, 0x55);
2344                         if (retval) {
2345                                 rtsx_trace(chip);
2346                                 return retval;
2347                         }
2348                         retval = rtsx_write_register(chip, CARD_PULL_CTL3,
2349                                                      0xFF, 0x4B);
2350                         if (retval) {
2351                                 rtsx_trace(chip);
2352                                 return retval;
2353                         }
2354                         retval = rtsx_write_register(chip, CARD_PULL_CTL4,
2355                                                      0xFF, 0x69);
2356                         if (retval) {
2357                                 rtsx_trace(chip);
2358                                 return retval;
2359                         }
2360                 }
2361         }
2362
2363         return STATUS_SUCCESS;
2364 }
2365
2366 int sd_pull_ctl_enable(struct rtsx_chip *chip)
2367 {
2368         int retval;
2369
2370         rtsx_init_cmd(chip);
2371
2372         if (CHECK_PID(chip, 0x5208)) {
2373                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
2374                              XD_D3_PD | SD_DAT7_PU | SD_CLK_NP | SD_D5_PU);
2375                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
2376                              SD_D6_PU | SD_D0_PU | SD_D1_PU | XD_D5_PD);
2377                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
2378                              SD_D4_PU | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
2379                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
2380                              XD_RDY_PD | SD_D3_PU | SD_D2_PU | XD_ALE_PD);
2381                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
2382                              MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU);
2383                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
2384                              MS_D5_PD | MS_D4_PD);
2385         } else if (CHECK_PID(chip, 0x5288)) {
2386                 if (CHECK_BARO_PKG(chip, QFN)) {
2387                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
2388                                      0xA8);
2389                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
2390                                      0x5A);
2391                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
2392                                      0x95);
2393                         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
2394                                      0xAA);
2395                 }
2396         }
2397
2398         retval = rtsx_send_cmd(chip, SD_CARD, 100);
2399         if (retval < 0) {
2400                 rtsx_trace(chip);
2401                 return STATUS_FAIL;
2402         }
2403
2404         return STATUS_SUCCESS;
2405 }
2406
2407 static int sd_init_power(struct rtsx_chip *chip)
2408 {
2409         int retval;
2410
2411         retval = sd_power_off_card3v3(chip);
2412         if (retval != STATUS_SUCCESS) {
2413                 rtsx_trace(chip);
2414                 return STATUS_FAIL;
2415         }
2416
2417         if (!chip->ft2_fast_mode)
2418                 wait_timeout(250);
2419
2420         retval = enable_card_clock(chip, SD_CARD);
2421         if (retval != STATUS_SUCCESS) {
2422                 rtsx_trace(chip);
2423                 return STATUS_FAIL;
2424         }
2425
2426         if (chip->asic_code) {
2427                 retval = sd_pull_ctl_enable(chip);
2428                 if (retval != STATUS_SUCCESS) {
2429                         rtsx_trace(chip);
2430                         return STATUS_FAIL;
2431                 }
2432         } else {
2433                 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
2434                                              FPGA_SD_PULL_CTL_BIT | 0x20, 0);
2435                 if (retval) {
2436                         rtsx_trace(chip);
2437                         return retval;
2438                 }
2439         }
2440
2441         if (!chip->ft2_fast_mode) {
2442                 retval = card_power_on(chip, SD_CARD);
2443                 if (retval != STATUS_SUCCESS) {
2444                         rtsx_trace(chip);
2445                         return STATUS_FAIL;
2446                 }
2447
2448                 wait_timeout(260);
2449
2450 #ifdef SUPPORT_OCP
2451                 if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
2452                         dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
2453                                 chip->ocp_stat);
2454                         rtsx_trace(chip);
2455                         return STATUS_FAIL;
2456                 }
2457 #endif
2458         }
2459
2460         retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN,
2461                                      SD_OUTPUT_EN);
2462         if (retval) {
2463                 rtsx_trace(chip);
2464                 return retval;
2465         }
2466
2467         return STATUS_SUCCESS;
2468 }
2469
2470 static int sd_dummy_clock(struct rtsx_chip *chip)
2471 {
2472         int retval;
2473
2474         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0x01);
2475         if (retval) {
2476                 rtsx_trace(chip);
2477                 return retval;
2478         }
2479         wait_timeout(5);
2480         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x01, 0);
2481         if (retval) {
2482                 rtsx_trace(chip);
2483                 return retval;
2484         }
2485
2486         return STATUS_SUCCESS;
2487 }
2488
2489 static int sd_read_lba0(struct rtsx_chip *chip)
2490 {
2491         struct sd_info *sd_card = &chip->sd_card;
2492         int retval;
2493         u8 cmd[5], bus_width;
2494
2495         cmd[0] = 0x40 | READ_SINGLE_BLOCK;
2496         cmd[1] = 0;
2497         cmd[2] = 0;
2498         cmd[3] = 0;
2499         cmd[4] = 0;
2500
2501         if (CHK_SD(sd_card)) {
2502                 bus_width = SD_BUS_WIDTH_4;
2503         } else {
2504                 if (CHK_MMC_8BIT(sd_card))
2505                         bus_width = SD_BUS_WIDTH_8;
2506                 else if (CHK_MMC_4BIT(sd_card))
2507                         bus_width = SD_BUS_WIDTH_4;
2508                 else
2509                         bus_width = SD_BUS_WIDTH_1;
2510         }
2511
2512         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 512, 1,
2513                               bus_width, NULL, 0, 100);
2514         if (retval != STATUS_SUCCESS) {
2515                 rtsx_clear_sd_error(chip);
2516                 rtsx_trace(chip);
2517                 return STATUS_FAIL;
2518         }
2519
2520         return STATUS_SUCCESS;
2521 }
2522
2523 static int sd_check_wp_state(struct rtsx_chip *chip)
2524 {
2525         struct sd_info *sd_card = &chip->sd_card;
2526         int retval;
2527         u32 val;
2528         u16 sd_card_type;
2529         u8 cmd[5], buf[64];
2530
2531         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2532                                      SD_RSP_TYPE_R1, NULL, 0);
2533         if (retval != STATUS_SUCCESS) {
2534                 rtsx_trace(chip);
2535                 return STATUS_FAIL;
2536         }
2537
2538         cmd[0] = 0x40 | SD_STATUS;
2539         cmd[1] = 0;
2540         cmd[2] = 0;
2541         cmd[3] = 0;
2542         cmd[4] = 0;
2543
2544         retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1,
2545                               SD_BUS_WIDTH_4, buf, 64, 250);
2546         if (retval != STATUS_SUCCESS) {
2547                 rtsx_clear_sd_error(chip);
2548
2549                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2550                                     SD_RSP_TYPE_R1, NULL, 0);
2551                 rtsx_trace(chip);
2552                 return STATUS_FAIL;
2553         }
2554
2555         dev_dbg(rtsx_dev(chip), "ACMD13:\n");
2556         dev_dbg(rtsx_dev(chip), "%*ph\n", 64, buf);
2557
2558         sd_card_type = ((u16)buf[2] << 8) | buf[3];
2559         dev_dbg(rtsx_dev(chip), "sd_card_type = 0x%04x\n", sd_card_type);
2560         if ((sd_card_type == 0x0001) || (sd_card_type == 0x0002)) {
2561                 /* ROM card or OTP */
2562                 chip->card_wp |= SD_CARD;
2563         }
2564
2565         /* Check SD Machanical Write-Protect Switch */
2566         val = rtsx_readl(chip, RTSX_BIPR);
2567         if (val & SD_WRITE_PROTECT)
2568                 chip->card_wp |= SD_CARD;
2569
2570         return STATUS_SUCCESS;
2571 }
2572
2573 static int reset_sd(struct rtsx_chip *chip)
2574 {
2575         struct sd_info *sd_card = &chip->sd_card;
2576         bool hi_cap_flow = false;
2577         int retval, i = 0, j = 0, k = 0;
2578         bool sd_dont_switch = false;
2579         bool support_1v8 = false;
2580         bool try_sdio = true;
2581         u8 rsp[16];
2582         u8 switch_bus_width;
2583         u32 voltage = 0;
2584         bool sd20_mode = false;
2585
2586         SET_SD(sd_card);
2587
2588 switch_fail:
2589
2590         i = 0;
2591         j = 0;
2592         k = 0;
2593         hi_cap_flow = false;
2594
2595 #ifdef SUPPORT_SD_LOCK
2596         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
2597                 goto SD_UNLOCK_ENTRY;
2598 #endif
2599
2600         retval = sd_prepare_reset(chip);
2601         if (retval != STATUS_SUCCESS)
2602                 goto status_fail;
2603
2604         retval = sd_dummy_clock(chip);
2605         if (retval != STATUS_SUCCESS)
2606                 goto status_fail;
2607
2608         if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) && try_sdio) {
2609                 int rty_cnt = 0;
2610
2611                 for (; rty_cnt < chip->sdio_retry_cnt; rty_cnt++) {
2612                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2613                                 sd_set_err_code(chip, SD_NO_CARD);
2614                                 goto status_fail;
2615                         }
2616
2617                         retval = sd_send_cmd_get_rsp(chip, IO_SEND_OP_COND, 0,
2618                                                      SD_RSP_TYPE_R4, rsp, 5);
2619                         if (retval == STATUS_SUCCESS) {
2620                                 int func_num = (rsp[1] >> 4) & 0x07;
2621
2622                                 if (func_num) {
2623                                         dev_dbg(rtsx_dev(chip), "SD_IO card (Function number: %d)!\n",
2624                                                 func_num);
2625                                         chip->sd_io = 1;
2626                                         goto status_fail;
2627                                 }
2628
2629                                 break;
2630                         }
2631
2632                         sd_init_power(chip);
2633
2634                         sd_dummy_clock(chip);
2635                 }
2636
2637                 dev_dbg(rtsx_dev(chip), "Normal card!\n");
2638         }
2639
2640         /* Start Initialization Process of SD Card */
2641 RTY_SD_RST:
2642         retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
2643                                      NULL, 0);
2644         if (retval != STATUS_SUCCESS)
2645                 goto status_fail;
2646
2647         wait_timeout(20);
2648
2649         retval = sd_send_cmd_get_rsp(chip, SEND_IF_COND, 0x000001AA,
2650                                      SD_RSP_TYPE_R7, rsp, 5);
2651         if (retval == STATUS_SUCCESS) {
2652                 if ((rsp[4] == 0xAA) && ((rsp[3] & 0x0f) == 0x01)) {
2653                         hi_cap_flow = true;
2654                         voltage = SUPPORT_VOLTAGE | 0x40000000;
2655                 }
2656         }
2657
2658         if (!hi_cap_flow) {
2659                 voltage = SUPPORT_VOLTAGE;
2660
2661                 retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0,
2662                                              SD_RSP_TYPE_R0, NULL, 0);
2663                 if (retval != STATUS_SUCCESS)
2664                         goto status_fail;
2665
2666                 wait_timeout(20);
2667         }
2668
2669         do {
2670                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, 0, SD_RSP_TYPE_R1,
2671                                              NULL, 0);
2672                 if (retval != STATUS_SUCCESS) {
2673                         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
2674                                 sd_set_err_code(chip, SD_NO_CARD);
2675                                 goto status_fail;
2676                         }
2677
2678                         j++;
2679                         if (j < 3)
2680                                 goto RTY_SD_RST;
2681                         else
2682                                 goto status_fail;
2683                 }
2684
2685                 retval = sd_send_cmd_get_rsp(chip, SD_APP_OP_COND, voltage,
2686                                              SD_RSP_TYPE_R3, rsp, 5);
2687                 if (retval != STATUS_SUCCESS) {
2688                         k++;
2689                         if (k < 3)
2690                                 goto RTY_SD_RST;
2691                         else
2692                                 goto status_fail;
2693                 }
2694
2695                 i++;
2696                 wait_timeout(20);
2697         } while (!(rsp[1] & 0x80) && (i < 255));
2698
2699         if (i == 255)
2700                 goto status_fail;
2701
2702         if (hi_cap_flow) {
2703                 if (rsp[1] & 0x40)
2704                         SET_SD_HCXC(sd_card);
2705                 else
2706                         CLR_SD_HCXC(sd_card);
2707
2708                 support_1v8 = false;
2709         } else {
2710                 CLR_SD_HCXC(sd_card);
2711                 support_1v8 = false;
2712         }
2713         dev_dbg(rtsx_dev(chip), "support_1v8 = %d\n", support_1v8);
2714
2715         if (support_1v8) {
2716                 retval = sd_voltage_switch(chip);
2717                 if (retval != STATUS_SUCCESS)
2718                         goto status_fail;
2719         }
2720
2721         retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
2722                                      NULL, 0);
2723         if (retval != STATUS_SUCCESS)
2724                 goto status_fail;
2725
2726         for (i = 0; i < 3; i++) {
2727                 retval = sd_send_cmd_get_rsp(chip, SEND_RELATIVE_ADDR, 0,
2728                                              SD_RSP_TYPE_R6, rsp, 5);
2729                 if (retval != STATUS_SUCCESS)
2730                         goto status_fail;
2731
2732                 sd_card->sd_addr = (u32)rsp[1] << 24;
2733                 sd_card->sd_addr += (u32)rsp[2] << 16;
2734
2735                 if (sd_card->sd_addr)
2736                         break;
2737         }
2738
2739         retval = sd_check_csd(chip, 1);
2740         if (retval != STATUS_SUCCESS)
2741                 goto status_fail;
2742
2743         retval = sd_select_card(chip, 1);
2744         if (retval != STATUS_SUCCESS)
2745                 goto status_fail;
2746
2747 #ifdef SUPPORT_SD_LOCK
2748 SD_UNLOCK_ENTRY:
2749         retval = sd_update_lock_status(chip);
2750         if (retval != STATUS_SUCCESS)
2751                 goto status_fail;
2752
2753         if (sd_card->sd_lock_status & SD_LOCKED) {
2754                 sd_card->sd_lock_status |= (SD_LOCK_1BIT_MODE | SD_PWD_EXIST);
2755                 return STATUS_SUCCESS;
2756         } else if (!(sd_card->sd_lock_status & SD_UNLOCK_POW_ON)) {
2757                 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
2758         }
2759 #endif
2760
2761         retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2762                                      SD_RSP_TYPE_R1, NULL, 0);
2763         if (retval != STATUS_SUCCESS)
2764                 goto status_fail;
2765
2766         retval = sd_send_cmd_get_rsp(chip, SET_CLR_CARD_DETECT, 0,
2767                                      SD_RSP_TYPE_R1, NULL, 0);
2768         if (retval != STATUS_SUCCESS)
2769                 goto status_fail;
2770
2771         if (support_1v8) {
2772                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2773                                              SD_RSP_TYPE_R1, NULL, 0);
2774                 if (retval != STATUS_SUCCESS)
2775                         goto status_fail;
2776
2777                 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
2778                                              SD_RSP_TYPE_R1, NULL, 0);
2779                 if (retval != STATUS_SUCCESS)
2780                         goto status_fail;
2781
2782                 switch_bus_width = SD_BUS_WIDTH_4;
2783         } else {
2784                 switch_bus_width = SD_BUS_WIDTH_1;
2785         }
2786
2787         retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
2788                                      NULL, 0);
2789         if (retval != STATUS_SUCCESS)
2790                 goto status_fail;
2791
2792         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
2793         if (retval != STATUS_SUCCESS)
2794                 goto status_fail;
2795
2796         if (!(sd_card->raw_csd[4] & 0x40))
2797                 sd_dont_switch = true;
2798
2799         if (!sd_dont_switch) {
2800                 if (sd20_mode) {
2801                         /* Set sd_switch_fail here, because we needn't
2802                          * switch to UHS mode
2803                          */
2804                         sd_card->sd_switch_fail = SDR104_SUPPORT_MASK |
2805                                 DDR50_SUPPORT_MASK | SDR50_SUPPORT_MASK;
2806                 }
2807
2808                 /* Check the card whether follow SD1.1 spec or higher */
2809                 retval = sd_check_spec(chip, switch_bus_width);
2810                 if (retval == STATUS_SUCCESS) {
2811                         retval = sd_switch_function(chip, switch_bus_width);
2812                         if (retval != STATUS_SUCCESS) {
2813                                 sd_init_power(chip);
2814                                 sd_dont_switch = true;
2815                                 try_sdio = false;
2816
2817                                 goto switch_fail;
2818                         }
2819                 } else {
2820                         if (support_1v8) {
2821                                 sd_init_power(chip);
2822                                 sd_dont_switch = true;
2823                                 try_sdio = false;
2824
2825                                 goto switch_fail;
2826                         }
2827                 }
2828         }
2829
2830         if (!support_1v8) {
2831                 retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
2832                                              SD_RSP_TYPE_R1, NULL, 0);
2833                 if (retval != STATUS_SUCCESS)
2834                         goto status_fail;
2835
2836                 retval = sd_send_cmd_get_rsp(chip, SET_BUS_WIDTH, 2,
2837                                              SD_RSP_TYPE_R1, NULL, 0);
2838                 if (retval != STATUS_SUCCESS)
2839                         goto status_fail;
2840         }
2841
2842 #ifdef SUPPORT_SD_LOCK
2843         sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
2844 #endif
2845
2846         if (!sd20_mode && CHK_SD30_SPEED(sd_card)) {
2847                 int read_lba0 = 1;
2848
2849                 retval = rtsx_write_register(chip, SD30_DRIVE_SEL, 0x07,
2850                                              chip->sd30_drive_sel_1v8);
2851                 if (retval) {
2852                         rtsx_trace(chip);
2853                         return retval;
2854                 }
2855
2856                 retval = sd_set_init_para(chip);
2857                 if (retval != STATUS_SUCCESS)
2858                         goto status_fail;
2859
2860                 if (CHK_SD_DDR50(sd_card))
2861                         retval = sd_ddr_tuning(chip);
2862                 else
2863                         retval = sd_sdr_tuning(chip);
2864
2865                 if (retval != STATUS_SUCCESS) {
2866                         if (sd20_mode) {
2867                                 goto status_fail;
2868                         } else {
2869                                 retval = sd_init_power(chip);
2870                                 if (retval != STATUS_SUCCESS)
2871                                         goto status_fail;
2872
2873                                 try_sdio = false;
2874                                 sd20_mode = true;
2875                                 goto switch_fail;
2876                         }
2877                 }
2878
2879                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
2880                                     SD_RSP_TYPE_R1, NULL, 0);
2881
2882                 if (CHK_SD_DDR50(sd_card)) {
2883                         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
2884                         if (retval != STATUS_SUCCESS)
2885                                 read_lba0 = 0;
2886                 }
2887
2888                 if (read_lba0) {
2889                         retval = sd_read_lba0(chip);
2890                         if (retval != STATUS_SUCCESS) {
2891                                 if (sd20_mode) {
2892                                         goto status_fail;
2893                                 } else {
2894                                         retval = sd_init_power(chip);
2895                                         if (retval != STATUS_SUCCESS)
2896                                                 goto status_fail;
2897
2898                                         try_sdio = false;
2899                                         sd20_mode = true;
2900                                         goto switch_fail;
2901                                 }
2902                         }
2903                 }
2904         }
2905
2906         retval = sd_check_wp_state(chip);
2907         if (retval != STATUS_SUCCESS)
2908                 goto status_fail;
2909
2910         chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
2911
2912 #ifdef SUPPORT_SD_LOCK
2913         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
2914                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
2915                                              0x02);
2916                 if (retval) {
2917                         rtsx_trace(chip);
2918                         return retval;
2919                 }
2920                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
2921                                              0x00);
2922                 if (retval) {
2923                         rtsx_trace(chip);
2924                         return retval;
2925                 }
2926         }
2927 #endif
2928
2929         return STATUS_SUCCESS;
2930
2931 status_fail:
2932         rtsx_trace(chip);
2933         return STATUS_FAIL;
2934 }
2935
2936 static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
2937 {
2938         struct sd_info *sd_card = &chip->sd_card;
2939         int retval;
2940         u8 buf[8] = {0}, bus_width, *ptr;
2941         u16 byte_cnt;
2942         int len;
2943
2944         retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL,
2945                                      0);
2946         if (retval != STATUS_SUCCESS) {
2947                 rtsx_trace(chip);
2948                 return SWITCH_FAIL;
2949         }
2950
2951         if (width == MMC_8BIT_BUS) {
2952                 buf[0] = 0x55;
2953                 buf[1] = 0xAA;
2954                 len = 8;
2955                 byte_cnt = 8;
2956                 bus_width = SD_BUS_WIDTH_8;
2957         } else {
2958                 buf[0] = 0x5A;
2959                 len = 4;
2960                 byte_cnt = 4;
2961                 bus_width = SD_BUS_WIDTH_4;
2962         }
2963
2964         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02);
2965         if (retval != STATUS_SUCCESS) {
2966                 rtsx_trace(chip);
2967                 return SWITCH_ERR;
2968         }
2969
2970         retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3, NULL, 0, byte_cnt, 1,
2971                                bus_width, buf, len, 100);
2972         if (retval != STATUS_SUCCESS) {
2973                 rtsx_clear_sd_error(chip);
2974                 rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
2975                 rtsx_trace(chip);
2976                 return SWITCH_ERR;
2977         }
2978
2979         retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
2980         if (retval != STATUS_SUCCESS) {
2981                 rtsx_trace(chip);
2982                 return SWITCH_ERR;
2983         }
2984
2985         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", BUSTEST_R);
2986
2987         rtsx_init_cmd(chip);
2988
2989         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | BUSTEST_R);
2990
2991         if (width == MMC_8BIT_BUS)
2992                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L,
2993                              0xFF, 0x08);
2994         else
2995                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L,
2996                              0xFF, 0x04);
2997
2998         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
2999         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
3000
3001         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, SD_CALCULATE_CRC7 |
3002                      SD_NO_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3003                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
3004         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
3005                      PINGPONG_BUFFER);
3006         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3007                      SD_TM_NORMAL_READ | SD_TRANSFER_START);
3008         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
3009                      SD_TRANSFER_END);
3010
3011         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2, 0, 0);
3012         if (width == MMC_8BIT_BUS)
3013                 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 1, 0, 0);
3014
3015         retval = rtsx_send_cmd(chip, SD_CARD, 100);
3016         if (retval < 0) {
3017                 rtsx_clear_sd_error(chip);
3018                 rtsx_trace(chip);
3019                 return SWITCH_ERR;
3020         }
3021
3022         ptr = rtsx_get_cmd_data(chip) + 1;
3023
3024         if (width == MMC_8BIT_BUS) {
3025                 dev_dbg(rtsx_dev(chip), "BUSTEST_R [8bits]: 0x%02x 0x%02x\n",
3026                         ptr[0], ptr[1]);
3027                 if ((ptr[0] == 0xAA) && (ptr[1] == 0x55)) {
3028                         u8 rsp[5];
3029                         u32 arg;
3030
3031                         if (CHK_MMC_DDR52(sd_card))
3032                                 arg = 0x03B70600;
3033                         else
3034                                 arg = 0x03B70200;
3035
3036                         retval = sd_send_cmd_get_rsp(chip, SWITCH, arg,
3037                                                      SD_RSP_TYPE_R1b, rsp, 5);
3038                         if ((retval == STATUS_SUCCESS) &&
3039                             !(rsp[4] & MMC_SWITCH_ERR))
3040                                 return SWITCH_SUCCESS;
3041                 }
3042         } else {
3043                 dev_dbg(rtsx_dev(chip), "BUSTEST_R [4bits]: 0x%02x\n", ptr[0]);
3044                 if (ptr[0] == 0xA5) {
3045                         u8 rsp[5];
3046                         u32 arg;
3047
3048                         if (CHK_MMC_DDR52(sd_card))
3049                                 arg = 0x03B70500;
3050                         else
3051                                 arg = 0x03B70100;
3052
3053                         retval = sd_send_cmd_get_rsp(chip, SWITCH, arg,
3054                                                      SD_RSP_TYPE_R1b, rsp, 5);
3055                         if ((retval == STATUS_SUCCESS) &&
3056                             !(rsp[4] & MMC_SWITCH_ERR))
3057                                 return SWITCH_SUCCESS;
3058                 }
3059         }
3060
3061         rtsx_trace(chip);
3062         return SWITCH_FAIL;
3063 }
3064
3065 static int mmc_switch_timing_bus(struct rtsx_chip *chip, bool switch_ddr)
3066 {
3067         struct sd_info *sd_card = &chip->sd_card;
3068         int retval;
3069         u8 *ptr, card_type, card_type_mask = 0;
3070
3071         CLR_MMC_HS(sd_card);
3072
3073         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", SEND_EXT_CSD);
3074
3075         rtsx_init_cmd(chip);
3076
3077         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
3078                      0x40 | SEND_EXT_CSD);
3079         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, 0);
3080         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, 0);
3081         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, 0);
3082         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, 0);
3083
3084         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0);
3085         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 2);
3086         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF, 1);
3087         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF, 0);
3088
3089         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3090                      SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | SD_NO_WAIT_BUSY_END |
3091                      SD_CHECK_CRC7 | SD_RSP_LEN_6);
3092         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
3093                      PINGPONG_BUFFER);
3094         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3095                      SD_TM_NORMAL_READ | SD_TRANSFER_START);
3096         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
3097                      SD_TRANSFER_END);
3098
3099         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 196, 0xFF, 0);
3100         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 212, 0xFF, 0);
3101         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 213, 0xFF, 0);
3102         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 214, 0xFF, 0);
3103         rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 215, 0xFF, 0);
3104
3105         retval = rtsx_send_cmd(chip, SD_CARD, 1000);
3106         if (retval < 0) {
3107                 if (retval == -ETIMEDOUT) {
3108                         rtsx_clear_sd_error(chip);
3109                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3110                                             SD_RSP_TYPE_R1, NULL, 0);
3111                 }
3112                 rtsx_trace(chip);
3113                 return STATUS_FAIL;
3114         }
3115
3116         ptr = rtsx_get_cmd_data(chip);
3117         if (ptr[0] & SD_TRANSFER_ERR) {
3118                 sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3119                                     SD_RSP_TYPE_R1, NULL, 0);
3120                 rtsx_trace(chip);
3121                 return STATUS_FAIL;
3122         }
3123
3124         if (CHK_MMC_SECTOR_MODE(sd_card)) {
3125                 sd_card->capacity = ((u32)ptr[5] << 24) | ((u32)ptr[4] << 16) |
3126                         ((u32)ptr[3] << 8) | ((u32)ptr[2]);
3127         }
3128
3129         card_type_mask = 0x03;
3130         card_type = ptr[1] & card_type_mask;
3131         if (card_type) {
3132                 u8 rsp[5];
3133
3134                 if (card_type & 0x04) {
3135                         if (switch_ddr)
3136                                 SET_MMC_DDR52(sd_card);
3137                         else
3138                                 SET_MMC_52M(sd_card);
3139                 } else if (card_type & 0x02) {
3140                         SET_MMC_52M(sd_card);
3141                 } else {
3142                         SET_MMC_26M(sd_card);
3143                 }
3144
3145                 retval = sd_send_cmd_get_rsp(chip, SWITCH, 0x03B90100,
3146                                              SD_RSP_TYPE_R1b, rsp, 5);
3147                 if ((retval != STATUS_SUCCESS) || (rsp[4] & MMC_SWITCH_ERR))
3148                         CLR_MMC_HS(sd_card);
3149         }
3150
3151         sd_choose_proper_clock(chip);
3152         retval = switch_clock(chip, sd_card->sd_clock);
3153         if (retval != STATUS_SUCCESS) {
3154                 rtsx_trace(chip);
3155                 return STATUS_FAIL;
3156         }
3157
3158         /* Test Bus Procedure */
3159         retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS);
3160         if (retval == SWITCH_SUCCESS) {
3161                 SET_MMC_8BIT(sd_card);
3162                 chip->card_bus_width[chip->card2lun[SD_CARD]] = 8;
3163 #ifdef SUPPORT_SD_LOCK
3164                 sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
3165 #endif
3166         } else if (retval == SWITCH_FAIL) {
3167                 retval = mmc_test_switch_bus(chip, MMC_4BIT_BUS);
3168                 if (retval == SWITCH_SUCCESS) {
3169                         SET_MMC_4BIT(sd_card);
3170                         chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
3171 #ifdef SUPPORT_SD_LOCK
3172                         sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
3173 #endif
3174                 } else if (retval == SWITCH_FAIL) {
3175                         CLR_MMC_8BIT(sd_card);
3176                         CLR_MMC_4BIT(sd_card);
3177                 } else {
3178                         rtsx_trace(chip);
3179                         return STATUS_FAIL;
3180                 }
3181         } else {
3182                 rtsx_trace(chip);
3183                 return STATUS_FAIL;
3184         }
3185
3186         return STATUS_SUCCESS;
3187 }
3188
3189 static int reset_mmc(struct rtsx_chip *chip)
3190 {
3191         struct sd_info *sd_card = &chip->sd_card;
3192         int retval, i = 0, j = 0, k = 0;
3193         bool switch_ddr = true;
3194         u8 rsp[16];
3195         u8 spec_ver = 0;
3196         u32 temp;
3197
3198 #ifdef SUPPORT_SD_LOCK
3199         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
3200                 goto MMC_UNLOCK_ENTRY;
3201 #endif
3202
3203 switch_fail:
3204         retval = sd_prepare_reset(chip);
3205         if (retval != STATUS_SUCCESS) {
3206                 rtsx_trace(chip);
3207                 return retval;
3208         }
3209
3210         SET_MMC(sd_card);
3211
3212 RTY_MMC_RST:
3213         retval = sd_send_cmd_get_rsp(chip, GO_IDLE_STATE, 0, SD_RSP_TYPE_R0,
3214                                      NULL, 0);
3215         if (retval != STATUS_SUCCESS) {
3216                 rtsx_trace(chip);
3217                 return STATUS_FAIL;
3218         }
3219
3220         do {
3221                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3222                         sd_set_err_code(chip, SD_NO_CARD);
3223                         rtsx_trace(chip);
3224                         return STATUS_FAIL;
3225                 }
3226
3227                 retval = sd_send_cmd_get_rsp(chip, SEND_OP_COND,
3228                                              (SUPPORT_VOLTAGE | 0x40000000),
3229                                              SD_RSP_TYPE_R3, rsp, 5);
3230                 if (retval != STATUS_SUCCESS) {
3231                         if (sd_check_err_code(chip, SD_BUSY) ||
3232                             sd_check_err_code(chip, SD_TO_ERR)) {
3233                                 k++;
3234                                 if (k < 20) {
3235                                         sd_clr_err_code(chip);
3236                                         goto RTY_MMC_RST;
3237                                 } else {
3238                                         rtsx_trace(chip);
3239                                         return STATUS_FAIL;
3240                                 }
3241                         } else {
3242                                 j++;
3243                                 if (j < 100) {
3244                                         sd_clr_err_code(chip);
3245                                         goto RTY_MMC_RST;
3246                                 } else {
3247                                         rtsx_trace(chip);
3248                                         return STATUS_FAIL;
3249                                 }
3250                         }
3251                 }
3252
3253                 wait_timeout(20);
3254                 i++;
3255         } while (!(rsp[1] & 0x80) && (i < 255));
3256
3257         if (i == 255) {
3258                 rtsx_trace(chip);
3259                 return STATUS_FAIL;
3260         }
3261
3262         if ((rsp[1] & 0x60) == 0x40)
3263                 SET_MMC_SECTOR_MODE(sd_card);
3264         else
3265                 CLR_MMC_SECTOR_MODE(sd_card);
3266
3267         retval = sd_send_cmd_get_rsp(chip, ALL_SEND_CID, 0, SD_RSP_TYPE_R2,
3268                                      NULL, 0);
3269         if (retval != STATUS_SUCCESS) {
3270                 rtsx_trace(chip);
3271                 return STATUS_FAIL;
3272         }
3273
3274         sd_card->sd_addr = 0x00100000;
3275         retval = sd_send_cmd_get_rsp(chip, SET_RELATIVE_ADDR, sd_card->sd_addr,
3276                                      SD_RSP_TYPE_R6, rsp, 5);
3277         if (retval != STATUS_SUCCESS) {
3278                 rtsx_trace(chip);
3279                 return STATUS_FAIL;
3280         }
3281
3282         retval = sd_check_csd(chip, 1);
3283         if (retval != STATUS_SUCCESS) {
3284                 rtsx_trace(chip);
3285                 return STATUS_FAIL;
3286         }
3287
3288         spec_ver = (sd_card->raw_csd[0] & 0x3C) >> 2;
3289
3290         retval = sd_select_card(chip, 1);
3291         if (retval != STATUS_SUCCESS) {
3292                 rtsx_trace(chip);
3293                 return STATUS_FAIL;
3294         }
3295
3296         retval = sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200, SD_RSP_TYPE_R1,
3297                                      NULL, 0);
3298         if (retval != STATUS_SUCCESS) {
3299                 rtsx_trace(chip);
3300                 return STATUS_FAIL;
3301         }
3302
3303 #ifdef SUPPORT_SD_LOCK
3304 MMC_UNLOCK_ENTRY:
3305         retval = sd_update_lock_status(chip);
3306         if (retval != STATUS_SUCCESS) {
3307                 rtsx_trace(chip);
3308                 return STATUS_FAIL;
3309         }
3310 #endif
3311
3312         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3313         if (retval != STATUS_SUCCESS) {
3314                 rtsx_trace(chip);
3315                 return STATUS_FAIL;
3316         }
3317
3318         chip->card_bus_width[chip->card2lun[SD_CARD]] = 1;
3319
3320         if (!sd_card->mmc_dont_switch_bus) {
3321                 if (spec_ver == 4) {
3322                         /* MMC 4.x Cards */
3323                         retval = mmc_switch_timing_bus(chip, switch_ddr);
3324                         if (retval != STATUS_SUCCESS) {
3325                                 retval = sd_init_power(chip);
3326                                 if (retval != STATUS_SUCCESS) {
3327                                         rtsx_trace(chip);
3328                                         return STATUS_FAIL;
3329                                 }
3330                                 sd_card->mmc_dont_switch_bus = 1;
3331                                 rtsx_trace(chip);
3332                                 goto switch_fail;
3333                         }
3334                 }
3335
3336                 if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) {
3337                         rtsx_trace(chip);
3338                         return STATUS_FAIL;
3339                 }
3340
3341                 if (switch_ddr && CHK_MMC_DDR52(sd_card)) {
3342                         retval = sd_set_init_para(chip);
3343                         if (retval != STATUS_SUCCESS) {
3344                                 rtsx_trace(chip);
3345                                 return STATUS_FAIL;
3346                         }
3347
3348                         retval = mmc_ddr_tuning(chip);
3349                         if (retval != STATUS_SUCCESS) {
3350                                 retval = sd_init_power(chip);
3351                                 if (retval != STATUS_SUCCESS) {
3352                                         rtsx_trace(chip);
3353                                         return STATUS_FAIL;
3354                                 }
3355
3356                                 switch_ddr = false;
3357                                 rtsx_trace(chip);
3358                                 goto switch_fail;
3359                         }
3360
3361                         retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
3362                         if (retval == STATUS_SUCCESS) {
3363                                 retval = sd_read_lba0(chip);
3364                                 if (retval != STATUS_SUCCESS) {
3365                                         retval = sd_init_power(chip);
3366                                         if (retval != STATUS_SUCCESS) {
3367                                                 rtsx_trace(chip);
3368                                                 return STATUS_FAIL;
3369                                         }
3370
3371                                         switch_ddr = false;
3372                                         rtsx_trace(chip);
3373                                         goto switch_fail;
3374                                 }
3375                         }
3376                 }
3377         }
3378
3379 #ifdef SUPPORT_SD_LOCK
3380         if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON) {
3381                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_H, 0xFF,
3382                                              0x02);
3383                 if (retval) {
3384                         rtsx_trace(chip);
3385                         return retval;
3386                 }
3387                 retval = rtsx_write_register(chip, REG_SD_BLOCK_CNT_L, 0xFF,
3388                                              0x00);
3389                 if (retval) {
3390                         rtsx_trace(chip);
3391                         return retval;
3392                 }
3393         }
3394 #endif
3395
3396         temp = rtsx_readl(chip, RTSX_BIPR);
3397         if (temp & SD_WRITE_PROTECT)
3398                 chip->card_wp |= SD_CARD;
3399
3400         return STATUS_SUCCESS;
3401 }
3402
3403 int reset_sd_card(struct rtsx_chip *chip)
3404 {
3405         struct sd_info *sd_card = &chip->sd_card;
3406         int retval;
3407
3408         sd_init_reg_addr(chip);
3409
3410         memset(sd_card, 0, sizeof(struct sd_info));
3411         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3412
3413         retval = enable_card_clock(chip, SD_CARD);
3414         if (retval != STATUS_SUCCESS) {
3415                 rtsx_trace(chip);
3416                 return STATUS_FAIL;
3417         }
3418
3419         if (chip->ignore_sd && CHK_SDIO_EXIST(chip) &&
3420             !CHK_SDIO_IGNORED(chip)) {
3421                 if (chip->asic_code) {
3422                         retval = sd_pull_ctl_enable(chip);
3423                         if (retval != STATUS_SUCCESS) {
3424                                 rtsx_trace(chip);
3425                                 return STATUS_FAIL;
3426                         }
3427                 } else {
3428                         retval = rtsx_write_register(chip, FPGA_PULL_CTL,
3429                                                      FPGA_SD_PULL_CTL_BIT |
3430                                                      0x20, 0);
3431                         if (retval != STATUS_SUCCESS) {
3432                                 rtsx_trace(chip);
3433                                 return STATUS_FAIL;
3434                         }
3435                 }
3436                 retval = card_share_mode(chip, SD_CARD);
3437                 if (retval != STATUS_SUCCESS) {
3438                         rtsx_trace(chip);
3439                         return STATUS_FAIL;
3440                 }
3441
3442                 chip->sd_io = 1;
3443                 rtsx_trace(chip);
3444                 return STATUS_FAIL;
3445         }
3446
3447         retval = sd_init_power(chip);
3448         if (retval != STATUS_SUCCESS) {
3449                 rtsx_trace(chip);
3450                 return STATUS_FAIL;
3451         }
3452
3453         if (chip->sd_ctl & RESET_MMC_FIRST) {
3454                 retval = reset_mmc(chip);
3455                 if (retval != STATUS_SUCCESS) {
3456                         if (sd_check_err_code(chip, SD_NO_CARD)) {
3457                                 rtsx_trace(chip);
3458                                 return STATUS_FAIL;
3459                         }
3460
3461                         retval = reset_sd(chip);
3462                         if (retval != STATUS_SUCCESS) {
3463                                 rtsx_trace(chip);
3464                                 return STATUS_FAIL;
3465                         }
3466                 }
3467         } else {
3468                 retval = reset_sd(chip);
3469                 if (retval != STATUS_SUCCESS) {
3470                         if (sd_check_err_code(chip, SD_NO_CARD)) {
3471                                 rtsx_trace(chip);
3472                                 return STATUS_FAIL;
3473                         }
3474
3475                         if (chip->sd_io) {
3476                                 rtsx_trace(chip);
3477                                 return STATUS_FAIL;
3478                         }
3479                         retval = reset_mmc(chip);
3480                         if (retval != STATUS_SUCCESS) {
3481                                 rtsx_trace(chip);
3482                                 return STATUS_FAIL;
3483                         }
3484                 }
3485         }
3486
3487         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3488         if (retval != STATUS_SUCCESS) {
3489                 rtsx_trace(chip);
3490                 return STATUS_FAIL;
3491         }
3492
3493         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3494         if (retval) {
3495                 rtsx_trace(chip);
3496                 return retval;
3497         }
3498         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3499         if (retval) {
3500                 rtsx_trace(chip);
3501                 return retval;
3502         }
3503
3504         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3505
3506         retval = sd_set_init_para(chip);
3507         if (retval != STATUS_SUCCESS) {
3508                 rtsx_trace(chip);
3509                 return STATUS_FAIL;
3510         }
3511
3512         dev_dbg(rtsx_dev(chip), "sd_card->sd_type = 0x%x\n", sd_card->sd_type);
3513
3514         return STATUS_SUCCESS;
3515 }
3516
3517 static int reset_mmc_only(struct rtsx_chip *chip)
3518 {
3519         struct sd_info *sd_card = &chip->sd_card;
3520         int retval;
3521
3522         sd_card->sd_type = 0;
3523         sd_card->seq_mode = 0;
3524         sd_card->sd_data_buf_ready = 0;
3525         sd_card->capacity = 0;
3526         sd_card->sd_switch_fail = 0;
3527
3528 #ifdef SUPPORT_SD_LOCK
3529         sd_card->sd_lock_status = 0;
3530         sd_card->sd_erase_status = 0;
3531 #endif
3532
3533         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity = 0;
3534
3535         retval = enable_card_clock(chip, SD_CARD);
3536         if (retval != STATUS_SUCCESS) {
3537                 rtsx_trace(chip);
3538                 return STATUS_FAIL;
3539         }
3540
3541         retval = sd_init_power(chip);
3542         if (retval != STATUS_SUCCESS) {
3543                 rtsx_trace(chip);
3544                 return STATUS_FAIL;
3545         }
3546
3547         retval = reset_mmc(chip);
3548         if (retval != STATUS_SUCCESS) {
3549                 rtsx_trace(chip);
3550                 return STATUS_FAIL;
3551         }
3552
3553         retval = sd_set_clock_divider(chip, SD_CLK_DIVIDE_0);
3554         if (retval != STATUS_SUCCESS) {
3555                 rtsx_trace(chip);
3556                 return STATUS_FAIL;
3557         }
3558
3559         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_L, 0xFF, 0);
3560         if (retval) {
3561                 rtsx_trace(chip);
3562                 return retval;
3563         }
3564         retval = rtsx_write_register(chip, REG_SD_BYTE_CNT_H, 0xFF, 2);
3565         if (retval) {
3566                 rtsx_trace(chip);
3567                 return retval;
3568         }
3569
3570         chip->capacity[chip->card2lun[SD_CARD]] = sd_card->capacity;
3571
3572         retval = sd_set_init_para(chip);
3573         if (retval != STATUS_SUCCESS) {
3574                 rtsx_trace(chip);
3575                 return STATUS_FAIL;
3576         }
3577
3578         dev_dbg(rtsx_dev(chip), "In %s, sd_card->sd_type = 0x%x\n",
3579                 __func__, sd_card->sd_type);
3580
3581         return STATUS_SUCCESS;
3582 }
3583
3584 #define WAIT_DATA_READY_RTY_CNT         255
3585
3586 static int wait_data_buf_ready(struct rtsx_chip *chip)
3587 {
3588         struct sd_info *sd_card = &chip->sd_card;
3589         int i, retval;
3590
3591         for (i = 0; i < WAIT_DATA_READY_RTY_CNT; i++) {
3592                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3593                         sd_set_err_code(chip, SD_NO_CARD);
3594                         rtsx_trace(chip);
3595                         return STATUS_FAIL;
3596                 }
3597
3598                 sd_card->sd_data_buf_ready = 0;
3599
3600                 retval = sd_send_cmd_get_rsp(chip, SEND_STATUS,
3601                                              sd_card->sd_addr, SD_RSP_TYPE_R1,
3602                                              NULL, 0);
3603                 if (retval != STATUS_SUCCESS) {
3604                         rtsx_trace(chip);
3605                         return STATUS_FAIL;
3606                 }
3607
3608                 if (sd_card->sd_data_buf_ready) {
3609                         return sd_send_cmd_get_rsp(chip, SEND_STATUS,
3610                                 sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0);
3611                 }
3612         }
3613
3614         sd_set_err_code(chip, SD_TO_ERR);
3615
3616         rtsx_trace(chip);
3617         return STATUS_FAIL;
3618 }
3619
3620 void sd_stop_seq_mode(struct rtsx_chip *chip)
3621 {
3622         struct sd_info *sd_card = &chip->sd_card;
3623         int retval;
3624
3625         if (sd_card->seq_mode) {
3626                 retval = sd_switch_clock(chip);
3627                 if (retval != STATUS_SUCCESS)
3628                         return;
3629
3630                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3631                                              SD_RSP_TYPE_R1b, NULL, 0);
3632                 if (retval != STATUS_SUCCESS)
3633                         sd_set_err_code(chip, SD_STS_ERR);
3634
3635                 retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
3636                 if (retval != STATUS_SUCCESS)
3637                         sd_set_err_code(chip, SD_STS_ERR);
3638
3639                 sd_card->seq_mode = 0;
3640
3641                 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3642         }
3643 }
3644
3645 static inline int sd_auto_tune_clock(struct rtsx_chip *chip)
3646 {
3647         struct sd_info *sd_card = &chip->sd_card;
3648         int retval;
3649
3650         if (chip->asic_code) {
3651                 if (sd_card->sd_clock > 30)
3652                         sd_card->sd_clock -= 20;
3653         } else {
3654                 switch (sd_card->sd_clock) {
3655                 case CLK_200:
3656                         sd_card->sd_clock = CLK_150;
3657                         break;
3658
3659                 case CLK_150:
3660                         sd_card->sd_clock = CLK_120;
3661                         break;
3662
3663                 case CLK_120:
3664                         sd_card->sd_clock = CLK_100;
3665                         break;
3666
3667                 case CLK_100:
3668                         sd_card->sd_clock = CLK_80;
3669                         break;
3670
3671                 case CLK_80:
3672                         sd_card->sd_clock = CLK_60;
3673                         break;
3674
3675                 case CLK_60:
3676                         sd_card->sd_clock = CLK_50;
3677                         break;
3678
3679                 default:
3680                         break;
3681                 }
3682         }
3683
3684         retval = sd_switch_clock(chip);
3685         if (retval != STATUS_SUCCESS) {
3686                 rtsx_trace(chip);
3687                 return STATUS_FAIL;
3688         }
3689
3690         return STATUS_SUCCESS;
3691 }
3692
3693 int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, u32 start_sector,
3694           u16 sector_cnt)
3695 {
3696         struct sd_info *sd_card = &chip->sd_card;
3697         u32 data_addr;
3698         u8 cfg2;
3699         int retval;
3700
3701         if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3702                 dev_dbg(rtsx_dev(chip), "%s: Read %d %s from 0x%x\n", __func__,
3703                         sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
3704                         start_sector);
3705         } else {
3706                 dev_dbg(rtsx_dev(chip), "%s: Write %d %s to 0x%x\n", __func__,
3707                         sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
3708                         start_sector);
3709         }
3710
3711         sd_card->cleanup_counter = 0;
3712
3713         if (!(chip->card_ready & SD_CARD)) {
3714                 sd_card->seq_mode = 0;
3715
3716                 retval = reset_sd_card(chip);
3717                 if (retval == STATUS_SUCCESS) {
3718                         chip->card_ready |= SD_CARD;
3719                         chip->card_fail &= ~SD_CARD;
3720                 } else {
3721                         chip->card_ready &= ~SD_CARD;
3722                         chip->card_fail |= SD_CARD;
3723                         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3724                         chip->rw_need_retry = 1;
3725                         rtsx_trace(chip);
3726                         return STATUS_FAIL;
3727                 }
3728         }
3729
3730         if (!CHK_SD_HCXC(sd_card) && !CHK_MMC_SECTOR_MODE(sd_card))
3731                 data_addr = start_sector << 9;
3732         else
3733                 data_addr = start_sector;
3734
3735         sd_clr_err_code(chip);
3736
3737         retval = sd_switch_clock(chip);
3738         if (retval != STATUS_SUCCESS) {
3739                 sd_set_err_code(chip, SD_IO_ERR);
3740                 rtsx_trace(chip);
3741                 goto RW_FAIL;
3742         }
3743
3744         if (sd_card->seq_mode &&
3745             ((sd_card->pre_dir != srb->sc_data_direction) ||
3746             ((sd_card->pre_sec_addr + sd_card->pre_sec_cnt) !=
3747             start_sector))) {
3748                 if ((sd_card->pre_sec_cnt < 0x80) &&
3749                     (sd_card->pre_dir == DMA_FROM_DEVICE) &&
3750                     !CHK_SD30_SPEED(sd_card) &&
3751                     !CHK_SD_HS(sd_card) &&
3752                     !CHK_MMC_HS(sd_card)) {
3753                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3754                                             SD_RSP_TYPE_R1, NULL, 0);
3755                 }
3756
3757                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3758                                              SD_RSP_TYPE_R1b, NULL, 0);
3759                 if (retval != STATUS_SUCCESS) {
3760                         chip->rw_need_retry = 1;
3761                         sd_set_err_code(chip, SD_STS_ERR);
3762                         rtsx_trace(chip);
3763                         goto RW_FAIL;
3764                 }
3765
3766                 sd_card->seq_mode = 0;
3767
3768                 retval = rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3769                 if (retval != STATUS_SUCCESS) {
3770                         sd_set_err_code(chip, SD_IO_ERR);
3771                         rtsx_trace(chip);
3772                         goto RW_FAIL;
3773                 }
3774
3775                 if ((sd_card->pre_sec_cnt < 0x80) &&
3776                     !CHK_SD30_SPEED(sd_card) &&
3777                     !CHK_SD_HS(sd_card) &&
3778                     !CHK_MMC_HS(sd_card)) {
3779                         sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr,
3780                                             SD_RSP_TYPE_R1, NULL, 0);
3781                 }
3782         }
3783
3784         rtsx_init_cmd(chip);
3785
3786         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF, 0x00);
3787         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF, 0x02);
3788         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
3789                      (u8)sector_cnt);
3790         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
3791                      (u8)(sector_cnt >> 8));
3792
3793         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
3794
3795         if (CHK_MMC_8BIT(sd_card))
3796                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3797                              0x03, SD_BUS_WIDTH_8);
3798         else if (CHK_MMC_4BIT(sd_card) || CHK_SD(sd_card))
3799                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3800                              0x03, SD_BUS_WIDTH_4);
3801         else
3802                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1,
3803                              0x03, SD_BUS_WIDTH_1);
3804
3805         if (sd_card->seq_mode) {
3806                 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3807                         SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 |
3808                         SD_RSP_LEN_0;
3809                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, cfg2);
3810
3811                 trans_dma_enable(srb->sc_data_direction, chip, sector_cnt * 512,
3812                                  DMA_512);
3813
3814                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3815                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3816                                      SD_TM_AUTO_READ_3 | SD_TRANSFER_START);
3817                 } else {
3818                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3819                                      SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3820                 }
3821
3822                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3823                              SD_TRANSFER_END, SD_TRANSFER_END);
3824
3825                 rtsx_send_cmd_no_wait(chip);
3826         } else {
3827                 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3828                         dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n",
3829                                 READ_MULTIPLE_BLOCK);
3830                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
3831                                      0x40 | READ_MULTIPLE_BLOCK);
3832                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF,
3833                                      (u8)(data_addr >> 24));
3834                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF,
3835                                      (u8)(data_addr >> 16));
3836                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF,
3837                                      (u8)(data_addr >> 8));
3838                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF,
3839                                      (u8)data_addr);
3840
3841                         cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3842                                 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 |
3843                                 SD_RSP_LEN_6;
3844                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3845                                      cfg2);
3846
3847                         trans_dma_enable(srb->sc_data_direction, chip,
3848                                          sector_cnt * 512, DMA_512);
3849
3850                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3851                                      SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
3852                         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3853                                      SD_TRANSFER_END, SD_TRANSFER_END);
3854
3855                         rtsx_send_cmd_no_wait(chip);
3856                 } else {
3857                         retval = rtsx_send_cmd(chip, SD_CARD, 50);
3858                         if (retval < 0) {
3859                                 rtsx_clear_sd_error(chip);
3860
3861                                 chip->rw_need_retry = 1;
3862                                 sd_set_err_code(chip, SD_TO_ERR);
3863                                 rtsx_trace(chip);
3864                                 goto RW_FAIL;
3865                         }
3866
3867                         retval = wait_data_buf_ready(chip);
3868                         if (retval != STATUS_SUCCESS) {
3869                                 chip->rw_need_retry = 1;
3870                                 sd_set_err_code(chip, SD_TO_ERR);
3871                                 rtsx_trace(chip);
3872                                 goto RW_FAIL;
3873                         }
3874
3875                         retval = sd_send_cmd_get_rsp(chip, WRITE_MULTIPLE_BLOCK,
3876                                                      data_addr, SD_RSP_TYPE_R1,
3877                                                      NULL, 0);
3878                         if (retval != STATUS_SUCCESS) {
3879                                 chip->rw_need_retry = 1;
3880                                 rtsx_trace(chip);
3881                                 goto RW_FAIL;
3882                         }
3883
3884                         rtsx_init_cmd(chip);
3885
3886                         cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
3887                                 SD_NO_WAIT_BUSY_END |
3888                                 SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
3889                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF,
3890                                      cfg2);
3891
3892                         trans_dma_enable(srb->sc_data_direction, chip,
3893                                          sector_cnt * 512, DMA_512);
3894
3895                         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
3896                                      SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
3897                         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
3898                                      SD_TRANSFER_END, SD_TRANSFER_END);
3899
3900                         rtsx_send_cmd_no_wait(chip);
3901                 }
3902
3903                 sd_card->seq_mode = 1;
3904         }
3905
3906         retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
3907                                     scsi_bufflen(srb), scsi_sg_count(srb),
3908                                 srb->sc_data_direction, chip->sd_timeout);
3909         if (retval < 0) {
3910                 u8 stat = 0;
3911                 int err;
3912
3913                 sd_card->seq_mode = 0;
3914
3915                 if (retval == -ETIMEDOUT)
3916                         err = STATUS_TIMEDOUT;
3917                 else
3918                         err = STATUS_FAIL;
3919
3920                 rtsx_read_register(chip, REG_SD_STAT1, &stat);
3921                 rtsx_clear_sd_error(chip);
3922                 if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3923                         chip->rw_need_retry = 0;
3924                         dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
3925                                 __func__);
3926                         rtsx_trace(chip);
3927                         return STATUS_FAIL;
3928                 }
3929
3930                 chip->rw_need_retry = 1;
3931
3932                 retval = sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
3933                                              SD_RSP_TYPE_R1b, NULL, 0);
3934                 if (retval != STATUS_SUCCESS) {
3935                         sd_set_err_code(chip, SD_STS_ERR);
3936                         rtsx_trace(chip);
3937                         goto RW_FAIL;
3938                 }
3939
3940                 if (stat & (SD_CRC7_ERR | SD_CRC16_ERR | SD_CRC_WRITE_ERR)) {
3941                         dev_dbg(rtsx_dev(chip), "SD CRC error, tune clock!\n");
3942                         sd_set_err_code(chip, SD_CRC_ERR);
3943                         rtsx_trace(chip);
3944                         goto RW_FAIL;
3945                 }
3946
3947                 if (err == STATUS_TIMEDOUT) {
3948                         sd_set_err_code(chip, SD_TO_ERR);
3949                         rtsx_trace(chip);
3950                         goto RW_FAIL;
3951                 }
3952
3953                 rtsx_trace(chip);
3954                 return err;
3955         }
3956
3957         sd_card->pre_sec_addr = start_sector;
3958         sd_card->pre_sec_cnt = sector_cnt;
3959         sd_card->pre_dir = srb->sc_data_direction;
3960
3961         return STATUS_SUCCESS;
3962
3963 RW_FAIL:
3964         sd_card->seq_mode = 0;
3965
3966         if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
3967                 chip->rw_need_retry = 0;
3968                 dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n", __func__);
3969                 rtsx_trace(chip);
3970                 return STATUS_FAIL;
3971         }
3972
3973         if (sd_check_err_code(chip, SD_CRC_ERR)) {
3974                 if (CHK_MMC_4BIT(sd_card) || CHK_MMC_8BIT(sd_card)) {
3975                         sd_card->mmc_dont_switch_bus = 1;
3976                         reset_mmc_only(chip);
3977                         sd_card->mmc_dont_switch_bus = 0;
3978                 } else {
3979                         sd_card->need_retune = 1;
3980                         sd_auto_tune_clock(chip);
3981                 }
3982         } else if (sd_check_err_code(chip, SD_TO_ERR | SD_STS_ERR)) {
3983                 retval = reset_sd_card(chip);
3984                 if (retval != STATUS_SUCCESS) {
3985                         chip->card_ready &= ~SD_CARD;
3986                         chip->card_fail |= SD_CARD;
3987                         chip->capacity[chip->card2lun[SD_CARD]] = 0;
3988                 }
3989         }
3990
3991         rtsx_trace(chip);
3992         return STATUS_FAIL;
3993 }
3994
3995 #ifdef SUPPORT_CPRM
3996 int soft_reset_sd_card(struct rtsx_chip *chip)
3997 {
3998         return reset_sd(chip);
3999 }
4000
4001 int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx, u32 arg,
4002                             u8 rsp_type, u8 *rsp, int rsp_len,
4003                             bool special_check)
4004 {
4005         int retval;
4006         int timeout = 100;
4007         u16 reg_addr;
4008         u8 *ptr;
4009         int stat_idx = 0;
4010         int rty_cnt = 0;
4011
4012         dev_dbg(rtsx_dev(chip), "EXT SD/MMC CMD %d\n", cmd_idx);
4013
4014         if (rsp_type == SD_RSP_TYPE_R1b)
4015                 timeout = 3000;
4016
4017 RTY_SEND_CMD:
4018
4019         rtsx_init_cmd(chip);
4020
4021         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF, 0x40 | cmd_idx);
4022         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF, (u8)(arg >> 24));
4023         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF, (u8)(arg >> 16));
4024         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF, (u8)(arg >> 8));
4025         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF, (u8)arg);
4026
4027         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
4028         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4029                      0x01, PINGPONG_BUFFER);
4030         rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
4031                      0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
4032         rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER, SD_TRANSFER_END,
4033                      SD_TRANSFER_END);
4034
4035         if (rsp_type == SD_RSP_TYPE_R2) {
4036                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
4037                      reg_addr++)
4038                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
4039
4040                 stat_idx = 17;
4041         } else if (rsp_type != SD_RSP_TYPE_R0) {
4042                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
4043                      reg_addr++)
4044                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
4045
4046                 stat_idx = 6;
4047         }
4048         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0, 0);
4049
4050         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_STAT1, 0, 0);
4051
4052         retval = rtsx_send_cmd(chip, SD_CARD, timeout);
4053         if (retval < 0) {
4054                 if (retval == -ETIMEDOUT) {
4055                         rtsx_clear_sd_error(chip);
4056
4057                         if (rsp_type & SD_WAIT_BUSY_END) {
4058                                 retval = sd_check_data0_status(chip);
4059                                 if (retval != STATUS_SUCCESS) {
4060                                         rtsx_trace(chip);
4061                                         return retval;
4062                                 }
4063                         } else {
4064                                 sd_set_err_code(chip, SD_TO_ERR);
4065                         }
4066                 }
4067                 rtsx_trace(chip);
4068                 return STATUS_FAIL;
4069         }
4070
4071         if (rsp_type == SD_RSP_TYPE_R0)
4072                 return STATUS_SUCCESS;
4073
4074         ptr = rtsx_get_cmd_data(chip) + 1;
4075
4076         if ((ptr[0] & 0xC0) != 0) {
4077                 sd_set_err_code(chip, SD_STS_ERR);
4078                 rtsx_trace(chip);
4079                 return STATUS_FAIL;
4080         }
4081
4082         if (!(rsp_type & SD_NO_CHECK_CRC7)) {
4083                 if (ptr[stat_idx] & SD_CRC7_ERR) {
4084                         if (cmd_idx == WRITE_MULTIPLE_BLOCK) {
4085                                 sd_set_err_code(chip, SD_CRC_ERR);
4086                                 rtsx_trace(chip);
4087                                 return STATUS_FAIL;
4088                         }
4089                         if (rty_cnt < SD_MAX_RETRY_COUNT) {
4090                                 wait_timeout(20);
4091                                 rty_cnt++;
4092                                 goto RTY_SEND_CMD;
4093                         } else {
4094                                 sd_set_err_code(chip, SD_CRC_ERR);
4095                                 rtsx_trace(chip);
4096                                 return STATUS_FAIL;
4097                         }
4098                 }
4099         }
4100
4101         if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) ||
4102             (cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) {
4103                 if ((cmd_idx != STOP_TRANSMISSION) && !special_check) {
4104                         if (ptr[1] & 0x80) {
4105                                 rtsx_trace(chip);
4106                                 return STATUS_FAIL;
4107                         }
4108                 }
4109 #ifdef SUPPORT_SD_LOCK
4110                 if (ptr[1] & 0x7D) {
4111 #else
4112                 if (ptr[1] & 0x7F) {
4113 #endif
4114                         rtsx_trace(chip);
4115                         return STATUS_FAIL;
4116                 }
4117                 if (ptr[2] & 0xF8) {
4118                         rtsx_trace(chip);
4119                         return STATUS_FAIL;
4120                 }
4121
4122                 if (cmd_idx == SELECT_CARD) {
4123                         if (rsp_type == SD_RSP_TYPE_R2) {
4124                                 if ((ptr[3] & 0x1E) != 0x04) {
4125                                         rtsx_trace(chip);
4126                                         return STATUS_FAIL;
4127                                 }
4128                         }
4129                 }
4130         }
4131
4132         if (rsp && rsp_len)
4133                 memcpy(rsp, ptr, rsp_len);
4134
4135         return STATUS_SUCCESS;
4136 }
4137
4138 int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type)
4139 {
4140         int retval, rsp_len;
4141         u16 reg_addr;
4142
4143         if (rsp_type == SD_RSP_TYPE_R0)
4144                 return STATUS_SUCCESS;
4145
4146         rtsx_init_cmd(chip);
4147
4148         if (rsp_type == SD_RSP_TYPE_R2) {
4149                 for (reg_addr = PPBUF_BASE2; reg_addr < PPBUF_BASE2 + 16;
4150                      reg_addr++)
4151                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
4152
4153                 rsp_len = 17;
4154         } else if (rsp_type != SD_RSP_TYPE_R0) {
4155                 for (reg_addr = REG_SD_CMD0; reg_addr <= REG_SD_CMD4;
4156                      reg_addr++)
4157                         rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0xFF, 0);
4158
4159                 rsp_len = 6;
4160         }
4161         rtsx_add_cmd(chip, READ_REG_CMD, REG_SD_CMD5, 0xFF, 0);
4162
4163         retval = rtsx_send_cmd(chip, SD_CARD, 100);
4164         if (retval != STATUS_SUCCESS) {
4165                 rtsx_trace(chip);
4166                 return STATUS_FAIL;
4167         }
4168
4169         if (rsp) {
4170                 int min_len = (rsp_len < len) ? rsp_len : len;
4171
4172                 memcpy(rsp, rtsx_get_cmd_data(chip), min_len);
4173
4174                 dev_dbg(rtsx_dev(chip), "min_len = %d\n", min_len);
4175                 dev_dbg(rtsx_dev(chip), "Response in cmd buf: 0x%x 0x%x 0x%x 0x%x\n",
4176                         rsp[0], rsp[1], rsp[2], rsp[3]);
4177         }
4178
4179         return STATUS_SUCCESS;
4180 }
4181
4182 int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4183 {
4184         struct sd_info *sd_card = &chip->sd_card;
4185         unsigned int lun = SCSI_LUN(srb);
4186         int len;
4187         u8 buf[18] = {
4188                 0x00,
4189                 0x00,
4190                 0x00,
4191                 0x0E,
4192                 0x00,
4193                 0x00,
4194                 0x00,
4195                 0x00,
4196                 0x53,
4197                 0x44,
4198                 0x20,
4199                 0x43,
4200                 0x61,
4201                 0x72,
4202                 0x64,
4203                 0x00,
4204                 0x00,
4205                 0x00,
4206         };
4207
4208         sd_card->pre_cmd_err = 0;
4209
4210         if (!(CHK_BIT(chip->lun_mc, lun))) {
4211                 SET_BIT(chip->lun_mc, lun);
4212                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4213                 rtsx_trace(chip);
4214                 return TRANSPORT_FAILED;
4215         }
4216
4217         if ((srb->cmnd[2] != 0x53) || (srb->cmnd[3] != 0x44) ||
4218             (srb->cmnd[4] != 0x20) || (srb->cmnd[5] != 0x43) ||
4219             (srb->cmnd[6] != 0x61) || (srb->cmnd[7] != 0x72) ||
4220             (srb->cmnd[8] != 0x64)) {
4221                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4222                 rtsx_trace(chip);
4223                 return TRANSPORT_FAILED;
4224         }
4225
4226         switch (srb->cmnd[1] & 0x0F) {
4227         case 0:
4228                 sd_card->sd_pass_thru_en = 0;
4229                 break;
4230
4231         case 1:
4232                 sd_card->sd_pass_thru_en = 1;
4233                 break;
4234
4235         default:
4236                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4237                 rtsx_trace(chip);
4238                 return TRANSPORT_FAILED;
4239         }
4240
4241         buf[5] = (CHK_SD(sd_card) == 1) ? 0x01 : 0x02;
4242         if (chip->card_wp & SD_CARD)
4243                 buf[5] |= 0x80;
4244
4245         buf[6] = (u8)(sd_card->sd_addr >> 16);
4246         buf[7] = (u8)(sd_card->sd_addr >> 24);
4247
4248         buf[15] = chip->max_lun;
4249
4250         len = min_t(int, 18, scsi_bufflen(srb));
4251         rtsx_stor_set_xfer_buf(buf, len, srb);
4252
4253         return TRANSPORT_GOOD;
4254 }
4255
4256 static inline int get_rsp_type(struct scsi_cmnd *srb, u8 *rsp_type,
4257                                int *rsp_len)
4258 {
4259         if (!rsp_type || !rsp_len)
4260                 return STATUS_FAIL;
4261
4262         switch (srb->cmnd[10]) {
4263         case 0x03:
4264                 *rsp_type = SD_RSP_TYPE_R0;
4265                 *rsp_len = 0;
4266                 break;
4267
4268         case 0x04:
4269                 *rsp_type = SD_RSP_TYPE_R1;
4270                 *rsp_len = 6;
4271                 break;
4272
4273         case 0x05:
4274                 *rsp_type = SD_RSP_TYPE_R1b;
4275                 *rsp_len = 6;
4276                 break;
4277
4278         case 0x06:
4279                 *rsp_type = SD_RSP_TYPE_R2;
4280                 *rsp_len = 17;
4281                 break;
4282
4283         case 0x07:
4284                 *rsp_type = SD_RSP_TYPE_R3;
4285                 *rsp_len = 6;
4286                 break;
4287
4288         default:
4289                 return STATUS_FAIL;
4290         }
4291
4292         return STATUS_SUCCESS;
4293 }
4294
4295 int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4296 {
4297         struct sd_info *sd_card = &chip->sd_card;
4298         unsigned int lun = SCSI_LUN(srb);
4299         int retval, rsp_len;
4300         u8 cmd_idx, rsp_type;
4301         bool standby = false, acmd = false;
4302         u32 arg;
4303
4304         if (!sd_card->sd_pass_thru_en) {
4305                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4306                 rtsx_trace(chip);
4307                 return TRANSPORT_FAILED;
4308         }
4309
4310         retval = sd_switch_clock(chip);
4311         if (retval != STATUS_SUCCESS) {
4312                 rtsx_trace(chip);
4313                 return TRANSPORT_FAILED;
4314         }
4315
4316         if (sd_card->pre_cmd_err) {
4317                 sd_card->pre_cmd_err = 0;
4318                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4319                 rtsx_trace(chip);
4320                 return TRANSPORT_FAILED;
4321         }
4322
4323         cmd_idx = srb->cmnd[2] & 0x3F;
4324         if (srb->cmnd[1] & 0x02)
4325                 standby = true;
4326
4327         if (srb->cmnd[1] & 0x01)
4328                 acmd = true;
4329
4330         arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
4331                 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
4332
4333         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4334         if (retval != STATUS_SUCCESS) {
4335                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4336                 rtsx_trace(chip);
4337                 return TRANSPORT_FAILED;
4338         }
4339         sd_card->last_rsp_type = rsp_type;
4340
4341         retval = sd_switch_clock(chip);
4342         if (retval != STATUS_SUCCESS) {
4343                 rtsx_trace(chip);
4344                 return TRANSPORT_FAILED;
4345         }
4346
4347 #ifdef SUPPORT_SD_LOCK
4348         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4349                 if (CHK_MMC_8BIT(sd_card)) {
4350                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4351                                                      SD_BUS_WIDTH_8);
4352                         if (retval != STATUS_SUCCESS) {
4353                                 rtsx_trace(chip);
4354                                 return TRANSPORT_FAILED;
4355                         }
4356
4357                 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
4358                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4359                                                      SD_BUS_WIDTH_4);
4360                         if (retval != STATUS_SUCCESS) {
4361                                 rtsx_trace(chip);
4362                                 return TRANSPORT_FAILED;
4363                         }
4364                 }
4365         }
4366 #else
4367         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4368         if (retval != STATUS_SUCCESS) {
4369                 rtsx_trace(chip);
4370                 return TRANSPORT_FAILED;
4371         }
4372 #endif
4373
4374         if (standby) {
4375                 retval = sd_select_card(chip, 0);
4376                 if (retval != STATUS_SUCCESS) {
4377                         rtsx_trace(chip);
4378                         goto sd_execute_cmd_failed;
4379                 }
4380         }
4381
4382         if (acmd) {
4383                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4384                                                  sd_card->sd_addr,
4385                                                  SD_RSP_TYPE_R1, NULL, 0,
4386                                                  false);
4387                 if (retval != STATUS_SUCCESS) {
4388                         rtsx_trace(chip);
4389                         goto sd_execute_cmd_failed;
4390                 }
4391         }
4392
4393         retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
4394                                          sd_card->rsp, rsp_len, false);
4395         if (retval != STATUS_SUCCESS) {
4396                 rtsx_trace(chip);
4397                 goto sd_execute_cmd_failed;
4398         }
4399
4400         if (standby) {
4401                 retval = sd_select_card(chip, 1);
4402                 if (retval != STATUS_SUCCESS) {
4403                         rtsx_trace(chip);
4404                         goto sd_execute_cmd_failed;
4405                 }
4406         }
4407
4408 #ifdef SUPPORT_SD_LOCK
4409         retval = sd_update_lock_status(chip);
4410         if (retval != STATUS_SUCCESS) {
4411                 rtsx_trace(chip);
4412                 goto sd_execute_cmd_failed;
4413         }
4414 #endif
4415
4416         scsi_set_resid(srb, 0);
4417         return TRANSPORT_GOOD;
4418
4419 sd_execute_cmd_failed:
4420         sd_card->pre_cmd_err = 1;
4421         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4422         release_sd_card(chip);
4423         do_reset_sd_card(chip);
4424         if (!(chip->card_ready & SD_CARD))
4425                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4426
4427         rtsx_trace(chip);
4428         return TRANSPORT_FAILED;
4429 }
4430
4431 int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4432 {
4433         struct sd_info *sd_card = &chip->sd_card;
4434         unsigned int lun = SCSI_LUN(srb);
4435         int retval, rsp_len, i;
4436         bool read_err = false, cmd13_checkbit = false;
4437         u8 cmd_idx, rsp_type, bus_width;
4438         bool standby = false, send_cmd12 = false, acmd = false;
4439         u32 data_len;
4440
4441         if (!sd_card->sd_pass_thru_en) {
4442                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4443                 rtsx_trace(chip);
4444                 return TRANSPORT_FAILED;
4445         }
4446
4447         if (sd_card->pre_cmd_err) {
4448                 sd_card->pre_cmd_err = 0;
4449                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4450                 rtsx_trace(chip);
4451                 return TRANSPORT_FAILED;
4452         }
4453
4454         retval = sd_switch_clock(chip);
4455         if (retval != STATUS_SUCCESS) {
4456                 rtsx_trace(chip);
4457                 return TRANSPORT_FAILED;
4458         }
4459
4460         cmd_idx = srb->cmnd[2] & 0x3F;
4461         if (srb->cmnd[1] & 0x04)
4462                 send_cmd12 = true;
4463
4464         if (srb->cmnd[1] & 0x02)
4465                 standby = true;
4466
4467         if (srb->cmnd[1] & 0x01)
4468                 acmd = true;
4469
4470         data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
4471                                                 << 8) | srb->cmnd[9];
4472
4473         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4474         if (retval != STATUS_SUCCESS) {
4475                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4476                 rtsx_trace(chip);
4477                 return TRANSPORT_FAILED;
4478         }
4479         sd_card->last_rsp_type = rsp_type;
4480
4481         retval = sd_switch_clock(chip);
4482         if (retval != STATUS_SUCCESS) {
4483                 rtsx_trace(chip);
4484                 return TRANSPORT_FAILED;
4485         }
4486
4487 #ifdef SUPPORT_SD_LOCK
4488         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4489                 if (CHK_MMC_8BIT(sd_card))
4490                         bus_width = SD_BUS_WIDTH_8;
4491                 else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card))
4492                         bus_width = SD_BUS_WIDTH_4;
4493                 else
4494                         bus_width = SD_BUS_WIDTH_1;
4495         } else {
4496                 bus_width = SD_BUS_WIDTH_4;
4497         }
4498         dev_dbg(rtsx_dev(chip), "bus_width = %d\n", bus_width);
4499 #else
4500         bus_width = SD_BUS_WIDTH_4;
4501 #endif
4502
4503         if (data_len < 512) {
4504                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
4505                                                  SD_RSP_TYPE_R1, NULL, 0,
4506                                                  false);
4507                 if (retval != STATUS_SUCCESS) {
4508                         rtsx_trace(chip);
4509                         goto sd_execute_read_cmd_failed;
4510                 }
4511         }
4512
4513         if (standby) {
4514                 retval = sd_select_card(chip, 0);
4515                 if (retval != STATUS_SUCCESS) {
4516                         rtsx_trace(chip);
4517                         goto sd_execute_read_cmd_failed;
4518                 }
4519         }
4520
4521         if (acmd) {
4522                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4523                                                  sd_card->sd_addr,
4524                                                  SD_RSP_TYPE_R1, NULL, 0,
4525                                                  false);
4526                 if (retval != STATUS_SUCCESS) {
4527                         rtsx_trace(chip);
4528                         goto sd_execute_read_cmd_failed;
4529                 }
4530         }
4531
4532         if (data_len <= 512) {
4533                 int min_len;
4534                 u8 *buf;
4535                 u16 byte_cnt, blk_cnt;
4536                 u8 cmd[5];
4537
4538                 byte_cnt = ((u16)(srb->cmnd[8] & 0x03) << 8) | srb->cmnd[9];
4539                 blk_cnt = 1;
4540
4541                 cmd[0] = 0x40 | cmd_idx;
4542                 cmd[1] = srb->cmnd[3];
4543                 cmd[2] = srb->cmnd[4];
4544                 cmd[3] = srb->cmnd[5];
4545                 cmd[4] = srb->cmnd[6];
4546
4547                 buf = kmalloc(data_len, GFP_KERNEL);
4548                 if (!buf) {
4549                         rtsx_trace(chip);
4550                         return TRANSPORT_ERROR;
4551                 }
4552
4553                 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt,
4554                                       blk_cnt, bus_width, buf, data_len, 2000);
4555                 if (retval != STATUS_SUCCESS) {
4556                         read_err = true;
4557                         kfree(buf);
4558                         rtsx_clear_sd_error(chip);
4559                         rtsx_trace(chip);
4560                         goto sd_execute_read_cmd_failed;
4561                 }
4562
4563                 min_len = min(data_len, scsi_bufflen(srb));
4564                 rtsx_stor_set_xfer_buf(buf, min_len, srb);
4565
4566                 kfree(buf);
4567         } else if (!(data_len & 0x1FF)) {
4568                 rtsx_init_cmd(chip);
4569
4570                 trans_dma_enable(DMA_FROM_DEVICE, chip, data_len, DMA_512);
4571
4572                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4573                              0x02);
4574                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4575                              0x00);
4576                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
4577                              0xFF, (srb->cmnd[7] & 0xFE) >> 1);
4578                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
4579                              0xFF, (u8)((data_len & 0x0001FE00) >> 9));
4580
4581                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
4582                              0x40 | cmd_idx);
4583                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF,
4584                              srb->cmnd[3]);
4585                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD2, 0xFF,
4586                              srb->cmnd[4]);
4587                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD3, 0xFF,
4588                              srb->cmnd[5]);
4589                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD4, 0xFF,
4590                              srb->cmnd[6]);
4591
4592                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
4593                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG2, 0xFF, rsp_type);
4594
4595                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER,
4596                              0xFF, SD_TM_AUTO_READ_2 | SD_TRANSFER_START);
4597                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4598                              SD_TRANSFER_END, SD_TRANSFER_END);
4599
4600                 rtsx_send_cmd_no_wait(chip);
4601
4602                 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
4603                                             scsi_bufflen(srb),
4604                                             scsi_sg_count(srb),
4605                                             DMA_FROM_DEVICE, 10000);
4606                 if (retval < 0) {
4607                         read_err = true;
4608                         rtsx_clear_sd_error(chip);
4609                         rtsx_trace(chip);
4610                         goto sd_execute_read_cmd_failed;
4611                 }
4612
4613         } else {
4614                 rtsx_trace(chip);
4615                 goto sd_execute_read_cmd_failed;
4616         }
4617
4618         retval = ext_sd_get_rsp(chip, rsp_len, sd_card->rsp, rsp_type);
4619         if (retval != STATUS_SUCCESS) {
4620                 rtsx_trace(chip);
4621                 goto sd_execute_read_cmd_failed;
4622         }
4623
4624         if (standby) {
4625                 retval = sd_select_card(chip, 1);
4626                 if (retval != STATUS_SUCCESS) {
4627                         rtsx_trace(chip);
4628                         goto sd_execute_read_cmd_failed;
4629                 }
4630         }
4631
4632         if (send_cmd12) {
4633                 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
4634                                                  SD_RSP_TYPE_R1b, NULL, 0,
4635                                                  false);
4636                 if (retval != STATUS_SUCCESS) {
4637                         rtsx_trace(chip);
4638                         goto sd_execute_read_cmd_failed;
4639                 }
4640         }
4641
4642         if (data_len < 512) {
4643                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
4644                                                  SD_RSP_TYPE_R1, NULL, 0,
4645                                                  false);
4646                 if (retval != STATUS_SUCCESS) {
4647                         rtsx_trace(chip);
4648                         goto sd_execute_read_cmd_failed;
4649                 }
4650
4651                 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
4652                 if (retval != STATUS_SUCCESS) {
4653                         rtsx_trace(chip);
4654                         goto sd_execute_read_cmd_failed;
4655                 }
4656
4657                 retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
4658                 if (retval != STATUS_SUCCESS) {
4659                         rtsx_trace(chip);
4660                         goto sd_execute_read_cmd_failed;
4661                 }
4662         }
4663
4664         if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
4665                 cmd13_checkbit = true;
4666
4667         for (i = 0; i < 3; i++) {
4668                 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
4669                                                  sd_card->sd_addr,
4670                                                 SD_RSP_TYPE_R1, NULL, 0,
4671                                                 cmd13_checkbit);
4672                 if (retval == STATUS_SUCCESS)
4673                         break;
4674         }
4675         if (retval != STATUS_SUCCESS) {
4676                 rtsx_trace(chip);
4677                 goto sd_execute_read_cmd_failed;
4678         }
4679
4680         scsi_set_resid(srb, 0);
4681         return TRANSPORT_GOOD;
4682
4683 sd_execute_read_cmd_failed:
4684         sd_card->pre_cmd_err = 1;
4685         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
4686         if (read_err)
4687                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4688
4689         release_sd_card(chip);
4690         do_reset_sd_card(chip);
4691         if (!(chip->card_ready & SD_CARD))
4692                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
4693
4694         rtsx_trace(chip);
4695         return TRANSPORT_FAILED;
4696 }
4697
4698 int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4699 {
4700         struct sd_info *sd_card = &chip->sd_card;
4701         unsigned int lun = SCSI_LUN(srb);
4702         int retval, rsp_len, i;
4703         bool write_err = false, cmd13_checkbit = false;
4704         u8 cmd_idx, rsp_type;
4705         bool standby = false, send_cmd12 = false, acmd = false;
4706         u32 data_len, arg;
4707 #ifdef SUPPORT_SD_LOCK
4708         int lock_cmd_fail = 0;
4709         u8 sd_lock_state = 0;
4710         u8 lock_cmd_type = 0;
4711 #endif
4712
4713         if (!sd_card->sd_pass_thru_en) {
4714                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4715                 rtsx_trace(chip);
4716                 return TRANSPORT_FAILED;
4717         }
4718
4719         if (sd_card->pre_cmd_err) {
4720                 sd_card->pre_cmd_err = 0;
4721                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
4722                 rtsx_trace(chip);
4723                 return TRANSPORT_FAILED;
4724         }
4725
4726         retval = sd_switch_clock(chip);
4727         if (retval != STATUS_SUCCESS) {
4728                 rtsx_trace(chip);
4729                 return TRANSPORT_FAILED;
4730         }
4731
4732         cmd_idx = srb->cmnd[2] & 0x3F;
4733         if (srb->cmnd[1] & 0x04)
4734                 send_cmd12 = true;
4735
4736         if (srb->cmnd[1] & 0x02)
4737                 standby = true;
4738
4739         if (srb->cmnd[1] & 0x01)
4740                 acmd = true;
4741
4742         data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
4743                                                 << 8) | srb->cmnd[9];
4744         arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
4745                 ((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
4746
4747 #ifdef SUPPORT_SD_LOCK
4748         if (cmd_idx == LOCK_UNLOCK) {
4749                 sd_lock_state = sd_card->sd_lock_status;
4750                 sd_lock_state &= SD_LOCKED;
4751         }
4752 #endif
4753
4754         retval = get_rsp_type(srb, &rsp_type, &rsp_len);
4755         if (retval != STATUS_SUCCESS) {
4756                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4757                 rtsx_trace(chip);
4758                 return TRANSPORT_FAILED;
4759         }
4760         sd_card->last_rsp_type = rsp_type;
4761
4762         retval = sd_switch_clock(chip);
4763         if (retval != STATUS_SUCCESS) {
4764                 rtsx_trace(chip);
4765                 return TRANSPORT_FAILED;
4766         }
4767
4768 #ifdef SUPPORT_SD_LOCK
4769         if ((sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) == 0) {
4770                 if (CHK_MMC_8BIT(sd_card)) {
4771                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4772                                                      SD_BUS_WIDTH_8);
4773                         if (retval != STATUS_SUCCESS) {
4774                                 rtsx_trace(chip);
4775                                 return TRANSPORT_FAILED;
4776                         }
4777
4778                 } else if (CHK_SD(sd_card) || CHK_MMC_4BIT(sd_card)) {
4779                         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03,
4780                                                      SD_BUS_WIDTH_4);
4781                         if (retval != STATUS_SUCCESS) {
4782                                 rtsx_trace(chip);
4783                                 return TRANSPORT_FAILED;
4784                         }
4785                 }
4786         }
4787 #else
4788         retval = rtsx_write_register(chip, REG_SD_CFG1, 0x03, SD_BUS_WIDTH_4);
4789         if (retval != STATUS_SUCCESS) {
4790                 rtsx_trace(chip);
4791                 return TRANSPORT_FAILED;
4792         }
4793 #endif
4794
4795         if (data_len < 512) {
4796                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
4797                                                  SD_RSP_TYPE_R1, NULL, 0,
4798                                                  false);
4799                 if (retval != STATUS_SUCCESS) {
4800                         rtsx_trace(chip);
4801                         goto sd_execute_write_cmd_failed;
4802                 }
4803         }
4804
4805         if (standby) {
4806                 retval = sd_select_card(chip, 0);
4807                 if (retval != STATUS_SUCCESS) {
4808                         rtsx_trace(chip);
4809                         goto sd_execute_write_cmd_failed;
4810                 }
4811         }
4812
4813         if (acmd) {
4814                 retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
4815                                                  sd_card->sd_addr,
4816                                                  SD_RSP_TYPE_R1, NULL, 0,
4817                                                  false);
4818                 if (retval != STATUS_SUCCESS) {
4819                         rtsx_trace(chip);
4820                         goto sd_execute_write_cmd_failed;
4821                 }
4822         }
4823
4824         retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
4825                                          sd_card->rsp, rsp_len, false);
4826         if (retval != STATUS_SUCCESS) {
4827                 rtsx_trace(chip);
4828                 goto sd_execute_write_cmd_failed;
4829         }
4830
4831         if (data_len <= 512) {
4832                 u16 i;
4833                 u8 *buf;
4834
4835                 buf = kmalloc(data_len, GFP_KERNEL);
4836                 if (!buf) {
4837                         rtsx_trace(chip);
4838                         return TRANSPORT_ERROR;
4839                 }
4840
4841                 rtsx_stor_get_xfer_buf(buf, data_len, srb);
4842
4843 #ifdef SUPPORT_SD_LOCK
4844                 if (cmd_idx == LOCK_UNLOCK)
4845                         lock_cmd_type = buf[0] & 0x0F;
4846 #endif
4847
4848                 if (data_len > 256) {
4849                         rtsx_init_cmd(chip);
4850                         for (i = 0; i < 256; i++) {
4851                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4852                                              PPBUF_BASE2 + i, 0xFF, buf[i]);
4853                         }
4854                         retval = rtsx_send_cmd(chip, 0, 250);
4855                         if (retval != STATUS_SUCCESS) {
4856                                 kfree(buf);
4857                                 rtsx_trace(chip);
4858                                 goto sd_execute_write_cmd_failed;
4859                         }
4860
4861                         rtsx_init_cmd(chip);
4862                         for (i = 256; i < data_len; i++) {
4863                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4864                                              PPBUF_BASE2 + i, 0xFF, buf[i]);
4865                         }
4866                         retval = rtsx_send_cmd(chip, 0, 250);
4867                         if (retval != STATUS_SUCCESS) {
4868                                 kfree(buf);
4869                                 rtsx_trace(chip);
4870                                 goto sd_execute_write_cmd_failed;
4871                         }
4872                 } else {
4873                         rtsx_init_cmd(chip);
4874                         for (i = 0; i < data_len; i++) {
4875                                 rtsx_add_cmd(chip, WRITE_REG_CMD,
4876                                              PPBUF_BASE2 + i, 0xFF, buf[i]);
4877                         }
4878                         retval = rtsx_send_cmd(chip, 0, 250);
4879                         if (retval != STATUS_SUCCESS) {
4880                                 kfree(buf);
4881                                 rtsx_trace(chip);
4882                                 goto sd_execute_write_cmd_failed;
4883                         }
4884                 }
4885
4886                 kfree(buf);
4887
4888                 rtsx_init_cmd(chip);
4889
4890                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4891                              srb->cmnd[8] & 0x03);
4892                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4893                              srb->cmnd[9]);
4894                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H, 0xFF,
4895                              0x00);
4896                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L, 0xFF,
4897                              0x01);
4898                 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01,
4899                              PINGPONG_BUFFER);
4900
4901                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
4902                              SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4903                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4904                              SD_TRANSFER_END, SD_TRANSFER_END);
4905
4906                 retval = rtsx_send_cmd(chip, SD_CARD, 250);
4907         } else if (!(data_len & 0x1FF)) {
4908                 rtsx_init_cmd(chip);
4909
4910                 trans_dma_enable(DMA_TO_DEVICE, chip, data_len, DMA_512);
4911
4912                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_H, 0xFF,
4913                              0x02);
4914                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BYTE_CNT_L, 0xFF,
4915                              0x00);
4916                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_H,
4917                              0xFF, (srb->cmnd[7] & 0xFE) >> 1);
4918                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_BLOCK_CNT_L,
4919                              0xFF, (u8)((data_len & 0x0001FE00) >> 9));
4920
4921                 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_TRANSFER, 0xFF,
4922                              SD_TM_AUTO_WRITE_3 | SD_TRANSFER_START);
4923                 rtsx_add_cmd(chip, CHECK_REG_CMD, REG_SD_TRANSFER,
4924                              SD_TRANSFER_END, SD_TRANSFER_END);
4925
4926                 rtsx_send_cmd_no_wait(chip);
4927
4928                 retval = rtsx_transfer_data(chip, SD_CARD, scsi_sglist(srb),
4929                                             scsi_bufflen(srb),
4930                                             scsi_sg_count(srb),
4931                                             DMA_TO_DEVICE, 10000);
4932
4933         } else {
4934                 rtsx_trace(chip);
4935                 goto sd_execute_write_cmd_failed;
4936         }
4937
4938         if (retval < 0) {
4939                 write_err = true;
4940                 rtsx_clear_sd_error(chip);
4941                 rtsx_trace(chip);
4942                 goto sd_execute_write_cmd_failed;
4943         }
4944
4945 #ifdef SUPPORT_SD_LOCK
4946         if (cmd_idx == LOCK_UNLOCK) {
4947                 if (lock_cmd_type == SD_ERASE) {
4948                         sd_card->sd_erase_status = SD_UNDER_ERASING;
4949                         scsi_set_resid(srb, 0);
4950                         return TRANSPORT_GOOD;
4951                 }
4952
4953                 rtsx_init_cmd(chip);
4954                 rtsx_add_cmd(chip, CHECK_REG_CMD, 0xFD30, 0x02, 0x02);
4955
4956                 rtsx_send_cmd(chip, SD_CARD, 250);
4957
4958                 retval = sd_update_lock_status(chip);
4959                 if (retval != STATUS_SUCCESS) {
4960                         dev_dbg(rtsx_dev(chip), "Lock command fail!\n");
4961                         lock_cmd_fail = 1;
4962                 }
4963         }
4964 #endif /* SUPPORT_SD_LOCK */
4965
4966         if (standby) {
4967                 retval = sd_select_card(chip, 1);
4968                 if (retval != STATUS_SUCCESS) {
4969                         rtsx_trace(chip);
4970                         goto sd_execute_write_cmd_failed;
4971                 }
4972         }
4973
4974         if (send_cmd12) {
4975                 retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION, 0,
4976                                                  SD_RSP_TYPE_R1b, NULL, 0,
4977                                                  false);
4978                 if (retval != STATUS_SUCCESS) {
4979                         rtsx_trace(chip);
4980                         goto sd_execute_write_cmd_failed;
4981                 }
4982         }
4983
4984         if (data_len < 512) {
4985                 retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
4986                                                  SD_RSP_TYPE_R1, NULL, 0,
4987                                                  false);
4988                 if (retval != STATUS_SUCCESS) {
4989                         rtsx_trace(chip);
4990                         goto sd_execute_write_cmd_failed;
4991                 }
4992
4993                 retval = rtsx_write_register(chip, SD_BYTE_CNT_H, 0xFF, 0x02);
4994                 if (retval != STATUS_SUCCESS) {
4995                         rtsx_trace(chip);
4996                         goto sd_execute_write_cmd_failed;
4997                 }
4998
4999                 retval = rtsx_write_register(chip, SD_BYTE_CNT_L, 0xFF, 0x00);
5000                 if (retval != STATUS_SUCCESS) {
5001                         rtsx_trace(chip);
5002                         goto sd_execute_write_cmd_failed;
5003                 }
5004         }
5005
5006         if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
5007                 cmd13_checkbit = true;
5008
5009         for (i = 0; i < 3; i++) {
5010                 retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
5011                                                  sd_card->sd_addr,
5012                                                  SD_RSP_TYPE_R1, NULL, 0,
5013                                                  cmd13_checkbit);
5014                 if (retval == STATUS_SUCCESS)
5015                         break;
5016         }
5017         if (retval != STATUS_SUCCESS) {
5018                 rtsx_trace(chip);
5019                 goto sd_execute_write_cmd_failed;
5020         }
5021
5022 #ifdef SUPPORT_SD_LOCK
5023         if (cmd_idx == LOCK_UNLOCK) {
5024                 if (!lock_cmd_fail) {
5025                         dev_dbg(rtsx_dev(chip), "lock_cmd_type = 0x%x\n",
5026                                 lock_cmd_type);
5027                         if (lock_cmd_type & SD_CLR_PWD)
5028                                 sd_card->sd_lock_status &= ~SD_PWD_EXIST;
5029
5030                         if (lock_cmd_type & SD_SET_PWD)
5031                                 sd_card->sd_lock_status |= SD_PWD_EXIST;
5032                 }
5033
5034                 dev_dbg(rtsx_dev(chip), "sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n",
5035                         sd_lock_state, sd_card->sd_lock_status);
5036                 if (sd_lock_state ^ (sd_card->sd_lock_status & SD_LOCKED)) {
5037                         sd_card->sd_lock_notify = 1;
5038                         if (sd_lock_state) {
5039                                 if (sd_card->sd_lock_status & SD_LOCK_1BIT_MODE) {
5040                                         sd_card->sd_lock_status |= (
5041                                                 SD_UNLOCK_POW_ON | SD_SDR_RST);
5042                                         if (CHK_SD(sd_card)) {
5043                                                 retval = reset_sd(chip);
5044                                                 if (retval != STATUS_SUCCESS) {
5045                                                         sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
5046                                                         rtsx_trace(chip);
5047                                                         goto sd_execute_write_cmd_failed;
5048                                                 }
5049                                         }
5050
5051                                         sd_card->sd_lock_status &= ~(SD_UNLOCK_POW_ON | SD_SDR_RST);
5052                                 }
5053                         }
5054                 }
5055         }
5056
5057         if (lock_cmd_fail) {
5058                 scsi_set_resid(srb, 0);
5059                 set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
5060                 rtsx_trace(chip);
5061                 return TRANSPORT_FAILED;
5062         }
5063 #endif  /* SUPPORT_SD_LOCK */
5064
5065         scsi_set_resid(srb, 0);
5066         return TRANSPORT_GOOD;
5067
5068 sd_execute_write_cmd_failed:
5069         sd_card->pre_cmd_err = 1;
5070         set_sense_type(chip, lun, SENSE_TYPE_NO_SENSE);
5071         if (write_err)
5072                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_WRITE_ERR);
5073
5074         release_sd_card(chip);
5075         do_reset_sd_card(chip);
5076         if (!(chip->card_ready & SD_CARD))
5077                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
5078
5079         rtsx_trace(chip);
5080         return TRANSPORT_FAILED;
5081 }
5082
5083 int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
5084 {
5085         struct sd_info *sd_card = &chip->sd_card;
5086         unsigned int lun = SCSI_LUN(srb);
5087         int count;
5088         u16 data_len;
5089
5090         if (!sd_card->sd_pass_thru_en) {
5091                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5092                 rtsx_trace(chip);
5093                 return TRANSPORT_FAILED;
5094         }
5095
5096         if (sd_card->pre_cmd_err) {
5097                 sd_card->pre_cmd_err = 0;
5098                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
5099                 rtsx_trace(chip);
5100                 return TRANSPORT_FAILED;
5101         }
5102
5103         data_len = ((u16)srb->cmnd[7] << 8) | srb->cmnd[8];
5104
5105         if (sd_card->last_rsp_type == SD_RSP_TYPE_R0) {
5106                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5107                 rtsx_trace(chip);
5108                 return TRANSPORT_FAILED;
5109         } else if (sd_card->last_rsp_type == SD_RSP_TYPE_R2) {
5110                 count = (data_len < 17) ? data_len : 17;
5111         } else {
5112                 count = (data_len < 6) ? data_len : 6;
5113         }
5114         rtsx_stor_set_xfer_buf(sd_card->rsp, count, srb);
5115
5116         dev_dbg(rtsx_dev(chip), "Response length: %d\n", data_len);
5117         dev_dbg(rtsx_dev(chip), "Response: 0x%x 0x%x 0x%x 0x%x\n",
5118                 sd_card->rsp[0], sd_card->rsp[1],
5119                 sd_card->rsp[2], sd_card->rsp[3]);
5120
5121         scsi_set_resid(srb, 0);
5122         return TRANSPORT_GOOD;
5123 }
5124
5125 int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip)
5126 {
5127         struct sd_info *sd_card = &chip->sd_card;
5128         unsigned int lun = SCSI_LUN(srb);
5129         int retval;
5130
5131         if (!sd_card->sd_pass_thru_en) {
5132                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5133                 rtsx_trace(chip);
5134                 return TRANSPORT_FAILED;
5135         }
5136
5137         if (sd_card->pre_cmd_err) {
5138                 sd_card->pre_cmd_err = 0;
5139                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_CHANGE);
5140                 rtsx_trace(chip);
5141                 return TRANSPORT_FAILED;
5142         }
5143
5144         if ((srb->cmnd[2] != 0x53) || (srb->cmnd[3] != 0x44) ||
5145             (srb->cmnd[4] != 0x20) || (srb->cmnd[5] != 0x43) ||
5146             (srb->cmnd[6] != 0x61) || (srb->cmnd[7] != 0x72) ||
5147             (srb->cmnd[8] != 0x64)) {
5148                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5149                 rtsx_trace(chip);
5150                 return TRANSPORT_FAILED;
5151         }
5152
5153         switch (srb->cmnd[1] & 0x0F) {
5154         case 0:
5155 #ifdef SUPPORT_SD_LOCK
5156                 if (srb->cmnd[9] == 0x64)
5157                         sd_card->sd_lock_status |= SD_SDR_RST;
5158 #endif
5159                 retval = reset_sd_card(chip);
5160                 if (retval != STATUS_SUCCESS) {
5161 #ifdef SUPPORT_SD_LOCK
5162                         sd_card->sd_lock_status &= ~SD_SDR_RST;
5163 #endif
5164                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
5165                         sd_card->pre_cmd_err = 1;
5166                         rtsx_trace(chip);
5167                         return TRANSPORT_FAILED;
5168                 }
5169 #ifdef SUPPORT_SD_LOCK
5170                 sd_card->sd_lock_status &= ~SD_SDR_RST;
5171 #endif
5172                 break;
5173
5174         case 1:
5175                 retval = soft_reset_sd_card(chip);
5176                 if (retval != STATUS_SUCCESS) {
5177                         set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
5178                         sd_card->pre_cmd_err = 1;
5179                         rtsx_trace(chip);
5180                         return TRANSPORT_FAILED;
5181                 }
5182                 break;
5183
5184         default:
5185                 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
5186                 rtsx_trace(chip);
5187                 return TRANSPORT_FAILED;
5188         }
5189
5190         scsi_set_resid(srb, 0);
5191         return TRANSPORT_GOOD;
5192 }
5193 #endif
5194
5195 void sd_cleanup_work(struct rtsx_chip *chip)
5196 {
5197         struct sd_info *sd_card = &chip->sd_card;
5198
5199         if (sd_card->seq_mode) {
5200                 dev_dbg(rtsx_dev(chip), "SD: stop transmission\n");
5201                 sd_stop_seq_mode(chip);
5202                 sd_card->cleanup_counter = 0;
5203         }
5204 }
5205
5206 int sd_power_off_card3v3(struct rtsx_chip *chip)
5207 {
5208         int retval;
5209
5210         retval = disable_card_clock(chip, SD_CARD);
5211         if (retval != STATUS_SUCCESS) {
5212                 rtsx_trace(chip);
5213                 return STATUS_FAIL;
5214         }
5215
5216         retval = rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
5217         if (retval) {
5218                 rtsx_trace(chip);
5219                 return retval;
5220         }
5221
5222         if (!chip->ft2_fast_mode) {
5223                 retval = card_power_off(chip, SD_CARD);
5224                 if (retval != STATUS_SUCCESS) {
5225                         rtsx_trace(chip);
5226                         return STATUS_FAIL;
5227                 }
5228
5229                 mdelay(50);
5230         }
5231
5232         if (chip->asic_code) {
5233                 retval = sd_pull_ctl_disable(chip);
5234                 if (retval != STATUS_SUCCESS) {
5235                         rtsx_trace(chip);
5236                         return STATUS_FAIL;
5237                 }
5238         } else {
5239                 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
5240                                              FPGA_SD_PULL_CTL_BIT | 0x20,
5241                                              FPGA_SD_PULL_CTL_BIT);
5242                 if (retval) {
5243                         rtsx_trace(chip);
5244                         return retval;
5245                 }
5246         }
5247
5248         return STATUS_SUCCESS;
5249 }
5250
5251 int release_sd_card(struct rtsx_chip *chip)
5252 {
5253         struct sd_info *sd_card = &chip->sd_card;
5254         int retval;
5255
5256         chip->card_ready &= ~SD_CARD;
5257         chip->card_fail &= ~SD_CARD;
5258         chip->card_wp &= ~SD_CARD;
5259
5260         chip->sd_io = 0;
5261         chip->sd_int = 0;
5262
5263 #ifdef SUPPORT_SD_LOCK
5264         sd_card->sd_lock_status = 0;
5265         sd_card->sd_erase_status = 0;
5266 #endif
5267
5268         memset(sd_card->raw_csd, 0, 16);
5269         memset(sd_card->raw_scr, 0, 8);
5270
5271         retval = sd_power_off_card3v3(chip);
5272         if (retval != STATUS_SUCCESS) {
5273                 rtsx_trace(chip);
5274                 return STATUS_FAIL;
5275         }
5276
5277         return STATUS_SUCCESS;
5278 }