1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
31 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
33 struct ms_info *ms_card = &chip->ms_card;
35 ms_card->err_code = err_code;
38 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
40 struct ms_info *ms_card = &chip->ms_card;
42 return (ms_card->err_code == err_code);
45 static int ms_parse_err_code(struct rtsx_chip *chip)
51 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
52 u8 tpc, u8 cnt, u8 cfg)
54 struct ms_info *ms_card = &chip->ms_card;
58 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
66 0x01, PINGPONG_BUFFER);
68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
69 0xFF, MS_TRANSFER_START | trans_mode);
70 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
71 MS_TRANSFER_END, MS_TRANSFER_END);
73 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
75 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
77 rtsx_clear_ms_error(chip);
78 ms_set_err_code(chip, MS_TO_ERROR);
80 return ms_parse_err_code(chip);
83 ptr = rtsx_get_cmd_data(chip) + 1;
85 if (!(tpc & 0x08)) { /* Read Packet */
86 if (*ptr & MS_CRC16_ERR) {
87 ms_set_err_code(chip, MS_CRC16_ERROR);
89 return ms_parse_err_code(chip);
91 } else { /* Write Packet */
92 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
93 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
94 ms_set_err_code(chip, MS_CMD_NK);
96 return ms_parse_err_code(chip);
101 if (*ptr & MS_RDY_TIMEOUT) {
102 rtsx_clear_ms_error(chip);
103 ms_set_err_code(chip, MS_TO_ERROR);
105 return ms_parse_err_code(chip);
108 return STATUS_SUCCESS;
111 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
112 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
113 int use_sg, void *buf, int buf_len)
116 u8 val, err_code = 0;
117 enum dma_data_direction dir;
119 if (!buf || !buf_len) {
124 if (trans_mode == MS_TM_AUTO_READ) {
125 dir = DMA_FROM_DEVICE;
126 err_code = MS_FLASH_READ_ERROR;
127 } else if (trans_mode == MS_TM_AUTO_WRITE) {
129 err_code = MS_FLASH_WRITE_ERROR;
137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
138 rtsx_add_cmd(chip, WRITE_REG_CMD,
139 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
141 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
144 rtsx_add_cmd(chip, WRITE_REG_CMD,
145 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
147 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
150 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
152 rtsx_add_cmd(chip, WRITE_REG_CMD,
153 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
154 rtsx_add_cmd(chip, CHECK_REG_CMD,
155 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
157 rtsx_send_cmd_no_wait(chip);
159 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
160 use_sg, dir, chip->mspro_timeout);
162 ms_set_err_code(chip, err_code);
163 if (retval == -ETIMEDOUT)
164 retval = STATUS_TIMEDOUT;
166 retval = STATUS_FAIL;
172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
177 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
182 return STATUS_SUCCESS;
185 static int ms_write_bytes(struct rtsx_chip *chip,
186 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
188 struct ms_info *ms_card = &chip->ms_card;
191 if (!data || (data_len < cnt)) {
198 for (i = 0; i < cnt; i++) {
199 rtsx_add_cmd(chip, WRITE_REG_CMD,
200 PPBUF_BASE2 + i, 0xFF, data[i]);
203 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
205 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
206 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
207 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
208 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
209 0x01, PINGPONG_BUFFER);
211 rtsx_add_cmd(chip, WRITE_REG_CMD,
212 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
213 rtsx_add_cmd(chip, CHECK_REG_CMD,
214 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
216 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
220 rtsx_read_register(chip, MS_TRANS_CFG, &val);
221 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
223 rtsx_clear_ms_error(chip);
226 if (val & MS_CRC16_ERR) {
227 ms_set_err_code(chip, MS_CRC16_ERROR);
229 return ms_parse_err_code(chip);
232 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
233 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
234 ms_set_err_code(chip, MS_CMD_NK);
236 return ms_parse_err_code(chip);
241 if (val & MS_RDY_TIMEOUT) {
242 ms_set_err_code(chip, MS_TO_ERROR);
244 return ms_parse_err_code(chip);
247 ms_set_err_code(chip, MS_TO_ERROR);
249 return ms_parse_err_code(chip);
252 return STATUS_SUCCESS;
255 static int ms_read_bytes(struct rtsx_chip *chip,
256 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
258 struct ms_info *ms_card = &chip->ms_card;
269 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
270 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
271 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
272 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
273 0x01, PINGPONG_BUFFER);
275 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
276 MS_TRANSFER_START | MS_TM_READ_BYTES);
277 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
278 MS_TRANSFER_END, MS_TRANSFER_END);
280 for (i = 0; i < data_len - 1; i++)
281 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
284 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
286 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
289 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
293 rtsx_read_register(chip, MS_TRANS_CFG, &val);
294 rtsx_clear_ms_error(chip);
297 if (val & MS_CRC16_ERR) {
298 ms_set_err_code(chip, MS_CRC16_ERROR);
300 return ms_parse_err_code(chip);
303 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
304 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
305 ms_set_err_code(chip, MS_CMD_NK);
307 return ms_parse_err_code(chip);
312 if (val & MS_RDY_TIMEOUT) {
313 ms_set_err_code(chip, MS_TO_ERROR);
315 return ms_parse_err_code(chip);
318 ms_set_err_code(chip, MS_TO_ERROR);
320 return ms_parse_err_code(chip);
323 ptr = rtsx_get_cmd_data(chip) + 1;
325 for (i = 0; i < data_len; i++)
328 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
329 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
330 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
334 return STATUS_SUCCESS;
337 static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
338 u8 read_cnt, u8 write_start, u8 write_cnt)
343 data[0] = read_start;
345 data[2] = write_start;
348 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
349 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
350 NO_WAIT_INT, data, 4);
351 if (retval == STATUS_SUCCESS)
352 return STATUS_SUCCESS;
353 rtsx_clear_ms_error(chip);
360 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
367 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
370 static int ms_set_init_para(struct rtsx_chip *chip)
372 struct ms_info *ms_card = &chip->ms_card;
375 if (CHK_HG8BIT(ms_card)) {
377 ms_card->ms_clock = chip->asic_ms_hg_clk;
379 ms_card->ms_clock = chip->fpga_ms_hg_clk;
381 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
383 ms_card->ms_clock = chip->asic_ms_4bit_clk;
385 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
389 ms_card->ms_clock = chip->asic_ms_1bit_clk;
391 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
394 retval = switch_clock(chip, ms_card->ms_clock);
395 if (retval != STATUS_SUCCESS) {
400 retval = select_card(chip, MS_CARD);
401 if (retval != STATUS_SUCCESS) {
406 return STATUS_SUCCESS;
409 static int ms_switch_clock(struct rtsx_chip *chip)
411 struct ms_info *ms_card = &chip->ms_card;
414 retval = select_card(chip, MS_CARD);
415 if (retval != STATUS_SUCCESS) {
420 retval = switch_clock(chip, ms_card->ms_clock);
421 if (retval != STATUS_SUCCESS) {
426 return STATUS_SUCCESS;
429 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
433 if (CHECK_PID(chip, 0x5208)) {
434 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
435 MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
440 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
441 MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
446 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
447 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
452 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
453 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
458 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
459 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
464 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
465 MS_D5_PD | MS_D4_PD);
470 } else if (CHECK_PID(chip, 0x5288)) {
471 if (CHECK_BARO_PKG(chip, QFN)) {
472 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
478 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
484 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
490 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
499 return STATUS_SUCCESS;
502 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
508 if (CHECK_PID(chip, 0x5208)) {
509 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
510 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
511 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
512 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
513 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
514 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
515 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
516 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
517 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
518 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
519 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
520 MS_D5_PD | MS_D4_PD);
521 } else if (CHECK_PID(chip, 0x5288)) {
522 if (CHECK_BARO_PKG(chip, QFN)) {
523 rtsx_add_cmd(chip, WRITE_REG_CMD,
524 CARD_PULL_CTL1, 0xFF, 0x55);
525 rtsx_add_cmd(chip, WRITE_REG_CMD,
526 CARD_PULL_CTL2, 0xFF, 0x45);
527 rtsx_add_cmd(chip, WRITE_REG_CMD,
528 CARD_PULL_CTL3, 0xFF, 0x4B);
529 rtsx_add_cmd(chip, WRITE_REG_CMD,
530 CARD_PULL_CTL4, 0xFF, 0x29);
534 retval = rtsx_send_cmd(chip, MS_CARD, 100);
540 return STATUS_SUCCESS;
543 static int ms_prepare_reset(struct rtsx_chip *chip)
545 struct ms_info *ms_card = &chip->ms_card;
549 ms_card->ms_type = 0;
550 ms_card->check_ms_flow = 0;
551 ms_card->switch_8bit_fail = 0;
552 ms_card->delay_write.delay_write_flag = 0;
554 ms_card->pro_under_formatting = 0;
556 retval = ms_power_off_card3v3(chip);
557 if (retval != STATUS_SUCCESS) {
562 if (!chip->ft2_fast_mode)
565 retval = enable_card_clock(chip, MS_CARD);
566 if (retval != STATUS_SUCCESS) {
571 if (chip->asic_code) {
572 retval = ms_pull_ctl_enable(chip);
573 if (retval != STATUS_SUCCESS) {
578 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
579 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
586 if (!chip->ft2_fast_mode) {
587 retval = card_power_on(chip, MS_CARD);
588 if (retval != STATUS_SUCCESS) {
596 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
597 oc_mask = MS_OC_NOW | MS_OC_EVER;
599 oc_mask = SD_OC_NOW | SD_OC_EVER;
601 if (chip->ocp_stat & oc_mask) {
602 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
610 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
617 if (chip->asic_code) {
618 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
619 SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
625 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
626 SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
632 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
633 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
638 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
639 MS_STOP | MS_CLR_ERR);
645 retval = ms_set_init_para(chip);
646 if (retval != STATUS_SUCCESS) {
651 return STATUS_SUCCESS;
654 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
656 struct ms_info *ms_card = &chip->ms_card;
660 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
661 if (retval != STATUS_SUCCESS) {
666 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
667 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
669 if (retval == STATUS_SUCCESS)
672 if (i == MS_MAX_RETRY_COUNT) {
677 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
682 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
685 ms_card->check_ms_flow = 1;
691 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
696 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
698 ms_card->check_ms_flow = 1;
703 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
708 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
710 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
716 chip->card_wp |= MS_CARD;
718 chip->card_wp &= ~MS_CARD;
720 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
721 chip->card_wp |= MS_CARD;
723 ms_card->check_ms_flow = 1;
728 ms_card->ms_type |= TYPE_MSPRO;
730 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
735 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
737 ms_card->ms_type &= 0x0F;
738 } else if (val == 7) {
740 ms_card->ms_type |= MS_HG;
742 ms_card->ms_type &= 0x0F;
749 return STATUS_SUCCESS;
752 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
757 /* Confirm CPU StartUp */
760 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
761 ms_set_err_code(chip, MS_NO_CARD);
766 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
767 retval = ms_read_bytes(chip, GET_INT, 1,
768 NO_WAIT_INT, &val, 1);
769 if (retval == STATUS_SUCCESS)
772 if (i == MS_MAX_RETRY_COUNT) {
784 } while (!(val & INT_REG_CED));
786 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
787 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
788 if (retval == STATUS_SUCCESS)
791 if (i == MS_MAX_RETRY_COUNT) {
796 if (val & INT_REG_ERR) {
797 if (val & INT_REG_CMDNK)
798 chip->card_wp |= (MS_CARD);
804 /* -- end confirm CPU startup */
806 return STATUS_SUCCESS;
809 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
814 data[0] = PARALLEL_4BIT_IF;
816 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
817 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
819 if (retval == STATUS_SUCCESS)
822 if (retval != STATUS_SUCCESS) {
827 return STATUS_SUCCESS;
830 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
832 struct ms_info *ms_card = &chip->ms_card;
836 data[0] = PARALLEL_8BIT_IF;
838 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
839 retval = ms_write_bytes(chip, WRITE_REG, 1,
840 NO_WAIT_INT, data, 2);
841 if (retval == STATUS_SUCCESS)
844 if (retval != STATUS_SUCCESS) {
849 retval = rtsx_write_register(chip, MS_CFG, 0x98,
850 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
855 ms_card->ms_type |= MS_8BIT;
856 retval = ms_set_init_para(chip);
857 if (retval != STATUS_SUCCESS) {
862 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
863 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
865 if (retval != STATUS_SUCCESS) {
871 return STATUS_SUCCESS;
874 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
876 struct ms_info *ms_card = &chip->ms_card;
879 for (i = 0; i < 3; i++) {
880 retval = ms_prepare_reset(chip);
881 if (retval != STATUS_SUCCESS) {
886 retval = ms_identify_media_type(chip, switch_8bit_bus);
887 if (retval != STATUS_SUCCESS) {
892 retval = ms_confirm_cpu_startup(chip);
893 if (retval != STATUS_SUCCESS) {
898 retval = ms_switch_parallel_bus(chip);
899 if (retval != STATUS_SUCCESS) {
900 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
901 ms_set_err_code(chip, MS_NO_CARD);
911 if (retval != STATUS_SUCCESS) {
916 /* Switch MS-PRO into Parallel mode */
917 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
922 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
929 retval = ms_set_init_para(chip);
930 if (retval != STATUS_SUCCESS) {
935 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
936 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
937 retval = ms_switch_8bit_bus(chip);
938 if (retval != STATUS_SUCCESS) {
939 ms_card->switch_8bit_fail = 1;
945 return STATUS_SUCCESS;
949 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
954 ms_cleanup_work(chip);
956 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
957 if (retval != STATUS_SUCCESS) {
969 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
970 if (retval != STATUS_SUCCESS) {
975 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
976 if (retval != STATUS_SUCCESS) {
981 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
986 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
991 return STATUS_SUCCESS;
995 static int ms_read_attribute_info(struct rtsx_chip *chip)
997 struct ms_info *ms_card = &chip->ms_card;
999 u8 val, *buf, class_code, device_type, sub_class, data[16];
1000 u16 total_blk = 0, blk_size = 0;
1002 u32 xc_total_blk = 0, xc_blk_size = 0;
1004 u32 sys_info_addr = 0, sys_info_size;
1005 #ifdef SUPPORT_PCGL_1P18
1006 u32 model_name_addr = 0, model_name_size;
1007 int found_sys_info = 0, found_model_name = 0;
1010 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
1011 if (retval != STATUS_SUCCESS) {
1016 if (CHK_MS8BIT(ms_card))
1017 data[0] = PARALLEL_8BIT_IF;
1019 data[0] = PARALLEL_4BIT_IF;
1030 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1031 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
1033 if (retval == STATUS_SUCCESS)
1036 if (retval != STATUS_SUCCESS) {
1041 buf = kmalloc(64 * 512, GFP_KERNEL);
1044 return STATUS_ERROR;
1047 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1048 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
1049 if (retval != STATUS_SUCCESS)
1052 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1053 if (retval != STATUS_SUCCESS) {
1058 if (!(val & MS_INT_BREQ)) {
1063 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
1064 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
1065 0, 0, buf, 64 * 512);
1066 if (retval == STATUS_SUCCESS)
1069 rtsx_clear_ms_error(chip);
1071 if (retval != STATUS_SUCCESS) {
1079 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1080 if (retval != STATUS_SUCCESS) {
1086 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
1089 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
1090 PRO_READ_LONG_DATA, 0, WAIT_INT);
1091 if (retval != STATUS_SUCCESS) {
1100 if (retval != STATUS_SUCCESS) {
1106 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
1107 /* Signature code is wrong */
1113 if ((buf[4] < 1) || (buf[4] > 12)) {
1119 for (i = 0; i < buf[4]; i++) {
1120 int cur_addr_off = 16 + i * 12;
1123 if ((buf[cur_addr_off + 8] == 0x10) ||
1124 (buf[cur_addr_off + 8] == 0x13)) {
1126 if (buf[cur_addr_off + 8] == 0x10) {
1128 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1129 ((u32)buf[cur_addr_off + 1] << 16) |
1130 ((u32)buf[cur_addr_off + 2] << 8) |
1131 buf[cur_addr_off + 3];
1132 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
1133 ((u32)buf[cur_addr_off + 5] << 16) |
1134 ((u32)buf[cur_addr_off + 6] << 8) |
1135 buf[cur_addr_off + 7];
1136 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
1137 sys_info_addr, sys_info_size);
1138 if (sys_info_size != 96) {
1143 if (sys_info_addr < 0x1A0) {
1148 if ((sys_info_size + sys_info_addr) > 0x8000) {
1155 if (buf[cur_addr_off + 8] == 0x13)
1156 ms_card->ms_type |= MS_XC;
1158 #ifdef SUPPORT_PCGL_1P18
1164 #ifdef SUPPORT_PCGL_1P18
1165 if (buf[cur_addr_off + 8] == 0x15) {
1166 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1167 ((u32)buf[cur_addr_off + 1] << 16) |
1168 ((u32)buf[cur_addr_off + 2] << 8) |
1169 buf[cur_addr_off + 3];
1170 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1171 ((u32)buf[cur_addr_off + 5] << 16) |
1172 ((u32)buf[cur_addr_off + 6] << 8) |
1173 buf[cur_addr_off + 7];
1174 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1175 model_name_addr, model_name_size);
1176 if (model_name_size != 48) {
1181 if (model_name_addr < 0x1A0) {
1186 if ((model_name_size + model_name_addr) > 0x8000) {
1192 found_model_name = 1;
1195 if (found_sys_info && found_model_name)
1206 class_code = buf[sys_info_addr + 0];
1207 device_type = buf[sys_info_addr + 56];
1208 sub_class = buf[sys_info_addr + 46];
1210 if (CHK_MSXC(ms_card)) {
1211 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1212 ((u32)buf[sys_info_addr + 7] << 16) |
1213 ((u32)buf[sys_info_addr + 8] << 8) |
1214 buf[sys_info_addr + 9];
1215 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1216 ((u32)buf[sys_info_addr + 33] << 16) |
1217 ((u32)buf[sys_info_addr + 34] << 8) |
1218 buf[sys_info_addr + 35];
1219 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1220 xc_total_blk, xc_blk_size);
1222 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1223 buf[sys_info_addr + 7];
1224 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1225 buf[sys_info_addr + 3];
1226 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1227 total_blk, blk_size);
1230 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1231 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1232 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1233 total_blk, blk_size);
1236 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1237 class_code, device_type, sub_class);
1239 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1240 #ifdef SUPPORT_PCGL_1P18
1241 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1247 if (CHK_MSXC(ms_card)) {
1248 if (class_code != 0x03) {
1253 if (class_code != 0x02) {
1259 if (class_code != 0x02) {
1265 if (device_type != 0x00) {
1266 if ((device_type == 0x01) || (device_type == 0x02) ||
1267 (device_type == 0x03)) {
1268 chip->card_wp |= MS_CARD;
1275 if (sub_class & 0xC0) {
1280 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1281 class_code, device_type, sub_class);
1284 if (CHK_MSXC(ms_card)) {
1285 chip->capacity[chip->card2lun[MS_CARD]] =
1286 ms_card->capacity = xc_total_blk * xc_blk_size;
1288 chip->capacity[chip->card2lun[MS_CARD]] =
1289 ms_card->capacity = total_blk * blk_size;
1292 ms_card->capacity = total_blk * blk_size;
1293 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1296 return STATUS_SUCCESS;
1299 #ifdef SUPPORT_MAGIC_GATE
1300 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1301 int type, u8 mg_entry_num);
1304 static int reset_ms_pro(struct rtsx_chip *chip)
1306 struct ms_info *ms_card = &chip->ms_card;
1308 #ifdef XC_POWERCLASS
1309 u8 change_power_class;
1311 if (chip->ms_power_class_en & 0x02)
1312 change_power_class = 2;
1313 else if (chip->ms_power_class_en & 0x01)
1314 change_power_class = 1;
1316 change_power_class = 0;
1319 #ifdef XC_POWERCLASS
1322 retval = ms_pro_reset_flow(chip, 1);
1323 if (retval != STATUS_SUCCESS) {
1324 if (ms_card->switch_8bit_fail) {
1325 retval = ms_pro_reset_flow(chip, 0);
1326 if (retval != STATUS_SUCCESS) {
1336 retval = ms_read_attribute_info(chip);
1337 if (retval != STATUS_SUCCESS) {
1342 #ifdef XC_POWERCLASS
1343 if (CHK_HG8BIT(ms_card))
1344 change_power_class = 0;
1346 if (change_power_class && CHK_MSXC(ms_card)) {
1347 u8 power_class_en = chip->ms_power_class_en;
1349 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1351 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1352 change_power_class);
1354 if (change_power_class)
1355 power_class_en &= (1 << (change_power_class - 1));
1359 if (power_class_en) {
1360 u8 power_class_mode =
1361 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1362 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1364 if (change_power_class > power_class_mode)
1365 change_power_class = power_class_mode;
1366 if (change_power_class) {
1367 retval = msxc_change_power(chip,
1368 change_power_class);
1369 if (retval != STATUS_SUCCESS) {
1370 change_power_class--;
1378 #ifdef SUPPORT_MAGIC_GATE
1379 retval = mg_set_tpc_para_sub(chip, 0, 0);
1380 if (retval != STATUS_SUCCESS) {
1386 if (CHK_HG8BIT(ms_card))
1387 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1389 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1391 return STATUS_SUCCESS;
1394 static int ms_read_status_reg(struct rtsx_chip *chip)
1399 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1400 if (retval != STATUS_SUCCESS) {
1405 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1406 if (retval != STATUS_SUCCESS) {
1411 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1412 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1417 return STATUS_SUCCESS;
1420 static int ms_read_extra_data(struct rtsx_chip *chip,
1421 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1423 struct ms_info *ms_card = &chip->ms_card;
1427 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1429 if (retval != STATUS_SUCCESS) {
1434 if (CHK_MS4BIT(ms_card)) {
1435 /* Parallel interface */
1438 /* Serial interface */
1442 data[2] = (u8)(block_addr >> 8);
1443 data[3] = (u8)block_addr;
1447 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1448 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1450 if (retval == STATUS_SUCCESS)
1453 if (i == MS_MAX_RETRY_COUNT) {
1458 ms_set_err_code(chip, MS_NO_ERROR);
1460 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1461 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1462 if (retval == STATUS_SUCCESS)
1465 if (i == MS_MAX_RETRY_COUNT) {
1470 ms_set_err_code(chip, MS_NO_ERROR);
1471 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1472 if (retval != STATUS_SUCCESS) {
1477 if (val & INT_REG_CMDNK) {
1478 ms_set_err_code(chip, MS_CMD_NK);
1482 if (val & INT_REG_CED) {
1483 if (val & INT_REG_ERR) {
1484 retval = ms_read_status_reg(chip);
1485 if (retval != STATUS_SUCCESS) {
1490 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1491 MS_EXTRA_SIZE, SystemParm, 6);
1492 if (retval != STATUS_SUCCESS) {
1499 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1500 data, MS_EXTRA_SIZE);
1501 if (retval != STATUS_SUCCESS) {
1506 if (buf && buf_len) {
1507 if (buf_len > MS_EXTRA_SIZE)
1508 buf_len = MS_EXTRA_SIZE;
1509 memcpy(buf, data, buf_len);
1512 return STATUS_SUCCESS;
1515 static int ms_write_extra_data(struct rtsx_chip *chip,
1516 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1518 struct ms_info *ms_card = &chip->ms_card;
1522 if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1527 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1528 SystemParm, 6 + MS_EXTRA_SIZE);
1529 if (retval != STATUS_SUCCESS) {
1534 if (CHK_MS4BIT(ms_card))
1540 data[2] = (u8)(block_addr >> 8);
1541 data[3] = (u8)block_addr;
1545 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1546 data[i] = buf[i - 6];
1548 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1549 NO_WAIT_INT, data, 16);
1550 if (retval != STATUS_SUCCESS) {
1555 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1556 if (retval != STATUS_SUCCESS) {
1561 ms_set_err_code(chip, MS_NO_ERROR);
1562 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1563 if (retval != STATUS_SUCCESS) {
1568 if (val & INT_REG_CMDNK) {
1569 ms_set_err_code(chip, MS_CMD_NK);
1573 if (val & INT_REG_CED) {
1574 if (val & INT_REG_ERR) {
1575 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1581 return STATUS_SUCCESS;
1584 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1586 struct ms_info *ms_card = &chip->ms_card;
1590 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1592 if (retval != STATUS_SUCCESS) {
1597 if (CHK_MS4BIT(ms_card))
1603 data[2] = (u8)(block_addr >> 8);
1604 data[3] = (u8)block_addr;
1608 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1609 if (retval != STATUS_SUCCESS) {
1614 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1615 if (retval != STATUS_SUCCESS) {
1620 ms_set_err_code(chip, MS_NO_ERROR);
1621 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1622 if (retval != STATUS_SUCCESS) {
1627 if (val & INT_REG_CMDNK) {
1628 ms_set_err_code(chip, MS_CMD_NK);
1633 if (val & INT_REG_CED) {
1634 if (val & INT_REG_ERR) {
1635 if (!(val & INT_REG_BREQ)) {
1636 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1640 retval = ms_read_status_reg(chip);
1641 if (retval != STATUS_SUCCESS)
1642 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1645 if (!(val & INT_REG_BREQ)) {
1646 ms_set_err_code(chip, MS_BREQ_ERROR);
1653 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1655 if (retval != STATUS_SUCCESS) {
1660 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1665 return STATUS_SUCCESS;
1668 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1670 struct ms_info *ms_card = &chip->ms_card;
1672 u8 val, data[8], extra[MS_EXTRA_SIZE];
1674 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1675 if (retval != STATUS_SUCCESS) {
1680 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1682 if (retval != STATUS_SUCCESS) {
1687 ms_set_err_code(chip, MS_NO_ERROR);
1689 if (CHK_MS4BIT(ms_card))
1695 data[2] = (u8)(phy_blk >> 8);
1696 data[3] = (u8)phy_blk;
1699 data[6] = extra[0] & 0x7F;
1702 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1703 if (retval != STATUS_SUCCESS) {
1708 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1709 if (retval != STATUS_SUCCESS) {
1714 ms_set_err_code(chip, MS_NO_ERROR);
1715 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1716 if (retval != STATUS_SUCCESS) {
1721 if (val & INT_REG_CMDNK) {
1722 ms_set_err_code(chip, MS_CMD_NK);
1727 if (val & INT_REG_CED) {
1728 if (val & INT_REG_ERR) {
1729 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1735 return STATUS_SUCCESS;
1738 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1740 struct ms_info *ms_card = &chip->ms_card;
1744 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1746 if (retval != STATUS_SUCCESS) {
1751 ms_set_err_code(chip, MS_NO_ERROR);
1753 if (CHK_MS4BIT(ms_card))
1759 data[2] = (u8)(phy_blk >> 8);
1760 data[3] = (u8)phy_blk;
1764 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1765 if (retval != STATUS_SUCCESS) {
1771 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1772 if (retval != STATUS_SUCCESS) {
1777 ms_set_err_code(chip, MS_NO_ERROR);
1778 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1779 if (retval != STATUS_SUCCESS) {
1784 if (val & INT_REG_CMDNK) {
1790 ms_set_err_code(chip, MS_CMD_NK);
1791 ms_set_bad_block(chip, phy_blk);
1796 if (val & INT_REG_CED) {
1797 if (val & INT_REG_ERR) {
1798 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1804 return STATUS_SUCCESS;
1807 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1809 if (!extra || (extra_len < MS_EXTRA_SIZE))
1812 memset(extra, 0xFF, MS_EXTRA_SIZE);
1814 if (type == setPS_NG) {
1815 /* set page status as 1:NG,and block status keep 1:OK */
1818 /* set page status as 0:Data Error,and block status keep 1:OK */
1822 extra[2] = (u8)(log_blk >> 8);
1823 extra[3] = (u8)log_blk;
1826 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1827 u8 start_page, u8 end_page)
1830 u8 extra[MS_EXTRA_SIZE], i;
1832 memset(extra, 0xff, MS_EXTRA_SIZE);
1834 extra[0] = 0xf8; /* Block, page OK, data erased */
1836 extra[2] = (u8)(log_blk >> 8);
1837 extra[3] = (u8)log_blk;
1839 for (i = start_page; i < end_page; i++) {
1840 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1841 ms_set_err_code(chip, MS_NO_CARD);
1846 retval = ms_write_extra_data(chip, phy_blk, i,
1847 extra, MS_EXTRA_SIZE);
1848 if (retval != STATUS_SUCCESS) {
1854 return STATUS_SUCCESS;
1857 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1858 u16 log_blk, u8 start_page, u8 end_page)
1860 struct ms_info *ms_card = &chip->ms_card;
1861 bool uncorrect_flag = false;
1862 int retval, rty_cnt;
1863 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1865 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1866 old_blk, new_blk, log_blk);
1867 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1868 start_page, end_page);
1870 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1871 if (retval != STATUS_SUCCESS) {
1876 retval = ms_read_status_reg(chip);
1877 if (retval != STATUS_SUCCESS) {
1882 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1888 if (val & BUF_FULL) {
1889 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1890 if (retval != STATUS_SUCCESS) {
1895 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1896 if (retval != STATUS_SUCCESS) {
1901 if (!(val & INT_REG_CED)) {
1902 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1908 for (i = start_page; i < end_page; i++) {
1909 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1910 ms_set_err_code(chip, MS_NO_CARD);
1915 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1917 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1918 MS_EXTRA_SIZE, SystemParm, 6);
1919 if (retval != STATUS_SUCCESS) {
1924 ms_set_err_code(chip, MS_NO_ERROR);
1926 if (CHK_MS4BIT(ms_card))
1932 data[2] = (u8)(old_blk >> 8);
1933 data[3] = (u8)old_blk;
1937 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1939 if (retval != STATUS_SUCCESS) {
1944 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1945 if (retval != STATUS_SUCCESS) {
1950 ms_set_err_code(chip, MS_NO_ERROR);
1951 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1952 if (retval != STATUS_SUCCESS) {
1957 if (val & INT_REG_CMDNK) {
1958 ms_set_err_code(chip, MS_CMD_NK);
1963 if (val & INT_REG_CED) {
1964 if (val & INT_REG_ERR) {
1965 retval = ms_read_status_reg(chip);
1966 if (retval != STATUS_SUCCESS) {
1967 uncorrect_flag = true;
1968 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1970 uncorrect_flag = false;
1973 retval = ms_transfer_tpc(chip,
1977 if (retval != STATUS_SUCCESS) {
1982 if (uncorrect_flag) {
1983 ms_set_page_status(log_blk, setPS_NG,
1984 extra, MS_EXTRA_SIZE);
1988 ms_write_extra_data(chip, old_blk, i,
1989 extra, MS_EXTRA_SIZE);
1990 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1992 MS_SET_BAD_BLOCK_FLG(ms_card);
1994 ms_set_page_status(log_blk, setPS_Error,
1995 extra, MS_EXTRA_SIZE);
1996 ms_write_extra_data(chip, new_blk, i,
1997 extra, MS_EXTRA_SIZE);
2001 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
2003 retval = ms_transfer_tpc(
2008 if (retval == STATUS_SUCCESS)
2011 if (rty_cnt == MS_MAX_RETRY_COUNT) {
2017 if (!(val & INT_REG_BREQ)) {
2018 ms_set_err_code(chip, MS_BREQ_ERROR);
2024 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2025 MS_EXTRA_SIZE, SystemParm, (6 + MS_EXTRA_SIZE));
2027 ms_set_err_code(chip, MS_NO_ERROR);
2029 if (CHK_MS4BIT(ms_card))
2035 data[2] = (u8)(new_blk >> 8);
2036 data[3] = (u8)new_blk;
2040 if ((extra[0] & 0x60) != 0x60)
2046 data[6 + 2] = (u8)(log_blk >> 8);
2047 data[6 + 3] = (u8)log_blk;
2049 for (j = 4; j <= MS_EXTRA_SIZE; j++)
2052 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
2053 NO_WAIT_INT, data, 16);
2054 if (retval != STATUS_SUCCESS) {
2059 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2060 if (retval != STATUS_SUCCESS) {
2065 ms_set_err_code(chip, MS_NO_ERROR);
2066 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2067 if (retval != STATUS_SUCCESS) {
2072 if (val & INT_REG_CMDNK) {
2073 ms_set_err_code(chip, MS_CMD_NK);
2078 if (val & INT_REG_CED) {
2079 if (val & INT_REG_ERR) {
2080 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
2087 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2088 MS_EXTRA_SIZE, SystemParm, 7);
2089 if (retval != STATUS_SUCCESS) {
2094 ms_set_err_code(chip, MS_NO_ERROR);
2096 if (CHK_MS4BIT(ms_card))
2102 data[2] = (u8)(old_blk >> 8);
2103 data[3] = (u8)old_blk;
2109 retval = ms_write_bytes(chip, WRITE_REG, 7,
2110 NO_WAIT_INT, data, 8);
2111 if (retval != STATUS_SUCCESS) {
2116 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2117 if (retval != STATUS_SUCCESS) {
2122 ms_set_err_code(chip, MS_NO_ERROR);
2123 retval = ms_read_bytes(chip, GET_INT, 1,
2124 NO_WAIT_INT, &val, 1);
2125 if (retval != STATUS_SUCCESS) {
2130 if (val & INT_REG_CMDNK) {
2131 ms_set_err_code(chip, MS_CMD_NK);
2136 if (val & INT_REG_CED) {
2137 if (val & INT_REG_ERR) {
2138 ms_set_err_code(chip,
2139 MS_FLASH_WRITE_ERROR);
2147 return STATUS_SUCCESS;
2150 static int reset_ms(struct rtsx_chip *chip)
2152 struct ms_info *ms_card = &chip->ms_card;
2154 u16 i, reg_addr, block_size;
2155 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
2156 #ifndef SUPPORT_MAGIC_GATE
2160 retval = ms_prepare_reset(chip);
2161 if (retval != STATUS_SUCCESS) {
2166 ms_card->ms_type |= TYPE_MS;
2168 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
2169 if (retval != STATUS_SUCCESS) {
2174 retval = ms_read_status_reg(chip);
2175 if (retval != STATUS_SUCCESS) {
2180 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
2185 if (val & WRT_PRTCT)
2186 chip->card_wp |= MS_CARD;
2188 chip->card_wp &= ~MS_CARD;
2193 /* Search Boot Block */
2194 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
2195 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2196 ms_set_err_code(chip, MS_NO_CARD);
2201 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
2202 if (retval != STATUS_SUCCESS) {
2207 if (extra[0] & BLOCK_OK) {
2208 if (!(extra[1] & NOT_BOOT_BLOCK)) {
2209 ms_card->boot_block = i;
2216 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
2217 dev_dbg(rtsx_dev(chip), "No boot block found!");
2222 for (j = 0; j < 3; j++) {
2223 retval = ms_read_page(chip, ms_card->boot_block, j);
2224 if (retval != STATUS_SUCCESS) {
2225 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
2226 i = ms_card->boot_block + 1;
2227 ms_set_err_code(chip, MS_NO_ERROR);
2233 retval = ms_read_page(chip, ms_card->boot_block, 0);
2234 if (retval != STATUS_SUCCESS) {
2239 /* Read MS system information as sys_info */
2240 rtsx_init_cmd(chip);
2242 for (i = 0; i < 96; i++)
2243 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
2245 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2251 ptr = rtsx_get_cmd_data(chip);
2252 memcpy(ms_card->raw_sys_info, ptr, 96);
2254 /* Read useful block contents */
2255 rtsx_init_cmd(chip);
2257 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2258 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2260 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2262 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2264 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2265 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2267 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2268 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
2270 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2276 ptr = rtsx_get_cmd_data(chip);
2278 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
2279 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
2282 * HEADER_ID0, HEADER_ID1
2284 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2285 i = ms_card->boot_block + 1;
2290 * PAGE_SIZE_0, PAGE_SIZE_1
2292 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2293 i = ms_card->boot_block + 1;
2297 if ((ptr[14] == 1) || (ptr[14] == 3))
2298 chip->card_wp |= MS_CARD;
2300 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2301 block_size = ((u16)ptr[6] << 8) | ptr[7];
2302 if (block_size == 0x0010) {
2303 /* Block size 16KB */
2304 ms_card->block_shift = 5;
2305 ms_card->page_off = 0x1F;
2306 } else if (block_size == 0x0008) {
2307 /* Block size 8KB */
2308 ms_card->block_shift = 4;
2309 ms_card->page_off = 0x0F;
2312 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2313 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2315 #ifdef SUPPORT_MAGIC_GATE
2318 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
2319 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
2320 ms_card->capacity = 0x1EE0;
2321 } else { /* Effective block for 8MB: 0x3E0 */
2322 ms_card->capacity = 0x3DE0;
2324 } else { /* 16MB, 32MB, 64MB or 128MB */
2325 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
2326 ms_card->capacity = 0x7BC0;
2327 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2328 ms_card->capacity = 0xF7C0;
2329 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2330 ms_card->capacity = 0x1EF80;
2331 } else { /* Effective block for 128MB: 0x1F00 */
2332 ms_card->capacity = 0x3DF00;
2336 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2337 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2339 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2342 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2344 /* Switch I/F Mode */
2346 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2347 if (retval != STATUS_SUCCESS) {
2352 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2357 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2363 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2365 if (retval != STATUS_SUCCESS) {
2370 retval = rtsx_write_register(chip, MS_CFG,
2371 0x58 | MS_NO_CHECK_INT,
2372 MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
2378 ms_card->ms_type |= MS_4BIT;
2381 if (CHK_MS4BIT(ms_card))
2382 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2384 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2386 return STATUS_SUCCESS;
2389 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2391 struct ms_info *ms_card = &chip->ms_card;
2392 int size, i, seg_no, retval;
2393 u16 defect_block, reg_addr;
2396 ms_card->segment_cnt = ms_card->total_block >> 9;
2397 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2398 ms_card->segment_cnt);
2400 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2401 ms_card->segment = vzalloc(size);
2402 if (!ms_card->segment) {
2407 retval = ms_read_page(chip, ms_card->boot_block, 1);
2408 if (retval != STATUS_SUCCESS) {
2413 reg_addr = PPBUF_BASE2;
2414 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2417 retval = rtsx_read_register(chip, reg_addr++, &val1);
2418 if (retval != STATUS_SUCCESS) {
2423 retval = rtsx_read_register(chip, reg_addr++, &val2);
2424 if (retval != STATUS_SUCCESS) {
2429 defect_block = ((u16)val1 << 8) | val2;
2430 if (defect_block == 0xFFFF)
2433 seg_no = defect_block / 512;
2435 block_no = ms_card->segment[seg_no].disable_count++;
2436 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2439 for (i = 0; i < ms_card->segment_cnt; i++) {
2440 ms_card->segment[i].build_flag = 0;
2441 ms_card->segment[i].l2p_table = NULL;
2442 ms_card->segment[i].free_table = NULL;
2443 ms_card->segment[i].get_index = 0;
2444 ms_card->segment[i].set_index = 0;
2445 ms_card->segment[i].unused_blk_cnt = 0;
2447 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2448 i, ms_card->segment[i].disable_count);
2451 return STATUS_SUCCESS;
2454 vfree(ms_card->segment);
2455 ms_card->segment = NULL;
2460 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2462 struct ms_info *ms_card = &chip->ms_card;
2463 struct zone_entry *segment;
2465 if (!ms_card->segment)
2468 segment = &ms_card->segment[seg_no];
2470 if (segment->l2p_table)
2471 return segment->l2p_table[log_off];
2476 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2477 int seg_no, u16 log_off, u16 phy_blk)
2479 struct ms_info *ms_card = &chip->ms_card;
2480 struct zone_entry *segment;
2482 if (!ms_card->segment)
2485 segment = &ms_card->segment[seg_no];
2486 if (segment->l2p_table)
2487 segment->l2p_table[log_off] = phy_blk;
2490 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2492 struct ms_info *ms_card = &chip->ms_card;
2493 struct zone_entry *segment;
2496 seg_no = (int)phy_blk >> 9;
2497 segment = &ms_card->segment[seg_no];
2499 segment->free_table[segment->set_index++] = phy_blk;
2500 if (segment->set_index >= MS_FREE_TABLE_CNT)
2501 segment->set_index = 0;
2503 segment->unused_blk_cnt++;
2506 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2508 struct ms_info *ms_card = &chip->ms_card;
2509 struct zone_entry *segment;
2512 segment = &ms_card->segment[seg_no];
2514 if (segment->unused_blk_cnt <= 0)
2517 phy_blk = segment->free_table[segment->get_index];
2518 segment->free_table[segment->get_index++] = 0xFFFF;
2519 if (segment->get_index >= MS_FREE_TABLE_CNT)
2520 segment->get_index = 0;
2522 segment->unused_blk_cnt--;
2527 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2528 2974, 3470, 3966, 4462, 4958,
2529 5454, 5950, 6446, 6942, 7438,
2532 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2533 u16 log_off, u8 us1, u8 us2)
2535 struct ms_info *ms_card = &chip->ms_card;
2536 struct zone_entry *segment;
2540 seg_no = (int)phy_blk >> 9;
2541 segment = &ms_card->segment[seg_no];
2542 tmp_blk = segment->l2p_table[log_off];
2546 if (!(chip->card_wp & MS_CARD))
2547 ms_erase_block(chip, tmp_blk);
2549 ms_set_unused_block(chip, tmp_blk);
2550 segment->l2p_table[log_off] = phy_blk;
2552 if (!(chip->card_wp & MS_CARD))
2553 ms_erase_block(chip, phy_blk);
2555 ms_set_unused_block(chip, phy_blk);
2558 if (phy_blk < tmp_blk) {
2559 if (!(chip->card_wp & MS_CARD))
2560 ms_erase_block(chip, phy_blk);
2562 ms_set_unused_block(chip, phy_blk);
2564 if (!(chip->card_wp & MS_CARD))
2565 ms_erase_block(chip, tmp_blk);
2567 ms_set_unused_block(chip, tmp_blk);
2568 segment->l2p_table[log_off] = phy_blk;
2572 return STATUS_SUCCESS;
2575 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2577 struct ms_info *ms_card = &chip->ms_card;
2578 struct zone_entry *segment;
2580 int retval, table_size, disable_cnt, i;
2581 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2582 u8 extra[MS_EXTRA_SIZE], us1, us2;
2584 dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
2586 if (!ms_card->segment) {
2587 retval = ms_init_l2p_tbl(chip);
2588 if (retval != STATUS_SUCCESS) {
2594 if (ms_card->segment[seg_no].build_flag) {
2595 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2597 return STATUS_SUCCESS;
2605 segment = &ms_card->segment[seg_no];
2607 if (!segment->l2p_table) {
2608 segment->l2p_table = vmalloc(table_size * 2);
2609 if (!segment->l2p_table) {
2614 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2616 if (!segment->free_table) {
2617 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2618 if (!segment->free_table) {
2623 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2625 start = (u16)seg_no << 9;
2626 end = (u16)(seg_no + 1) << 9;
2628 disable_cnt = segment->disable_count;
2630 segment->get_index = segment->set_index = 0;
2631 segment->unused_blk_cnt = 0;
2633 for (phy_blk = start; phy_blk < end; phy_blk++) {
2635 defect_flag = false;
2636 for (i = 0; i < segment->disable_count; i++) {
2637 if (phy_blk == segment->defect_list[i]) {
2648 retval = ms_read_extra_data(chip, phy_blk, 0,
2649 extra, MS_EXTRA_SIZE);
2650 if (retval != STATUS_SUCCESS) {
2651 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2652 ms_set_bad_block(chip, phy_blk);
2656 if (seg_no == ms_card->segment_cnt - 1) {
2657 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2658 if (!(chip->card_wp & MS_CARD)) {
2659 retval = ms_erase_block(chip, phy_blk);
2660 if (retval != STATUS_SUCCESS)
2668 if (!(extra[0] & BLOCK_OK))
2670 if (!(extra[1] & NOT_BOOT_BLOCK))
2672 if ((extra[0] & PAGE_OK) != PAGE_OK)
2675 log_blk = ((u16)extra[2] << 8) | extra[3];
2677 if (log_blk == 0xFFFF) {
2678 if (!(chip->card_wp & MS_CARD)) {
2679 retval = ms_erase_block(chip, phy_blk);
2680 if (retval != STATUS_SUCCESS)
2683 ms_set_unused_block(chip, phy_blk);
2687 if ((log_blk < ms_start_idx[seg_no]) ||
2688 (log_blk >= ms_start_idx[seg_no + 1])) {
2689 if (!(chip->card_wp & MS_CARD)) {
2690 retval = ms_erase_block(chip, phy_blk);
2691 if (retval != STATUS_SUCCESS)
2694 ms_set_unused_block(chip, phy_blk);
2698 idx = log_blk - ms_start_idx[seg_no];
2700 if (segment->l2p_table[idx] == 0xFFFF) {
2701 segment->l2p_table[idx] = phy_blk;
2705 us1 = extra[0] & 0x10;
2706 tmp_blk = segment->l2p_table[idx];
2707 retval = ms_read_extra_data(chip, tmp_blk, 0,
2708 extra, MS_EXTRA_SIZE);
2709 if (retval != STATUS_SUCCESS)
2711 us2 = extra[0] & 0x10;
2713 (void)ms_arbitrate_l2p(chip, phy_blk,
2714 log_blk - ms_start_idx[seg_no], us1, us2);
2718 segment->build_flag = 1;
2720 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2721 segment->unused_blk_cnt);
2723 /* Logical Address Confirmation Process */
2724 if (seg_no == ms_card->segment_cnt - 1) {
2725 if (segment->unused_blk_cnt < 2)
2726 chip->card_wp |= MS_CARD;
2728 if (segment->unused_blk_cnt < 1)
2729 chip->card_wp |= MS_CARD;
2732 if (chip->card_wp & MS_CARD)
2733 return STATUS_SUCCESS;
2735 for (log_blk = ms_start_idx[seg_no];
2736 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2737 idx = log_blk - ms_start_idx[seg_no];
2738 if (segment->l2p_table[idx] == 0xFFFF) {
2739 phy_blk = ms_get_unused_block(chip, seg_no);
2740 if (phy_blk == 0xFFFF) {
2741 chip->card_wp |= MS_CARD;
2742 return STATUS_SUCCESS;
2744 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2745 if (retval != STATUS_SUCCESS) {
2750 segment->l2p_table[idx] = phy_blk;
2751 if (seg_no == ms_card->segment_cnt - 1) {
2752 if (segment->unused_blk_cnt < 2) {
2753 chip->card_wp |= MS_CARD;
2754 return STATUS_SUCCESS;
2757 if (segment->unused_blk_cnt < 1) {
2758 chip->card_wp |= MS_CARD;
2759 return STATUS_SUCCESS;
2765 /* Make boot block be the first normal block */
2767 for (log_blk = 0; log_blk < 494; log_blk++) {
2768 tmp_blk = segment->l2p_table[log_blk];
2769 if (tmp_blk < ms_card->boot_block) {
2770 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2772 if (chip->card_wp & MS_CARD)
2775 phy_blk = ms_get_unused_block(chip, 0);
2776 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2777 log_blk, 0, ms_card->page_off + 1);
2778 if (retval != STATUS_SUCCESS) {
2783 segment->l2p_table[log_blk] = phy_blk;
2785 retval = ms_set_bad_block(chip, tmp_blk);
2786 if (retval != STATUS_SUCCESS) {
2794 return STATUS_SUCCESS;
2797 segment->build_flag = 0;
2798 vfree(segment->l2p_table);
2799 segment->l2p_table = NULL;
2800 vfree(segment->free_table);
2801 segment->free_table = NULL;
2806 int reset_ms_card(struct rtsx_chip *chip)
2808 struct ms_info *ms_card = &chip->ms_card;
2811 memset(ms_card, 0, sizeof(struct ms_info));
2813 retval = enable_card_clock(chip, MS_CARD);
2814 if (retval != STATUS_SUCCESS) {
2819 retval = select_card(chip, MS_CARD);
2820 if (retval != STATUS_SUCCESS) {
2825 ms_card->ms_type = 0;
2827 retval = reset_ms_pro(chip);
2828 if (retval != STATUS_SUCCESS) {
2829 if (ms_card->check_ms_flow) {
2830 retval = reset_ms(chip);
2831 if (retval != STATUS_SUCCESS) {
2841 retval = ms_set_init_para(chip);
2842 if (retval != STATUS_SUCCESS) {
2847 if (!CHK_MSPRO(ms_card)) {
2848 /* Build table for the last segment,
2849 * to check if L2P table block exists, erasing it
2851 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2852 if (retval != STATUS_SUCCESS) {
2858 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2860 return STATUS_SUCCESS;
2863 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2864 u32 start_sec, u16 sec_cnt, u8 cmd)
2870 data[1] = (u8)(sec_cnt >> 8);
2871 data[2] = (u8)sec_cnt;
2872 data[3] = (u8)(start_sec >> 24);
2873 data[4] = (u8)(start_sec >> 16);
2874 data[5] = (u8)(start_sec >> 8);
2875 data[6] = (u8)start_sec;
2878 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2879 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2881 if (retval == STATUS_SUCCESS)
2884 if (i == MS_MAX_RETRY_COUNT) {
2889 return STATUS_SUCCESS;
2892 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2894 struct ms_info *ms_card = &chip->ms_card;
2897 if (ms_card->seq_mode) {
2898 retval = ms_switch_clock(chip);
2899 if (retval != STATUS_SUCCESS)
2902 ms_card->seq_mode = 0;
2903 ms_card->total_sec_cnt = 0;
2904 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2906 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2910 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2912 struct ms_info *ms_card = &chip->ms_card;
2915 if (chip->asic_code) {
2916 if (ms_card->ms_clock > 30)
2917 ms_card->ms_clock -= 20;
2919 if (ms_card->ms_clock == CLK_80)
2920 ms_card->ms_clock = CLK_60;
2921 else if (ms_card->ms_clock == CLK_60)
2922 ms_card->ms_clock = CLK_40;
2925 retval = ms_switch_clock(chip);
2926 if (retval != STATUS_SUCCESS) {
2931 return STATUS_SUCCESS;
2934 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2935 struct rtsx_chip *chip, u32 start_sector,
2938 struct ms_info *ms_card = &chip->ms_card;
2939 bool mode_2k = false;
2942 u8 val, trans_mode, rw_tpc, rw_cmd;
2944 ms_set_err_code(chip, MS_NO_ERROR);
2946 ms_card->cleanup_counter = 0;
2948 if (CHK_MSHG(ms_card)) {
2949 if ((start_sector % 4) || (sector_cnt % 4)) {
2950 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2951 rw_tpc = PRO_READ_LONG_DATA;
2952 rw_cmd = PRO_READ_DATA;
2954 rw_tpc = PRO_WRITE_LONG_DATA;
2955 rw_cmd = PRO_WRITE_DATA;
2958 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2959 rw_tpc = PRO_READ_QUAD_DATA;
2960 rw_cmd = PRO_READ_2K_DATA;
2962 rw_tpc = PRO_WRITE_QUAD_DATA;
2963 rw_cmd = PRO_WRITE_2K_DATA;
2968 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2969 rw_tpc = PRO_READ_LONG_DATA;
2970 rw_cmd = PRO_READ_DATA;
2972 rw_tpc = PRO_WRITE_LONG_DATA;
2973 rw_cmd = PRO_WRITE_DATA;
2977 retval = ms_switch_clock(chip);
2978 if (retval != STATUS_SUCCESS) {
2983 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2984 trans_mode = MS_TM_AUTO_READ;
2986 trans_mode = MS_TM_AUTO_WRITE;
2988 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
2994 if (ms_card->seq_mode) {
2995 if ((ms_card->pre_dir != srb->sc_data_direction)
2996 || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector)
2997 || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ))
2998 || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ))
2999 || !(val & MS_INT_BREQ)
3000 || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
3001 ms_card->seq_mode = 0;
3002 ms_card->total_sec_cnt = 0;
3003 if (val & MS_INT_BREQ) {
3004 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3005 if (retval != STATUS_SUCCESS) {
3010 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
3015 if (!ms_card->seq_mode) {
3016 ms_card->total_sec_cnt = 0;
3017 if (sector_cnt >= SEQ_START_CRITERIA) {
3018 if ((ms_card->capacity - start_sector) > 0xFE00)
3021 count = (u16)(ms_card->capacity - start_sector);
3023 if (count > sector_cnt) {
3025 ms_card->seq_mode = MODE_2K_SEQ;
3027 ms_card->seq_mode = MODE_512_SEQ;
3032 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
3033 if (retval != STATUS_SUCCESS) {
3034 ms_card->seq_mode = 0;
3040 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
3041 WAIT_INT, mode_2k, scsi_sg_count(srb),
3042 scsi_sglist(srb), scsi_bufflen(srb));
3043 if (retval != STATUS_SUCCESS) {
3044 ms_card->seq_mode = 0;
3045 rtsx_read_register(chip, MS_TRANS_CFG, &val);
3046 rtsx_clear_ms_error(chip);
3048 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3049 chip->rw_need_retry = 0;
3050 dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
3055 if (val & MS_INT_BREQ)
3056 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3058 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3059 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
3060 chip->rw_need_retry = 1;
3061 ms_auto_tune_clock(chip);
3068 if (ms_card->seq_mode) {
3069 ms_card->pre_sec_addr = start_sector;
3070 ms_card->pre_sec_cnt = sector_cnt;
3071 ms_card->pre_dir = srb->sc_data_direction;
3072 ms_card->total_sec_cnt += sector_cnt;
3075 return STATUS_SUCCESS;
3078 static int mspro_read_format_progress(struct rtsx_chip *chip,
3079 const int short_data_len)
3081 struct ms_info *ms_card = &chip->ms_card;
3083 u32 total_progress, cur_progress;
3087 dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n",
3090 retval = ms_switch_clock(chip);
3091 if (retval != STATUS_SUCCESS) {
3092 ms_card->format_status = FORMAT_FAIL;
3097 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3098 if (retval != STATUS_SUCCESS) {
3099 ms_card->format_status = FORMAT_FAIL;
3104 if (!(tmp & MS_INT_BREQ)) {
3105 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) {
3106 ms_card->format_status = FORMAT_SUCCESS;
3107 return STATUS_SUCCESS;
3109 ms_card->format_status = FORMAT_FAIL;
3114 if (short_data_len >= 256)
3117 cnt = (u8)short_data_len;
3119 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
3121 if (retval != STATUS_SUCCESS) {
3122 ms_card->format_status = FORMAT_FAIL;
3127 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
3129 if (retval != STATUS_SUCCESS) {
3130 ms_card->format_status = FORMAT_FAIL;
3135 total_progress = (data[0] << 24) | (data[1] << 16) |
3136 (data[2] << 8) | data[3];
3137 cur_progress = (data[4] << 24) | (data[5] << 16) |
3138 (data[6] << 8) | data[7];
3140 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
3141 total_progress, cur_progress);
3143 if (total_progress == 0) {
3144 ms_card->progress = 0;
3146 u64 ulltmp = (u64)cur_progress * (u64)65535;
3148 do_div(ulltmp, total_progress);
3149 ms_card->progress = (u16)ulltmp;
3151 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
3153 for (i = 0; i < 5000; i++) {
3154 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3155 if (retval != STATUS_SUCCESS) {
3156 ms_card->format_status = FORMAT_FAIL;
3160 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
3161 MS_INT_BREQ | MS_INT_ERR))
3167 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
3168 if (retval != STATUS_SUCCESS) {
3169 ms_card->format_status = FORMAT_FAIL;
3175 ms_card->format_status = FORMAT_FAIL;
3180 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3181 ms_card->format_status = FORMAT_FAIL;
3186 if (tmp & MS_INT_CED) {
3187 ms_card->format_status = FORMAT_SUCCESS;
3188 ms_card->pro_under_formatting = 0;
3189 } else if (tmp & MS_INT_BREQ) {
3190 ms_card->format_status = FORMAT_IN_PROGRESS;
3192 ms_card->format_status = FORMAT_FAIL;
3193 ms_card->pro_under_formatting = 0;
3198 return STATUS_SUCCESS;
3201 void mspro_polling_format_status(struct rtsx_chip *chip)
3203 struct ms_info *ms_card = &chip->ms_card;
3206 if (ms_card->pro_under_formatting &&
3207 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
3208 rtsx_set_stat(chip, RTSX_STAT_RUN);
3210 for (i = 0; i < 65535; i++) {
3211 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
3212 if (ms_card->format_status != FORMAT_IN_PROGRESS)
3218 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3219 int short_data_len, bool quick_format)
3221 struct ms_info *ms_card = &chip->ms_card;
3226 retval = ms_switch_clock(chip);
3227 if (retval != STATUS_SUCCESS) {
3232 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
3233 if (retval != STATUS_SUCCESS) {
3239 switch (short_data_len) {
3255 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3256 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
3257 NO_WAIT_INT, buf, 2);
3258 if (retval == STATUS_SUCCESS)
3261 if (i == MS_MAX_RETRY_COUNT) {
3271 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
3272 if (retval != STATUS_SUCCESS) {
3277 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3283 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3288 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
3289 ms_card->pro_under_formatting = 1;
3290 ms_card->progress = 0;
3291 ms_card->format_status = FORMAT_IN_PROGRESS;
3292 return STATUS_SUCCESS;
3295 if (tmp & MS_INT_CED) {
3296 ms_card->pro_under_formatting = 0;
3297 ms_card->progress = 0;
3298 ms_card->format_status = FORMAT_SUCCESS;
3299 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3300 return STATUS_SUCCESS;
3307 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
3308 u16 log_blk, u8 start_page, u8 end_page,
3309 u8 *buf, unsigned int *index,
3310 unsigned int *offset)
3312 struct ms_info *ms_card = &chip->ms_card;
3314 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
3317 retval = ms_read_extra_data(chip, phy_blk, start_page,
3318 extra, MS_EXTRA_SIZE);
3319 if (retval == STATUS_SUCCESS) {
3320 if ((extra[1] & 0x30) != 0x30) {
3321 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3327 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3329 if (retval != STATUS_SUCCESS) {
3334 if (CHK_MS4BIT(ms_card))
3340 data[2] = (u8)(phy_blk >> 8);
3341 data[3] = (u8)phy_blk;
3343 data[5] = start_page;
3345 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3346 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3348 if (retval == STATUS_SUCCESS)
3351 if (i == MS_MAX_RETRY_COUNT) {
3356 ms_set_err_code(chip, MS_NO_ERROR);
3358 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3359 if (retval != STATUS_SUCCESS) {
3366 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3367 ms_set_err_code(chip, MS_NO_ERROR);
3369 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3370 ms_set_err_code(chip, MS_NO_CARD);
3375 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3376 if (retval != STATUS_SUCCESS) {
3381 if (val & INT_REG_CMDNK) {
3382 ms_set_err_code(chip, MS_CMD_NK);
3386 if (val & INT_REG_ERR) {
3387 if (val & INT_REG_BREQ) {
3388 retval = ms_read_status_reg(chip);
3389 if (retval != STATUS_SUCCESS) {
3390 if (!(chip->card_wp & MS_CARD)) {
3392 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
3393 ms_write_extra_data(chip, phy_blk,
3394 page_addr, extra, MS_EXTRA_SIZE);
3396 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3401 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3406 if (!(val & INT_REG_BREQ)) {
3407 ms_set_err_code(chip, MS_BREQ_ERROR);
3413 if (page_addr == (end_page - 1)) {
3414 if (!(val & INT_REG_CED)) {
3415 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3416 if (retval != STATUS_SUCCESS) {
3422 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3424 if (retval != STATUS_SUCCESS) {
3429 if (!(val & INT_REG_CED)) {
3430 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3435 trans_cfg = NO_WAIT_INT;
3437 trans_cfg = WAIT_INT;
3440 rtsx_init_cmd(chip);
3442 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3443 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3445 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3448 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3450 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3451 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3452 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3453 MS_TRANSFER_END, MS_TRANSFER_END);
3455 rtsx_send_cmd_no_wait(chip);
3457 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
3458 512, scsi_sg_count(chip->srb),
3459 index, offset, DMA_FROM_DEVICE,
3462 if (retval == -ETIMEDOUT) {
3463 ms_set_err_code(chip, MS_TO_ERROR);
3464 rtsx_clear_ms_error(chip);
3466 return STATUS_TIMEDOUT;
3469 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3470 if (retval != STATUS_SUCCESS) {
3471 ms_set_err_code(chip, MS_TO_ERROR);
3472 rtsx_clear_ms_error(chip);
3474 return STATUS_TIMEDOUT;
3476 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3477 ms_set_err_code(chip, MS_CRC16_ERROR);
3478 rtsx_clear_ms_error(chip);
3484 if (scsi_sg_count(chip->srb) == 0)
3488 return STATUS_SUCCESS;
3491 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3492 u16 new_blk, u16 log_blk, u8 start_page,
3493 u8 end_page, u8 *buf, unsigned int *index,
3494 unsigned int *offset)
3496 struct ms_info *ms_card = &chip->ms_card;
3498 u8 page_addr, val, data[16];
3502 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3504 if (retval != STATUS_SUCCESS) {
3509 if (CHK_MS4BIT(ms_card))
3515 data[2] = (u8)(old_blk >> 8);
3516 data[3] = (u8)old_blk;
3522 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3524 if (retval != STATUS_SUCCESS) {
3529 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3530 if (retval != STATUS_SUCCESS) {
3535 ms_set_err_code(chip, MS_NO_ERROR);
3536 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3538 if (retval != STATUS_SUCCESS) {
3544 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3545 SystemParm, (6 + MS_EXTRA_SIZE));
3546 if (retval != STATUS_SUCCESS) {
3551 ms_set_err_code(chip, MS_NO_ERROR);
3553 if (CHK_MS4BIT(ms_card))
3559 data[2] = (u8)(new_blk >> 8);
3560 data[3] = (u8)new_blk;
3561 if ((end_page - start_page) == 1)
3566 data[5] = start_page;
3569 data[8] = (u8)(log_blk >> 8);
3570 data[9] = (u8)log_blk;
3572 for (i = 0x0A; i < 0x10; i++)
3575 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3576 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3577 NO_WAIT_INT, data, 16);
3578 if (retval == STATUS_SUCCESS)
3581 if (i == MS_MAX_RETRY_COUNT) {
3586 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3587 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3588 if (retval == STATUS_SUCCESS)
3591 if (i == MS_MAX_RETRY_COUNT) {
3596 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3597 if (retval != STATUS_SUCCESS) {
3603 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3604 ms_set_err_code(chip, MS_NO_ERROR);
3606 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3607 ms_set_err_code(chip, MS_NO_CARD);
3612 if (val & INT_REG_CMDNK) {
3613 ms_set_err_code(chip, MS_CMD_NK);
3617 if (val & INT_REG_ERR) {
3618 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3622 if (!(val & INT_REG_BREQ)) {
3623 ms_set_err_code(chip, MS_BREQ_ERROR);
3630 rtsx_init_cmd(chip);
3632 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3633 0xFF, WRITE_PAGE_DATA);
3634 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3636 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3639 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3641 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3642 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3643 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3644 MS_TRANSFER_END, MS_TRANSFER_END);
3646 rtsx_send_cmd_no_wait(chip);
3648 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
3649 512, scsi_sg_count(chip->srb),
3650 index, offset, DMA_TO_DEVICE,
3653 ms_set_err_code(chip, MS_TO_ERROR);
3654 rtsx_clear_ms_error(chip);
3656 if (retval == -ETIMEDOUT) {
3658 return STATUS_TIMEDOUT;
3664 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3665 if (retval != STATUS_SUCCESS) {
3670 if ((end_page - start_page) == 1) {
3671 if (!(val & INT_REG_CED)) {
3672 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3677 if (page_addr == (end_page - 1)) {
3678 if (!(val & INT_REG_CED)) {
3679 retval = ms_send_cmd(chip, BLOCK_END,
3681 if (retval != STATUS_SUCCESS) {
3687 retval = ms_read_bytes(chip, GET_INT, 1,
3688 NO_WAIT_INT, &val, 1);
3689 if (retval != STATUS_SUCCESS) {
3695 if ((page_addr == (end_page - 1)) ||
3696 (page_addr == ms_card->page_off)) {
3697 if (!(val & INT_REG_CED)) {
3698 ms_set_err_code(chip,
3699 MS_FLASH_WRITE_ERROR);
3706 if (scsi_sg_count(chip->srb) == 0)
3710 return STATUS_SUCCESS;
3713 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3714 u16 log_blk, u8 page_off)
3716 struct ms_info *ms_card = &chip->ms_card;
3719 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3720 page_off, ms_card->page_off + 1);
3721 if (retval != STATUS_SUCCESS) {
3726 seg_no = old_blk >> 9;
3728 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3729 MS_CLR_BAD_BLOCK_FLG(ms_card);
3730 ms_set_bad_block(chip, old_blk);
3732 retval = ms_erase_block(chip, old_blk);
3733 if (retval == STATUS_SUCCESS)
3734 ms_set_unused_block(chip, old_blk);
3737 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3739 return STATUS_SUCCESS;
3742 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3743 u16 log_blk, u8 start_page)
3748 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3750 if (retval != STATUS_SUCCESS) {
3756 return STATUS_SUCCESS;
3759 #ifdef MS_DELAY_WRITE
3760 int ms_delay_write(struct rtsx_chip *chip)
3762 struct ms_info *ms_card = &chip->ms_card;
3763 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3766 if (delay_write->delay_write_flag) {
3767 retval = ms_set_init_para(chip);
3768 if (retval != STATUS_SUCCESS) {
3773 delay_write->delay_write_flag = 0;
3774 retval = ms_finish_write(chip,
3775 delay_write->old_phyblock,
3776 delay_write->new_phyblock,
3777 delay_write->logblock,
3778 delay_write->pageoff);
3779 if (retval != STATUS_SUCCESS) {
3785 return STATUS_SUCCESS;
3789 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3791 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3792 set_sense_type(chip, SCSI_LUN(srb),
3793 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3795 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3798 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3799 u32 start_sector, u16 sector_cnt)
3801 struct ms_info *ms_card = &chip->ms_card;
3802 unsigned int lun = SCSI_LUN(srb);
3804 unsigned int index = 0, offset = 0;
3805 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3806 u8 start_page, end_page = 0, page_cnt;
3808 #ifdef MS_DELAY_WRITE
3809 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3812 ms_set_err_code(chip, MS_NO_ERROR);
3814 ms_card->cleanup_counter = 0;
3816 ptr = (u8 *)scsi_sglist(srb);
3818 retval = ms_switch_clock(chip);
3819 if (retval != STATUS_SUCCESS) {
3820 ms_rw_fail(srb, chip);
3825 log_blk = (u16)(start_sector >> ms_card->block_shift);
3826 start_page = (u8)(start_sector & ms_card->page_off);
3828 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3829 if (log_blk < ms_start_idx[seg_no + 1])
3833 if (ms_card->segment[seg_no].build_flag == 0) {
3834 retval = ms_build_l2p_tbl(chip, seg_no);
3835 if (retval != STATUS_SUCCESS) {
3836 chip->card_fail |= MS_CARD;
3837 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3843 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3844 #ifdef MS_DELAY_WRITE
3845 if (delay_write->delay_write_flag &&
3846 (delay_write->logblock == log_blk) &&
3847 (start_page > delay_write->pageoff)) {
3848 delay_write->delay_write_flag = 0;
3849 retval = ms_copy_page(chip,
3850 delay_write->old_phyblock,
3851 delay_write->new_phyblock, log_blk,
3852 delay_write->pageoff, start_page);
3853 if (retval != STATUS_SUCCESS) {
3854 set_sense_type(chip, lun,
3855 SENSE_TYPE_MEDIA_WRITE_ERR);
3859 old_blk = delay_write->old_phyblock;
3860 new_blk = delay_write->new_phyblock;
3861 } else if (delay_write->delay_write_flag &&
3862 (delay_write->logblock == log_blk) &&
3863 (start_page == delay_write->pageoff)) {
3864 delay_write->delay_write_flag = 0;
3865 old_blk = delay_write->old_phyblock;
3866 new_blk = delay_write->new_phyblock;
3868 retval = ms_delay_write(chip);
3869 if (retval != STATUS_SUCCESS) {
3870 set_sense_type(chip, lun,
3871 SENSE_TYPE_MEDIA_WRITE_ERR);
3876 old_blk = ms_get_l2p_tbl(chip, seg_no,
3877 log_blk - ms_start_idx[seg_no]);
3878 new_blk = ms_get_unused_block(chip, seg_no);
3879 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3880 set_sense_type(chip, lun,
3881 SENSE_TYPE_MEDIA_WRITE_ERR);
3886 retval = ms_prepare_write(chip, old_blk, new_blk,
3887 log_blk, start_page);
3888 if (retval != STATUS_SUCCESS) {
3889 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3890 set_sense_type(chip, lun,
3891 SENSE_TYPE_MEDIA_NOT_PRESENT);
3895 set_sense_type(chip, lun,
3896 SENSE_TYPE_MEDIA_WRITE_ERR);
3900 #ifdef MS_DELAY_WRITE
3904 #ifdef MS_DELAY_WRITE
3905 retval = ms_delay_write(chip);
3906 if (retval != STATUS_SUCCESS) {
3907 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3908 set_sense_type(chip, lun,
3909 SENSE_TYPE_MEDIA_NOT_PRESENT);
3913 set_sense_type(chip, lun,
3914 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3919 old_blk = ms_get_l2p_tbl(chip, seg_no,
3920 log_blk - ms_start_idx[seg_no]);
3921 if (old_blk == 0xFFFF) {
3922 set_sense_type(chip, lun,
3923 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3929 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3930 seg_no, old_blk, new_blk);
3932 while (total_sec_cnt) {
3933 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3934 end_page = ms_card->page_off + 1;
3936 end_page = start_page + (u8)total_sec_cnt;
3938 page_cnt = end_page - start_page;
3940 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3941 start_page, end_page, page_cnt);
3943 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3944 retval = ms_read_multiple_pages(chip,
3945 old_blk, log_blk, start_page, end_page,
3946 ptr, &index, &offset);
3948 retval = ms_write_multiple_pages(chip, old_blk,
3949 new_blk, log_blk, start_page, end_page,
3950 ptr, &index, &offset);
3953 if (retval != STATUS_SUCCESS) {
3954 toggle_gpio(chip, 1);
3955 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3956 set_sense_type(chip, lun,
3957 SENSE_TYPE_MEDIA_NOT_PRESENT);
3961 ms_rw_fail(srb, chip);
3966 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3967 if (end_page == (ms_card->page_off + 1)) {
3968 retval = ms_erase_block(chip, old_blk);
3969 if (retval == STATUS_SUCCESS)
3970 ms_set_unused_block(chip, old_blk);
3972 ms_set_l2p_tbl(chip, seg_no,
3973 log_blk - ms_start_idx[seg_no],
3978 total_sec_cnt -= page_cnt;
3979 if (scsi_sg_count(srb) == 0)
3980 ptr += page_cnt * 512;
3982 if (total_sec_cnt == 0)
3987 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
3989 if (log_blk < ms_start_idx[seg_no + 1])
3993 if (ms_card->segment[seg_no].build_flag == 0) {
3994 retval = ms_build_l2p_tbl(chip, seg_no);
3995 if (retval != STATUS_SUCCESS) {
3996 chip->card_fail |= MS_CARD;
3997 set_sense_type(chip, lun,
3998 SENSE_TYPE_MEDIA_NOT_PRESENT);
4004 old_blk = ms_get_l2p_tbl(chip, seg_no,
4005 log_blk - ms_start_idx[seg_no]);
4006 if (old_blk == 0xFFFF) {
4007 ms_rw_fail(srb, chip);
4012 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4013 new_blk = ms_get_unused_block(chip, seg_no);
4014 if (new_blk == 0xFFFF) {
4015 ms_rw_fail(srb, chip);
4021 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
4022 seg_no, old_blk, new_blk);
4027 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4028 if (end_page < (ms_card->page_off + 1)) {
4029 #ifdef MS_DELAY_WRITE
4030 delay_write->delay_write_flag = 1;
4031 delay_write->old_phyblock = old_blk;
4032 delay_write->new_phyblock = new_blk;
4033 delay_write->logblock = log_blk;
4034 delay_write->pageoff = end_page;
4036 retval = ms_finish_write(chip, old_blk, new_blk,
4038 if (retval != STATUS_SUCCESS) {
4039 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
4040 set_sense_type(chip, lun,
4041 SENSE_TYPE_MEDIA_NOT_PRESENT);
4046 ms_rw_fail(srb, chip);
4054 scsi_set_resid(srb, 0);
4056 return STATUS_SUCCESS;
4059 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
4060 u32 start_sector, u16 sector_cnt)
4062 struct ms_info *ms_card = &chip->ms_card;
4065 if (CHK_MSPRO(ms_card))
4066 retval = mspro_rw_multi_sector(srb, chip, start_sector,
4069 retval = ms_rw_multi_sector(srb, chip, start_sector,
4075 void ms_free_l2p_tbl(struct rtsx_chip *chip)
4077 struct ms_info *ms_card = &chip->ms_card;
4080 if (ms_card->segment) {
4081 for (i = 0; i < ms_card->segment_cnt; i++) {
4082 vfree(ms_card->segment[i].l2p_table);
4083 ms_card->segment[i].l2p_table = NULL;
4084 vfree(ms_card->segment[i].free_table);
4085 ms_card->segment[i].free_table = NULL;
4087 vfree(ms_card->segment);
4088 ms_card->segment = NULL;
4092 #ifdef SUPPORT_MAGIC_GATE
4094 #ifdef READ_BYTES_WAIT_INT
4095 static int ms_poll_int(struct rtsx_chip *chip)
4100 rtsx_init_cmd(chip);
4102 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
4104 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
4105 if (retval != STATUS_SUCCESS) {
4110 val = *rtsx_get_cmd_data(chip);
4111 if (val & MS_INT_ERR) {
4116 return STATUS_SUCCESS;
4120 #ifdef MS_SAMPLE_INT_ERR
4121 static int check_ms_err(struct rtsx_chip *chip)
4126 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4127 if (retval != STATUS_SUCCESS)
4129 if (val & MS_TRANSFER_ERR)
4132 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
4133 if (retval != STATUS_SUCCESS)
4136 if (val & (MS_INT_ERR | MS_INT_CMDNK))
4142 static int check_ms_err(struct rtsx_chip *chip)
4147 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4148 if (retval != STATUS_SUCCESS)
4150 if (val & MS_TRANSFER_ERR)
4157 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
4168 data[6] = entry_num;
4171 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
4172 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
4174 if (retval == STATUS_SUCCESS)
4177 if (i == MS_MAX_RETRY_COUNT) {
4182 if (check_ms_err(chip)) {
4183 rtsx_clear_ms_error(chip);
4188 return STATUS_SUCCESS;
4191 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
4198 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
4200 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
4202 if (retval != STATUS_SUCCESS) {
4213 buf[5] = mg_entry_num;
4215 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
4216 NO_WAIT_INT, buf, 6);
4217 if (retval != STATUS_SUCCESS) {
4222 return STATUS_SUCCESS;
4225 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4229 unsigned int lun = SCSI_LUN(srb);
4230 u8 buf1[32], buf2[12];
4232 if (scsi_bufflen(srb) < 12) {
4233 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4238 ms_cleanup_work(chip);
4240 retval = ms_switch_clock(chip);
4241 if (retval != STATUS_SUCCESS) {
4246 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
4247 if (retval != STATUS_SUCCESS) {
4248 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4253 memset(buf1, 0, 32);
4254 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
4255 for (i = 0; i < 8; i++)
4256 buf1[8 + i] = buf2[4 + i];
4258 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4260 if (retval != STATUS_SUCCESS) {
4261 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4265 if (check_ms_err(chip)) {
4266 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4267 rtsx_clear_ms_error(chip);
4272 return STATUS_SUCCESS;
4275 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4277 int retval = STATUS_FAIL;
4279 unsigned int lun = SCSI_LUN(srb);
4282 ms_cleanup_work(chip);
4284 retval = ms_switch_clock(chip);
4285 if (retval != STATUS_SUCCESS) {
4290 buf = kmalloc(1540, GFP_KERNEL);
4293 return STATUS_ERROR;
4301 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
4302 if (retval != STATUS_SUCCESS) {
4303 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4308 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4309 3, WAIT_INT, 0, 0, buf + 4, 1536);
4310 if (retval != STATUS_SUCCESS) {
4311 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4312 rtsx_clear_ms_error(chip);
4316 if (check_ms_err(chip)) {
4317 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4318 rtsx_clear_ms_error(chip);
4320 retval = STATUS_FAIL;
4324 bufflen = min_t(int, 1052, scsi_bufflen(srb));
4325 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4332 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4334 struct ms_info *ms_card = &chip->ms_card;
4338 unsigned int lun = SCSI_LUN(srb);
4341 ms_cleanup_work(chip);
4343 retval = ms_switch_clock(chip);
4344 if (retval != STATUS_SUCCESS) {
4349 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
4350 if (retval != STATUS_SUCCESS) {
4351 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4356 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4358 if (retval != STATUS_SUCCESS) {
4359 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4363 if (check_ms_err(chip)) {
4364 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4365 rtsx_clear_ms_error(chip);
4370 memcpy(ms_card->magic_gate_id, buf, 16);
4372 #ifdef READ_BYTES_WAIT_INT
4373 retval = ms_poll_int(chip);
4374 if (retval != STATUS_SUCCESS) {
4375 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4381 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
4382 if (retval != STATUS_SUCCESS) {
4383 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4388 bufflen = min_t(int, 12, scsi_bufflen(srb));
4389 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4391 for (i = 0; i < 8; i++)
4392 buf[i] = buf[4 + i];
4394 for (i = 0; i < 24; i++)
4397 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
4398 32, WAIT_INT, buf, 32);
4399 if (retval != STATUS_SUCCESS) {
4400 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4404 if (check_ms_err(chip)) {
4405 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4406 rtsx_clear_ms_error(chip);
4411 ms_card->mg_auth = 0;
4413 return STATUS_SUCCESS;
4416 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4418 struct ms_info *ms_card = &chip->ms_card;
4421 unsigned int lun = SCSI_LUN(srb);
4422 u8 buf1[32], buf2[36];
4424 ms_cleanup_work(chip);
4426 retval = ms_switch_clock(chip);
4427 if (retval != STATUS_SUCCESS) {
4432 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
4433 if (retval != STATUS_SUCCESS) {
4434 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4439 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4441 if (retval != STATUS_SUCCESS) {
4442 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4446 if (check_ms_err(chip)) {
4447 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4448 rtsx_clear_ms_error(chip);
4458 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4459 memcpy(buf2 + 20, buf1, 16);
4461 bufflen = min_t(int, 36, scsi_bufflen(srb));
4462 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4464 #ifdef READ_BYTES_WAIT_INT
4465 retval = ms_poll_int(chip);
4466 if (retval != STATUS_SUCCESS) {
4467 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4473 return STATUS_SUCCESS;
4476 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4478 struct ms_info *ms_card = &chip->ms_card;
4482 unsigned int lun = SCSI_LUN(srb);
4485 ms_cleanup_work(chip);
4487 retval = ms_switch_clock(chip);
4488 if (retval != STATUS_SUCCESS) {
4493 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4494 if (retval != STATUS_SUCCESS) {
4495 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4500 bufflen = min_t(int, 12, scsi_bufflen(srb));
4501 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4503 for (i = 0; i < 8; i++)
4504 buf[i] = buf[4 + i];
4506 for (i = 0; i < 24; i++)
4509 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4511 if (retval != STATUS_SUCCESS) {
4512 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4516 if (check_ms_err(chip)) {
4517 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4518 rtsx_clear_ms_error(chip);
4523 ms_card->mg_auth = 1;
4525 return STATUS_SUCCESS;
4528 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4530 struct ms_info *ms_card = &chip->ms_card;
4533 unsigned int lun = SCSI_LUN(srb);
4536 ms_cleanup_work(chip);
4538 retval = ms_switch_clock(chip);
4539 if (retval != STATUS_SUCCESS) {
4544 buf = kmalloc(1028, GFP_KERNEL);
4547 return STATUS_ERROR;
4555 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4556 if (retval != STATUS_SUCCESS) {
4557 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4562 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4563 2, WAIT_INT, 0, 0, buf + 4, 1024);
4564 if (retval != STATUS_SUCCESS) {
4565 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4566 rtsx_clear_ms_error(chip);
4570 if (check_ms_err(chip)) {
4571 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4572 rtsx_clear_ms_error(chip);
4574 retval = STATUS_FAIL;
4578 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4579 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4586 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4588 struct ms_info *ms_card = &chip->ms_card;
4591 #ifdef MG_SET_ICV_SLOW
4594 unsigned int lun = SCSI_LUN(srb);
4597 ms_cleanup_work(chip);
4599 retval = ms_switch_clock(chip);
4600 if (retval != STATUS_SUCCESS) {
4605 buf = kmalloc(1028, GFP_KERNEL);
4608 return STATUS_ERROR;
4611 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4612 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4614 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4615 if (retval != STATUS_SUCCESS) {
4616 if (ms_card->mg_auth == 0) {
4617 if ((buf[5] & 0xC0) != 0)
4618 set_sense_type(chip, lun,
4619 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4621 set_sense_type(chip, lun,
4622 SENSE_TYPE_MG_WRITE_ERR);
4624 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4630 #ifdef MG_SET_ICV_SLOW
4631 for (i = 0; i < 2; i++) {
4634 rtsx_init_cmd(chip);
4636 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4637 0xFF, PRO_WRITE_LONG_DATA);
4638 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4639 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4642 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4644 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4645 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4646 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4647 MS_TRANSFER_END, MS_TRANSFER_END);
4649 rtsx_send_cmd_no_wait(chip);
4651 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4652 512, 0, DMA_TO_DEVICE, 3000);
4653 if ((retval < 0) || check_ms_err(chip)) {
4654 rtsx_clear_ms_error(chip);
4655 if (ms_card->mg_auth == 0) {
4656 if ((buf[5] & 0xC0) != 0)
4657 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4659 set_sense_type(chip, lun,
4660 SENSE_TYPE_MG_WRITE_ERR);
4662 set_sense_type(chip, lun,
4663 SENSE_TYPE_MG_WRITE_ERR);
4665 retval = STATUS_FAIL;
4671 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4672 2, WAIT_INT, 0, 0, buf + 4, 1024);
4673 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4674 rtsx_clear_ms_error(chip);
4675 if (ms_card->mg_auth == 0) {
4676 if ((buf[5] & 0xC0) != 0)
4677 set_sense_type(chip, lun,
4678 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4680 set_sense_type(chip, lun,
4681 SENSE_TYPE_MG_WRITE_ERR);
4683 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4695 #endif /* SUPPORT_MAGIC_GATE */
4697 void ms_cleanup_work(struct rtsx_chip *chip)
4699 struct ms_info *ms_card = &chip->ms_card;
4701 if (CHK_MSPRO(ms_card)) {
4702 if (ms_card->seq_mode) {
4703 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4704 mspro_stop_seq_mode(chip);
4705 ms_card->cleanup_counter = 0;
4707 if (CHK_MSHG(ms_card)) {
4708 rtsx_write_register(chip, MS_CFG,
4709 MS_2K_SECTOR_MODE, 0x00);
4712 #ifdef MS_DELAY_WRITE
4713 else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
4714 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4715 ms_delay_write(chip);
4716 ms_card->cleanup_counter = 0;
4721 int ms_power_off_card3v3(struct rtsx_chip *chip)
4725 retval = disable_card_clock(chip, MS_CARD);
4726 if (retval != STATUS_SUCCESS) {
4731 if (chip->asic_code) {
4732 retval = ms_pull_ctl_disable(chip);
4733 if (retval != STATUS_SUCCESS) {
4738 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4739 FPGA_MS_PULL_CTL_BIT | 0x20,
4740 FPGA_MS_PULL_CTL_BIT);
4746 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4751 if (!chip->ft2_fast_mode) {
4752 retval = card_power_off(chip, MS_CARD);
4753 if (retval != STATUS_SUCCESS) {
4759 return STATUS_SUCCESS;
4762 int release_ms_card(struct rtsx_chip *chip)
4764 struct ms_info *ms_card = &chip->ms_card;
4767 #ifdef MS_DELAY_WRITE
4768 ms_card->delay_write.delay_write_flag = 0;
4770 ms_card->pro_under_formatting = 0;
4772 chip->card_ready &= ~MS_CARD;
4773 chip->card_fail &= ~MS_CARD;
4774 chip->card_wp &= ~MS_CARD;
4776 ms_free_l2p_tbl(chip);
4778 memset(ms_card->raw_sys_info, 0, 96);
4779 #ifdef SUPPORT_PCGL_1P18
4780 memset(ms_card->raw_model_name, 0, 48);
4783 retval = ms_power_off_card3v3(chip);
4784 if (retval != STATUS_SUCCESS) {
4789 return STATUS_SUCCESS;