1 /******************************************************************************
3 * Copyright(c) 2016 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
34 #include "../btcoexist/halbt_precomp.h"
38 static u32 _rtl8822be_phy_calculate_bit_shift(u32 bitmask);
40 _rtl8822be_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
42 static long _rtl8822be_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
43 enum wireless_mode wirelessmode,
45 static void rtl8822be_phy_set_rf_on(struct ieee80211_hw *hw);
46 static void rtl8822be_phy_set_io(struct ieee80211_hw *hw);
48 static u8 cck_rates[] = {DESC_RATE1M, DESC_RATE2M, DESC_RATE5_5M, DESC_RATE11M};
49 static u8 sizes_of_cck_retes = 4;
50 static u8 ofdm_rates[] = {DESC_RATE6M, DESC_RATE9M, DESC_RATE12M,
51 DESC_RATE18M, DESC_RATE24M, DESC_RATE36M,
52 DESC_RATE48M, DESC_RATE54M};
53 static u8 sizes_of_ofdm_retes = 8;
54 static u8 ht_rates_1t[] = {DESC_RATEMCS0, DESC_RATEMCS1, DESC_RATEMCS2,
55 DESC_RATEMCS3, DESC_RATEMCS4, DESC_RATEMCS5,
56 DESC_RATEMCS6, DESC_RATEMCS7};
57 static u8 sizes_of_ht_retes_1t = 8;
58 static u8 ht_rates_2t[] = {DESC_RATEMCS8, DESC_RATEMCS9, DESC_RATEMCS10,
59 DESC_RATEMCS11, DESC_RATEMCS12, DESC_RATEMCS13,
60 DESC_RATEMCS14, DESC_RATEMCS15};
61 static u8 sizes_of_ht_retes_2t = 8;
62 static u8 vht_rates_1t[] = {DESC_RATEVHT1SS_MCS0, DESC_RATEVHT1SS_MCS1,
63 DESC_RATEVHT1SS_MCS2, DESC_RATEVHT1SS_MCS3,
64 DESC_RATEVHT1SS_MCS4, DESC_RATEVHT1SS_MCS5,
65 DESC_RATEVHT1SS_MCS6, DESC_RATEVHT1SS_MCS7,
66 DESC_RATEVHT1SS_MCS8, DESC_RATEVHT1SS_MCS9};
67 static u8 vht_rates_2t[] = {DESC_RATEVHT2SS_MCS0, DESC_RATEVHT2SS_MCS1,
68 DESC_RATEVHT2SS_MCS2, DESC_RATEVHT2SS_MCS3,
69 DESC_RATEVHT2SS_MCS4, DESC_RATEVHT2SS_MCS5,
70 DESC_RATEVHT2SS_MCS6, DESC_RATEVHT2SS_MCS7,
71 DESC_RATEVHT2SS_MCS8, DESC_RATEVHT2SS_MCS9};
72 static u8 sizes_of_vht_retes = 10;
74 u32 rtl8822be_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
77 struct rtl_priv *rtlpriv = rtl_priv(hw);
78 u32 returnvalue, originalvalue, bitshift;
80 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x)\n",
82 originalvalue = rtl_read_dword(rtlpriv, regaddr);
83 bitshift = _rtl8822be_phy_calculate_bit_shift(bitmask);
84 returnvalue = (originalvalue & bitmask) >> bitshift;
86 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "BBR MASK=0x%x Addr[0x%x]=0x%x\n",
87 bitmask, regaddr, originalvalue);
92 void rtl8822be_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
95 struct rtl_priv *rtlpriv = rtl_priv(hw);
96 u32 originalvalue, bitshift;
98 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
99 "regaddr(%#x), bitmask(%#x), data(%#x)\n", regaddr, bitmask,
102 if (bitmask != MASKDWORD) {
103 originalvalue = rtl_read_dword(rtlpriv, regaddr);
104 bitshift = _rtl8822be_phy_calculate_bit_shift(bitmask);
105 data = ((originalvalue & (~bitmask)) |
106 ((data << bitshift) & bitmask));
109 rtl_write_dword(rtlpriv, regaddr, data);
111 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
112 "regaddr(%#x), bitmask(%#x), data(%#x)\n", regaddr, bitmask,
116 u32 rtl8822be_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
117 u32 regaddr, u32 bitmask)
119 struct rtl_priv *rtlpriv = rtl_priv(hw);
120 u32 /*original_value,*/ readback_value /*, bitshift*/;
123 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
124 "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n", regaddr, rfpath,
127 spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
129 readback_value = rtlpriv->phydm.ops->phydm_read_rf_reg(
130 rtlpriv, rfpath, regaddr, bitmask);
132 spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
134 return readback_value;
137 void rtl8822be_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
138 u32 regaddr, u32 bitmask, u32 data)
140 struct rtl_priv *rtlpriv = rtl_priv(hw);
143 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
144 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
145 regaddr, bitmask, data, rfpath);
147 spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
149 rtlpriv->phydm.ops->phydm_write_rf_reg(rtlpriv, rfpath, regaddr,
152 spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
154 RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
155 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
156 regaddr, bitmask, data, rfpath);
159 static u32 _rtl8822be_phy_calculate_bit_shift(u32 bitmask)
163 for (i = 0; i <= 31; i++) {
164 if (((bitmask >> i) & 0x1) == 1)
170 bool rtl8822be_halmac_cb_init_mac_register(struct rtl_priv *rtlpriv)
172 return rtlpriv->phydm.ops->phydm_phy_mac_config(rtlpriv);
175 bool rtl8822be_phy_bb_config(struct ieee80211_hw *hw)
177 bool rtstatus = true;
178 struct rtl_priv *rtlpriv = rtl_priv(hw);
179 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
183 rtstatus = rtlpriv->phydm.ops->phydm_phy_bb_config(rtlpriv);
185 /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */
186 crystal_cap = rtlefuse->crystalcap & 0x3F;
187 rtl_set_bbreg(hw, REG_AFE_XTAL_CTRL_8822B, 0x7E000000, crystal_cap);
188 rtl_set_bbreg(hw, REG_AFE_PLL_CTRL_8822B, 0x7E, crystal_cap);
190 /*rtlphy->reg_837 = rtl_read_byte(rtlpriv, 0x837);*/ /*unused*/
195 bool rtl8822be_phy_rf_config(struct ieee80211_hw *hw)
197 struct rtl_priv *rtlpriv = rtl_priv(hw);
198 struct rtl_phy *rtlphy = &rtlpriv->phy;
200 if (rtlphy->rf_type == RF_1T1R)
201 rtlphy->num_total_rfpath = 1;
203 rtlphy->num_total_rfpath = 2;
205 return rtlpriv->phydm.ops->phydm_phy_rf_config(rtlpriv);
208 bool rtl8822be_halmac_cb_init_bb_rf_register(struct rtl_priv *rtlpriv)
210 struct ieee80211_hw *hw = rtlpriv->hw;
211 enum radio_mask txpath, rxpath;
215 _rtl8822be_phy_init_bb_rf_register_definition(hw);
217 rtlpriv->halmac.ops->halmac_phy_power_switch(rtlpriv, 1);
219 /* beofre bb/rf config */
220 rtlpriv->phydm.ops->phydm_parameter_init(rtlpriv, 0);
222 /* do bb/rf config */
223 if (rtl8822be_phy_bb_config(hw) && rtl8822be_phy_rf_config(hw))
226 /* after bb/rf config */
227 rtlpriv->phydm.ops->phydm_parameter_init(rtlpriv, 1);
229 /* set trx mode (keep it to be last, r17376) */
230 txpath = RF_MASK_A | RF_MASK_B;
231 rxpath = RF_MASK_A | RF_MASK_B;
233 ret = rtlpriv->phydm.ops->phydm_trx_mode(rtlpriv, txpath, rxpath,
239 static void _rtl8822be_phy_init_tx_power_by_rate(struct ieee80211_hw *hw)
241 struct rtl_priv *rtlpriv = rtl_priv(hw);
242 struct rtl_phy *rtlphy = &rtlpriv->phy;
244 u8 band, rfpath, txnum, rate;
246 for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band)
247 for (rfpath = 0; rfpath < TX_PWR_BY_RATE_NUM_RF; ++rfpath)
248 for (txnum = 0; txnum < TX_PWR_BY_RATE_NUM_RF; ++txnum)
249 for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE;
251 rtlphy->tx_power_by_rate_offset
252 [band][rfpath][txnum][rate] = 0;
255 static void _rtl8822be_phy_set_txpower_by_rate_base(struct ieee80211_hw *hw,
257 u8 rate_section, u8 txnum,
260 struct rtl_priv *rtlpriv = rtl_priv(hw);
261 struct rtl_phy *rtlphy = &rtlpriv->phy;
263 if (path > RF90_PATH_D) {
264 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
265 "Invalid Rf Path %d in phy_SetTxPowerByRatBase()\n",
270 if (band != BAND_ON_2_4G && band != BAND_ON_5G) {
271 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
272 "Invalid band %d in phy_SetTxPowerByRatBase()\n",
277 if (rate_section >= MAX_RATE_SECTION ||
278 (band == BAND_ON_5G && rate_section == CCK)) {
280 rtlpriv, COMP_INIT, DBG_LOUD,
281 "Invalid rate_section %d in phy_SetTxPowerByRatBase()\n",
286 if (band == BAND_ON_2_4G)
287 rtlphy->txpwr_by_rate_base_24g[path][txnum][rate_section] =
289 else /* BAND_ON_5G */
290 rtlphy->txpwr_by_rate_base_5g[path][txnum][rate_section - 1] =
294 static u8 _rtl8822be_phy_get_txpower_by_rate_base(struct ieee80211_hw *hw,
295 u8 band, u8 path, u8 txnum,
298 struct rtl_priv *rtlpriv = rtl_priv(hw);
299 struct rtl_phy *rtlphy = &rtlpriv->phy;
302 if (path > RF90_PATH_D) {
303 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
304 "Invalid Rf Path %d in phy_GetTxPowerByRatBase()\n",
309 if (band != BAND_ON_2_4G && band != BAND_ON_5G) {
310 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
311 "Invalid band %d in phy_GetTxPowerByRatBase()\n",
316 if (rate_section >= MAX_RATE_SECTION ||
317 (band == BAND_ON_5G && rate_section == CCK)) {
319 rtlpriv, COMP_INIT, DBG_LOUD,
320 "Invalid rate_section %d in phy_GetTxPowerByRatBase()\n",
325 if (band == BAND_ON_2_4G)
326 value = rtlphy->txpwr_by_rate_base_24g[path][txnum]
328 else /* BAND_ON_5G */
329 value = rtlphy->txpwr_by_rate_base_5g[path][txnum]
335 static void _rtl8822be_phy_store_txpower_by_rate_base(struct ieee80211_hw *hw)
337 struct rtl_priv *rtlpriv = rtl_priv(hw);
338 struct rtl_phy *rtlphy = &rtlpriv->phy;
341 enum rtl_desc_rate rate;
342 enum rate_section section;
343 } rate_sec_base[] = {
345 {DESC_RATE54M, OFDM},
346 {DESC_RATEMCS7, HT_MCS0_MCS7},
347 {DESC_RATEMCS15, HT_MCS8_MCS15},
348 {DESC_RATEVHT1SS_MCS7, VHT_1SSMCS0_1SSMCS9},
349 {DESC_RATEVHT2SS_MCS7, VHT_2SSMCS0_2SSMCS9},
352 u8 band, path, rs, tx_num, base;
355 for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
356 for (path = RF90_PATH_A; path <= RF90_PATH_B; path++) {
357 for (rs = 0; rs < MAX_RATE_SECTION; rs++) {
358 rate = rate_sec_base[rs].rate;
359 section = rate_sec_base[rs].section;
361 if (IS_1T_RATE(rate))
366 if (band == BAND_ON_5G &&
367 RX_HAL_IS_CCK_RATE(rate))
370 base = rtlphy->tx_power_by_rate_offset
371 [band][path][tx_num][rate];
372 _rtl8822be_phy_set_txpower_by_rate_base(
373 hw, band, path, section, tx_num, base);
379 static void __rtl8822be_phy_cross_reference_core(struct ieee80211_hw *hw,
380 u8 regulation, u8 bw,
383 struct rtl_priv *rtlpriv = rtl_priv(hw);
384 struct rtl_phy *rtlphy = &rtlpriv->phy;
386 s8 pwrlmt, ref_pwrlmt;
388 for (rs = 0; rs < MAX_RATE_SECTION_NUM; ++rs) {
389 /*5G 20M 40M VHT and HT can cross reference*/
390 if (bw != HT_CHANNEL_WIDTH_20 && bw != HT_CHANNEL_WIDTH_20_40)
393 if (rs == HT_MCS0_MCS7)
394 ref_rs = VHT_1SSMCS0_1SSMCS9;
395 else if (rs == HT_MCS8_MCS15)
396 ref_rs = VHT_2SSMCS0_2SSMCS9;
397 else if (rs == VHT_1SSMCS0_1SSMCS9)
398 ref_rs = HT_MCS0_MCS7;
399 else if (rs == VHT_2SSMCS0_2SSMCS9)
400 ref_rs = HT_MCS8_MCS15;
404 ref_pwrlmt = rtlphy->txpwr_limit_5g[regulation][bw][ref_rs]
405 [channel][RF90_PATH_A];
406 if (ref_pwrlmt == MAX_POWER_INDEX)
409 pwrlmt = rtlphy->txpwr_limit_5g[regulation][bw][rs][channel]
411 if (pwrlmt != MAX_POWER_INDEX)
414 rtlphy->txpwr_limit_5g[regulation][bw][rs][channel]
415 [RF90_PATH_A] = ref_pwrlmt;
420 _rtl8822be_phy_cross_reference_ht_and_vht_txpower_limit(struct ieee80211_hw *hw)
422 u8 regulation, bw, channel;
424 for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
425 for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) {
426 for (channel = 0; channel < CHANNEL_MAX_NUMBER_5G;
428 __rtl8822be_phy_cross_reference_core(
429 hw, regulation, bw, channel);
435 static void __rtl8822be_txpwr_limit_to_index_2g(struct ieee80211_hw *hw,
436 u8 regulation, u8 bw,
439 struct rtl_priv *rtlpriv = rtl_priv(hw);
440 struct rtl_phy *rtlphy = &rtlpriv->phy;
441 u8 bw40_pwr_base_dbm2_4G;
444 enum rf_tx_num txnum;
448 for (rate_section = 0; rate_section < MAX_RATE_SECTION_NUM;
450 /* obtain the base dBm values in 2.4G band
451 * CCK => 11M, OFDM => 54M, HT 1T => MCS7, HT 2T => MCS15
455 rtlphy->txpwr_limit_2_4g[regulation][bw][rate_section]
456 [channel][RF90_PATH_A];
457 txnum = IS_1T_RATESEC(rate_section) ? RF_1TX : RF_2TX;
459 if (temp_pwrlmt == MAX_POWER_INDEX)
462 for (rf_path = RF90_PATH_A; rf_path < MAX_RF_PATH_NUM;
464 bw40_pwr_base_dbm2_4G =
465 _rtl8822be_phy_get_txpower_by_rate_base(
466 hw, BAND_ON_2_4G, rf_path, txnum,
469 temp_value = temp_pwrlmt - bw40_pwr_base_dbm2_4G;
470 rtlphy->txpwr_limit_2_4g[regulation][bw][rate_section]
471 [channel][rf_path] = temp_value;
474 rtlpriv, COMP_INIT, DBG_TRACE,
475 "TxPwrLimit_2_4G[regulation %d][bw %d][rateSection %d][channel %d] = %d\n(TxPwrLimit in dBm %d - BW40PwrLmt2_4G[channel %d][rfPath %d] %d)\n",
476 regulation, bw, rate_section, channel,
477 rtlphy->txpwr_limit_2_4g[regulation][bw]
478 [rate_section][channel]
480 (temp_pwrlmt == 63) ? 0 : temp_pwrlmt / 2,
481 channel, rf_path, bw40_pwr_base_dbm2_4G);
486 static void __rtl8822be_txpwr_limit_to_index_5g(struct ieee80211_hw *hw,
487 u8 regulation, u8 bw,
490 struct rtl_priv *rtlpriv = rtl_priv(hw);
491 struct rtl_phy *rtlphy = &rtlpriv->phy;
492 u8 bw40_pwr_base_dbm5G;
495 enum rf_tx_num txnum;
499 for (rate_section = 0; rate_section < MAX_RATE_SECTION_NUM;
501 /* obtain the base dBm values in 5G band
502 * OFDM => 54M, HT 1T => MCS7, HT 2T => MCS15,
503 * VHT => 1SSMCS7, VHT 2T => 2SSMCS7
507 rtlphy->txpwr_limit_5g[regulation][bw][rate_section]
508 [channel][RF90_PATH_A];
509 txnum = IS_1T_RATESEC(rate_section) ? RF_1TX : RF_2TX;
511 if (temp_pwrlmt == MAX_POWER_INDEX)
514 for (rf_path = RF90_PATH_A; rf_path < MAX_RF_PATH_NUM;
516 bw40_pwr_base_dbm5G =
517 _rtl8822be_phy_get_txpower_by_rate_base(
518 hw, BAND_ON_5G, rf_path, txnum,
521 temp_value = temp_pwrlmt - bw40_pwr_base_dbm5G;
522 rtlphy->txpwr_limit_5g[regulation][bw][rate_section]
523 [channel][rf_path] = temp_value;
526 rtlpriv, COMP_INIT, DBG_TRACE,
527 "TxPwrLimit_5G[regulation %d][bw %d][rateSection %d][channel %d] =%d\n(TxPwrLimit in dBm %d - BW40PwrLmt5G[chnl group %d][rfPath %d] %d)\n",
528 regulation, bw, rate_section, channel,
529 rtlphy->txpwr_limit_5g[regulation][bw]
530 [rate_section][channel]
532 temp_pwrlmt, channel, rf_path,
533 bw40_pwr_base_dbm5G);
539 _rtl8822be_phy_convert_txpower_limit_to_power_index(struct ieee80211_hw *hw)
541 struct rtl_priv *rtlpriv = rtl_priv(hw);
542 u8 regulation, bw, channel;
544 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "=====> %s()\n", __func__);
546 _rtl8822be_phy_cross_reference_ht_and_vht_txpower_limit(hw);
548 for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
549 for (bw = 0; bw < MAX_2_4G_BANDWIDTH_NUM; ++bw) {
550 for (channel = 0; channel < CHANNEL_MAX_NUMBER_2G;
552 __rtl8822be_txpwr_limit_to_index_2g(
553 hw, regulation, bw, channel);
558 for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
559 for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) {
560 for (channel = 0; channel < CHANNEL_MAX_NUMBER_5G;
562 __rtl8822be_txpwr_limit_to_index_5g(
563 hw, regulation, bw, channel);
567 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "<===== %s()\n", __func__);
570 static void _rtl8822be_phy_init_txpower_limit(struct ieee80211_hw *hw)
572 struct rtl_priv *rtlpriv = rtl_priv(hw);
573 struct rtl_phy *rtlphy = &rtlpriv->phy;
576 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "=====> %s()!\n", __func__);
578 for (i = 0; i < MAX_REGULATION_NUM; ++i) {
579 for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j)
580 for (k = 0; k < MAX_RATE_SECTION_NUM; ++k)
581 for (m = 0; m < CHANNEL_MAX_NUMBER_2G; ++m)
582 for (l = 0; l < MAX_RF_PATH_NUM; ++l)
583 rtlphy->txpwr_limit_2_4g[i][j]
588 for (i = 0; i < MAX_REGULATION_NUM; ++i) {
589 for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
590 for (k = 0; k < MAX_RATE_SECTION_NUM; ++k)
591 for (m = 0; m < CHANNEL_MAX_NUMBER_5G; ++m)
592 for (l = 0; l < MAX_RF_PATH_NUM; ++l)
593 rtlphy->txpwr_limit_5g[i][j][k]
598 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "<===== %s()!\n", __func__);
602 _rtl8822be_phy_convert_txpower_dbm_to_relative_value(struct ieee80211_hw *hw)
604 struct rtl_priv *rtlpriv = rtl_priv(hw);
605 struct rtl_phy *rtlphy = &rtlpriv->phy;
607 u8 base = 0, i = 0, value = 0, band = 0, path = 0, txnum = 0;
609 for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band) {
610 for (path = RF90_PATH_A; path <= RF90_PATH_B; ++path) {
611 for (txnum = RF_1TX; txnum <= RF_2TX; ++txnum) {
613 base = rtlphy->tx_power_by_rate_offset
616 for (i = 0; i < sizeof(cck_rates); ++i) {
617 value = rtlphy->tx_power_by_rate_offset
620 rtlphy->tx_power_by_rate_offset
622 [cck_rates[i]] = value - base;
626 base = rtlphy->tx_power_by_rate_offset
629 for (i = 0; i < sizeof(ofdm_rates); ++i) {
630 value = rtlphy->tx_power_by_rate_offset
633 rtlphy->tx_power_by_rate_offset
635 [ofdm_rates[i]] = value - base;
639 base = rtlphy->tx_power_by_rate_offset
642 for (i = 0; i < sizeof(ht_rates_1t); ++i) {
643 value = rtlphy->tx_power_by_rate_offset
646 rtlphy->tx_power_by_rate_offset
648 [ht_rates_1t[i]] = value - base;
652 base = rtlphy->tx_power_by_rate_offset
655 for (i = 0; i < sizeof(ht_rates_2t); ++i) {
656 value = rtlphy->tx_power_by_rate_offset
659 rtlphy->tx_power_by_rate_offset
661 [ht_rates_2t[i]] = value - base;
665 base = rtlphy->tx_power_by_rate_offset
667 [DESC_RATEVHT1SS_MCS7];
668 for (i = 0; i < sizeof(vht_rates_1t); ++i) {
669 value = rtlphy->tx_power_by_rate_offset
672 rtlphy->tx_power_by_rate_offset
679 base = rtlphy->tx_power_by_rate_offset
681 [DESC_RATEVHT2SS_MCS7];
682 for (i = 0; i < sizeof(vht_rates_2t); ++i) {
683 value = rtlphy->tx_power_by_rate_offset
686 rtlphy->tx_power_by_rate_offset
695 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, "<===%s()\n", __func__);
699 _rtl8822be_phy_txpower_by_rate_configuration(struct ieee80211_hw *hw)
701 /* copy rate_section from
702 * tx_power_by_rate_offset[][rate] to txpwr_by_rate_base_24g/_5g[][rs]
704 _rtl8822be_phy_store_txpower_by_rate_base(hw);
706 /* convert tx_power_by_rate_offset[] to relative value */
707 _rtl8822be_phy_convert_txpower_dbm_to_relative_value(hw);
710 /* string is in decimal */
711 static bool _rtl8822be_get_integer_from_string(char *str, u8 *pint)
716 while (str[i] != '\0') {
717 if (str[i] >= '0' && str[i] <= '9') {
719 *pint += (str[i] - '0');
729 static bool _rtl8822be_eq_n_byte(u8 *str1, u8 *str2, u32 num)
735 if (str1[num] != str2[num])
741 static char _rtl8822be_phy_get_chnl_idx_of_txpwr_lmt(struct ieee80211_hw *hw,
744 struct rtl_priv *rtlpriv = rtl_priv(hw);
745 char channel_index = -1;
748 if (band == BAND_ON_2_4G) {
749 channel_index = channel - 1;
750 } else if (band == BAND_ON_5G) {
751 for (i = 0; i < sizeof(rtl_channel5g) / sizeof(u8); ++i) {
752 if (rtl_channel5g[i] == channel)
756 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "Invalid Band %d in %s",
760 if (channel_index == -1)
761 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
762 "Invalid Channel %d of Band %d in %s", channel, band,
765 return channel_index;
768 void rtl8822be_phy_set_txpower_limit(struct ieee80211_hw *hw, u8 *pregulation,
769 u8 *pband, u8 *pbandwidth,
770 u8 *prate_section, u8 *prf_path,
771 u8 *pchannel, u8 *ppower_limit)
773 struct rtl_priv *rtlpriv = rtl_priv(hw);
774 struct rtl_phy *rtlphy = &rtlpriv->phy;
775 u8 regulation = 0, bandwidth = 0, rate_section = 0, channel;
777 char power_limit = 0, prev_power_limit, ret;
779 if (!_rtl8822be_get_integer_from_string((char *)pchannel, &channel) ||
780 !_rtl8822be_get_integer_from_string((char *)ppower_limit,
782 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
783 "Illegal index of pwr_lmt table [chnl %d][val %d]\n",
784 channel, power_limit);
788 power_limit > MAX_POWER_INDEX ? MAX_POWER_INDEX : power_limit;
790 if (_rtl8822be_eq_n_byte(pregulation, (u8 *)("FCC"), 3))
792 else if (_rtl8822be_eq_n_byte(pregulation, (u8 *)("MKK"), 3))
794 else if (_rtl8822be_eq_n_byte(pregulation, (u8 *)("ETSI"), 4))
796 else if (_rtl8822be_eq_n_byte(pregulation, (u8 *)("WW13"), 4))
799 if (_rtl8822be_eq_n_byte(prate_section, (u8 *)("CCK"), 3))
801 else if (_rtl8822be_eq_n_byte(prate_section, (u8 *)("OFDM"), 4))
803 else if (_rtl8822be_eq_n_byte(prate_section, (u8 *)("HT"), 2) &&
804 _rtl8822be_eq_n_byte(prf_path, (u8 *)("1T"), 2))
805 rate_section = HT_MCS0_MCS7;
806 else if (_rtl8822be_eq_n_byte(prate_section, (u8 *)("HT"), 2) &&
807 _rtl8822be_eq_n_byte(prf_path, (u8 *)("2T"), 2))
808 rate_section = HT_MCS8_MCS15;
809 else if (_rtl8822be_eq_n_byte(prate_section, (u8 *)("VHT"), 3) &&
810 _rtl8822be_eq_n_byte(prf_path, (u8 *)("1T"), 2))
811 rate_section = VHT_1SSMCS0_1SSMCS9;
812 else if (_rtl8822be_eq_n_byte(prate_section, (u8 *)("VHT"), 3) &&
813 _rtl8822be_eq_n_byte(prf_path, (u8 *)("2T"), 2))
814 rate_section = VHT_2SSMCS0_2SSMCS9;
816 if (_rtl8822be_eq_n_byte(pbandwidth, (u8 *)("20M"), 3))
817 bandwidth = HT_CHANNEL_WIDTH_20;
818 else if (_rtl8822be_eq_n_byte(pbandwidth, (u8 *)("40M"), 3))
819 bandwidth = HT_CHANNEL_WIDTH_20_40;
820 else if (_rtl8822be_eq_n_byte(pbandwidth, (u8 *)("80M"), 3))
821 bandwidth = HT_CHANNEL_WIDTH_80;
822 else if (_rtl8822be_eq_n_byte(pbandwidth, (u8 *)("160M"), 4))
825 if (_rtl8822be_eq_n_byte(pband, (u8 *)("2.4G"), 4)) {
826 ret = _rtl8822be_phy_get_chnl_idx_of_txpwr_lmt(hw, BAND_ON_2_4G,
835 rtlphy->txpwr_limit_2_4g[regulation][bandwidth]
836 [rate_section][channel_index]
839 if (power_limit < prev_power_limit)
840 rtlphy->txpwr_limit_2_4g[regulation][bandwidth]
841 [rate_section][channel_index]
842 [RF90_PATH_A] = power_limit;
844 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
845 "2.4G [regula %d][bw %d][sec %d][chnl %d][val %d]\n",
846 regulation, bandwidth, rate_section, channel_index,
847 rtlphy->txpwr_limit_2_4g[regulation][bandwidth]
848 [rate_section][channel_index]
850 } else if (_rtl8822be_eq_n_byte(pband, (u8 *)("5G"), 2)) {
851 ret = _rtl8822be_phy_get_chnl_idx_of_txpwr_lmt(hw, BAND_ON_5G,
860 rtlphy->txpwr_limit_5g[regulation][bandwidth]
861 [rate_section][channel_index]
864 if (power_limit < prev_power_limit)
865 rtlphy->txpwr_limit_5g[regulation][bandwidth]
866 [rate_section][channel_index]
867 [RF90_PATH_A] = power_limit;
869 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
870 "5G: [regul %d][bw %d][sec %d][chnl %d][val %d]\n",
871 regulation, bandwidth, rate_section, channel,
872 rtlphy->txpwr_limit_5g[regulation][bandwidth]
873 [rate_section][channel_index]
877 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
878 "Cannot recognize the band info in %s\n", pband);
883 bool rtl8822be_load_txpower_by_rate(struct ieee80211_hw *hw)
885 struct rtl_priv *rtlpriv = rtl_priv(hw);
886 bool rtstatus = true;
888 _rtl8822be_phy_init_tx_power_by_rate(hw);
890 rtstatus = rtlpriv->phydm.ops->phydm_load_txpower_by_rate(rtlpriv);
893 pr_err("BB_PG Reg Fail!!");
897 _rtl8822be_phy_txpower_by_rate_configuration(hw);
902 bool rtl8822be_load_txpower_limit(struct ieee80211_hw *hw)
904 struct rtl_priv *rtlpriv = rtl_priv(hw);
905 struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
906 bool rtstatus = true;
908 _rtl8822be_phy_init_txpower_limit(hw);
910 if (rtlefuse->eeprom_regulatory == 1)
915 rtstatus = rtlpriv->phydm.ops->phydm_load_txpower_limit(rtlpriv);
918 pr_err("RF TxPwr Limit Fail!!");
922 _rtl8822be_phy_convert_txpower_limit_to_power_index(hw);
927 static void _rtl8822be_get_rate_values_of_tx_power_by_rate(
928 struct ieee80211_hw *hw, u32 reg_addr, u32 bit_mask, u32 value,
929 u8 *rate, s8 *pwr_by_rate_val, u8 *rate_num)
931 struct rtl_priv *rtlpriv = rtl_priv(hw);
932 u8 /*index = 0,*/ i = 0;
935 case 0xE00: /*rTxAGC_A_Rate18_06:*/
936 case 0x830: /*rTxAGC_B_Rate18_06:*/
937 rate[0] = DESC_RATE6M;
938 rate[1] = DESC_RATE9M;
939 rate[2] = DESC_RATE12M;
940 rate[3] = DESC_RATE18M;
941 for (i = 0; i < 4; ++i) {
943 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
944 ((value >> (i * 8)) & 0xF));
949 case 0xE04: /*rTxAGC_A_Rate54_24:*/
950 case 0x834: /*rTxAGC_B_Rate54_24:*/
951 rate[0] = DESC_RATE24M;
952 rate[1] = DESC_RATE36M;
953 rate[2] = DESC_RATE48M;
954 rate[3] = DESC_RATE54M;
955 for (i = 0; i < 4; ++i) {
957 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
958 ((value >> (i * 8)) & 0xF));
963 case 0xE08: /*rTxAGC_A_CCK1_Mcs32:*/
964 rate[0] = DESC_RATE1M;
965 pwr_by_rate_val[0] = (s8)((((value >> (8 + 4)) & 0xF)) * 10 +
966 ((value >> 8) & 0xF));
970 case 0x86C: /*rTxAGC_B_CCK11_A_CCK2_11:*/
971 if (bit_mask == 0xffffff00) {
972 rate[0] = DESC_RATE2M;
973 rate[1] = DESC_RATE5_5M;
974 rate[2] = DESC_RATE11M;
975 for (i = 1; i < 4; ++i) {
976 pwr_by_rate_val[i - 1] = (s8)(
977 (((value >> (i * 8 + 4)) & 0xF)) * 10 +
978 ((value >> (i * 8)) & 0xF));
981 } else if (bit_mask == 0x000000ff) {
982 rate[0] = DESC_RATE11M;
983 pwr_by_rate_val[0] = (s8)((((value >> 4) & 0xF)) * 10 +
989 case 0xE10: /*rTxAGC_A_Mcs03_Mcs00:*/
990 case 0x83C: /*rTxAGC_B_Mcs03_Mcs00:*/
991 rate[0] = DESC_RATEMCS0;
992 rate[1] = DESC_RATEMCS1;
993 rate[2] = DESC_RATEMCS2;
994 rate[3] = DESC_RATEMCS3;
995 for (i = 0; i < 4; ++i) {
997 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
998 ((value >> (i * 8)) & 0xF));
1003 case 0xE14: /*rTxAGC_A_Mcs07_Mcs04:*/
1004 case 0x848: /*rTxAGC_B_Mcs07_Mcs04:*/
1005 rate[0] = DESC_RATEMCS4;
1006 rate[1] = DESC_RATEMCS5;
1007 rate[2] = DESC_RATEMCS6;
1008 rate[3] = DESC_RATEMCS7;
1009 for (i = 0; i < 4; ++i) {
1010 pwr_by_rate_val[i] =
1011 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1012 ((value >> (i * 8)) & 0xF));
1017 case 0xE18: /*rTxAGC_A_Mcs11_Mcs08:*/
1018 case 0x84C: /*rTxAGC_B_Mcs11_Mcs08:*/
1019 rate[0] = DESC_RATEMCS8;
1020 rate[1] = DESC_RATEMCS9;
1021 rate[2] = DESC_RATEMCS10;
1022 rate[3] = DESC_RATEMCS11;
1023 for (i = 0; i < 4; ++i) {
1024 pwr_by_rate_val[i] =
1025 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1026 ((value >> (i * 8)) & 0xF));
1031 case 0xE1C: /*rTxAGC_A_Mcs15_Mcs12:*/
1032 case 0x868: /*rTxAGC_B_Mcs15_Mcs12:*/
1033 rate[0] = DESC_RATEMCS12;
1034 rate[1] = DESC_RATEMCS13;
1035 rate[2] = DESC_RATEMCS14;
1036 rate[3] = DESC_RATEMCS15;
1037 for (i = 0; i < 4; ++i) {
1038 pwr_by_rate_val[i] =
1039 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1040 ((value >> (i * 8)) & 0xF));
1046 case 0x838: /*rTxAGC_B_CCK1_55_Mcs32:*/
1047 rate[0] = DESC_RATE1M;
1048 rate[1] = DESC_RATE2M;
1049 rate[2] = DESC_RATE5_5M;
1050 for (i = 1; i < 4; ++i) {
1051 pwr_by_rate_val[i - 1] =
1052 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1053 ((value >> (i * 8)) & 0xF));
1062 rate[0] = DESC_RATE1M;
1063 rate[1] = DESC_RATE2M;
1064 rate[2] = DESC_RATE5_5M;
1065 rate[3] = DESC_RATE11M;
1066 for (i = 0; i < 4; ++i) {
1067 pwr_by_rate_val[i] =
1068 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1069 ((value >> (i * 8)) & 0xF));
1078 rate[0] = DESC_RATE6M;
1079 rate[1] = DESC_RATE9M;
1080 rate[2] = DESC_RATE12M;
1081 rate[3] = DESC_RATE18M;
1082 for (i = 0; i < 4; ++i) {
1083 pwr_by_rate_val[i] =
1084 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1085 ((value >> (i * 8)) & 0xF));
1094 rate[0] = DESC_RATE24M;
1095 rate[1] = DESC_RATE36M;
1096 rate[2] = DESC_RATE48M;
1097 rate[3] = DESC_RATE54M;
1098 for (i = 0; i < 4; ++i) {
1099 pwr_by_rate_val[i] =
1100 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1101 ((value >> (i * 8)) & 0xF));
1110 rate[0] = DESC_RATEMCS0;
1111 rate[1] = DESC_RATEMCS1;
1112 rate[2] = DESC_RATEMCS2;
1113 rate[3] = DESC_RATEMCS3;
1114 for (i = 0; i < 4; ++i) {
1115 pwr_by_rate_val[i] =
1116 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1117 ((value >> (i * 8)) & 0xF));
1126 rate[0] = DESC_RATEMCS4;
1127 rate[1] = DESC_RATEMCS5;
1128 rate[2] = DESC_RATEMCS6;
1129 rate[3] = DESC_RATEMCS7;
1130 for (i = 0; i < 4; ++i) {
1131 pwr_by_rate_val[i] =
1132 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1133 ((value >> (i * 8)) & 0xF));
1142 rate[0] = DESC_RATEMCS8;
1143 rate[1] = DESC_RATEMCS9;
1144 rate[2] = DESC_RATEMCS10;
1145 rate[3] = DESC_RATEMCS11;
1146 for (i = 0; i < 4; ++i) {
1147 pwr_by_rate_val[i] =
1148 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1149 ((value >> (i * 8)) & 0xF));
1158 rate[0] = DESC_RATEMCS12;
1159 rate[1] = DESC_RATEMCS13;
1160 rate[2] = DESC_RATEMCS14;
1161 rate[3] = DESC_RATEMCS15;
1162 for (i = 0; i < 4; ++i) {
1163 pwr_by_rate_val[i] =
1164 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1165 ((value >> (i * 8)) & 0xF));
1174 rate[0] = DESC_RATEVHT1SS_MCS0;
1175 rate[1] = DESC_RATEVHT1SS_MCS1;
1176 rate[2] = DESC_RATEVHT1SS_MCS2;
1177 rate[3] = DESC_RATEVHT1SS_MCS3;
1178 for (i = 0; i < 4; ++i) {
1179 pwr_by_rate_val[i] =
1180 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1181 ((value >> (i * 8)) & 0xF));
1190 rate[0] = DESC_RATEVHT1SS_MCS4;
1191 rate[1] = DESC_RATEVHT1SS_MCS5;
1192 rate[2] = DESC_RATEVHT1SS_MCS6;
1193 rate[3] = DESC_RATEVHT1SS_MCS7;
1194 for (i = 0; i < 4; ++i) {
1195 pwr_by_rate_val[i] =
1196 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1197 ((value >> (i * 8)) & 0xF));
1206 rate[0] = DESC_RATEVHT1SS_MCS8;
1207 rate[1] = DESC_RATEVHT1SS_MCS9;
1208 rate[2] = DESC_RATEVHT2SS_MCS0;
1209 rate[3] = DESC_RATEVHT2SS_MCS1;
1210 for (i = 0; i < 4; ++i) {
1211 pwr_by_rate_val[i] =
1212 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1213 ((value >> (i * 8)) & 0xF));
1222 rate[0] = DESC_RATEVHT2SS_MCS2;
1223 rate[1] = DESC_RATEVHT2SS_MCS3;
1224 rate[2] = DESC_RATEVHT2SS_MCS4;
1225 rate[3] = DESC_RATEVHT2SS_MCS5;
1226 for (i = 0; i < 4; ++i) {
1227 pwr_by_rate_val[i] =
1228 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1229 ((value >> (i * 8)) & 0xF));
1238 rate[0] = DESC_RATEVHT2SS_MCS6;
1239 rate[1] = DESC_RATEVHT2SS_MCS7;
1240 rate[2] = DESC_RATEVHT2SS_MCS8;
1241 rate[3] = DESC_RATEVHT2SS_MCS9;
1242 for (i = 0; i < 4; ++i) {
1243 pwr_by_rate_val[i] =
1244 (s8)((((value >> (i * 8 + 4)) & 0xF)) * 10 +
1245 ((value >> (i * 8)) & 0xF));
1251 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1252 "Invalid reg_addr 0x%x in %s()\n", reg_addr, __func__);
1257 void rtl8822be_store_tx_power_by_rate(struct ieee80211_hw *hw, u32 band,
1258 u32 rfpath, u32 txnum, u32 regaddr,
1259 u32 bitmask, u32 data)
1261 struct rtl_priv *rtlpriv = rtl_priv(hw);
1262 struct rtl_phy *rtlphy = &rtlpriv->phy;
1263 u8 i = 0, rates[4] = {0}, rate_num = 0;
1264 s8 pwr_by_rate_val[4] = {0};
1266 _rtl8822be_get_rate_values_of_tx_power_by_rate(
1267 hw, regaddr, bitmask, data, rates, pwr_by_rate_val, &rate_num);
1269 if (band != BAND_ON_2_4G && band != BAND_ON_5G) {
1270 RT_TRACE(rtlpriv, COMP_INIT, DBG_WARNING, "Invalid Band %d\n",
1272 band = BAND_ON_2_4G;
1274 if (rfpath >= MAX_RF_PATH) {
1275 RT_TRACE(rtlpriv, COMP_INIT, DBG_WARNING, "Invalid RfPath %d\n",
1277 rfpath = MAX_RF_PATH - 1;
1279 if (txnum >= MAX_RF_PATH) {
1280 RT_TRACE(rtlpriv, COMP_INIT, DBG_WARNING, "Invalid TxNum %d\n",
1282 txnum = MAX_RF_PATH - 1;
1285 for (i = 0; i < rate_num; ++i) {
1286 u8 rate_idx = rates[i];
1288 if (IS_1T_RATE(rates[i]))
1290 else if (IS_2T_RATE(rates[i]))
1295 rtlphy->tx_power_by_rate_offset[band][rfpath][txnum][rate_idx] =
1299 rtlpriv, COMP_INIT, DBG_LOUD,
1300 "TxPwrByRateOffset[Band %d][RfPath %d][TxNum %d][rate_idx %d] = 0x%x\n",
1301 band, rfpath, txnum, rate_idx,
1302 rtlphy->tx_power_by_rate_offset[band][rfpath][txnum]
1308 _rtl8822be_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
1310 struct rtl_priv *rtlpriv = rtl_priv(hw);
1311 struct rtl_phy *rtlphy = &rtlpriv->phy;
1313 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW;
1314 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW;
1316 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE;
1317 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE;
1319 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE;
1320 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE;
1322 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = RA_LSSIWRITE_8822B;
1323 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = RB_LSSIWRITE_8822B;
1325 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RHSSIREAD_8822BE;
1326 rtlphy->phyreg_def[RF90_PATH_B].rfhssi_para2 = RHSSIREAD_8822BE;
1328 rtlphy->phyreg_def[RF90_PATH_A].rf_rb = RA_SIREAD_8822B;
1329 rtlphy->phyreg_def[RF90_PATH_B].rf_rb = RB_SIREAD_8822B;
1331 rtlphy->phyreg_def[RF90_PATH_A].rf_rbpi = RA_PIREAD_8822B;
1332 rtlphy->phyreg_def[RF90_PATH_B].rf_rbpi = RB_PIREAD_8822B;
1335 void rtl8822be_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel)
1337 struct rtl_priv *rtlpriv = rtl_priv(hw);
1338 struct rtl_phy *rtlphy = &rtlpriv->phy;
1342 txpwr_level = rtlphy->cur_cck_txpwridx;
1343 txpwr_dbm = _rtl8822be_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_B,
1345 txpwr_level = rtlphy->cur_ofdm24g_txpwridx;
1346 if (_rtl8822be_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_G, txpwr_level) >
1348 txpwr_dbm = _rtl8822be_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_G,
1350 txpwr_level = rtlphy->cur_ofdm24g_txpwridx;
1351 if (_rtl8822be_phy_txpwr_idx_to_dbm(hw, WIRELESS_MODE_N_24G,
1352 txpwr_level) > txpwr_dbm)
1353 txpwr_dbm = _rtl8822be_phy_txpwr_idx_to_dbm(
1354 hw, WIRELESS_MODE_N_24G, txpwr_level);
1355 *powerlevel = txpwr_dbm;
1358 static bool _rtl8822be_phy_get_chnl_index(u8 channel, u8 *chnl_index)
1360 u8 rtl_channel5g[CHANNEL_MAX_NUMBER_5G] = {
1361 36, 38, 40, 42, 44, 46, 48, /* Band 1 */
1362 52, 54, 56, 58, 60, 62, 64, /* Band 2 */
1363 100, 102, 104, 106, 108, 110, 112, /* Band 3 */
1364 116, 118, 120, 122, 124, 126, 128, /* Band 3 */
1365 132, 134, 136, 138, 140, 142, 144, /* Band 3 */
1366 149, 151, 153, 155, 157, 159, 161, /* Band 4 */
1367 165, 167, 169, 171, 173, 175, 177}; /* Band 4 */
1371 if (channel <= 14) {
1373 *chnl_index = channel - 1;
1377 for (i = 0; i < CHANNEL_MAX_NUMBER_5G; ++i) {
1378 if (rtl_channel5g[i] == channel) {
1387 static char _rtl8822be_phy_get_world_wide_limit(char *limit_table)
1389 char min = limit_table[0];
1392 for (i = 0; i < MAX_REGULATION_NUM; ++i) {
1393 if (limit_table[i] < min)
1394 min = limit_table[i];
1399 static char _rtl8822be_phy_get_txpower_limit(struct ieee80211_hw *hw, u8 band,
1400 enum ht_channel_width bandwidth,
1401 enum radio_path rf_path, u8 rate,
1404 struct rtl_priv *rtlpriv = rtl_priv(hw);
1405 struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
1406 struct rtl_phy *rtlphy = &rtlpriv->phy;
1407 short regulation = -1, rate_section = -1, channel_index = -1;
1408 char power_limit = MAX_POWER_INDEX;
1410 if (rtlefuse->eeprom_regulatory == 2)
1411 return MAX_POWER_INDEX;
1413 regulation = TXPWR_LMT_WW;
1431 rate_section = OFDM;
1442 rate_section = HT_MCS0_MCS7;
1447 case DESC_RATEMCS10:
1448 case DESC_RATEMCS11:
1449 case DESC_RATEMCS12:
1450 case DESC_RATEMCS13:
1451 case DESC_RATEMCS14:
1452 case DESC_RATEMCS15:
1453 rate_section = HT_MCS8_MCS15;
1456 case DESC_RATEVHT1SS_MCS0:
1457 case DESC_RATEVHT1SS_MCS1:
1458 case DESC_RATEVHT1SS_MCS2:
1459 case DESC_RATEVHT1SS_MCS3:
1460 case DESC_RATEVHT1SS_MCS4:
1461 case DESC_RATEVHT1SS_MCS5:
1462 case DESC_RATEVHT1SS_MCS6:
1463 case DESC_RATEVHT1SS_MCS7:
1464 case DESC_RATEVHT1SS_MCS8:
1465 case DESC_RATEVHT1SS_MCS9:
1466 rate_section = VHT_1SSMCS0_1SSMCS9;
1469 case DESC_RATEVHT2SS_MCS0:
1470 case DESC_RATEVHT2SS_MCS1:
1471 case DESC_RATEVHT2SS_MCS2:
1472 case DESC_RATEVHT2SS_MCS3:
1473 case DESC_RATEVHT2SS_MCS4:
1474 case DESC_RATEVHT2SS_MCS5:
1475 case DESC_RATEVHT2SS_MCS6:
1476 case DESC_RATEVHT2SS_MCS7:
1477 case DESC_RATEVHT2SS_MCS8:
1478 case DESC_RATEVHT2SS_MCS9:
1479 rate_section = VHT_2SSMCS0_2SSMCS9;
1483 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "Wrong rate 0x%x\n",
1488 if (band == BAND_ON_5G && rate_section == 0)
1489 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1490 "Wrong rate 0x%x: No CCK in 5G Band\n", rate);
1492 /* workaround for wrong index combination to obtain tx power limit,
1493 * OFDM only exists in BW 20M
1495 if (rate_section == 1)
1498 /* workaround for wrong index combination to obtain tx power limit,
1499 * CCK table will only be given in BW 20M
1501 if (rate_section == 0)
1504 /* workaround for wrong indxe combination to obtain tx power limit,
1505 * HT on 80M will reference to HT on 40M
1507 if ((rate_section == 2 || rate_section == 3) && band == BAND_ON_5G &&
1511 if (band == BAND_ON_2_4G)
1512 channel_index = _rtl8822be_phy_get_chnl_idx_of_txpwr_lmt(
1513 hw, BAND_ON_2_4G, channel);
1514 else if (band == BAND_ON_5G)
1515 channel_index = _rtl8822be_phy_get_chnl_idx_of_txpwr_lmt(
1516 hw, BAND_ON_5G, channel);
1517 else if (band == BAND_ON_BOTH)
1518 ; /* BAND_ON_BOTH don't care temporarily */
1520 if (band >= BANDMAX || regulation == -1 || bandwidth == -1 ||
1521 rate_section == -1 || channel_index == -1) {
1523 rtlpriv, COMP_POWER, DBG_LOUD,
1524 "Wrong index value to access power limit table [band %d][regulation %d][bandwidth %d][rf_path %d][rate_section %d][chnl %d]\n",
1525 band, regulation, bandwidth, rf_path, rate_section,
1527 return MAX_POWER_INDEX;
1530 if (band == BAND_ON_2_4G) {
1531 char limits[10] = {0};
1534 for (i = 0; i < 4; ++i)
1535 limits[i] = rtlphy->txpwr_limit_2_4g[i][bandwidth]
1541 (regulation == TXPWR_LMT_WW) ?
1542 _rtl8822be_phy_get_world_wide_limit(limits) :
1543 rtlphy->txpwr_limit_2_4g[regulation][bandwidth]
1548 } else if (band == BAND_ON_5G) {
1549 char limits[10] = {0};
1552 for (i = 0; i < MAX_REGULATION_NUM; ++i)
1554 rtlphy->txpwr_limit_5g[i][bandwidth]
1556 [channel_index][rf_path];
1559 (regulation == TXPWR_LMT_WW) ?
1560 _rtl8822be_phy_get_world_wide_limit(limits) :
1561 rtlphy->txpwr_limit_5g[regulation]
1564 [channel_index][rf_path];
1566 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1567 "No power limit table of the specified band\n");
1573 _rtl8822be_phy_get_txpower_by_rate(struct ieee80211_hw *hw, u8 band, u8 path,
1574 u8 rate /* enum rtl_desc8822b_rate */)
1576 struct rtl_priv *rtlpriv = rtl_priv(hw);
1577 struct rtl_phy *rtlphy = &rtlpriv->phy;
1579 char tx_pwr_diff = 0;
1581 if (band != BAND_ON_2_4G && band != BAND_ON_5G)
1584 if (path > RF90_PATH_B)
1587 if ((rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
1588 (rate >= DESC_RATEVHT2SS_MCS0 && rate <= DESC_RATEVHT2SS_MCS9))
1593 tx_pwr_diff = (char)(rtlphy->tx_power_by_rate_offset[band][path][tx_num]
1600 u8 rtl8822be_get_txpower_index(struct ieee80211_hw *hw, u8 path, u8 rate,
1601 u8 bandwidth, u8 channel)
1603 struct rtl_priv *rtlpriv = rtl_priv(hw);
1604 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1605 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1606 u8 index = (channel - 1);
1608 bool in_24g = false;
1610 char powerdiff_byrate = 0;
1612 if (((rtlhal->current_bandtype == BAND_ON_2_4G) &&
1613 (channel > 14 || channel < 1)) ||
1614 ((rtlhal->current_bandtype == BAND_ON_5G) && (channel <= 14))) {
1616 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1617 "Illegal channel!!\n");
1620 /* 1. base tx power */
1621 in_24g = _rtl8822be_phy_get_chnl_index(channel, &index);
1623 if (RX_HAL_IS_CCK_RATE(rate))
1624 txpower = rtlefuse->txpwrlevel_cck[path][index];
1625 else if (rate >= DESC_RATE6M)
1626 txpower = rtlefuse->txpwrlevel_ht40_1s[path][index];
1628 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1631 if (rate >= DESC_RATE6M && rate <= DESC_RATE54M &&
1632 !RX_HAL_IS_CCK_RATE(rate))
1633 txpower += rtlefuse->txpwr_legacyhtdiff[path][TX_1S];
1635 if (bandwidth == HT_CHANNEL_WIDTH_20) {
1636 if ((rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
1637 (rate >= DESC_RATEVHT1SS_MCS0 &&
1638 rate <= DESC_RATEVHT2SS_MCS9))
1640 rtlefuse->txpwr_ht20diff[path][TX_1S];
1641 if ((rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
1642 (rate >= DESC_RATEVHT2SS_MCS0 &&
1643 rate <= DESC_RATEVHT2SS_MCS9))
1645 rtlefuse->txpwr_ht20diff[path][TX_2S];
1646 } else if (bandwidth == HT_CHANNEL_WIDTH_20_40) {
1647 if ((rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
1648 (rate >= DESC_RATEVHT1SS_MCS0 &&
1649 rate <= DESC_RATEVHT2SS_MCS9))
1651 rtlefuse->txpwr_ht40diff[path][TX_1S];
1652 if ((rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
1653 (rate >= DESC_RATEVHT2SS_MCS0 &&
1654 rate <= DESC_RATEVHT2SS_MCS9))
1656 rtlefuse->txpwr_ht40diff[path][TX_2S];
1657 } else if (bandwidth == HT_CHANNEL_WIDTH_80) {
1658 if ((rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
1659 (rate >= DESC_RATEVHT1SS_MCS0 &&
1660 rate <= DESC_RATEVHT2SS_MCS9))
1662 rtlefuse->txpwr_ht40diff[path][TX_1S];
1663 if ((rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
1664 (rate >= DESC_RATEVHT2SS_MCS0 &&
1665 rate <= DESC_RATEVHT2SS_MCS9))
1667 rtlefuse->txpwr_ht40diff[path][TX_2S];
1671 if (rate >= DESC_RATE6M)
1672 txpower = rtlefuse->txpwr_5g_bw40base[path][index];
1674 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_WARNING,
1677 if (rate >= DESC_RATE6M && rate <= DESC_RATE54M &&
1678 !RX_HAL_IS_CCK_RATE(rate))
1679 txpower += rtlefuse->txpwr_5g_ofdmdiff[path][TX_1S];
1681 if (bandwidth == HT_CHANNEL_WIDTH_20) {
1682 if ((rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
1683 (rate >= DESC_RATEVHT1SS_MCS0 &&
1684 rate <= DESC_RATEVHT2SS_MCS9))
1685 txpower += rtlefuse->txpwr_5g_bw20diff[path]
1687 if ((rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
1688 (rate >= DESC_RATEVHT2SS_MCS0 &&
1689 rate <= DESC_RATEVHT2SS_MCS9))
1690 txpower += rtlefuse->txpwr_5g_bw20diff[path]
1692 } else if (bandwidth == HT_CHANNEL_WIDTH_20_40) {
1693 if ((rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
1694 (rate >= DESC_RATEVHT1SS_MCS0 &&
1695 rate <= DESC_RATEVHT2SS_MCS9))
1696 txpower += rtlefuse->txpwr_5g_bw40diff[path]
1698 if ((rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
1699 (rate >= DESC_RATEVHT2SS_MCS0 &&
1700 rate <= DESC_RATEVHT2SS_MCS9))
1701 txpower += rtlefuse->txpwr_5g_bw40diff[path]
1703 } else if (bandwidth == HT_CHANNEL_WIDTH_80) {
1706 for (i = 0; i < sizeof(rtl_channel5g_80m) / sizeof(u8);
1708 if (rtl_channel5g_80m[i] == channel)
1711 txpower = rtlefuse->txpwr_5g_bw80base[path][index];
1713 if ((rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS15) ||
1714 (rate >= DESC_RATEVHT1SS_MCS0 &&
1715 rate <= DESC_RATEVHT2SS_MCS9))
1716 txpower += rtlefuse->txpwr_5g_bw80diff[path]
1718 if ((rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) ||
1719 (rate >= DESC_RATEVHT2SS_MCS0 &&
1720 rate <= DESC_RATEVHT2SS_MCS9))
1721 txpower += rtlefuse->txpwr_5g_bw80diff[path]
1726 /* 2. tx power by rate */
1727 if (rtlefuse->eeprom_regulatory != 2)
1728 powerdiff_byrate = _rtl8822be_phy_get_txpower_by_rate(
1729 hw, (u8)(!in_24g), path, rate);
1731 /* 3. tx power limit */
1732 if (rtlefuse->eeprom_regulatory == 1)
1733 limit = _rtl8822be_phy_get_txpower_limit(
1734 hw, (u8)(!in_24g), bandwidth, path, rate,
1737 limit = MAX_POWER_INDEX;
1740 powerdiff_byrate = powerdiff_byrate > limit ? limit : powerdiff_byrate;
1742 txpower += powerdiff_byrate;
1744 if (txpower > MAX_POWER_INDEX)
1745 txpower = MAX_POWER_INDEX;
1750 static void _rtl8822be_phy_set_txpower_index(struct ieee80211_hw *hw,
1751 u8 power_index, u8 path, u8 rate)
1753 struct rtl_priv *rtlpriv = rtl_priv(hw);
1758 * For 8822B, phydm api use 4 bytes txagc value
1759 * driver must combine every four 1 byte to one 4 byte and send to phydm
1761 shift = rate & 0x03;
1762 index |= ((u32)power_index << (shift * 8));
1767 if (!rtlpriv->phydm.ops->phydm_write_txagc(rtlpriv, index, path,
1769 RT_TRACE(rtlpriv, COMP_TXAGC, DBG_LOUD,
1770 "%s(index:%d, rfpath:%d, rate:0x%02x) fail\n",
1771 __func__, index, path, rate);
1779 static void _rtl8822be_phy_set_txpower_level_by_path(struct ieee80211_hw *hw,
1781 u8 channel, u8 size)
1783 struct rtl_phy *rtlphy = &(rtl_priv(hw)->phy);
1787 for (i = 0; i < size; i++) {
1788 power_index = rtl8822be_get_txpower_index(
1789 hw, path, array[i], rtlphy->current_chan_bw, channel);
1790 _rtl8822be_phy_set_txpower_index(hw, power_index, path,
1795 void rtl8822be_phy_set_txpower_level_by_path(struct ieee80211_hw *hw,
1796 u8 channel, u8 path)
1798 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1801 * Below order is *VERY* important!
1802 * Because _rtl8822be_phy_set_txpower_index() do actually writing
1803 * every four power values.
1805 if (rtlhal->current_bandtype == BAND_ON_2_4G)
1806 _rtl8822be_phy_set_txpower_level_by_path(
1807 hw, cck_rates, path, channel, sizes_of_cck_retes);
1808 _rtl8822be_phy_set_txpower_level_by_path(hw, ofdm_rates, path, channel,
1809 sizes_of_ofdm_retes);
1810 _rtl8822be_phy_set_txpower_level_by_path(hw, ht_rates_1t, path, channel,
1811 sizes_of_ht_retes_1t);
1812 _rtl8822be_phy_set_txpower_level_by_path(hw, ht_rates_2t, path, channel,
1813 sizes_of_ht_retes_2t);
1814 _rtl8822be_phy_set_txpower_level_by_path(hw, vht_rates_1t, path,
1815 channel, sizes_of_vht_retes);
1816 _rtl8822be_phy_set_txpower_level_by_path(hw, vht_rates_2t, path,
1817 channel, sizes_of_vht_retes);
1820 void rtl8822be_phy_set_tx_power_index_by_rs(struct ieee80211_hw *hw, u8 channel,
1821 u8 path, enum rate_section rs)
1826 } rs_ref[MAX_RATE_SECTION] = {
1827 {cck_rates, sizes_of_cck_retes},
1828 {ofdm_rates, sizes_of_ofdm_retes},
1829 {ht_rates_1t, sizes_of_ht_retes_1t},
1830 {ht_rates_2t, sizes_of_ht_retes_2t},
1831 {vht_rates_1t, sizes_of_vht_retes},
1832 {vht_rates_2t, sizes_of_vht_retes},
1835 if (rs >= MAX_RATE_SECTION)
1838 _rtl8822be_phy_set_txpower_level_by_path(hw, rs_ref[rs].array, path,
1839 channel, rs_ref[rs].size);
1842 void rtl8822be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
1844 struct rtl_priv *rtlpriv = rtl_priv(hw);
1845 struct rtl_phy *rtlphy = &rtlpriv->phy;
1848 for (path = RF90_PATH_A; path < rtlphy->num_total_rfpath; ++path)
1849 rtl8822be_phy_set_txpower_level_by_path(hw, channel, path);
1852 static long _rtl8822be_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
1853 enum wireless_mode wirelessmode,
1859 switch (wirelessmode) {
1860 case WIRELESS_MODE_B:
1863 case WIRELESS_MODE_G:
1864 case WIRELESS_MODE_N_24G:
1871 pwrout_dbm = txpwridx / 2 + offset;
1875 void rtl8822be_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation)
1877 struct rtl_priv *rtlpriv = rtl_priv(hw);
1878 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1879 enum io_type iotype = IO_CMD_PAUSE_BAND0_DM_BY_SCAN;
1881 if (!is_hal_stop(rtlhal)) {
1882 switch (operation) {
1883 case SCAN_OPT_BACKUP_BAND0:
1884 iotype = IO_CMD_PAUSE_BAND0_DM_BY_SCAN;
1885 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_IO_CMD,
1889 case SCAN_OPT_BACKUP_BAND1:
1890 iotype = IO_CMD_PAUSE_BAND1_DM_BY_SCAN;
1891 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_IO_CMD,
1895 case SCAN_OPT_RESTORE:
1896 iotype = IO_CMD_RESUME_DM_BY_SCAN;
1897 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_IO_CMD,
1901 pr_err("Unknown Scan Backup operation.\n");
1907 static u8 _rtl8822be_phy_get_pri_ch_id(struct rtl_priv *rtlpriv)
1909 struct rtl_phy *rtlphy = &rtlpriv->phy;
1910 struct rtl_mac *mac = rtl_mac(rtlpriv);
1913 if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
1914 /* primary channel is at lower subband of 80MHz & 40MHz */
1915 if ((mac->cur_40_prime_sc == HAL_PRIME_CHNL_OFFSET_LOWER) &&
1916 (mac->cur_80_prime_sc == HAL_PRIME_CHNL_OFFSET_LOWER)) {
1917 pri_ch_idx = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
1918 /* primary channel is at
1919 * lower subband of 80MHz & upper subband of 40MHz
1921 } else if ((mac->cur_40_prime_sc ==
1922 HAL_PRIME_CHNL_OFFSET_UPPER) &&
1923 (mac->cur_80_prime_sc ==
1924 HAL_PRIME_CHNL_OFFSET_LOWER)) {
1925 pri_ch_idx = VHT_DATA_SC_20_LOWER_OF_80MHZ;
1926 /* primary channel is at
1927 * upper subband of 80MHz & lower subband of 40MHz
1929 } else if ((mac->cur_40_prime_sc ==
1930 HAL_PRIME_CHNL_OFFSET_LOWER) &&
1931 (mac->cur_80_prime_sc ==
1932 HAL_PRIME_CHNL_OFFSET_UPPER)) {
1933 pri_ch_idx = VHT_DATA_SC_20_UPPER_OF_80MHZ;
1934 /* primary channel is at
1935 * upper subband of 80MHz & upper subband of 40MHz
1937 } else if ((mac->cur_40_prime_sc ==
1938 HAL_PRIME_CHNL_OFFSET_UPPER) &&
1939 (mac->cur_80_prime_sc ==
1940 HAL_PRIME_CHNL_OFFSET_UPPER)) {
1941 pri_ch_idx = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
1943 if (mac->cur_80_prime_sc == HAL_PRIME_CHNL_OFFSET_LOWER)
1944 pri_ch_idx = VHT_DATA_SC_40_LOWER_OF_80MHZ;
1945 else if (mac->cur_80_prime_sc ==
1946 HAL_PRIME_CHNL_OFFSET_UPPER)
1947 pri_ch_idx = VHT_DATA_SC_40_UPPER_OF_80MHZ;
1949 } else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
1950 /* primary channel is at upper subband of 40MHz */
1951 if (mac->cur_40_prime_sc == HAL_PRIME_CHNL_OFFSET_UPPER)
1952 pri_ch_idx = VHT_DATA_SC_20_UPPER_OF_80MHZ;
1953 /* primary channel is at lower subband of 40MHz */
1954 else if (mac->cur_40_prime_sc == HAL_PRIME_CHNL_OFFSET_LOWER)
1955 pri_ch_idx = VHT_DATA_SC_20_LOWER_OF_80MHZ;
1963 void rtl8822be_phy_set_bw_mode(struct ieee80211_hw *hw,
1964 enum nl80211_channel_type ch_type)
1966 struct rtl_priv *rtlpriv = rtl_priv(hw);
1967 struct rtl_phy *rtlphy = &rtlpriv->phy;
1968 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1969 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1970 u8 tmp_bw = rtlphy->current_chan_bw;
1972 if (rtlphy->set_bwmode_inprogress)
1974 rtlphy->set_bwmode_inprogress = true;
1975 if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
1976 /* get primary channel index */
1977 u8 pri_ch_idx = _rtl8822be_phy_get_pri_ch_id(rtlpriv);
1979 /* 3.1 set MAC register */
1980 rtlpriv->halmac.ops->halmac_set_bandwidth(
1981 rtlpriv, rtlphy->current_channel, pri_ch_idx,
1982 rtlphy->current_chan_bw);
1984 /* 3.2 set BB/RF registet */
1985 rtlpriv->phydm.ops->phydm_switch_bandwidth(
1986 rtlpriv, pri_ch_idx, rtlphy->current_chan_bw);
1988 if (!mac->act_scanning)
1989 rtlpriv->phydm.ops->phydm_iq_calibrate(rtlpriv);
1991 rtlphy->set_bwmode_inprogress = false;
1993 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1994 "FALSE driver sleep or unload\n");
1995 rtlphy->set_bwmode_inprogress = false;
1996 rtlphy->current_chan_bw = tmp_bw;
2000 u8 rtl8822be_phy_sw_chnl(struct ieee80211_hw *hw)
2002 struct rtl_priv *rtlpriv = rtl_priv(hw);
2003 struct rtl_phy *rtlphy = &rtlpriv->phy;
2004 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
2005 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
2006 u32 timeout = 1000, timecount = 0;
2007 u8 channel = rtlphy->current_channel;
2009 if (rtlphy->sw_chnl_inprogress)
2011 if (rtlphy->set_bwmode_inprogress)
2014 if ((is_hal_stop(rtlhal)) || (RT_CANNOT_IO(hw))) {
2015 RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
2016 "sw_chnl_inprogress false driver sleep or unload\n");
2019 while (rtlphy->lck_inprogress && timecount < timeout) {
2024 if (rtlphy->current_channel > 14)
2025 rtlhal->current_bandtype = BAND_ON_5G;
2026 else if (rtlphy->current_channel <= 14)
2027 rtlhal->current_bandtype = BAND_ON_2_4G;
2029 if (rtlpriv->cfg->ops->get_btc_status())
2030 rtlpriv->btcoexist.btc_ops->btc_switch_band_notify(
2031 rtlpriv, rtlhal->current_bandtype, mac->act_scanning);
2033 rtlpriv->btcoexist.btc_ops->btc_switch_band_notify_wifi_only(
2034 rtlpriv, rtlhal->current_bandtype, mac->act_scanning);
2036 rtlpriv->phydm.ops->phydm_switch_band(rtlpriv, rtlphy->current_channel);
2038 rtlphy->sw_chnl_inprogress = true;
2042 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
2043 "switch to channel%d, band type is %d\n",
2044 rtlphy->current_channel, rtlhal->current_bandtype);
2046 rtlpriv->phydm.ops->phydm_switch_channel(rtlpriv,
2047 rtlphy->current_channel);
2049 rtlpriv->phydm.ops->phydm_clear_txpowertracking_state(rtlpriv);
2051 rtl8822be_phy_set_txpower_level(hw, rtlphy->current_channel);
2053 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
2054 rtlphy->sw_chnl_inprogress = false;
2058 bool rtl8822be_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype)
2060 struct rtl_priv *rtlpriv = rtl_priv(hw);
2061 struct rtl_phy *rtlphy = &rtlpriv->phy;
2062 bool postprocessing = false;
2064 RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2065 "-->IO Cmd(%#x), set_io_inprogress(%d)\n", iotype,
2066 rtlphy->set_io_inprogress);
2069 case IO_CMD_RESUME_DM_BY_SCAN:
2070 RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2071 "[IO CMD] Resume DM after scan.\n");
2072 postprocessing = true;
2074 case IO_CMD_PAUSE_BAND0_DM_BY_SCAN:
2075 case IO_CMD_PAUSE_BAND1_DM_BY_SCAN:
2076 RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2077 "[IO CMD] Pause DM before scan.\n");
2078 postprocessing = true;
2081 pr_err("switch case not process\n");
2085 if (postprocessing && !rtlphy->set_io_inprogress) {
2086 rtlphy->set_io_inprogress = true;
2087 rtlphy->current_io_type = iotype;
2091 rtl8822be_phy_set_io(hw);
2092 RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype);
2096 static void rtl8822be_phy_set_io(struct ieee80211_hw *hw)
2098 struct rtl_priv *rtlpriv = rtl_priv(hw);
2099 struct rtl_phy *rtlphy = &rtlpriv->phy;
2101 RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2102 "--->Cmd(%#x), set_io_inprogress(%d)\n",
2103 rtlphy->current_io_type, rtlphy->set_io_inprogress);
2104 switch (rtlphy->current_io_type) {
2105 case IO_CMD_RESUME_DM_BY_SCAN:
2107 case IO_CMD_PAUSE_BAND0_DM_BY_SCAN:
2109 case IO_CMD_PAUSE_BAND1_DM_BY_SCAN:
2112 pr_err("switch case not process\n");
2115 rtlphy->set_io_inprogress = false;
2116 RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, "(%#x)\n",
2117 rtlphy->current_io_type);
2120 static void rtl8822be_phy_set_rf_on(struct ieee80211_hw *hw)
2122 struct rtl_priv *rtlpriv = rtl_priv(hw);
2124 rtl_write_byte(rtlpriv, REG_SPS0_CTRL_8822B, 0x2b);
2125 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN_8822B, 0xE3);
2126 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN_8822B, 0xE2);
2127 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN_8822B, 0xE3);
2128 rtl_write_byte(rtlpriv, REG_TXPAUSE_8822B, 0x00);
2131 static bool _rtl8822be_phy_set_rf_power_state(struct ieee80211_hw *hw,
2132 enum rf_pwrstate rfpwr_state)
2134 struct rtl_priv *rtlpriv = rtl_priv(hw);
2135 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2136 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
2137 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
2138 bool bresult = true;
2140 struct rtl8192_tx_ring *ring = NULL;
2142 switch (rfpwr_state) {
2144 if ((ppsc->rfpwr_state == ERFOFF) &&
2145 RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC)) {
2146 bool rtstatus = false;
2147 u32 initialize_count = 0;
2151 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2152 "IPS Set eRf nic enable\n");
2153 rtstatus = rtl_ps_enable_nic(hw);
2154 } while ((!rtstatus) && (initialize_count < 10));
2155 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
2157 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2158 "Set ERFON slept:%d ms\n",
2159 jiffies_to_msecs(jiffies -
2160 ppsc->last_sleep_jiffies));
2161 ppsc->last_awake_jiffies = jiffies;
2162 rtl8822be_phy_set_rf_on(hw);
2164 if (mac->link_state == MAC80211_LINKED)
2165 rtlpriv->cfg->ops->led_control(hw, LED_CTL_LINK);
2167 rtlpriv->cfg->ops->led_control(hw, LED_CTL_NO_LINK);
2170 for (queue_id = 0, i = 0;
2171 queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
2172 ring = &pcipriv->dev.tx_ring[queue_id];
2173 if (queue_id == BEACON_QUEUE ||
2174 skb_queue_len(&ring->queue) == 0) {
2179 rtlpriv, COMP_ERR, DBG_WARNING,
2180 "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
2182 skb_queue_len(&ring->queue));
2187 if (i >= MAX_DOZE_WAITING_TIMES_9x) {
2189 rtlpriv, COMP_ERR, DBG_WARNING,
2190 "\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
2191 MAX_DOZE_WAITING_TIMES_9x, queue_id,
2192 skb_queue_len(&ring->queue));
2197 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
2198 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2199 "IPS Set eRf nic disable\n");
2200 rtl_ps_disable_nic(hw);
2201 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
2203 if (ppsc->rfoff_reason == RF_CHANGE_BY_IPS) {
2204 rtlpriv->cfg->ops->led_control(hw,
2207 rtlpriv->cfg->ops->led_control(
2208 hw, LED_CTL_POWER_OFF);
2213 pr_err("switch case not process\n");
2218 ppsc->rfpwr_state = rfpwr_state;
2222 bool rtl8822be_phy_set_rf_power_state(struct ieee80211_hw *hw,
2223 enum rf_pwrstate rfpwr_state)
2225 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
2227 bool bresult = false;
2229 if (rfpwr_state == ppsc->rfpwr_state)
2231 bresult = _rtl8822be_phy_set_rf_power_state(hw, rfpwr_state);