drivers/staging/rtlwifi/phydm/rtl8822b/phydm_hal_api8822b.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2016  Realtek Corporation.
   5  *
   6  * Contact Information:
   7  * wlanfae <wlanfae@realtek.com>
   8  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
   9  * Hsinchu 300, Taiwan.
  10  *
  11  * Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *****************************************************************************/
  14 #ifndef __INC_PHYDM_API_H_8822B__
  15 #define __INC_PHYDM_API_H_8822B__
  16
  17 /*2016.08.01 (HW user guide version: R27, SW user guide version: R05,
  18  *            Modification: R31)
  19  */
  20 #define PHY_CONFIG_VERSION_8822B "27.5.31"
  21
  22 #define INVALID_RF_DATA 0xffffffff
  23 #define INVALID_TXAGC_DATA 0xff
  24
  25 #define config_phydm_read_rf_check_8822b(data) (data != INVALID_RF_DATA)
  26 #define config_phydm_read_txagc_check_8822b(data) (data != INVALID_TXAGC_DATA)
  27
  28 u32 config_phydm_read_rf_reg_8822b(struct phy_dm_struct *dm,
  29                                    enum odm_rf_radio_path rf_path, u32 reg_addr,
  30                                    u32 bit_mask);
  31
  32 bool config_phydm_write_rf_reg_8822b(struct phy_dm_struct *dm,
  33                                      enum odm_rf_radio_path rf_path,
  34                                      u32 reg_addr, u32 bit_mask, u32 data);
  35
  36 bool config_phydm_write_txagc_8822b(struct phy_dm_struct *dm, u32 power_index,
  37                                     enum odm_rf_radio_path path, u8 hw_rate);
  38
  39 u8 config_phydm_read_txagc_8822b(struct phy_dm_struct *dm,
  40                                  enum odm_rf_radio_path path, u8 hw_rate);
  41
  42 bool config_phydm_switch_band_8822b(struct phy_dm_struct *dm, u8 central_ch);
  43
  44 bool config_phydm_switch_channel_8822b(struct phy_dm_struct *dm, u8 central_ch);
  45
  46 bool config_phydm_switch_bandwidth_8822b(struct phy_dm_struct *dm,
  47                                          u8 primary_ch_idx,
  48                                          enum odm_bw bandwidth);
  49
  50 bool config_phydm_switch_channel_bw_8822b(struct phy_dm_struct *dm,
  51                                           u8 central_ch, u8 primary_ch_idx,
  52                                           enum odm_bw bandwidth);
  53
  54 bool config_phydm_trx_mode_8822b(struct phy_dm_struct *dm,
  55                                  enum odm_rf_path tx_path,
  56                                  enum odm_rf_path rx_path, bool is_tx2_path);
  57
  58 bool config_phydm_parameter_init(struct phy_dm_struct *dm,
  59                                  enum odm_parameter_init type);
  60
  61 /* ======================================================================== */
  62 /* These following functions can be used for PHY DM only*/
  63
  64 bool phydm_write_txagc_1byte_8822b(struct phy_dm_struct *dm, u32 power_index,
  65                                    enum odm_rf_radio_path path, u8 hw_rate);
  66
  67 void phydm_init_hw_info_by_rfe_type_8822b(struct phy_dm_struct *dm);
  68
  69 s32 phydm_get_condition_number_8822B(struct phy_dm_struct *dm);
  70
  71 /* ======================================================================== */
  72
  73 #endif /*  __INC_PHYDM_API_H_8822B__ */