drivers/staging/rtlwifi/phydm/phydm_noisemonitor.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2016  Realtek Corporation.
   5  *
   6  * Contact Information:
   7  * wlanfae <wlanfae@realtek.com>
   8  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
   9  * Hsinchu 300, Taiwan.
  10  *
  11  * Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *****************************************************************************/
  14
  15 /* ************************************************************
  16  * include files
  17  * *************************************************************/
  18 #include "mp_precomp.h"
  19 #include "phydm_precomp.h"
  20 #include "phydm_noisemonitor.h"
  21
  22 /* *************************************************
  23  * This function is for inband noise test utility only
  24  * To obtain the inband noise level(dbm), do the following.
  25  * 1. disable DIG and Power Saving
  26  * 2. Set initial gain = 0x1a
  27  * 3. Stop updating idle time pwer report (for driver read)
  28  *      - 0x80c[25]
  29  *
  30  * **************************************************/
  31
  32 #define VALID_MIN -35
  33 #define VALID_MAX 10
  34 #define VALID_CNT 5
  35
  36 static inline void phydm_set_noise_data_sum(struct noise_level *noise_data,
  37                                             u8 max_rf_path)
  38 {
  39         u8 rf_path;
  40
  41         for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) {
  42                 if (noise_data->valid_cnt[rf_path])
  43                         noise_data->sum[rf_path] /=
  44                                 noise_data->valid_cnt[rf_path];
  45                 else
  46                         noise_data->sum[rf_path] = 0;
  47         }
  48 }
  49
  50 static s16 odm_inband_noise_monitor_n_series(struct phy_dm_struct *dm,
  51                                              u8 is_pause_dig, u8 igi_value,
  52                                              u32 max_time)
  53 {
  54         u32 tmp4b;
  55         u8 max_rf_path = 0, rf_path;
  56         u8 reg_c50, reg_c58, valid_done = 0;
  57         struct noise_level noise_data;
  58         u64 start = 0, func_start = 0, func_end = 0;
  59
  60         func_start = odm_get_current_time(dm);
  61         dm->noise_level.noise_all = 0;
  62
  63         if ((dm->rf_type == ODM_1T2R) || (dm->rf_type == ODM_2T2R))
  64                 max_rf_path = 2;
  65         else
  66                 max_rf_path = 1;
  67
  68         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "%s() ==>\n", __func__);
  69
  70         odm_memory_set(dm, &noise_data, 0, sizeof(struct noise_level));
  71
  72         /*  */
  73         /* step 1. Disable DIG && Set initial gain. */
  74         /*  */
  75
  76         if (is_pause_dig)
  77                 odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value);
  78         /*  */
  79         /* step 2. Disable all power save for read registers */
  80         /*  */
  81         /* dcmd_DebugControlPowerSave(adapter, PSDisable); */
  82
  83         /*  */
  84         /* step 3. Get noise power level */
  85         /*  */
  86         start = odm_get_current_time(dm);
  87         while (1) {
  88                 /* Stop updating idle time pwer report (for driver read) */
  89                 odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 1);
  90
  91                 /* Read Noise Floor Report */
  92                 tmp4b = odm_get_bb_reg(dm, 0x8f8, MASKDWORD);
  93                 ODM_RT_TRACE(dm, ODM_COMP_COMMON,
  94                              "Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b);
  95
  96                 /* update idle time pwer report per 5us */
  97                 odm_set_bb_reg(dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 0);
  98
  99                 noise_data.value[ODM_RF_PATH_A] = (u8)(tmp4b & 0xff);
 100                 noise_data.value[ODM_RF_PATH_B] = (u8)((tmp4b & 0xff00) >> 8);
 101
 102                 ODM_RT_TRACE(dm, ODM_COMP_COMMON,
 103                              "value_a = 0x%x(%d), value_b = 0x%x(%d)\n",
 104                              noise_data.value[ODM_RF_PATH_A],
 105                              noise_data.value[ODM_RF_PATH_A],
 106                              noise_data.value[ODM_RF_PATH_B],
 107                              noise_data.value[ODM_RF_PATH_B]);
 108
 109                 for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path;
 110                      rf_path++) {
 111                         noise_data.sval[rf_path] =
 112                                 (s8)noise_data.value[rf_path];
 113                         noise_data.sval[rf_path] /= 2;
 114                 }
 115
 116                 ODM_RT_TRACE(dm, ODM_COMP_COMMON, "sval_a = %d, sval_b = %d\n",
 117                              noise_data.sval[ODM_RF_PATH_A],
 118                              noise_data.sval[ODM_RF_PATH_B]);
 119
 120                 for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path;
 121                      rf_path++) {
 122                         if (!(noise_data.valid_cnt[rf_path] < VALID_CNT) ||
 123                             !(noise_data.sval[rf_path] < VALID_MAX &&
 124                               noise_data.sval[rf_path] >= VALID_MIN)) {
 125                                 continue;
 126                         }
 127
 128                         noise_data.valid_cnt[rf_path]++;
 129                         noise_data.sum[rf_path] += noise_data.sval[rf_path];
 130                         ODM_RT_TRACE(dm, ODM_COMP_COMMON,
 131                                      "rf_path:%d Valid sval = %d\n", rf_path,
 132                                      noise_data.sval[rf_path]);
 133                         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "Sum of sval = %d,\n",
 134                                      noise_data.sum[rf_path]);
 135                         if (noise_data.valid_cnt[rf_path] == VALID_CNT) {
 136                                 valid_done++;
 137                                 ODM_RT_TRACE(
 138                                         dm, ODM_COMP_COMMON,
 139                                         "After divided, rf_path:%d,sum = %d\n",
 140                                         rf_path, noise_data.sum[rf_path]);
 141                         }
 142                 }
 143
 144                 if ((valid_done == max_rf_path) ||
 145                     (odm_get_progressing_time(dm, start) > max_time)) {
 146                         phydm_set_noise_data_sum(&noise_data, max_rf_path);
 147                         break;
 148                 }
 149         }
 150         reg_c50 = (u8)odm_get_bb_reg(dm, REG_OFDM_0_XA_AGC_CORE1, MASKBYTE0);
 151         reg_c50 &= ~BIT(7);
 152         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "0x%x = 0x%02x(%d)\n",
 153                      REG_OFDM_0_XA_AGC_CORE1, reg_c50, reg_c50);
 154         dm->noise_level.noise[ODM_RF_PATH_A] =
 155                 (u8)(-110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]);
 156         dm->noise_level.noise_all += dm->noise_level.noise[ODM_RF_PATH_A];
 157
 158         if (max_rf_path == 2) {
 159                 reg_c58 = (u8)odm_get_bb_reg(dm, REG_OFDM_0_XB_AGC_CORE1,
 160                                              MASKBYTE0);
 161                 reg_c58 &= ~BIT(7);
 162                 ODM_RT_TRACE(dm, ODM_COMP_COMMON, "0x%x = 0x%02x(%d)\n",
 163                              REG_OFDM_0_XB_AGC_CORE1, reg_c58, reg_c58);
 164                 dm->noise_level.noise[ODM_RF_PATH_B] =
 165                         (u8)(-110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]);
 166                 dm->noise_level.noise_all +=
 167                         dm->noise_level.noise[ODM_RF_PATH_B];
 168         }
 169         dm->noise_level.noise_all /= max_rf_path;
 170
 171         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "noise_a = %d, noise_b = %d\n",
 172                      dm->noise_level.noise[ODM_RF_PATH_A],
 173                      dm->noise_level.noise[ODM_RF_PATH_B]);
 174
 175         /*  */
 176         /* step 4. Recover the Dig */
 177         /*  */
 178         if (is_pause_dig)
 179                 odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value);
 180         func_end = odm_get_progressing_time(dm, func_start);
 181
 182         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "%s() <==\n", __func__);
 183         return dm->noise_level.noise_all;
 184 }
 185
 186 static s16 odm_inband_noise_monitor_ac_series(struct phy_dm_struct *dm,
 187                                               u8 is_pause_dig, u8 igi_value,
 188                                               u32 max_time)
 189 {
 190         s32 rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/
 191         s32 value32, pwdb_A = 0, sval, noise, sum;
 192         bool pd_flag;
 193         u8 valid_cnt;
 194         u64 start = 0, func_start = 0, func_end = 0;
 195
 196         if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A)))
 197                 return 0;
 198
 199         func_start = odm_get_current_time(dm);
 200         dm->noise_level.noise_all = 0;
 201
 202         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "%s() ==>\n", __func__);
 203
 204         /* step 1. Disable DIG && Set initial gain. */
 205         if (is_pause_dig)
 206                 odm_pause_dig(dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value);
 207
 208         /* step 2. Disable all power save for read registers */
 209         /*dcmd_DebugControlPowerSave(adapter, PSDisable); */
 210
 211         /* step 3. Get noise power level */
 212         start = odm_get_current_time(dm);
 213
 214         /* reset counters */
 215         sum = 0;
 216         valid_cnt = 0;
 217
 218         /* step 3. Get noise power level */
 219         while (1) {
 220                 /*Set IGI=0x1C */
 221                 odm_write_dig(dm, 0x1C);
 222                 /*stop CK320&CK88 */
 223                 odm_set_bb_reg(dm, 0x8B4, BIT(6), 1);
 224                 /*Read path-A */
 225                 odm_set_bb_reg(dm, 0x8FC, MASKDWORD, 0x200); /*set debug port*/
 226                 value32 = odm_get_bb_reg(dm, 0xFA0,
 227                                          MASKDWORD); /*read debug port*/
 228
 229                 rxi_buf_anta = (value32 & 0xFFC00) >>
 230                                10; /*rxi_buf_anta=RegFA0[19:10]*/
 231                 rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/
 232
 233                 pd_flag = (bool)((value32 & BIT(31)) >> 31);
 234
 235                 /*Not in packet detection period or Tx state */
 236                 if ((!pd_flag) || (rxi_buf_anta != 0x200)) {
 237                         /*sign conversion*/
 238                         rxi_buf_anta = odm_sign_conversion(rxi_buf_anta, 10);
 239                         rxq_buf_anta = odm_sign_conversion(rxq_buf_anta, 10);
 240
 241                         pwdb_A = odm_pwdb_conversion(
 242                                 rxi_buf_anta * rxi_buf_anta +
 243                                         rxq_buf_anta * rxq_buf_anta,
 244                                 20, 18); /*S(10,9)*S(10,9)=S(20,18)*/
 245
 246                         ODM_RT_TRACE(
 247                                 dm, ODM_COMP_COMMON,
 248                                 "pwdb_A= %d dB, rxi_buf_anta= 0x%x, rxq_buf_anta= 0x%x\n",
 249                                 pwdb_A, rxi_buf_anta & 0x3FF,
 250                                 rxq_buf_anta & 0x3FF);
 251                 }
 252                 /*Start CK320&CK88*/
 253                 odm_set_bb_reg(dm, 0x8B4, BIT(6), 0);
 254                 /*BB Reset*/
 255                 odm_write_1byte(dm, 0x02, odm_read_1byte(dm, 0x02) & (~BIT(0)));
 256                 odm_write_1byte(dm, 0x02, odm_read_1byte(dm, 0x02) | BIT(0));
 257                 /*PMAC Reset*/
 258                 odm_write_1byte(dm, 0xB03,
 259                                 odm_read_1byte(dm, 0xB03) & (~BIT(0)));
 260                 odm_write_1byte(dm, 0xB03, odm_read_1byte(dm, 0xB03) | BIT(0));
 261                 /*CCK Reset*/
 262                 if (odm_read_1byte(dm, 0x80B) & BIT(4)) {
 263                         odm_write_1byte(dm, 0x80B,
 264                                         odm_read_1byte(dm, 0x80B) & (~BIT(4)));
 265                         odm_write_1byte(dm, 0x80B,
 266                                         odm_read_1byte(dm, 0x80B) | BIT(4));
 267                 }
 268
 269                 sval = pwdb_A;
 270
 271                 if ((sval < 0 && sval >= -27) && (valid_cnt < VALID_CNT)) {
 272                         valid_cnt++;
 273                         sum += sval;
 274                         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "Valid sval = %d\n",
 275                                      sval);
 276                         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "Sum of sval = %d,\n",
 277                                      sum);
 278                         if ((valid_cnt >= VALID_CNT) ||
 279                             (odm_get_progressing_time(dm, start) > max_time)) {
 280                                 sum /= VALID_CNT;
 281                                 ODM_RT_TRACE(dm, ODM_COMP_COMMON,
 282                                              "After divided, sum = %d\n", sum);
 283                                 break;
 284                         }
 285                 }
 286         }
 287
 288         /*ADC backoff is 12dB,*/
 289         /*Ptarget=0x1C-110=-82dBm*/
 290         noise = sum + 12 + 0x1C - 110;
 291
 292         /*Offset*/
 293         noise = noise - 3;
 294         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "noise = %d\n", noise);
 295         dm->noise_level.noise_all = (s16)noise;
 296
 297         /* step 4. Recover the Dig*/
 298         if (is_pause_dig)
 299                 odm_pause_dig(dm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_1, igi_value);
 300
 301         func_end = odm_get_progressing_time(dm, func_start);
 302
 303         ODM_RT_TRACE(dm, ODM_COMP_COMMON, "%s() <==\n", __func__);
 304
 305         return dm->noise_level.noise_all;
 306 }
 307
 308 s16 odm_inband_noise_monitor(void *dm_void, u8 is_pause_dig, u8 igi_value,
 309                              u32 max_time)
 310 {
 311         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 312
 313         if (dm->support_ic_type & ODM_IC_11AC_SERIES)
 314                 return odm_inband_noise_monitor_ac_series(dm, is_pause_dig,
 315                                                           igi_value, max_time);
 316         else
 317                 return odm_inband_noise_monitor_n_series(dm, is_pause_dig,
 318                                                          igi_value, max_time);
 319 }