1 /******************************************************************************
3 * Copyright(c) 2007 - 2016 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
26 #ifndef __ODM_INTERFACE_H__
27 #define __ODM_INTERFACE_H__
29 #define INTERFACE_VERSION "1.1" /*2015.07.29 YuChen*/
32 * =========== Constant/Structure/Enum/... Define
36 * =========== Macro Define
39 #define _reg_all(_name) ODM_##_name
40 #define _reg_ic(_name, _ic) ODM_##_name##_ic
41 #define _bit_all(_name) BIT_##_name
42 #define _bit_ic(_name, _ic) BIT_##_name##_ic
44 /* _cat: implemented by Token-Pasting Operator. */
46 /*===================================
48 * #define ODM_REG_DIG_11N 0xC50
49 * #define ODM_REG_DIG_11AC 0xDDD
51 * ODM_REG(DIG,_pdm_odm)
52 * ===================================
55 #define _reg_11N(_name) ODM_REG_##_name##_11N
56 #define _reg_11AC(_name) ODM_REG_##_name##_11AC
57 #define _bit_11N(_name) ODM_BIT_##_name##_11N
58 #define _bit_11AC(_name) ODM_BIT_##_name##_11AC
60 #define _cat(_name, _ic_type, _func) \
61 (((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
64 /* _name: name of register or bit.
65 * Example: "ODM_REG(R_A_AGC_CORE1, dm)"
66 * gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C",
67 * depends on support_ic_type.
69 #define ODM_REG(_name, _pdm_odm) _cat(_name, _pdm_odm->support_ic_type, _reg)
70 #define ODM_BIT(_name, _pdm_odm) _cat(_name, _pdm_odm->support_ic_type, _bit)
72 PHYDM_H2C_TXBF = 0x41,
73 ODM_H2C_RSSI_REPORT = 0x42,
74 ODM_H2C_IQ_CALIBRATION = 0x45,
75 ODM_H2C_RA_PARA_ADJUST = 0x47,
76 PHYDM_H2C_DYNAMIC_TX_PATH = 0x48,
77 PHYDM_H2C_FW_TRACE_EN = 0x49,
78 ODM_H2C_WIFI_CALIBRATION = 0x6d,
87 PHYDM_C2H_TX_REPORT = 3,
90 PHYDM_C2H_RA_RPT = 12,
91 PHYDM_C2H_RA_PARA_RPT = 14,
92 PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15,
93 PHYDM_C2H_IQK_FINISH = 17, /*0x11*/
94 PHYDM_C2H_DBG_CODE = 0xFE,
95 PHYDM_C2H_EXTEND = 0xFF,
98 enum phydm_extend_c2h_evt {
99 PHYDM_EXTEND_C2H_DBG_PRINT = 0
104 * =========== Extern Variable ??? It should be forbidden.
108 * =========== EXtern Function Prototype
111 u8 odm_read_1byte(struct phy_dm_struct *dm, u32 reg_addr);
113 u16 odm_read_2byte(struct phy_dm_struct *dm, u32 reg_addr);
115 u32 odm_read_4byte(struct phy_dm_struct *dm, u32 reg_addr);
117 void odm_write_1byte(struct phy_dm_struct *dm, u32 reg_addr, u8 data);
119 void odm_write_2byte(struct phy_dm_struct *dm, u32 reg_addr, u16 data);
121 void odm_write_4byte(struct phy_dm_struct *dm, u32 reg_addr, u32 data);
123 void odm_set_mac_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask,
126 u32 odm_get_mac_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask);
128 void odm_set_bb_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask,
131 u32 odm_get_bb_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask);
133 void odm_set_rf_reg(struct phy_dm_struct *dm, enum odm_rf_radio_path e_rf_path,
134 u32 reg_addr, u32 bit_mask, u32 data);
136 u32 odm_get_rf_reg(struct phy_dm_struct *dm, enum odm_rf_radio_path e_rf_path,
137 u32 reg_addr, u32 bit_mask);
140 * Memory Relative Function.
142 void odm_allocate_memory(struct phy_dm_struct *dm, void **ptr, u32 length);
143 void odm_free_memory(struct phy_dm_struct *dm, void *ptr, u32 length);
145 void odm_move_memory(struct phy_dm_struct *dm, void *p_dest, void *src,
148 s32 odm_compare_memory(struct phy_dm_struct *dm, void *p_buf1, void *buf2,
151 void odm_memory_set(struct phy_dm_struct *dm, void *pbuf, s8 value, u32 length);
154 * ODM MISC-spin lock relative API.
156 void odm_acquire_spin_lock(struct phy_dm_struct *dm,
157 enum rt_spinlock_type type);
159 void odm_release_spin_lock(struct phy_dm_struct *dm,
160 enum rt_spinlock_type type);
163 * ODM Timer relative API.
165 void odm_stall_execution(u32 us_delay);
167 void ODM_delay_ms(u32 ms);
169 void ODM_delay_us(u32 us);
171 void ODM_sleep_ms(u32 ms);
173 void ODM_sleep_us(u32 us);
175 void odm_set_timer(struct phy_dm_struct *dm, struct timer_list *timer,
178 void odm_initialize_timer(struct phy_dm_struct *dm, struct timer_list *timer,
179 void *call_back_func, void *context,
182 void odm_cancel_timer(struct phy_dm_struct *dm, struct timer_list *timer);
184 void odm_release_timer(struct phy_dm_struct *dm, struct timer_list *timer);
187 * ODM FW relative API.
189 void odm_fill_h2c_cmd(struct phy_dm_struct *dm, u8 element_id, u32 cmd_len,
192 u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len,
195 u64 odm_get_current_time(struct phy_dm_struct *dm);
196 u64 odm_get_progressing_time(struct phy_dm_struct *dm, u64 start_time);
198 void odm_set_tx_power_index_by_rate_section(struct phy_dm_struct *dm,
199 u8 rf_path, u8 channel,
202 u8 odm_get_tx_power_index(struct phy_dm_struct *dm, u8 rf_path, u8 tx_rate,
203 u8 band_width, u8 channel);
205 #endif /* __ODM_INTERFACE_H__ */