1 /******************************************************************************
3 * Copyright(c) 2007 - 2016 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
26 /* ************************************************************
28 * *************************************************************/
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
34 * ODM IO Relative API.
37 u8 odm_read_1byte(struct phy_dm_struct *dm, u32 reg_addr)
39 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
41 return rtl_read_byte(rtlpriv, reg_addr);
44 u16 odm_read_2byte(struct phy_dm_struct *dm, u32 reg_addr)
46 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
48 return rtl_read_word(rtlpriv, reg_addr);
51 u32 odm_read_4byte(struct phy_dm_struct *dm, u32 reg_addr)
53 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
55 return rtl_read_dword(rtlpriv, reg_addr);
58 void odm_write_1byte(struct phy_dm_struct *dm, u32 reg_addr, u8 data)
60 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
62 rtl_write_byte(rtlpriv, reg_addr, data);
65 void odm_write_2byte(struct phy_dm_struct *dm, u32 reg_addr, u16 data)
67 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
69 rtl_write_word(rtlpriv, reg_addr, data);
72 void odm_write_4byte(struct phy_dm_struct *dm, u32 reg_addr, u32 data)
74 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
76 rtl_write_dword(rtlpriv, reg_addr, data);
79 void odm_set_mac_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask,
82 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
84 rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
87 u32 odm_get_mac_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask)
89 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
91 return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
94 void odm_set_bb_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask,
97 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
99 rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
102 u32 odm_get_bb_reg(struct phy_dm_struct *dm, u32 reg_addr, u32 bit_mask)
104 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
106 return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
109 void odm_set_rf_reg(struct phy_dm_struct *dm, enum odm_rf_radio_path e_rf_path,
110 u32 reg_addr, u32 bit_mask, u32 data)
112 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
114 rtl_set_rfreg(rtlpriv->hw, (enum radio_path)e_rf_path, reg_addr,
118 u32 odm_get_rf_reg(struct phy_dm_struct *dm, enum odm_rf_radio_path e_rf_path,
119 u32 reg_addr, u32 bit_mask)
121 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
123 return rtl_get_rfreg(rtlpriv->hw, (enum radio_path)e_rf_path, reg_addr,
128 * ODM Memory relative API.
130 void odm_allocate_memory(struct phy_dm_struct *dm, void **ptr, u32 length)
132 *ptr = kmalloc(length, GFP_ATOMIC);
135 /* length could be ignored, used to detect memory leakage. */
136 void odm_free_memory(struct phy_dm_struct *dm, void *ptr, u32 length)
141 void odm_move_memory(struct phy_dm_struct *dm, void *p_dest, void *src,
144 memcpy(p_dest, src, length);
147 void odm_memory_set(struct phy_dm_struct *dm, void *pbuf, s8 value, u32 length)
149 memset(pbuf, value, length);
152 s32 odm_compare_memory(struct phy_dm_struct *dm, void *p_buf1, void *buf2,
155 return memcmp(p_buf1, buf2, length);
159 * ODM MISC relative API.
161 void odm_acquire_spin_lock(struct phy_dm_struct *dm, enum rt_spinlock_type type)
165 void odm_release_spin_lock(struct phy_dm_struct *dm, enum rt_spinlock_type type)
170 * ODM Timer relative API.
172 void odm_stall_execution(u32 us_delay) { udelay(us_delay); }
174 void ODM_delay_ms(u32 ms) { mdelay(ms); }
176 void ODM_delay_us(u32 us) { udelay(us); }
178 void ODM_sleep_ms(u32 ms) { msleep(ms); }
180 void ODM_sleep_us(u32 us) { usleep_range(us, us + 1); }
182 void odm_set_timer(struct phy_dm_struct *dm, struct timer_list *timer,
185 mod_timer(timer, jiffies + msecs_to_jiffies(ms_delay));
188 void odm_initialize_timer(struct phy_dm_struct *dm, struct timer_list *timer,
189 void *call_back_func, void *context,
193 timer->function = call_back_func;
194 timer->data = (unsigned long)dm;
195 /*mod_timer(timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10)); */
198 void odm_cancel_timer(struct phy_dm_struct *dm, struct timer_list *timer)
203 void odm_release_timer(struct phy_dm_struct *dm, struct timer_list *timer) {}
205 static u8 phydm_trans_h2c_id(struct phy_dm_struct *dm, u8 phydm_h2c_id)
207 u8 platform_h2c_id = phydm_h2c_id;
209 switch (phydm_h2c_id) {
211 case ODM_H2C_RSSI_REPORT:
216 case ODM_H2C_WIFI_CALIBRATION:
221 case ODM_H2C_IQ_CALIBRATION:
225 case ODM_H2C_RA_PARA_ADJUST:
230 case PHYDM_H2C_DYNAMIC_TX_PATH:
235 case PHYDM_H2C_FW_TRACE_EN:
237 platform_h2c_id = 0x49;
245 platform_h2c_id = 0x4a; /*H2C_MU*/
249 platform_h2c_id = phydm_h2c_id;
253 return platform_h2c_id;
256 /*ODM FW relative API.*/
258 void odm_fill_h2c_cmd(struct phy_dm_struct *dm, u8 phydm_h2c_id, u32 cmd_len,
261 struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
264 platform_h2c_id = phydm_trans_h2c_id(dm, phydm_h2c_id);
266 ODM_RT_TRACE(dm, PHYDM_COMP_RA_DBG,
267 "[H2C] platform_h2c_id = ((0x%x))\n", platform_h2c_id);
269 rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, platform_h2c_id, cmd_len,
273 u8 phydm_c2H_content_parsing(void *dm_void, u8 c2h_cmd_id, u8 c2h_cmd_len,
276 struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
277 u8 extend_c2h_sub_id = 0;
278 u8 find_c2h_cmd = true;
280 switch (c2h_cmd_id) {
282 phydm_fw_trace_handler(dm, tmp_buf, c2h_cmd_len);
285 case PHYDM_C2H_RA_RPT:
286 phydm_c2h_ra_report_handler(dm, tmp_buf, c2h_cmd_len);
289 case PHYDM_C2H_RA_PARA_RPT:
290 odm_c2h_ra_para_report_handler(dm, tmp_buf, c2h_cmd_len);
293 case PHYDM_C2H_DYNAMIC_TX_PATH_RPT:
296 case PHYDM_C2H_IQK_FINISH:
299 case PHYDM_C2H_DBG_CODE:
300 phydm_fw_trace_handler_code(dm, tmp_buf, c2h_cmd_len);
303 case PHYDM_C2H_EXTEND:
304 extend_c2h_sub_id = tmp_buf[0];
305 if (extend_c2h_sub_id == PHYDM_EXTEND_C2H_DBG_PRINT)
306 phydm_fw_trace_handler_8051(dm, tmp_buf, c2h_cmd_len);
311 find_c2h_cmd = false;
318 u64 odm_get_current_time(struct phy_dm_struct *dm) { return jiffies; }
320 u64 odm_get_progressing_time(struct phy_dm_struct *dm, u64 start_time)
322 return jiffies_to_msecs(jiffies - (u32)start_time);
325 void odm_set_tx_power_index_by_rate_section(struct phy_dm_struct *dm,
326 u8 rf_path, u8 channel,
329 void *adapter = dm->adapter;
331 phy_set_tx_power_index_by_rs(adapter, channel, rf_path, rate_section);
334 u8 odm_get_tx_power_index(struct phy_dm_struct *dm, u8 rf_path, u8 tx_rate,
335 u8 band_width, u8 channel)
337 void *adapter = dm->adapter;
339 return phy_get_tx_power_index(adapter, (enum odm_rf_radio_path)rf_path,
340 tx_rate, band_width, channel);