1 /******************************************************************************
3 * Copyright(c) 2007 - 2016 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
26 /* ************************************************************
28 * *************************************************************/
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
33 #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
34 #define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
36 #define READ_AND_CONFIG READ_AND_CONFIG_MP
38 #define READ_FIRMWARE_MP(ic, txt) \
39 (odm_read_firmware_mp_##ic##txt(dm, p_firmware, size))
40 #define READ_FIRMWARE_TC(ic, txt) \
41 (odm_read_firmware_tc_##ic##txt(dm, p_firmware, size))
43 #define READ_FIRMWARE READ_FIRMWARE_MP
45 #define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
46 #define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
48 #define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
50 static u32 phydm_process_rssi_pwdb(struct phy_dm_struct *dm,
51 struct rtl_sta_info *entry,
52 struct dm_per_pkt_info *pktinfo,
53 u32 undecorated_smoothed_ofdm,
54 u32 undecorated_smoothed_cck)
56 u32 weighting = 0, undecorated_smoothed_pwdb;
57 /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
59 if (entry->rssi_stat.ofdm_pkt ==
60 64) { /* speed up when all packets are OFDM*/
61 undecorated_smoothed_pwdb = undecorated_smoothed_ofdm;
62 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR,
63 "PWDB_0[%d] = (( %d ))\n", pktinfo->station_id,
64 undecorated_smoothed_cck);
66 if (entry->rssi_stat.valid_bit < 64)
67 entry->rssi_stat.valid_bit++;
69 if (entry->rssi_stat.valid_bit == 64) {
70 weighting = ((entry->rssi_stat.ofdm_pkt) > 4) ?
72 (entry->rssi_stat.ofdm_pkt << 4);
73 undecorated_smoothed_pwdb =
74 (weighting * undecorated_smoothed_ofdm +
75 (64 - weighting) * undecorated_smoothed_cck) >>
77 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR,
78 "PWDB_1[%d] = (( %d )), W = (( %d ))\n",
80 undecorated_smoothed_cck, weighting);
82 if (entry->rssi_stat.valid_bit != 0)
83 undecorated_smoothed_pwdb =
84 (entry->rssi_stat.ofdm_pkt *
85 undecorated_smoothed_ofdm +
86 (entry->rssi_stat.valid_bit -
87 entry->rssi_stat.ofdm_pkt) *
88 undecorated_smoothed_cck) /
89 entry->rssi_stat.valid_bit;
91 undecorated_smoothed_pwdb = 0;
94 dm, ODM_COMP_RSSI_MONITOR,
95 "PWDB_2[%d] = (( %d )), ofdm_pkt = (( %d )), Valid_Bit = (( %d ))\n",
96 pktinfo->station_id, undecorated_smoothed_cck,
97 entry->rssi_stat.ofdm_pkt,
98 entry->rssi_stat.valid_bit);
102 return undecorated_smoothed_pwdb;
105 static u32 phydm_process_rssi_cck(struct phy_dm_struct *dm,
106 struct dm_phy_status_info *phy_info,
107 struct rtl_sta_info *entry,
108 u32 undecorated_smoothed_cck)
113 rssi_ave = phy_info->rx_pwdb_all;
114 dm->rssi_a = (u8)phy_info->rx_pwdb_all;
119 if (entry->rssi_stat.cck_pkt <= 63)
120 entry->rssi_stat.cck_pkt++;
122 /* 1 Process CCK RSSI */
123 if (undecorated_smoothed_cck <= 0) { /* initialize */
124 undecorated_smoothed_cck = phy_info->rx_pwdb_all;
125 entry->rssi_stat.cck_sum_power =
126 (u16)phy_info->rx_pwdb_all; /*reset*/
127 entry->rssi_stat.cck_pkt = 1; /*reset*/
128 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR, "CCK_INIT: (( %d ))\n",
129 undecorated_smoothed_cck);
130 } else if (entry->rssi_stat.cck_pkt <= CCK_RSSI_INIT_COUNT) {
131 entry->rssi_stat.cck_sum_power =
132 entry->rssi_stat.cck_sum_power +
133 (u16)phy_info->rx_pwdb_all;
134 undecorated_smoothed_cck = entry->rssi_stat.cck_sum_power /
135 entry->rssi_stat.cck_pkt;
138 dm, ODM_COMP_RSSI_MONITOR,
139 "CCK_0: (( %d )), SumPow = (( %d )), cck_pkt = (( %d ))\n",
140 undecorated_smoothed_cck,
141 entry->rssi_stat.cck_sum_power,
142 entry->rssi_stat.cck_pkt);
144 if (phy_info->rx_pwdb_all > (u32)undecorated_smoothed_cck) {
145 undecorated_smoothed_cck =
146 (((undecorated_smoothed_cck) *
147 (RX_SMOOTH_FACTOR - 1)) +
148 (phy_info->rx_pwdb_all)) /
150 undecorated_smoothed_cck = undecorated_smoothed_cck + 1;
151 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR,
153 undecorated_smoothed_cck);
155 undecorated_smoothed_cck =
156 (((undecorated_smoothed_cck) *
157 (RX_SMOOTH_FACTOR - 1)) +
158 (phy_info->rx_pwdb_all)) /
160 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR,
162 undecorated_smoothed_cck);
167 entry->rssi_stat.ofdm_pkt -=
168 (u8)((entry->rssi_stat.packet_map >> i) & BIT(0));
169 entry->rssi_stat.packet_map = entry->rssi_stat.packet_map << 1;
170 return undecorated_smoothed_cck;
173 static u32 phydm_process_rssi_ofdm(struct phy_dm_struct *dm,
174 struct dm_phy_status_info *phy_info,
175 struct rtl_sta_info *entry,
176 u32 undecorated_smoothed_ofdm)
179 u8 rssi_max, rssi_min, i;
181 if (dm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)) {
185 if (dm->rx_ant_status & ODM_RF_A) {
186 dm->rssi_a = phy_info->rx_mimo_signal_strength
189 rssi_linear += odm_convert_to_linear(
190 phy_info->rx_mimo_signal_strength
196 if (dm->rx_ant_status & ODM_RF_B) {
197 dm->rssi_b = phy_info->rx_mimo_signal_strength
200 rssi_linear += odm_convert_to_linear(
201 phy_info->rx_mimo_signal_strength
207 if (dm->rx_ant_status & ODM_RF_C) {
208 dm->rssi_c = phy_info->rx_mimo_signal_strength
211 rssi_linear += odm_convert_to_linear(
212 phy_info->rx_mimo_signal_strength
218 if (dm->rx_ant_status & ODM_RF_D) {
219 dm->rssi_d = phy_info->rx_mimo_signal_strength
222 rssi_linear += odm_convert_to_linear(
223 phy_info->rx_mimo_signal_strength
229 /* Calculate average RSSI */
232 rssi_linear = (rssi_linear >> 1);
235 /* rssi_linear/3 ~ rssi_linear*11/32 */
236 rssi_linear = ((rssi_linear) + (rssi_linear << 1) +
237 (rssi_linear << 3)) >>
241 rssi_linear = (rssi_linear >> 2);
245 rssi_ave = odm_convert_to_db(rssi_linear);
247 if (phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B] == 0) {
248 rssi_ave = phy_info->rx_mimo_signal_strength
250 dm->rssi_a = phy_info->rx_mimo_signal_strength
254 dm->rssi_a = phy_info->rx_mimo_signal_strength
256 dm->rssi_b = phy_info->rx_mimo_signal_strength
259 if (phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A] >
260 phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B]) {
261 rssi_max = phy_info->rx_mimo_signal_strength
263 rssi_min = phy_info->rx_mimo_signal_strength
266 rssi_max = phy_info->rx_mimo_signal_strength
268 rssi_min = phy_info->rx_mimo_signal_strength
271 if ((rssi_max - rssi_min) < 3)
273 else if ((rssi_max - rssi_min) < 6)
274 rssi_ave = rssi_max - 1;
275 else if ((rssi_max - rssi_min) < 10)
276 rssi_ave = rssi_max - 2;
278 rssi_ave = rssi_max - 3;
282 /* 1 Process OFDM RSSI */
283 if (undecorated_smoothed_ofdm <= 0) { /* initialize */
284 undecorated_smoothed_ofdm = phy_info->rx_pwdb_all;
285 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR, "OFDM_INIT: (( %d ))\n",
286 undecorated_smoothed_ofdm);
288 if (phy_info->rx_pwdb_all > (u32)undecorated_smoothed_ofdm) {
289 undecorated_smoothed_ofdm =
290 (((undecorated_smoothed_ofdm) *
291 (RX_SMOOTH_FACTOR - 1)) +
294 undecorated_smoothed_ofdm =
295 undecorated_smoothed_ofdm + 1;
296 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR,
297 "OFDM_1: (( %d ))\n",
298 undecorated_smoothed_ofdm);
300 undecorated_smoothed_ofdm =
301 (((undecorated_smoothed_ofdm) *
302 (RX_SMOOTH_FACTOR - 1)) +
305 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR,
306 "OFDM_2: (( %d ))\n",
307 undecorated_smoothed_ofdm);
311 if (entry->rssi_stat.ofdm_pkt != 64) {
313 entry->rssi_stat.ofdm_pkt -=
314 (u8)(((entry->rssi_stat.packet_map >> i) & BIT(0)) - 1);
317 entry->rssi_stat.packet_map =
318 (entry->rssi_stat.packet_map << 1) | BIT(0);
319 return undecorated_smoothed_ofdm;
322 static u8 odm_evm_db_to_percentage(s8);
323 static u8 odm_evm_dbm_jaguar_series(s8);
325 static inline u32 phydm_get_rssi_average(struct phy_dm_struct *dm,
326 struct dm_phy_status_info *phy_info)
328 u8 rssi_max = 0, rssi_min = 0;
330 dm->rssi_a = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A];
331 dm->rssi_b = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B];
333 if (phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A] >
334 phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B]) {
335 rssi_max = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A];
336 rssi_min = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B];
338 rssi_max = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B];
339 rssi_min = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A];
341 if ((rssi_max - rssi_min) < 3)
343 else if ((rssi_max - rssi_min) < 6)
345 else if ((rssi_max - rssi_min) < 10)
351 static inline u8 phydm_get_evm_dbm(u8 i, u8 EVM,
352 struct phy_status_rpt_8812 *phy_sta_rpt,
353 struct dm_phy_status_info *phy_info)
355 if (i < ODM_RF_PATH_C)
356 return odm_evm_dbm_jaguar_series(phy_sta_rpt->rxevm[i]);
358 return odm_evm_dbm_jaguar_series(phy_sta_rpt->rxevm_cd[i - 2]);
359 /*RT_DISP(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",*/
360 /*pktinfo->data_rate, phy_sta_rpt->rxevm[i], "%", EVM));*/
363 static inline u8 phydm_get_odm_evm(u8 i, struct dm_per_pkt_info *pktinfo,
364 struct phy_status_rpt_8812 *phy_sta_rpt)
368 if (pktinfo->data_rate >= ODM_RATE6M &&
369 pktinfo->data_rate <= ODM_RATE54M) {
370 if (i == ODM_RF_PATH_A) {
371 evm = odm_evm_db_to_percentage(
372 (phy_sta_rpt->sigevm)); /*dbm*/
378 if (i < ODM_RF_PATH_C) {
379 if (phy_sta_rpt->rxevm[i] == -128)
380 phy_sta_rpt->rxevm[i] = -25;
381 evm = odm_evm_db_to_percentage(
382 (phy_sta_rpt->rxevm[i])); /*dbm*/
384 if (phy_sta_rpt->rxevm_cd[i - 2] == -128)
385 phy_sta_rpt->rxevm_cd[i - 2] = -25;
386 evm = odm_evm_db_to_percentage(
387 (phy_sta_rpt->rxevm_cd[i - 2])); /*dbm*/
394 static inline s8 phydm_get_rx_pwr(u8 LNA_idx, u8 VGA_idx, u8 cck_highpwr)
399 return -100 + 2 * (27 - VGA_idx); /*VGA_idx = 27~2*/
404 return -48 + 2 * (2 - VGA_idx); /*VGA_idx = 2~0*/
406 return -42 + 2 * (7 - VGA_idx); /*VGA_idx = 7~5*/
408 return -36 + 2 * (7 - VGA_idx); /*VGA_idx = 7~4*/
410 return -24 + 2 * (7 - VGA_idx); /*VGA_idx = 7~0*/
413 return -12 + 2 * (5 - VGA_idx); /*VGA_idx = 5~0*/
415 return -6 + 2 * (5 - VGA_idx);
418 return 8 - 2 * VGA_idx;
420 return 14 - 2 * VGA_idx;
427 static inline u8 phydm_adjust_pwdb(u8 cck_highpwr, u8 pwdb_all)
431 return ((pwdb_all - 80) << 1) + ((pwdb_all - 80) >> 1) +
433 else if ((pwdb_all <= 78) && (pwdb_all >= 20))
442 phydm_get_signal_quality_8812(struct dm_phy_status_info *phy_info,
443 struct phy_dm_struct *dm,
444 struct phy_status_rpt_8812 *phy_sta_rpt)
448 if (phy_info->rx_pwdb_all > 40 && !dm->is_in_hct_test)
451 sq_rpt = phy_sta_rpt->pwdb_all;
455 else if (sq_rpt < 20)
458 return ((64 - sq_rpt) * 100) / 44;
462 phydm_get_signal_quality_8192(struct dm_phy_status_info *phy_info,
463 struct phy_dm_struct *dm,
464 struct phy_status_rpt_8192cd *phy_sta_rpt)
468 if (phy_info->rx_pwdb_all > 40 && !dm->is_in_hct_test)
471 sq_rpt = phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all;
475 else if (sq_rpt < 20)
478 return ((64 - sq_rpt) * 100) / 44;
481 static u8 odm_query_rx_pwr_percentage(s8 ant_power)
483 if ((ant_power <= -100) || (ant_power >= 20))
485 else if (ant_power >= 0)
488 return 100 + ant_power;
492 * 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.
493 * IF other SW team do not support the feature, remove this section.??
496 s32 odm_signal_scale_mapping(struct phy_dm_struct *dm, s32 curr_sig)
503 static u8 odm_sq_process_patch_rt_cid_819x_lenovo(struct phy_dm_struct *dm,
504 u8 is_cck_rate, u8 pwdb_all,
511 static u8 odm_evm_db_to_percentage(s8 value)
513 /* -33dB~0dB to 0%~99% */
525 ret_val = 0 - ret_val;
534 static u8 odm_evm_dbm_jaguar_series(s8 value)
538 /* -33dB~0dB to 33dB ~ 0dB */
541 else if (ret_val < 0)
542 ret_val = 0 - ret_val;
544 ret_val = ret_val >> 1;
548 static s16 odm_cfo(s8 value)
554 ret_val = (ret_val << 1) + (ret_val >> 1); /* *2.5~=312.5/2^7 */
556 ret_val | BIT(12); /* set bit12 as 1 for negative cfo */
559 ret_val = (ret_val << 1) + (ret_val >> 1); /* *2.5~=312.5/2^7 */
564 static u8 phydm_rate_to_num_ss(struct phy_dm_struct *dm, u8 data_rate)
568 if (data_rate <= ODM_RATE54M)
570 else if (data_rate <= ODM_RATEMCS31)
571 num_ss = ((data_rate - ODM_RATEMCS0) >> 3) + 1;
572 else if (data_rate <= ODM_RATEVHTSS1MCS9)
574 else if (data_rate <= ODM_RATEVHTSS2MCS9)
576 else if (data_rate <= ODM_RATEVHTSS3MCS9)
578 else if (data_rate <= ODM_RATEVHTSS4MCS9)
584 static void odm_rx_phy_status92c_series_parsing(
585 struct phy_dm_struct *dm, struct dm_phy_status_info *phy_info,
586 u8 *phy_status, struct dm_per_pkt_info *pktinfo)
588 u8 i, max_spatial_stream;
589 s8 rx_pwr[4], rx_pwr_all = 0;
590 u8 EVM, pwdb_all = 0, pwdb_all_bt;
591 u8 RSSI, total_rssi = 0;
592 bool is_cck_rate = false;
598 struct phy_status_rpt_8192cd *phy_sta_rpt =
599 (struct phy_status_rpt_8192cd *)phy_status;
601 is_cck_rate = (pktinfo->data_rate <= ODM_RATE11M) ? true : false;
603 if (pktinfo->is_to_self)
604 dm->curr_station_id = pktinfo->station_id;
606 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = -1;
607 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
610 dm->phy_dbg_info.num_qry_phy_status_cck++;
611 cck_agc_rpt = phy_sta_rpt->cck_agc_rpt_ofdm_cfosho_a;
613 if (dm->support_ic_type & (ODM_RTL8703B)) {
614 } else { /*3 bit LNA*/
616 LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
617 VGA_idx = (cck_agc_rpt & 0x1F);
621 dm, ODM_COMP_RSSI_MONITOR,
622 "ext_lna_gain (( %d )), LNA_idx: (( 0x%x )), VGA_idx: (( 0x%x )), rx_pwr_all: (( %d ))\n",
623 dm->ext_lna_gain, LNA_idx, VGA_idx, rx_pwr_all);
625 if (dm->board_type & ODM_BOARD_EXT_LNA)
626 rx_pwr_all -= dm->ext_lna_gain;
628 pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
630 if (pktinfo->is_to_self) {
631 dm->cck_lna_idx = LNA_idx;
632 dm->cck_vga_idx = VGA_idx;
634 phy_info->rx_pwdb_all = pwdb_all;
636 phy_info->bt_rx_rssi_percentage = pwdb_all;
637 phy_info->recv_signal_power = rx_pwr_all;
638 /* (3) Get Signal Quality (EVM) */
642 sq = phydm_get_signal_quality_8192(phy_info, dm,
644 phy_info->signal_quality = sq;
645 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = sq;
646 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
649 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
651 phy_info->rx_mimo_signal_strength[0] = pwdb_all;
653 phy_info->rx_mimo_signal_strength[1] = 0;
655 } else { /* 2 is OFDM rate */
656 dm->phy_dbg_info.num_qry_phy_status_ofdm++;
659 /* (1)Get RSSI for HT rate */
662 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
663 /* 2008/01/30 MH we will judge RF RX path now. */
664 if (dm->rf_path_rx_enable & BIT(i))
670 ((phy_sta_rpt->path_agc[i].gain & 0x3F) * 2) -
673 if (pktinfo->is_to_self) {
674 dm->ofdm_agc_idx[i] =
675 (phy_sta_rpt->path_agc[i].gain & 0x3F);
679 phy_info->rx_pwr[i] = rx_pwr[i];
681 /* Translate DBM to percentage. */
682 RSSI = odm_query_rx_pwr_percentage(rx_pwr[i]);
685 phy_info->rx_mimo_signal_strength[i] = (u8)RSSI;
687 /* Get Rx snr value in DB */
688 dm->phy_dbg_info.rx_snr_db[i] =
689 (s32)(phy_sta_rpt->path_rxsnr[i] / 2);
690 phy_info->rx_snr[i] = dm->phy_dbg_info.rx_snr_db[i];
692 /* Record Signal Strength for next packet */
693 /* if(pktinfo->is_packet_match_bssid) */
699 /* (2)PWDB, Average PWDB calcuated by hardware (for RA) */
701 rx_pwr_all = (((phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all) >> 1) &
705 pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
706 pwdb_all_bt = pwdb_all;
708 phy_info->rx_pwdb_all = pwdb_all;
709 phy_info->bt_rx_rssi_percentage = pwdb_all_bt;
710 phy_info->rx_power = rx_pwr_all;
711 phy_info->recv_signal_power = rx_pwr_all;
713 if ((dm->support_platform == ODM_WIN) && (dm->patch_id == 19)) {
715 } else if ((dm->support_platform == ODM_WIN) &&
716 (dm->patch_id == 25)) {
718 } else { /* mgnt_info->customer_id != RT_CID_819X_LENOVO */
720 /* (3)EVM of HT rate */
722 if (pktinfo->data_rate >= ODM_RATEMCS8 &&
723 pktinfo->data_rate <= ODM_RATEMCS15) {
724 /* both spatial stream make sense */
725 max_spatial_stream = 2;
727 /* only spatial stream 1 makes sense */
728 max_spatial_stream = 1;
731 for (i = 0; i < max_spatial_stream; i++) {
732 /*Don't use shift operation like "rx_evmX >>= 1"
733 *because the compilor of free build environment
734 *fill most significant bit to "zero" when doing
735 *shifting operation which may change a negative
736 *value to positive one, then the dbm value
737 *(which is supposed to be negative) is not
740 EVM = odm_evm_db_to_percentage(
742 ->stream_rxevm[i])); /* dbm */
744 /* Fill value in RFD, Get the first spatial
747 if (i == ODM_RF_PATH_A)
748 phy_info->signal_quality =
750 phy_info->rx_mimo_signal_quality[i] =
755 num_ss = phydm_rate_to_num_ss(dm, pktinfo->data_rate);
756 odm_parsing_cfo(dm, pktinfo, phy_sta_rpt->path_cfotail, num_ss);
758 /* UI BSS List signal strength(in percentage), make it good looking,
761 /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
763 phy_info->signal_strength = (u8)(
764 odm_signal_scale_mapping(dm, pwdb_all)); /*pwdb_all;*/
766 if (rf_rx_num != 0) {
767 phy_info->signal_strength =
768 (u8)(odm_signal_scale_mapping(dm, total_rssi /=
773 /* For 92C/92D HW (Hybrid) Antenna Diversity */
777 odm_rx_phy_bw_jaguar_series_parsing(struct dm_phy_status_info *phy_info,
778 struct dm_per_pkt_info *pktinfo,
779 struct phy_status_rpt_8812 *phy_sta_rpt)
781 if (pktinfo->data_rate <= ODM_RATE54M) {
782 switch (phy_sta_rpt->r_RFMOD) {
784 if (phy_sta_rpt->sub_chnl == 0)
785 phy_info->band_width = 1;
787 phy_info->band_width = 0;
791 if (phy_sta_rpt->sub_chnl == 0)
792 phy_info->band_width = 2;
793 else if (phy_sta_rpt->sub_chnl == 9 ||
794 phy_sta_rpt->sub_chnl == 10)
795 phy_info->band_width = 1;
797 phy_info->band_width = 0;
802 phy_info->band_width = 0;
808 static void odm_rx_phy_status_jaguar_series_parsing(
809 struct phy_dm_struct *dm, struct dm_phy_status_info *phy_info,
810 u8 *phy_status, struct dm_per_pkt_info *pktinfo)
812 u8 i, max_spatial_stream;
813 s8 rx_pwr[4], rx_pwr_all = 0;
814 u8 EVM = 0, evm_dbm, pwdb_all = 0, pwdb_all_bt;
815 u8 RSSI, avg_rssi = 0, best_rssi = 0, second_rssi = 0;
820 struct phy_status_rpt_8812 *phy_sta_rpt =
821 (struct phy_status_rpt_8812 *)phy_status;
822 struct fast_antenna_training *fat_tab = &dm->dm_fat_table;
825 odm_rx_phy_bw_jaguar_series_parsing(phy_info, pktinfo, phy_sta_rpt);
827 if (pktinfo->data_rate <= ODM_RATE11M)
832 if (pktinfo->is_to_self)
833 dm->curr_station_id = pktinfo->station_id;
835 dm->curr_station_id = 0xff;
837 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = -1;
838 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
839 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_C] = -1;
840 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_D] = -1;
845 dm->phy_dbg_info.num_qry_phy_status_cck++;
847 /*(1)Hardware does not provide RSSI for CCK*/
848 /*(2)PWDB, Average PWDB calculated by hardware (for RA)*/
850 cck_highpwr = dm->is_cck_high_power;
852 cck_agc_rpt = phy_sta_rpt->cfosho[0];
853 LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
854 VGA_idx = (cck_agc_rpt & 0x1F);
856 if (dm->support_ic_type == ODM_RTL8812) {
858 phydm_get_rx_pwr(LNA_idx, VGA_idx, cck_highpwr);
860 pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
861 pwdb_all = phydm_adjust_pwdb(cck_highpwr, pwdb_all);
863 } else if (dm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) {
868 rx_pwr_all = pout - 32 - (2 * VGA_idx);
871 rx_pwr_all = pout - 24 - (2 * VGA_idx);
874 rx_pwr_all = pout - 11 - (2 * VGA_idx);
877 rx_pwr_all = pout + 5 - (2 * VGA_idx);
880 rx_pwr_all = pout + 21 - (2 * VGA_idx);
883 pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
884 } else if (dm->support_ic_type == ODM_RTL8814A ||
885 dm->support_ic_type == ODM_RTL8822B) {
889 /*CCK only use LNA: 2, 3, 5, 7*/
891 rx_pwr_all = pout - 32 - (2 * VGA_idx);
894 rx_pwr_all = pout - 22 - (2 * VGA_idx);
897 rx_pwr_all = pout - 2 - (2 * VGA_idx);
900 rx_pwr_all = pout + 5 - (2 * VGA_idx);
905 pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
908 dm->cck_lna_idx = LNA_idx;
909 dm->cck_vga_idx = VGA_idx;
910 phy_info->rx_pwdb_all = pwdb_all;
911 phy_info->bt_rx_rssi_percentage = pwdb_all;
912 phy_info->recv_signal_power = rx_pwr_all;
913 /*(3) Get Signal Quality (EVM)*/
917 if ((dm->support_platform == ODM_WIN) &&
918 (dm->patch_id == RT_CID_819X_LENOVO))
919 sq = odm_sq_process_patch_rt_cid_819x_lenovo(
920 dm, is_cck_rate, pwdb_all, 0, 0);
922 sq = phydm_get_signal_quality_8812(phy_info, dm,
925 phy_info->signal_quality = sq;
926 phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = sq;
929 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
931 phy_info->rx_mimo_signal_strength[0] = pwdb_all;
933 phy_info->rx_mimo_signal_strength[i] = 0;
937 fat_tab->hw_antsw_occur = phy_sta_rpt->hw_antsw_occur;
939 dm->phy_dbg_info.num_qry_phy_status_ofdm++;
941 /*(1)Get RSSI for OFDM rate*/
943 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
944 /*2008/01/30 MH we will judge RF RX path now.*/
945 if (dm->rf_path_rx_enable & BIT(i))
947 /*2012.05.25 LukeLee: Testchip AGC report is wrong,
948 *it should be restored back to old formula in MP chip
950 if (i < ODM_RF_PATH_C)
951 rx_pwr[i] = (phy_sta_rpt->gain_trsw[i] & 0x7F) -
954 rx_pwr[i] = (phy_sta_rpt->gain_trsw_cd[i - 2] &
958 phy_info->rx_pwr[i] = rx_pwr[i];
960 /* Translate DBM to percentage. */
961 RSSI = odm_query_rx_pwr_percentage(rx_pwr[i]);
963 /*total_rssi += RSSI;*/
964 /*Get the best two RSSI*/
965 if (RSSI > best_rssi && RSSI > second_rssi) {
966 second_rssi = best_rssi;
968 } else if (RSSI > second_rssi && RSSI <= best_rssi) {
972 phy_info->rx_mimo_signal_strength[i] = (u8)RSSI;
974 /*Get Rx snr value in DB*/
975 if (i < ODM_RF_PATH_C)
976 phy_info->rx_snr[i] =
977 dm->phy_dbg_info.rx_snr_db[i] =
978 phy_sta_rpt->rxsnr[i] / 2;
979 else if (dm->support_ic_type &
980 (ODM_RTL8814A | ODM_RTL8822B))
981 phy_info->rx_snr[i] = dm->phy_dbg_info
983 phy_sta_rpt->csi_current[i - 2] / 2;
985 /*(2) CFO_short & CFO_tail*/
986 if (i < ODM_RF_PATH_C) {
987 phy_info->cfo_short[i] =
988 odm_cfo((phy_sta_rpt->cfosho[i]));
989 phy_info->cfo_tail[i] =
990 odm_cfo((phy_sta_rpt->cfotail[i]));
994 /*(3)PWDB, Average PWDB calculated by hardware (for RA)*/
996 /*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be
997 *restored back to old formula in MP chip
999 if ((dm->support_ic_type &
1000 (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)) &&
1002 rx_pwr_all = (phy_sta_rpt->pwdb_all & 0x7f) - 110;
1004 rx_pwr_all = (((phy_sta_rpt->pwdb_all) >> 1) & 0x7f) -
1005 110; /*OLD FORMULA*/
1007 pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
1008 pwdb_all_bt = pwdb_all;
1010 phy_info->rx_pwdb_all = pwdb_all;
1011 phy_info->bt_rx_rssi_percentage = pwdb_all_bt;
1012 phy_info->rx_power = rx_pwr_all;
1013 phy_info->recv_signal_power = rx_pwr_all;
1015 if ((dm->support_platform == ODM_WIN) && (dm->patch_id == 19)) {
1018 /*mgnt_info->customer_id != RT_CID_819X_LENOVO*/
1020 /*(4)EVM of OFDM rate*/
1022 if ((pktinfo->data_rate >= ODM_RATEMCS8) &&
1023 (pktinfo->data_rate <= ODM_RATEMCS15))
1024 max_spatial_stream = 2;
1025 else if ((pktinfo->data_rate >= ODM_RATEVHTSS2MCS0) &&
1026 (pktinfo->data_rate <= ODM_RATEVHTSS2MCS9))
1027 max_spatial_stream = 2;
1028 else if ((pktinfo->data_rate >= ODM_RATEMCS16) &&
1029 (pktinfo->data_rate <= ODM_RATEMCS23))
1030 max_spatial_stream = 3;
1031 else if ((pktinfo->data_rate >= ODM_RATEVHTSS3MCS0) &&
1032 (pktinfo->data_rate <= ODM_RATEVHTSS3MCS9))
1033 max_spatial_stream = 3;
1035 max_spatial_stream = 1;
1037 for (i = 0; i < max_spatial_stream; i++) {
1038 /*Don't use shift operation like "rx_evmX >>= 1"
1039 *because the compilor of free build environment
1040 *fill most significant bit to "zero" when doing
1041 *shifting operation which may change a negative
1042 *value to positive one, then the dbm value
1043 *(which is supposed to be negative) is not
1047 EVM = phydm_get_odm_evm(i, pktinfo,
1049 evm_dbm = phydm_get_evm_dbm(i, EVM, phy_sta_rpt,
1051 phy_info->rx_mimo_signal_quality[i] = EVM;
1052 phy_info->rx_mimo_evm_dbm[i] = evm_dbm;
1056 num_ss = phydm_rate_to_num_ss(dm, pktinfo->data_rate);
1057 odm_parsing_cfo(dm, pktinfo, phy_sta_rpt->cfotail, num_ss);
1060 /*UI BSS List signal strength(in percentage), make it good looking,
1063 /*It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().*/
1065 phy_info->signal_strength = (u8)(
1066 odm_signal_scale_mapping(dm, pwdb_all)); /*pwdb_all;*/
1068 if (rf_rx_num != 0) {
1069 /* 2015/01 Sean, use the best two RSSI only,
1070 * suggested by Ynlin and ChenYu.
1073 avg_rssi = best_rssi;
1075 avg_rssi = (best_rssi + second_rssi) / 2;
1076 phy_info->signal_strength =
1077 (u8)(odm_signal_scale_mapping(dm, avg_rssi));
1080 dm->rx_pwdb_ave = dm->rx_pwdb_ave + phy_info->rx_pwdb_all;
1082 dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->antidx_anta;
1083 dm->dm_fat_table.antsel_rx_keep_1 = phy_sta_rpt->antidx_antb;
1084 dm->dm_fat_table.antsel_rx_keep_2 = phy_sta_rpt->antidx_antc;
1085 dm->dm_fat_table.antsel_rx_keep_3 = phy_sta_rpt->antidx_antd;
1088 void phydm_reset_rssi_for_dm(struct phy_dm_struct *dm, u8 station_id)
1090 struct rtl_sta_info *entry;
1092 entry = dm->odm_sta_info[station_id];
1094 if (!IS_STA_VALID(entry))
1097 ODM_RT_TRACE(dm, ODM_COMP_RSSI_MONITOR,
1098 "Reset RSSI for macid = (( %d ))\n", station_id);
1100 entry->rssi_stat.undecorated_smoothed_cck = -1;
1101 entry->rssi_stat.undecorated_smoothed_ofdm = -1;
1102 entry->rssi_stat.undecorated_smoothed_pwdb = -1;
1103 entry->rssi_stat.ofdm_pkt = 0;
1104 entry->rssi_stat.cck_pkt = 0;
1105 entry->rssi_stat.cck_sum_power = 0;
1106 entry->rssi_stat.is_send_rssi = RA_RSSI_STATE_INIT;
1107 entry->rssi_stat.packet_map = 0;
1108 entry->rssi_stat.valid_bit = 0;
1111 void odm_init_rssi_for_dm(struct phy_dm_struct *dm) {}
1113 static void odm_process_rssi_for_dm(struct phy_dm_struct *dm,
1114 struct dm_phy_status_info *phy_info,
1115 struct dm_per_pkt_info *pktinfo)
1117 s32 undecorated_smoothed_pwdb, undecorated_smoothed_cck,
1118 undecorated_smoothed_ofdm;
1120 u8 send_rssi_2_fw = 0;
1121 struct rtl_sta_info *entry;
1123 if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM)
1126 /* 2012/05/30 MH/Luke.Lee Add some description */
1127 /* In windows driver: AP/IBSS mode STA */
1128 entry = dm->odm_sta_info[pktinfo->station_id];
1130 if (!IS_STA_VALID(entry))
1134 if ((!pktinfo->is_packet_match_bssid)) /*data frame only*/
1138 if (pktinfo->is_packet_beacon)
1139 dm->phy_dbg_info.num_qry_beacon_pkt++;
1141 is_cck_rate = (pktinfo->data_rate <= ODM_RATE11M) ? true : false;
1142 dm->rx_rate = pktinfo->data_rate;
1144 /* --------------Statistic for antenna/path diversity---------------- */
1146 /* -----------------Smart Antenna Debug Message------------------ */
1148 undecorated_smoothed_cck = entry->rssi_stat.undecorated_smoothed_cck;
1149 undecorated_smoothed_ofdm = entry->rssi_stat.undecorated_smoothed_ofdm;
1150 undecorated_smoothed_pwdb = entry->rssi_stat.undecorated_smoothed_pwdb;
1152 if (pktinfo->is_packet_to_self || pktinfo->is_packet_beacon) {
1153 if (!is_cck_rate) /* ofdm rate */
1154 undecorated_smoothed_ofdm = phydm_process_rssi_ofdm(
1155 dm, phy_info, entry, undecorated_smoothed_ofdm);
1157 undecorated_smoothed_cck = phydm_process_rssi_cck(
1158 dm, phy_info, entry, undecorated_smoothed_cck);
1160 undecorated_smoothed_pwdb = phydm_process_rssi_pwdb(
1161 dm, entry, pktinfo, undecorated_smoothed_ofdm,
1162 undecorated_smoothed_cck);
1164 if ((entry->rssi_stat.ofdm_pkt >= 1 ||
1165 entry->rssi_stat.cck_pkt >= 5) &&
1166 (entry->rssi_stat.is_send_rssi == RA_RSSI_STATE_INIT)) {
1168 entry->rssi_stat.is_send_rssi = RA_RSSI_STATE_SEND;
1171 entry->rssi_stat.undecorated_smoothed_cck =
1172 undecorated_smoothed_cck;
1173 entry->rssi_stat.undecorated_smoothed_ofdm =
1174 undecorated_smoothed_ofdm;
1175 entry->rssi_stat.undecorated_smoothed_pwdb =
1176 undecorated_smoothed_pwdb;
1178 if (send_rssi_2_fw) { /* Trigger init rate by RSSI */
1180 if (entry->rssi_stat.ofdm_pkt != 0)
1181 entry->rssi_stat.undecorated_smoothed_pwdb =
1182 undecorated_smoothed_ofdm;
1185 dm, ODM_COMP_RSSI_MONITOR,
1186 "[Send to FW] PWDB = (( %d )), ofdm_pkt = (( %d )), cck_pkt = (( %d ))\n",
1187 undecorated_smoothed_pwdb,
1188 entry->rssi_stat.ofdm_pkt,
1189 entry->rssi_stat.cck_pkt);
1195 * Endianness before calling this API
1197 static void odm_phy_status_query_92c_series(struct phy_dm_struct *dm,
1198 struct dm_phy_status_info *phy_info,
1200 struct dm_per_pkt_info *pktinfo)
1202 odm_rx_phy_status92c_series_parsing(dm, phy_info, phy_status, pktinfo);
1203 odm_process_rssi_for_dm(dm, phy_info, pktinfo);
1207 * Endianness before calling this API
1210 static void odm_phy_status_query_jaguar_series(
1211 struct phy_dm_struct *dm, struct dm_phy_status_info *phy_info,
1212 u8 *phy_status, struct dm_per_pkt_info *pktinfo)
1214 odm_rx_phy_status_jaguar_series_parsing(dm, phy_info, phy_status,
1216 odm_process_rssi_for_dm(dm, phy_info, pktinfo);
1219 void odm_phy_status_query(struct phy_dm_struct *dm,
1220 struct dm_phy_status_info *phy_info, u8 *phy_status,
1221 struct dm_per_pkt_info *pktinfo)
1223 if (dm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) {
1224 phydm_rx_phy_status_new_type(dm, phy_status, pktinfo, phy_info);
1228 if (dm->support_ic_type & ODM_IC_11AC_SERIES)
1229 odm_phy_status_query_jaguar_series(dm, phy_info, phy_status,
1232 if (dm->support_ic_type & ODM_IC_11N_SERIES)
1233 odm_phy_status_query_92c_series(dm, phy_info, phy_status,
1237 /* For future use. */
1238 void odm_mac_status_query(struct phy_dm_struct *dm, u8 *mac_status, u8 mac_id,
1239 bool is_packet_match_bssid, bool is_packet_to_self,
1240 bool is_packet_beacon)
1242 /* 2011/10/19 Driver team will handle in the future. */
1246 * If you want to add a new IC, Please follow below template and generate
1251 odm_config_rf_with_header_file(struct phy_dm_struct *dm,
1252 enum odm_rf_config_type config_type,
1253 enum odm_rf_radio_path e_rf_path)
1255 ODM_RT_TRACE(dm, ODM_COMP_INIT,
1256 "===>%s (%s)\n", __func__,
1257 (dm->is_mp_chip) ? "MPChip" : "TestChip");
1260 "dm->support_platform: 0x%X, dm->support_interface: 0x%X, dm->board_type: 0x%X\n",
1261 dm->support_platform, dm->support_interface, dm->board_type);
1263 /* 1 AP doesn't use PHYDM power tracking table in these ICs */
1264 /* JJ ADD 20161014 */
1266 /* 1 All platforms support */
1267 if (dm->support_ic_type == ODM_RTL8822B) {
1268 if (config_type == CONFIG_RF_RADIO) {
1269 if (e_rf_path == ODM_RF_PATH_A)
1270 READ_AND_CONFIG_MP(8822b, _radioa);
1271 else if (e_rf_path == ODM_RF_PATH_B)
1272 READ_AND_CONFIG_MP(8822b, _radiob);
1273 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
1274 if (dm->rfe_type == 5)
1275 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
1277 READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
1281 return HAL_STATUS_SUCCESS;
1285 odm_config_rf_with_tx_pwr_track_header_file(struct phy_dm_struct *dm)
1287 ODM_RT_TRACE(dm, ODM_COMP_INIT,
1288 "===>%s (%s)\n", __func__,
1289 (dm->is_mp_chip) ? "MPChip" : "TestChip");
1292 "dm->support_platform: 0x%X, dm->support_interface: 0x%X, dm->board_type: 0x%X\n",
1293 dm->support_platform, dm->support_interface, dm->board_type);
1295 /* 1 AP doesn't use PHYDM power tracking table in these ICs */
1296 /* JJ ADD 20161014 */
1298 /* 1 All platforms support */
1300 if (dm->support_ic_type == ODM_RTL8822B) {
1301 if (dm->rfe_type == 0)
1302 READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
1303 else if (dm->rfe_type == 1)
1304 READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
1305 else if (dm->rfe_type == 2)
1306 READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
1307 else if ((dm->rfe_type == 3) || (dm->rfe_type == 5))
1308 READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
1309 else if (dm->rfe_type == 4)
1310 READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
1311 else if (dm->rfe_type == 6)
1312 READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
1313 else if (dm->rfe_type == 7)
1314 READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
1315 else if (dm->rfe_type == 8)
1316 READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
1317 else if (dm->rfe_type == 9)
1318 READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
1320 READ_AND_CONFIG_MP(8822b, _txpowertrack);
1323 return HAL_STATUS_SUCCESS;
1327 odm_config_bb_with_header_file(struct phy_dm_struct *dm,
1328 enum odm_bb_config_type config_type)
1330 /* 1 AP doesn't use PHYDM initialization in these ICs */
1331 /* JJ ADD 20161014 */
1333 /* 1 All platforms support */
1334 if (dm->support_ic_type == ODM_RTL8822B) {
1335 if (config_type == CONFIG_BB_PHY_REG)
1336 READ_AND_CONFIG_MP(8822b, _phy_reg);
1337 else if (config_type == CONFIG_BB_AGC_TAB)
1338 READ_AND_CONFIG_MP(8822b, _agc_tab);
1339 else if (config_type == CONFIG_BB_PHY_REG_PG)
1340 READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
1341 /*else if (config_type == CONFIG_BB_PHY_REG_MP)*/
1342 /*READ_AND_CONFIG_MP(8822b, _phy_reg_mp);*/
1345 return HAL_STATUS_SUCCESS;
1348 enum hal_status odm_config_mac_with_header_file(struct phy_dm_struct *dm)
1350 ODM_RT_TRACE(dm, ODM_COMP_INIT,
1351 "===>%s (%s)\n", __func__,
1352 (dm->is_mp_chip) ? "MPChip" : "TestChip");
1355 "dm->support_platform: 0x%X, dm->support_interface: 0x%X, dm->board_type: 0x%X\n",
1356 dm->support_platform, dm->support_interface, dm->board_type);
1358 /* 1 AP doesn't use PHYDM initialization in these ICs */
1359 /* JJ ADD 20161014 */
1361 /* 1 All platforms support */
1362 if (dm->support_ic_type == ODM_RTL8822B)
1363 READ_AND_CONFIG_MP(8822b, _mac_reg);
1365 return HAL_STATUS_SUCCESS;
1369 odm_config_fw_with_header_file(struct phy_dm_struct *dm,
1370 enum odm_fw_config_type config_type,
1371 u8 *p_firmware, u32 *size)
1373 return HAL_STATUS_SUCCESS;
1376 u32 odm_get_hw_img_version(struct phy_dm_struct *dm)
1380 /* 1 AP doesn't use PHYDM initialization in these ICs */
1381 /* JJ ADD 20161014 */
1383 /*1 All platforms support*/
1384 if (dm->support_ic_type == ODM_RTL8822B)
1385 version = GET_VERSION_MP(8822b, _mac_reg);
1390 /* For 8822B only!! need to move to FW finally */
1391 /*==============================================*/
1393 bool phydm_query_is_mu_api(struct phy_dm_struct *phydm, u8 ppdu_idx,
1394 u8 *p_data_rate, u8 *p_gid)
1396 u8 data_rate = 0, gid = 0;
1399 data_rate = phydm->phy_dbg_info.num_of_ppdu[ppdu_idx];
1400 gid = phydm->phy_dbg_info.gid_num[ppdu_idx];
1402 if (data_rate & BIT(7)) {
1404 data_rate = data_rate & ~(BIT(7));
1409 *p_data_rate = data_rate;
1415 static void phydm_rx_statistic_cal(struct phy_dm_struct *phydm, u8 *phy_status,
1416 struct dm_per_pkt_info *pktinfo)
1418 struct phy_status_rpt_jaguar2_type1 *phy_sta_rpt =
1419 (struct phy_status_rpt_jaguar2_type1 *)phy_status;
1420 u8 date_rate = pktinfo->data_rate & ~(BIT(7));
1422 if ((phy_sta_rpt->gid != 0) && (phy_sta_rpt->gid != 63)) {
1423 if (date_rate >= ODM_RATEVHTSS1MCS0) {
1425 .num_qry_mu_vht_pkt[date_rate - 0x2C]++;
1426 phydm->phy_dbg_info.num_of_ppdu[pktinfo->ppdu_cnt] =
1428 phydm->phy_dbg_info.gid_num[pktinfo->ppdu_cnt] =
1433 if (date_rate >= ODM_RATEVHTSS1MCS0) {
1434 phydm->phy_dbg_info.num_qry_vht_pkt[date_rate - 0x2C]++;
1435 phydm->phy_dbg_info.num_of_ppdu[pktinfo->ppdu_cnt] =
1437 phydm->phy_dbg_info.gid_num[pktinfo->ppdu_cnt] =
1443 static void phydm_reset_phy_info(struct phy_dm_struct *phydm,
1444 struct dm_phy_status_info *phy_info)
1446 phy_info->rx_pwdb_all = 0;
1447 phy_info->signal_quality = 0;
1448 phy_info->band_width = 0;
1449 phy_info->rx_count = 0;
1450 odm_memory_set(phydm, phy_info->rx_mimo_signal_quality, 0, 4);
1451 odm_memory_set(phydm, phy_info->rx_mimo_signal_strength, 0, 4);
1452 odm_memory_set(phydm, phy_info->rx_snr, 0, 4);
1454 phy_info->rx_power = -110;
1455 phy_info->recv_signal_power = -110;
1456 phy_info->bt_rx_rssi_percentage = 0;
1457 phy_info->signal_strength = 0;
1458 phy_info->bt_coex_pwr_adjust = 0;
1459 phy_info->channel = 0;
1460 phy_info->is_mu_packet = 0;
1461 phy_info->is_beamformed = 0;
1463 odm_memory_set(phydm, phy_info->rx_pwr, -110, 4);
1464 odm_memory_set(phydm, phy_info->rx_mimo_evm_dbm, 0, 4);
1465 odm_memory_set(phydm, phy_info->cfo_short, 0, 8);
1466 odm_memory_set(phydm, phy_info->cfo_tail, 0, 8);
1469 static void phydm_set_per_path_phy_info(u8 rx_path, s8 rx_pwr, s8 rx_evm,
1470 s8 cfo_tail, s8 rx_snr,
1471 struct dm_phy_status_info *phy_info)
1474 u8 evm_percentage = 0;
1476 /* SNR is S(8,1), EVM is S(8,1), CFO is S(8,7) */
1479 /* Calculate EVM in dBm */
1480 evm_dbm = ((u8)(0 - rx_evm) >> 1);
1482 /* Calculate EVM in percentage */
1484 evm_percentage = 100;
1486 evm_percentage = (evm_dbm << 1) + (evm_dbm);
1489 phy_info->rx_pwr[rx_path] = rx_pwr;
1490 phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm;
1492 /* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/
1493 phy_info->cfo_tail[rx_path] = cfo_tail;
1494 phy_info->cfo_tail[rx_path] = ((phy_info->cfo_tail[rx_path] << 5) +
1495 (phy_info->cfo_tail[rx_path] << 2) +
1496 (phy_info->cfo_tail[rx_path] << 1) +
1497 (phy_info->cfo_tail[rx_path])) >>
1500 phy_info->rx_mimo_signal_strength[rx_path] =
1501 odm_query_rx_pwr_percentage(rx_pwr);
1502 phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage;
1503 phy_info->rx_snr[rx_path] = rx_snr >> 1;
1506 static void phydm_set_common_phy_info(s8 rx_power, u8 channel,
1507 bool is_beamformed, bool is_mu_packet,
1508 u8 bandwidth, u8 signal_quality, u8 rxsc,
1509 struct dm_phy_status_info *phy_info)
1511 phy_info->rx_power = rx_power; /* RSSI in dB */
1512 phy_info->recv_signal_power = rx_power; /* RSSI in dB */
1513 phy_info->channel = channel; /* channel number */
1514 phy_info->is_beamformed = is_beamformed; /* apply BF */
1515 phy_info->is_mu_packet = is_mu_packet; /* MU packet */
1516 phy_info->rxsc = rxsc;
1517 phy_info->rx_pwdb_all =
1518 odm_query_rx_pwr_percentage(rx_power); /* RSSI in percentage */
1519 phy_info->signal_quality = signal_quality; /* signal quality */
1520 phy_info->band_width = bandwidth; /* bandwidth */
1523 static void phydm_get_rx_phy_status_type0(struct phy_dm_struct *dm,
1525 struct dm_per_pkt_info *pktinfo,
1526 struct dm_phy_status_info *phy_info)
1528 /* type 0 is used for cck packet */
1530 struct phy_status_rpt_jaguar2_type0 *phy_sta_rpt =
1531 (struct phy_status_rpt_jaguar2_type0 *)phy_status;
1533 s8 rx_power = phy_sta_rpt->pwdb - 110;
1535 /* JJ ADD 20161014 */
1537 /* Calculate Signal Quality*/
1538 if (pktinfo->is_packet_match_bssid) {
1539 if (phy_sta_rpt->signal_quality >= 64) {
1541 } else if (phy_sta_rpt->signal_quality <= 20) {
1544 /* mapping to 2~99% */
1545 sq = 64 - phy_sta_rpt->signal_quality;
1546 sq = ((sq << 3) + sq) >> 2;
1550 /* Modify CCK PWDB if old AGC */
1551 if (!dm->cck_new_agc) {
1552 u8 lna_idx, vga_idx;
1554 lna_idx = ((phy_sta_rpt->lna_h << 3) | phy_sta_rpt->lna_l);
1555 vga_idx = phy_sta_rpt->vga;
1557 /* JJ ADD 20161014 */
1560 /*if (dm->support_ic_type & ODM_RTL8822B) */
1561 /*rx_power = odm_CCKRSSI_8822B(LNA_idx, VGA_idx);*/
1564 /* Update CCK packet counter */
1565 dm->phy_dbg_info.num_qry_phy_status_cck++;
1567 /*CCK no STBC and LDPC*/
1568 dm->phy_dbg_info.is_ldpc_pkt = false;
1569 dm->phy_dbg_info.is_stbc_pkt = false;
1571 /* Update Common information */
1572 phydm_set_common_phy_info(rx_power, phy_sta_rpt->channel, false, false,
1573 ODM_BW20M, sq, phy_sta_rpt->rxsc, phy_info);
1575 /* Update CCK pwdb */
1576 /* Update per-path information */
1577 phydm_set_per_path_phy_info(ODM_RF_PATH_A, rx_power, 0, 0, 0, phy_info);
1579 dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->antidx_a;
1580 dm->dm_fat_table.antsel_rx_keep_1 = phy_sta_rpt->antidx_b;
1581 dm->dm_fat_table.antsel_rx_keep_2 = phy_sta_rpt->antidx_c;
1582 dm->dm_fat_table.antsel_rx_keep_3 = phy_sta_rpt->antidx_d;
1585 static void phydm_get_rx_phy_status_type1(struct phy_dm_struct *dm,
1587 struct dm_per_pkt_info *pktinfo,
1588 struct dm_phy_status_info *phy_info)
1590 /* type 1 is used for ofdm packet */
1592 struct phy_status_rpt_jaguar2_type1 *phy_sta_rpt =
1593 (struct phy_status_rpt_jaguar2_type1 *)phy_status;
1594 s8 rx_pwr_db = -120;
1595 u8 i, rxsc, bw = ODM_BW20M, rx_count = 0;
1599 /* Update OFDM packet counter */
1600 dm->phy_dbg_info.num_qry_phy_status_ofdm++;
1602 /* Update per-path information */
1603 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
1604 if (dm->rx_ant_status & BIT(i)) {
1607 /* RX path counter */
1610 /* Update per-path information
1611 * (RSSI_dB RSSI_percentage EVM SNR CFO sq)
1613 /* EVM report is reported by stream, not path */
1614 rx_path_pwr_db = phy_sta_rpt->pwdb[i] -
1615 110; /* per-path pwdb in dB domain */
1616 phydm_set_per_path_phy_info(
1618 phy_sta_rpt->rxevm[rx_count - 1],
1619 phy_sta_rpt->cfo_tail[i], phy_sta_rpt->rxsnr[i],
1622 /* search maximum pwdb */
1623 if (rx_path_pwr_db > rx_pwr_db)
1624 rx_pwr_db = rx_path_pwr_db;
1628 /* mapping RX counter from 1~4 to 0~3 */
1630 phy_info->rx_count = rx_count - 1;
1632 /* Check if MU packet or not */
1633 if ((phy_sta_rpt->gid != 0) && (phy_sta_rpt->gid != 63)) {
1635 dm->phy_dbg_info.num_qry_mu_pkt++;
1640 /* count BF packet */
1641 dm->phy_dbg_info.num_qry_bf_pkt =
1642 dm->phy_dbg_info.num_qry_bf_pkt + phy_sta_rpt->beamformed;
1644 /*STBC or LDPC pkt*/
1645 dm->phy_dbg_info.is_ldpc_pkt = phy_sta_rpt->ldpc;
1646 dm->phy_dbg_info.is_stbc_pkt = phy_sta_rpt->stbc;
1648 /* Check sub-channel */
1649 if ((pktinfo->data_rate > ODM_RATE11M) &&
1650 (pktinfo->data_rate < ODM_RATEMCS0))
1651 rxsc = phy_sta_rpt->l_rxsc;
1653 rxsc = phy_sta_rpt->ht_rxsc;
1655 /* Check RX bandwidth */
1656 if (dm->support_ic_type & ODM_RTL8822B) {
1657 if ((rxsc >= 1) && (rxsc <= 8))
1659 else if ((rxsc >= 9) && (rxsc <= 12))
1661 else if (rxsc >= 13)
1664 bw = phy_sta_rpt->rf_mode;
1665 } else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D |
1666 ODM_RTL8710B)) { /* JJ ADD 20161014 */
1667 if (phy_sta_rpt->rf_mode == 0)
1669 else if ((rxsc == 1) || (rxsc == 2))
1675 /* Update packet information */
1676 phydm_set_common_phy_info(
1677 rx_pwr_db, phy_sta_rpt->channel, (bool)phy_sta_rpt->beamformed,
1678 is_mu, bw, odm_evm_db_to_percentage(phy_sta_rpt->rxevm[0]),
1681 num_ss = phydm_rate_to_num_ss(dm, pktinfo->data_rate);
1683 odm_parsing_cfo(dm, pktinfo, phy_sta_rpt->cfo_tail, num_ss);
1684 dm->dm_fat_table.antsel_rx_keep_0 = phy_sta_rpt->antidx_a;
1685 dm->dm_fat_table.antsel_rx_keep_1 = phy_sta_rpt->antidx_b;
1686 dm->dm_fat_table.antsel_rx_keep_2 = phy_sta_rpt->antidx_c;
1687 dm->dm_fat_table.antsel_rx_keep_3 = phy_sta_rpt->antidx_d;
1689 if (pktinfo->is_packet_match_bssid) {
1691 phydm_rx_statistic_cal(dm, phy_status, pktinfo);
1695 static void phydm_get_rx_phy_status_type2(struct phy_dm_struct *dm,
1697 struct dm_per_pkt_info *pktinfo,
1698 struct dm_phy_status_info *phy_info)
1700 struct phy_status_rpt_jaguar2_type2 *phy_sta_rpt =
1701 (struct phy_status_rpt_jaguar2_type2 *)phy_status;
1702 s8 rx_pwr_db = -120;
1703 u8 i, rxsc, bw = ODM_BW20M, rx_count = 0;
1705 /* Update OFDM packet counter */
1706 dm->phy_dbg_info.num_qry_phy_status_ofdm++;
1708 /* Update per-path information */
1709 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
1710 if (dm->rx_ant_status & BIT(i)) {
1713 /* RX path counter */
1716 /* Update per-path information
1717 * (RSSI_dB RSSI_percentage EVM SNR CFO sq)
1719 rx_path_pwr_db = phy_sta_rpt->pwdb[i] -
1720 110; /* per-path pwdb in dB domain */
1722 phydm_set_per_path_phy_info(i, rx_path_pwr_db, 0, 0, 0,
1725 /* search maximum pwdb */
1726 if (rx_path_pwr_db > rx_pwr_db)
1727 rx_pwr_db = rx_path_pwr_db;
1731 /* mapping RX counter from 1~4 to 0~3 */
1733 phy_info->rx_count = rx_count - 1;
1735 /* Check RX sub-channel */
1736 if ((pktinfo->data_rate > ODM_RATE11M) &&
1737 (pktinfo->data_rate < ODM_RATEMCS0))
1738 rxsc = phy_sta_rpt->l_rxsc;
1740 rxsc = phy_sta_rpt->ht_rxsc;
1742 /*STBC or LDPC pkt*/
1743 dm->phy_dbg_info.is_ldpc_pkt = phy_sta_rpt->ldpc;
1744 dm->phy_dbg_info.is_stbc_pkt = phy_sta_rpt->stbc;
1746 /* Check RX bandwidth */
1747 /* the BW information of sc=0 is useless, because there is
1748 * no information of RF mode
1751 if (dm->support_ic_type & ODM_RTL8822B) {
1752 if ((rxsc >= 1) && (rxsc <= 8))
1754 else if ((rxsc >= 9) && (rxsc <= 12))
1756 else if (rxsc >= 13)
1760 } else if (dm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D |
1761 ODM_RTL8710B)) { /* JJ ADD 20161014 */
1764 else if ((rxsc == 1) || (rxsc == 2))
1770 /* Update packet information */
1771 phydm_set_common_phy_info(rx_pwr_db, phy_sta_rpt->channel,
1772 (bool)phy_sta_rpt->beamformed, false, bw, 0,
1777 phydm_process_rssi_for_dm_new_type(struct phy_dm_struct *dm,
1778 struct dm_phy_status_info *phy_info,
1779 struct dm_per_pkt_info *pktinfo)
1781 s32 undecorated_smoothed_pwdb, accumulate_pwdb;
1784 struct rtl_sta_info *entry;
1785 u8 scaling_factor = 4;
1787 if (pktinfo->station_id >= ODM_ASSOCIATE_ENTRY_NUM)
1790 entry = dm->odm_sta_info[pktinfo->station_id];
1792 if (!IS_STA_VALID(entry))
1795 if ((!pktinfo->is_packet_match_bssid)) /*data frame only*/
1798 if (pktinfo->is_packet_beacon)
1799 dm->phy_dbg_info.num_qry_beacon_pkt++;
1801 if (pktinfo->is_packet_to_self || pktinfo->is_packet_beacon) {
1802 u32 rssi_linear = 0;
1804 dm->rx_rate = pktinfo->data_rate;
1805 undecorated_smoothed_pwdb =
1806 entry->rssi_stat.undecorated_smoothed_pwdb;
1807 accumulate_pwdb = dm->accumulate_pwdb[pktinfo->station_id];
1808 dm->rssi_a = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A];
1809 dm->rssi_b = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B];
1810 dm->rssi_c = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_C];
1811 dm->rssi_d = phy_info->rx_mimo_signal_strength[ODM_RF_PATH_D];
1813 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX_JAGUAR; i++) {
1814 if (phy_info->rx_mimo_signal_strength[i] != 0)
1815 rssi_linear += odm_convert_to_linear(
1816 phy_info->rx_mimo_signal_strength[i]);
1819 switch (phy_info->rx_count + 1) {
1821 rssi_linear = (rssi_linear >> 1);
1824 /* rssi_linear/3 ~ rssi_linear*11/32 */
1825 rssi_linear = ((rssi_linear) + (rssi_linear << 1) +
1826 (rssi_linear << 3)) >>
1830 rssi_linear = (rssi_linear >> 2);
1833 rssi_ave = odm_convert_to_db(rssi_linear);
1835 if (undecorated_smoothed_pwdb <= 0) {
1837 (phy_info->rx_pwdb_all << scaling_factor);
1838 undecorated_smoothed_pwdb = phy_info->rx_pwdb_all;
1840 accumulate_pwdb = accumulate_pwdb -
1841 (accumulate_pwdb >> scaling_factor) +
1843 undecorated_smoothed_pwdb =
1845 (1 << (scaling_factor - 1))) >>
1849 entry->rssi_stat.undecorated_smoothed_pwdb =
1850 undecorated_smoothed_pwdb;
1851 dm->accumulate_pwdb[pktinfo->station_id] = accumulate_pwdb;
1855 void phydm_rx_phy_status_new_type(struct phy_dm_struct *phydm, u8 *phy_status,
1856 struct dm_per_pkt_info *pktinfo,
1857 struct dm_phy_status_info *phy_info)
1859 u8 phy_status_type = (*phy_status & 0xf);
1862 phydm_reset_phy_info(phydm, phy_info);
1864 /* Phy status parsing */
1865 switch (phy_status_type) {
1867 phydm_get_rx_phy_status_type0(phydm, phy_status, pktinfo,
1872 phydm_get_rx_phy_status_type1(phydm, phy_status, pktinfo,
1877 phydm_get_rx_phy_status_type2(phydm, phy_status, pktinfo,
1885 /* Update signal strength to UI, and phy_info->rx_pwdb_all is the
1886 * maximum RSSI of all path
1888 phy_info->signal_strength =
1889 (u8)(odm_signal_scale_mapping(phydm, phy_info->rx_pwdb_all));
1891 /* Calculate average RSSI and smoothed RSSI */
1892 phydm_process_rssi_for_dm_new_type(phydm, phy_info, pktinfo);
1895 u32 query_phydm_trx_capability(struct phy_dm_struct *dm)
1897 u32 value32 = 0xFFFFFFFF;
1902 u32 query_phydm_stbc_capability(struct phy_dm_struct *dm)
1904 u32 value32 = 0xFFFFFFFF;
1909 u32 query_phydm_ldpc_capability(struct phy_dm_struct *dm)
1911 u32 value32 = 0xFFFFFFFF;
1916 u32 query_phydm_txbf_parameters(struct phy_dm_struct *dm)
1918 u32 value32 = 0xFFFFFFFF;
1923 u32 query_phydm_txbf_capability(struct phy_dm_struct *dm)
1925 u32 value32 = 0xFFFFFFFF;