drivers/staging/rtlwifi/phydm/phydm_dynamictxpower.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2016  Realtek Corporation.
   5  *
   6  * Contact Information:
   7  * wlanfae <wlanfae@realtek.com>
   8  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
   9  * Hsinchu 300, Taiwan.
  10  *
  11  * Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *****************************************************************************/
  14
  15 /* ************************************************************
  16  * include files
  17  * *************************************************************/
  18 #include "mp_precomp.h"
  19 #include "phydm_precomp.h"
  20
  21 void odm_dynamic_tx_power_init(void *dm_void)
  22 {
  23         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
  24
  25         dm->last_dtp_lvl = tx_high_pwr_level_normal;
  26         dm->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
  27         dm->tx_agc_ofdm_18_6 =
  28                 odm_get_bb_reg(dm, 0xC24, MASKDWORD); /*TXAGC {18M 12M 9M 6M}*/
  29 }
  30
  31 void odm_dynamic_tx_power_save_power_index(void *dm_void) {}
  32
  33 void odm_dynamic_tx_power_restore_power_index(void *dm_void) {}
  34
  35 void odm_dynamic_tx_power_write_power_index(void *dm_void, u8 value)
  36 {
  37         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
  38         u8 index;
  39         u32 power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
  40
  41         for (index = 0; index < 6; index++)
  42                 odm_write_1byte(dm, power_index_reg[index], value);
  43 }
  44
  45 static void odm_dynamic_tx_power_nic_ce(void *dm_void) {}
  46
  47 void odm_dynamic_tx_power(void *dm_void)
  48 {
  49         /*  */
  50         /* For AP/ADSL use struct rtl8192cd_priv* */
  51         /* For CE/NIC use struct void* */
  52         /*  */
  53         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
  54
  55         if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
  56                 return;
  57         /* 2011/09/29 MH In HW integration first stage, we provide 4 different
  58          * handle to operate at the same time.
  59          * In the stage2/3, we need to prive universal interface and merge all
  60          * HW dynamic mechanism.
  61          */
  62         switch (dm->support_platform) {
  63         case ODM_WIN:
  64                 odm_dynamic_tx_power_nic(dm);
  65                 break;
  66         case ODM_CE:
  67                 odm_dynamic_tx_power_nic_ce(dm);
  68                 break;
  69         case ODM_AP:
  70                 odm_dynamic_tx_power_ap(dm);
  71                 break;
  72         default:
  73                 break;
  74         }
  75 }
  76
  77 void odm_dynamic_tx_power_nic(void *dm_void)
  78 {
  79         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
  80
  81         if (!(dm->support_ability & ODM_BB_DYNAMIC_TXPWR))
  82                 return;
  83 }
  84
  85 void odm_dynamic_tx_power_ap(void *dm_void
  86
  87                              )
  88 {
  89 }
  90
  91 void odm_dynamic_tx_power_8821(void *dm_void, u8 *desc, u8 mac_id) {}