drivers/staging/rtlwifi/pci.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2009-2012  Realtek Corporation.
   5  *
   6  * Contact Information:
   7  * wlanfae <wlanfae@realtek.com>
   8  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
   9  * Hsinchu 300, Taiwan.
  10  *
  11  * Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *****************************************************************************/
  14
  15 #include "wifi.h"
  16 #include "core.h"
  17 #include "pci.h"
  18 #include "base.h"
  19 #include "ps.h"
  20 #include "efuse.h"
  21 #include <linux/interrupt.h>
  22 #include <linux/export.h>
  23 #include <linux/module.h>
  24
  25 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  26 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  27 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  28 MODULE_LICENSE("GPL");
  29 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  30
  31 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  32         INTEL_VENDOR_ID,
  33         ATI_VENDOR_ID,
  34         AMD_VENDOR_ID,
  35         SIS_VENDOR_ID
  36 };
  37
  38 static const u8 ac_to_hwq[] = {
  39         VO_QUEUE,
  40         VI_QUEUE,
  41         BE_QUEUE,
  42         BK_QUEUE
  43 };
  44
  45 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  46                               struct sk_buff *skb)
  47 {
  48         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  49         __le16 fc = rtl_get_fc(skb);
  50         u8 queue_index = skb_get_queue_mapping(skb);
  51         struct ieee80211_hdr *hdr;
  52
  53         if (unlikely(ieee80211_is_beacon(fc)))
  54                 return BEACON_QUEUE;
  55         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  56                 return MGNT_QUEUE;
  57         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  58                 if (ieee80211_is_nullfunc(fc))
  59                         return HIGH_QUEUE;
  60         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
  61                 hdr = rtl_get_hdr(skb);
  62
  63                 if (is_multicast_ether_addr(hdr->addr1) ||
  64                     is_broadcast_ether_addr(hdr->addr1))
  65                         return HIGH_QUEUE;
  66         }
  67
  68         return ac_to_hwq[queue_index];
  69 }
  70
  71 /* Update PCI dependent default settings*/
  72 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  73 {
  74         struct rtl_priv *rtlpriv = rtl_priv(hw);
  75         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  76         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  77         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  78         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  79         u8 init_aspm;
  80
  81         ppsc->reg_rfps_level = 0;
  82         ppsc->support_aspm = false;
  83
  84         /*Update PCI ASPM setting */
  85         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  86         switch (rtlpci->const_pci_aspm) {
  87         case 0:
  88                 /*No ASPM */
  89                 break;
  90
  91         case 1:
  92                 /*ASPM dynamically enabled/disable. */
  93                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  94                 break;
  95
  96         case 2:
  97                 /*ASPM with Clock Req dynamically enabled/disable. */
  98                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  99                                          RT_RF_OFF_LEVL_CLK_REQ);
 100                 break;
 101
 102         case 3:
 103                 /* Always enable ASPM and Clock Req
 104                  * from initialization to halt.
 105                  */
 106                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 107                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 108                                          RT_RF_OFF_LEVL_CLK_REQ);
 109                 break;
 110
 111         case 4:
 112                 /* Always enable ASPM without Clock Req
 113                  * from initialization to halt.
 114                  */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 116                                           RT_RF_OFF_LEVL_CLK_REQ);
 117                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 118                 break;
 119         }
 120
 121         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 122
 123         /*Update Radio OFF setting */
 124         switch (rtlpci->const_hwsw_rfoff_d3) {
 125         case 1:
 126                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 127                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 128                 break;
 129
 130         case 2:
 131                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 132                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 133                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 134                 break;
 135
 136         case 3:
 137                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 138                 break;
 139         }
 140
 141         /*Set HW definition to determine if it supports ASPM. */
 142         switch (rtlpci->const_support_pciaspm) {
 143         case 0:{
 144                 /*Not support ASPM. */
 145                 bool support_aspm = false;
 146
 147                 ppsc->support_aspm = support_aspm;
 148                 break;
 149         }
 150         case 1:{
 151                 /*Support ASPM. */
 152                 bool support_aspm = true;
 153                 bool support_backdoor = true;
 154
 155                 ppsc->support_aspm = support_aspm;
 156
 157                 /*if (priv->oem_id == RT_CID_TOSHIBA &&
 158                  * !priv->ndis_adapter.amd_l1_patch)
 159                  *  support_backdoor = false;
 160                  */
 161
 162                 ppsc->support_backdoor = support_backdoor;
 163
 164                 break;
 165         }
 166         case 2:
 167                 /*ASPM value set by chipset. */
 168                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 169                         bool support_aspm = true;
 170
 171                         ppsc->support_aspm = support_aspm;
 172                 }
 173                 break;
 174         default:
 175                 pr_err("switch case %#x not processed\n",
 176                        rtlpci->const_support_pciaspm);
 177                 break;
 178         }
 179
 180         /* toshiba aspm issue, toshiba will set aspm selfly
 181          * so we should not set aspm in driver
 182          */
 183         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 184         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 185             init_aspm == 0x43)
 186                 ppsc->support_aspm = false;
 187 }
 188
 189 static bool _rtl_pci_platform_switch_device_pci_aspm(
 190                         struct ieee80211_hw *hw,
 191                         u8 value)
 192 {
 193         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 194         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 195
 196         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 197                 value |= 0x40;
 198
 199         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 200
 201         return false;
 202 }
 203
 204 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 205 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 206 {
 207         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 208         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 209
 210         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 211
 212         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 213                 udelay(100);
 214 }
 215
 216 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 217 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 218 {
 219         struct rtl_priv *rtlpriv = rtl_priv(hw);
 220         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 221         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 222         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 223         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 224         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 225         /*Retrieve original configuration settings. */
 226         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 227         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.pcibridge_linkctrlreg;
 228         u16 aspmlevel = 0;
 229         u8 tmp_u1b = 0;
 230
 231         if (!ppsc->support_aspm)
 232                 return;
 233
 234         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 235                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 236                          "PCI(Bridge) UNKNOWN\n");
 237
 238                 return;
 239         }
 240
 241         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 242                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 243                 _rtl_pci_switch_clk_req(hw, 0x0);
 244         }
 245
 246         /*for promising device will in L0 state after an I/O. */
 247         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 248
 249         /*Set corresponding value. */
 250         aspmlevel |= BIT(0) | BIT(1);
 251         linkctrl_reg &= ~aspmlevel;
 252         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 253
 254         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 255         udelay(50);
 256
 257         /*4 Disable Pci Bridge ASPM */
 258         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 259                               pcibridge_linkctrlreg);
 260
 261         udelay(50);
 262 }
 263
 264 /*
 265  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 266  *power saving We should follow the sequence to enable
 267  *RTL8192SE first then enable Pci Bridge ASPM
 268  *or the system will show bluescreen.
 269  */
 270 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 271 {
 272         struct rtl_priv *rtlpriv = rtl_priv(hw);
 273         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 274         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 275         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 276         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 277         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 278         u16 aspmlevel;
 279         u8 u_pcibridge_aspmsetting;
 280         u8 u_device_aspmsetting;
 281
 282         if (!ppsc->support_aspm)
 283                 return;
 284
 285         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 286                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 287                          "PCI(Bridge) UNKNOWN\n");
 288                 return;
 289         }
 290
 291         /*4 Enable Pci Bridge ASPM */
 292
 293         u_pcibridge_aspmsetting =
 294             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 295             rtlpci->const_hostpci_aspm_setting;
 296
 297         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 298                 u_pcibridge_aspmsetting &= ~BIT(0);
 299
 300         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 301                               u_pcibridge_aspmsetting);
 302
 303         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 304                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 305                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 306                  u_pcibridge_aspmsetting);
 307
 308         udelay(50);
 309
 310         /*Get ASPM level (with/without Clock Req) */
 311         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 312         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 313
 314         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 315         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 316
 317         u_device_aspmsetting |= aspmlevel;
 318
 319         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 320
 321         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 322                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 323                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 324                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 325         }
 326         udelay(100);
 327 }
 328
 329 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 330 {
 331         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 332
 333         bool status = false;
 334         u8 offset_e0;
 335         unsigned int offset_e4;
 336
 337         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 338
 339         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 340
 341         if (offset_e0 == 0xA0) {
 342                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 343                 if (offset_e4 & BIT(23))
 344                         status = true;
 345         }
 346
 347         return status;
 348 }
 349
 350 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 351                                      struct rtl_priv **buddy_priv)
 352 {
 353         struct rtl_priv *rtlpriv = rtl_priv(hw);
 354         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 355         bool find_buddy_priv = false;
 356         struct rtl_priv *tpriv;
 357         struct rtl_pci_priv *tpcipriv = NULL;
 358
 359         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 360                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 361                                     list) {
 362                         tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 363                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 364                                  "pcipriv->ndis_adapter.funcnumber %x\n",
 365                                 pcipriv->ndis_adapter.funcnumber);
 366                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 367                                  "tpcipriv->ndis_adapter.funcnumber %x\n",
 368                                 tpcipriv->ndis_adapter.funcnumber);
 369
 370                         if ((pcipriv->ndis_adapter.busnumber ==
 371                              tpcipriv->ndis_adapter.busnumber) &&
 372                             (pcipriv->ndis_adapter.devnumber ==
 373                             tpcipriv->ndis_adapter.devnumber) &&
 374                             (pcipriv->ndis_adapter.funcnumber !=
 375                             tpcipriv->ndis_adapter.funcnumber)) {
 376                                 find_buddy_priv = true;
 377                                 break;
 378                         }
 379                 }
 380         }
 381
 382         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 383                  "find_buddy_priv %d\n", find_buddy_priv);
 384
 385         if (find_buddy_priv)
 386                 *buddy_priv = tpriv;
 387
 388         return find_buddy_priv;
 389 }
 390
 391 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 392 {
 393         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 394         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 395         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 396         u8 linkctrl_reg;
 397         u8 num4bbytes;
 398
 399         num4bbytes = (capabilityoffset + 0x10) / 4;
 400
 401         /*Read  Link Control Register */
 402         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 403
 404         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 405 }
 406
 407 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 408                                         struct ieee80211_hw *hw)
 409 {
 410         struct rtl_priv *rtlpriv = rtl_priv(hw);
 411         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 412
 413         u8 tmp;
 414         u16 linkctrl_reg;
 415
 416         /*Link Control Register */
 417         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 418         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 419
 420         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 421                  pcipriv->ndis_adapter.linkctrl_reg);
 422
 423         pci_read_config_byte(pdev, 0x98, &tmp);
 424         tmp |= BIT(4);
 425         pci_write_config_byte(pdev, 0x98, tmp);
 426
 427         tmp = 0x17;
 428         pci_write_config_byte(pdev, 0x70f, tmp);
 429 }
 430
 431 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 432 {
 433         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 434
 435         _rtl_pci_update_default_setting(hw);
 436
 437         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 438                 /*Always enable ASPM & Clock Req. */
 439                 rtl_pci_enable_aspm(hw);
 440                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 441         }
 442 }
 443
 444 static void _rtl_pci_io_handler_init(struct device *dev,
 445                                      struct ieee80211_hw *hw)
 446 {
 447         struct rtl_priv *rtlpriv = rtl_priv(hw);
 448
 449         rtlpriv->io.dev = dev;
 450
 451         rtlpriv->io.write8_async = pci_write8_async;
 452         rtlpriv->io.write16_async = pci_write16_async;
 453         rtlpriv->io.write32_async = pci_write32_async;
 454
 455         rtlpriv->io.read8_sync = pci_read8_sync;
 456         rtlpriv->io.read16_sync = pci_read16_sync;
 457         rtlpriv->io.read32_sync = pci_read32_sync;
 458 }
 459
 460 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 461                                        struct sk_buff *skb,
 462                                        struct rtl_tcb_desc *tcb_desc, u8 tid)
 463 {
 464         struct rtl_priv *rtlpriv = rtl_priv(hw);
 465         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 466         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 467         struct sk_buff *next_skb;
 468         u8 additionlen = FCS_LEN;
 469
 470         /* here open is 4, wep/tkip is 8, aes is 12*/
 471         if (info->control.hw_key)
 472                 additionlen += info->control.hw_key->icv_len;
 473
 474         /* The most skb num is 6 */
 475         tcb_desc->empkt_num = 0;
 476         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 477         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 478                 struct ieee80211_tx_info *next_info;
 479
 480                 next_info = IEEE80211_SKB_CB(next_skb);
 481                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 482                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 483                                 next_skb->len + additionlen;
 484                         tcb_desc->empkt_num++;
 485                 } else {
 486                         break;
 487                 }
 488
 489                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 490                                       next_skb))
 491                         break;
 492
 493                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 494                         break;
 495         }
 496         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 497
 498         return true;
 499 }
 500
 501 /* just for early mode now */
 502 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 503 {
 504         struct rtl_priv *rtlpriv = rtl_priv(hw);
 505         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 506         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 507         struct sk_buff *skb = NULL;
 508         struct ieee80211_tx_info *info = NULL;
 509         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 510         int tid;
 511
 512         if (!rtlpriv->rtlhal.earlymode_enable)
 513                 return;
 514
 515         if (rtlpriv->dm.supp_phymode_switch &&
 516             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 517             (rtlpriv->buddy_priv &&
 518             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 519                 return;
 520         /* we just use em for BE/BK/VI/VO */
 521         for (tid = 7; tid >= 0; tid--) {
 522                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 523                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 524
 525                 while (!mac->act_scanning &&
 526                        rtlpriv->psc.rfpwr_state == ERFON) {
 527                         struct rtl_tcb_desc tcb_desc;
 528
 529                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 530                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 531                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 532                             (ring->entries - skb_queue_len(&ring->queue) >
 533                              rtlhal->max_earlymode_num)) {
 534                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 535                         } else {
 536                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 537                                 break;
 538                         }
 539                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 540
 541                         /* Some macaddr can't do early mode. like
 542                          * multicast/broadcast/no_qos data
 543                          */
 544                         info = IEEE80211_SKB_CB(skb);
 545                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 546                                 _rtl_update_earlymode_info(hw, skb,
 547                                                            &tcb_desc, tid);
 548
 549                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 550                 }
 551         }
 552 }
 553
 554 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 555 {
 556         struct rtl_priv *rtlpriv = rtl_priv(hw);
 557         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 558
 559         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 560
 561         while (skb_queue_len(&ring->queue)) {
 562                 struct sk_buff *skb;
 563                 struct ieee80211_tx_info *info;
 564                 __le16 fc;
 565                 u8 tid;
 566                 u8 *entry;
 567
 568                 if (rtlpriv->use_new_trx_flow)
 569                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 570                 else
 571                         entry = (u8 *)(&ring->desc[ring->idx]);
 572
 573                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 574                         return;
 575                 ring->idx = (ring->idx + 1) % ring->entries;
 576
 577                 skb = __skb_dequeue(&ring->queue);
 578                 pci_unmap_single(rtlpci->pdev,
 579                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry, true,
 580                                  HW_DESC_TXBUFF_ADDR),
 581                                  skb->len, PCI_DMA_TODEVICE);
 582
 583                 /* remove early mode header */
 584                 if (rtlpriv->rtlhal.earlymode_enable)
 585                         skb_pull(skb, EM_HDR_LEN);
 586
 587                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 588                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 589                          ring->idx,
 590                          skb_queue_len(&ring->queue),
 591                          *(u16 *)(skb->data + 22));
 592
 593                 if (prio == TXCMD_QUEUE) {
 594                         dev_kfree_skb(skb);
 595                         goto tx_status_ok;
 596                 }
 597
 598                 /* for sw LPS, just after NULL skb send out, we can
 599                  * sure AP knows we are sleeping, we should not let
 600                  * rf sleep
 601                  */
 602                 fc = rtl_get_fc(skb);
 603                 if (ieee80211_is_nullfunc(fc)) {
 604                         if (ieee80211_has_pm(fc)) {
 605                                 rtlpriv->mac80211.offchan_delay = true;
 606                                 rtlpriv->psc.state_inap = true;
 607                         } else {
 608                                 rtlpriv->psc.state_inap = false;
 609                         }
 610                 }
 611                 if (ieee80211_is_action(fc)) {
 612                         struct ieee80211_mgmt *action_frame =
 613                                 (struct ieee80211_mgmt *)skb->data;
 614                         if (action_frame->u.action.u.ht_smps.action ==
 615                             WLAN_HT_ACTION_SMPS) {
 616                                 dev_kfree_skb(skb);
 617                                 goto tx_status_ok;
 618                         }
 619                 }
 620
 621                 /* update tid tx pkt num */
 622                 tid = rtl_get_tid(skb);
 623                 if (tid <= 7)
 624                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 625
 626                 info = IEEE80211_SKB_CB(skb);
 627                 ieee80211_tx_info_clear_status(info);
 628
 629                 info->flags |= IEEE80211_TX_STAT_ACK;
 630                 /*info->status.rates[0].count = 1; */
 631
 632                 ieee80211_tx_status_irqsafe(hw, skb);
 633
 634                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 635                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 636                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 637                                  prio, ring->idx,
 638                                  skb_queue_len(&ring->queue));
 639
 640                         ieee80211_wake_queue(hw, skb_get_queue_mapping(skb));
 641                 }
 642 tx_status_ok:
 643                 skb = NULL;
 644         }
 645
 646         if (((rtlpriv->link_info.num_rx_inperiod +
 647               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 648               (rtlpriv->link_info.num_rx_inperiod > 2))
 649                 rtl_lps_leave(hw);
 650 }
 651
 652 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 653                                     struct sk_buff *new_skb, u8 *entry,
 654                                     int rxring_idx, int desc_idx)
 655 {
 656         struct rtl_priv *rtlpriv = rtl_priv(hw);
 657         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 658         u32 bufferaddress;
 659         u8 tmp_one = 1;
 660         struct sk_buff *skb;
 661
 662         if (likely(new_skb)) {
 663                 skb = new_skb;
 664                 goto remap;
 665         }
 666         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 667         if (!skb)
 668                 return 0;
 669
 670 remap:
 671         /* just set skb->cb to mapping addr for pci_unmap_single use */
 672         *((dma_addr_t *)skb->cb) =
 673                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 674                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 675         bufferaddress = *((dma_addr_t *)skb->cb);
 676         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 677                 return 0;
 678         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 679         if (rtlpriv->use_new_trx_flow) {
 680                 /* skb->cb may be 64 bit address */
 681                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 682                                             HW_DESC_RX_PREPARE,
 683                                             (u8 *)(dma_addr_t *)skb->cb);
 684         } else {
 685                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 686                                             HW_DESC_RXBUFF_ADDR,
 687                                             (u8 *)&bufferaddress);
 688                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 689                                             HW_DESC_RXPKT_LEN,
 690                                             (u8 *)&rtlpci->rxbuffersize);
 691                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 692                                             HW_DESC_RXOWN,
 693                                             (u8 *)&tmp_one);
 694         }
 695         return 1;
 696 }
 697
 698 /* inorder to receive 8K AMSDU we have set skb to
 699  * 9100bytes in init rx ring, but if this packet is
 700  * not a AMSDU, this large packet will be sent to
 701  * TCP/IP directly, this cause big packet ping fail
 702  * like: "ping -s 65507", so here we will realloc skb
 703  * based on the true size of packet, Mac80211
 704  * Probably will do it better, but does not yet.
 705  *
 706  * Some platform will fail when alloc skb sometimes.
 707  * in this condition, we will send the old skb to
 708  * mac80211 directly, this will not cause any other
 709  * issues, but only this packet will be lost by TCP/IP
 710  */
 711 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 712                                     struct sk_buff *skb,
 713                                     struct ieee80211_rx_status rx_status)
 714 {
 715         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 716                 dev_kfree_skb_any(skb);
 717         } else {
 718                 struct sk_buff *uskb = NULL;
 719
 720                 uskb = dev_alloc_skb(skb->len + 128);
 721                 if (likely(uskb)) {
 722                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 723                                sizeof(rx_status));
 724                         skb_put_data(uskb, skb->data, skb->len);
 725                         dev_kfree_skb_any(skb);
 726                         ieee80211_rx_irqsafe(hw, uskb);
 727                 } else {
 728                         ieee80211_rx_irqsafe(hw, skb);
 729                 }
 730         }
 731 }
 732
 733 /*hsisr interrupt handler*/
 734 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 735 {
 736         struct rtl_priv *rtlpriv = rtl_priv(hw);
 737         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 738
 739         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 740                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 741                        rtlpci->sys_irq_mask);
 742 }
 743
 744 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 745 {
 746         struct rtl_priv *rtlpriv = rtl_priv(hw);
 747         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 748         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 749         struct ieee80211_rx_status rx_status = { 0 };
 750         unsigned int count = rtlpci->rxringcount;
 751         u8 own;
 752         u8 tmp_one;
 753         bool unicast = false;
 754         u8 hw_queue = 0;
 755         unsigned int rx_remained_cnt = 0;
 756         struct rtl_stats stats = {
 757                 .signal = 0,
 758                 .rate = 0,
 759         };
 760
 761         /*RX NORMAL PKT */
 762         while (count--) {
 763                 struct ieee80211_hdr *hdr;
 764                 __le16 fc;
 765                 u16 len;
 766                 /*rx buffer descriptor */
 767                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 768                 /*if use new trx flow, it means wifi info */
 769                 struct rtl_rx_desc *pdesc = NULL;
 770                 /*rx pkt */
 771                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 772                                       rtlpci->rx_ring[rxring_idx].idx];
 773                 struct sk_buff *new_skb;
 774
 775                 if (rtlpriv->use_new_trx_flow) {
 776                         if (rx_remained_cnt == 0)
 777                                 rx_remained_cnt =
 778                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 779                                                                       hw_queue);
 780                         if (rx_remained_cnt == 0)
 781                                 return;
 782                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 783                                 rtlpci->rx_ring[rxring_idx].idx];
 784                         pdesc = (struct rtl_rx_desc *)skb->data;
 785                 } else {        /* rx descriptor */
 786                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 787                                 rtlpci->rx_ring[rxring_idx].idx];
 788
 789                         own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
 790                                                               false,
 791                                                               HW_DESC_OWN);
 792                         if (own) /* wait data to be filled by hardware */
 793                                 return;
 794                 }
 795
 796                 /* Reaching this point means: data is filled already
 797                  * AAAAAAttention !!!
 798                  * We can NOT access 'skb' before 'pci_unmap_single'
 799                  */
 800                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 801                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 802
 803                 /* get a new skb - if fail, old one will be reused */
 804                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 805                 if (unlikely(!new_skb))
 806                         goto no_new;
 807                 memset(&rx_status, 0, sizeof(rx_status));
 808                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 809                                                  &rx_status, (u8 *)pdesc, skb);
 810
 811                 if (rtlpriv->use_new_trx_flow)
 812                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 813                                                            (u8 *)buffer_desc,
 814                                                            hw_queue);
 815
 816                 len = rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc, false,
 817                                                   HW_DESC_RXPKT_LEN);
 818
 819                 if (skb->end - skb->tail > len) {
 820                         skb_put(skb, len);
 821                         if (rtlpriv->use_new_trx_flow)
 822                                 skb_reserve(skb, stats.rx_drvinfo_size +
 823                                             stats.rx_bufshift + 24);
 824                         else
 825                                 skb_reserve(skb, stats.rx_drvinfo_size +
 826                                             stats.rx_bufshift);
 827                 } else {
 828                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 829                                  "skb->end - skb->tail = %d, len is %d\n",
 830                                  skb->end - skb->tail, len);
 831                         dev_kfree_skb_any(skb);
 832                         goto new_trx_end;
 833                 }
 834                 /* handle command packet here */
 835                 if (rtlpriv->cfg->ops->rx_command_packet &&
 836                     rtlpriv->cfg->ops->rx_command_packet(hw, &stats, skb)) {
 837                         dev_kfree_skb_any(skb);
 838                         goto new_trx_end;
 839                 }
 840
 841                 /*
 842                  * NOTICE This can not be use for mac80211,
 843                  * this is done in mac80211 code,
 844                  * if done here sec DHCP will fail
 845                  * skb_trim(skb, skb->len - 4);
 846                  */
 847
 848                 hdr = rtl_get_hdr(skb);
 849                 fc = rtl_get_fc(skb);
 850
 851                 if (!stats.crc && !stats.hwerror) {
 852                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 853                                sizeof(rx_status));
 854
 855                         if (is_broadcast_ether_addr(hdr->addr1)) {
 856                                 ;/*TODO*/
 857                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 858                                 ;/*TODO*/
 859                         } else {
 860                                 unicast = true;
 861                                 rtlpriv->stats.rxbytesunicast += skb->len;
 862                         }
 863                         rtl_is_special_data(hw, skb, false, true);
 864
 865                         if (ieee80211_is_data(fc)) {
 866                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 867                                 if (unicast)
 868                                         rtlpriv->link_info.num_rx_inperiod++;
 869                         }
 870
 871                         rtl_collect_scan_list(hw, skb);
 872
 873                         /* static bcn for roaming */
 874                         rtl_beacon_statistic(hw, skb);
 875                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 876                         /* for sw lps */
 877                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 878                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 879                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 880                             (rtlpriv->rtlhal.current_bandtype ==
 881                              BAND_ON_2_4G) &&
 882                             (ieee80211_is_beacon(fc) ||
 883                              ieee80211_is_probe_resp(fc))) {
 884                                 dev_kfree_skb_any(skb);
 885                         } else {
 886                                 rtl_check_beacon_key(hw, (void *)skb->data,
 887                                                      skb->len);
 888                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 889                         }
 890                 } else {
 891                         dev_kfree_skb_any(skb);
 892                 }
 893 new_trx_end:
 894                 if (rtlpriv->use_new_trx_flow) {
 895                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 896                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 897                                         RTL_PCI_MAX_RX_COUNT;
 898
 899                         rx_remained_cnt--;
 900                         rtl_write_word(rtlpriv, 0x3B4,
 901                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 902                 }
 903                 if (((rtlpriv->link_info.num_rx_inperiod +
 904                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 905                       (rtlpriv->link_info.num_rx_inperiod > 2))
 906                         rtl_lps_leave(hw);
 907                 skb = new_skb;
 908 no_new:
 909                 if (rtlpriv->use_new_trx_flow) {
 910                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 911                                                  rxring_idx,
 912                                                  rtlpci->rx_ring[rxring_idx].idx);
 913                 } else {
 914                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 915                                                  rxring_idx,
 916                                                  rtlpci->rx_ring[rxring_idx].idx);
 917                         if (rtlpci->rx_ring[rxring_idx].idx ==
 918                             rtlpci->rxringcount - 1)
 919                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 920                                                             false,
 921                                                             HW_DESC_RXERO,
 922                                                             (u8 *)&tmp_one);
 923                 }
 924                 rtlpci->rx_ring[rxring_idx].idx =
 925                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 926                                 rtlpci->rxringcount;
 927         }
 928 }
 929
 930 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 931 {
 932         struct ieee80211_hw *hw = dev_id;
 933         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 934         struct rtl_priv *rtlpriv = rtl_priv(hw);
 935         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 936         unsigned long flags;
 937         u32 inta = 0;
 938         u32 intb = 0;
 939         u32 intc = 0;
 940         u32 intd = 0;
 941         irqreturn_t ret = IRQ_HANDLED;
 942
 943         if (rtlpci->irq_enabled == 0)
 944                 return ret;
 945
 946         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 947         rtlpriv->cfg->ops->disable_interrupt(hw);
 948
 949         /*read ISR: 4/8bytes */
 950         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb, &intc, &intd);
 951
 952         /*Shared IRQ or HW disappeared */
 953         if (!inta || inta == 0xffff)
 954                 goto done;
 955
 956         /*<1> beacon related */
 957         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 958                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 959                          "beacon ok interrupt!\n");
 960         }
 961
 962         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 963                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 964                          "beacon err interrupt!\n");
 965         }
 966
 967         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK])
 968                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 969
 970         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 971                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 972                          "prepare beacon for interrupt!\n");
 973                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 974         }
 975
 976         /*<2> Tx related */
 977         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 978                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 979
 980         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 981                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 982                          "Manage ok interrupt!\n");
 983                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 984         }
 985
 986         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 987                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 988                          "HIGH_QUEUE ok interrupt!\n");
 989                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 990         }
 991
 992         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 993                 rtlpriv->link_info.num_tx_inperiod++;
 994
 995                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 996                          "BK Tx OK interrupt!\n");
 997                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 998         }
 999
1000         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1001                 rtlpriv->link_info.num_tx_inperiod++;
1002
1003                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1004                          "BE TX OK interrupt!\n");
1005                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1006         }
1007
1008         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1009                 rtlpriv->link_info.num_tx_inperiod++;
1010
1011                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1012                          "VI TX OK interrupt!\n");
1013                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1014         }
1015
1016         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1017                 rtlpriv->link_info.num_tx_inperiod++;
1018
1019                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1020                          "Vo TX OK interrupt!\n");
1021                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1022         }
1023
1024         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
1025                 if (intd & rtlpriv->cfg->maps[RTL_IMR_H2CDOK]) {
1026                         rtlpriv->link_info.num_tx_inperiod++;
1027
1028                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1029                                  "H2C TX OK interrupt!\n");
1030                         _rtl_pci_tx_isr(hw, H2C_QUEUE);
1031                 }
1032         }
1033
1034         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1035                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1036                         rtlpriv->link_info.num_tx_inperiod++;
1037
1038                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1039                                  "CMD TX OK interrupt!\n");
1040                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1041                 }
1042         }
1043
1044         /*<3> Rx related */
1045         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1046                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1047                 _rtl_pci_rx_interrupt(hw);
1048         }
1049
1050         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1051                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1052                          "rx descriptor unavailable!\n");
1053                 _rtl_pci_rx_interrupt(hw);
1054         }
1055
1056         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1057                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1058                 _rtl_pci_rx_interrupt(hw);
1059         }
1060
1061         /*<4> fw related*/
1062         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1063                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1064                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1065                                  "firmware interrupt!\n");
1066                         queue_delayed_work(rtlpriv->works.rtl_wq,
1067                                            &rtlpriv->works.fwevt_wq, 0);
1068                 }
1069         }
1070
1071         /*<5> hsisr related*/
1072         /* Only 8188EE & 8723BE Supported.
1073          * If Other ICs Come in, System will corrupt,
1074          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1075          * are not initialized
1076          */
1077         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1078             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1079                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1080                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1081                                  "hsisr interrupt!\n");
1082                         _rtl_pci_hs_interrupt(hw);
1083                 }
1084         }
1085
1086         if (rtlpriv->rtlhal.earlymode_enable)
1087                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1088
1089 done:
1090         rtlpriv->cfg->ops->enable_interrupt(hw);
1091         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1092         return ret;
1093 }
1094
1095 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1096 {
1097         _rtl_pci_tx_chk_waitq(hw);
1098 }
1099
1100 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1101 {
1102         struct rtl_priv *rtlpriv = rtl_priv(hw);
1103         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1104         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1105         struct rtl8192_tx_ring *ring = NULL;
1106         struct ieee80211_hdr *hdr = NULL;
1107         struct ieee80211_tx_info *info = NULL;
1108         struct sk_buff *pskb = NULL;
1109         struct rtl_tx_desc *pdesc = NULL;
1110         struct rtl_tcb_desc tcb_desc;
1111         /*This is for new trx flow*/
1112         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1113         u8 temp_one = 1;
1114         u8 *entry;
1115
1116         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1117         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1118         pskb = __skb_dequeue(&ring->queue);
1119         if (rtlpriv->use_new_trx_flow)
1120                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1121         else
1122                 entry = (u8 *)(&ring->desc[ring->idx]);
1123         if (pskb) {
1124                 pci_unmap_single(rtlpci->pdev,
1125                                  rtlpriv->cfg->ops->get_desc(
1126                                  hw, (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1127                                  pskb->len, PCI_DMA_TODEVICE);
1128                 kfree_skb(pskb);
1129         }
1130
1131         /*NB: the beacon data buffer must be 32-bit aligned. */
1132         pskb = ieee80211_beacon_get(hw, mac->vif);
1133         if (!pskb)
1134                 return;
1135         hdr = rtl_get_hdr(pskb);
1136         info = IEEE80211_SKB_CB(pskb);
1137         pdesc = &ring->desc[0];
1138         if (rtlpriv->use_new_trx_flow)
1139                 pbuffer_desc = &ring->buffer_desc[0];
1140
1141         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1142                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1143                                         BEACON_QUEUE, &tcb_desc);
1144
1145         __skb_queue_tail(&ring->queue, pskb);
1146
1147         if (rtlpriv->use_new_trx_flow) {
1148                 temp_one = 4;
1149                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1150                                             HW_DESC_OWN, (u8 *)&temp_one);
1151         } else {
1152                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1153                                             &temp_one);
1154         }
1155 }
1156
1157 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1158 {
1159         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1160         struct rtl_priv *rtlpriv = rtl_priv(hw);
1161         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1162         u8 i;
1163         u16 desc_num;
1164
1165         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1166                 desc_num = TX_DESC_NUM_92E;
1167         else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE)
1168                 desc_num = TX_DESC_NUM_8822B;
1169         else
1170                 desc_num = RT_TXDESC_NUM;
1171
1172         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1173                 rtlpci->txringcount[i] = desc_num;
1174
1175         /*
1176          *we just alloc 2 desc for beacon queue,
1177          *because we just need first desc in hw beacon.
1178          */
1179         rtlpci->txringcount[BEACON_QUEUE] = 2;
1180
1181         /*BE queue need more descriptor for performance
1182          *consideration or, No more tx desc will happen,
1183          *and may cause mac80211 mem leakage.
1184          */
1185         if (!rtl_priv(hw)->use_new_trx_flow)
1186                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1187
1188         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1189         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1190 }
1191
1192 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1193                                  struct pci_dev *pdev)
1194 {
1195         struct rtl_priv *rtlpriv = rtl_priv(hw);
1196         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1197         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1198         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1199
1200         rtlpci->up_first_time = true;
1201         rtlpci->being_init_adapter = false;
1202
1203         rtlhal->hw = hw;
1204         rtlpci->pdev = pdev;
1205
1206         /*Tx/Rx related var */
1207         _rtl_pci_init_trx_var(hw);
1208
1209         /*IBSS*/
1210         mac->beacon_interval = 100;
1211
1212         /*AMPDU*/
1213         mac->min_space_cfg = 0;
1214         mac->max_mss_density = 0;
1215         /*set sane AMPDU defaults */
1216         mac->current_ampdu_density = 7;
1217         mac->current_ampdu_factor = 3;
1218
1219         /*Retry Limit*/
1220         mac->retry_short = 7;
1221         mac->retry_long = 7;
1222
1223         /*QOS*/
1224         rtlpci->acm_method = EACMWAY2_SW;
1225
1226         /*task */
1227         tasklet_init(&rtlpriv->works.irq_tasklet,
1228                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1229                      (unsigned long)hw);
1230         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1231                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1232                      (unsigned long)hw);
1233         INIT_WORK(&rtlpriv->works.lps_change_work,
1234                   rtl_lps_change_work_callback);
1235 }
1236
1237 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1238                                  unsigned int prio, unsigned int entries)
1239 {
1240         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1241         struct rtl_priv *rtlpriv = rtl_priv(hw);
1242         struct rtl_tx_buffer_desc *buffer_desc;
1243         struct rtl_tx_desc *desc;
1244         dma_addr_t buffer_desc_dma, desc_dma;
1245         u32 nextdescaddress;
1246         int i;
1247
1248         /* alloc tx buffer desc for new trx flow*/
1249         if (rtlpriv->use_new_trx_flow) {
1250                 buffer_desc =
1251                    pci_zalloc_consistent(rtlpci->pdev,
1252                                          sizeof(*buffer_desc) * entries,
1253                                          &buffer_desc_dma);
1254
1255                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1256                         pr_err("Cannot allocate TX ring (prio = %d)\n",
1257                                prio);
1258                         return -ENOMEM;
1259                 }
1260
1261                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1262                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1263
1264                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1265                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1266         }
1267
1268         /* alloc dma for this ring */
1269         desc = pci_zalloc_consistent(rtlpci->pdev,
1270                                      sizeof(*desc) * entries, &desc_dma);
1271
1272         if (!desc || (unsigned long)desc & 0xFF) {
1273                 pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
1274                 return -ENOMEM;
1275         }
1276
1277         rtlpci->tx_ring[prio].desc = desc;
1278         rtlpci->tx_ring[prio].dma = desc_dma;
1279
1280         rtlpci->tx_ring[prio].idx = 0;
1281         rtlpci->tx_ring[prio].entries = entries;
1282         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1283
1284         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1285                  prio, desc);
1286
1287         /* init every desc in this ring */
1288         if (!rtlpriv->use_new_trx_flow) {
1289                 for (i = 0; i < entries; i++) {
1290                         nextdescaddress = (u32)desc_dma +
1291                                           ((i + 1) % entries) *
1292                                           sizeof(*desc);
1293
1294                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1295                                                     true,
1296                                                     HW_DESC_TX_NEXTDESC_ADDR,
1297                                                     (u8 *)&nextdescaddress);
1298                 }
1299         }
1300         return 0;
1301 }
1302
1303 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1304 {
1305         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1306         struct rtl_priv *rtlpriv = rtl_priv(hw);
1307         int i;
1308
1309         if (rtlpriv->use_new_trx_flow) {
1310                 struct rtl_rx_buffer_desc *entry = NULL;
1311                 /* alloc dma for this ring */
1312                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1313                     pci_zalloc_consistent(rtlpci->pdev,
1314                                           sizeof(*rtlpci->rx_ring[rxring_idx].buffer_desc) *
1315                                                  rtlpci->rxringcount,
1316                                           &rtlpci->rx_ring[rxring_idx].dma);
1317                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1318                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1319                         pr_err("Cannot allocate RX ring\n");
1320                         return -ENOMEM;
1321                 }
1322
1323                 /* init every desc in this ring */
1324                 rtlpci->rx_ring[rxring_idx].idx = 0;
1325                 for (i = 0; i < rtlpci->rxringcount; i++) {
1326                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1327                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1328                                                       rxring_idx, i))
1329                                 return -ENOMEM;
1330                 }
1331         } else {
1332                 struct rtl_rx_desc *entry = NULL;
1333                 u8 tmp_one = 1;
1334                 /* alloc dma for this ring */
1335                 rtlpci->rx_ring[rxring_idx].desc =
1336                     pci_zalloc_consistent(rtlpci->pdev,
1337                                           sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1338                                           rtlpci->rxringcount,
1339                                           &rtlpci->rx_ring[rxring_idx].dma);
1340                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1341                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1342                         pr_err("Cannot allocate RX ring\n");
1343                         return -ENOMEM;
1344                 }
1345
1346                 /* init every desc in this ring */
1347                 rtlpci->rx_ring[rxring_idx].idx = 0;
1348
1349                 for (i = 0; i < rtlpci->rxringcount; i++) {
1350                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1351                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1352                                                       rxring_idx, i))
1353                                 return -ENOMEM;
1354                 }
1355
1356                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1357                                             HW_DESC_RXERO, &tmp_one);
1358         }
1359         return 0;
1360 }
1361
1362 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1363                                   unsigned int prio)
1364 {
1365         struct rtl_priv *rtlpriv = rtl_priv(hw);
1366         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1367         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1368
1369         /* free every desc in this ring */
1370         while (skb_queue_len(&ring->queue)) {
1371                 u8 *entry;
1372                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1373
1374                 if (rtlpriv->use_new_trx_flow)
1375                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1376                 else
1377                         entry = (u8 *)(&ring->desc[ring->idx]);
1378
1379                 pci_unmap_single(rtlpci->pdev,
1380                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1381                                                    true,
1382                                                    HW_DESC_TXBUFF_ADDR),
1383                                  skb->len, PCI_DMA_TODEVICE);
1384                 kfree_skb(skb);
1385                 ring->idx = (ring->idx + 1) % ring->entries;
1386         }
1387
1388         /* free dma of this ring */
1389         pci_free_consistent(rtlpci->pdev,
1390                             sizeof(*ring->desc) * ring->entries,
1391                             ring->desc, ring->dma);
1392         ring->desc = NULL;
1393         if (rtlpriv->use_new_trx_flow) {
1394                 pci_free_consistent(rtlpci->pdev,
1395                                     sizeof(*ring->buffer_desc) * ring->entries,
1396                                     ring->buffer_desc, ring->buffer_desc_dma);
1397                 ring->buffer_desc = NULL;
1398         }
1399 }
1400
1401 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1402 {
1403         struct rtl_priv *rtlpriv = rtl_priv(hw);
1404         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1405         int i;
1406
1407         /* free every desc in this ring */
1408         for (i = 0; i < rtlpci->rxringcount; i++) {
1409                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1410
1411                 if (!skb)
1412                         continue;
1413                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1414                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1415                 kfree_skb(skb);
1416         }
1417
1418         /* free dma of this ring */
1419         if (rtlpriv->use_new_trx_flow) {
1420                 pci_free_consistent(rtlpci->pdev,
1421                                     sizeof(*rtlpci->rx_ring[rxring_idx].buffer_desc) *
1422                                     rtlpci->rxringcount,
1423                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1424                                     rtlpci->rx_ring[rxring_idx].dma);
1425                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1426         } else {
1427                 pci_free_consistent(rtlpci->pdev,
1428                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1429                                     rtlpci->rxringcount,
1430                                     rtlpci->rx_ring[rxring_idx].desc,
1431                                     rtlpci->rx_ring[rxring_idx].dma);
1432                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1433         }
1434 }
1435
1436 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1437 {
1438         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1439         int ret;
1440         int i, rxring_idx;
1441
1442         /* rxring_idx 0:RX_MPDU_QUEUE
1443          * rxring_idx 1:RX_CMD_QUEUE
1444          */
1445         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1446                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1447                 if (ret)
1448                         return ret;
1449         }
1450
1451         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1452                 ret = _rtl_pci_init_tx_ring(hw, i, rtlpci->txringcount[i]);
1453                 if (ret)
1454                         goto err_free_rings;
1455         }
1456
1457         return 0;
1458
1459 err_free_rings:
1460         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1461                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1462
1463         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1464                 if (rtlpci->tx_ring[i].desc ||
1465                     rtlpci->tx_ring[i].buffer_desc)
1466                         _rtl_pci_free_tx_ring(hw, i);
1467
1468         return 1;
1469 }
1470
1471 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1472 {
1473         u32 i, rxring_idx;
1474
1475         /*free rx rings */
1476         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1477                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1478
1479         /*free tx rings */
1480         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1481                 _rtl_pci_free_tx_ring(hw, i);
1482
1483         return 0;
1484 }
1485
1486 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1487 {
1488         struct rtl_priv *rtlpriv = rtl_priv(hw);
1489         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1490         int i, rxring_idx;
1491         unsigned long flags;
1492         u8 tmp_one = 1;
1493         u32 bufferaddress;
1494         /* rxring_idx 0:RX_MPDU_QUEUE */
1495         /* rxring_idx 1:RX_CMD_QUEUE */
1496         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1497                 /* force the rx_ring[RX_MPDU_QUEUE/
1498                  * RX_CMD_QUEUE].idx to the first one
1499                  * new trx flow, do nothing
1500                  */
1501                 if (!rtlpriv->use_new_trx_flow &&
1502                     rtlpci->rx_ring[rxring_idx].desc) {
1503                         struct rtl_rx_desc *entry = NULL;
1504
1505                         rtlpci->rx_ring[rxring_idx].idx = 0;
1506                         for (i = 0; i < rtlpci->rxringcount; i++) {
1507                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1508                                 bufferaddress =
1509                                   rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1510                                   false, HW_DESC_RXBUFF_ADDR);
1511                                 memset((u8 *)entry, 0,
1512                                        sizeof(*rtlpci->rx_ring
1513                                        [rxring_idx].desc));/*clear one entry*/
1514                                 if (rtlpriv->use_new_trx_flow) {
1515                                         /* This is deadcode */
1516                                         rtlpriv->cfg->ops->set_desc(hw,
1517                                             (u8 *)entry, false,
1518                                             HW_DESC_RX_PREPARE,
1519                                             (u8 *)&bufferaddress);
1520                                 } else {
1521                                         rtlpriv->cfg->ops->set_desc(hw,
1522                                             (u8 *)entry, false,
1523                                             HW_DESC_RXBUFF_ADDR,
1524                                             (u8 *)&bufferaddress);
1525                                         rtlpriv->cfg->ops->set_desc(hw,
1526                                             (u8 *)entry, false,
1527                                             HW_DESC_RXPKT_LEN,
1528                                             (u8 *)&rtlpci->rxbuffersize);
1529                                         rtlpriv->cfg->ops->set_desc(hw,
1530                                             (u8 *)entry, false,
1531                                             HW_DESC_RXOWN,
1532                                             (u8 *)&tmp_one);
1533                                 }
1534                         }
1535                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1536                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1537                 }
1538                 rtlpci->rx_ring[rxring_idx].idx = 0;
1539         }
1540
1541         /*
1542          *after reset, release previous pending packet,
1543          *and force the  tx idx to the first one
1544          */
1545         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1546         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1547                 if (rtlpci->tx_ring[i].desc ||
1548                     rtlpci->tx_ring[i].buffer_desc) {
1549                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1550
1551                         while (skb_queue_len(&ring->queue)) {
1552                                 u8 *entry;
1553                                 struct sk_buff *skb =
1554                                         __skb_dequeue(&ring->queue);
1555                                 if (rtlpriv->use_new_trx_flow)
1556                                         entry = (u8 *)(&ring->buffer_desc
1557                                                                 [ring->idx]);
1558                                 else
1559                                         entry = (u8 *)(&ring->desc[ring->idx]);
1560
1561                                 pci_unmap_single(rtlpci->pdev,
1562                                      rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1563                                          true, HW_DESC_TXBUFF_ADDR),
1564                                          skb->len, PCI_DMA_TODEVICE);
1565                                 dev_kfree_skb_irq(skb);
1566                                 ring->idx = (ring->idx + 1) % ring->entries;
1567                         }
1568
1569                         if (rtlpriv->use_new_trx_flow) {
1570                                 rtlpci->tx_ring[i].cur_tx_rp = 0;
1571                                 rtlpci->tx_ring[i].cur_tx_wp = 0;
1572                         }
1573
1574                         ring->idx = 0;
1575                         ring->entries = rtlpci->txringcount[i];
1576                 }
1577         }
1578         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1579
1580         return 0;
1581 }
1582
1583 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1584                                         struct ieee80211_sta *sta,
1585                                         struct sk_buff *skb)
1586 {
1587         struct rtl_priv *rtlpriv = rtl_priv(hw);
1588         struct rtl_sta_info *sta_entry = NULL;
1589         u8 tid = rtl_get_tid(skb);
1590         __le16 fc = rtl_get_fc(skb);
1591
1592         if (!sta)
1593                 return false;
1594         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1595
1596         if (!rtlpriv->rtlhal.earlymode_enable)
1597                 return false;
1598         if (ieee80211_is_nullfunc(fc))
1599                 return false;
1600         if (ieee80211_is_qos_nullfunc(fc))
1601                 return false;
1602         if (ieee80211_is_pspoll(fc))
1603                 return false;
1604         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1605                 return false;
1606         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1607                 return false;
1608         if (tid > 7)
1609                 return false;
1610
1611         /* maybe every tid should be checked */
1612         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1613                 return false;
1614
1615         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1616         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1617         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1618
1619         return true;
1620 }
1621
1622 static int rtl_pci_tx(struct ieee80211_hw *hw,
1623                       struct ieee80211_sta *sta,
1624                       struct sk_buff *skb,
1625                       struct rtl_tcb_desc *ptcb_desc)
1626 {
1627         struct rtl_priv *rtlpriv = rtl_priv(hw);
1628         struct rtl_sta_info *sta_entry = NULL;
1629         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1630         struct rtl8192_tx_ring *ring;
1631         struct rtl_tx_desc *pdesc;
1632         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1633         u16 idx;
1634         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1635         unsigned long flags;
1636         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1637         __le16 fc = rtl_get_fc(skb);
1638         u8 *pda_addr = hdr->addr1;
1639         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1640         /*ssn */
1641         u8 tid = 0;
1642         u16 seq_number = 0;
1643         u8 own;
1644         u8 temp_one = 1;
1645
1646         if (ieee80211_is_mgmt(fc))
1647                 rtl_tx_mgmt_proc(hw, skb);
1648
1649         if (rtlpriv->psc.sw_ps_enabled) {
1650                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1651                     !ieee80211_has_pm(fc))
1652                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1653         }
1654
1655         rtl_action_proc(hw, skb, true);
1656
1657         if (is_multicast_ether_addr(pda_addr))
1658                 rtlpriv->stats.txbytesmulticast += skb->len;
1659         else if (is_broadcast_ether_addr(pda_addr))
1660                 rtlpriv->stats.txbytesbroadcast += skb->len;
1661         else
1662                 rtlpriv->stats.txbytesunicast += skb->len;
1663
1664         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1665         ring = &rtlpci->tx_ring[hw_queue];
1666         if (hw_queue != BEACON_QUEUE) {
1667                 if (rtlpriv->use_new_trx_flow)
1668                         idx = ring->cur_tx_wp;
1669                 else
1670                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1671                               ring->entries;
1672         } else {
1673                 idx = 0;
1674         }
1675
1676         pdesc = &ring->desc[idx];
1677         if (rtlpriv->use_new_trx_flow) {
1678                 ptx_bd_desc = &ring->buffer_desc[idx];
1679         } else {
1680                 own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
1681                                 true, HW_DESC_OWN);
1682
1683                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1684                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1685                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1686                                  hw_queue, ring->idx, idx,
1687                                  skb_queue_len(&ring->queue));
1688
1689                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1690                                                flags);
1691                         return skb->len;
1692                 }
1693         }
1694
1695         if (rtlpriv->cfg->ops->get_available_desc &&
1696             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1697                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1698                          "get_available_desc fail\n");
1699                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1700                 return skb->len;
1701         }
1702
1703         if (ieee80211_is_data_qos(fc)) {
1704                 tid = rtl_get_tid(skb);
1705                 if (sta) {
1706                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1707                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1708                                       IEEE80211_SCTL_SEQ) >> 4;
1709                         seq_number += 1;
1710
1711                         if (!ieee80211_has_morefrags(hdr->frame_control))
1712                                 sta_entry->tids[tid].seq_number = seq_number;
1713                 }
1714         }
1715
1716         if (ieee80211_is_data(fc))
1717                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1718
1719         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1720                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1721
1722         __skb_queue_tail(&ring->queue, skb);
1723
1724         if (rtlpriv->use_new_trx_flow) {
1725                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1726                                             HW_DESC_OWN, &hw_queue);
1727         } else {
1728                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1729                                             HW_DESC_OWN, &temp_one);
1730         }
1731
1732         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1733             hw_queue != BEACON_QUEUE) {
1734                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1735                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1736                          hw_queue, ring->idx, idx,
1737                          skb_queue_len(&ring->queue));
1738
1739                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1740         }
1741
1742         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1743
1744         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1745
1746         return 0;
1747 }
1748
1749 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1750 {
1751         struct rtl_priv *rtlpriv = rtl_priv(hw);
1752         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1753         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1754         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1755         u16 i = 0;
1756         int queue_id;
1757         struct rtl8192_tx_ring *ring;
1758
1759         if (mac->skip_scan)
1760                 return;
1761
1762         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1763                 u32 queue_len;
1764
1765                 if (((queues >> queue_id) & 0x1) == 0) {
1766                         queue_id--;
1767                         continue;
1768                 }
1769                 ring = &pcipriv->dev.tx_ring[queue_id];
1770                 queue_len = skb_queue_len(&ring->queue);
1771                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1772                     queue_id == TXCMD_QUEUE) {
1773                         queue_id--;
1774                         continue;
1775                 } else {
1776                         msleep(20);
1777                         i++;
1778                 }
1779
1780                 /* we just wait 1s for all queues */
1781                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1782                     is_hal_stop(rtlhal) || i >= 200)
1783                         return;
1784         }
1785 }
1786
1787 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1788 {
1789         struct rtl_priv *rtlpriv = rtl_priv(hw);
1790         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1791
1792         _rtl_pci_deinit_trx_ring(hw);
1793
1794         synchronize_irq(rtlpci->pdev->irq);
1795         tasklet_kill(&rtlpriv->works.irq_tasklet);
1796         cancel_work_sync(&rtlpriv->works.lps_change_work);
1797
1798         flush_workqueue(rtlpriv->works.rtl_wq);
1799         destroy_workqueue(rtlpriv->works.rtl_wq);
1800 }
1801
1802 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1803 {
1804         int err;
1805
1806         _rtl_pci_init_struct(hw, pdev);
1807
1808         err = _rtl_pci_init_trx_ring(hw);
1809         if (err) {
1810                 pr_err("tx ring initialization failed\n");
1811                 return err;
1812         }
1813
1814         return 0;
1815 }
1816
1817 static int rtl_pci_start(struct ieee80211_hw *hw)
1818 {
1819         struct rtl_priv *rtlpriv = rtl_priv(hw);
1820         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1821         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1822         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1823         struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
1824
1825         int err;
1826
1827         rtl_pci_reset_trx_ring(hw);
1828
1829         rtlpci->driver_is_goingto_unload = false;
1830         if (rtlpriv->cfg->ops->get_btc_status &&
1831             rtlpriv->cfg->ops->get_btc_status()) {
1832                 rtlpriv->btcoexist.btc_info.ap_num = 36;
1833                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1834                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1835         } else if (rtlpriv->btcoexist.btc_ops) {
1836                 rtlpriv->btcoexist.btc_ops->btc_init_variables_wifi_only(
1837                                                                 rtlpriv);
1838         }
1839
1840         err = rtlpriv->cfg->ops->hw_init(hw);
1841         if (err) {
1842                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1843                          "Failed to config hardware!\n");
1844                 return err;
1845         }
1846         rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
1847                         &rtlmac->retry_long);
1848
1849         rtlpriv->cfg->ops->enable_interrupt(hw);
1850         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1851
1852         rtl_init_rx_config(hw);
1853
1854         /*should be after adapter start and interrupt enable. */
1855         set_hal_start(rtlhal);
1856
1857         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1858
1859         rtlpci->up_first_time = false;
1860
1861         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%s OK\n", __func__);
1862         return 0;
1863 }
1864
1865 static void rtl_pci_stop(struct ieee80211_hw *hw)
1866 {
1867         struct rtl_priv *rtlpriv = rtl_priv(hw);
1868         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1869         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1870         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1871         unsigned long flags;
1872         u8 rf_timeout = 0;
1873
1874         if (rtlpriv->cfg->ops->get_btc_status())
1875                 rtlpriv->btcoexist.btc_ops->btc_halt_notify(rtlpriv);
1876
1877         if (rtlpriv->btcoexist.btc_ops)
1878                 rtlpriv->btcoexist.btc_ops->btc_deinit_variables(rtlpriv);
1879
1880         /*
1881          *should be before disable interrupt&adapter
1882          *and will do it immediately.
1883          */
1884         set_hal_stop(rtlhal);
1885
1886         rtlpci->driver_is_goingto_unload = true;
1887         rtlpriv->cfg->ops->disable_interrupt(hw);
1888         cancel_work_sync(&rtlpriv->works.lps_change_work);
1889
1890         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1891         while (ppsc->rfchange_inprogress) {
1892                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1893                 if (rf_timeout > 100) {
1894                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1895                         break;
1896                 }
1897                 mdelay(1);
1898                 rf_timeout++;
1899                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1900         }
1901         ppsc->rfchange_inprogress = true;
1902         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1903
1904         rtlpriv->cfg->ops->hw_disable(hw);
1905         /* some things are not needed if firmware not available */
1906         if (!rtlpriv->max_fw_size)
1907                 return;
1908         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1909
1910         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1911         ppsc->rfchange_inprogress = false;
1912         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1913
1914         rtl_pci_enable_aspm(hw);
1915 }
1916
1917 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1918                                   struct ieee80211_hw *hw)
1919 {
1920         struct rtl_priv *rtlpriv = rtl_priv(hw);
1921         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1922         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1923         struct pci_dev *bridge_pdev = pdev->bus->self;
1924         u16 venderid;
1925         u16 deviceid;
1926         u8 revisionid;
1927         u16 irqline;
1928         u8 tmp;
1929
1930         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1931         venderid = pdev->vendor;
1932         deviceid = pdev->device;
1933         pci_read_config_byte(pdev, 0x8, &revisionid);
1934         pci_read_config_word(pdev, 0x3C, &irqline);
1935
1936         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1937          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1938          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1939          * the correct driver is r8192e_pci, thus this routine should
1940          * return false.
1941          */
1942         if (deviceid == RTL_PCI_8192SE_DID &&
1943             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1944                 return false;
1945
1946         if (deviceid == RTL_PCI_8192_DID ||
1947             deviceid == RTL_PCI_0044_DID ||
1948             deviceid == RTL_PCI_0047_DID ||
1949             deviceid == RTL_PCI_8192SE_DID ||
1950             deviceid == RTL_PCI_8174_DID ||
1951             deviceid == RTL_PCI_8173_DID ||
1952             deviceid == RTL_PCI_8172_DID ||
1953             deviceid == RTL_PCI_8171_DID) {
1954                 switch (revisionid) {
1955                 case RTL_PCI_REVISION_ID_8192PCIE:
1956                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1957                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1958                                  venderid, deviceid);
1959                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1960                         return false;
1961                 case RTL_PCI_REVISION_ID_8192SE:
1962                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1963                                  "8192SE is found - vid/did=%x/%x\n",
1964                                  venderid, deviceid);
1965                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1966                         break;
1967                 default:
1968                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1969                                  "Err: Unknown device - vid/did=%x/%x\n",
1970                                  venderid, deviceid);
1971                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1972                         break;
1973                 }
1974         } else if (deviceid == RTL_PCI_8723AE_DID) {
1975                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1976                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1977                          "8723AE PCI-E is found - vid/did=%x/%x\n",
1978                          venderid, deviceid);
1979         } else if (deviceid == RTL_PCI_8192CET_DID ||
1980                    deviceid == RTL_PCI_8192CE_DID ||
1981                    deviceid == RTL_PCI_8191CE_DID ||
1982                    deviceid == RTL_PCI_8188CE_DID) {
1983                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1984                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1985                          "8192C PCI-E is found - vid/did=%x/%x\n",
1986                          venderid, deviceid);
1987         } else if (deviceid == RTL_PCI_8192DE_DID ||
1988                    deviceid == RTL_PCI_8192DE_DID2) {
1989                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1990                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1991                          "8192D PCI-E is found - vid/did=%x/%x\n",
1992                          venderid, deviceid);
1993         } else if (deviceid == RTL_PCI_8188EE_DID) {
1994                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1995                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1996                          "Find adapter, Hardware type is 8188EE\n");
1997         } else if (deviceid == RTL_PCI_8723BE_DID) {
1998                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1999                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2000                          "Find adapter, Hardware type is 8723BE\n");
2001         } else if (deviceid == RTL_PCI_8192EE_DID) {
2002                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
2003                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2004                          "Find adapter, Hardware type is 8192EE\n");
2005         } else if (deviceid == RTL_PCI_8821AE_DID) {
2006                 rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2007                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2008                          "Find adapter, Hardware type is 8821AE\n");
2009         } else if (deviceid == RTL_PCI_8812AE_DID) {
2010                 rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2011                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2012                          "Find adapter, Hardware type is 8812AE\n");
2013         } else if (deviceid == RTL_PCI_8822BE_DID) {
2014                 rtlhal->hw_type = HARDWARE_TYPE_RTL8822BE;
2015                 rtlhal->bandset = BAND_ON_BOTH;
2016                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2017                          "Find adapter, Hardware type is 8822BE\n");
2018         } else {
2019                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2020                          "Err: Unknown device - vid/did=%x/%x\n",
2021                          venderid, deviceid);
2022
2023                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2024         }
2025
2026         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2027                 if (revisionid == 0 || revisionid == 1) {
2028                         if (revisionid == 0) {
2029                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2030                                          "Find 92DE MAC0\n");
2031                                 rtlhal->interfaceindex = 0;
2032                         } else if (revisionid == 1) {
2033                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2034                                          "Find 92DE MAC1\n");
2035                                 rtlhal->interfaceindex = 1;
2036                         }
2037                 } else {
2038                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2039                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2040                                  venderid, deviceid, revisionid);
2041                         rtlhal->interfaceindex = 0;
2042                 }
2043         }
2044
2045         switch (rtlhal->hw_type) {
2046         case HARDWARE_TYPE_RTL8192EE:
2047         case HARDWARE_TYPE_RTL8822BE:
2048                 /* use new trx flow */
2049                 rtlpriv->use_new_trx_flow = true;
2050                 break;
2051
2052         default:
2053                 rtlpriv->use_new_trx_flow = false;
2054                 break;
2055         }
2056
2057         /*find bus info */
2058         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2059         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2060         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2061
2062         /*find bridge info */
2063         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2064         /* some ARM have no bridge_pdev and will crash here
2065          * so we should check if bridge_pdev is NULL
2066          */
2067         if (bridge_pdev) {
2068                 /*find bridge info if available */
2069                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2070                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2071                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2072                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2073                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2074                                          "Pci Bridge Vendor is found index: %d\n",
2075                                          tmp);
2076                                 break;
2077                         }
2078                 }
2079         }
2080
2081         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2082                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2083                 pcipriv->ndis_adapter.pcibridge_busnum =
2084                     bridge_pdev->bus->number;
2085                 pcipriv->ndis_adapter.pcibridge_devnum =
2086                     PCI_SLOT(bridge_pdev->devfn);
2087                 pcipriv->ndis_adapter.pcibridge_funcnum =
2088                     PCI_FUNC(bridge_pdev->devfn);
2089                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2090                     pci_pcie_cap(bridge_pdev);
2091                 pcipriv->ndis_adapter.num4bytes =
2092                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2093
2094                 rtl_pci_get_linkcontrol_field(hw);
2095
2096                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2097                     PCI_BRIDGE_VENDOR_AMD) {
2098                         pcipriv->ndis_adapter.amd_l1_patch =
2099                             rtl_pci_get_amd_l1_patch(hw);
2100                 }
2101         }
2102
2103         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2104                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2105                  pcipriv->ndis_adapter.busnumber,
2106                  pcipriv->ndis_adapter.devnumber,
2107                  pcipriv->ndis_adapter.funcnumber,
2108                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2109
2110         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2111                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2112                  pcipriv->ndis_adapter.pcibridge_busnum,
2113                  pcipriv->ndis_adapter.pcibridge_devnum,
2114                  pcipriv->ndis_adapter.pcibridge_funcnum,
2115                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2116                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2117                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2118                  pcipriv->ndis_adapter.amd_l1_patch);
2119
2120         rtl_pci_parse_configuration(pdev, hw);
2121         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2122
2123         return true;
2124 }
2125
2126 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2127 {
2128         struct rtl_priv *rtlpriv = rtl_priv(hw);
2129         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2130         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2131         int ret;
2132
2133         ret = pci_enable_msi(rtlpci->pdev);
2134         if (ret < 0)
2135                 return ret;
2136
2137         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2138                           IRQF_SHARED, KBUILD_MODNAME, hw);
2139         if (ret < 0) {
2140                 pci_disable_msi(rtlpci->pdev);
2141                 return ret;
2142         }
2143
2144         rtlpci->using_msi = true;
2145
2146         RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2147                  "MSI Interrupt Mode!\n");
2148         return 0;
2149 }
2150
2151 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2152 {
2153         struct rtl_priv *rtlpriv = rtl_priv(hw);
2154         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2155         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2156         int ret;
2157
2158         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2159                           IRQF_SHARED, KBUILD_MODNAME, hw);
2160         if (ret < 0)
2161                 return ret;
2162
2163         rtlpci->using_msi = false;
2164         RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2165                  "Pin-based Interrupt Mode!\n");
2166         return 0;
2167 }
2168
2169 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2170 {
2171         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2172         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2173         int ret;
2174
2175         if (rtlpci->msi_support) {
2176                 ret = rtl_pci_intr_mode_msi(hw);
2177                 if (ret < 0)
2178                         ret = rtl_pci_intr_mode_legacy(hw);
2179         } else {
2180                 ret = rtl_pci_intr_mode_legacy(hw);
2181         }
2182         return ret;
2183 }
2184
2185 static void platform_enable_dma64(struct pci_dev *pdev, bool dma64)
2186 {
2187         u8      value;
2188
2189         pci_read_config_byte(pdev, 0x719, &value);
2190
2191         /* 0x719 Bit5 is DMA64 bit fetch. */
2192         if (dma64)
2193                 value |= BIT(5);
2194         else
2195                 value &= ~BIT(5);
2196
2197         pci_write_config_byte(pdev, 0x719, value);
2198 }
2199
2200 int rtl_pci_probe(struct pci_dev *pdev,
2201                   const struct pci_device_id *id)
2202 {
2203         struct ieee80211_hw *hw = NULL;
2204
2205         struct rtl_priv *rtlpriv = NULL;
2206         struct rtl_pci_priv *pcipriv = NULL;
2207         struct rtl_pci *rtlpci;
2208         unsigned long pmem_start, pmem_len, pmem_flags;
2209         int err;
2210
2211         err = rtl_core_module_init();
2212         if (err)
2213                 return err;
2214         err = pci_enable_device(pdev);
2215         if (err) {
2216                 WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
2217                           pci_name(pdev));
2218                 return err;
2219         }
2220
2221         if (((struct rtl_hal_cfg *)(id->driver_data))->mod_params->dma64 &&
2222             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
2223                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
2224                         WARN_ONCE(true,
2225                                   "Unable to obtain 64bit DMA for consistent allocations\n");
2226                         err = -ENOMEM;
2227                         goto fail1;
2228                 }
2229
2230                 platform_enable_dma64(pdev, true);
2231         } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2232                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2233                         WARN_ONCE(true,
2234                                   "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
2235                         err = -ENOMEM;
2236                         goto fail1;
2237                 }
2238
2239                 platform_enable_dma64(pdev, false);
2240         }
2241
2242         pci_set_master(pdev);
2243
2244         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2245                                 sizeof(struct rtl_priv), &rtl_ops);
2246         if (!hw) {
2247                 WARN_ONCE(true,
2248                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2249                 err = -ENOMEM;
2250                 goto fail1;
2251         }
2252
2253         SET_IEEE80211_DEV(hw, &pdev->dev);
2254         pci_set_drvdata(pdev, hw);
2255
2256         rtlpriv = hw->priv;
2257         rtlpriv->hw = hw;
2258         pcipriv = (void *)rtlpriv->priv;
2259         pcipriv->dev.pdev = pdev;
2260         init_completion(&rtlpriv->firmware_loading_complete);
2261         /*proximity init here*/
2262         rtlpriv->proximity.proxim_on = false;
2263
2264         pcipriv = (void *)rtlpriv->priv;
2265         pcipriv->dev.pdev = pdev;
2266
2267         /* init cfg & intf_ops */
2268         rtlpriv->rtlhal.interface = INTF_PCI;
2269         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2270         rtlpriv->intf_ops = &rtl_pci_ops;
2271         rtlpriv->glb_var = &rtl_global_var;
2272
2273         /* MEM map */
2274         err = pci_request_regions(pdev, KBUILD_MODNAME);
2275         if (err) {
2276                 WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
2277                 goto fail1;
2278         }
2279
2280         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2281         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2282         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2283
2284         /*shared mem start */
2285         rtlpriv->io.pci_mem_start =
2286                         (unsigned long)pci_iomap(pdev,
2287                         rtlpriv->cfg->bar_id, pmem_len);
2288         if (rtlpriv->io.pci_mem_start == 0) {
2289                 WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
2290                 err = -ENOMEM;
2291                 goto fail2;
2292         }
2293
2294         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2295                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2296                  pmem_start, pmem_len, pmem_flags,
2297                  rtlpriv->io.pci_mem_start);
2298
2299         /* Disable Clk Request */
2300         pci_write_config_byte(pdev, 0x81, 0);
2301         /* leave D3 mode */
2302         pci_write_config_byte(pdev, 0x44, 0);
2303         pci_write_config_byte(pdev, 0x04, 0x06);
2304         pci_write_config_byte(pdev, 0x04, 0x07);
2305
2306         /* find adapter */
2307         if (!_rtl_pci_find_adapter(pdev, hw)) {
2308                 err = -ENODEV;
2309                 goto fail2;
2310         }
2311
2312         /* Init IO handler */
2313         _rtl_pci_io_handler_init(&pdev->dev, hw);
2314
2315         /*like read eeprom and so on */
2316         rtlpriv->cfg->ops->read_eeprom_info(hw);
2317
2318         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2319                 pr_err("Can't init_sw_vars\n");
2320                 err = -ENODEV;
2321                 goto fail3;
2322         }
2323         rtlpriv->cfg->ops->init_sw_leds(hw);
2324
2325         /*aspm */
2326         rtl_pci_init_aspm(hw);
2327
2328         /* Init mac80211 sw */
2329         err = rtl_init_core(hw);
2330         if (err) {
2331                 pr_err("Can't allocate sw for mac80211\n");
2332                 goto fail3;
2333         }
2334
2335         /* Init PCI sw */
2336         err = rtl_pci_init(hw, pdev);
2337         if (err) {
2338                 pr_err("Failed to init PCI\n");
2339                 goto fail3;
2340         }
2341
2342         err = ieee80211_register_hw(hw);
2343         if (err) {
2344                 pr_err("Can't register mac80211 hw.\n");
2345                 err = -ENODEV;
2346                 goto fail3;
2347         }
2348         rtlpriv->mac80211.mac80211_registered = 1;
2349
2350         /* add for debug */
2351         rtl_debug_add_one(hw);
2352
2353         /*init rfkill */
2354         rtl_init_rfkill(hw);    /* Init PCI sw */
2355
2356         rtlpci = rtl_pcidev(pcipriv);
2357         err = rtl_pci_intr_mode_decide(hw);
2358         if (err) {
2359                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2360                          "%s: failed to register IRQ handler\n",
2361                          wiphy_name(hw->wiphy));
2362                 goto fail3;
2363         }
2364         rtlpci->irq_alloc = 1;
2365
2366         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2367         return 0;
2368
2369 fail3:
2370         pci_set_drvdata(pdev, NULL);
2371         rtl_deinit_core(hw);
2372
2373 fail2:
2374         if (rtlpriv->io.pci_mem_start != 0)
2375                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2376
2377         pci_release_regions(pdev);
2378         complete(&rtlpriv->firmware_loading_complete);
2379
2380 fail1:
2381         if (hw)
2382                 ieee80211_free_hw(hw);
2383         pci_disable_device(pdev);
2384
2385         return err;
2386 }
2387
2388 void rtl_pci_disconnect(struct pci_dev *pdev)
2389 {
2390         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2391         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2392         struct rtl_priv *rtlpriv = rtl_priv(hw);
2393         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2394         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2395
2396         /* just in case driver is removed before firmware callback */
2397         wait_for_completion(&rtlpriv->firmware_loading_complete);
2398         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2399
2400         /* remove form debug */
2401         rtl_debug_remove_one(hw);
2402
2403         /*ieee80211_unregister_hw will call ops_stop */
2404         if (rtlmac->mac80211_registered == 1) {
2405                 ieee80211_unregister_hw(hw);
2406                 rtlmac->mac80211_registered = 0;
2407         } else {
2408                 rtl_deinit_deferred_work(hw);
2409                 rtlpriv->intf_ops->adapter_stop(hw);
2410         }
2411         rtlpriv->cfg->ops->disable_interrupt(hw);
2412
2413         /*deinit rfkill */
2414         rtl_deinit_rfkill(hw);
2415
2416         rtl_pci_deinit(hw);
2417         rtl_deinit_core(hw);
2418         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2419
2420         if (rtlpci->irq_alloc) {
2421                 free_irq(rtlpci->pdev->irq, hw);
2422                 rtlpci->irq_alloc = 0;
2423         }
2424
2425         if (rtlpci->using_msi)
2426                 pci_disable_msi(rtlpci->pdev);
2427
2428         list_del(&rtlpriv->list);
2429         if (rtlpriv->io.pci_mem_start != 0) {
2430                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2431                 pci_release_regions(pdev);
2432         }
2433
2434         pci_disable_device(pdev);
2435
2436         rtl_pci_disable_aspm(hw);
2437
2438         pci_set_drvdata(pdev, NULL);
2439
2440         ieee80211_free_hw(hw);
2441         rtl_core_module_exit();
2442 }
2443
2444 #ifdef CONFIG_PM_SLEEP
2445 /***************************************
2446  * kernel pci power state define:
2447  * PCI_D0         ((pci_power_t __force) 0)
2448  * PCI_D1         ((pci_power_t __force) 1)
2449  * PCI_D2         ((pci_power_t __force) 2)
2450  * PCI_D3hot      ((pci_power_t __force) 3)
2451  * PCI_D3cold     ((pci_power_t __force) 4)
2452  * PCI_UNKNOWN    ((pci_power_t __force) 5)
2453
2454  * This function is called when system
2455  * goes into suspend state mac80211 will
2456  * call rtl_mac_stop() from the mac80211
2457  * suspend function first, So there is
2458  * no need to call hw_disable here.
2459  ****************************************/
2460 int rtl_pci_suspend(struct device *dev)
2461 {
2462         struct pci_dev *pdev = to_pci_dev(dev);
2463         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2464         struct rtl_priv *rtlpriv = rtl_priv(hw);
2465
2466         rtlpriv->cfg->ops->hw_suspend(hw);
2467         rtl_deinit_rfkill(hw);
2468
2469         return 0;
2470 }
2471
2472 int rtl_pci_resume(struct device *dev)
2473 {
2474         struct pci_dev *pdev = to_pci_dev(dev);
2475         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2476         struct rtl_priv *rtlpriv = rtl_priv(hw);
2477
2478         rtlpriv->cfg->ops->hw_resume(hw);
2479         rtl_init_rfkill(hw);
2480         return 0;
2481 }
2482 #endif /* CONFIG_PM_SLEEP */
2483
2484 const struct rtl_intf_ops rtl_pci_ops = {
2485         .read_efuse_byte = read_efuse_byte,
2486         .adapter_start = rtl_pci_start,
2487         .adapter_stop = rtl_pci_stop,
2488         .check_buddy_priv = rtl_pci_check_buddy_priv,
2489         .adapter_tx = rtl_pci_tx,
2490         .flush = rtl_pci_flush,
2491         .reset_trx_ring = rtl_pci_reset_trx_ring,
2492         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2493
2494         .disable_aspm = rtl_pci_disable_aspm,
2495         .enable_aspm = rtl_pci_enable_aspm,
2496 };