1 /******************************************************************************
3 * Copyright(c) 2016 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
25 #ifndef __INC_HALMAC_BIT_8822B_H
26 #define __INC_HALMAC_BIT_8822B_H
28 #define CPU_OPT_WIDTH 0x1F
30 /* 2 REG_NOT_VALID_8822B */
32 /* 2 REG_SYS_ISO_CTRL_8822B */
33 #define BIT_PWC_EV12V_8822B BIT(15)
34 #define BIT_PWC_EV25V_8822B BIT(14)
35 #define BIT_PA33V_EN_8822B BIT(13)
36 #define BIT_PA12V_EN_8822B BIT(12)
37 #define BIT_UA33V_EN_8822B BIT(11)
38 #define BIT_UA12V_EN_8822B BIT(10)
39 #define BIT_ISO_RFDIO_8822B BIT(9)
40 #define BIT_ISO_EB2CORE_8822B BIT(8)
41 #define BIT_ISO_DIOE_8822B BIT(7)
42 #define BIT_ISO_WLPON2PP_8822B BIT(6)
43 #define BIT_ISO_IP2MAC_WA2PP_8822B BIT(5)
44 #define BIT_ISO_PD2CORE_8822B BIT(4)
45 #define BIT_ISO_PA2PCIE_8822B BIT(3)
46 #define BIT_ISO_UD2CORE_8822B BIT(2)
47 #define BIT_ISO_UA2USB_8822B BIT(1)
48 #define BIT_ISO_WD2PP_8822B BIT(0)
50 /* 2 REG_SYS_FUNC_EN_8822B */
51 #define BIT_FEN_MREGEN_8822B BIT(15)
52 #define BIT_FEN_HWPDN_8822B BIT(14)
53 #define BIT_EN_25_1_8822B BIT(13)
54 #define BIT_FEN_ELDR_8822B BIT(12)
55 #define BIT_FEN_DCORE_8822B BIT(11)
56 #define BIT_FEN_CPUEN_8822B BIT(10)
57 #define BIT_FEN_DIOE_8822B BIT(9)
58 #define BIT_FEN_PCIED_8822B BIT(8)
59 #define BIT_FEN_PPLL_8822B BIT(7)
60 #define BIT_FEN_PCIEA_8822B BIT(6)
61 #define BIT_FEN_DIO_PCIE_8822B BIT(5)
62 #define BIT_FEN_USBD_8822B BIT(4)
63 #define BIT_FEN_UPLL_8822B BIT(3)
64 #define BIT_FEN_USBA_8822B BIT(2)
65 #define BIT_FEN_BB_GLB_RSTN_8822B BIT(1)
66 #define BIT_FEN_BBRSTB_8822B BIT(0)
68 /* 2 REG_SYS_PW_CTRL_8822B */
69 #define BIT_SOP_EABM_8822B BIT(31)
70 #define BIT_SOP_ACKF_8822B BIT(30)
71 #define BIT_SOP_ERCK_8822B BIT(29)
72 #define BIT_SOP_ESWR_8822B BIT(28)
73 #define BIT_SOP_PWMM_8822B BIT(27)
74 #define BIT_SOP_EECK_8822B BIT(26)
75 #define BIT_SOP_EXTL_8822B BIT(24)
76 #define BIT_SYM_OP_RING_12M_8822B BIT(22)
77 #define BIT_ROP_SWPR_8822B BIT(21)
78 #define BIT_DIS_HW_LPLDM_8822B BIT(20)
79 #define BIT_OPT_SWRST_WLMCU_8822B BIT(19)
80 #define BIT_RDY_SYSPWR_8822B BIT(17)
81 #define BIT_EN_WLON_8822B BIT(16)
82 #define BIT_APDM_HPDN_8822B BIT(15)
83 #define BIT_AFSM_PCIE_SUS_EN_8822B BIT(12)
84 #define BIT_AFSM_WLSUS_EN_8822B BIT(11)
85 #define BIT_APFM_SWLPS_8822B BIT(10)
86 #define BIT_APFM_OFFMAC_8822B BIT(9)
87 #define BIT_APFN_ONMAC_8822B BIT(8)
88 #define BIT_CHIP_PDN_EN_8822B BIT(7)
89 #define BIT_RDY_MACDIS_8822B BIT(6)
90 #define BIT_RING_CLK_12M_EN_8822B BIT(4)
91 #define BIT_PFM_WOWL_8822B BIT(3)
92 #define BIT_PFM_LDKP_8822B BIT(2)
93 #define BIT_WL_HCI_ALD_8822B BIT(1)
94 #define BIT_PFM_LDALL_8822B BIT(0)
96 /* 2 REG_SYS_CLK_CTRL_8822B */
97 #define BIT_LDO_DUMMY_8822B BIT(15)
98 #define BIT_CPU_CLK_EN_8822B BIT(14)
99 #define BIT_SYMREG_CLK_EN_8822B BIT(13)
100 #define BIT_HCI_CLK_EN_8822B BIT(12)
101 #define BIT_MAC_CLK_EN_8822B BIT(11)
102 #define BIT_SEC_CLK_EN_8822B BIT(10)
103 #define BIT_PHY_SSC_RSTB_8822B BIT(9)
104 #define BIT_EXT_32K_EN_8822B BIT(8)
105 #define BIT_WL_CLK_TEST_8822B BIT(7)
106 #define BIT_OP_SPS_PWM_EN_8822B BIT(6)
107 #define BIT_LOADER_CLK_EN_8822B BIT(5)
108 #define BIT_MACSLP_8822B BIT(4)
109 #define BIT_WAKEPAD_EN_8822B BIT(3)
110 #define BIT_ROMD16V_EN_8822B BIT(2)
111 #define BIT_CKANA12M_EN_8822B BIT(1)
112 #define BIT_CNTD16V_EN_8822B BIT(0)
114 /* 2 REG_SYS_EEPROM_CTRL_8822B */
116 #define BIT_SHIFT_VPDIDX_8822B 8
117 #define BIT_MASK_VPDIDX_8822B 0xff
118 #define BIT_VPDIDX_8822B(x) \
119 (((x) & BIT_MASK_VPDIDX_8822B) << BIT_SHIFT_VPDIDX_8822B)
120 #define BIT_GET_VPDIDX_8822B(x) \
121 (((x) >> BIT_SHIFT_VPDIDX_8822B) & BIT_MASK_VPDIDX_8822B)
123 #define BIT_SHIFT_EEM1_0_8822B 6
124 #define BIT_MASK_EEM1_0_8822B 0x3
125 #define BIT_EEM1_0_8822B(x) \
126 (((x) & BIT_MASK_EEM1_0_8822B) << BIT_SHIFT_EEM1_0_8822B)
127 #define BIT_GET_EEM1_0_8822B(x) \
128 (((x) >> BIT_SHIFT_EEM1_0_8822B) & BIT_MASK_EEM1_0_8822B)
130 #define BIT_AUTOLOAD_SUS_8822B BIT(5)
131 #define BIT_EERPOMSEL_8822B BIT(4)
132 #define BIT_EECS_V1_8822B BIT(3)
133 #define BIT_EESK_V1_8822B BIT(2)
134 #define BIT_EEDI_V1_8822B BIT(1)
135 #define BIT_EEDO_V1_8822B BIT(0)
137 /* 2 REG_EE_VPD_8822B */
139 #define BIT_SHIFT_VPD_DATA_8822B 0
140 #define BIT_MASK_VPD_DATA_8822B 0xffffffffL
141 #define BIT_VPD_DATA_8822B(x) \
142 (((x) & BIT_MASK_VPD_DATA_8822B) << BIT_SHIFT_VPD_DATA_8822B)
143 #define BIT_GET_VPD_DATA_8822B(x) \
144 (((x) >> BIT_SHIFT_VPD_DATA_8822B) & BIT_MASK_VPD_DATA_8822B)
146 /* 2 REG_SYS_SWR_CTRL1_8822B */
147 #define BIT_C2_L_BIT0_8822B BIT(31)
149 #define BIT_SHIFT_C1_L_8822B 29
150 #define BIT_MASK_C1_L_8822B 0x3
151 #define BIT_C1_L_8822B(x) (((x) & BIT_MASK_C1_L_8822B) << BIT_SHIFT_C1_L_8822B)
152 #define BIT_GET_C1_L_8822B(x) \
153 (((x) >> BIT_SHIFT_C1_L_8822B) & BIT_MASK_C1_L_8822B)
155 #define BIT_SHIFT_REG_FREQ_L_8822B 25
156 #define BIT_MASK_REG_FREQ_L_8822B 0x7
157 #define BIT_REG_FREQ_L_8822B(x) \
158 (((x) & BIT_MASK_REG_FREQ_L_8822B) << BIT_SHIFT_REG_FREQ_L_8822B)
159 #define BIT_GET_REG_FREQ_L_8822B(x) \
160 (((x) >> BIT_SHIFT_REG_FREQ_L_8822B) & BIT_MASK_REG_FREQ_L_8822B)
162 #define BIT_REG_EN_DUTY_8822B BIT(24)
164 #define BIT_SHIFT_REG_MODE_8822B 22
165 #define BIT_MASK_REG_MODE_8822B 0x3
166 #define BIT_REG_MODE_8822B(x) \
167 (((x) & BIT_MASK_REG_MODE_8822B) << BIT_SHIFT_REG_MODE_8822B)
168 #define BIT_GET_REG_MODE_8822B(x) \
169 (((x) >> BIT_SHIFT_REG_MODE_8822B) & BIT_MASK_REG_MODE_8822B)
171 #define BIT_REG_EN_SP_8822B BIT(21)
172 #define BIT_REG_AUTO_L_8822B BIT(20)
173 #define BIT_SW18_SELD_BIT0_8822B BIT(19)
174 #define BIT_SW18_POWOCP_8822B BIT(18)
176 #define BIT_SHIFT_OCP_L1_8822B 15
177 #define BIT_MASK_OCP_L1_8822B 0x7
178 #define BIT_OCP_L1_8822B(x) \
179 (((x) & BIT_MASK_OCP_L1_8822B) << BIT_SHIFT_OCP_L1_8822B)
180 #define BIT_GET_OCP_L1_8822B(x) \
181 (((x) >> BIT_SHIFT_OCP_L1_8822B) & BIT_MASK_OCP_L1_8822B)
183 #define BIT_SHIFT_CF_L_8822B 13
184 #define BIT_MASK_CF_L_8822B 0x3
185 #define BIT_CF_L_8822B(x) (((x) & BIT_MASK_CF_L_8822B) << BIT_SHIFT_CF_L_8822B)
186 #define BIT_GET_CF_L_8822B(x) \
187 (((x) >> BIT_SHIFT_CF_L_8822B) & BIT_MASK_CF_L_8822B)
189 #define BIT_SW18_FPWM_8822B BIT(11)
190 #define BIT_SW18_SWEN_8822B BIT(9)
191 #define BIT_SW18_LDEN_8822B BIT(8)
192 #define BIT_MAC_ID_EN_8822B BIT(7)
193 #define BIT_AFE_BGEN_8822B BIT(0)
195 /* 2 REG_SYS_SWR_CTRL2_8822B */
196 #define BIT_POW_ZCD_L_8822B BIT(31)
197 #define BIT_AUTOZCD_L_8822B BIT(30)
199 #define BIT_SHIFT_REG_DELAY_8822B 28
200 #define BIT_MASK_REG_DELAY_8822B 0x3
201 #define BIT_REG_DELAY_8822B(x) \
202 (((x) & BIT_MASK_REG_DELAY_8822B) << BIT_SHIFT_REG_DELAY_8822B)
203 #define BIT_GET_REG_DELAY_8822B(x) \
204 (((x) >> BIT_SHIFT_REG_DELAY_8822B) & BIT_MASK_REG_DELAY_8822B)
206 #define BIT_SHIFT_V15ADJ_L1_V1_8822B 24
207 #define BIT_MASK_V15ADJ_L1_V1_8822B 0x7
208 #define BIT_V15ADJ_L1_V1_8822B(x) \
209 (((x) & BIT_MASK_V15ADJ_L1_V1_8822B) << BIT_SHIFT_V15ADJ_L1_V1_8822B)
210 #define BIT_GET_V15ADJ_L1_V1_8822B(x) \
211 (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8822B) & BIT_MASK_V15ADJ_L1_V1_8822B)
213 #define BIT_SHIFT_VOL_L1_V1_8822B 20
214 #define BIT_MASK_VOL_L1_V1_8822B 0xf
215 #define BIT_VOL_L1_V1_8822B(x) \
216 (((x) & BIT_MASK_VOL_L1_V1_8822B) << BIT_SHIFT_VOL_L1_V1_8822B)
217 #define BIT_GET_VOL_L1_V1_8822B(x) \
218 (((x) >> BIT_SHIFT_VOL_L1_V1_8822B) & BIT_MASK_VOL_L1_V1_8822B)
220 #define BIT_SHIFT_IN_L1_V1_8822B 17
221 #define BIT_MASK_IN_L1_V1_8822B 0x7
222 #define BIT_IN_L1_V1_8822B(x) \
223 (((x) & BIT_MASK_IN_L1_V1_8822B) << BIT_SHIFT_IN_L1_V1_8822B)
224 #define BIT_GET_IN_L1_V1_8822B(x) \
225 (((x) >> BIT_SHIFT_IN_L1_V1_8822B) & BIT_MASK_IN_L1_V1_8822B)
227 #define BIT_SHIFT_TBOX_L1_8822B 15
228 #define BIT_MASK_TBOX_L1_8822B 0x3
229 #define BIT_TBOX_L1_8822B(x) \
230 (((x) & BIT_MASK_TBOX_L1_8822B) << BIT_SHIFT_TBOX_L1_8822B)
231 #define BIT_GET_TBOX_L1_8822B(x) \
232 (((x) >> BIT_SHIFT_TBOX_L1_8822B) & BIT_MASK_TBOX_L1_8822B)
234 #define BIT_SW18_SEL_8822B BIT(13)
236 /* 2 REG_NOT_VALID_8822B */
237 #define BIT_SW18_SD_8822B BIT(10)
239 #define BIT_SHIFT_R3_L_8822B 7
240 #define BIT_MASK_R3_L_8822B 0x3
241 #define BIT_R3_L_8822B(x) (((x) & BIT_MASK_R3_L_8822B) << BIT_SHIFT_R3_L_8822B)
242 #define BIT_GET_R3_L_8822B(x) \
243 (((x) >> BIT_SHIFT_R3_L_8822B) & BIT_MASK_R3_L_8822B)
245 #define BIT_SHIFT_SW18_R2_8822B 5
246 #define BIT_MASK_SW18_R2_8822B 0x3
247 #define BIT_SW18_R2_8822B(x) \
248 (((x) & BIT_MASK_SW18_R2_8822B) << BIT_SHIFT_SW18_R2_8822B)
249 #define BIT_GET_SW18_R2_8822B(x) \
250 (((x) >> BIT_SHIFT_SW18_R2_8822B) & BIT_MASK_SW18_R2_8822B)
252 #define BIT_SHIFT_SW18_R1_8822B 3
253 #define BIT_MASK_SW18_R1_8822B 0x3
254 #define BIT_SW18_R1_8822B(x) \
255 (((x) & BIT_MASK_SW18_R1_8822B) << BIT_SHIFT_SW18_R1_8822B)
256 #define BIT_GET_SW18_R1_8822B(x) \
257 (((x) >> BIT_SHIFT_SW18_R1_8822B) & BIT_MASK_SW18_R1_8822B)
259 #define BIT_SHIFT_C3_L_C3_8822B 1
260 #define BIT_MASK_C3_L_C3_8822B 0x3
261 #define BIT_C3_L_C3_8822B(x) \
262 (((x) & BIT_MASK_C3_L_C3_8822B) << BIT_SHIFT_C3_L_C3_8822B)
263 #define BIT_GET_C3_L_C3_8822B(x) \
264 (((x) >> BIT_SHIFT_C3_L_C3_8822B) & BIT_MASK_C3_L_C3_8822B)
266 #define BIT_C2_L_BIT1_8822B BIT(0)
268 /* 2 REG_SYS_SWR_CTRL3_8822B */
269 #define BIT_SPS18_OCP_DIS_8822B BIT(31)
271 #define BIT_SHIFT_SPS18_OCP_TH_8822B 16
272 #define BIT_MASK_SPS18_OCP_TH_8822B 0x7fff
273 #define BIT_SPS18_OCP_TH_8822B(x) \
274 (((x) & BIT_MASK_SPS18_OCP_TH_8822B) << BIT_SHIFT_SPS18_OCP_TH_8822B)
275 #define BIT_GET_SPS18_OCP_TH_8822B(x) \
276 (((x) >> BIT_SHIFT_SPS18_OCP_TH_8822B) & BIT_MASK_SPS18_OCP_TH_8822B)
278 #define BIT_SHIFT_OCP_WINDOW_8822B 0
279 #define BIT_MASK_OCP_WINDOW_8822B 0xffff
280 #define BIT_OCP_WINDOW_8822B(x) \
281 (((x) & BIT_MASK_OCP_WINDOW_8822B) << BIT_SHIFT_OCP_WINDOW_8822B)
282 #define BIT_GET_OCP_WINDOW_8822B(x) \
283 (((x) >> BIT_SHIFT_OCP_WINDOW_8822B) & BIT_MASK_OCP_WINDOW_8822B)
285 /* 2 REG_RSV_CTRL_8822B */
286 #define BIT_HREG_DBG_8822B BIT(23)
287 #define BIT_WLMCUIOIF_8822B BIT(8)
288 #define BIT_LOCK_ALL_EN_8822B BIT(7)
289 #define BIT_R_DIS_PRST_8822B BIT(6)
290 #define BIT_WLOCK_1C_B6_8822B BIT(5)
291 #define BIT_WLOCK_40_8822B BIT(4)
292 #define BIT_WLOCK_08_8822B BIT(3)
293 #define BIT_WLOCK_04_8822B BIT(2)
294 #define BIT_WLOCK_00_8822B BIT(1)
295 #define BIT_WLOCK_ALL_8822B BIT(0)
297 /* 2 REG_RF_CTRL_8822B */
298 #define BIT_RF_SDMRSTB_8822B BIT(2)
299 #define BIT_RF_RSTB_8822B BIT(1)
300 #define BIT_RF_EN_8822B BIT(0)
302 /* 2 REG_AFE_LDO_CTRL_8822B */
304 #define BIT_SHIFT_LPLDH12_RSV_8822B 29
305 #define BIT_MASK_LPLDH12_RSV_8822B 0x7
306 #define BIT_LPLDH12_RSV_8822B(x) \
307 (((x) & BIT_MASK_LPLDH12_RSV_8822B) << BIT_SHIFT_LPLDH12_RSV_8822B)
308 #define BIT_GET_LPLDH12_RSV_8822B(x) \
309 (((x) >> BIT_SHIFT_LPLDH12_RSV_8822B) & BIT_MASK_LPLDH12_RSV_8822B)
311 #define BIT_LPLDH12_SLP_8822B BIT(28)
313 #define BIT_SHIFT_LPLDH12_VADJ_8822B 24
314 #define BIT_MASK_LPLDH12_VADJ_8822B 0xf
315 #define BIT_LPLDH12_VADJ_8822B(x) \
316 (((x) & BIT_MASK_LPLDH12_VADJ_8822B) << BIT_SHIFT_LPLDH12_VADJ_8822B)
317 #define BIT_GET_LPLDH12_VADJ_8822B(x) \
318 (((x) >> BIT_SHIFT_LPLDH12_VADJ_8822B) & BIT_MASK_LPLDH12_VADJ_8822B)
320 #define BIT_LDH12_EN_8822B BIT(16)
321 #define BIT_WLBBOFF_BIG_PWC_EN_8822B BIT(14)
322 #define BIT_WLBBOFF_SMALL_PWC_EN_8822B BIT(13)
323 #define BIT_WLMACOFF_BIG_PWC_EN_8822B BIT(12)
324 #define BIT_WLPON_PWC_EN_8822B BIT(11)
325 #define BIT_POW_REGU_P1_8822B BIT(10)
326 #define BIT_LDOV12W_EN_8822B BIT(8)
327 #define BIT_EX_XTAL_DRV_DIGI_8822B BIT(7)
328 #define BIT_EX_XTAL_DRV_USB_8822B BIT(6)
329 #define BIT_EX_XTAL_DRV_AFE_8822B BIT(5)
330 #define BIT_EX_XTAL_DRV_RF2_8822B BIT(4)
331 #define BIT_EX_XTAL_DRV_RF1_8822B BIT(3)
332 #define BIT_POW_REGU_P0_8822B BIT(2)
334 /* 2 REG_NOT_VALID_8822B */
335 #define BIT_POW_PLL_LDO_8822B BIT(0)
337 /* 2 REG_AFE_CTRL1_8822B */
338 #define BIT_AGPIO_GPE_8822B BIT(31)
340 #define BIT_SHIFT_XTAL_CAP_XI_8822B 25
341 #define BIT_MASK_XTAL_CAP_XI_8822B 0x3f
342 #define BIT_XTAL_CAP_XI_8822B(x) \
343 (((x) & BIT_MASK_XTAL_CAP_XI_8822B) << BIT_SHIFT_XTAL_CAP_XI_8822B)
344 #define BIT_GET_XTAL_CAP_XI_8822B(x) \
345 (((x) >> BIT_SHIFT_XTAL_CAP_XI_8822B) & BIT_MASK_XTAL_CAP_XI_8822B)
347 #define BIT_SHIFT_XTAL_DRV_DIGI_8822B 23
348 #define BIT_MASK_XTAL_DRV_DIGI_8822B 0x3
349 #define BIT_XTAL_DRV_DIGI_8822B(x) \
350 (((x) & BIT_MASK_XTAL_DRV_DIGI_8822B) << BIT_SHIFT_XTAL_DRV_DIGI_8822B)
351 #define BIT_GET_XTAL_DRV_DIGI_8822B(x) \
352 (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8822B) & BIT_MASK_XTAL_DRV_DIGI_8822B)
354 #define BIT_XTAL_DRV_USB_BIT1_8822B BIT(22)
356 #define BIT_SHIFT_MAC_CLK_SEL_8822B 20
357 #define BIT_MASK_MAC_CLK_SEL_8822B 0x3
358 #define BIT_MAC_CLK_SEL_8822B(x) \
359 (((x) & BIT_MASK_MAC_CLK_SEL_8822B) << BIT_SHIFT_MAC_CLK_SEL_8822B)
360 #define BIT_GET_MAC_CLK_SEL_8822B(x) \
361 (((x) >> BIT_SHIFT_MAC_CLK_SEL_8822B) & BIT_MASK_MAC_CLK_SEL_8822B)
363 #define BIT_XTAL_DRV_USB_BIT0_8822B BIT(19)
365 #define BIT_SHIFT_XTAL_DRV_AFE_8822B 17
366 #define BIT_MASK_XTAL_DRV_AFE_8822B 0x3
367 #define BIT_XTAL_DRV_AFE_8822B(x) \
368 (((x) & BIT_MASK_XTAL_DRV_AFE_8822B) << BIT_SHIFT_XTAL_DRV_AFE_8822B)
369 #define BIT_GET_XTAL_DRV_AFE_8822B(x) \
370 (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8822B) & BIT_MASK_XTAL_DRV_AFE_8822B)
372 #define BIT_SHIFT_XTAL_DRV_RF2_8822B 15
373 #define BIT_MASK_XTAL_DRV_RF2_8822B 0x3
374 #define BIT_XTAL_DRV_RF2_8822B(x) \
375 (((x) & BIT_MASK_XTAL_DRV_RF2_8822B) << BIT_SHIFT_XTAL_DRV_RF2_8822B)
376 #define BIT_GET_XTAL_DRV_RF2_8822B(x) \
377 (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8822B) & BIT_MASK_XTAL_DRV_RF2_8822B)
379 #define BIT_SHIFT_XTAL_DRV_RF1_8822B 13
380 #define BIT_MASK_XTAL_DRV_RF1_8822B 0x3
381 #define BIT_XTAL_DRV_RF1_8822B(x) \
382 (((x) & BIT_MASK_XTAL_DRV_RF1_8822B) << BIT_SHIFT_XTAL_DRV_RF1_8822B)
383 #define BIT_GET_XTAL_DRV_RF1_8822B(x) \
384 (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8822B) & BIT_MASK_XTAL_DRV_RF1_8822B)
386 #define BIT_XTAL_DELAY_DIGI_8822B BIT(12)
387 #define BIT_XTAL_DELAY_USB_8822B BIT(11)
388 #define BIT_XTAL_DELAY_AFE_8822B BIT(10)
390 #define BIT_SHIFT_XTAL_LDO_VREF_8822B 7
391 #define BIT_MASK_XTAL_LDO_VREF_8822B 0x7
392 #define BIT_XTAL_LDO_VREF_8822B(x) \
393 (((x) & BIT_MASK_XTAL_LDO_VREF_8822B) << BIT_SHIFT_XTAL_LDO_VREF_8822B)
394 #define BIT_GET_XTAL_LDO_VREF_8822B(x) \
395 (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8822B) & BIT_MASK_XTAL_LDO_VREF_8822B)
397 #define BIT_XTAL_XQSEL_RF_8822B BIT(6)
398 #define BIT_XTAL_XQSEL_8822B BIT(5)
400 #define BIT_SHIFT_XTAL_GMN_V2_8822B 3
401 #define BIT_MASK_XTAL_GMN_V2_8822B 0x3
402 #define BIT_XTAL_GMN_V2_8822B(x) \
403 (((x) & BIT_MASK_XTAL_GMN_V2_8822B) << BIT_SHIFT_XTAL_GMN_V2_8822B)
404 #define BIT_GET_XTAL_GMN_V2_8822B(x) \
405 (((x) >> BIT_SHIFT_XTAL_GMN_V2_8822B) & BIT_MASK_XTAL_GMN_V2_8822B)
407 #define BIT_SHIFT_XTAL_GMP_V2_8822B 1
408 #define BIT_MASK_XTAL_GMP_V2_8822B 0x3
409 #define BIT_XTAL_GMP_V2_8822B(x) \
410 (((x) & BIT_MASK_XTAL_GMP_V2_8822B) << BIT_SHIFT_XTAL_GMP_V2_8822B)
411 #define BIT_GET_XTAL_GMP_V2_8822B(x) \
412 (((x) >> BIT_SHIFT_XTAL_GMP_V2_8822B) & BIT_MASK_XTAL_GMP_V2_8822B)
414 #define BIT_XTAL_EN_8822B BIT(0)
416 /* 2 REG_AFE_CTRL2_8822B */
418 #define BIT_SHIFT_REG_C3_V4_8822B 30
419 #define BIT_MASK_REG_C3_V4_8822B 0x3
420 #define BIT_REG_C3_V4_8822B(x) \
421 (((x) & BIT_MASK_REG_C3_V4_8822B) << BIT_SHIFT_REG_C3_V4_8822B)
422 #define BIT_GET_REG_C3_V4_8822B(x) \
423 (((x) >> BIT_SHIFT_REG_C3_V4_8822B) & BIT_MASK_REG_C3_V4_8822B)
425 #define BIT_REG_CP_BIT1_8822B BIT(29)
427 #define BIT_SHIFT_REG_RS_V4_8822B 26
428 #define BIT_MASK_REG_RS_V4_8822B 0x7
429 #define BIT_REG_RS_V4_8822B(x) \
430 (((x) & BIT_MASK_REG_RS_V4_8822B) << BIT_SHIFT_REG_RS_V4_8822B)
431 #define BIT_GET_REG_RS_V4_8822B(x) \
432 (((x) >> BIT_SHIFT_REG_RS_V4_8822B) & BIT_MASK_REG_RS_V4_8822B)
434 #define BIT_SHIFT_REG__CS_8822B 24
435 #define BIT_MASK_REG__CS_8822B 0x3
436 #define BIT_REG__CS_8822B(x) \
437 (((x) & BIT_MASK_REG__CS_8822B) << BIT_SHIFT_REG__CS_8822B)
438 #define BIT_GET_REG__CS_8822B(x) \
439 (((x) >> BIT_SHIFT_REG__CS_8822B) & BIT_MASK_REG__CS_8822B)
441 #define BIT_SHIFT_REG_CP_OFFSET_8822B 21
442 #define BIT_MASK_REG_CP_OFFSET_8822B 0x7
443 #define BIT_REG_CP_OFFSET_8822B(x) \
444 (((x) & BIT_MASK_REG_CP_OFFSET_8822B) << BIT_SHIFT_REG_CP_OFFSET_8822B)
445 #define BIT_GET_REG_CP_OFFSET_8822B(x) \
446 (((x) >> BIT_SHIFT_REG_CP_OFFSET_8822B) & BIT_MASK_REG_CP_OFFSET_8822B)
448 #define BIT_SHIFT_CP_BIAS_8822B 18
449 #define BIT_MASK_CP_BIAS_8822B 0x7
450 #define BIT_CP_BIAS_8822B(x) \
451 (((x) & BIT_MASK_CP_BIAS_8822B) << BIT_SHIFT_CP_BIAS_8822B)
452 #define BIT_GET_CP_BIAS_8822B(x) \
453 (((x) >> BIT_SHIFT_CP_BIAS_8822B) & BIT_MASK_CP_BIAS_8822B)
455 #define BIT_REG_IDOUBLE_V2_8822B BIT(17)
456 #define BIT_EN_SYN_8822B BIT(16)
458 #define BIT_SHIFT_MCCO_8822B 14
459 #define BIT_MASK_MCCO_8822B 0x3
460 #define BIT_MCCO_8822B(x) (((x) & BIT_MASK_MCCO_8822B) << BIT_SHIFT_MCCO_8822B)
461 #define BIT_GET_MCCO_8822B(x) \
462 (((x) >> BIT_SHIFT_MCCO_8822B) & BIT_MASK_MCCO_8822B)
464 #define BIT_SHIFT_REG_LDO_SEL_8822B 12
465 #define BIT_MASK_REG_LDO_SEL_8822B 0x3
466 #define BIT_REG_LDO_SEL_8822B(x) \
467 (((x) & BIT_MASK_REG_LDO_SEL_8822B) << BIT_SHIFT_REG_LDO_SEL_8822B)
468 #define BIT_GET_REG_LDO_SEL_8822B(x) \
469 (((x) >> BIT_SHIFT_REG_LDO_SEL_8822B) & BIT_MASK_REG_LDO_SEL_8822B)
471 #define BIT_REG_KVCO_V2_8822B BIT(10)
472 #define BIT_AGPIO_GPO_8822B BIT(9)
474 #define BIT_SHIFT_AGPIO_DRV_8822B 7
475 #define BIT_MASK_AGPIO_DRV_8822B 0x3
476 #define BIT_AGPIO_DRV_8822B(x) \
477 (((x) & BIT_MASK_AGPIO_DRV_8822B) << BIT_SHIFT_AGPIO_DRV_8822B)
478 #define BIT_GET_AGPIO_DRV_8822B(x) \
479 (((x) >> BIT_SHIFT_AGPIO_DRV_8822B) & BIT_MASK_AGPIO_DRV_8822B)
481 #define BIT_SHIFT_XTAL_CAP_XO_8822B 1
482 #define BIT_MASK_XTAL_CAP_XO_8822B 0x3f
483 #define BIT_XTAL_CAP_XO_8822B(x) \
484 (((x) & BIT_MASK_XTAL_CAP_XO_8822B) << BIT_SHIFT_XTAL_CAP_XO_8822B)
485 #define BIT_GET_XTAL_CAP_XO_8822B(x) \
486 (((x) >> BIT_SHIFT_XTAL_CAP_XO_8822B) & BIT_MASK_XTAL_CAP_XO_8822B)
488 #define BIT_POW_PLL_8822B BIT(0)
490 /* 2 REG_AFE_CTRL3_8822B */
492 #define BIT_SHIFT_PS_8822B 7
493 #define BIT_MASK_PS_8822B 0x7
494 #define BIT_PS_8822B(x) (((x) & BIT_MASK_PS_8822B) << BIT_SHIFT_PS_8822B)
495 #define BIT_GET_PS_8822B(x) (((x) >> BIT_SHIFT_PS_8822B) & BIT_MASK_PS_8822B)
497 #define BIT_PSEN_8822B BIT(6)
498 #define BIT_DOGENB_8822B BIT(5)
499 #define BIT_REG_MBIAS_8822B BIT(4)
501 #define BIT_SHIFT_REG_R3_V4_8822B 1
502 #define BIT_MASK_REG_R3_V4_8822B 0x7
503 #define BIT_REG_R3_V4_8822B(x) \
504 (((x) & BIT_MASK_REG_R3_V4_8822B) << BIT_SHIFT_REG_R3_V4_8822B)
505 #define BIT_GET_REG_R3_V4_8822B(x) \
506 (((x) >> BIT_SHIFT_REG_R3_V4_8822B) & BIT_MASK_REG_R3_V4_8822B)
508 #define BIT_REG_CP_BIT0_8822B BIT(0)
510 /* 2 REG_EFUSE_CTRL_8822B */
511 #define BIT_EF_FLAG_8822B BIT(31)
513 #define BIT_SHIFT_EF_PGPD_8822B 28
514 #define BIT_MASK_EF_PGPD_8822B 0x7
515 #define BIT_EF_PGPD_8822B(x) \
516 (((x) & BIT_MASK_EF_PGPD_8822B) << BIT_SHIFT_EF_PGPD_8822B)
517 #define BIT_GET_EF_PGPD_8822B(x) \
518 (((x) >> BIT_SHIFT_EF_PGPD_8822B) & BIT_MASK_EF_PGPD_8822B)
520 #define BIT_SHIFT_EF_RDT_8822B 24
521 #define BIT_MASK_EF_RDT_8822B 0xf
522 #define BIT_EF_RDT_8822B(x) \
523 (((x) & BIT_MASK_EF_RDT_8822B) << BIT_SHIFT_EF_RDT_8822B)
524 #define BIT_GET_EF_RDT_8822B(x) \
525 (((x) >> BIT_SHIFT_EF_RDT_8822B) & BIT_MASK_EF_RDT_8822B)
527 #define BIT_SHIFT_EF_PGTS_8822B 20
528 #define BIT_MASK_EF_PGTS_8822B 0xf
529 #define BIT_EF_PGTS_8822B(x) \
530 (((x) & BIT_MASK_EF_PGTS_8822B) << BIT_SHIFT_EF_PGTS_8822B)
531 #define BIT_GET_EF_PGTS_8822B(x) \
532 (((x) >> BIT_SHIFT_EF_PGTS_8822B) & BIT_MASK_EF_PGTS_8822B)
534 #define BIT_EF_PDWN_8822B BIT(19)
535 #define BIT_EF_ALDEN_8822B BIT(18)
537 #define BIT_SHIFT_EF_ADDR_8822B 8
538 #define BIT_MASK_EF_ADDR_8822B 0x3ff
539 #define BIT_EF_ADDR_8822B(x) \
540 (((x) & BIT_MASK_EF_ADDR_8822B) << BIT_SHIFT_EF_ADDR_8822B)
541 #define BIT_GET_EF_ADDR_8822B(x) \
542 (((x) >> BIT_SHIFT_EF_ADDR_8822B) & BIT_MASK_EF_ADDR_8822B)
544 #define BIT_SHIFT_EF_DATA_8822B 0
545 #define BIT_MASK_EF_DATA_8822B 0xff
546 #define BIT_EF_DATA_8822B(x) \
547 (((x) & BIT_MASK_EF_DATA_8822B) << BIT_SHIFT_EF_DATA_8822B)
548 #define BIT_GET_EF_DATA_8822B(x) \
549 (((x) >> BIT_SHIFT_EF_DATA_8822B) & BIT_MASK_EF_DATA_8822B)
551 /* 2 REG_LDO_EFUSE_CTRL_8822B */
552 #define BIT_LDOE25_EN_8822B BIT(31)
554 #define BIT_SHIFT_LDOE25_V12ADJ_L_8822B 27
555 #define BIT_MASK_LDOE25_V12ADJ_L_8822B 0xf
556 #define BIT_LDOE25_V12ADJ_L_8822B(x) \
557 (((x) & BIT_MASK_LDOE25_V12ADJ_L_8822B) \
558 << BIT_SHIFT_LDOE25_V12ADJ_L_8822B)
559 #define BIT_GET_LDOE25_V12ADJ_L_8822B(x) \
560 (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8822B) & \
561 BIT_MASK_LDOE25_V12ADJ_L_8822B)
563 #define BIT_EF_CRES_SEL_8822B BIT(26)
565 #define BIT_SHIFT_EF_SCAN_START_V1_8822B 16
566 #define BIT_MASK_EF_SCAN_START_V1_8822B 0x3ff
567 #define BIT_EF_SCAN_START_V1_8822B(x) \
568 (((x) & BIT_MASK_EF_SCAN_START_V1_8822B) \
569 << BIT_SHIFT_EF_SCAN_START_V1_8822B)
570 #define BIT_GET_EF_SCAN_START_V1_8822B(x) \
571 (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8822B) & \
572 BIT_MASK_EF_SCAN_START_V1_8822B)
574 #define BIT_SHIFT_EF_SCAN_END_8822B 12
575 #define BIT_MASK_EF_SCAN_END_8822B 0xf
576 #define BIT_EF_SCAN_END_8822B(x) \
577 (((x) & BIT_MASK_EF_SCAN_END_8822B) << BIT_SHIFT_EF_SCAN_END_8822B)
578 #define BIT_GET_EF_SCAN_END_8822B(x) \
579 (((x) >> BIT_SHIFT_EF_SCAN_END_8822B) & BIT_MASK_EF_SCAN_END_8822B)
581 #define BIT_EF_PD_DIS_8822B BIT(11)
583 #define BIT_SHIFT_EF_CELL_SEL_8822B 8
584 #define BIT_MASK_EF_CELL_SEL_8822B 0x3
585 #define BIT_EF_CELL_SEL_8822B(x) \
586 (((x) & BIT_MASK_EF_CELL_SEL_8822B) << BIT_SHIFT_EF_CELL_SEL_8822B)
587 #define BIT_GET_EF_CELL_SEL_8822B(x) \
588 (((x) >> BIT_SHIFT_EF_CELL_SEL_8822B) & BIT_MASK_EF_CELL_SEL_8822B)
590 #define BIT_EF_TRPT_8822B BIT(7)
592 #define BIT_SHIFT_EF_TTHD_8822B 0
593 #define BIT_MASK_EF_TTHD_8822B 0x7f
594 #define BIT_EF_TTHD_8822B(x) \
595 (((x) & BIT_MASK_EF_TTHD_8822B) << BIT_SHIFT_EF_TTHD_8822B)
596 #define BIT_GET_EF_TTHD_8822B(x) \
597 (((x) >> BIT_SHIFT_EF_TTHD_8822B) & BIT_MASK_EF_TTHD_8822B)
599 /* 2 REG_PWR_OPTION_CTRL_8822B */
601 #define BIT_SHIFT_DBG_SEL_V1_8822B 16
602 #define BIT_MASK_DBG_SEL_V1_8822B 0xff
603 #define BIT_DBG_SEL_V1_8822B(x) \
604 (((x) & BIT_MASK_DBG_SEL_V1_8822B) << BIT_SHIFT_DBG_SEL_V1_8822B)
605 #define BIT_GET_DBG_SEL_V1_8822B(x) \
606 (((x) >> BIT_SHIFT_DBG_SEL_V1_8822B) & BIT_MASK_DBG_SEL_V1_8822B)
608 #define BIT_SHIFT_DBG_SEL_BYTE_8822B 14
609 #define BIT_MASK_DBG_SEL_BYTE_8822B 0x3
610 #define BIT_DBG_SEL_BYTE_8822B(x) \
611 (((x) & BIT_MASK_DBG_SEL_BYTE_8822B) << BIT_SHIFT_DBG_SEL_BYTE_8822B)
612 #define BIT_GET_DBG_SEL_BYTE_8822B(x) \
613 (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8822B) & BIT_MASK_DBG_SEL_BYTE_8822B)
615 #define BIT_SHIFT_STD_L1_V1_8822B 12
616 #define BIT_MASK_STD_L1_V1_8822B 0x3
617 #define BIT_STD_L1_V1_8822B(x) \
618 (((x) & BIT_MASK_STD_L1_V1_8822B) << BIT_SHIFT_STD_L1_V1_8822B)
619 #define BIT_GET_STD_L1_V1_8822B(x) \
620 (((x) >> BIT_SHIFT_STD_L1_V1_8822B) & BIT_MASK_STD_L1_V1_8822B)
622 #define BIT_SYSON_DBG_PAD_E2_8822B BIT(11)
623 #define BIT_SYSON_LED_PAD_E2_8822B BIT(10)
624 #define BIT_SYSON_GPEE_PAD_E2_8822B BIT(9)
625 #define BIT_SYSON_PCI_PAD_E2_8822B BIT(8)
626 #define BIT_AUTO_SW_LDO_VOL_EN_8822B BIT(7)
628 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8822B 4
629 #define BIT_MASK_SYSON_SPS0WWV_WT_8822B 0x3
630 #define BIT_SYSON_SPS0WWV_WT_8822B(x) \
631 (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8822B) \
632 << BIT_SHIFT_SYSON_SPS0WWV_WT_8822B)
633 #define BIT_GET_SYSON_SPS0WWV_WT_8822B(x) \
634 (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8822B) & \
635 BIT_MASK_SYSON_SPS0WWV_WT_8822B)
637 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8822B 2
638 #define BIT_MASK_SYSON_SPS0LDO_WT_8822B 0x3
639 #define BIT_SYSON_SPS0LDO_WT_8822B(x) \
640 (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8822B) \
641 << BIT_SHIFT_SYSON_SPS0LDO_WT_8822B)
642 #define BIT_GET_SYSON_SPS0LDO_WT_8822B(x) \
643 (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8822B) & \
644 BIT_MASK_SYSON_SPS0LDO_WT_8822B)
646 #define BIT_SHIFT_SYSON_RCLK_SCALE_8822B 0
647 #define BIT_MASK_SYSON_RCLK_SCALE_8822B 0x3
648 #define BIT_SYSON_RCLK_SCALE_8822B(x) \
649 (((x) & BIT_MASK_SYSON_RCLK_SCALE_8822B) \
650 << BIT_SHIFT_SYSON_RCLK_SCALE_8822B)
651 #define BIT_GET_SYSON_RCLK_SCALE_8822B(x) \
652 (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8822B) & \
653 BIT_MASK_SYSON_RCLK_SCALE_8822B)
655 /* 2 REG_CAL_TIMER_8822B */
657 #define BIT_SHIFT_MATCH_CNT_8822B 8
658 #define BIT_MASK_MATCH_CNT_8822B 0xff
659 #define BIT_MATCH_CNT_8822B(x) \
660 (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
661 #define BIT_GET_MATCH_CNT_8822B(x) \
662 (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
664 #define BIT_SHIFT_CAL_SCAL_8822B 0
665 #define BIT_MASK_CAL_SCAL_8822B 0xff
666 #define BIT_CAL_SCAL_8822B(x) \
667 (((x) & BIT_MASK_CAL_SCAL_8822B) << BIT_SHIFT_CAL_SCAL_8822B)
668 #define BIT_GET_CAL_SCAL_8822B(x) \
669 (((x) >> BIT_SHIFT_CAL_SCAL_8822B) & BIT_MASK_CAL_SCAL_8822B)
671 /* 2 REG_ACLK_MON_8822B */
673 #define BIT_SHIFT_RCLK_MON_8822B 5
674 #define BIT_MASK_RCLK_MON_8822B 0x7ff
675 #define BIT_RCLK_MON_8822B(x) \
676 (((x) & BIT_MASK_RCLK_MON_8822B) << BIT_SHIFT_RCLK_MON_8822B)
677 #define BIT_GET_RCLK_MON_8822B(x) \
678 (((x) >> BIT_SHIFT_RCLK_MON_8822B) & BIT_MASK_RCLK_MON_8822B)
680 #define BIT_CAL_EN_8822B BIT(4)
682 #define BIT_SHIFT_DPSTU_8822B 2
683 #define BIT_MASK_DPSTU_8822B 0x3
684 #define BIT_DPSTU_8822B(x) \
685 (((x) & BIT_MASK_DPSTU_8822B) << BIT_SHIFT_DPSTU_8822B)
686 #define BIT_GET_DPSTU_8822B(x) \
687 (((x) >> BIT_SHIFT_DPSTU_8822B) & BIT_MASK_DPSTU_8822B)
689 #define BIT_SUS_16X_8822B BIT(1)
691 /* 2 REG_GPIO_MUXCFG_8822B */
692 #define BIT_FSPI_EN_8822B BIT(19)
693 #define BIT_WL_RTS_EXT_32K_SEL_8822B BIT(18)
694 #define BIT_WLGP_SPI_EN_8822B BIT(16)
695 #define BIT_SIC_LBK_8822B BIT(15)
696 #define BIT_ENHTP_8822B BIT(14)
697 #define BIT_ENSIC_8822B BIT(12)
698 #define BIT_SIC_SWRST_8822B BIT(11)
699 #define BIT_PO_WIFI_PTA_PINS_8822B BIT(10)
700 #define BIT_PO_BT_PTA_PINS_8822B BIT(9)
701 #define BIT_ENUART_8822B BIT(8)
703 #define BIT_SHIFT_BTMODE_8822B 6
704 #define BIT_MASK_BTMODE_8822B 0x3
705 #define BIT_BTMODE_8822B(x) \
706 (((x) & BIT_MASK_BTMODE_8822B) << BIT_SHIFT_BTMODE_8822B)
707 #define BIT_GET_BTMODE_8822B(x) \
708 (((x) >> BIT_SHIFT_BTMODE_8822B) & BIT_MASK_BTMODE_8822B)
710 #define BIT_ENBT_8822B BIT(5)
711 #define BIT_EROM_EN_8822B BIT(4)
712 #define BIT_WLRFE_6_7_EN_8822B BIT(3)
713 #define BIT_WLRFE_4_5_EN_8822B BIT(2)
715 #define BIT_SHIFT_GPIOSEL_8822B 0
716 #define BIT_MASK_GPIOSEL_8822B 0x3
717 #define BIT_GPIOSEL_8822B(x) \
718 (((x) & BIT_MASK_GPIOSEL_8822B) << BIT_SHIFT_GPIOSEL_8822B)
719 #define BIT_GET_GPIOSEL_8822B(x) \
720 (((x) >> BIT_SHIFT_GPIOSEL_8822B) & BIT_MASK_GPIOSEL_8822B)
722 /* 2 REG_GPIO_PIN_CTRL_8822B */
724 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8822B 24
725 #define BIT_MASK_GPIO_MOD_7_TO_0_8822B 0xff
726 #define BIT_GPIO_MOD_7_TO_0_8822B(x) \
727 (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8822B) \
728 << BIT_SHIFT_GPIO_MOD_7_TO_0_8822B)
729 #define BIT_GET_GPIO_MOD_7_TO_0_8822B(x) \
730 (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8822B) & \
731 BIT_MASK_GPIO_MOD_7_TO_0_8822B)
733 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B 16
734 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B 0xff
735 #define BIT_GPIO_IO_SEL_7_TO_0_8822B(x) \
736 (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B) \
737 << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B)
738 #define BIT_GET_GPIO_IO_SEL_7_TO_0_8822B(x) \
739 (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B) & \
740 BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B)
742 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8822B 8
743 #define BIT_MASK_GPIO_OUT_7_TO_0_8822B 0xff
744 #define BIT_GPIO_OUT_7_TO_0_8822B(x) \
745 (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8822B) \
746 << BIT_SHIFT_GPIO_OUT_7_TO_0_8822B)
747 #define BIT_GET_GPIO_OUT_7_TO_0_8822B(x) \
748 (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8822B) & \
749 BIT_MASK_GPIO_OUT_7_TO_0_8822B)
751 #define BIT_SHIFT_GPIO_IN_7_TO_0_8822B 0
752 #define BIT_MASK_GPIO_IN_7_TO_0_8822B 0xff
753 #define BIT_GPIO_IN_7_TO_0_8822B(x) \
754 (((x) & BIT_MASK_GPIO_IN_7_TO_0_8822B) \
755 << BIT_SHIFT_GPIO_IN_7_TO_0_8822B)
756 #define BIT_GET_GPIO_IN_7_TO_0_8822B(x) \
757 (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8822B) & \
758 BIT_MASK_GPIO_IN_7_TO_0_8822B)
760 /* 2 REG_GPIO_INTM_8822B */
762 #define BIT_SHIFT_MUXDBG_SEL_8822B 30
763 #define BIT_MASK_MUXDBG_SEL_8822B 0x3
764 #define BIT_MUXDBG_SEL_8822B(x) \
765 (((x) & BIT_MASK_MUXDBG_SEL_8822B) << BIT_SHIFT_MUXDBG_SEL_8822B)
766 #define BIT_GET_MUXDBG_SEL_8822B(x) \
767 (((x) >> BIT_SHIFT_MUXDBG_SEL_8822B) & BIT_MASK_MUXDBG_SEL_8822B)
769 #define BIT_EXTWOL_SEL_8822B BIT(17)
770 #define BIT_EXTWOL_EN_8822B BIT(16)
771 #define BIT_GPIOF_INT_MD_8822B BIT(15)
772 #define BIT_GPIOE_INT_MD_8822B BIT(14)
773 #define BIT_GPIOD_INT_MD_8822B BIT(13)
774 #define BIT_GPIOF_INT_MD_8822B BIT(15)
775 #define BIT_GPIOE_INT_MD_8822B BIT(14)
776 #define BIT_GPIOD_INT_MD_8822B BIT(13)
777 #define BIT_GPIOC_INT_MD_8822B BIT(12)
778 #define BIT_GPIOB_INT_MD_8822B BIT(11)
779 #define BIT_GPIOA_INT_MD_8822B BIT(10)
780 #define BIT_GPIO9_INT_MD_8822B BIT(9)
781 #define BIT_GPIO8_INT_MD_8822B BIT(8)
782 #define BIT_GPIO7_INT_MD_8822B BIT(7)
783 #define BIT_GPIO6_INT_MD_8822B BIT(6)
784 #define BIT_GPIO5_INT_MD_8822B BIT(5)
785 #define BIT_GPIO4_INT_MD_8822B BIT(4)
786 #define BIT_GPIO3_INT_MD_8822B BIT(3)
787 #define BIT_GPIO2_INT_MD_8822B BIT(2)
788 #define BIT_GPIO1_INT_MD_8822B BIT(1)
789 #define BIT_GPIO0_INT_MD_8822B BIT(0)
791 /* 2 REG_LED_CFG_8822B */
792 #define BIT_GPIO3_WL_CTRL_EN_8822B BIT(27)
793 #define BIT_LNAON_SEL_EN_8822B BIT(26)
794 #define BIT_PAPE_SEL_EN_8822B BIT(25)
795 #define BIT_DPDT_WLBT_SEL_8822B BIT(24)
796 #define BIT_DPDT_SEL_EN_8822B BIT(23)
797 #define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
798 #define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
799 #define BIT_LED2DIS_8822B BIT(21)
800 #define BIT_LED2PL_8822B BIT(20)
801 #define BIT_LED2SV_8822B BIT(19)
803 #define BIT_SHIFT_LED2CM_8822B 16
804 #define BIT_MASK_LED2CM_8822B 0x7
805 #define BIT_LED2CM_8822B(x) \
806 (((x) & BIT_MASK_LED2CM_8822B) << BIT_SHIFT_LED2CM_8822B)
807 #define BIT_GET_LED2CM_8822B(x) \
808 (((x) >> BIT_SHIFT_LED2CM_8822B) & BIT_MASK_LED2CM_8822B)
810 #define BIT_LED1DIS_8822B BIT(15)
811 #define BIT_LED1PL_8822B BIT(12)
812 #define BIT_LED1SV_8822B BIT(11)
814 #define BIT_SHIFT_LED1CM_8822B 8
815 #define BIT_MASK_LED1CM_8822B 0x7
816 #define BIT_LED1CM_8822B(x) \
817 (((x) & BIT_MASK_LED1CM_8822B) << BIT_SHIFT_LED1CM_8822B)
818 #define BIT_GET_LED1CM_8822B(x) \
819 (((x) >> BIT_SHIFT_LED1CM_8822B) & BIT_MASK_LED1CM_8822B)
821 #define BIT_LED0DIS_8822B BIT(7)
823 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B 5
824 #define BIT_MASK_AFE_LDO_SWR_CHECK_8822B 0x3
825 #define BIT_AFE_LDO_SWR_CHECK_8822B(x) \
826 (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B) \
827 << BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B)
828 #define BIT_GET_AFE_LDO_SWR_CHECK_8822B(x) \
829 (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B) & \
830 BIT_MASK_AFE_LDO_SWR_CHECK_8822B)
832 #define BIT_LED0PL_8822B BIT(4)
833 #define BIT_LED0SV_8822B BIT(3)
835 #define BIT_SHIFT_LED0CM_8822B 0
836 #define BIT_MASK_LED0CM_8822B 0x7
837 #define BIT_LED0CM_8822B(x) \
838 (((x) & BIT_MASK_LED0CM_8822B) << BIT_SHIFT_LED0CM_8822B)
839 #define BIT_GET_LED0CM_8822B(x) \
840 (((x) >> BIT_SHIFT_LED0CM_8822B) & BIT_MASK_LED0CM_8822B)
842 /* 2 REG_FSIMR_8822B */
843 #define BIT_FS_PDNINT_EN_8822B BIT(31)
844 #define BIT_NFC_INT_PAD_EN_8822B BIT(30)
845 #define BIT_FS_SPS_OCP_INT_EN_8822B BIT(29)
846 #define BIT_FS_PWMERR_INT_EN_8822B BIT(28)
847 #define BIT_FS_GPIOF_INT_EN_8822B BIT(27)
848 #define BIT_FS_GPIOE_INT_EN_8822B BIT(26)
849 #define BIT_FS_GPIOD_INT_EN_8822B BIT(25)
850 #define BIT_FS_GPIOC_INT_EN_8822B BIT(24)
851 #define BIT_FS_GPIOB_INT_EN_8822B BIT(23)
852 #define BIT_FS_GPIOA_INT_EN_8822B BIT(22)
853 #define BIT_FS_GPIO9_INT_EN_8822B BIT(21)
854 #define BIT_FS_GPIO8_INT_EN_8822B BIT(20)
855 #define BIT_FS_GPIO7_INT_EN_8822B BIT(19)
856 #define BIT_FS_GPIO6_INT_EN_8822B BIT(18)
857 #define BIT_FS_GPIO5_INT_EN_8822B BIT(17)
858 #define BIT_FS_GPIO4_INT_EN_8822B BIT(16)
859 #define BIT_FS_GPIO3_INT_EN_8822B BIT(15)
860 #define BIT_FS_GPIO2_INT_EN_8822B BIT(14)
861 #define BIT_FS_GPIO1_INT_EN_8822B BIT(13)
862 #define BIT_FS_GPIO0_INT_EN_8822B BIT(12)
863 #define BIT_FS_HCI_SUS_EN_8822B BIT(11)
864 #define BIT_FS_HCI_RES_EN_8822B BIT(10)
865 #define BIT_FS_HCI_RESET_EN_8822B BIT(9)
866 #define BIT_FS_BTON_STS_UPDATE_MSK_EN_8822B BIT(7)
867 #define BIT_ACT2RECOVERY_INT_EN_V1_8822B BIT(6)
868 #define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
869 #define BIT_HCI_TXDMA_REQ_HIMR_8822B BIT(4)
870 #define BIT_FS_32K_LEAVE_SETTING_MAK_8822B BIT(3)
871 #define BIT_FS_32K_ENTER_SETTING_MAK_8822B BIT(2)
872 #define BIT_FS_USB_LPMRSM_MSK_8822B BIT(1)
873 #define BIT_FS_USB_LPMINT_MSK_8822B BIT(0)
875 /* 2 REG_FSISR_8822B */
876 #define BIT_FS_PDNINT_8822B BIT(31)
877 #define BIT_FS_SPS_OCP_INT_8822B BIT(29)
878 #define BIT_FS_PWMERR_INT_8822B BIT(28)
879 #define BIT_FS_GPIOF_INT_8822B BIT(27)
880 #define BIT_FS_GPIOE_INT_8822B BIT(26)
881 #define BIT_FS_GPIOD_INT_8822B BIT(25)
882 #define BIT_FS_GPIOC_INT_8822B BIT(24)
883 #define BIT_FS_GPIOB_INT_8822B BIT(23)
884 #define BIT_FS_GPIOA_INT_8822B BIT(22)
885 #define BIT_FS_GPIO9_INT_8822B BIT(21)
886 #define BIT_FS_GPIO8_INT_8822B BIT(20)
887 #define BIT_FS_GPIO7_INT_8822B BIT(19)
888 #define BIT_FS_GPIO6_INT_8822B BIT(18)
889 #define BIT_FS_GPIO5_INT_8822B BIT(17)
890 #define BIT_FS_GPIO4_INT_8822B BIT(16)
891 #define BIT_FS_GPIO3_INT_8822B BIT(15)
892 #define BIT_FS_GPIO2_INT_8822B BIT(14)
893 #define BIT_FS_GPIO1_INT_8822B BIT(13)
894 #define BIT_FS_GPIO0_INT_8822B BIT(12)
895 #define BIT_FS_HCI_SUS_INT_8822B BIT(11)
896 #define BIT_FS_HCI_RES_INT_8822B BIT(10)
897 #define BIT_FS_HCI_RESET_INT_8822B BIT(9)
898 #define BIT_ACT2RECOVERY_8822B BIT(6)
899 #define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
900 #define BIT_HCI_TXDMA_REQ_HISR_8822B BIT(4)
901 #define BIT_FS_32K_LEAVE_SETTING_INT_8822B BIT(3)
902 #define BIT_FS_32K_ENTER_SETTING_INT_8822B BIT(2)
903 #define BIT_FS_USB_LPMRSM_INT_8822B BIT(1)
904 #define BIT_FS_USB_LPMINT_INT_8822B BIT(0)
906 /* 2 REG_HSIMR_8822B */
907 #define BIT_GPIOF_INT_EN_8822B BIT(31)
908 #define BIT_GPIOE_INT_EN_8822B BIT(30)
909 #define BIT_GPIOD_INT_EN_8822B BIT(29)
910 #define BIT_GPIOC_INT_EN_8822B BIT(28)
911 #define BIT_GPIOB_INT_EN_8822B BIT(27)
912 #define BIT_GPIOA_INT_EN_8822B BIT(26)
913 #define BIT_GPIO9_INT_EN_8822B BIT(25)
914 #define BIT_GPIO8_INT_EN_8822B BIT(24)
915 #define BIT_GPIO7_INT_EN_8822B BIT(23)
916 #define BIT_GPIO6_INT_EN_8822B BIT(22)
917 #define BIT_GPIO5_INT_EN_8822B BIT(21)
918 #define BIT_GPIO4_INT_EN_8822B BIT(20)
919 #define BIT_GPIO3_INT_EN_8822B BIT(19)
920 #define BIT_GPIO2_INT_EN_V1_8822B BIT(16)
921 #define BIT_GPIO1_INT_EN_8822B BIT(17)
922 #define BIT_GPIO0_INT_EN_8822B BIT(16)
923 #define BIT_PDNINT_EN_8822B BIT(7)
924 #define BIT_RON_INT_EN_8822B BIT(6)
925 #define BIT_SPS_OCP_INT_EN_8822B BIT(5)
926 #define BIT_GPIO15_0_INT_EN_8822B BIT(0)
928 /* 2 REG_HSISR_8822B */
929 #define BIT_GPIOF_INT_8822B BIT(31)
930 #define BIT_GPIOE_INT_8822B BIT(30)
931 #define BIT_GPIOD_INT_8822B BIT(29)
932 #define BIT_GPIOC_INT_8822B BIT(28)
933 #define BIT_GPIOB_INT_8822B BIT(27)
934 #define BIT_GPIOA_INT_8822B BIT(26)
935 #define BIT_GPIO9_INT_8822B BIT(25)
936 #define BIT_GPIO8_INT_8822B BIT(24)
937 #define BIT_GPIO7_INT_8822B BIT(23)
938 #define BIT_GPIO6_INT_8822B BIT(22)
939 #define BIT_GPIO5_INT_8822B BIT(21)
940 #define BIT_GPIO4_INT_8822B BIT(20)
941 #define BIT_GPIO3_INT_8822B BIT(19)
942 #define BIT_GPIO2_INT_V1_8822B BIT(16)
943 #define BIT_GPIO1_INT_8822B BIT(17)
944 #define BIT_GPIO0_INT_8822B BIT(16)
945 #define BIT_PDNINT_8822B BIT(7)
946 #define BIT_RON_INT_8822B BIT(6)
947 #define BIT_SPS_OCP_INT_8822B BIT(5)
948 #define BIT_GPIO15_0_INT_8822B BIT(0)
950 /* 2 REG_GPIO_EXT_CTRL_8822B */
952 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8822B 24
953 #define BIT_MASK_GPIO_MOD_15_TO_8_8822B 0xff
954 #define BIT_GPIO_MOD_15_TO_8_8822B(x) \
955 (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8822B) \
956 << BIT_SHIFT_GPIO_MOD_15_TO_8_8822B)
957 #define BIT_GET_GPIO_MOD_15_TO_8_8822B(x) \
958 (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8822B) & \
959 BIT_MASK_GPIO_MOD_15_TO_8_8822B)
961 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B 16
962 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B 0xff
963 #define BIT_GPIO_IO_SEL_15_TO_8_8822B(x) \
964 (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B) \
965 << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B)
966 #define BIT_GET_GPIO_IO_SEL_15_TO_8_8822B(x) \
967 (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B) & \
968 BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B)
970 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8822B 8
971 #define BIT_MASK_GPIO_OUT_15_TO_8_8822B 0xff
972 #define BIT_GPIO_OUT_15_TO_8_8822B(x) \
973 (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8822B) \
974 << BIT_SHIFT_GPIO_OUT_15_TO_8_8822B)
975 #define BIT_GET_GPIO_OUT_15_TO_8_8822B(x) \
976 (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8822B) & \
977 BIT_MASK_GPIO_OUT_15_TO_8_8822B)
979 #define BIT_SHIFT_GPIO_IN_15_TO_8_8822B 0
980 #define BIT_MASK_GPIO_IN_15_TO_8_8822B 0xff
981 #define BIT_GPIO_IN_15_TO_8_8822B(x) \
982 (((x) & BIT_MASK_GPIO_IN_15_TO_8_8822B) \
983 << BIT_SHIFT_GPIO_IN_15_TO_8_8822B)
984 #define BIT_GET_GPIO_IN_15_TO_8_8822B(x) \
985 (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8822B) & \
986 BIT_MASK_GPIO_IN_15_TO_8_8822B)
988 /* 2 REG_PAD_CTRL1_8822B */
989 #define BIT_PAPE_WLBT_SEL_8822B BIT(29)
990 #define BIT_LNAON_WLBT_SEL_8822B BIT(28)
991 #define BIT_BTGP_GPG3_FEN_8822B BIT(26)
992 #define BIT_BTGP_GPG2_FEN_8822B BIT(25)
993 #define BIT_BTGP_JTAG_EN_8822B BIT(24)
994 #define BIT_XTAL_CLK_EXTARNAL_EN_8822B BIT(23)
995 #define BIT_BTGP_UART0_EN_8822B BIT(22)
996 #define BIT_BTGP_UART1_EN_8822B BIT(21)
997 #define BIT_BTGP_SPI_EN_8822B BIT(20)
998 #define BIT_BTGP_GPIO_E2_8822B BIT(19)
999 #define BIT_BTGP_GPIO_EN_8822B BIT(18)
1001 #define BIT_SHIFT_BTGP_GPIO_SL_8822B 16
1002 #define BIT_MASK_BTGP_GPIO_SL_8822B 0x3
1003 #define BIT_BTGP_GPIO_SL_8822B(x) \
1004 (((x) & BIT_MASK_BTGP_GPIO_SL_8822B) << BIT_SHIFT_BTGP_GPIO_SL_8822B)
1005 #define BIT_GET_BTGP_GPIO_SL_8822B(x) \
1006 (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8822B) & BIT_MASK_BTGP_GPIO_SL_8822B)
1008 #define BIT_PAD_SDIO_SR_8822B BIT(14)
1009 #define BIT_GPIO14_OUTPUT_PL_8822B BIT(13)
1010 #define BIT_HOST_WAKE_PAD_PULL_EN_8822B BIT(12)
1011 #define BIT_HOST_WAKE_PAD_SL_8822B BIT(11)
1012 #define BIT_PAD_LNAON_SR_8822B BIT(10)
1013 #define BIT_PAD_LNAON_E2_8822B BIT(9)
1014 #define BIT_SW_LNAON_G_SEL_DATA_8822B BIT(8)
1015 #define BIT_SW_LNAON_A_SEL_DATA_8822B BIT(7)
1016 #define BIT_PAD_PAPE_SR_8822B BIT(6)
1017 #define BIT_PAD_PAPE_E2_8822B BIT(5)
1018 #define BIT_SW_PAPE_G_SEL_DATA_8822B BIT(4)
1019 #define BIT_SW_PAPE_A_SEL_DATA_8822B BIT(3)
1020 #define BIT_PAD_DPDT_SR_8822B BIT(2)
1021 #define BIT_PAD_DPDT_PAD_E2_8822B BIT(1)
1022 #define BIT_SW_DPDT_SEL_DATA_8822B BIT(0)
1024 /* 2 REG_WL_BT_PWR_CTRL_8822B */
1025 #define BIT_ISO_BD2PP_8822B BIT(31)
1026 #define BIT_LDOV12B_EN_8822B BIT(30)
1027 #define BIT_CKEN_BTGPS_8822B BIT(29)
1028 #define BIT_FEN_BTGPS_8822B BIT(28)
1029 #define BIT_BTCPU_BOOTSEL_8822B BIT(27)
1030 #define BIT_SPI_SPEEDUP_8822B BIT(26)
1031 #define BIT_DEVWAKE_PAD_TYPE_SEL_8822B BIT(24)
1032 #define BIT_CLKREQ_PAD_TYPE_SEL_8822B BIT(23)
1033 #define BIT_ISO_BTPON2PP_8822B BIT(22)
1034 #define BIT_BT_HWROF_EN_8822B BIT(19)
1035 #define BIT_BT_FUNC_EN_8822B BIT(18)
1036 #define BIT_BT_HWPDN_SL_8822B BIT(17)
1037 #define BIT_BT_DISN_EN_8822B BIT(16)
1038 #define BIT_BT_PDN_PULL_EN_8822B BIT(15)
1039 #define BIT_WL_PDN_PULL_EN_8822B BIT(14)
1040 #define BIT_EXTERNAL_REQUEST_PL_8822B BIT(13)
1041 #define BIT_GPIO0_2_3_PULL_LOW_EN_8822B BIT(12)
1042 #define BIT_ISO_BA2PP_8822B BIT(11)
1043 #define BIT_BT_AFE_LDO_EN_8822B BIT(10)
1044 #define BIT_BT_AFE_PLL_EN_8822B BIT(9)
1045 #define BIT_BT_DIG_CLK_EN_8822B BIT(8)
1046 #define BIT_WL_DRV_EXIST_IDX_8822B BIT(5)
1047 #define BIT_DOP_EHPAD_8822B BIT(4)
1048 #define BIT_WL_HWROF_EN_8822B BIT(3)
1049 #define BIT_WL_FUNC_EN_8822B BIT(2)
1050 #define BIT_WL_HWPDN_SL_8822B BIT(1)
1051 #define BIT_WL_HWPDN_EN_8822B BIT(0)
1053 /* 2 REG_SDM_DEBUG_8822B */
1055 #define BIT_SHIFT_WLCLK_PHASE_8822B 0
1056 #define BIT_MASK_WLCLK_PHASE_8822B 0x1f
1057 #define BIT_WLCLK_PHASE_8822B(x) \
1058 (((x) & BIT_MASK_WLCLK_PHASE_8822B) << BIT_SHIFT_WLCLK_PHASE_8822B)
1059 #define BIT_GET_WLCLK_PHASE_8822B(x) \
1060 (((x) >> BIT_SHIFT_WLCLK_PHASE_8822B) & BIT_MASK_WLCLK_PHASE_8822B)
1062 /* 2 REG_SYS_SDIO_CTRL_8822B */
1063 #define BIT_DBG_GNT_WL_BT_8822B BIT(27)
1064 #define BIT_LTE_MUX_CTRL_PATH_8822B BIT(26)
1065 #define BIT_LTE_COEX_UART_8822B BIT(25)
1066 #define BIT_3W_LTE_WL_GPIO_8822B BIT(24)
1067 #define BIT_SDIO_INT_POLARITY_8822B BIT(19)
1068 #define BIT_SDIO_INT_8822B BIT(18)
1069 #define BIT_SDIO_OFF_EN_8822B BIT(17)
1070 #define BIT_SDIO_ON_EN_8822B BIT(16)
1071 #define BIT_PCIE_WAIT_TIMEOUT_EVENT_8822B BIT(10)
1072 #define BIT_PCIE_WAIT_TIME_8822B BIT(9)
1073 #define BIT_MPCIE_REFCLK_XTAL_SEL_8822B BIT(8)
1075 /* 2 REG_HCI_OPT_CTRL_8822B */
1077 #define BIT_SHIFT_TSFT_SEL_8822B 29
1078 #define BIT_MASK_TSFT_SEL_8822B 0x7
1079 #define BIT_TSFT_SEL_8822B(x) \
1080 (((x) & BIT_MASK_TSFT_SEL_8822B) << BIT_SHIFT_TSFT_SEL_8822B)
1081 #define BIT_GET_TSFT_SEL_8822B(x) \
1082 (((x) >> BIT_SHIFT_TSFT_SEL_8822B) & BIT_MASK_TSFT_SEL_8822B)
1084 #define BIT_USB_HOST_PWR_OFF_EN_8822B BIT(12)
1085 #define BIT_SYM_LPS_BLOCK_EN_8822B BIT(11)
1086 #define BIT_USB_LPM_ACT_EN_8822B BIT(10)
1087 #define BIT_USB_LPM_NY_8822B BIT(9)
1088 #define BIT_USB_SUS_DIS_8822B BIT(8)
1090 #define BIT_SHIFT_SDIO_PAD_E_8822B 5
1091 #define BIT_MASK_SDIO_PAD_E_8822B 0x7
1092 #define BIT_SDIO_PAD_E_8822B(x) \
1093 (((x) & BIT_MASK_SDIO_PAD_E_8822B) << BIT_SHIFT_SDIO_PAD_E_8822B)
1094 #define BIT_GET_SDIO_PAD_E_8822B(x) \
1095 (((x) >> BIT_SHIFT_SDIO_PAD_E_8822B) & BIT_MASK_SDIO_PAD_E_8822B)
1097 #define BIT_USB_LPPLL_EN_8822B BIT(4)
1098 #define BIT_ROP_SW15_8822B BIT(2)
1099 #define BIT_PCI_CKRDY_OPT_8822B BIT(1)
1100 #define BIT_PCI_VAUX_EN_8822B BIT(0)
1102 /* 2 REG_AFE_CTRL4_8822B */
1104 /* 2 REG_LDO_SWR_CTRL_8822B */
1105 #define BIT_ZCD_HW_AUTO_EN_8822B BIT(27)
1106 #define BIT_ZCD_REGSEL_8822B BIT(26)
1108 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B 21
1109 #define BIT_MASK_AUTO_ZCD_IN_CODE_8822B 0x1f
1110 #define BIT_AUTO_ZCD_IN_CODE_8822B(x) \
1111 (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B) \
1112 << BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B)
1113 #define BIT_GET_AUTO_ZCD_IN_CODE_8822B(x) \
1114 (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B) & \
1115 BIT_MASK_AUTO_ZCD_IN_CODE_8822B)
1117 #define BIT_SHIFT_ZCD_CODE_IN_L_8822B 16
1118 #define BIT_MASK_ZCD_CODE_IN_L_8822B 0x1f
1119 #define BIT_ZCD_CODE_IN_L_8822B(x) \
1120 (((x) & BIT_MASK_ZCD_CODE_IN_L_8822B) << BIT_SHIFT_ZCD_CODE_IN_L_8822B)
1121 #define BIT_GET_ZCD_CODE_IN_L_8822B(x) \
1122 (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8822B) & BIT_MASK_ZCD_CODE_IN_L_8822B)
1124 #define BIT_SHIFT_LDO_HV5_DUMMY_8822B 14
1125 #define BIT_MASK_LDO_HV5_DUMMY_8822B 0x3
1126 #define BIT_LDO_HV5_DUMMY_8822B(x) \
1127 (((x) & BIT_MASK_LDO_HV5_DUMMY_8822B) << BIT_SHIFT_LDO_HV5_DUMMY_8822B)
1128 #define BIT_GET_LDO_HV5_DUMMY_8822B(x) \
1129 (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8822B) & BIT_MASK_LDO_HV5_DUMMY_8822B)
1131 #define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B 12
1132 #define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B 0x3
1133 #define BIT_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) \
1134 (((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B) \
1135 << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B)
1136 #define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) \
1137 (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B) & \
1138 BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B)
1140 #define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B 10
1141 #define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B 0x3
1142 #define BIT_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) \
1143 (((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B) \
1144 << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B)
1145 #define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) \
1146 (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B) & \
1147 BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B)
1149 #define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B 8
1150 #define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B 0x3
1151 #define BIT_REG_LOAD33_BIT0_TO_BIT1_8822B(x) \
1152 (((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B) \
1153 << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B)
1154 #define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8822B(x) \
1155 (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B) & \
1156 BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B)
1158 #define BIT_REG_BYPASS_L_8822B BIT(7)
1159 #define BIT_REG_LDOF_L_8822B BIT(6)
1160 #define BIT_REG_TYPE_L_V1_8822B BIT(5)
1161 #define BIT_ARENB_L_8822B BIT(3)
1163 #define BIT_SHIFT_CFC_L_8822B 1
1164 #define BIT_MASK_CFC_L_8822B 0x3
1165 #define BIT_CFC_L_8822B(x) \
1166 (((x) & BIT_MASK_CFC_L_8822B) << BIT_SHIFT_CFC_L_8822B)
1167 #define BIT_GET_CFC_L_8822B(x) \
1168 (((x) >> BIT_SHIFT_CFC_L_8822B) & BIT_MASK_CFC_L_8822B)
1170 #define BIT_REG_OCPS_L_V1_8822B BIT(0)
1172 /* 2 REG_MCUFW_CTRL_8822B */
1174 #define BIT_SHIFT_RPWM_8822B 24
1175 #define BIT_MASK_RPWM_8822B 0xff
1176 #define BIT_RPWM_8822B(x) (((x) & BIT_MASK_RPWM_8822B) << BIT_SHIFT_RPWM_8822B)
1177 #define BIT_GET_RPWM_8822B(x) \
1178 (((x) >> BIT_SHIFT_RPWM_8822B) & BIT_MASK_RPWM_8822B)
1180 #define BIT_ANA_PORT_EN_8822B BIT(22)
1181 #define BIT_MAC_PORT_EN_8822B BIT(21)
1182 #define BIT_BOOT_FSPI_EN_8822B BIT(20)
1183 #define BIT_ROM_DLEN_8822B BIT(19)
1185 #define BIT_SHIFT_ROM_PGE_8822B 16
1186 #define BIT_MASK_ROM_PGE_8822B 0x7
1187 #define BIT_ROM_PGE_8822B(x) \
1188 (((x) & BIT_MASK_ROM_PGE_8822B) << BIT_SHIFT_ROM_PGE_8822B)
1189 #define BIT_GET_ROM_PGE_8822B(x) \
1190 (((x) >> BIT_SHIFT_ROM_PGE_8822B) & BIT_MASK_ROM_PGE_8822B)
1192 #define BIT_FW_INIT_RDY_8822B BIT(15)
1193 #define BIT_FW_DW_RDY_8822B BIT(14)
1195 #define BIT_SHIFT_CPU_CLK_SEL_8822B 12
1196 #define BIT_MASK_CPU_CLK_SEL_8822B 0x3
1197 #define BIT_CPU_CLK_SEL_8822B(x) \
1198 (((x) & BIT_MASK_CPU_CLK_SEL_8822B) << BIT_SHIFT_CPU_CLK_SEL_8822B)
1199 #define BIT_GET_CPU_CLK_SEL_8822B(x) \
1200 (((x) >> BIT_SHIFT_CPU_CLK_SEL_8822B) & BIT_MASK_CPU_CLK_SEL_8822B)
1202 #define BIT_CCLK_CHG_MASK_8822B BIT(11)
1203 #define BIT_EMEM__TXBUF_CHKSUM_OK_8822B BIT(10)
1204 #define BIT_EMEM_TXBUF_DW_RDY_8822B BIT(9)
1205 #define BIT_EMEM_CHKSUM_OK_8822B BIT(8)
1206 #define BIT_EMEM_DW_OK_8822B BIT(7)
1207 #define BIT_DMEM_CHKSUM_OK_8822B BIT(6)
1208 #define BIT_DMEM_DW_OK_8822B BIT(5)
1209 #define BIT_IMEM_CHKSUM_OK_8822B BIT(4)
1210 #define BIT_IMEM_DW_OK_8822B BIT(3)
1211 #define BIT_IMEM_BOOT_LOAD_CHKSUM_OK_8822B BIT(2)
1212 #define BIT_IMEM_BOOT_LOAD_DW_OK_8822B BIT(1)
1213 #define BIT_MCUFWDL_EN_8822B BIT(0)
1215 /* 2 REG_MCU_TST_CFG_8822B */
1217 #define BIT_SHIFT_LBKTST_8822B 0
1218 #define BIT_MASK_LBKTST_8822B 0xffff
1219 #define BIT_LBKTST_8822B(x) \
1220 (((x) & BIT_MASK_LBKTST_8822B) << BIT_SHIFT_LBKTST_8822B)
1221 #define BIT_GET_LBKTST_8822B(x) \
1222 (((x) >> BIT_SHIFT_LBKTST_8822B) & BIT_MASK_LBKTST_8822B)
1224 /* 2 REG_HMEBOX_E0_E1_8822B */
1226 #define BIT_SHIFT_HOST_MSG_E1_8822B 16
1227 #define BIT_MASK_HOST_MSG_E1_8822B 0xffff
1228 #define BIT_HOST_MSG_E1_8822B(x) \
1229 (((x) & BIT_MASK_HOST_MSG_E1_8822B) << BIT_SHIFT_HOST_MSG_E1_8822B)
1230 #define BIT_GET_HOST_MSG_E1_8822B(x) \
1231 (((x) >> BIT_SHIFT_HOST_MSG_E1_8822B) & BIT_MASK_HOST_MSG_E1_8822B)
1233 #define BIT_SHIFT_HOST_MSG_E0_8822B 0
1234 #define BIT_MASK_HOST_MSG_E0_8822B 0xffff
1235 #define BIT_HOST_MSG_E0_8822B(x) \
1236 (((x) & BIT_MASK_HOST_MSG_E0_8822B) << BIT_SHIFT_HOST_MSG_E0_8822B)
1237 #define BIT_GET_HOST_MSG_E0_8822B(x) \
1238 (((x) >> BIT_SHIFT_HOST_MSG_E0_8822B) & BIT_MASK_HOST_MSG_E0_8822B)
1240 /* 2 REG_HMEBOX_E2_E3_8822B */
1242 #define BIT_SHIFT_HOST_MSG_E3_8822B 16
1243 #define BIT_MASK_HOST_MSG_E3_8822B 0xffff
1244 #define BIT_HOST_MSG_E3_8822B(x) \
1245 (((x) & BIT_MASK_HOST_MSG_E3_8822B) << BIT_SHIFT_HOST_MSG_E3_8822B)
1246 #define BIT_GET_HOST_MSG_E3_8822B(x) \
1247 (((x) >> BIT_SHIFT_HOST_MSG_E3_8822B) & BIT_MASK_HOST_MSG_E3_8822B)
1249 #define BIT_SHIFT_HOST_MSG_E2_8822B 0
1250 #define BIT_MASK_HOST_MSG_E2_8822B 0xffff
1251 #define BIT_HOST_MSG_E2_8822B(x) \
1252 (((x) & BIT_MASK_HOST_MSG_E2_8822B) << BIT_SHIFT_HOST_MSG_E2_8822B)
1253 #define BIT_GET_HOST_MSG_E2_8822B(x) \
1254 (((x) >> BIT_SHIFT_HOST_MSG_E2_8822B) & BIT_MASK_HOST_MSG_E2_8822B)
1256 /* 2 REG_WLLPS_CTRL_8822B */
1257 #define BIT_WLLPSOP_EABM_8822B BIT(31)
1258 #define BIT_WLLPSOP_ACKF_8822B BIT(30)
1259 #define BIT_WLLPSOP_DLDM_8822B BIT(29)
1260 #define BIT_WLLPSOP_ESWR_8822B BIT(28)
1261 #define BIT_WLLPSOP_PWMM_8822B BIT(27)
1262 #define BIT_WLLPSOP_EECK_8822B BIT(26)
1263 #define BIT_WLLPSOP_WLMACOFF_8822B BIT(25)
1264 #define BIT_WLLPSOP_EXTAL_8822B BIT(24)
1265 #define BIT_WL_SYNPON_VOLTSPDN_8822B BIT(23)
1266 #define BIT_WLLPSOP_WLBBOFF_8822B BIT(22)
1267 #define BIT_WLLPSOP_WLMEM_DS_8822B BIT(21)
1269 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B 12
1270 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B 0xf
1271 #define BIT_LPLDH12_VADJ_STEP_DN_8822B(x) \
1272 (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B) \
1273 << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B)
1274 #define BIT_GET_LPLDH12_VADJ_STEP_DN_8822B(x) \
1275 (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B) & \
1276 BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B)
1278 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B 8
1279 #define BIT_MASK_V15ADJ_L1_STEP_DN_8822B 0x7
1280 #define BIT_V15ADJ_L1_STEP_DN_8822B(x) \
1281 (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B) \
1282 << BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B)
1283 #define BIT_GET_V15ADJ_L1_STEP_DN_8822B(x) \
1284 (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B) & \
1285 BIT_MASK_V15ADJ_L1_STEP_DN_8822B)
1287 #define BIT_REGU_32K_CLK_EN_8822B BIT(1)
1288 #define BIT_WL_LPS_EN_8822B BIT(0)
1290 /* 2 REG_AFE_CTRL5_8822B */
1291 #define BIT_BB_DBG_SEL_AFE_SDM_BIT0_8822B BIT(31)
1292 #define BIT_ORDER_SDM_8822B BIT(30)
1293 #define BIT_RFE_SEL_SDM_8822B BIT(29)
1295 #define BIT_SHIFT_REF_SEL_8822B 25
1296 #define BIT_MASK_REF_SEL_8822B 0xf
1297 #define BIT_REF_SEL_8822B(x) \
1298 (((x) & BIT_MASK_REF_SEL_8822B) << BIT_SHIFT_REF_SEL_8822B)
1299 #define BIT_GET_REF_SEL_8822B(x) \
1300 (((x) >> BIT_SHIFT_REF_SEL_8822B) & BIT_MASK_REF_SEL_8822B)
1302 #define BIT_SHIFT_F0F_SDM_8822B 12
1303 #define BIT_MASK_F0F_SDM_8822B 0x1fff
1304 #define BIT_F0F_SDM_8822B(x) \
1305 (((x) & BIT_MASK_F0F_SDM_8822B) << BIT_SHIFT_F0F_SDM_8822B)
1306 #define BIT_GET_F0F_SDM_8822B(x) \
1307 (((x) >> BIT_SHIFT_F0F_SDM_8822B) & BIT_MASK_F0F_SDM_8822B)
1309 #define BIT_SHIFT_F0N_SDM_8822B 9
1310 #define BIT_MASK_F0N_SDM_8822B 0x7
1311 #define BIT_F0N_SDM_8822B(x) \
1312 (((x) & BIT_MASK_F0N_SDM_8822B) << BIT_SHIFT_F0N_SDM_8822B)
1313 #define BIT_GET_F0N_SDM_8822B(x) \
1314 (((x) >> BIT_SHIFT_F0N_SDM_8822B) & BIT_MASK_F0N_SDM_8822B)
1316 #define BIT_SHIFT_DIVN_SDM_8822B 3
1317 #define BIT_MASK_DIVN_SDM_8822B 0x3f
1318 #define BIT_DIVN_SDM_8822B(x) \
1319 (((x) & BIT_MASK_DIVN_SDM_8822B) << BIT_SHIFT_DIVN_SDM_8822B)
1320 #define BIT_GET_DIVN_SDM_8822B(x) \
1321 (((x) >> BIT_SHIFT_DIVN_SDM_8822B) & BIT_MASK_DIVN_SDM_8822B)
1323 /* 2 REG_GPIO_DEBOUNCE_CTRL_8822B */
1324 #define BIT_WLGP_DBC1EN_8822B BIT(15)
1326 #define BIT_SHIFT_WLGP_DBC1_8822B 8
1327 #define BIT_MASK_WLGP_DBC1_8822B 0xf
1328 #define BIT_WLGP_DBC1_8822B(x) \
1329 (((x) & BIT_MASK_WLGP_DBC1_8822B) << BIT_SHIFT_WLGP_DBC1_8822B)
1330 #define BIT_GET_WLGP_DBC1_8822B(x) \
1331 (((x) >> BIT_SHIFT_WLGP_DBC1_8822B) & BIT_MASK_WLGP_DBC1_8822B)
1333 #define BIT_WLGP_DBC0EN_8822B BIT(7)
1335 #define BIT_SHIFT_WLGP_DBC0_8822B 0
1336 #define BIT_MASK_WLGP_DBC0_8822B 0xf
1337 #define BIT_WLGP_DBC0_8822B(x) \
1338 (((x) & BIT_MASK_WLGP_DBC0_8822B) << BIT_SHIFT_WLGP_DBC0_8822B)
1339 #define BIT_GET_WLGP_DBC0_8822B(x) \
1340 (((x) >> BIT_SHIFT_WLGP_DBC0_8822B) & BIT_MASK_WLGP_DBC0_8822B)
1342 /* 2 REG_RPWM2_8822B */
1344 #define BIT_SHIFT_RPWM2_8822B 16
1345 #define BIT_MASK_RPWM2_8822B 0xffff
1346 #define BIT_RPWM2_8822B(x) \
1347 (((x) & BIT_MASK_RPWM2_8822B) << BIT_SHIFT_RPWM2_8822B)
1348 #define BIT_GET_RPWM2_8822B(x) \
1349 (((x) >> BIT_SHIFT_RPWM2_8822B) & BIT_MASK_RPWM2_8822B)
1351 /* 2 REG_SYSON_FSM_MON_8822B */
1353 #define BIT_SHIFT_FSM_MON_SEL_8822B 24
1354 #define BIT_MASK_FSM_MON_SEL_8822B 0x7
1355 #define BIT_FSM_MON_SEL_8822B(x) \
1356 (((x) & BIT_MASK_FSM_MON_SEL_8822B) << BIT_SHIFT_FSM_MON_SEL_8822B)
1357 #define BIT_GET_FSM_MON_SEL_8822B(x) \
1358 (((x) >> BIT_SHIFT_FSM_MON_SEL_8822B) & BIT_MASK_FSM_MON_SEL_8822B)
1360 #define BIT_DOP_ELDO_8822B BIT(23)
1361 #define BIT_FSM_MON_UPD_8822B BIT(15)
1363 #define BIT_SHIFT_FSM_PAR_8822B 0
1364 #define BIT_MASK_FSM_PAR_8822B 0x7fff
1365 #define BIT_FSM_PAR_8822B(x) \
1366 (((x) & BIT_MASK_FSM_PAR_8822B) << BIT_SHIFT_FSM_PAR_8822B)
1367 #define BIT_GET_FSM_PAR_8822B(x) \
1368 (((x) >> BIT_SHIFT_FSM_PAR_8822B) & BIT_MASK_FSM_PAR_8822B)
1370 /* 2 REG_AFE_CTRL6_8822B */
1372 #define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0
1373 #define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0x7
1374 #define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) \
1375 (((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) \
1376 << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
1377 #define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) \
1378 (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) & \
1379 BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
1381 /* 2 REG_PMC_DBG_CTRL1_8822B */
1382 #define BIT_BT_INT_EN_8822B BIT(31)
1384 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B 16
1385 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8822B 0x7fff
1386 #define BIT_RD_WR_WIFI_BT_INFO_8822B(x) \
1387 (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B) \
1388 << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B)
1389 #define BIT_GET_RD_WR_WIFI_BT_INFO_8822B(x) \
1390 (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B) & \
1391 BIT_MASK_RD_WR_WIFI_BT_INFO_8822B)
1393 #define BIT_PMC_WR_OVF_8822B BIT(8)
1395 #define BIT_SHIFT_WLPMC_ERRINT_8822B 0
1396 #define BIT_MASK_WLPMC_ERRINT_8822B 0xff
1397 #define BIT_WLPMC_ERRINT_8822B(x) \
1398 (((x) & BIT_MASK_WLPMC_ERRINT_8822B) << BIT_SHIFT_WLPMC_ERRINT_8822B)
1399 #define BIT_GET_WLPMC_ERRINT_8822B(x) \
1400 (((x) >> BIT_SHIFT_WLPMC_ERRINT_8822B) & BIT_MASK_WLPMC_ERRINT_8822B)
1402 /* 2 REG_AFE_CTRL7_8822B */
1404 #define BIT_SHIFT_SEL_V_8822B 30
1405 #define BIT_MASK_SEL_V_8822B 0x3
1406 #define BIT_SEL_V_8822B(x) \
1407 (((x) & BIT_MASK_SEL_V_8822B) << BIT_SHIFT_SEL_V_8822B)
1408 #define BIT_GET_SEL_V_8822B(x) \
1409 (((x) >> BIT_SHIFT_SEL_V_8822B) & BIT_MASK_SEL_V_8822B)
1411 #define BIT_SEL_LDO_PC_8822B BIT(29)
1413 #define BIT_SHIFT_CK_MON_SEL_8822B 26
1414 #define BIT_MASK_CK_MON_SEL_8822B 0x7
1415 #define BIT_CK_MON_SEL_8822B(x) \
1416 (((x) & BIT_MASK_CK_MON_SEL_8822B) << BIT_SHIFT_CK_MON_SEL_8822B)
1417 #define BIT_GET_CK_MON_SEL_8822B(x) \
1418 (((x) >> BIT_SHIFT_CK_MON_SEL_8822B) & BIT_MASK_CK_MON_SEL_8822B)
1420 #define BIT_CK_MON_EN_8822B BIT(25)
1421 #define BIT_FREF_EDGE_8822B BIT(24)
1422 #define BIT_CK320M_EN_8822B BIT(23)
1423 #define BIT_CK_5M_EN_8822B BIT(22)
1424 #define BIT_TESTEN_8822B BIT(21)
1426 /* 2 REG_HIMR0_8822B */
1427 #define BIT_TIMEOUT_INTERRUPT2_MASK_8822B BIT(31)
1428 #define BIT_TIMEOUT_INTERRUTP1_MASK_8822B BIT(30)
1429 #define BIT_PSTIMEOUT_MSK_8822B BIT(29)
1430 #define BIT_GTINT4_MSK_8822B BIT(28)
1431 #define BIT_GTINT3_MSK_8822B BIT(27)
1432 #define BIT_TXBCN0ERR_MSK_8822B BIT(26)
1433 #define BIT_TXBCN0OK_MSK_8822B BIT(25)
1434 #define BIT_TSF_BIT32_TOGGLE_MSK_8822B BIT(24)
1435 #define BIT_BCNDMAINT0_MSK_8822B BIT(20)
1436 #define BIT_BCNDERR0_MSK_8822B BIT(16)
1437 #define BIT_HSISR_IND_ON_INT_MSK_8822B BIT(15)
1438 #define BIT_BCNDMAINT_E_MSK_8822B BIT(14)
1439 #define BIT_CTWEND_MSK_8822B BIT(12)
1440 #define BIT_HISR1_IND_MSK_8822B BIT(11)
1441 #define BIT_C2HCMD_MSK_8822B BIT(10)
1442 #define BIT_CPWM2_MSK_8822B BIT(9)
1443 #define BIT_CPWM_MSK_8822B BIT(8)
1444 #define BIT_HIGHDOK_MSK_8822B BIT(7)
1445 #define BIT_MGTDOK_MSK_8822B BIT(6)
1446 #define BIT_BKDOK_MSK_8822B BIT(5)
1447 #define BIT_BEDOK_MSK_8822B BIT(4)
1448 #define BIT_VIDOK_MSK_8822B BIT(3)
1449 #define BIT_VODOK_MSK_8822B BIT(2)
1450 #define BIT_RDU_MSK_8822B BIT(1)
1451 #define BIT_RXOK_MSK_8822B BIT(0)
1453 /* 2 REG_HISR0_8822B */
1454 #define BIT_TIMEOUT_INTERRUPT2_8822B BIT(31)
1455 #define BIT_TIMEOUT_INTERRUTP1_8822B BIT(30)
1456 #define BIT_PSTIMEOUT_8822B BIT(29)
1457 #define BIT_GTINT4_8822B BIT(28)
1458 #define BIT_GTINT3_8822B BIT(27)
1459 #define BIT_TXBCN0ERR_8822B BIT(26)
1460 #define BIT_TXBCN0OK_8822B BIT(25)
1461 #define BIT_TSF_BIT32_TOGGLE_8822B BIT(24)
1462 #define BIT_BCNDMAINT0_8822B BIT(20)
1463 #define BIT_BCNDERR0_8822B BIT(16)
1464 #define BIT_HSISR_IND_ON_INT_8822B BIT(15)
1465 #define BIT_BCNDMAINT_E_8822B BIT(14)
1466 #define BIT_CTWEND_8822B BIT(12)
1467 #define BIT_HISR1_IND_INT_8822B BIT(11)
1468 #define BIT_C2HCMD_8822B BIT(10)
1469 #define BIT_CPWM2_8822B BIT(9)
1470 #define BIT_CPWM_8822B BIT(8)
1471 #define BIT_HIGHDOK_8822B BIT(7)
1472 #define BIT_MGTDOK_8822B BIT(6)
1473 #define BIT_BKDOK_8822B BIT(5)
1474 #define BIT_BEDOK_8822B BIT(4)
1475 #define BIT_VIDOK_8822B BIT(3)
1476 #define BIT_VODOK_8822B BIT(2)
1477 #define BIT_RDU_8822B BIT(1)
1478 #define BIT_RXOK_8822B BIT(0)
1480 /* 2 REG_HIMR1_8822B */
1481 #define BIT_TXFIFO_TH_INT_8822B BIT(30)
1482 #define BIT_BTON_STS_UPDATE_MASK_8822B BIT(29)
1483 #define BIT_MCU_ERR_MASK_8822B BIT(28)
1484 #define BIT_BCNDMAINT7__MSK_8822B BIT(27)
1485 #define BIT_BCNDMAINT6__MSK_8822B BIT(26)
1486 #define BIT_BCNDMAINT5__MSK_8822B BIT(25)
1487 #define BIT_BCNDMAINT4__MSK_8822B BIT(24)
1488 #define BIT_BCNDMAINT3_MSK_8822B BIT(23)
1489 #define BIT_BCNDMAINT2_MSK_8822B BIT(22)
1490 #define BIT_BCNDMAINT1_MSK_8822B BIT(21)
1491 #define BIT_BCNDERR7_MSK_8822B BIT(20)
1492 #define BIT_BCNDERR6_MSK_8822B BIT(19)
1493 #define BIT_BCNDERR5_MSK_8822B BIT(18)
1494 #define BIT_BCNDERR4_MSK_8822B BIT(17)
1495 #define BIT_BCNDERR3_MSK_8822B BIT(16)
1496 #define BIT_BCNDERR2_MSK_8822B BIT(15)
1497 #define BIT_BCNDERR1_MSK_8822B BIT(14)
1498 #define BIT_ATIMEND_E_MSK_8822B BIT(13)
1499 #define BIT_ATIMEND__MSK_8822B BIT(12)
1500 #define BIT_TXERR_MSK_8822B BIT(11)
1501 #define BIT_RXERR_MSK_8822B BIT(10)
1502 #define BIT_TXFOVW_MSK_8822B BIT(9)
1503 #define BIT_FOVW_MSK_8822B BIT(8)
1504 #define BIT_CPU_MGQ_TXDONE_MSK_8822B BIT(5)
1505 #define BIT_PS_TIMER_C_MSK_8822B BIT(4)
1506 #define BIT_PS_TIMER_B_MSK_8822B BIT(3)
1507 #define BIT_PS_TIMER_A_MSK_8822B BIT(2)
1508 #define BIT_CPUMGQ_TX_TIMER_MSK_8822B BIT(1)
1510 /* 2 REG_HISR1_8822B */
1511 #define BIT_TXFIFO_TH_INT_8822B BIT(30)
1512 #define BIT_BTON_STS_UPDATE_INT_8822B BIT(29)
1513 #define BIT_MCU_ERR_8822B BIT(28)
1514 #define BIT_BCNDMAINT7_8822B BIT(27)
1515 #define BIT_BCNDMAINT6_8822B BIT(26)
1516 #define BIT_BCNDMAINT5_8822B BIT(25)
1517 #define BIT_BCNDMAINT4_8822B BIT(24)
1518 #define BIT_BCNDMAINT3_8822B BIT(23)
1519 #define BIT_BCNDMAINT2_8822B BIT(22)
1520 #define BIT_BCNDMAINT1_8822B BIT(21)
1521 #define BIT_BCNDERR7_8822B BIT(20)
1522 #define BIT_BCNDERR6_8822B BIT(19)
1523 #define BIT_BCNDERR5_8822B BIT(18)
1524 #define BIT_BCNDERR4_8822B BIT(17)
1525 #define BIT_BCNDERR3_8822B BIT(16)
1526 #define BIT_BCNDERR2_8822B BIT(15)
1527 #define BIT_BCNDERR1_8822B BIT(14)
1528 #define BIT_ATIMEND_E_8822B BIT(13)
1529 #define BIT_ATIMEND_8822B BIT(12)
1530 #define BIT_TXERR_INT_8822B BIT(11)
1531 #define BIT_RXERR_INT_8822B BIT(10)
1532 #define BIT_TXFOVW_8822B BIT(9)
1533 #define BIT_FOVW_8822B BIT(8)
1534 #define BIT_CPU_MGQ_TXDONE_8822B BIT(5)
1535 #define BIT_PS_TIMER_C_8822B BIT(4)
1536 #define BIT_PS_TIMER_B_8822B BIT(3)
1537 #define BIT_PS_TIMER_A_8822B BIT(2)
1538 #define BIT_CPUMGQ_TX_TIMER_8822B BIT(1)
1540 /* 2 REG_DBG_PORT_SEL_8822B */
1542 #define BIT_SHIFT_DEBUG_ST_8822B 0
1543 #define BIT_MASK_DEBUG_ST_8822B 0xffffffffL
1544 #define BIT_DEBUG_ST_8822B(x) \
1545 (((x) & BIT_MASK_DEBUG_ST_8822B) << BIT_SHIFT_DEBUG_ST_8822B)
1546 #define BIT_GET_DEBUG_ST_8822B(x) \
1547 (((x) >> BIT_SHIFT_DEBUG_ST_8822B) & BIT_MASK_DEBUG_ST_8822B)
1549 /* 2 REG_PAD_CTRL2_8822B */
1550 #define BIT_USB3_USB2_TRANSITION_8822B BIT(20)
1552 #define BIT_SHIFT_USB23_SW_MODE_V1_8822B 18
1553 #define BIT_MASK_USB23_SW_MODE_V1_8822B 0x3
1554 #define BIT_USB23_SW_MODE_V1_8822B(x) \
1555 (((x) & BIT_MASK_USB23_SW_MODE_V1_8822B) \
1556 << BIT_SHIFT_USB23_SW_MODE_V1_8822B)
1557 #define BIT_GET_USB23_SW_MODE_V1_8822B(x) \
1558 (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8822B) & \
1559 BIT_MASK_USB23_SW_MODE_V1_8822B)
1561 #define BIT_NO_PDN_CHIPOFF_V1_8822B BIT(17)
1562 #define BIT_RSM_EN_V1_8822B BIT(16)
1564 #define BIT_SHIFT_MATCH_CNT_8822B 8
1565 #define BIT_MASK_MATCH_CNT_8822B 0xff
1566 #define BIT_MATCH_CNT_8822B(x) \
1567 (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
1568 #define BIT_GET_MATCH_CNT_8822B(x) \
1569 (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
1571 #define BIT_LD_B12V_EN_8822B BIT(7)
1572 #define BIT_EECS_IOSEL_V1_8822B BIT(6)
1573 #define BIT_EECS_DATA_O_V1_8822B BIT(5)
1574 #define BIT_EECS_DATA_I_V1_8822B BIT(4)
1575 #define BIT_EESK_IOSEL_V1_8822B BIT(2)
1576 #define BIT_EESK_DATA_O_V1_8822B BIT(1)
1577 #define BIT_EESK_DATA_I_V1_8822B BIT(0)
1579 /* 2 REG_NOT_VALID_8822B */
1581 /* 2 REG_PMC_DBG_CTRL2_8822B */
1583 #define BIT_SHIFT_EFUSE_BURN_GNT_8822B 24
1584 #define BIT_MASK_EFUSE_BURN_GNT_8822B 0xff
1585 #define BIT_EFUSE_BURN_GNT_8822B(x) \
1586 (((x) & BIT_MASK_EFUSE_BURN_GNT_8822B) \
1587 << BIT_SHIFT_EFUSE_BURN_GNT_8822B)
1588 #define BIT_GET_EFUSE_BURN_GNT_8822B(x) \
1589 (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8822B) & \
1590 BIT_MASK_EFUSE_BURN_GNT_8822B)
1592 #define BIT_STOP_WL_PMC_8822B BIT(9)
1593 #define BIT_STOP_SYM_PMC_8822B BIT(8)
1594 #define BIT_REG_RST_WLPMC_8822B BIT(5)
1595 #define BIT_REG_RST_PD12N_8822B BIT(4)
1596 #define BIT_SYSON_DIS_WLREG_WRMSK_8822B BIT(3)
1597 #define BIT_SYSON_DIS_PMCREG_WRMSK_8822B BIT(2)
1599 #define BIT_SHIFT_SYSON_REG_ARB_8822B 0
1600 #define BIT_MASK_SYSON_REG_ARB_8822B 0x3
1601 #define BIT_SYSON_REG_ARB_8822B(x) \
1602 (((x) & BIT_MASK_SYSON_REG_ARB_8822B) << BIT_SHIFT_SYSON_REG_ARB_8822B)
1603 #define BIT_GET_SYSON_REG_ARB_8822B(x) \
1604 (((x) >> BIT_SHIFT_SYSON_REG_ARB_8822B) & BIT_MASK_SYSON_REG_ARB_8822B)
1606 /* 2 REG_BIST_CTRL_8822B */
1607 #define BIT_BIST_USB_DIS_8822B BIT(27)
1608 #define BIT_BIST_PCI_DIS_8822B BIT(26)
1609 #define BIT_BIST_BT_DIS_8822B BIT(25)
1610 #define BIT_BIST_WL_DIS_8822B BIT(24)
1612 #define BIT_SHIFT_BIST_RPT_SEL_8822B 16
1613 #define BIT_MASK_BIST_RPT_SEL_8822B 0xf
1614 #define BIT_BIST_RPT_SEL_8822B(x) \
1615 (((x) & BIT_MASK_BIST_RPT_SEL_8822B) << BIT_SHIFT_BIST_RPT_SEL_8822B)
1616 #define BIT_GET_BIST_RPT_SEL_8822B(x) \
1617 (((x) >> BIT_SHIFT_BIST_RPT_SEL_8822B) & BIT_MASK_BIST_RPT_SEL_8822B)
1619 #define BIT_BIST_RESUME_PS_8822B BIT(4)
1620 #define BIT_BIST_RESUME_8822B BIT(3)
1621 #define BIT_BIST_NORMAL_8822B BIT(2)
1622 #define BIT_BIST_RSTN_8822B BIT(1)
1623 #define BIT_BIST_CLK_EN_8822B BIT(0)
1625 /* 2 REG_BIST_RPT_8822B */
1627 #define BIT_SHIFT_MBIST_REPORT_8822B 0
1628 #define BIT_MASK_MBIST_REPORT_8822B 0xffffffffL
1629 #define BIT_MBIST_REPORT_8822B(x) \
1630 (((x) & BIT_MASK_MBIST_REPORT_8822B) << BIT_SHIFT_MBIST_REPORT_8822B)
1631 #define BIT_GET_MBIST_REPORT_8822B(x) \
1632 (((x) >> BIT_SHIFT_MBIST_REPORT_8822B) & BIT_MASK_MBIST_REPORT_8822B)
1634 /* 2 REG_MEM_CTRL_8822B */
1635 #define BIT_UMEM_RME_8822B BIT(31)
1637 #define BIT_SHIFT_BT_SPRAM_8822B 28
1638 #define BIT_MASK_BT_SPRAM_8822B 0x3
1639 #define BIT_BT_SPRAM_8822B(x) \
1640 (((x) & BIT_MASK_BT_SPRAM_8822B) << BIT_SHIFT_BT_SPRAM_8822B)
1641 #define BIT_GET_BT_SPRAM_8822B(x) \
1642 (((x) >> BIT_SHIFT_BT_SPRAM_8822B) & BIT_MASK_BT_SPRAM_8822B)
1644 #define BIT_SHIFT_BT_ROM_8822B 24
1645 #define BIT_MASK_BT_ROM_8822B 0xf
1646 #define BIT_BT_ROM_8822B(x) \
1647 (((x) & BIT_MASK_BT_ROM_8822B) << BIT_SHIFT_BT_ROM_8822B)
1648 #define BIT_GET_BT_ROM_8822B(x) \
1649 (((x) >> BIT_SHIFT_BT_ROM_8822B) & BIT_MASK_BT_ROM_8822B)
1651 #define BIT_SHIFT_PCI_DPRAM_8822B 10
1652 #define BIT_MASK_PCI_DPRAM_8822B 0x3
1653 #define BIT_PCI_DPRAM_8822B(x) \
1654 (((x) & BIT_MASK_PCI_DPRAM_8822B) << BIT_SHIFT_PCI_DPRAM_8822B)
1655 #define BIT_GET_PCI_DPRAM_8822B(x) \
1656 (((x) >> BIT_SHIFT_PCI_DPRAM_8822B) & BIT_MASK_PCI_DPRAM_8822B)
1658 #define BIT_SHIFT_PCI_SPRAM_8822B 8
1659 #define BIT_MASK_PCI_SPRAM_8822B 0x3
1660 #define BIT_PCI_SPRAM_8822B(x) \
1661 (((x) & BIT_MASK_PCI_SPRAM_8822B) << BIT_SHIFT_PCI_SPRAM_8822B)
1662 #define BIT_GET_PCI_SPRAM_8822B(x) \
1663 (((x) >> BIT_SHIFT_PCI_SPRAM_8822B) & BIT_MASK_PCI_SPRAM_8822B)
1665 #define BIT_SHIFT_USB_SPRAM_8822B 6
1666 #define BIT_MASK_USB_SPRAM_8822B 0x3
1667 #define BIT_USB_SPRAM_8822B(x) \
1668 (((x) & BIT_MASK_USB_SPRAM_8822B) << BIT_SHIFT_USB_SPRAM_8822B)
1669 #define BIT_GET_USB_SPRAM_8822B(x) \
1670 (((x) >> BIT_SHIFT_USB_SPRAM_8822B) & BIT_MASK_USB_SPRAM_8822B)
1672 #define BIT_SHIFT_USB_SPRF_8822B 4
1673 #define BIT_MASK_USB_SPRF_8822B 0x3
1674 #define BIT_USB_SPRF_8822B(x) \
1675 (((x) & BIT_MASK_USB_SPRF_8822B) << BIT_SHIFT_USB_SPRF_8822B)
1676 #define BIT_GET_USB_SPRF_8822B(x) \
1677 (((x) >> BIT_SHIFT_USB_SPRF_8822B) & BIT_MASK_USB_SPRF_8822B)
1679 #define BIT_SHIFT_MCU_ROM_8822B 0
1680 #define BIT_MASK_MCU_ROM_8822B 0xf
1681 #define BIT_MCU_ROM_8822B(x) \
1682 (((x) & BIT_MASK_MCU_ROM_8822B) << BIT_SHIFT_MCU_ROM_8822B)
1683 #define BIT_GET_MCU_ROM_8822B(x) \
1684 (((x) >> BIT_SHIFT_MCU_ROM_8822B) & BIT_MASK_MCU_ROM_8822B)
1686 /* 2 REG_AFE_CTRL8_8822B */
1687 #define BIT_SYN_AGPIO_8822B BIT(20)
1688 #define BIT_XTAL_LP_8822B BIT(4)
1689 #define BIT_XTAL_GM_SEP_8822B BIT(3)
1691 #define BIT_SHIFT_XTAL_SEL_TOK_8822B 0
1692 #define BIT_MASK_XTAL_SEL_TOK_8822B 0x7
1693 #define BIT_XTAL_SEL_TOK_8822B(x) \
1694 (((x) & BIT_MASK_XTAL_SEL_TOK_8822B) << BIT_SHIFT_XTAL_SEL_TOK_8822B)
1695 #define BIT_GET_XTAL_SEL_TOK_8822B(x) \
1696 (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8822B) & BIT_MASK_XTAL_SEL_TOK_8822B)
1698 /* 2 REG_USB_SIE_INTF_8822B */
1699 #define BIT_RD_SEL_8822B BIT(31)
1700 #define BIT_USB_SIE_INTF_WE_V1_8822B BIT(30)
1701 #define BIT_USB_SIE_INTF_BYIOREG_V1_8822B BIT(29)
1702 #define BIT_USB_SIE_SELECT_8822B BIT(28)
1704 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B 16
1705 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B 0x1ff
1706 #define BIT_USB_SIE_INTF_ADDR_V1_8822B(x) \
1707 (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B) \
1708 << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B)
1709 #define BIT_GET_USB_SIE_INTF_ADDR_V1_8822B(x) \
1710 (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B) & \
1711 BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B)
1713 #define BIT_SHIFT_USB_SIE_INTF_RD_8822B 8
1714 #define BIT_MASK_USB_SIE_INTF_RD_8822B 0xff
1715 #define BIT_USB_SIE_INTF_RD_8822B(x) \
1716 (((x) & BIT_MASK_USB_SIE_INTF_RD_8822B) \
1717 << BIT_SHIFT_USB_SIE_INTF_RD_8822B)
1718 #define BIT_GET_USB_SIE_INTF_RD_8822B(x) \
1719 (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8822B) & \
1720 BIT_MASK_USB_SIE_INTF_RD_8822B)
1722 #define BIT_SHIFT_USB_SIE_INTF_WD_8822B 0
1723 #define BIT_MASK_USB_SIE_INTF_WD_8822B 0xff
1724 #define BIT_USB_SIE_INTF_WD_8822B(x) \
1725 (((x) & BIT_MASK_USB_SIE_INTF_WD_8822B) \
1726 << BIT_SHIFT_USB_SIE_INTF_WD_8822B)
1727 #define BIT_GET_USB_SIE_INTF_WD_8822B(x) \
1728 (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8822B) & \
1729 BIT_MASK_USB_SIE_INTF_WD_8822B)
1731 /* 2 REG_PCIE_MIO_INTF_8822B */
1732 #define BIT_PCIE_MIO_BYIOREG_8822B BIT(13)
1733 #define BIT_PCIE_MIO_RE_8822B BIT(12)
1735 #define BIT_SHIFT_PCIE_MIO_WE_8822B 8
1736 #define BIT_MASK_PCIE_MIO_WE_8822B 0xf
1737 #define BIT_PCIE_MIO_WE_8822B(x) \
1738 (((x) & BIT_MASK_PCIE_MIO_WE_8822B) << BIT_SHIFT_PCIE_MIO_WE_8822B)
1739 #define BIT_GET_PCIE_MIO_WE_8822B(x) \
1740 (((x) >> BIT_SHIFT_PCIE_MIO_WE_8822B) & BIT_MASK_PCIE_MIO_WE_8822B)
1742 #define BIT_SHIFT_PCIE_MIO_ADDR_8822B 0
1743 #define BIT_MASK_PCIE_MIO_ADDR_8822B 0xff
1744 #define BIT_PCIE_MIO_ADDR_8822B(x) \
1745 (((x) & BIT_MASK_PCIE_MIO_ADDR_8822B) << BIT_SHIFT_PCIE_MIO_ADDR_8822B)
1746 #define BIT_GET_PCIE_MIO_ADDR_8822B(x) \
1747 (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8822B) & BIT_MASK_PCIE_MIO_ADDR_8822B)
1749 /* 2 REG_PCIE_MIO_INTD_8822B */
1751 #define BIT_SHIFT_PCIE_MIO_DATA_8822B 0
1752 #define BIT_MASK_PCIE_MIO_DATA_8822B 0xffffffffL
1753 #define BIT_PCIE_MIO_DATA_8822B(x) \
1754 (((x) & BIT_MASK_PCIE_MIO_DATA_8822B) << BIT_SHIFT_PCIE_MIO_DATA_8822B)
1755 #define BIT_GET_PCIE_MIO_DATA_8822B(x) \
1756 (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8822B) & BIT_MASK_PCIE_MIO_DATA_8822B)
1758 /* 2 REG_WLRF1_8822B */
1760 #define BIT_SHIFT_WLRF1_CTRL_8822B 24
1761 #define BIT_MASK_WLRF1_CTRL_8822B 0xff
1762 #define BIT_WLRF1_CTRL_8822B(x) \
1763 (((x) & BIT_MASK_WLRF1_CTRL_8822B) << BIT_SHIFT_WLRF1_CTRL_8822B)
1764 #define BIT_GET_WLRF1_CTRL_8822B(x) \
1765 (((x) >> BIT_SHIFT_WLRF1_CTRL_8822B) & BIT_MASK_WLRF1_CTRL_8822B)
1767 /* 2 REG_SYS_CFG1_8822B */
1769 #define BIT_SHIFT_TRP_ICFG_8822B 28
1770 #define BIT_MASK_TRP_ICFG_8822B 0xf
1771 #define BIT_TRP_ICFG_8822B(x) \
1772 (((x) & BIT_MASK_TRP_ICFG_8822B) << BIT_SHIFT_TRP_ICFG_8822B)
1773 #define BIT_GET_TRP_ICFG_8822B(x) \
1774 (((x) >> BIT_SHIFT_TRP_ICFG_8822B) & BIT_MASK_TRP_ICFG_8822B)
1776 #define BIT_RF_TYPE_ID_8822B BIT(27)
1777 #define BIT_BD_HCI_SEL_8822B BIT(26)
1778 #define BIT_BD_PKG_SEL_8822B BIT(25)
1779 #define BIT_SPSLDO_SEL_8822B BIT(24)
1780 #define BIT_RTL_ID_8822B BIT(23)
1781 #define BIT_PAD_HWPD_IDN_8822B BIT(22)
1782 #define BIT_TESTMODE_8822B BIT(20)
1784 #define BIT_SHIFT_VENDOR_ID_8822B 16
1785 #define BIT_MASK_VENDOR_ID_8822B 0xf
1786 #define BIT_VENDOR_ID_8822B(x) \
1787 (((x) & BIT_MASK_VENDOR_ID_8822B) << BIT_SHIFT_VENDOR_ID_8822B)
1788 #define BIT_GET_VENDOR_ID_8822B(x) \
1789 (((x) >> BIT_SHIFT_VENDOR_ID_8822B) & BIT_MASK_VENDOR_ID_8822B)
1791 #define BIT_SHIFT_CHIP_VER_8822B 12
1792 #define BIT_MASK_CHIP_VER_8822B 0xf
1793 #define BIT_CHIP_VER_8822B(x) \
1794 (((x) & BIT_MASK_CHIP_VER_8822B) << BIT_SHIFT_CHIP_VER_8822B)
1795 #define BIT_GET_CHIP_VER_8822B(x) \
1796 (((x) >> BIT_SHIFT_CHIP_VER_8822B) & BIT_MASK_CHIP_VER_8822B)
1798 #define BIT_BD_MAC3_8822B BIT(11)
1799 #define BIT_BD_MAC1_8822B BIT(10)
1800 #define BIT_BD_MAC2_8822B BIT(9)
1801 #define BIT_SIC_IDLE_8822B BIT(8)
1802 #define BIT_SW_OFFLOAD_EN_8822B BIT(7)
1803 #define BIT_OCP_SHUTDN_8822B BIT(6)
1804 #define BIT_V15_VLD_8822B BIT(5)
1805 #define BIT_PCIRSTB_8822B BIT(4)
1806 #define BIT_PCLK_VLD_8822B BIT(3)
1807 #define BIT_UCLK_VLD_8822B BIT(2)
1808 #define BIT_ACLK_VLD_8822B BIT(1)
1809 #define BIT_XCLK_VLD_8822B BIT(0)
1811 /* 2 REG_SYS_STATUS1_8822B */
1813 #define BIT_SHIFT_RF_RL_ID_8822B 28
1814 #define BIT_MASK_RF_RL_ID_8822B 0xf
1815 #define BIT_RF_RL_ID_8822B(x) \
1816 (((x) & BIT_MASK_RF_RL_ID_8822B) << BIT_SHIFT_RF_RL_ID_8822B)
1817 #define BIT_GET_RF_RL_ID_8822B(x) \
1818 (((x) >> BIT_SHIFT_RF_RL_ID_8822B) & BIT_MASK_RF_RL_ID_8822B)
1820 #define BIT_HPHY_ICFG_8822B BIT(19)
1822 #define BIT_SHIFT_SEL_0XC0_8822B 16
1823 #define BIT_MASK_SEL_0XC0_8822B 0x3
1824 #define BIT_SEL_0XC0_8822B(x) \
1825 (((x) & BIT_MASK_SEL_0XC0_8822B) << BIT_SHIFT_SEL_0XC0_8822B)
1826 #define BIT_GET_SEL_0XC0_8822B(x) \
1827 (((x) >> BIT_SHIFT_SEL_0XC0_8822B) & BIT_MASK_SEL_0XC0_8822B)
1829 #define BIT_SHIFT_HCI_SEL_V3_8822B 12
1830 #define BIT_MASK_HCI_SEL_V3_8822B 0x7
1831 #define BIT_HCI_SEL_V3_8822B(x) \
1832 (((x) & BIT_MASK_HCI_SEL_V3_8822B) << BIT_SHIFT_HCI_SEL_V3_8822B)
1833 #define BIT_GET_HCI_SEL_V3_8822B(x) \
1834 (((x) >> BIT_SHIFT_HCI_SEL_V3_8822B) & BIT_MASK_HCI_SEL_V3_8822B)
1836 #define BIT_USB_OPERATION_MODE_8822B BIT(10)
1837 #define BIT_BT_PDN_8822B BIT(9)
1838 #define BIT_AUTO_WLPON_8822B BIT(8)
1839 #define BIT_WL_MODE_8822B BIT(7)
1840 #define BIT_PKG_SEL_HCI_8822B BIT(6)
1842 #define BIT_SHIFT_PAD_HCI_SEL_V1_8822B 3
1843 #define BIT_MASK_PAD_HCI_SEL_V1_8822B 0x7
1844 #define BIT_PAD_HCI_SEL_V1_8822B(x) \
1845 (((x) & BIT_MASK_PAD_HCI_SEL_V1_8822B) \
1846 << BIT_SHIFT_PAD_HCI_SEL_V1_8822B)
1847 #define BIT_GET_PAD_HCI_SEL_V1_8822B(x) \
1848 (((x) >> BIT_SHIFT_PAD_HCI_SEL_V1_8822B) & \
1849 BIT_MASK_PAD_HCI_SEL_V1_8822B)
1851 #define BIT_SHIFT_EFS_HCI_SEL_V1_8822B 0
1852 #define BIT_MASK_EFS_HCI_SEL_V1_8822B 0x7
1853 #define BIT_EFS_HCI_SEL_V1_8822B(x) \
1854 (((x) & BIT_MASK_EFS_HCI_SEL_V1_8822B) \
1855 << BIT_SHIFT_EFS_HCI_SEL_V1_8822B)
1856 #define BIT_GET_EFS_HCI_SEL_V1_8822B(x) \
1857 (((x) >> BIT_SHIFT_EFS_HCI_SEL_V1_8822B) & \
1858 BIT_MASK_EFS_HCI_SEL_V1_8822B)
1860 /* 2 REG_SYS_STATUS2_8822B */
1861 #define BIT_SIO_ALDN_8822B BIT(19)
1862 #define BIT_USB_ALDN_8822B BIT(18)
1863 #define BIT_PCI_ALDN_8822B BIT(17)
1864 #define BIT_SYS_ALDN_8822B BIT(16)
1866 #define BIT_SHIFT_EPVID1_8822B 8
1867 #define BIT_MASK_EPVID1_8822B 0xff
1868 #define BIT_EPVID1_8822B(x) \
1869 (((x) & BIT_MASK_EPVID1_8822B) << BIT_SHIFT_EPVID1_8822B)
1870 #define BIT_GET_EPVID1_8822B(x) \
1871 (((x) >> BIT_SHIFT_EPVID1_8822B) & BIT_MASK_EPVID1_8822B)
1873 #define BIT_SHIFT_EPVID0_8822B 0
1874 #define BIT_MASK_EPVID0_8822B 0xff
1875 #define BIT_EPVID0_8822B(x) \
1876 (((x) & BIT_MASK_EPVID0_8822B) << BIT_SHIFT_EPVID0_8822B)
1877 #define BIT_GET_EPVID0_8822B(x) \
1878 (((x) >> BIT_SHIFT_EPVID0_8822B) & BIT_MASK_EPVID0_8822B)
1880 /* 2 REG_SYS_CFG2_8822B */
1881 #define BIT_HCI_SEL_EMBEDDED_8822B BIT(8)
1883 #define BIT_SHIFT_HW_ID_8822B 0
1884 #define BIT_MASK_HW_ID_8822B 0xff
1885 #define BIT_HW_ID_8822B(x) \
1886 (((x) & BIT_MASK_HW_ID_8822B) << BIT_SHIFT_HW_ID_8822B)
1887 #define BIT_GET_HW_ID_8822B(x) \
1888 (((x) >> BIT_SHIFT_HW_ID_8822B) & BIT_MASK_HW_ID_8822B)
1890 /* 2 REG_SYS_CFG3_8822B */
1891 #define BIT_PWC_MA33V_8822B BIT(15)
1892 #define BIT_PWC_MA12V_8822B BIT(14)
1893 #define BIT_PWC_MD12V_8822B BIT(13)
1894 #define BIT_PWC_PD12V_8822B BIT(12)
1895 #define BIT_PWC_UD12V_8822B BIT(11)
1896 #define BIT_ISO_MA2MD_8822B BIT(1)
1897 #define BIT_ISO_MD2PP_8822B BIT(0)
1899 /* 2 REG_SYS_CFG4_8822B */
1901 /* 2 REG_SYS_CFG5_8822B */
1902 #define BIT_LPS_STATUS_8822B BIT(3)
1903 #define BIT_HCI_TXDMA_BUSY_8822B BIT(2)
1904 #define BIT_HCI_TXDMA_ALLOW_8822B BIT(1)
1905 #define BIT_FW_CTRL_HCI_TXDMA_EN_8822B BIT(0)
1907 /* 2 REG_CPU_DMEM_CON_8822B */
1908 #define BIT_WDT_OPT_IOWRAPPER_8822B BIT(19)
1909 #define BIT_ANA_PORT_IDLE_8822B BIT(18)
1910 #define BIT_MAC_PORT_IDLE_8822B BIT(17)
1911 #define BIT_WL_PLATFORM_RST_8822B BIT(16)
1912 #define BIT_WL_SECURITY_CLK_8822B BIT(15)
1914 #define BIT_SHIFT_CPU_DMEM_CON_8822B 0
1915 #define BIT_MASK_CPU_DMEM_CON_8822B 0xff
1916 #define BIT_CPU_DMEM_CON_8822B(x) \
1917 (((x) & BIT_MASK_CPU_DMEM_CON_8822B) << BIT_SHIFT_CPU_DMEM_CON_8822B)
1918 #define BIT_GET_CPU_DMEM_CON_8822B(x) \
1919 (((x) >> BIT_SHIFT_CPU_DMEM_CON_8822B) & BIT_MASK_CPU_DMEM_CON_8822B)
1921 /* 2 REG_BOOT_REASON_8822B */
1923 #define BIT_SHIFT_BOOT_REASON_8822B 0
1924 #define BIT_MASK_BOOT_REASON_8822B 0x7
1925 #define BIT_BOOT_REASON_8822B(x) \
1926 (((x) & BIT_MASK_BOOT_REASON_8822B) << BIT_SHIFT_BOOT_REASON_8822B)
1927 #define BIT_GET_BOOT_REASON_8822B(x) \
1928 (((x) >> BIT_SHIFT_BOOT_REASON_8822B) & BIT_MASK_BOOT_REASON_8822B)
1930 /* 2 REG_NFCPAD_CTRL_8822B */
1931 #define BIT_PAD_SHUTDW_8822B BIT(18)
1932 #define BIT_SYSON_NFC_PAD_8822B BIT(17)
1933 #define BIT_NFC_INT_PAD_CTRL_8822B BIT(16)
1934 #define BIT_NFC_RFDIS_PAD_CTRL_8822B BIT(15)
1935 #define BIT_NFC_CLK_PAD_CTRL_8822B BIT(14)
1936 #define BIT_NFC_DATA_PAD_CTRL_8822B BIT(13)
1937 #define BIT_NFC_PAD_PULL_CTRL_8822B BIT(12)
1939 #define BIT_SHIFT_NFCPAD_IO_SEL_8822B 8
1940 #define BIT_MASK_NFCPAD_IO_SEL_8822B 0xf
1941 #define BIT_NFCPAD_IO_SEL_8822B(x) \
1942 (((x) & BIT_MASK_NFCPAD_IO_SEL_8822B) << BIT_SHIFT_NFCPAD_IO_SEL_8822B)
1943 #define BIT_GET_NFCPAD_IO_SEL_8822B(x) \
1944 (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8822B) & BIT_MASK_NFCPAD_IO_SEL_8822B)
1946 #define BIT_SHIFT_NFCPAD_OUT_8822B 4
1947 #define BIT_MASK_NFCPAD_OUT_8822B 0xf
1948 #define BIT_NFCPAD_OUT_8822B(x) \
1949 (((x) & BIT_MASK_NFCPAD_OUT_8822B) << BIT_SHIFT_NFCPAD_OUT_8822B)
1950 #define BIT_GET_NFCPAD_OUT_8822B(x) \
1951 (((x) >> BIT_SHIFT_NFCPAD_OUT_8822B) & BIT_MASK_NFCPAD_OUT_8822B)
1953 #define BIT_SHIFT_NFCPAD_IN_8822B 0
1954 #define BIT_MASK_NFCPAD_IN_8822B 0xf
1955 #define BIT_NFCPAD_IN_8822B(x) \
1956 (((x) & BIT_MASK_NFCPAD_IN_8822B) << BIT_SHIFT_NFCPAD_IN_8822B)
1957 #define BIT_GET_NFCPAD_IN_8822B(x) \
1958 (((x) >> BIT_SHIFT_NFCPAD_IN_8822B) & BIT_MASK_NFCPAD_IN_8822B)
1960 /* 2 REG_HIMR2_8822B */
1961 #define BIT_BCNDMAINT_P4_MSK_8822B BIT(31)
1962 #define BIT_BCNDMAINT_P3_MSK_8822B BIT(30)
1963 #define BIT_BCNDMAINT_P2_MSK_8822B BIT(29)
1964 #define BIT_BCNDMAINT_P1_MSK_8822B BIT(28)
1965 #define BIT_ATIMEND7_MSK_8822B BIT(22)
1966 #define BIT_ATIMEND6_MSK_8822B BIT(21)
1967 #define BIT_ATIMEND5_MSK_8822B BIT(20)
1968 #define BIT_ATIMEND4_MSK_8822B BIT(19)
1969 #define BIT_ATIMEND3_MSK_8822B BIT(18)
1970 #define BIT_ATIMEND2_MSK_8822B BIT(17)
1971 #define BIT_ATIMEND1_MSK_8822B BIT(16)
1972 #define BIT_TXBCN7OK_MSK_8822B BIT(14)
1973 #define BIT_TXBCN6OK_MSK_8822B BIT(13)
1974 #define BIT_TXBCN5OK_MSK_8822B BIT(12)
1975 #define BIT_TXBCN4OK_MSK_8822B BIT(11)
1976 #define BIT_TXBCN3OK_MSK_8822B BIT(10)
1977 #define BIT_TXBCN2OK_MSK_8822B BIT(9)
1978 #define BIT_TXBCN1OK_MSK_V1_8822B BIT(8)
1979 #define BIT_TXBCN7ERR_MSK_8822B BIT(6)
1980 #define BIT_TXBCN6ERR_MSK_8822B BIT(5)
1981 #define BIT_TXBCN5ERR_MSK_8822B BIT(4)
1982 #define BIT_TXBCN4ERR_MSK_8822B BIT(3)
1983 #define BIT_TXBCN3ERR_MSK_8822B BIT(2)
1984 #define BIT_TXBCN2ERR_MSK_8822B BIT(1)
1985 #define BIT_TXBCN1ERR_MSK_V1_8822B BIT(0)
1987 /* 2 REG_HISR2_8822B */
1988 #define BIT_BCNDMAINT_P4_8822B BIT(31)
1989 #define BIT_BCNDMAINT_P3_8822B BIT(30)
1990 #define BIT_BCNDMAINT_P2_8822B BIT(29)
1991 #define BIT_BCNDMAINT_P1_8822B BIT(28)
1992 #define BIT_ATIMEND7_8822B BIT(22)
1993 #define BIT_ATIMEND6_8822B BIT(21)
1994 #define BIT_ATIMEND5_8822B BIT(20)
1995 #define BIT_ATIMEND4_8822B BIT(19)
1996 #define BIT_ATIMEND3_8822B BIT(18)
1997 #define BIT_ATIMEND2_8822B BIT(17)
1998 #define BIT_ATIMEND1_8822B BIT(16)
1999 #define BIT_TXBCN7OK_8822B BIT(14)
2000 #define BIT_TXBCN6OK_8822B BIT(13)
2001 #define BIT_TXBCN5OK_8822B BIT(12)
2002 #define BIT_TXBCN4OK_8822B BIT(11)
2003 #define BIT_TXBCN3OK_8822B BIT(10)
2004 #define BIT_TXBCN2OK_8822B BIT(9)
2005 #define BIT_TXBCN1OK_8822B BIT(8)
2006 #define BIT_TXBCN7ERR_8822B BIT(6)
2007 #define BIT_TXBCN6ERR_8822B BIT(5)
2008 #define BIT_TXBCN5ERR_8822B BIT(4)
2009 #define BIT_TXBCN4ERR_8822B BIT(3)
2010 #define BIT_TXBCN3ERR_8822B BIT(2)
2011 #define BIT_TXBCN2ERR_8822B BIT(1)
2012 #define BIT_TXBCN1ERR_8822B BIT(0)
2014 /* 2 REG_HIMR3_8822B */
2015 #define BIT_WDT_PLATFORM_INT_MSK_8822B BIT(18)
2016 #define BIT_WDT_CPU_INT_MSK_8822B BIT(17)
2017 #define BIT_SETH2CDOK_MASK_8822B BIT(16)
2018 #define BIT_H2C_CMD_FULL_MASK_8822B BIT(15)
2019 #define BIT_PWR_INT_127_MASK_8822B BIT(14)
2020 #define BIT_TXSHORTCUT_TXDESUPDATEOK_MASK_8822B BIT(13)
2021 #define BIT_TXSHORTCUT_BKUPDATEOK_MASK_8822B BIT(12)
2022 #define BIT_TXSHORTCUT_BEUPDATEOK_MASK_8822B BIT(11)
2023 #define BIT_TXSHORTCUT_VIUPDATEOK_MAS_8822B BIT(10)
2024 #define BIT_TXSHORTCUT_VOUPDATEOK_MASK_8822B BIT(9)
2025 #define BIT_PWR_INT_127_MASK_V1_8822B BIT(8)
2026 #define BIT_PWR_INT_126TO96_MASK_8822B BIT(7)
2027 #define BIT_PWR_INT_95TO64_MASK_8822B BIT(6)
2028 #define BIT_PWR_INT_63TO32_MASK_8822B BIT(5)
2029 #define BIT_PWR_INT_31TO0_MASK_8822B BIT(4)
2030 #define BIT_DDMA0_LP_INT_MSK_8822B BIT(1)
2031 #define BIT_DDMA0_HP_INT_MSK_8822B BIT(0)
2033 /* 2 REG_HISR3_8822B */
2034 #define BIT_WDT_PLATFORM_INT_8822B BIT(18)
2035 #define BIT_WDT_CPU_INT_8822B BIT(17)
2036 #define BIT_SETH2CDOK_8822B BIT(16)
2037 #define BIT_H2C_CMD_FULL_8822B BIT(15)
2038 #define BIT_PWR_INT_127_8822B BIT(14)
2039 #define BIT_TXSHORTCUT_TXDESUPDATEOK_8822B BIT(13)
2040 #define BIT_TXSHORTCUT_BKUPDATEOK_8822B BIT(12)
2041 #define BIT_TXSHORTCUT_BEUPDATEOK_8822B BIT(11)
2042 #define BIT_TXSHORTCUT_VIUPDATEOK_8822B BIT(10)
2043 #define BIT_TXSHORTCUT_VOUPDATEOK_8822B BIT(9)
2044 #define BIT_PWR_INT_127_V1_8822B BIT(8)
2045 #define BIT_PWR_INT_126TO96_8822B BIT(7)
2046 #define BIT_PWR_INT_95TO64_8822B BIT(6)
2047 #define BIT_PWR_INT_63TO32_8822B BIT(5)
2048 #define BIT_PWR_INT_31TO0_8822B BIT(4)
2049 #define BIT_DDMA0_LP_INT_8822B BIT(1)
2050 #define BIT_DDMA0_HP_INT_8822B BIT(0)
2052 /* 2 REG_SW_MDIO_8822B */
2053 #define BIT_DIS_TIMEOUT_IO_8822B BIT(24)
2055 /* 2 REG_SW_FLUSH_8822B */
2056 #define BIT_FLUSH_HOLDN_EN_8822B BIT(25)
2057 #define BIT_FLUSH_WR_EN_8822B BIT(24)
2058 #define BIT_SW_FLASH_CONTROL_8822B BIT(23)
2059 #define BIT_SW_FLASH_WEN_E_8822B BIT(19)
2060 #define BIT_SW_FLASH_HOLDN_E_8822B BIT(18)
2061 #define BIT_SW_FLASH_SO_E_8822B BIT(17)
2062 #define BIT_SW_FLASH_SI_E_8822B BIT(16)
2063 #define BIT_SW_FLASH_SK_O_8822B BIT(13)
2064 #define BIT_SW_FLASH_CEN_O_8822B BIT(12)
2065 #define BIT_SW_FLASH_WEN_O_8822B BIT(11)
2066 #define BIT_SW_FLASH_HOLDN_O_8822B BIT(10)
2067 #define BIT_SW_FLASH_SO_O_8822B BIT(9)
2068 #define BIT_SW_FLASH_SI_O_8822B BIT(8)
2069 #define BIT_SW_FLASH_WEN_I_8822B BIT(3)
2070 #define BIT_SW_FLASH_HOLDN_I_8822B BIT(2)
2071 #define BIT_SW_FLASH_SO_I_8822B BIT(1)
2072 #define BIT_SW_FLASH_SI_I_8822B BIT(0)
2074 /* 2 REG_H2C_PKT_READADDR_8822B */
2076 #define BIT_SHIFT_H2C_PKT_READADDR_8822B 0
2077 #define BIT_MASK_H2C_PKT_READADDR_8822B 0x3ffff
2078 #define BIT_H2C_PKT_READADDR_8822B(x) \
2079 (((x) & BIT_MASK_H2C_PKT_READADDR_8822B) \
2080 << BIT_SHIFT_H2C_PKT_READADDR_8822B)
2081 #define BIT_GET_H2C_PKT_READADDR_8822B(x) \
2082 (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8822B) & \
2083 BIT_MASK_H2C_PKT_READADDR_8822B)
2085 /* 2 REG_H2C_PKT_WRITEADDR_8822B */
2087 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8822B 0
2088 #define BIT_MASK_H2C_PKT_WRITEADDR_8822B 0x3ffff
2089 #define BIT_H2C_PKT_WRITEADDR_8822B(x) \
2090 (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8822B) \
2091 << BIT_SHIFT_H2C_PKT_WRITEADDR_8822B)
2092 #define BIT_GET_H2C_PKT_WRITEADDR_8822B(x) \
2093 (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8822B) & \
2094 BIT_MASK_H2C_PKT_WRITEADDR_8822B)
2096 /* 2 REG_MEM_PWR_CRTL_8822B */
2097 #define BIT_MEM_BB_SD_8822B BIT(17)
2098 #define BIT_MEM_BB_DS_8822B BIT(16)
2099 #define BIT_MEM_BT_DS_8822B BIT(10)
2100 #define BIT_MEM_SDIO_LS_8822B BIT(9)
2101 #define BIT_MEM_SDIO_DS_8822B BIT(8)
2102 #define BIT_MEM_USB_LS_8822B BIT(7)
2103 #define BIT_MEM_USB_DS_8822B BIT(6)
2104 #define BIT_MEM_PCI_LS_8822B BIT(5)
2105 #define BIT_MEM_PCI_DS_8822B BIT(4)
2106 #define BIT_MEM_WLMAC_LS_8822B BIT(3)
2107 #define BIT_MEM_WLMAC_DS_8822B BIT(2)
2108 #define BIT_MEM_WLMCU_LS_8822B BIT(1)
2109 #define BIT_MEM_WLMCU_DS_8822B BIT(0)
2111 /* 2 REG_FW_DBG0_8822B */
2113 #define BIT_SHIFT_FW_DBG0_8822B 0
2114 #define BIT_MASK_FW_DBG0_8822B 0xffffffffL
2115 #define BIT_FW_DBG0_8822B(x) \
2116 (((x) & BIT_MASK_FW_DBG0_8822B) << BIT_SHIFT_FW_DBG0_8822B)
2117 #define BIT_GET_FW_DBG0_8822B(x) \
2118 (((x) >> BIT_SHIFT_FW_DBG0_8822B) & BIT_MASK_FW_DBG0_8822B)
2120 /* 2 REG_FW_DBG1_8822B */
2122 #define BIT_SHIFT_FW_DBG1_8822B 0
2123 #define BIT_MASK_FW_DBG1_8822B 0xffffffffL
2124 #define BIT_FW_DBG1_8822B(x) \
2125 (((x) & BIT_MASK_FW_DBG1_8822B) << BIT_SHIFT_FW_DBG1_8822B)
2126 #define BIT_GET_FW_DBG1_8822B(x) \
2127 (((x) >> BIT_SHIFT_FW_DBG1_8822B) & BIT_MASK_FW_DBG1_8822B)
2129 /* 2 REG_FW_DBG2_8822B */
2131 #define BIT_SHIFT_FW_DBG2_8822B 0
2132 #define BIT_MASK_FW_DBG2_8822B 0xffffffffL
2133 #define BIT_FW_DBG2_8822B(x) \
2134 (((x) & BIT_MASK_FW_DBG2_8822B) << BIT_SHIFT_FW_DBG2_8822B)
2135 #define BIT_GET_FW_DBG2_8822B(x) \
2136 (((x) >> BIT_SHIFT_FW_DBG2_8822B) & BIT_MASK_FW_DBG2_8822B)
2138 /* 2 REG_FW_DBG3_8822B */
2140 #define BIT_SHIFT_FW_DBG3_8822B 0
2141 #define BIT_MASK_FW_DBG3_8822B 0xffffffffL
2142 #define BIT_FW_DBG3_8822B(x) \
2143 (((x) & BIT_MASK_FW_DBG3_8822B) << BIT_SHIFT_FW_DBG3_8822B)
2144 #define BIT_GET_FW_DBG3_8822B(x) \
2145 (((x) >> BIT_SHIFT_FW_DBG3_8822B) & BIT_MASK_FW_DBG3_8822B)
2147 /* 2 REG_FW_DBG4_8822B */
2149 #define BIT_SHIFT_FW_DBG4_8822B 0
2150 #define BIT_MASK_FW_DBG4_8822B 0xffffffffL
2151 #define BIT_FW_DBG4_8822B(x) \
2152 (((x) & BIT_MASK_FW_DBG4_8822B) << BIT_SHIFT_FW_DBG4_8822B)
2153 #define BIT_GET_FW_DBG4_8822B(x) \
2154 (((x) >> BIT_SHIFT_FW_DBG4_8822B) & BIT_MASK_FW_DBG4_8822B)
2156 /* 2 REG_FW_DBG5_8822B */
2158 #define BIT_SHIFT_FW_DBG5_8822B 0
2159 #define BIT_MASK_FW_DBG5_8822B 0xffffffffL
2160 #define BIT_FW_DBG5_8822B(x) \
2161 (((x) & BIT_MASK_FW_DBG5_8822B) << BIT_SHIFT_FW_DBG5_8822B)
2162 #define BIT_GET_FW_DBG5_8822B(x) \
2163 (((x) >> BIT_SHIFT_FW_DBG5_8822B) & BIT_MASK_FW_DBG5_8822B)
2165 /* 2 REG_FW_DBG6_8822B */
2167 #define BIT_SHIFT_FW_DBG6_8822B 0
2168 #define BIT_MASK_FW_DBG6_8822B 0xffffffffL
2169 #define BIT_FW_DBG6_8822B(x) \
2170 (((x) & BIT_MASK_FW_DBG6_8822B) << BIT_SHIFT_FW_DBG6_8822B)
2171 #define BIT_GET_FW_DBG6_8822B(x) \
2172 (((x) >> BIT_SHIFT_FW_DBG6_8822B) & BIT_MASK_FW_DBG6_8822B)
2174 /* 2 REG_FW_DBG7_8822B */
2176 #define BIT_SHIFT_FW_DBG7_8822B 0
2177 #define BIT_MASK_FW_DBG7_8822B 0xffffffffL
2178 #define BIT_FW_DBG7_8822B(x) \
2179 (((x) & BIT_MASK_FW_DBG7_8822B) << BIT_SHIFT_FW_DBG7_8822B)
2180 #define BIT_GET_FW_DBG7_8822B(x) \
2181 (((x) >> BIT_SHIFT_FW_DBG7_8822B) & BIT_MASK_FW_DBG7_8822B)
2183 /* 2 REG_NOT_VALID_8822B */
2185 /* 2 REG_CR_8822B */
2187 #define BIT_SHIFT_LBMODE_8822B 24
2188 #define BIT_MASK_LBMODE_8822B 0x1f
2189 #define BIT_LBMODE_8822B(x) \
2190 (((x) & BIT_MASK_LBMODE_8822B) << BIT_SHIFT_LBMODE_8822B)
2191 #define BIT_GET_LBMODE_8822B(x) \
2192 (((x) >> BIT_SHIFT_LBMODE_8822B) & BIT_MASK_LBMODE_8822B)
2194 #define BIT_SHIFT_NETYPE1_8822B 18
2195 #define BIT_MASK_NETYPE1_8822B 0x3
2196 #define BIT_NETYPE1_8822B(x) \
2197 (((x) & BIT_MASK_NETYPE1_8822B) << BIT_SHIFT_NETYPE1_8822B)
2198 #define BIT_GET_NETYPE1_8822B(x) \
2199 (((x) >> BIT_SHIFT_NETYPE1_8822B) & BIT_MASK_NETYPE1_8822B)
2201 #define BIT_SHIFT_NETYPE0_8822B 16
2202 #define BIT_MASK_NETYPE0_8822B 0x3
2203 #define BIT_NETYPE0_8822B(x) \
2204 (((x) & BIT_MASK_NETYPE0_8822B) << BIT_SHIFT_NETYPE0_8822B)
2205 #define BIT_GET_NETYPE0_8822B(x) \
2206 (((x) >> BIT_SHIFT_NETYPE0_8822B) & BIT_MASK_NETYPE0_8822B)
2208 #define BIT_I2C_MAILBOX_EN_8822B BIT(12)
2209 #define BIT_SHCUT_EN_8822B BIT(11)
2210 #define BIT_32K_CAL_TMR_EN_8822B BIT(10)
2211 #define BIT_MAC_SEC_EN_8822B BIT(9)
2212 #define BIT_ENSWBCN_8822B BIT(8)
2213 #define BIT_MACRXEN_8822B BIT(7)
2214 #define BIT_MACTXEN_8822B BIT(6)
2215 #define BIT_SCHEDULE_EN_8822B BIT(5)
2216 #define BIT_PROTOCOL_EN_8822B BIT(4)
2217 #define BIT_RXDMA_EN_8822B BIT(3)
2218 #define BIT_TXDMA_EN_8822B BIT(2)
2219 #define BIT_HCI_RXDMA_EN_8822B BIT(1)
2220 #define BIT_HCI_TXDMA_EN_8822B BIT(0)
2222 /* 2 REG_PKT_BUFF_ACCESS_CTRL_8822B */
2224 #define BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B 0
2225 #define BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B 0xff
2226 #define BIT_PKT_BUFF_ACCESS_CTRL_8822B(x) \
2227 (((x) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B) \
2228 << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B)
2229 #define BIT_GET_PKT_BUFF_ACCESS_CTRL_8822B(x) \
2230 (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B) & \
2231 BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B)
2233 /* 2 REG_TSF_CLK_STATE_8822B */
2234 #define BIT_TSF_CLK_STABLE_8822B BIT(15)
2236 /* 2 REG_TXDMA_PQ_MAP_8822B */
2238 #define BIT_SHIFT_TXDMA_HIQ_MAP_8822B 14
2239 #define BIT_MASK_TXDMA_HIQ_MAP_8822B 0x3
2240 #define BIT_TXDMA_HIQ_MAP_8822B(x) \
2241 (((x) & BIT_MASK_TXDMA_HIQ_MAP_8822B) << BIT_SHIFT_TXDMA_HIQ_MAP_8822B)
2242 #define BIT_GET_TXDMA_HIQ_MAP_8822B(x) \
2243 (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8822B) & BIT_MASK_TXDMA_HIQ_MAP_8822B)
2245 #define BIT_SHIFT_TXDMA_MGQ_MAP_8822B 12
2246 #define BIT_MASK_TXDMA_MGQ_MAP_8822B 0x3
2247 #define BIT_TXDMA_MGQ_MAP_8822B(x) \
2248 (((x) & BIT_MASK_TXDMA_MGQ_MAP_8822B) << BIT_SHIFT_TXDMA_MGQ_MAP_8822B)
2249 #define BIT_GET_TXDMA_MGQ_MAP_8822B(x) \
2250 (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8822B) & BIT_MASK_TXDMA_MGQ_MAP_8822B)
2252 #define BIT_SHIFT_TXDMA_BKQ_MAP_8822B 10
2253 #define BIT_MASK_TXDMA_BKQ_MAP_8822B 0x3
2254 #define BIT_TXDMA_BKQ_MAP_8822B(x) \
2255 (((x) & BIT_MASK_TXDMA_BKQ_MAP_8822B) << BIT_SHIFT_TXDMA_BKQ_MAP_8822B)
2256 #define BIT_GET_TXDMA_BKQ_MAP_8822B(x) \
2257 (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8822B) & BIT_MASK_TXDMA_BKQ_MAP_8822B)
2259 #define BIT_SHIFT_TXDMA_BEQ_MAP_8822B 8
2260 #define BIT_MASK_TXDMA_BEQ_MAP_8822B 0x3
2261 #define BIT_TXDMA_BEQ_MAP_8822B(x) \
2262 (((x) & BIT_MASK_TXDMA_BEQ_MAP_8822B) << BIT_SHIFT_TXDMA_BEQ_MAP_8822B)
2263 #define BIT_GET_TXDMA_BEQ_MAP_8822B(x) \
2264 (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8822B) & BIT_MASK_TXDMA_BEQ_MAP_8822B)
2266 #define BIT_SHIFT_TXDMA_VIQ_MAP_8822B 6
2267 #define BIT_MASK_TXDMA_VIQ_MAP_8822B 0x3
2268 #define BIT_TXDMA_VIQ_MAP_8822B(x) \
2269 (((x) & BIT_MASK_TXDMA_VIQ_MAP_8822B) << BIT_SHIFT_TXDMA_VIQ_MAP_8822B)
2270 #define BIT_GET_TXDMA_VIQ_MAP_8822B(x) \
2271 (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8822B) & BIT_MASK_TXDMA_VIQ_MAP_8822B)
2273 #define BIT_SHIFT_TXDMA_VOQ_MAP_8822B 4
2274 #define BIT_MASK_TXDMA_VOQ_MAP_8822B 0x3
2275 #define BIT_TXDMA_VOQ_MAP_8822B(x) \
2276 (((x) & BIT_MASK_TXDMA_VOQ_MAP_8822B) << BIT_SHIFT_TXDMA_VOQ_MAP_8822B)
2277 #define BIT_GET_TXDMA_VOQ_MAP_8822B(x) \
2278 (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8822B) & BIT_MASK_TXDMA_VOQ_MAP_8822B)
2280 #define BIT_RXDMA_AGG_EN_8822B BIT(2)
2281 #define BIT_RXSHFT_EN_8822B BIT(1)
2282 #define BIT_RXDMA_ARBBW_EN_8822B BIT(0)
2284 /* 2 REG_TRXFF_BNDY_8822B */
2286 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8822B 8
2287 #define BIT_MASK_RXFFOVFL_RSV_V2_8822B 0xf
2288 #define BIT_RXFFOVFL_RSV_V2_8822B(x) \
2289 (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8822B) \
2290 << BIT_SHIFT_RXFFOVFL_RSV_V2_8822B)
2291 #define BIT_GET_RXFFOVFL_RSV_V2_8822B(x) \
2292 (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8822B) & \
2293 BIT_MASK_RXFFOVFL_RSV_V2_8822B)
2295 #define BIT_SHIFT_TXPKTBUF_PGBNDY_8822B 0
2296 #define BIT_MASK_TXPKTBUF_PGBNDY_8822B 0xff
2297 #define BIT_TXPKTBUF_PGBNDY_8822B(x) \
2298 (((x) & BIT_MASK_TXPKTBUF_PGBNDY_8822B) \
2299 << BIT_SHIFT_TXPKTBUF_PGBNDY_8822B)
2300 #define BIT_GET_TXPKTBUF_PGBNDY_8822B(x) \
2301 (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8822B) & \
2302 BIT_MASK_TXPKTBUF_PGBNDY_8822B)
2304 /* 2 REG_PTA_I2C_MBOX_8822B */
2306 /* 2 REG_NOT_VALID_8822B */
2308 #define BIT_SHIFT_I2C_M_STATUS_8822B 8
2309 #define BIT_MASK_I2C_M_STATUS_8822B 0xf
2310 #define BIT_I2C_M_STATUS_8822B(x) \
2311 (((x) & BIT_MASK_I2C_M_STATUS_8822B) << BIT_SHIFT_I2C_M_STATUS_8822B)
2312 #define BIT_GET_I2C_M_STATUS_8822B(x) \
2313 (((x) >> BIT_SHIFT_I2C_M_STATUS_8822B) & BIT_MASK_I2C_M_STATUS_8822B)
2315 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B 4
2316 #define BIT_MASK_I2C_M_BUS_GNT_FW_8822B 0x7
2317 #define BIT_I2C_M_BUS_GNT_FW_8822B(x) \
2318 (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B) \
2319 << BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B)
2320 #define BIT_GET_I2C_M_BUS_GNT_FW_8822B(x) \
2321 (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B) & \
2322 BIT_MASK_I2C_M_BUS_GNT_FW_8822B)
2324 #define BIT_I2C_M_GNT_FW_8822B BIT(3)
2326 #define BIT_SHIFT_I2C_M_SPEED_8822B 1
2327 #define BIT_MASK_I2C_M_SPEED_8822B 0x3
2328 #define BIT_I2C_M_SPEED_8822B(x) \
2329 (((x) & BIT_MASK_I2C_M_SPEED_8822B) << BIT_SHIFT_I2C_M_SPEED_8822B)
2330 #define BIT_GET_I2C_M_SPEED_8822B(x) \
2331 (((x) >> BIT_SHIFT_I2C_M_SPEED_8822B) & BIT_MASK_I2C_M_SPEED_8822B)
2333 #define BIT_I2C_M_UNLOCK_8822B BIT(0)
2335 /* 2 REG_RXFF_BNDY_8822B */
2337 /* 2 REG_NOT_VALID_8822B */
2339 #define BIT_SHIFT_RXFF0_BNDY_V2_8822B 0
2340 #define BIT_MASK_RXFF0_BNDY_V2_8822B 0x3ffff
2341 #define BIT_RXFF0_BNDY_V2_8822B(x) \
2342 (((x) & BIT_MASK_RXFF0_BNDY_V2_8822B) << BIT_SHIFT_RXFF0_BNDY_V2_8822B)
2343 #define BIT_GET_RXFF0_BNDY_V2_8822B(x) \
2344 (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8822B) & BIT_MASK_RXFF0_BNDY_V2_8822B)
2346 /* 2 REG_FE1IMR_8822B */
2347 #define BIT_FS_RXDMA2_DONE_INT_EN_8822B BIT(28)
2348 #define BIT_FS_RXDONE3_INT_EN_8822B BIT(27)
2349 #define BIT_FS_RXDONE2_INT_EN_8822B BIT(26)
2350 #define BIT_FS_RX_BCN_P4_INT_EN_8822B BIT(25)
2351 #define BIT_FS_RX_BCN_P3_INT_EN_8822B BIT(24)
2352 #define BIT_FS_RX_BCN_P2_INT_EN_8822B BIT(23)
2353 #define BIT_FS_RX_BCN_P1_INT_EN_8822B BIT(22)
2354 #define BIT_FS_RX_BCN_P0_INT_EN_8822B BIT(21)
2355 #define BIT_FS_RX_UMD0_INT_EN_8822B BIT(20)
2356 #define BIT_FS_RX_UMD1_INT_EN_8822B BIT(19)
2357 #define BIT_FS_RX_BMD0_INT_EN_8822B BIT(18)
2358 #define BIT_FS_RX_BMD1_INT_EN_8822B BIT(17)
2359 #define BIT_FS_RXDONE_INT_EN_8822B BIT(16)
2360 #define BIT_FS_WWLAN_INT_EN_8822B BIT(15)
2361 #define BIT_FS_SOUND_DONE_INT_EN_8822B BIT(14)
2362 #define BIT_FS_LP_STBY_INT_EN_8822B BIT(13)
2363 #define BIT_FS_TRL_MTR_INT_EN_8822B BIT(12)
2364 #define BIT_FS_BF1_PRETO_INT_EN_8822B BIT(11)
2365 #define BIT_FS_BF0_PRETO_INT_EN_8822B BIT(10)
2366 #define BIT_FS_PTCL_RELEASE_MACID_INT_EN_8822B BIT(9)
2367 #define BIT_FS_LTE_COEX_EN_8822B BIT(6)
2368 #define BIT_FS_WLACTOFF_INT_EN_8822B BIT(5)
2369 #define BIT_FS_WLACTON_INT_EN_8822B BIT(4)
2370 #define BIT_FS_BTCMD_INT_EN_8822B BIT(3)
2371 #define BIT_FS_REG_MAILBOX_TO_I2C_INT_EN_8822B BIT(2)
2372 #define BIT_FS_TRPC_TO_INT_EN_V1_8822B BIT(1)
2373 #define BIT_FS_RPC_O_T_INT_EN_V1_8822B BIT(0)
2375 /* 2 REG_FE1ISR_8822B */
2376 #define BIT_FS_RXDMA2_DONE_INT_8822B BIT(28)
2377 #define BIT_FS_RXDONE3_INT_8822B BIT(27)
2378 #define BIT_FS_RXDONE2_INT_8822B BIT(26)
2379 #define BIT_FS_RX_BCN_P4_INT_8822B BIT(25)
2380 #define BIT_FS_RX_BCN_P3_INT_8822B BIT(24)
2381 #define BIT_FS_RX_BCN_P2_INT_8822B BIT(23)
2382 #define BIT_FS_RX_BCN_P1_INT_8822B BIT(22)
2383 #define BIT_FS_RX_BCN_P0_INT_8822B BIT(21)
2384 #define BIT_FS_RX_UMD0_INT_8822B BIT(20)
2385 #define BIT_FS_RX_UMD1_INT_8822B BIT(19)
2386 #define BIT_FS_RX_BMD0_INT_8822B BIT(18)
2387 #define BIT_FS_RX_BMD1_INT_8822B BIT(17)
2388 #define BIT_FS_RXDONE_INT_8822B BIT(16)
2389 #define BIT_FS_WWLAN_INT_8822B BIT(15)
2390 #define BIT_FS_SOUND_DONE_INT_8822B BIT(14)
2391 #define BIT_FS_LP_STBY_INT_8822B BIT(13)
2392 #define BIT_FS_TRL_MTR_INT_8822B BIT(12)
2393 #define BIT_FS_BF1_PRETO_INT_8822B BIT(11)
2394 #define BIT_FS_BF0_PRETO_INT_8822B BIT(10)
2395 #define BIT_FS_PTCL_RELEASE_MACID_INT_8822B BIT(9)
2396 #define BIT_FS_LTE_COEX_INT_8822B BIT(6)
2397 #define BIT_FS_WLACTOFF_INT_8822B BIT(5)
2398 #define BIT_FS_WLACTON_INT_8822B BIT(4)
2399 #define BIT_FS_BCN_RX_INT_INT_8822B BIT(3)
2400 #define BIT_FS_MAILBOX_TO_I2C_INT_8822B BIT(2)
2401 #define BIT_FS_TRPC_TO_INT_8822B BIT(1)
2402 #define BIT_FS_RPC_O_T_INT_8822B BIT(0)
2404 /* 2 REG_NOT_VALID_8822B */
2406 /* 2 REG_CPWM_8822B */
2407 #define BIT_CPWM_TOGGLING_8822B BIT(31)
2409 #define BIT_SHIFT_CPWM_MOD_8822B 24
2410 #define BIT_MASK_CPWM_MOD_8822B 0x7f
2411 #define BIT_CPWM_MOD_8822B(x) \
2412 (((x) & BIT_MASK_CPWM_MOD_8822B) << BIT_SHIFT_CPWM_MOD_8822B)
2413 #define BIT_GET_CPWM_MOD_8822B(x) \
2414 (((x) >> BIT_SHIFT_CPWM_MOD_8822B) & BIT_MASK_CPWM_MOD_8822B)
2416 /* 2 REG_FWIMR_8822B */
2417 #define BIT_FS_TXBCNOK_MB7_INT_EN_8822B BIT(31)
2418 #define BIT_FS_TXBCNOK_MB6_INT_EN_8822B BIT(30)
2419 #define BIT_FS_TXBCNOK_MB5_INT_EN_8822B BIT(29)
2420 #define BIT_FS_TXBCNOK_MB4_INT_EN_8822B BIT(28)
2421 #define BIT_FS_TXBCNOK_MB3_INT_EN_8822B BIT(27)
2422 #define BIT_FS_TXBCNOK_MB2_INT_EN_8822B BIT(26)
2423 #define BIT_FS_TXBCNOK_MB1_INT_EN_8822B BIT(25)
2424 #define BIT_FS_TXBCNOK_MB0_INT_EN_8822B BIT(24)
2425 #define BIT_FS_TXBCNERR_MB7_INT_EN_8822B BIT(23)
2426 #define BIT_FS_TXBCNERR_MB6_INT_EN_8822B BIT(22)
2427 #define BIT_FS_TXBCNERR_MB5_INT_EN_8822B BIT(21)
2428 #define BIT_FS_TXBCNERR_MB4_INT_EN_8822B BIT(20)
2429 #define BIT_FS_TXBCNERR_MB3_INT_EN_8822B BIT(19)
2430 #define BIT_FS_TXBCNERR_MB2_INT_EN_8822B BIT(18)
2431 #define BIT_FS_TXBCNERR_MB1_INT_EN_8822B BIT(17)
2432 #define BIT_FS_TXBCNERR_MB0_INT_EN_8822B BIT(16)
2433 #define BIT_CPU_MGQ_TXDONE_INT_EN_8822B BIT(15)
2434 #define BIT_SIFS_OVERSPEC_INT_EN_8822B BIT(14)
2435 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_EN_8822B BIT(13)
2436 #define BIT_FS_MGNTQFF_TO_INT_EN_8822B BIT(12)
2437 #define BIT_FS_DDMA1_LP_INT_EN_8822B BIT(11)
2438 #define BIT_FS_DDMA1_HP_INT_EN_8822B BIT(10)
2439 #define BIT_FS_DDMA0_LP_INT_EN_8822B BIT(9)
2440 #define BIT_FS_DDMA0_HP_INT_EN_8822B BIT(8)
2441 #define BIT_FS_TRXRPT_INT_EN_8822B BIT(7)
2442 #define BIT_FS_C2H_W_READY_INT_EN_8822B BIT(6)
2443 #define BIT_FS_HRCV_INT_EN_8822B BIT(5)
2444 #define BIT_FS_H2CCMD_INT_EN_8822B BIT(4)
2445 #define BIT_FS_TXPKTIN_INT_EN_8822B BIT(3)
2446 #define BIT_FS_ERRORHDL_INT_EN_8822B BIT(2)
2447 #define BIT_FS_TXCCX_INT_EN_8822B BIT(1)
2448 #define BIT_FS_TXCLOSE_INT_EN_8822B BIT(0)
2450 /* 2 REG_FWISR_8822B */
2451 #define BIT_FS_TXBCNOK_MB7_INT_8822B BIT(31)
2452 #define BIT_FS_TXBCNOK_MB6_INT_8822B BIT(30)
2453 #define BIT_FS_TXBCNOK_MB5_INT_8822B BIT(29)
2454 #define BIT_FS_TXBCNOK_MB4_INT_8822B BIT(28)
2455 #define BIT_FS_TXBCNOK_MB3_INT_8822B BIT(27)
2456 #define BIT_FS_TXBCNOK_MB2_INT_8822B BIT(26)
2457 #define BIT_FS_TXBCNOK_MB1_INT_8822B BIT(25)
2458 #define BIT_FS_TXBCNOK_MB0_INT_8822B BIT(24)
2459 #define BIT_FS_TXBCNERR_MB7_INT_8822B BIT(23)
2460 #define BIT_FS_TXBCNERR_MB6_INT_8822B BIT(22)
2461 #define BIT_FS_TXBCNERR_MB5_INT_8822B BIT(21)
2462 #define BIT_FS_TXBCNERR_MB4_INT_8822B BIT(20)
2463 #define BIT_FS_TXBCNERR_MB3_INT_8822B BIT(19)
2464 #define BIT_FS_TXBCNERR_MB2_INT_8822B BIT(18)
2465 #define BIT_FS_TXBCNERR_MB1_INT_8822B BIT(17)
2466 #define BIT_FS_TXBCNERR_MB0_INT_8822B BIT(16)
2467 #define BIT_CPU_MGQ_TXDONE_INT_8822B BIT(15)
2468 #define BIT_SIFS_OVERSPEC_INT_8822B BIT(14)
2469 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_8822B BIT(13)
2470 #define BIT_FS_MGNTQFF_TO_INT_8822B BIT(12)
2471 #define BIT_FS_DDMA1_LP_INT_8822B BIT(11)
2472 #define BIT_FS_DDMA1_HP_INT_8822B BIT(10)
2473 #define BIT_FS_DDMA0_LP_INT_8822B BIT(9)
2474 #define BIT_FS_DDMA0_HP_INT_8822B BIT(8)
2475 #define BIT_FS_TRXRPT_INT_8822B BIT(7)
2476 #define BIT_FS_C2H_W_READY_INT_8822B BIT(6)
2477 #define BIT_FS_HRCV_INT_8822B BIT(5)
2478 #define BIT_FS_H2CCMD_INT_8822B BIT(4)
2479 #define BIT_FS_TXPKTIN_INT_8822B BIT(3)
2480 #define BIT_FS_ERRORHDL_INT_8822B BIT(2)
2481 #define BIT_FS_TXCCX_INT_8822B BIT(1)
2482 #define BIT_FS_TXCLOSE_INT_8822B BIT(0)
2484 /* 2 REG_FTIMR_8822B */
2485 #define BIT_PS_TIMER_C_EARLY_INT_EN_8822B BIT(23)
2486 #define BIT_PS_TIMER_B_EARLY_INT_EN_8822B BIT(22)
2487 #define BIT_PS_TIMER_A_EARLY_INT_EN_8822B BIT(21)
2488 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_EN_8822B BIT(20)
2489 #define BIT_PS_TIMER_C_INT_EN_8822B BIT(19)
2490 #define BIT_PS_TIMER_B_INT_EN_8822B BIT(18)
2491 #define BIT_PS_TIMER_A_INT_EN_8822B BIT(17)
2492 #define BIT_CPUMGQ_TX_TIMER_INT_EN_8822B BIT(16)
2493 #define BIT_FS_PS_TIMEOUT2_EN_8822B BIT(15)
2494 #define BIT_FS_PS_TIMEOUT1_EN_8822B BIT(14)
2495 #define BIT_FS_PS_TIMEOUT0_EN_8822B BIT(13)
2496 #define BIT_FS_GTINT8_EN_8822B BIT(8)
2497 #define BIT_FS_GTINT7_EN_8822B BIT(7)
2498 #define BIT_FS_GTINT6_EN_8822B BIT(6)
2499 #define BIT_FS_GTINT5_EN_8822B BIT(5)
2500 #define BIT_FS_GTINT4_EN_8822B BIT(4)
2501 #define BIT_FS_GTINT3_EN_8822B BIT(3)
2502 #define BIT_FS_GTINT2_EN_8822B BIT(2)
2503 #define BIT_FS_GTINT1_EN_8822B BIT(1)
2504 #define BIT_FS_GTINT0_EN_8822B BIT(0)
2506 /* 2 REG_FTISR_8822B */
2507 #define BIT_PS_TIMER_C_EARLY__INT_8822B BIT(23)
2508 #define BIT_PS_TIMER_B_EARLY__INT_8822B BIT(22)
2509 #define BIT_PS_TIMER_A_EARLY__INT_8822B BIT(21)
2510 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_8822B BIT(20)
2511 #define BIT_PS_TIMER_C_INT_8822B BIT(19)
2512 #define BIT_PS_TIMER_B_INT_8822B BIT(18)
2513 #define BIT_PS_TIMER_A_INT_8822B BIT(17)
2514 #define BIT_CPUMGQ_TX_TIMER_INT_8822B BIT(16)
2515 #define BIT_FS_PS_TIMEOUT2_INT_8822B BIT(15)
2516 #define BIT_FS_PS_TIMEOUT1_INT_8822B BIT(14)
2517 #define BIT_FS_PS_TIMEOUT0_INT_8822B BIT(13)
2518 #define BIT_FS_GTINT8_INT_8822B BIT(8)
2519 #define BIT_FS_GTINT7_INT_8822B BIT(7)
2520 #define BIT_FS_GTINT6_INT_8822B BIT(6)
2521 #define BIT_FS_GTINT5_INT_8822B BIT(5)
2522 #define BIT_FS_GTINT4_INT_8822B BIT(4)
2523 #define BIT_FS_GTINT3_INT_8822B BIT(3)
2524 #define BIT_FS_GTINT2_INT_8822B BIT(2)
2525 #define BIT_FS_GTINT1_INT_8822B BIT(1)
2526 #define BIT_FS_GTINT0_INT_8822B BIT(0)
2528 /* 2 REG_PKTBUF_DBG_CTRL_8822B */
2530 #define BIT_SHIFT_PKTBUF_WRITE_EN_8822B 24
2531 #define BIT_MASK_PKTBUF_WRITE_EN_8822B 0xff
2532 #define BIT_PKTBUF_WRITE_EN_8822B(x) \
2533 (((x) & BIT_MASK_PKTBUF_WRITE_EN_8822B) \
2534 << BIT_SHIFT_PKTBUF_WRITE_EN_8822B)
2535 #define BIT_GET_PKTBUF_WRITE_EN_8822B(x) \
2536 (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8822B) & \
2537 BIT_MASK_PKTBUF_WRITE_EN_8822B)
2539 #define BIT_TXRPTBUF_DBG_8822B BIT(23)
2541 /* 2 REG_NOT_VALID_8822B */
2542 #define BIT_TXPKTBUF_DBG_V2_8822B BIT(20)
2543 #define BIT_RXPKTBUF_DBG_8822B BIT(16)
2545 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8822B 0
2546 #define BIT_MASK_PKTBUF_DBG_ADDR_8822B 0x1fff
2547 #define BIT_PKTBUF_DBG_ADDR_8822B(x) \
2548 (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8822B) \
2549 << BIT_SHIFT_PKTBUF_DBG_ADDR_8822B)
2550 #define BIT_GET_PKTBUF_DBG_ADDR_8822B(x) \
2551 (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8822B) & \
2552 BIT_MASK_PKTBUF_DBG_ADDR_8822B)
2554 /* 2 REG_PKTBUF_DBG_DATA_L_8822B */
2556 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B 0
2557 #define BIT_MASK_PKTBUF_DBG_DATA_L_8822B 0xffffffffL
2558 #define BIT_PKTBUF_DBG_DATA_L_8822B(x) \
2559 (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B) \
2560 << BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B)
2561 #define BIT_GET_PKTBUF_DBG_DATA_L_8822B(x) \
2562 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B) & \
2563 BIT_MASK_PKTBUF_DBG_DATA_L_8822B)
2565 /* 2 REG_PKTBUF_DBG_DATA_H_8822B */
2567 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B 0
2568 #define BIT_MASK_PKTBUF_DBG_DATA_H_8822B 0xffffffffL
2569 #define BIT_PKTBUF_DBG_DATA_H_8822B(x) \
2570 (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B) \
2571 << BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B)
2572 #define BIT_GET_PKTBUF_DBG_DATA_H_8822B(x) \
2573 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B) & \
2574 BIT_MASK_PKTBUF_DBG_DATA_H_8822B)
2576 /* 2 REG_CPWM2_8822B */
2578 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8822B 16
2579 #define BIT_MASK_L0S_TO_RCVY_NUM_8822B 0xff
2580 #define BIT_L0S_TO_RCVY_NUM_8822B(x) \
2581 (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8822B) \
2582 << BIT_SHIFT_L0S_TO_RCVY_NUM_8822B)
2583 #define BIT_GET_L0S_TO_RCVY_NUM_8822B(x) \
2584 (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8822B) & \
2585 BIT_MASK_L0S_TO_RCVY_NUM_8822B)
2587 #define BIT_CPWM2_TOGGLING_8822B BIT(15)
2589 #define BIT_SHIFT_CPWM2_MOD_8822B 0
2590 #define BIT_MASK_CPWM2_MOD_8822B 0x7fff
2591 #define BIT_CPWM2_MOD_8822B(x) \
2592 (((x) & BIT_MASK_CPWM2_MOD_8822B) << BIT_SHIFT_CPWM2_MOD_8822B)
2593 #define BIT_GET_CPWM2_MOD_8822B(x) \
2594 (((x) >> BIT_SHIFT_CPWM2_MOD_8822B) & BIT_MASK_CPWM2_MOD_8822B)
2596 /* 2 REG_NOT_VALID_8822B */
2598 /* 2 REG_TC0_CTRL_8822B */
2599 #define BIT_TC0INT_EN_8822B BIT(26)
2600 #define BIT_TC0MODE_8822B BIT(25)
2601 #define BIT_TC0EN_8822B BIT(24)
2603 #define BIT_SHIFT_TC0DATA_8822B 0
2604 #define BIT_MASK_TC0DATA_8822B 0xffffff
2605 #define BIT_TC0DATA_8822B(x) \
2606 (((x) & BIT_MASK_TC0DATA_8822B) << BIT_SHIFT_TC0DATA_8822B)
2607 #define BIT_GET_TC0DATA_8822B(x) \
2608 (((x) >> BIT_SHIFT_TC0DATA_8822B) & BIT_MASK_TC0DATA_8822B)
2610 /* 2 REG_TC1_CTRL_8822B */
2611 #define BIT_TC1INT_EN_8822B BIT(26)
2612 #define BIT_TC1MODE_8822B BIT(25)
2613 #define BIT_TC1EN_8822B BIT(24)
2615 #define BIT_SHIFT_TC1DATA_8822B 0
2616 #define BIT_MASK_TC1DATA_8822B 0xffffff
2617 #define BIT_TC1DATA_8822B(x) \
2618 (((x) & BIT_MASK_TC1DATA_8822B) << BIT_SHIFT_TC1DATA_8822B)
2619 #define BIT_GET_TC1DATA_8822B(x) \
2620 (((x) >> BIT_SHIFT_TC1DATA_8822B) & BIT_MASK_TC1DATA_8822B)
2622 /* 2 REG_TC2_CTRL_8822B */
2623 #define BIT_TC2INT_EN_8822B BIT(26)
2624 #define BIT_TC2MODE_8822B BIT(25)
2625 #define BIT_TC2EN_8822B BIT(24)
2627 #define BIT_SHIFT_TC2DATA_8822B 0
2628 #define BIT_MASK_TC2DATA_8822B 0xffffff
2629 #define BIT_TC2DATA_8822B(x) \
2630 (((x) & BIT_MASK_TC2DATA_8822B) << BIT_SHIFT_TC2DATA_8822B)
2631 #define BIT_GET_TC2DATA_8822B(x) \
2632 (((x) >> BIT_SHIFT_TC2DATA_8822B) & BIT_MASK_TC2DATA_8822B)
2634 /* 2 REG_TC3_CTRL_8822B */
2635 #define BIT_TC3INT_EN_8822B BIT(26)
2636 #define BIT_TC3MODE_8822B BIT(25)
2637 #define BIT_TC3EN_8822B BIT(24)
2639 #define BIT_SHIFT_TC3DATA_8822B 0
2640 #define BIT_MASK_TC3DATA_8822B 0xffffff
2641 #define BIT_TC3DATA_8822B(x) \
2642 (((x) & BIT_MASK_TC3DATA_8822B) << BIT_SHIFT_TC3DATA_8822B)
2643 #define BIT_GET_TC3DATA_8822B(x) \
2644 (((x) >> BIT_SHIFT_TC3DATA_8822B) & BIT_MASK_TC3DATA_8822B)
2646 /* 2 REG_TC4_CTRL_8822B */
2647 #define BIT_TC4INT_EN_8822B BIT(26)
2648 #define BIT_TC4MODE_8822B BIT(25)
2649 #define BIT_TC4EN_8822B BIT(24)
2651 #define BIT_SHIFT_TC4DATA_8822B 0
2652 #define BIT_MASK_TC4DATA_8822B 0xffffff
2653 #define BIT_TC4DATA_8822B(x) \
2654 (((x) & BIT_MASK_TC4DATA_8822B) << BIT_SHIFT_TC4DATA_8822B)
2655 #define BIT_GET_TC4DATA_8822B(x) \
2656 (((x) >> BIT_SHIFT_TC4DATA_8822B) & BIT_MASK_TC4DATA_8822B)
2658 /* 2 REG_TCUNIT_BASE_8822B */
2660 #define BIT_SHIFT_TCUNIT_BASE_8822B 0
2661 #define BIT_MASK_TCUNIT_BASE_8822B 0x3fff
2662 #define BIT_TCUNIT_BASE_8822B(x) \
2663 (((x) & BIT_MASK_TCUNIT_BASE_8822B) << BIT_SHIFT_TCUNIT_BASE_8822B)
2664 #define BIT_GET_TCUNIT_BASE_8822B(x) \
2665 (((x) >> BIT_SHIFT_TCUNIT_BASE_8822B) & BIT_MASK_TCUNIT_BASE_8822B)
2667 /* 2 REG_TC5_CTRL_8822B */
2668 #define BIT_TC5INT_EN_8822B BIT(26)
2669 #define BIT_TC5MODE_8822B BIT(25)
2670 #define BIT_TC5EN_8822B BIT(24)
2672 #define BIT_SHIFT_TC5DATA_8822B 0
2673 #define BIT_MASK_TC5DATA_8822B 0xffffff
2674 #define BIT_TC5DATA_8822B(x) \
2675 (((x) & BIT_MASK_TC5DATA_8822B) << BIT_SHIFT_TC5DATA_8822B)
2676 #define BIT_GET_TC5DATA_8822B(x) \
2677 (((x) >> BIT_SHIFT_TC5DATA_8822B) & BIT_MASK_TC5DATA_8822B)
2679 /* 2 REG_TC6_CTRL_8822B */
2680 #define BIT_TC6INT_EN_8822B BIT(26)
2681 #define BIT_TC6MODE_8822B BIT(25)
2682 #define BIT_TC6EN_8822B BIT(24)
2684 #define BIT_SHIFT_TC6DATA_8822B 0
2685 #define BIT_MASK_TC6DATA_8822B 0xffffff
2686 #define BIT_TC6DATA_8822B(x) \
2687 (((x) & BIT_MASK_TC6DATA_8822B) << BIT_SHIFT_TC6DATA_8822B)
2688 #define BIT_GET_TC6DATA_8822B(x) \
2689 (((x) >> BIT_SHIFT_TC6DATA_8822B) & BIT_MASK_TC6DATA_8822B)
2691 /* 2 REG_MBIST_FAIL_8822B */
2693 #define BIT_SHIFT_8051_MBIST_FAIL_8822B 26
2694 #define BIT_MASK_8051_MBIST_FAIL_8822B 0x7
2695 #define BIT_8051_MBIST_FAIL_8822B(x) \
2696 (((x) & BIT_MASK_8051_MBIST_FAIL_8822B) \
2697 << BIT_SHIFT_8051_MBIST_FAIL_8822B)
2698 #define BIT_GET_8051_MBIST_FAIL_8822B(x) \
2699 (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8822B) & \
2700 BIT_MASK_8051_MBIST_FAIL_8822B)
2702 #define BIT_SHIFT_USB_MBIST_FAIL_8822B 24
2703 #define BIT_MASK_USB_MBIST_FAIL_8822B 0x3
2704 #define BIT_USB_MBIST_FAIL_8822B(x) \
2705 (((x) & BIT_MASK_USB_MBIST_FAIL_8822B) \
2706 << BIT_SHIFT_USB_MBIST_FAIL_8822B)
2707 #define BIT_GET_USB_MBIST_FAIL_8822B(x) \
2708 (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8822B) & \
2709 BIT_MASK_USB_MBIST_FAIL_8822B)
2711 #define BIT_SHIFT_PCIE_MBIST_FAIL_8822B 16
2712 #define BIT_MASK_PCIE_MBIST_FAIL_8822B 0x3f
2713 #define BIT_PCIE_MBIST_FAIL_8822B(x) \
2714 (((x) & BIT_MASK_PCIE_MBIST_FAIL_8822B) \
2715 << BIT_SHIFT_PCIE_MBIST_FAIL_8822B)
2716 #define BIT_GET_PCIE_MBIST_FAIL_8822B(x) \
2717 (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8822B) & \
2718 BIT_MASK_PCIE_MBIST_FAIL_8822B)
2720 #define BIT_SHIFT_MAC_MBIST_FAIL_8822B 0
2721 #define BIT_MASK_MAC_MBIST_FAIL_8822B 0xfff
2722 #define BIT_MAC_MBIST_FAIL_8822B(x) \
2723 (((x) & BIT_MASK_MAC_MBIST_FAIL_8822B) \
2724 << BIT_SHIFT_MAC_MBIST_FAIL_8822B)
2725 #define BIT_GET_MAC_MBIST_FAIL_8822B(x) \
2726 (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8822B) & \
2727 BIT_MASK_MAC_MBIST_FAIL_8822B)
2729 /* 2 REG_MBIST_START_PAUSE_8822B */
2731 #define BIT_SHIFT_8051_MBIST_START_PAUSE_8822B 26
2732 #define BIT_MASK_8051_MBIST_START_PAUSE_8822B 0x7
2733 #define BIT_8051_MBIST_START_PAUSE_8822B(x) \
2734 (((x) & BIT_MASK_8051_MBIST_START_PAUSE_8822B) \
2735 << BIT_SHIFT_8051_MBIST_START_PAUSE_8822B)
2736 #define BIT_GET_8051_MBIST_START_PAUSE_8822B(x) \
2737 (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8822B) & \
2738 BIT_MASK_8051_MBIST_START_PAUSE_8822B)
2740 #define BIT_SHIFT_USB_MBIST_START_PAUSE_8822B 24
2741 #define BIT_MASK_USB_MBIST_START_PAUSE_8822B 0x3
2742 #define BIT_USB_MBIST_START_PAUSE_8822B(x) \
2743 (((x) & BIT_MASK_USB_MBIST_START_PAUSE_8822B) \
2744 << BIT_SHIFT_USB_MBIST_START_PAUSE_8822B)
2745 #define BIT_GET_USB_MBIST_START_PAUSE_8822B(x) \
2746 (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8822B) & \
2747 BIT_MASK_USB_MBIST_START_PAUSE_8822B)
2749 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B 16
2750 #define BIT_MASK_PCIE_MBIST_START_PAUSE_8822B 0x3f
2751 #define BIT_PCIE_MBIST_START_PAUSE_8822B(x) \
2752 (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_8822B) \
2753 << BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B)
2754 #define BIT_GET_PCIE_MBIST_START_PAUSE_8822B(x) \
2755 (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B) & \
2756 BIT_MASK_PCIE_MBIST_START_PAUSE_8822B)
2758 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B 0
2759 #define BIT_MASK_MAC_MBIST_START_PAUSE_8822B 0xfff
2760 #define BIT_MAC_MBIST_START_PAUSE_8822B(x) \
2761 (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_8822B) \
2762 << BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B)
2763 #define BIT_GET_MAC_MBIST_START_PAUSE_8822B(x) \
2764 (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B) & \
2765 BIT_MASK_MAC_MBIST_START_PAUSE_8822B)
2767 /* 2 REG_MBIST_DONE_8822B */
2769 #define BIT_SHIFT_8051_MBIST_DONE_8822B 26
2770 #define BIT_MASK_8051_MBIST_DONE_8822B 0x7
2771 #define BIT_8051_MBIST_DONE_8822B(x) \
2772 (((x) & BIT_MASK_8051_MBIST_DONE_8822B) \
2773 << BIT_SHIFT_8051_MBIST_DONE_8822B)
2774 #define BIT_GET_8051_MBIST_DONE_8822B(x) \
2775 (((x) >> BIT_SHIFT_8051_MBIST_DONE_8822B) & \
2776 BIT_MASK_8051_MBIST_DONE_8822B)
2778 #define BIT_SHIFT_USB_MBIST_DONE_8822B 24
2779 #define BIT_MASK_USB_MBIST_DONE_8822B 0x3
2780 #define BIT_USB_MBIST_DONE_8822B(x) \
2781 (((x) & BIT_MASK_USB_MBIST_DONE_8822B) \
2782 << BIT_SHIFT_USB_MBIST_DONE_8822B)
2783 #define BIT_GET_USB_MBIST_DONE_8822B(x) \
2784 (((x) >> BIT_SHIFT_USB_MBIST_DONE_8822B) & \
2785 BIT_MASK_USB_MBIST_DONE_8822B)
2787 #define BIT_SHIFT_PCIE_MBIST_DONE_8822B 16
2788 #define BIT_MASK_PCIE_MBIST_DONE_8822B 0x3f
2789 #define BIT_PCIE_MBIST_DONE_8822B(x) \
2790 (((x) & BIT_MASK_PCIE_MBIST_DONE_8822B) \
2791 << BIT_SHIFT_PCIE_MBIST_DONE_8822B)
2792 #define BIT_GET_PCIE_MBIST_DONE_8822B(x) \
2793 (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8822B) & \
2794 BIT_MASK_PCIE_MBIST_DONE_8822B)
2796 #define BIT_SHIFT_MAC_MBIST_DONE_8822B 0
2797 #define BIT_MASK_MAC_MBIST_DONE_8822B 0xfff
2798 #define BIT_MAC_MBIST_DONE_8822B(x) \
2799 (((x) & BIT_MASK_MAC_MBIST_DONE_8822B) \
2800 << BIT_SHIFT_MAC_MBIST_DONE_8822B)
2801 #define BIT_GET_MAC_MBIST_DONE_8822B(x) \
2802 (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8822B) & \
2803 BIT_MASK_MAC_MBIST_DONE_8822B)
2805 /* 2 REG_MBIST_FAIL_NRML_8822B */
2807 #define BIT_SHIFT_MBIST_FAIL_NRML_8822B 0
2808 #define BIT_MASK_MBIST_FAIL_NRML_8822B 0xffffffffL
2809 #define BIT_MBIST_FAIL_NRML_8822B(x) \
2810 (((x) & BIT_MASK_MBIST_FAIL_NRML_8822B) \
2811 << BIT_SHIFT_MBIST_FAIL_NRML_8822B)
2812 #define BIT_GET_MBIST_FAIL_NRML_8822B(x) \
2813 (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8822B) & \
2814 BIT_MASK_MBIST_FAIL_NRML_8822B)
2816 /* 2 REG_AES_DECRPT_DATA_8822B */
2818 #define BIT_SHIFT_IPS_CFG_ADDR_8822B 0
2819 #define BIT_MASK_IPS_CFG_ADDR_8822B 0xff
2820 #define BIT_IPS_CFG_ADDR_8822B(x) \
2821 (((x) & BIT_MASK_IPS_CFG_ADDR_8822B) << BIT_SHIFT_IPS_CFG_ADDR_8822B)
2822 #define BIT_GET_IPS_CFG_ADDR_8822B(x) \
2823 (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8822B) & BIT_MASK_IPS_CFG_ADDR_8822B)
2825 /* 2 REG_AES_DECRPT_CFG_8822B */
2827 #define BIT_SHIFT_IPS_CFG_DATA_8822B 0
2828 #define BIT_MASK_IPS_CFG_DATA_8822B 0xffffffffL
2829 #define BIT_IPS_CFG_DATA_8822B(x) \
2830 (((x) & BIT_MASK_IPS_CFG_DATA_8822B) << BIT_SHIFT_IPS_CFG_DATA_8822B)
2831 #define BIT_GET_IPS_CFG_DATA_8822B(x) \
2832 (((x) >> BIT_SHIFT_IPS_CFG_DATA_8822B) & BIT_MASK_IPS_CFG_DATA_8822B)
2834 /* 2 REG_NOT_VALID_8822B */
2836 /* 2 REG_NOT_VALID_8822B */
2838 /* 2 REG_TMETER_8822B */
2839 #define BIT_TEMP_VALID_8822B BIT(31)
2841 #define BIT_SHIFT_TEMP_VALUE_8822B 24
2842 #define BIT_MASK_TEMP_VALUE_8822B 0x3f
2843 #define BIT_TEMP_VALUE_8822B(x) \
2844 (((x) & BIT_MASK_TEMP_VALUE_8822B) << BIT_SHIFT_TEMP_VALUE_8822B)
2845 #define BIT_GET_TEMP_VALUE_8822B(x) \
2846 (((x) >> BIT_SHIFT_TEMP_VALUE_8822B) & BIT_MASK_TEMP_VALUE_8822B)
2848 #define BIT_SHIFT_REG_TMETER_TIMER_8822B 8
2849 #define BIT_MASK_REG_TMETER_TIMER_8822B 0xfff
2850 #define BIT_REG_TMETER_TIMER_8822B(x) \
2851 (((x) & BIT_MASK_REG_TMETER_TIMER_8822B) \
2852 << BIT_SHIFT_REG_TMETER_TIMER_8822B)
2853 #define BIT_GET_REG_TMETER_TIMER_8822B(x) \
2854 (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8822B) & \
2855 BIT_MASK_REG_TMETER_TIMER_8822B)
2857 #define BIT_SHIFT_REG_TEMP_DELTA_8822B 2
2858 #define BIT_MASK_REG_TEMP_DELTA_8822B 0x3f
2859 #define BIT_REG_TEMP_DELTA_8822B(x) \
2860 (((x) & BIT_MASK_REG_TEMP_DELTA_8822B) \
2861 << BIT_SHIFT_REG_TEMP_DELTA_8822B)
2862 #define BIT_GET_REG_TEMP_DELTA_8822B(x) \
2863 (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8822B) & \
2864 BIT_MASK_REG_TEMP_DELTA_8822B)
2866 #define BIT_REG_TMETER_EN_8822B BIT(0)
2868 /* 2 REG_OSC_32K_CTRL_8822B */
2870 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8822B 16
2871 #define BIT_MASK_OSC_32K_CLKGEN_0_8822B 0xffff
2872 #define BIT_OSC_32K_CLKGEN_0_8822B(x) \
2873 (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8822B) \
2874 << BIT_SHIFT_OSC_32K_CLKGEN_0_8822B)
2875 #define BIT_GET_OSC_32K_CLKGEN_0_8822B(x) \
2876 (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8822B) & \
2877 BIT_MASK_OSC_32K_CLKGEN_0_8822B)
2879 #define BIT_SHIFT_OSC_32K_RES_COMP_8822B 4
2880 #define BIT_MASK_OSC_32K_RES_COMP_8822B 0x3
2881 #define BIT_OSC_32K_RES_COMP_8822B(x) \
2882 (((x) & BIT_MASK_OSC_32K_RES_COMP_8822B) \
2883 << BIT_SHIFT_OSC_32K_RES_COMP_8822B)
2884 #define BIT_GET_OSC_32K_RES_COMP_8822B(x) \
2885 (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8822B) & \
2886 BIT_MASK_OSC_32K_RES_COMP_8822B)
2888 #define BIT_OSC_32K_OUT_SEL_8822B BIT(3)
2889 #define BIT_ISO_WL_2_OSC_32K_8822B BIT(1)
2890 #define BIT_POW_CKGEN_8822B BIT(0)
2892 /* 2 REG_32K_CAL_REG1_8822B */
2893 #define BIT_CAL_32K_REG_WR_8822B BIT(31)
2894 #define BIT_CAL_32K_DBG_SEL_8822B BIT(22)
2896 #define BIT_SHIFT_CAL_32K_REG_ADDR_8822B 16
2897 #define BIT_MASK_CAL_32K_REG_ADDR_8822B 0x3f
2898 #define BIT_CAL_32K_REG_ADDR_8822B(x) \
2899 (((x) & BIT_MASK_CAL_32K_REG_ADDR_8822B) \
2900 << BIT_SHIFT_CAL_32K_REG_ADDR_8822B)
2901 #define BIT_GET_CAL_32K_REG_ADDR_8822B(x) \
2902 (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8822B) & \
2903 BIT_MASK_CAL_32K_REG_ADDR_8822B)
2905 #define BIT_SHIFT_CAL_32K_REG_DATA_8822B 0
2906 #define BIT_MASK_CAL_32K_REG_DATA_8822B 0xffff
2907 #define BIT_CAL_32K_REG_DATA_8822B(x) \
2908 (((x) & BIT_MASK_CAL_32K_REG_DATA_8822B) \
2909 << BIT_SHIFT_CAL_32K_REG_DATA_8822B)
2910 #define BIT_GET_CAL_32K_REG_DATA_8822B(x) \
2911 (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8822B) & \
2912 BIT_MASK_CAL_32K_REG_DATA_8822B)
2914 /* 2 REG_NOT_VALID_8822B */
2916 /* 2 REG_C2HEVT_8822B */
2918 #define BIT_SHIFT_C2HEVT_MSG_8822B 0
2919 #define BIT_MASK_C2HEVT_MSG_8822B 0xffffffffffffffffffffffffffffffffL
2920 #define BIT_C2HEVT_MSG_8822B(x) \
2921 (((x) & BIT_MASK_C2HEVT_MSG_8822B) << BIT_SHIFT_C2HEVT_MSG_8822B)
2922 #define BIT_GET_C2HEVT_MSG_8822B(x) \
2923 (((x) >> BIT_SHIFT_C2HEVT_MSG_8822B) & BIT_MASK_C2HEVT_MSG_8822B)
2925 /* 2 REG_SW_DEFINED_PAGE1_8822B */
2927 #define BIT_SHIFT_SW_DEFINED_PAGE1_8822B 0
2928 #define BIT_MASK_SW_DEFINED_PAGE1_8822B 0xffffffffffffffffL
2929 #define BIT_SW_DEFINED_PAGE1_8822B(x) \
2930 (((x) & BIT_MASK_SW_DEFINED_PAGE1_8822B) \
2931 << BIT_SHIFT_SW_DEFINED_PAGE1_8822B)
2932 #define BIT_GET_SW_DEFINED_PAGE1_8822B(x) \
2933 (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_8822B) & \
2934 BIT_MASK_SW_DEFINED_PAGE1_8822B)
2936 /* 2 REG_MCUTST_I_8822B */
2938 #define BIT_SHIFT_MCUDMSG_I_8822B 0
2939 #define BIT_MASK_MCUDMSG_I_8822B 0xffffffffL
2940 #define BIT_MCUDMSG_I_8822B(x) \
2941 (((x) & BIT_MASK_MCUDMSG_I_8822B) << BIT_SHIFT_MCUDMSG_I_8822B)
2942 #define BIT_GET_MCUDMSG_I_8822B(x) \
2943 (((x) >> BIT_SHIFT_MCUDMSG_I_8822B) & BIT_MASK_MCUDMSG_I_8822B)
2945 /* 2 REG_MCUTST_II_8822B */
2947 #define BIT_SHIFT_MCUDMSG_II_8822B 0
2948 #define BIT_MASK_MCUDMSG_II_8822B 0xffffffffL
2949 #define BIT_MCUDMSG_II_8822B(x) \
2950 (((x) & BIT_MASK_MCUDMSG_II_8822B) << BIT_SHIFT_MCUDMSG_II_8822B)
2951 #define BIT_GET_MCUDMSG_II_8822B(x) \
2952 (((x) >> BIT_SHIFT_MCUDMSG_II_8822B) & BIT_MASK_MCUDMSG_II_8822B)
2954 /* 2 REG_FMETHR_8822B */
2955 #define BIT_FMSG_INT_8822B BIT(31)
2957 #define BIT_SHIFT_FW_MSG_8822B 0
2958 #define BIT_MASK_FW_MSG_8822B 0xffffffffL
2959 #define BIT_FW_MSG_8822B(x) \
2960 (((x) & BIT_MASK_FW_MSG_8822B) << BIT_SHIFT_FW_MSG_8822B)
2961 #define BIT_GET_FW_MSG_8822B(x) \
2962 (((x) >> BIT_SHIFT_FW_MSG_8822B) & BIT_MASK_FW_MSG_8822B)
2964 /* 2 REG_HMETFR_8822B */
2966 #define BIT_SHIFT_HRCV_MSG_8822B 24
2967 #define BIT_MASK_HRCV_MSG_8822B 0xff
2968 #define BIT_HRCV_MSG_8822B(x) \
2969 (((x) & BIT_MASK_HRCV_MSG_8822B) << BIT_SHIFT_HRCV_MSG_8822B)
2970 #define BIT_GET_HRCV_MSG_8822B(x) \
2971 (((x) >> BIT_SHIFT_HRCV_MSG_8822B) & BIT_MASK_HRCV_MSG_8822B)
2973 #define BIT_INT_BOX3_8822B BIT(3)
2974 #define BIT_INT_BOX2_8822B BIT(2)
2975 #define BIT_INT_BOX1_8822B BIT(1)
2976 #define BIT_INT_BOX0_8822B BIT(0)
2978 /* 2 REG_HMEBOX0_8822B */
2980 #define BIT_SHIFT_HOST_MSG_0_8822B 0
2981 #define BIT_MASK_HOST_MSG_0_8822B 0xffffffffL
2982 #define BIT_HOST_MSG_0_8822B(x) \
2983 (((x) & BIT_MASK_HOST_MSG_0_8822B) << BIT_SHIFT_HOST_MSG_0_8822B)
2984 #define BIT_GET_HOST_MSG_0_8822B(x) \
2985 (((x) >> BIT_SHIFT_HOST_MSG_0_8822B) & BIT_MASK_HOST_MSG_0_8822B)
2987 /* 2 REG_HMEBOX1_8822B */
2989 #define BIT_SHIFT_HOST_MSG_1_8822B 0
2990 #define BIT_MASK_HOST_MSG_1_8822B 0xffffffffL
2991 #define BIT_HOST_MSG_1_8822B(x) \
2992 (((x) & BIT_MASK_HOST_MSG_1_8822B) << BIT_SHIFT_HOST_MSG_1_8822B)
2993 #define BIT_GET_HOST_MSG_1_8822B(x) \
2994 (((x) >> BIT_SHIFT_HOST_MSG_1_8822B) & BIT_MASK_HOST_MSG_1_8822B)
2996 /* 2 REG_HMEBOX2_8822B */
2998 #define BIT_SHIFT_HOST_MSG_2_8822B 0
2999 #define BIT_MASK_HOST_MSG_2_8822B 0xffffffffL
3000 #define BIT_HOST_MSG_2_8822B(x) \
3001 (((x) & BIT_MASK_HOST_MSG_2_8822B) << BIT_SHIFT_HOST_MSG_2_8822B)
3002 #define BIT_GET_HOST_MSG_2_8822B(x) \
3003 (((x) >> BIT_SHIFT_HOST_MSG_2_8822B) & BIT_MASK_HOST_MSG_2_8822B)
3005 /* 2 REG_HMEBOX3_8822B */
3007 #define BIT_SHIFT_HOST_MSG_3_8822B 0
3008 #define BIT_MASK_HOST_MSG_3_8822B 0xffffffffL
3009 #define BIT_HOST_MSG_3_8822B(x) \
3010 (((x) & BIT_MASK_HOST_MSG_3_8822B) << BIT_SHIFT_HOST_MSG_3_8822B)
3011 #define BIT_GET_HOST_MSG_3_8822B(x) \
3012 (((x) >> BIT_SHIFT_HOST_MSG_3_8822B) & BIT_MASK_HOST_MSG_3_8822B)
3014 /* 2 REG_LLT_INIT_8822B */
3016 #define BIT_SHIFT_LLTE_RWM_8822B 30
3017 #define BIT_MASK_LLTE_RWM_8822B 0x3
3018 #define BIT_LLTE_RWM_8822B(x) \
3019 (((x) & BIT_MASK_LLTE_RWM_8822B) << BIT_SHIFT_LLTE_RWM_8822B)
3020 #define BIT_GET_LLTE_RWM_8822B(x) \
3021 (((x) >> BIT_SHIFT_LLTE_RWM_8822B) & BIT_MASK_LLTE_RWM_8822B)
3023 #define BIT_SHIFT_LLTINI_PDATA_V1_8822B 16
3024 #define BIT_MASK_LLTINI_PDATA_V1_8822B 0xfff
3025 #define BIT_LLTINI_PDATA_V1_8822B(x) \
3026 (((x) & BIT_MASK_LLTINI_PDATA_V1_8822B) \
3027 << BIT_SHIFT_LLTINI_PDATA_V1_8822B)
3028 #define BIT_GET_LLTINI_PDATA_V1_8822B(x) \
3029 (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8822B) & \
3030 BIT_MASK_LLTINI_PDATA_V1_8822B)
3032 #define BIT_SHIFT_LLTINI_HDATA_V1_8822B 0
3033 #define BIT_MASK_LLTINI_HDATA_V1_8822B 0xfff
3034 #define BIT_LLTINI_HDATA_V1_8822B(x) \
3035 (((x) & BIT_MASK_LLTINI_HDATA_V1_8822B) \
3036 << BIT_SHIFT_LLTINI_HDATA_V1_8822B)
3037 #define BIT_GET_LLTINI_HDATA_V1_8822B(x) \
3038 (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8822B) & \
3039 BIT_MASK_LLTINI_HDATA_V1_8822B)
3041 /* 2 REG_LLT_INIT_ADDR_8822B */
3043 #define BIT_SHIFT_LLTINI_ADDR_V1_8822B 0
3044 #define BIT_MASK_LLTINI_ADDR_V1_8822B 0xfff
3045 #define BIT_LLTINI_ADDR_V1_8822B(x) \
3046 (((x) & BIT_MASK_LLTINI_ADDR_V1_8822B) \
3047 << BIT_SHIFT_LLTINI_ADDR_V1_8822B)
3048 #define BIT_GET_LLTINI_ADDR_V1_8822B(x) \
3049 (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8822B) & \
3050 BIT_MASK_LLTINI_ADDR_V1_8822B)
3052 /* 2 REG_BB_ACCESS_CTRL_8822B */
3054 #define BIT_SHIFT_BB_WRITE_READ_8822B 30
3055 #define BIT_MASK_BB_WRITE_READ_8822B 0x3
3056 #define BIT_BB_WRITE_READ_8822B(x) \
3057 (((x) & BIT_MASK_BB_WRITE_READ_8822B) << BIT_SHIFT_BB_WRITE_READ_8822B)
3058 #define BIT_GET_BB_WRITE_READ_8822B(x) \
3059 (((x) >> BIT_SHIFT_BB_WRITE_READ_8822B) & BIT_MASK_BB_WRITE_READ_8822B)
3061 #define BIT_SHIFT_BB_WRITE_EN_8822B 12
3062 #define BIT_MASK_BB_WRITE_EN_8822B 0xf
3063 #define BIT_BB_WRITE_EN_8822B(x) \
3064 (((x) & BIT_MASK_BB_WRITE_EN_8822B) << BIT_SHIFT_BB_WRITE_EN_8822B)
3065 #define BIT_GET_BB_WRITE_EN_8822B(x) \
3066 (((x) >> BIT_SHIFT_BB_WRITE_EN_8822B) & BIT_MASK_BB_WRITE_EN_8822B)
3068 #define BIT_SHIFT_BB_ADDR_8822B 2
3069 #define BIT_MASK_BB_ADDR_8822B 0x1ff
3070 #define BIT_BB_ADDR_8822B(x) \
3071 (((x) & BIT_MASK_BB_ADDR_8822B) << BIT_SHIFT_BB_ADDR_8822B)
3072 #define BIT_GET_BB_ADDR_8822B(x) \
3073 (((x) >> BIT_SHIFT_BB_ADDR_8822B) & BIT_MASK_BB_ADDR_8822B)
3075 #define BIT_BB_ERRACC_8822B BIT(0)
3077 /* 2 REG_BB_ACCESS_DATA_8822B */
3079 #define BIT_SHIFT_BB_DATA_8822B 0
3080 #define BIT_MASK_BB_DATA_8822B 0xffffffffL
3081 #define BIT_BB_DATA_8822B(x) \
3082 (((x) & BIT_MASK_BB_DATA_8822B) << BIT_SHIFT_BB_DATA_8822B)
3083 #define BIT_GET_BB_DATA_8822B(x) \
3084 (((x) >> BIT_SHIFT_BB_DATA_8822B) & BIT_MASK_BB_DATA_8822B)
3086 /* 2 REG_HMEBOX_E0_8822B */
3088 #define BIT_SHIFT_HMEBOX_E0_8822B 0
3089 #define BIT_MASK_HMEBOX_E0_8822B 0xffffffffL
3090 #define BIT_HMEBOX_E0_8822B(x) \
3091 (((x) & BIT_MASK_HMEBOX_E0_8822B) << BIT_SHIFT_HMEBOX_E0_8822B)
3092 #define BIT_GET_HMEBOX_E0_8822B(x) \
3093 (((x) >> BIT_SHIFT_HMEBOX_E0_8822B) & BIT_MASK_HMEBOX_E0_8822B)
3095 /* 2 REG_HMEBOX_E1_8822B */
3097 #define BIT_SHIFT_HMEBOX_E1_8822B 0
3098 #define BIT_MASK_HMEBOX_E1_8822B 0xffffffffL
3099 #define BIT_HMEBOX_E1_8822B(x) \
3100 (((x) & BIT_MASK_HMEBOX_E1_8822B) << BIT_SHIFT_HMEBOX_E1_8822B)
3101 #define BIT_GET_HMEBOX_E1_8822B(x) \
3102 (((x) >> BIT_SHIFT_HMEBOX_E1_8822B) & BIT_MASK_HMEBOX_E1_8822B)
3104 /* 2 REG_HMEBOX_E2_8822B */
3106 #define BIT_SHIFT_HMEBOX_E2_8822B 0
3107 #define BIT_MASK_HMEBOX_E2_8822B 0xffffffffL
3108 #define BIT_HMEBOX_E2_8822B(x) \
3109 (((x) & BIT_MASK_HMEBOX_E2_8822B) << BIT_SHIFT_HMEBOX_E2_8822B)
3110 #define BIT_GET_HMEBOX_E2_8822B(x) \
3111 (((x) >> BIT_SHIFT_HMEBOX_E2_8822B) & BIT_MASK_HMEBOX_E2_8822B)
3113 /* 2 REG_HMEBOX_E3_8822B */
3115 #define BIT_SHIFT_HMEBOX_E3_8822B 0
3116 #define BIT_MASK_HMEBOX_E3_8822B 0xffffffffL
3117 #define BIT_HMEBOX_E3_8822B(x) \
3118 (((x) & BIT_MASK_HMEBOX_E3_8822B) << BIT_SHIFT_HMEBOX_E3_8822B)
3119 #define BIT_GET_HMEBOX_E3_8822B(x) \
3120 (((x) >> BIT_SHIFT_HMEBOX_E3_8822B) & BIT_MASK_HMEBOX_E3_8822B)
3122 /* 2 REG_NOT_VALID_8822B */
3124 /* 2 REG_CR_EXT_8822B */
3126 #define BIT_SHIFT_PHY_REQ_DELAY_8822B 24
3127 #define BIT_MASK_PHY_REQ_DELAY_8822B 0xf
3128 #define BIT_PHY_REQ_DELAY_8822B(x) \
3129 (((x) & BIT_MASK_PHY_REQ_DELAY_8822B) << BIT_SHIFT_PHY_REQ_DELAY_8822B)
3130 #define BIT_GET_PHY_REQ_DELAY_8822B(x) \
3131 (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8822B) & BIT_MASK_PHY_REQ_DELAY_8822B)
3133 #define BIT_SPD_DOWN_8822B BIT(16)
3135 #define BIT_SHIFT_NETYPE4_8822B 4
3136 #define BIT_MASK_NETYPE4_8822B 0x3
3137 #define BIT_NETYPE4_8822B(x) \
3138 (((x) & BIT_MASK_NETYPE4_8822B) << BIT_SHIFT_NETYPE4_8822B)
3139 #define BIT_GET_NETYPE4_8822B(x) \
3140 (((x) >> BIT_SHIFT_NETYPE4_8822B) & BIT_MASK_NETYPE4_8822B)
3142 #define BIT_SHIFT_NETYPE3_8822B 2
3143 #define BIT_MASK_NETYPE3_8822B 0x3
3144 #define BIT_NETYPE3_8822B(x) \
3145 (((x) & BIT_MASK_NETYPE3_8822B) << BIT_SHIFT_NETYPE3_8822B)
3146 #define BIT_GET_NETYPE3_8822B(x) \
3147 (((x) >> BIT_SHIFT_NETYPE3_8822B) & BIT_MASK_NETYPE3_8822B)
3149 #define BIT_SHIFT_NETYPE2_8822B 0
3150 #define BIT_MASK_NETYPE2_8822B 0x3
3151 #define BIT_NETYPE2_8822B(x) \
3152 (((x) & BIT_MASK_NETYPE2_8822B) << BIT_SHIFT_NETYPE2_8822B)
3153 #define BIT_GET_NETYPE2_8822B(x) \
3154 (((x) >> BIT_SHIFT_NETYPE2_8822B) & BIT_MASK_NETYPE2_8822B)
3156 /* 2 REG_FWFF_8822B */
3158 #define BIT_SHIFT_PKTNUM_TH_V1_8822B 24
3159 #define BIT_MASK_PKTNUM_TH_V1_8822B 0xff
3160 #define BIT_PKTNUM_TH_V1_8822B(x) \
3161 (((x) & BIT_MASK_PKTNUM_TH_V1_8822B) << BIT_SHIFT_PKTNUM_TH_V1_8822B)
3162 #define BIT_GET_PKTNUM_TH_V1_8822B(x) \
3163 (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8822B) & BIT_MASK_PKTNUM_TH_V1_8822B)
3165 #define BIT_SHIFT_TIMER_TH_8822B 16
3166 #define BIT_MASK_TIMER_TH_8822B 0xff
3167 #define BIT_TIMER_TH_8822B(x) \
3168 (((x) & BIT_MASK_TIMER_TH_8822B) << BIT_SHIFT_TIMER_TH_8822B)
3169 #define BIT_GET_TIMER_TH_8822B(x) \
3170 (((x) >> BIT_SHIFT_TIMER_TH_8822B) & BIT_MASK_TIMER_TH_8822B)
3172 #define BIT_SHIFT_RXPKT1ENADDR_8822B 0
3173 #define BIT_MASK_RXPKT1ENADDR_8822B 0xffff
3174 #define BIT_RXPKT1ENADDR_8822B(x) \
3175 (((x) & BIT_MASK_RXPKT1ENADDR_8822B) << BIT_SHIFT_RXPKT1ENADDR_8822B)
3176 #define BIT_GET_RXPKT1ENADDR_8822B(x) \
3177 (((x) >> BIT_SHIFT_RXPKT1ENADDR_8822B) & BIT_MASK_RXPKT1ENADDR_8822B)
3179 /* 2 REG_RXFF_PTR_V1_8822B */
3181 /* 2 REG_NOT_VALID_8822B */
3183 #define BIT_SHIFT_RXFF0_RDPTR_V2_8822B 0
3184 #define BIT_MASK_RXFF0_RDPTR_V2_8822B 0x3ffff
3185 #define BIT_RXFF0_RDPTR_V2_8822B(x) \
3186 (((x) & BIT_MASK_RXFF0_RDPTR_V2_8822B) \
3187 << BIT_SHIFT_RXFF0_RDPTR_V2_8822B)
3188 #define BIT_GET_RXFF0_RDPTR_V2_8822B(x) \
3189 (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8822B) & \
3190 BIT_MASK_RXFF0_RDPTR_V2_8822B)
3192 /* 2 REG_RXFF_WTR_V1_8822B */
3194 /* 2 REG_NOT_VALID_8822B */
3196 #define BIT_SHIFT_RXFF0_WTPTR_V2_8822B 0
3197 #define BIT_MASK_RXFF0_WTPTR_V2_8822B 0x3ffff
3198 #define BIT_RXFF0_WTPTR_V2_8822B(x) \
3199 (((x) & BIT_MASK_RXFF0_WTPTR_V2_8822B) \
3200 << BIT_SHIFT_RXFF0_WTPTR_V2_8822B)
3201 #define BIT_GET_RXFF0_WTPTR_V2_8822B(x) \
3202 (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8822B) & \
3203 BIT_MASK_RXFF0_WTPTR_V2_8822B)
3205 /* 2 REG_FE2IMR_8822B */
3206 #define BIT__FE4ISR__IND_MSK_8822B BIT(29)
3207 #define BIT_FS_TXSC_DESC_DONE_INT_EN_8822B BIT(28)
3208 #define BIT_FS_TXSC_BKDONE_INT_EN_8822B BIT(27)
3209 #define BIT_FS_TXSC_BEDONE_INT_EN_8822B BIT(26)
3210 #define BIT_FS_TXSC_VIDONE_INT_EN_8822B BIT(25)
3211 #define BIT_FS_TXSC_VODONE_INT_EN_8822B BIT(24)
3212 #define BIT_FS_ATIM_MB7_INT_EN_8822B BIT(23)
3213 #define BIT_FS_ATIM_MB6_INT_EN_8822B BIT(22)
3214 #define BIT_FS_ATIM_MB5_INT_EN_8822B BIT(21)
3215 #define BIT_FS_ATIM_MB4_INT_EN_8822B BIT(20)
3216 #define BIT_FS_ATIM_MB3_INT_EN_8822B BIT(19)
3217 #define BIT_FS_ATIM_MB2_INT_EN_8822B BIT(18)
3218 #define BIT_FS_ATIM_MB1_INT_EN_8822B BIT(17)
3219 #define BIT_FS_ATIM_MB0_INT_EN_8822B BIT(16)
3220 #define BIT_FS_TBTT4INT_EN_8822B BIT(11)
3221 #define BIT_FS_TBTT3INT_EN_8822B BIT(10)
3222 #define BIT_FS_TBTT2INT_EN_8822B BIT(9)
3223 #define BIT_FS_TBTT1INT_EN_8822B BIT(8)
3224 #define BIT_FS_TBTT0_MB7INT_EN_8822B BIT(7)
3225 #define BIT_FS_TBTT0_MB6INT_EN_8822B BIT(6)
3226 #define BIT_FS_TBTT0_MB5INT_EN_8822B BIT(5)
3227 #define BIT_FS_TBTT0_MB4INT_EN_8822B BIT(4)
3228 #define BIT_FS_TBTT0_MB3INT_EN_8822B BIT(3)
3229 #define BIT_FS_TBTT0_MB2INT_EN_8822B BIT(2)
3230 #define BIT_FS_TBTT0_MB1INT_EN_8822B BIT(1)
3231 #define BIT_FS_TBTT0_INT_EN_8822B BIT(0)
3233 /* 2 REG_FE2ISR_8822B */
3234 #define BIT__FE4ISR__IND_INT_8822B BIT(29)
3235 #define BIT_FS_TXSC_DESC_DONE_INT_8822B BIT(28)
3236 #define BIT_FS_TXSC_BKDONE_INT_8822B BIT(27)
3237 #define BIT_FS_TXSC_BEDONE_INT_8822B BIT(26)
3238 #define BIT_FS_TXSC_VIDONE_INT_8822B BIT(25)
3239 #define BIT_FS_TXSC_VODONE_INT_8822B BIT(24)
3240 #define BIT_FS_ATIM_MB7_INT_8822B BIT(23)
3241 #define BIT_FS_ATIM_MB6_INT_8822B BIT(22)
3242 #define BIT_FS_ATIM_MB5_INT_8822B BIT(21)
3243 #define BIT_FS_ATIM_MB4_INT_8822B BIT(20)
3244 #define BIT_FS_ATIM_MB3_INT_8822B BIT(19)
3245 #define BIT_FS_ATIM_MB2_INT_8822B BIT(18)
3246 #define BIT_FS_ATIM_MB1_INT_8822B BIT(17)
3247 #define BIT_FS_ATIM_MB0_INT_8822B BIT(16)
3248 #define BIT_FS_TBTT4INT_8822B BIT(11)
3249 #define BIT_FS_TBTT3INT_8822B BIT(10)
3250 #define BIT_FS_TBTT2INT_8822B BIT(9)
3251 #define BIT_FS_TBTT1INT_8822B BIT(8)
3252 #define BIT_FS_TBTT0_MB7INT_8822B BIT(7)
3253 #define BIT_FS_TBTT0_MB6INT_8822B BIT(6)
3254 #define BIT_FS_TBTT0_MB5INT_8822B BIT(5)
3255 #define BIT_FS_TBTT0_MB4INT_8822B BIT(4)
3256 #define BIT_FS_TBTT0_MB3INT_8822B BIT(3)
3257 #define BIT_FS_TBTT0_MB2INT_8822B BIT(2)
3258 #define BIT_FS_TBTT0_MB1INT_8822B BIT(1)
3259 #define BIT_FS_TBTT0_INT_8822B BIT(0)
3261 /* 2 REG_FE3IMR_8822B */
3262 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT__EN_8822B BIT(31)
3263 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT__EN_8822B BIT(30)
3264 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT__EN_8822B BIT(29)
3265 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT__EN_8822B BIT(28)
3266 #define BIT_FS_BCNDMA4_INT_EN_8822B BIT(27)
3267 #define BIT_FS_BCNDMA3_INT_EN_8822B BIT(26)
3268 #define BIT_FS_BCNDMA2_INT_EN_8822B BIT(25)
3269 #define BIT_FS_BCNDMA1_INT_EN_8822B BIT(24)
3270 #define BIT_FS_BCNDMA0_MB7_INT_EN_8822B BIT(23)
3271 #define BIT_FS_BCNDMA0_MB6_INT_EN_8822B BIT(22)
3272 #define BIT_FS_BCNDMA0_MB5_INT_EN_8822B BIT(21)
3273 #define BIT_FS_BCNDMA0_MB4_INT_EN_8822B BIT(20)
3274 #define BIT_FS_BCNDMA0_MB3_INT_EN_8822B BIT(19)
3275 #define BIT_FS_BCNDMA0_MB2_INT_EN_8822B BIT(18)
3276 #define BIT_FS_BCNDMA0_MB1_INT_EN_8822B BIT(17)
3277 #define BIT_FS_BCNDMA0_INT_EN_8822B BIT(16)
3278 #define BIT_FS_MTI_BCNIVLEAR_INT__EN_8822B BIT(15)
3279 #define BIT_FS_BCNERLY4_INT_EN_8822B BIT(11)
3280 #define BIT_FS_BCNERLY3_INT_EN_8822B BIT(10)
3281 #define BIT_FS_BCNERLY2_INT_EN_8822B BIT(9)
3282 #define BIT_FS_BCNERLY1_INT_EN_8822B BIT(8)
3283 #define BIT_FS_BCNERLY0_MB7INT_EN_8822B BIT(7)
3284 #define BIT_FS_BCNERLY0_MB6INT_EN_8822B BIT(6)
3285 #define BIT_FS_BCNERLY0_MB5INT_EN_8822B BIT(5)
3286 #define BIT_FS_BCNERLY0_MB4INT_EN_8822B BIT(4)
3287 #define BIT_FS_BCNERLY0_MB3INT_EN_8822B BIT(3)
3288 #define BIT_FS_BCNERLY0_MB2INT_EN_8822B BIT(2)
3289 #define BIT_FS_BCNERLY0_MB1INT_EN_8822B BIT(1)
3290 #define BIT_FS_BCNERLY0_INT_EN_8822B BIT(0)
3292 /* 2 REG_FE3ISR_8822B */
3293 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT_8822B BIT(31)
3294 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT_8822B BIT(30)
3295 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT_8822B BIT(29)
3296 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT_8822B BIT(28)
3297 #define BIT_FS_BCNDMA4_INT_8822B BIT(27)
3298 #define BIT_FS_BCNDMA3_INT_8822B BIT(26)
3299 #define BIT_FS_BCNDMA2_INT_8822B BIT(25)
3300 #define BIT_FS_BCNDMA1_INT_8822B BIT(24)
3301 #define BIT_FS_BCNDMA0_MB7_INT_8822B BIT(23)
3302 #define BIT_FS_BCNDMA0_MB6_INT_8822B BIT(22)
3303 #define BIT_FS_BCNDMA0_MB5_INT_8822B BIT(21)
3304 #define BIT_FS_BCNDMA0_MB4_INT_8822B BIT(20)
3305 #define BIT_FS_BCNDMA0_MB3_INT_8822B BIT(19)
3306 #define BIT_FS_BCNDMA0_MB2_INT_8822B BIT(18)
3307 #define BIT_FS_BCNDMA0_MB1_INT_8822B BIT(17)
3308 #define BIT_FS_BCNDMA0_INT_8822B BIT(16)
3309 #define BIT_FS_MTI_BCNIVLEAR_INT_8822B BIT(15)
3310 #define BIT_FS_BCNERLY4_INT_8822B BIT(11)
3311 #define BIT_FS_BCNERLY3_INT_8822B BIT(10)
3312 #define BIT_FS_BCNERLY2_INT_8822B BIT(9)
3313 #define BIT_FS_BCNERLY1_INT_8822B BIT(8)
3314 #define BIT_FS_BCNERLY0_MB7INT_8822B BIT(7)
3315 #define BIT_FS_BCNERLY0_MB6INT_8822B BIT(6)
3316 #define BIT_FS_BCNERLY0_MB5INT_8822B BIT(5)
3317 #define BIT_FS_BCNERLY0_MB4INT_8822B BIT(4)
3318 #define BIT_FS_BCNERLY0_MB3INT_8822B BIT(3)
3319 #define BIT_FS_BCNERLY0_MB2INT_8822B BIT(2)
3320 #define BIT_FS_BCNERLY0_MB1INT_8822B BIT(1)
3321 #define BIT_FS_BCNERLY0_INT_8822B BIT(0)
3323 /* 2 REG_FE4IMR_8822B */
3324 #define BIT_FS_CLI3_TXPKTIN_INT_EN_8822B BIT(19)
3325 #define BIT_FS_CLI2_TXPKTIN_INT_EN_8822B BIT(18)
3326 #define BIT_FS_CLI1_TXPKTIN_INT_EN_8822B BIT(17)
3327 #define BIT_FS_CLI0_TXPKTIN_INT_EN_8822B BIT(16)
3328 #define BIT_FS_CLI3_RX_UMD0_INT_EN_8822B BIT(15)
3329 #define BIT_FS_CLI3_RX_UMD1_INT_EN_8822B BIT(14)
3330 #define BIT_FS_CLI3_RX_BMD0_INT_EN_8822B BIT(13)
3331 #define BIT_FS_CLI3_RX_BMD1_INT_EN_8822B BIT(12)
3332 #define BIT_FS_CLI2_RX_UMD0_INT_EN_8822B BIT(11)
3333 #define BIT_FS_CLI2_RX_UMD1_INT_EN_8822B BIT(10)
3334 #define BIT_FS_CLI2_RX_BMD0_INT_EN_8822B BIT(9)
3335 #define BIT_FS_CLI2_RX_BMD1_INT_EN_8822B BIT(8)
3336 #define BIT_FS_CLI1_RX_UMD0_INT_EN_8822B BIT(7)
3337 #define BIT_FS_CLI1_RX_UMD1_INT_EN_8822B BIT(6)
3338 #define BIT_FS_CLI1_RX_BMD0_INT_EN_8822B BIT(5)
3339 #define BIT_FS_CLI1_RX_BMD1_INT_EN_8822B BIT(4)
3340 #define BIT_FS_CLI0_RX_UMD0_INT_EN_8822B BIT(3)
3341 #define BIT_FS_CLI0_RX_UMD1_INT_EN_8822B BIT(2)
3342 #define BIT_FS_CLI0_RX_BMD0_INT_EN_8822B BIT(1)
3343 #define BIT_FS_CLI0_RX_BMD1_INT_EN_8822B BIT(0)
3345 /* 2 REG_FE4ISR_8822B */
3346 #define BIT_FS_CLI3_TXPKTIN_INT_8822B BIT(19)
3347 #define BIT_FS_CLI2_TXPKTIN_INT_8822B BIT(18)
3348 #define BIT_FS_CLI1_TXPKTIN_INT_8822B BIT(17)
3349 #define BIT_FS_CLI0_TXPKTIN_INT_8822B BIT(16)
3350 #define BIT_FS_CLI3_RX_UMD0_INT_8822B BIT(15)
3351 #define BIT_FS_CLI3_RX_UMD1_INT_8822B BIT(14)
3352 #define BIT_FS_CLI3_RX_BMD0_INT_8822B BIT(13)
3353 #define BIT_FS_CLI3_RX_BMD1_INT_8822B BIT(12)
3354 #define BIT_FS_CLI2_RX_UMD0_INT_8822B BIT(11)
3355 #define BIT_FS_CLI2_RX_UMD1_INT_8822B BIT(10)
3356 #define BIT_FS_CLI2_RX_BMD0_INT_8822B BIT(9)
3357 #define BIT_FS_CLI2_RX_BMD1_INT_8822B BIT(8)
3358 #define BIT_FS_CLI1_RX_UMD0_INT_8822B BIT(7)
3359 #define BIT_FS_CLI1_RX_UMD1_INT_8822B BIT(6)
3360 #define BIT_FS_CLI1_RX_BMD0_INT_8822B BIT(5)
3361 #define BIT_FS_CLI1_RX_BMD1_INT_8822B BIT(4)
3362 #define BIT_FS_CLI0_RX_UMD0_INT_8822B BIT(3)
3363 #define BIT_FS_CLI0_RX_UMD1_INT_8822B BIT(2)
3364 #define BIT_FS_CLI0_RX_BMD0_INT_8822B BIT(1)
3365 #define BIT_FS_CLI0_RX_BMD1_INT_8822B BIT(0)
3367 /* 2 REG_FT1IMR_8822B */
3368 #define BIT__FT2ISR__IND_MSK_8822B BIT(30)
3369 #define BIT_FTM_PTT_INT_EN_8822B BIT(29)
3370 #define BIT_RXFTMREQ_INT_EN_8822B BIT(28)
3371 #define BIT_RXFTM_INT_EN_8822B BIT(27)
3372 #define BIT_TXFTM_INT_EN_8822B BIT(26)
3373 #define BIT_FS_H2C_CMD_OK_INT_EN_8822B BIT(25)
3374 #define BIT_FS_H2C_CMD_FULL_INT_EN_8822B BIT(24)
3375 #define BIT_FS_MACID_PWRCHANGE5_INT_EN_8822B BIT(23)
3376 #define BIT_FS_MACID_PWRCHANGE4_INT_EN_8822B BIT(22)
3377 #define BIT_FS_MACID_PWRCHANGE3_INT_EN_8822B BIT(21)
3378 #define BIT_FS_MACID_PWRCHANGE2_INT_EN_8822B BIT(20)
3379 #define BIT_FS_MACID_PWRCHANGE1_INT_EN_8822B BIT(19)
3380 #define BIT_FS_MACID_PWRCHANGE0_INT_EN_8822B BIT(18)
3381 #define BIT_FS_CTWEND2_INT_EN_8822B BIT(17)
3382 #define BIT_FS_CTWEND1_INT_EN_8822B BIT(16)
3383 #define BIT_FS_CTWEND0_INT_EN_8822B BIT(15)
3384 #define BIT_FS_TX_NULL1_INT_EN_8822B BIT(14)
3385 #define BIT_FS_TX_NULL0_INT_EN_8822B BIT(13)
3386 #define BIT_FS_TSF_BIT32_TOGGLE_EN_8822B BIT(12)
3387 #define BIT_FS_P2P_RFON2_INT_EN_8822B BIT(11)
3388 #define BIT_FS_P2P_RFOFF2_INT_EN_8822B BIT(10)
3389 #define BIT_FS_P2P_RFON1_INT_EN_8822B BIT(9)
3390 #define BIT_FS_P2P_RFOFF1_INT_EN_8822B BIT(8)
3391 #define BIT_FS_P2P_RFON0_INT_EN_8822B BIT(7)
3392 #define BIT_FS_P2P_RFOFF0_INT_EN_8822B BIT(6)
3393 #define BIT_FS_RX_UAPSDMD1_EN_8822B BIT(5)
3394 #define BIT_FS_RX_UAPSDMD0_EN_8822B BIT(4)
3395 #define BIT_FS_TRIGGER_PKT_EN_8822B BIT(3)
3396 #define BIT_FS_EOSP_INT_EN_8822B BIT(2)
3397 #define BIT_FS_RPWM2_INT_EN_8822B BIT(1)
3398 #define BIT_FS_RPWM_INT_EN_8822B BIT(0)
3400 /* 2 REG_FT1ISR_8822B */
3401 #define BIT__FT2ISR__IND_INT_8822B BIT(30)
3402 #define BIT_FTM_PTT_INT_8822B BIT(29)
3403 #define BIT_RXFTMREQ_INT_8822B BIT(28)
3404 #define BIT_RXFTM_INT_8822B BIT(27)
3405 #define BIT_TXFTM_INT_8822B BIT(26)
3406 #define BIT_FS_H2C_CMD_OK_INT_8822B BIT(25)
3407 #define BIT_FS_H2C_CMD_FULL_INT_8822B BIT(24)
3408 #define BIT_FS_MACID_PWRCHANGE5_INT_8822B BIT(23)
3409 #define BIT_FS_MACID_PWRCHANGE4_INT_8822B BIT(22)
3410 #define BIT_FS_MACID_PWRCHANGE3_INT_8822B BIT(21)
3411 #define BIT_FS_MACID_PWRCHANGE2_INT_8822B BIT(20)
3412 #define BIT_FS_MACID_PWRCHANGE1_INT_8822B BIT(19)
3413 #define BIT_FS_MACID_PWRCHANGE0_INT_8822B BIT(18)
3414 #define BIT_FS_CTWEND2_INT_8822B BIT(17)
3415 #define BIT_FS_CTWEND1_INT_8822B BIT(16)
3416 #define BIT_FS_CTWEND0_INT_8822B BIT(15)
3417 #define BIT_FS_TX_NULL1_INT_8822B BIT(14)
3418 #define BIT_FS_TX_NULL0_INT_8822B BIT(13)
3419 #define BIT_FS_TSF_BIT32_TOGGLE_INT_8822B BIT(12)
3420 #define BIT_FS_P2P_RFON2_INT_8822B BIT(11)
3421 #define BIT_FS_P2P_RFOFF2_INT_8822B BIT(10)
3422 #define BIT_FS_P2P_RFON1_INT_8822B BIT(9)
3423 #define BIT_FS_P2P_RFOFF1_INT_8822B BIT(8)
3424 #define BIT_FS_P2P_RFON0_INT_8822B BIT(7)
3425 #define BIT_FS_P2P_RFOFF0_INT_8822B BIT(6)
3426 #define BIT_FS_RX_UAPSDMD1_INT_8822B BIT(5)
3427 #define BIT_FS_RX_UAPSDMD0_INT_8822B BIT(4)
3428 #define BIT_FS_TRIGGER_PKT_INT_8822B BIT(3)
3429 #define BIT_FS_EOSP_INT_8822B BIT(2)
3430 #define BIT_FS_RPWM2_INT_8822B BIT(1)
3431 #define BIT_FS_RPWM_INT_8822B BIT(0)
3433 /* 2 REG_SPWR0_8822B */
3435 #define BIT_SHIFT_MID_31TO0_8822B 0
3436 #define BIT_MASK_MID_31TO0_8822B 0xffffffffL
3437 #define BIT_MID_31TO0_8822B(x) \
3438 (((x) & BIT_MASK_MID_31TO0_8822B) << BIT_SHIFT_MID_31TO0_8822B)
3439 #define BIT_GET_MID_31TO0_8822B(x) \
3440 (((x) >> BIT_SHIFT_MID_31TO0_8822B) & BIT_MASK_MID_31TO0_8822B)
3442 /* 2 REG_SPWR1_8822B */
3444 #define BIT_SHIFT_MID_63TO32_8822B 0
3445 #define BIT_MASK_MID_63TO32_8822B 0xffffffffL
3446 #define BIT_MID_63TO32_8822B(x) \
3447 (((x) & BIT_MASK_MID_63TO32_8822B) << BIT_SHIFT_MID_63TO32_8822B)
3448 #define BIT_GET_MID_63TO32_8822B(x) \
3449 (((x) >> BIT_SHIFT_MID_63TO32_8822B) & BIT_MASK_MID_63TO32_8822B)
3451 /* 2 REG_SPWR2_8822B */
3453 #define BIT_SHIFT_MID_95O64_8822B 0
3454 #define BIT_MASK_MID_95O64_8822B 0xffffffffL
3455 #define BIT_MID_95O64_8822B(x) \
3456 (((x) & BIT_MASK_MID_95O64_8822B) << BIT_SHIFT_MID_95O64_8822B)
3457 #define BIT_GET_MID_95O64_8822B(x) \
3458 (((x) >> BIT_SHIFT_MID_95O64_8822B) & BIT_MASK_MID_95O64_8822B)
3460 /* 2 REG_SPWR3_8822B */
3462 #define BIT_SHIFT_MID_127TO96_8822B 0
3463 #define BIT_MASK_MID_127TO96_8822B 0xffffffffL
3464 #define BIT_MID_127TO96_8822B(x) \
3465 (((x) & BIT_MASK_MID_127TO96_8822B) << BIT_SHIFT_MID_127TO96_8822B)
3466 #define BIT_GET_MID_127TO96_8822B(x) \
3467 (((x) >> BIT_SHIFT_MID_127TO96_8822B) & BIT_MASK_MID_127TO96_8822B)
3469 /* 2 REG_POWSEQ_8822B */
3471 #define BIT_SHIFT_SEQNUM_MID_8822B 16
3472 #define BIT_MASK_SEQNUM_MID_8822B 0xffff
3473 #define BIT_SEQNUM_MID_8822B(x) \
3474 (((x) & BIT_MASK_SEQNUM_MID_8822B) << BIT_SHIFT_SEQNUM_MID_8822B)
3475 #define BIT_GET_SEQNUM_MID_8822B(x) \
3476 (((x) >> BIT_SHIFT_SEQNUM_MID_8822B) & BIT_MASK_SEQNUM_MID_8822B)
3478 #define BIT_SHIFT_REF_MID_8822B 0
3479 #define BIT_MASK_REF_MID_8822B 0x7f
3480 #define BIT_REF_MID_8822B(x) \
3481 (((x) & BIT_MASK_REF_MID_8822B) << BIT_SHIFT_REF_MID_8822B)
3482 #define BIT_GET_REF_MID_8822B(x) \
3483 (((x) >> BIT_SHIFT_REF_MID_8822B) & BIT_MASK_REF_MID_8822B)
3485 /* 2 REG_TC7_CTRL_V1_8822B */
3486 #define BIT_TC7INT_EN_8822B BIT(26)
3487 #define BIT_TC7MODE_8822B BIT(25)
3488 #define BIT_TC7EN_8822B BIT(24)
3490 #define BIT_SHIFT_TC7DATA_8822B 0
3491 #define BIT_MASK_TC7DATA_8822B 0xffffff
3492 #define BIT_TC7DATA_8822B(x) \
3493 (((x) & BIT_MASK_TC7DATA_8822B) << BIT_SHIFT_TC7DATA_8822B)
3494 #define BIT_GET_TC7DATA_8822B(x) \
3495 (((x) >> BIT_SHIFT_TC7DATA_8822B) & BIT_MASK_TC7DATA_8822B)
3497 /* 2 REG_TC8_CTRL_V1_8822B */
3498 #define BIT_TC8INT_EN_8822B BIT(26)
3499 #define BIT_TC8MODE_8822B BIT(25)
3500 #define BIT_TC8EN_8822B BIT(24)
3502 #define BIT_SHIFT_TC8DATA_8822B 0
3503 #define BIT_MASK_TC8DATA_8822B 0xffffff
3504 #define BIT_TC8DATA_8822B(x) \
3505 (((x) & BIT_MASK_TC8DATA_8822B) << BIT_SHIFT_TC8DATA_8822B)
3506 #define BIT_GET_TC8DATA_8822B(x) \
3507 (((x) >> BIT_SHIFT_TC8DATA_8822B) & BIT_MASK_TC8DATA_8822B)
3509 /* 2 REG_FT2IMR_8822B */
3510 #define BIT_FS_CLI3_RX_UAPSDMD1_EN_8822B BIT(31)
3511 #define BIT_FS_CLI3_RX_UAPSDMD0_EN_8822B BIT(30)
3512 #define BIT_FS_CLI3_TRIGGER_PKT_EN_8822B BIT(29)
3513 #define BIT_FS_CLI3_EOSP_INT_EN_8822B BIT(28)
3514 #define BIT_FS_CLI2_RX_UAPSDMD1_EN_8822B BIT(27)
3515 #define BIT_FS_CLI2_RX_UAPSDMD0_EN_8822B BIT(26)
3516 #define BIT_FS_CLI2_TRIGGER_PKT_EN_8822B BIT(25)
3517 #define BIT_FS_CLI2_EOSP_INT_EN_8822B BIT(24)
3518 #define BIT_FS_CLI1_RX_UAPSDMD1_EN_8822B BIT(23)
3519 #define BIT_FS_CLI1_RX_UAPSDMD0_EN_8822B BIT(22)
3520 #define BIT_FS_CLI1_TRIGGER_PKT_EN_8822B BIT(21)
3521 #define BIT_FS_CLI1_EOSP_INT_EN_8822B BIT(20)
3522 #define BIT_FS_CLI0_RX_UAPSDMD1_EN_8822B BIT(19)
3523 #define BIT_FS_CLI0_RX_UAPSDMD0_EN_8822B BIT(18)
3524 #define BIT_FS_CLI0_TRIGGER_PKT_EN_8822B BIT(17)
3525 #define BIT_FS_CLI0_EOSP_INT_EN_8822B BIT(16)
3526 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_EN_8822B BIT(9)
3527 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_EN_8822B BIT(8)
3528 #define BIT_FS_CLI3_TX_NULL1_INT_EN_8822B BIT(7)
3529 #define BIT_FS_CLI3_TX_NULL0_INT_EN_8822B BIT(6)
3530 #define BIT_FS_CLI2_TX_NULL1_INT_EN_8822B BIT(5)
3531 #define BIT_FS_CLI2_TX_NULL0_INT_EN_8822B BIT(4)
3532 #define BIT_FS_CLI1_TX_NULL1_INT_EN_8822B BIT(3)
3533 #define BIT_FS_CLI1_TX_NULL0_INT_EN_8822B BIT(2)
3534 #define BIT_FS_CLI0_TX_NULL1_INT_EN_8822B BIT(1)
3535 #define BIT_FS_CLI0_TX_NULL0_INT_EN_8822B BIT(0)
3537 /* 2 REG_FT2ISR_8822B */
3538 #define BIT_FS_CLI3_RX_UAPSDMD1_INT_8822B BIT(31)
3539 #define BIT_FS_CLI3_RX_UAPSDMD0_INT_8822B BIT(30)
3540 #define BIT_FS_CLI3_TRIGGER_PKT_INT_8822B BIT(29)
3541 #define BIT_FS_CLI3_EOSP_INT_8822B BIT(28)
3542 #define BIT_FS_CLI2_RX_UAPSDMD1_INT_8822B BIT(27)
3543 #define BIT_FS_CLI2_RX_UAPSDMD0_INT_8822B BIT(26)
3544 #define BIT_FS_CLI2_TRIGGER_PKT_INT_8822B BIT(25)
3545 #define BIT_FS_CLI2_EOSP_INT_8822B BIT(24)
3546 #define BIT_FS_CLI1_RX_UAPSDMD1_INT_8822B BIT(23)
3547 #define BIT_FS_CLI1_RX_UAPSDMD0_INT_8822B BIT(22)
3548 #define BIT_FS_CLI1_TRIGGER_PKT_INT_8822B BIT(21)
3549 #define BIT_FS_CLI1_EOSP_INT_8822B BIT(20)
3550 #define BIT_FS_CLI0_RX_UAPSDMD1_INT_8822B BIT(19)
3551 #define BIT_FS_CLI0_RX_UAPSDMD0_INT_8822B BIT(18)
3552 #define BIT_FS_CLI0_TRIGGER_PKT_INT_8822B BIT(17)
3553 #define BIT_FS_CLI0_EOSP_INT_8822B BIT(16)
3554 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_INT_8822B BIT(9)
3555 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_INT_8822B BIT(8)
3556 #define BIT_FS_CLI3_TX_NULL1_INT_8822B BIT(7)
3557 #define BIT_FS_CLI3_TX_NULL0_INT_8822B BIT(6)
3558 #define BIT_FS_CLI2_TX_NULL1_INT_8822B BIT(5)
3559 #define BIT_FS_CLI2_TX_NULL0_INT_8822B BIT(4)
3560 #define BIT_FS_CLI1_TX_NULL1_INT_8822B BIT(3)
3561 #define BIT_FS_CLI1_TX_NULL0_INT_8822B BIT(2)
3562 #define BIT_FS_CLI0_TX_NULL1_INT_8822B BIT(1)
3563 #define BIT_FS_CLI0_TX_NULL0_INT_8822B BIT(0)
3565 /* 2 REG_MSG2_8822B */
3567 #define BIT_SHIFT_FW_MSG2_8822B 0
3568 #define BIT_MASK_FW_MSG2_8822B 0xffffffffL
3569 #define BIT_FW_MSG2_8822B(x) \
3570 (((x) & BIT_MASK_FW_MSG2_8822B) << BIT_SHIFT_FW_MSG2_8822B)
3571 #define BIT_GET_FW_MSG2_8822B(x) \
3572 (((x) >> BIT_SHIFT_FW_MSG2_8822B) & BIT_MASK_FW_MSG2_8822B)
3574 /* 2 REG_MSG3_8822B */
3576 #define BIT_SHIFT_FW_MSG3_8822B 0
3577 #define BIT_MASK_FW_MSG3_8822B 0xffffffffL
3578 #define BIT_FW_MSG3_8822B(x) \
3579 (((x) & BIT_MASK_FW_MSG3_8822B) << BIT_SHIFT_FW_MSG3_8822B)
3580 #define BIT_GET_FW_MSG3_8822B(x) \
3581 (((x) >> BIT_SHIFT_FW_MSG3_8822B) & BIT_MASK_FW_MSG3_8822B)
3583 /* 2 REG_MSG4_8822B */
3585 #define BIT_SHIFT_FW_MSG4_8822B 0
3586 #define BIT_MASK_FW_MSG4_8822B 0xffffffffL
3587 #define BIT_FW_MSG4_8822B(x) \
3588 (((x) & BIT_MASK_FW_MSG4_8822B) << BIT_SHIFT_FW_MSG4_8822B)
3589 #define BIT_GET_FW_MSG4_8822B(x) \
3590 (((x) >> BIT_SHIFT_FW_MSG4_8822B) & BIT_MASK_FW_MSG4_8822B)
3592 /* 2 REG_MSG5_8822B */
3594 #define BIT_SHIFT_FW_MSG5_8822B 0
3595 #define BIT_MASK_FW_MSG5_8822B 0xffffffffL
3596 #define BIT_FW_MSG5_8822B(x) \
3597 (((x) & BIT_MASK_FW_MSG5_8822B) << BIT_SHIFT_FW_MSG5_8822B)
3598 #define BIT_GET_FW_MSG5_8822B(x) \
3599 (((x) >> BIT_SHIFT_FW_MSG5_8822B) & BIT_MASK_FW_MSG5_8822B)
3601 /* 2 REG_NOT_VALID_8822B */
3603 /* 2 REG_FIFOPAGE_CTRL_1_8822B */
3605 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B 16
3606 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B 0xff
3607 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8822B(x) \
3608 (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B) \
3609 << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B)
3610 #define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8822B(x) \
3611 (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B) & \
3612 BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B)
3614 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B 0
3615 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B 0xff
3616 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8822B(x) \
3617 (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B) \
3618 << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B)
3619 #define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8822B(x) \
3620 (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B) & \
3621 BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B)
3623 /* 2 REG_FIFOPAGE_CTRL_2_8822B */
3624 #define BIT_BCN_VALID_1_V1_8822B BIT(31)
3626 #define BIT_SHIFT_BCN_HEAD_1_V1_8822B 16
3627 #define BIT_MASK_BCN_HEAD_1_V1_8822B 0xfff
3628 #define BIT_BCN_HEAD_1_V1_8822B(x) \
3629 (((x) & BIT_MASK_BCN_HEAD_1_V1_8822B) << BIT_SHIFT_BCN_HEAD_1_V1_8822B)
3630 #define BIT_GET_BCN_HEAD_1_V1_8822B(x) \
3631 (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8822B) & BIT_MASK_BCN_HEAD_1_V1_8822B)
3633 #define BIT_BCN_VALID_V1_8822B BIT(15)
3635 #define BIT_SHIFT_BCN_HEAD_V1_8822B 0
3636 #define BIT_MASK_BCN_HEAD_V1_8822B 0xfff
3637 #define BIT_BCN_HEAD_V1_8822B(x) \
3638 (((x) & BIT_MASK_BCN_HEAD_V1_8822B) << BIT_SHIFT_BCN_HEAD_V1_8822B)
3639 #define BIT_GET_BCN_HEAD_V1_8822B(x) \
3640 (((x) >> BIT_SHIFT_BCN_HEAD_V1_8822B) & BIT_MASK_BCN_HEAD_V1_8822B)
3642 /* 2 REG_AUTO_LLT_V1_8822B */
3644 #define BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 24
3645 #define BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 0xff
3646 #define BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) \
3647 (((x) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) \
3648 << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
3649 #define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) \
3650 (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) & \
3651 BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
3653 #define BIT_SHIFT_LLT_FREE_PAGE_V1_8822B 8
3654 #define BIT_MASK_LLT_FREE_PAGE_V1_8822B 0xffff
3655 #define BIT_LLT_FREE_PAGE_V1_8822B(x) \
3656 (((x) & BIT_MASK_LLT_FREE_PAGE_V1_8822B) \
3657 << BIT_SHIFT_LLT_FREE_PAGE_V1_8822B)
3658 #define BIT_GET_LLT_FREE_PAGE_V1_8822B(x) \
3659 (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8822B) & \
3660 BIT_MASK_LLT_FREE_PAGE_V1_8822B)
3662 #define BIT_SHIFT_BLK_DESC_NUM_8822B 4
3663 #define BIT_MASK_BLK_DESC_NUM_8822B 0xf
3664 #define BIT_BLK_DESC_NUM_8822B(x) \
3665 (((x) & BIT_MASK_BLK_DESC_NUM_8822B) << BIT_SHIFT_BLK_DESC_NUM_8822B)
3666 #define BIT_GET_BLK_DESC_NUM_8822B(x) \
3667 (((x) >> BIT_SHIFT_BLK_DESC_NUM_8822B) & BIT_MASK_BLK_DESC_NUM_8822B)
3669 #define BIT_R_BCN_HEAD_SEL_8822B BIT(3)
3670 #define BIT_R_EN_BCN_SW_HEAD_SEL_8822B BIT(2)
3671 #define BIT_LLT_DBG_SEL_8822B BIT(1)
3672 #define BIT_AUTO_INIT_LLT_V1_8822B BIT(0)
3674 /* 2 REG_TXDMA_OFFSET_CHK_8822B */
3675 #define BIT_EM_CHKSUM_FIN_8822B BIT(31)
3676 #define BIT_EMN_PCIE_DMA_MOD_8822B BIT(30)
3677 #define BIT_EN_TXQUE_CLR_8822B BIT(29)
3678 #define BIT_EN_PCIE_FIFO_MODE_8822B BIT(28)
3680 #define BIT_SHIFT_PG_UNDER_TH_V1_8822B 16
3681 #define BIT_MASK_PG_UNDER_TH_V1_8822B 0xfff
3682 #define BIT_PG_UNDER_TH_V1_8822B(x) \
3683 (((x) & BIT_MASK_PG_UNDER_TH_V1_8822B) \
3684 << BIT_SHIFT_PG_UNDER_TH_V1_8822B)
3685 #define BIT_GET_PG_UNDER_TH_V1_8822B(x) \
3686 (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8822B) & \
3687 BIT_MASK_PG_UNDER_TH_V1_8822B)
3689 #define BIT_RESTORE_H2C_ADDRESS_8822B BIT(15)
3690 #define BIT_SDIO_TXDESC_CHKSUM_EN_8822B BIT(13)
3691 #define BIT_RST_RDPTR_8822B BIT(12)
3692 #define BIT_RST_WRPTR_8822B BIT(11)
3693 #define BIT_CHK_PG_TH_EN_8822B BIT(10)
3694 #define BIT_DROP_DATA_EN_8822B BIT(9)
3695 #define BIT_CHECK_OFFSET_EN_8822B BIT(8)
3697 #define BIT_SHIFT_CHECK_OFFSET_8822B 0
3698 #define BIT_MASK_CHECK_OFFSET_8822B 0xff
3699 #define BIT_CHECK_OFFSET_8822B(x) \
3700 (((x) & BIT_MASK_CHECK_OFFSET_8822B) << BIT_SHIFT_CHECK_OFFSET_8822B)
3701 #define BIT_GET_CHECK_OFFSET_8822B(x) \
3702 (((x) >> BIT_SHIFT_CHECK_OFFSET_8822B) & BIT_MASK_CHECK_OFFSET_8822B)
3704 /* 2 REG_TXDMA_STATUS_8822B */
3705 #define BIT_HI_OQT_UDN_8822B BIT(17)
3706 #define BIT_HI_OQT_OVF_8822B BIT(16)
3707 #define BIT_PAYLOAD_CHKSUM_ERR_8822B BIT(15)
3708 #define BIT_PAYLOAD_UDN_8822B BIT(14)
3709 #define BIT_PAYLOAD_OVF_8822B BIT(13)
3710 #define BIT_DSC_CHKSUM_FAIL_8822B BIT(12)
3711 #define BIT_UNKNOWN_QSEL_8822B BIT(11)
3712 #define BIT_EP_QSEL_DIFF_8822B BIT(10)
3713 #define BIT_TX_OFFS_UNMATCH_8822B BIT(9)
3714 #define BIT_TXOQT_UDN_8822B BIT(8)
3715 #define BIT_TXOQT_OVF_8822B BIT(7)
3716 #define BIT_TXDMA_SFF_UDN_8822B BIT(6)
3717 #define BIT_TXDMA_SFF_OVF_8822B BIT(5)
3718 #define BIT_LLT_NULL_PG_8822B BIT(4)
3719 #define BIT_PAGE_UDN_8822B BIT(3)
3720 #define BIT_PAGE_OVF_8822B BIT(2)
3721 #define BIT_TXFF_PG_UDN_8822B BIT(1)
3722 #define BIT_TXFF_PG_OVF_8822B BIT(0)
3724 /* 2 REG_TX_DMA_DBG_8822B */
3726 /* 2 REG_TQPNT1_8822B */
3728 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8822B 16
3729 #define BIT_MASK_HPQ_HIGH_TH_V1_8822B 0xfff
3730 #define BIT_HPQ_HIGH_TH_V1_8822B(x) \
3731 (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8822B) \
3732 << BIT_SHIFT_HPQ_HIGH_TH_V1_8822B)
3733 #define BIT_GET_HPQ_HIGH_TH_V1_8822B(x) \
3734 (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8822B) & \
3735 BIT_MASK_HPQ_HIGH_TH_V1_8822B)
3737 #define BIT_SHIFT_HPQ_LOW_TH_V1_8822B 0
3738 #define BIT_MASK_HPQ_LOW_TH_V1_8822B 0xfff
3739 #define BIT_HPQ_LOW_TH_V1_8822B(x) \
3740 (((x) & BIT_MASK_HPQ_LOW_TH_V1_8822B) << BIT_SHIFT_HPQ_LOW_TH_V1_8822B)
3741 #define BIT_GET_HPQ_LOW_TH_V1_8822B(x) \
3742 (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8822B) & BIT_MASK_HPQ_LOW_TH_V1_8822B)
3744 /* 2 REG_TQPNT2_8822B */
3746 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8822B 16
3747 #define BIT_MASK_NPQ_HIGH_TH_V1_8822B 0xfff
3748 #define BIT_NPQ_HIGH_TH_V1_8822B(x) \
3749 (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8822B) \
3750 << BIT_SHIFT_NPQ_HIGH_TH_V1_8822B)
3751 #define BIT_GET_NPQ_HIGH_TH_V1_8822B(x) \
3752 (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8822B) & \
3753 BIT_MASK_NPQ_HIGH_TH_V1_8822B)
3755 #define BIT_SHIFT_NPQ_LOW_TH_V1_8822B 0
3756 #define BIT_MASK_NPQ_LOW_TH_V1_8822B 0xfff
3757 #define BIT_NPQ_LOW_TH_V1_8822B(x) \
3758 (((x) & BIT_MASK_NPQ_LOW_TH_V1_8822B) << BIT_SHIFT_NPQ_LOW_TH_V1_8822B)
3759 #define BIT_GET_NPQ_LOW_TH_V1_8822B(x) \
3760 (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8822B) & BIT_MASK_NPQ_LOW_TH_V1_8822B)
3762 /* 2 REG_TQPNT3_8822B */
3764 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8822B 16
3765 #define BIT_MASK_LPQ_HIGH_TH_V1_8822B 0xfff
3766 #define BIT_LPQ_HIGH_TH_V1_8822B(x) \
3767 (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8822B) \
3768 << BIT_SHIFT_LPQ_HIGH_TH_V1_8822B)
3769 #define BIT_GET_LPQ_HIGH_TH_V1_8822B(x) \
3770 (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8822B) & \
3771 BIT_MASK_LPQ_HIGH_TH_V1_8822B)
3773 #define BIT_SHIFT_LPQ_LOW_TH_V1_8822B 0
3774 #define BIT_MASK_LPQ_LOW_TH_V1_8822B 0xfff
3775 #define BIT_LPQ_LOW_TH_V1_8822B(x) \
3776 (((x) & BIT_MASK_LPQ_LOW_TH_V1_8822B) << BIT_SHIFT_LPQ_LOW_TH_V1_8822B)
3777 #define BIT_GET_LPQ_LOW_TH_V1_8822B(x) \
3778 (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8822B) & BIT_MASK_LPQ_LOW_TH_V1_8822B)
3780 /* 2 REG_TQPNT4_8822B */
3782 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8822B 16
3783 #define BIT_MASK_EXQ_HIGH_TH_V1_8822B 0xfff
3784 #define BIT_EXQ_HIGH_TH_V1_8822B(x) \
3785 (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8822B) \
3786 << BIT_SHIFT_EXQ_HIGH_TH_V1_8822B)
3787 #define BIT_GET_EXQ_HIGH_TH_V1_8822B(x) \
3788 (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8822B) & \
3789 BIT_MASK_EXQ_HIGH_TH_V1_8822B)
3791 #define BIT_SHIFT_EXQ_LOW_TH_V1_8822B 0
3792 #define BIT_MASK_EXQ_LOW_TH_V1_8822B 0xfff
3793 #define BIT_EXQ_LOW_TH_V1_8822B(x) \
3794 (((x) & BIT_MASK_EXQ_LOW_TH_V1_8822B) << BIT_SHIFT_EXQ_LOW_TH_V1_8822B)
3795 #define BIT_GET_EXQ_LOW_TH_V1_8822B(x) \
3796 (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8822B) & BIT_MASK_EXQ_LOW_TH_V1_8822B)
3798 /* 2 REG_RQPN_CTRL_1_8822B */
3800 #define BIT_SHIFT_TXPKTNUM_H_8822B 16
3801 #define BIT_MASK_TXPKTNUM_H_8822B 0xffff
3802 #define BIT_TXPKTNUM_H_8822B(x) \
3803 (((x) & BIT_MASK_TXPKTNUM_H_8822B) << BIT_SHIFT_TXPKTNUM_H_8822B)
3804 #define BIT_GET_TXPKTNUM_H_8822B(x) \
3805 (((x) >> BIT_SHIFT_TXPKTNUM_H_8822B) & BIT_MASK_TXPKTNUM_H_8822B)
3807 #define BIT_SHIFT_TXPKTNUM_V2_8822B 0
3808 #define BIT_MASK_TXPKTNUM_V2_8822B 0xffff
3809 #define BIT_TXPKTNUM_V2_8822B(x) \
3810 (((x) & BIT_MASK_TXPKTNUM_V2_8822B) << BIT_SHIFT_TXPKTNUM_V2_8822B)
3811 #define BIT_GET_TXPKTNUM_V2_8822B(x) \
3812 (((x) >> BIT_SHIFT_TXPKTNUM_V2_8822B) & BIT_MASK_TXPKTNUM_V2_8822B)
3814 /* 2 REG_RQPN_CTRL_2_8822B */
3815 #define BIT_LD_RQPN_8822B BIT(31)
3816 #define BIT_EXQ_PUBLIC_DIS_V1_8822B BIT(19)
3817 #define BIT_NPQ_PUBLIC_DIS_V1_8822B BIT(18)
3818 #define BIT_LPQ_PUBLIC_DIS_V1_8822B BIT(17)
3819 #define BIT_HPQ_PUBLIC_DIS_V1_8822B BIT(16)
3821 /* 2 REG_FIFOPAGE_INFO_1_8822B */
3823 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8822B 16
3824 #define BIT_MASK_HPQ_AVAL_PG_V1_8822B 0xfff
3825 #define BIT_HPQ_AVAL_PG_V1_8822B(x) \
3826 (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8822B) \
3827 << BIT_SHIFT_HPQ_AVAL_PG_V1_8822B)
3828 #define BIT_GET_HPQ_AVAL_PG_V1_8822B(x) \
3829 (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8822B) & \
3830 BIT_MASK_HPQ_AVAL_PG_V1_8822B)
3832 #define BIT_SHIFT_HPQ_V1_8822B 0
3833 #define BIT_MASK_HPQ_V1_8822B 0xfff
3834 #define BIT_HPQ_V1_8822B(x) \
3835 (((x) & BIT_MASK_HPQ_V1_8822B) << BIT_SHIFT_HPQ_V1_8822B)
3836 #define BIT_GET_HPQ_V1_8822B(x) \
3837 (((x) >> BIT_SHIFT_HPQ_V1_8822B) & BIT_MASK_HPQ_V1_8822B)
3839 /* 2 REG_FIFOPAGE_INFO_2_8822B */
3841 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8822B 16
3842 #define BIT_MASK_LPQ_AVAL_PG_V1_8822B 0xfff
3843 #define BIT_LPQ_AVAL_PG_V1_8822B(x) \
3844 (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8822B) \
3845 << BIT_SHIFT_LPQ_AVAL_PG_V1_8822B)
3846 #define BIT_GET_LPQ_AVAL_PG_V1_8822B(x) \
3847 (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8822B) & \
3848 BIT_MASK_LPQ_AVAL_PG_V1_8822B)
3850 #define BIT_SHIFT_LPQ_V1_8822B 0
3851 #define BIT_MASK_LPQ_V1_8822B 0xfff
3852 #define BIT_LPQ_V1_8822B(x) \
3853 (((x) & BIT_MASK_LPQ_V1_8822B) << BIT_SHIFT_LPQ_V1_8822B)
3854 #define BIT_GET_LPQ_V1_8822B(x) \
3855 (((x) >> BIT_SHIFT_LPQ_V1_8822B) & BIT_MASK_LPQ_V1_8822B)
3857 /* 2 REG_FIFOPAGE_INFO_3_8822B */
3859 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8822B 16
3860 #define BIT_MASK_NPQ_AVAL_PG_V1_8822B 0xfff
3861 #define BIT_NPQ_AVAL_PG_V1_8822B(x) \
3862 (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8822B) \
3863 << BIT_SHIFT_NPQ_AVAL_PG_V1_8822B)
3864 #define BIT_GET_NPQ_AVAL_PG_V1_8822B(x) \
3865 (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8822B) & \
3866 BIT_MASK_NPQ_AVAL_PG_V1_8822B)
3868 #define BIT_SHIFT_NPQ_V1_8822B 0
3869 #define BIT_MASK_NPQ_V1_8822B 0xfff
3870 #define BIT_NPQ_V1_8822B(x) \
3871 (((x) & BIT_MASK_NPQ_V1_8822B) << BIT_SHIFT_NPQ_V1_8822B)
3872 #define BIT_GET_NPQ_V1_8822B(x) \
3873 (((x) >> BIT_SHIFT_NPQ_V1_8822B) & BIT_MASK_NPQ_V1_8822B)
3875 /* 2 REG_FIFOPAGE_INFO_4_8822B */
3877 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8822B 16
3878 #define BIT_MASK_EXQ_AVAL_PG_V1_8822B 0xfff
3879 #define BIT_EXQ_AVAL_PG_V1_8822B(x) \
3880 (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8822B) \
3881 << BIT_SHIFT_EXQ_AVAL_PG_V1_8822B)
3882 #define BIT_GET_EXQ_AVAL_PG_V1_8822B(x) \
3883 (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8822B) & \
3884 BIT_MASK_EXQ_AVAL_PG_V1_8822B)
3886 #define BIT_SHIFT_EXQ_V1_8822B 0
3887 #define BIT_MASK_EXQ_V1_8822B 0xfff
3888 #define BIT_EXQ_V1_8822B(x) \
3889 (((x) & BIT_MASK_EXQ_V1_8822B) << BIT_SHIFT_EXQ_V1_8822B)
3890 #define BIT_GET_EXQ_V1_8822B(x) \
3891 (((x) >> BIT_SHIFT_EXQ_V1_8822B) & BIT_MASK_EXQ_V1_8822B)
3893 /* 2 REG_FIFOPAGE_INFO_5_8822B */
3895 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B 16
3896 #define BIT_MASK_PUBQ_AVAL_PG_V1_8822B 0xfff
3897 #define BIT_PUBQ_AVAL_PG_V1_8822B(x) \
3898 (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8822B) \
3899 << BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B)
3900 #define BIT_GET_PUBQ_AVAL_PG_V1_8822B(x) \
3901 (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B) & \
3902 BIT_MASK_PUBQ_AVAL_PG_V1_8822B)
3904 #define BIT_SHIFT_PUBQ_V1_8822B 0
3905 #define BIT_MASK_PUBQ_V1_8822B 0xfff
3906 #define BIT_PUBQ_V1_8822B(x) \
3907 (((x) & BIT_MASK_PUBQ_V1_8822B) << BIT_SHIFT_PUBQ_V1_8822B)
3908 #define BIT_GET_PUBQ_V1_8822B(x) \
3909 (((x) >> BIT_SHIFT_PUBQ_V1_8822B) & BIT_MASK_PUBQ_V1_8822B)
3911 /* 2 REG_H2C_HEAD_8822B */
3913 #define BIT_SHIFT_H2C_HEAD_8822B 0
3914 #define BIT_MASK_H2C_HEAD_8822B 0x3ffff
3915 #define BIT_H2C_HEAD_8822B(x) \
3916 (((x) & BIT_MASK_H2C_HEAD_8822B) << BIT_SHIFT_H2C_HEAD_8822B)
3917 #define BIT_GET_H2C_HEAD_8822B(x) \
3918 (((x) >> BIT_SHIFT_H2C_HEAD_8822B) & BIT_MASK_H2C_HEAD_8822B)
3920 /* 2 REG_H2C_TAIL_8822B */
3922 #define BIT_SHIFT_H2C_TAIL_8822B 0
3923 #define BIT_MASK_H2C_TAIL_8822B 0x3ffff
3924 #define BIT_H2C_TAIL_8822B(x) \
3925 (((x) & BIT_MASK_H2C_TAIL_8822B) << BIT_SHIFT_H2C_TAIL_8822B)
3926 #define BIT_GET_H2C_TAIL_8822B(x) \
3927 (((x) >> BIT_SHIFT_H2C_TAIL_8822B) & BIT_MASK_H2C_TAIL_8822B)
3929 /* 2 REG_H2C_READ_ADDR_8822B */
3931 #define BIT_SHIFT_H2C_READ_ADDR_8822B 0
3932 #define BIT_MASK_H2C_READ_ADDR_8822B 0x3ffff
3933 #define BIT_H2C_READ_ADDR_8822B(x) \
3934 (((x) & BIT_MASK_H2C_READ_ADDR_8822B) << BIT_SHIFT_H2C_READ_ADDR_8822B)
3935 #define BIT_GET_H2C_READ_ADDR_8822B(x) \
3936 (((x) >> BIT_SHIFT_H2C_READ_ADDR_8822B) & BIT_MASK_H2C_READ_ADDR_8822B)
3938 /* 2 REG_H2C_WR_ADDR_8822B */
3940 #define BIT_SHIFT_H2C_WR_ADDR_8822B 0
3941 #define BIT_MASK_H2C_WR_ADDR_8822B 0x3ffff
3942 #define BIT_H2C_WR_ADDR_8822B(x) \
3943 (((x) & BIT_MASK_H2C_WR_ADDR_8822B) << BIT_SHIFT_H2C_WR_ADDR_8822B)
3944 #define BIT_GET_H2C_WR_ADDR_8822B(x) \
3945 (((x) >> BIT_SHIFT_H2C_WR_ADDR_8822B) & BIT_MASK_H2C_WR_ADDR_8822B)
3947 /* 2 REG_H2C_INFO_8822B */
3948 #define BIT_H2C_SPACE_VLD_8822B BIT(3)
3949 #define BIT_H2C_WR_ADDR_RST_8822B BIT(2)
3951 #define BIT_SHIFT_H2C_LEN_SEL_8822B 0
3952 #define BIT_MASK_H2C_LEN_SEL_8822B 0x3
3953 #define BIT_H2C_LEN_SEL_8822B(x) \
3954 (((x) & BIT_MASK_H2C_LEN_SEL_8822B) << BIT_SHIFT_H2C_LEN_SEL_8822B)
3955 #define BIT_GET_H2C_LEN_SEL_8822B(x) \
3956 (((x) >> BIT_SHIFT_H2C_LEN_SEL_8822B) & BIT_MASK_H2C_LEN_SEL_8822B)
3958 /* 2 REG_RXDMA_AGG_PG_TH_8822B */
3960 #define BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B 24
3961 #define BIT_MASK_RXDMA_AGG_OLD_MOD_8822B 0xff
3962 #define BIT_RXDMA_AGG_OLD_MOD_8822B(x) \
3963 (((x) & BIT_MASK_RXDMA_AGG_OLD_MOD_8822B) \
3964 << BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B)
3965 #define BIT_GET_RXDMA_AGG_OLD_MOD_8822B(x) \
3966 (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B) & \
3967 BIT_MASK_RXDMA_AGG_OLD_MOD_8822B)
3969 #define BIT_SHIFT_PKT_NUM_WOL_8822B 16
3970 #define BIT_MASK_PKT_NUM_WOL_8822B 0xff
3971 #define BIT_PKT_NUM_WOL_8822B(x) \
3972 (((x) & BIT_MASK_PKT_NUM_WOL_8822B) << BIT_SHIFT_PKT_NUM_WOL_8822B)
3973 #define BIT_GET_PKT_NUM_WOL_8822B(x) \
3974 (((x) >> BIT_SHIFT_PKT_NUM_WOL_8822B) & BIT_MASK_PKT_NUM_WOL_8822B)
3976 #define BIT_SHIFT_DMA_AGG_TO_8822B 8
3977 #define BIT_MASK_DMA_AGG_TO_8822B 0xf
3978 #define BIT_DMA_AGG_TO_8822B(x) \
3979 (((x) & BIT_MASK_DMA_AGG_TO_8822B) << BIT_SHIFT_DMA_AGG_TO_8822B)
3980 #define BIT_GET_DMA_AGG_TO_8822B(x) \
3981 (((x) >> BIT_SHIFT_DMA_AGG_TO_8822B) & BIT_MASK_DMA_AGG_TO_8822B)
3983 #define BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B 0
3984 #define BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B 0xf
3985 #define BIT_RXDMA_AGG_PG_TH_V1_8822B(x) \
3986 (((x) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B) \
3987 << BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B)
3988 #define BIT_GET_RXDMA_AGG_PG_TH_V1_8822B(x) \
3989 (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B) & \
3990 BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B)
3992 /* 2 REG_RXPKT_NUM_8822B */
3994 #define BIT_SHIFT_RXPKT_NUM_8822B 24
3995 #define BIT_MASK_RXPKT_NUM_8822B 0xff
3996 #define BIT_RXPKT_NUM_8822B(x) \
3997 (((x) & BIT_MASK_RXPKT_NUM_8822B) << BIT_SHIFT_RXPKT_NUM_8822B)
3998 #define BIT_GET_RXPKT_NUM_8822B(x) \
3999 (((x) >> BIT_SHIFT_RXPKT_NUM_8822B) & BIT_MASK_RXPKT_NUM_8822B)
4001 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B 20
4002 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B 0xf
4003 #define BIT_FW_UPD_RDPTR19_TO_16_8822B(x) \
4004 (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B) \
4005 << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B)
4006 #define BIT_GET_FW_UPD_RDPTR19_TO_16_8822B(x) \
4007 (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B) & \
4008 BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B)
4010 #define BIT_RXDMA_REQ_8822B BIT(19)
4011 #define BIT_RW_RELEASE_EN_8822B BIT(18)
4012 #define BIT_RXDMA_IDLE_8822B BIT(17)
4013 #define BIT_RXPKT_RELEASE_POLL_8822B BIT(16)
4015 #define BIT_SHIFT_FW_UPD_RDPTR_8822B 0
4016 #define BIT_MASK_FW_UPD_RDPTR_8822B 0xffff
4017 #define BIT_FW_UPD_RDPTR_8822B(x) \
4018 (((x) & BIT_MASK_FW_UPD_RDPTR_8822B) << BIT_SHIFT_FW_UPD_RDPTR_8822B)
4019 #define BIT_GET_FW_UPD_RDPTR_8822B(x) \
4020 (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8822B) & BIT_MASK_FW_UPD_RDPTR_8822B)
4022 /* 2 REG_RXDMA_STATUS_8822B */
4023 #define BIT_C2H_PKT_OVF_8822B BIT(7)
4024 #define BIT_AGG_CONFGI_ISSUE_8822B BIT(6)
4025 #define BIT_FW_POLL_ISSUE_8822B BIT(5)
4026 #define BIT_RX_DATA_UDN_8822B BIT(4)
4027 #define BIT_RX_SFF_UDN_8822B BIT(3)
4028 #define BIT_RX_SFF_OVF_8822B BIT(2)
4029 #define BIT_RXPKT_OVF_8822B BIT(0)
4031 /* 2 REG_RXDMA_DPR_8822B */
4033 #define BIT_SHIFT_RDE_DEBUG_8822B 0
4034 #define BIT_MASK_RDE_DEBUG_8822B 0xffffffffL
4035 #define BIT_RDE_DEBUG_8822B(x) \
4036 (((x) & BIT_MASK_RDE_DEBUG_8822B) << BIT_SHIFT_RDE_DEBUG_8822B)
4037 #define BIT_GET_RDE_DEBUG_8822B(x) \
4038 (((x) >> BIT_SHIFT_RDE_DEBUG_8822B) & BIT_MASK_RDE_DEBUG_8822B)
4040 /* 2 REG_RXDMA_MODE_8822B */
4042 #define BIT_SHIFT_PKTNUM_TH_V2_8822B 24
4043 #define BIT_MASK_PKTNUM_TH_V2_8822B 0x1f
4044 #define BIT_PKTNUM_TH_V2_8822B(x) \
4045 (((x) & BIT_MASK_PKTNUM_TH_V2_8822B) << BIT_SHIFT_PKTNUM_TH_V2_8822B)
4046 #define BIT_GET_PKTNUM_TH_V2_8822B(x) \
4047 (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8822B) & BIT_MASK_PKTNUM_TH_V2_8822B)
4049 #define BIT_TXBA_BREAK_USBAGG_8822B BIT(23)
4051 #define BIT_SHIFT_PKTLEN_PARA_8822B 16
4052 #define BIT_MASK_PKTLEN_PARA_8822B 0x7
4053 #define BIT_PKTLEN_PARA_8822B(x) \
4054 (((x) & BIT_MASK_PKTLEN_PARA_8822B) << BIT_SHIFT_PKTLEN_PARA_8822B)
4055 #define BIT_GET_PKTLEN_PARA_8822B(x) \
4056 (((x) >> BIT_SHIFT_PKTLEN_PARA_8822B) & BIT_MASK_PKTLEN_PARA_8822B)
4058 /* 2 REG_NOT_VALID_8822B */
4060 /* 2 REG_NOT_VALID_8822B */
4062 /* 2 REG_NOT_VALID_8822B */
4064 #define BIT_SHIFT_BURST_SIZE_8822B 4
4065 #define BIT_MASK_BURST_SIZE_8822B 0x3
4066 #define BIT_BURST_SIZE_8822B(x) \
4067 (((x) & BIT_MASK_BURST_SIZE_8822B) << BIT_SHIFT_BURST_SIZE_8822B)
4068 #define BIT_GET_BURST_SIZE_8822B(x) \
4069 (((x) >> BIT_SHIFT_BURST_SIZE_8822B) & BIT_MASK_BURST_SIZE_8822B)
4071 #define BIT_SHIFT_BURST_CNT_8822B 2
4072 #define BIT_MASK_BURST_CNT_8822B 0x3
4073 #define BIT_BURST_CNT_8822B(x) \
4074 (((x) & BIT_MASK_BURST_CNT_8822B) << BIT_SHIFT_BURST_CNT_8822B)
4075 #define BIT_GET_BURST_CNT_8822B(x) \
4076 (((x) >> BIT_SHIFT_BURST_CNT_8822B) & BIT_MASK_BURST_CNT_8822B)
4078 #define BIT_DMA_MODE_8822B BIT(1)
4080 /* 2 REG_C2H_PKT_8822B */
4082 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B 24
4083 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B 0xf
4084 #define BIT_R_C2H_STR_ADDR_16_TO_19_8822B(x) \
4085 (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B) \
4086 << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B)
4087 #define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8822B(x) \
4088 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B) & \
4089 BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B)
4091 #define BIT_R_C2H_PKT_REQ_8822B BIT(16)
4093 #define BIT_SHIFT_R_C2H_STR_ADDR_8822B 0
4094 #define BIT_MASK_R_C2H_STR_ADDR_8822B 0xffff
4095 #define BIT_R_C2H_STR_ADDR_8822B(x) \
4096 (((x) & BIT_MASK_R_C2H_STR_ADDR_8822B) \
4097 << BIT_SHIFT_R_C2H_STR_ADDR_8822B)
4098 #define BIT_GET_R_C2H_STR_ADDR_8822B(x) \
4099 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8822B) & \
4100 BIT_MASK_R_C2H_STR_ADDR_8822B)
4102 /* 2 REG_FWFF_C2H_8822B */
4104 #define BIT_SHIFT_C2H_DMA_ADDR_8822B 0
4105 #define BIT_MASK_C2H_DMA_ADDR_8822B 0x3ffff
4106 #define BIT_C2H_DMA_ADDR_8822B(x) \
4107 (((x) & BIT_MASK_C2H_DMA_ADDR_8822B) << BIT_SHIFT_C2H_DMA_ADDR_8822B)
4108 #define BIT_GET_C2H_DMA_ADDR_8822B(x) \
4109 (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8822B) & BIT_MASK_C2H_DMA_ADDR_8822B)
4111 /* 2 REG_FWFF_CTRL_8822B */
4112 #define BIT_FWFF_DMAPKT_REQ_8822B BIT(31)
4114 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B 16
4115 #define BIT_MASK_FWFF_DMA_PKT_NUM_8822B 0xff
4116 #define BIT_FWFF_DMA_PKT_NUM_8822B(x) \
4117 (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8822B) \
4118 << BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B)
4119 #define BIT_GET_FWFF_DMA_PKT_NUM_8822B(x) \
4120 (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B) & \
4121 BIT_MASK_FWFF_DMA_PKT_NUM_8822B)
4123 #define BIT_SHIFT_FWFF_STR_ADDR_8822B 0
4124 #define BIT_MASK_FWFF_STR_ADDR_8822B 0xffff
4125 #define BIT_FWFF_STR_ADDR_8822B(x) \
4126 (((x) & BIT_MASK_FWFF_STR_ADDR_8822B) << BIT_SHIFT_FWFF_STR_ADDR_8822B)
4127 #define BIT_GET_FWFF_STR_ADDR_8822B(x) \
4128 (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8822B) & BIT_MASK_FWFF_STR_ADDR_8822B)
4130 /* 2 REG_FWFF_PKT_INFO_8822B */
4132 #define BIT_SHIFT_FWFF_PKT_QUEUED_8822B 16
4133 #define BIT_MASK_FWFF_PKT_QUEUED_8822B 0xff
4134 #define BIT_FWFF_PKT_QUEUED_8822B(x) \
4135 (((x) & BIT_MASK_FWFF_PKT_QUEUED_8822B) \
4136 << BIT_SHIFT_FWFF_PKT_QUEUED_8822B)
4137 #define BIT_GET_FWFF_PKT_QUEUED_8822B(x) \
4138 (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8822B) & \
4139 BIT_MASK_FWFF_PKT_QUEUED_8822B)
4141 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B 0
4142 #define BIT_MASK_FWFF_PKT_STR_ADDR_8822B 0xffff
4143 #define BIT_FWFF_PKT_STR_ADDR_8822B(x) \
4144 (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_8822B) \
4145 << BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B)
4146 #define BIT_GET_FWFF_PKT_STR_ADDR_8822B(x) \
4147 (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B) & \
4148 BIT_MASK_FWFF_PKT_STR_ADDR_8822B)
4150 /* 2 REG_NOT_VALID_8822B */
4152 /* 2 REG_DDMA_CH0SA_8822B */
4154 #define BIT_SHIFT_DDMACH0_SA_8822B 0
4155 #define BIT_MASK_DDMACH0_SA_8822B 0xffffffffL
4156 #define BIT_DDMACH0_SA_8822B(x) \
4157 (((x) & BIT_MASK_DDMACH0_SA_8822B) << BIT_SHIFT_DDMACH0_SA_8822B)
4158 #define BIT_GET_DDMACH0_SA_8822B(x) \
4159 (((x) >> BIT_SHIFT_DDMACH0_SA_8822B) & BIT_MASK_DDMACH0_SA_8822B)
4161 /* 2 REG_DDMA_CH0DA_8822B */
4163 #define BIT_SHIFT_DDMACH0_DA_8822B 0
4164 #define BIT_MASK_DDMACH0_DA_8822B 0xffffffffL
4165 #define BIT_DDMACH0_DA_8822B(x) \
4166 (((x) & BIT_MASK_DDMACH0_DA_8822B) << BIT_SHIFT_DDMACH0_DA_8822B)
4167 #define BIT_GET_DDMACH0_DA_8822B(x) \
4168 (((x) >> BIT_SHIFT_DDMACH0_DA_8822B) & BIT_MASK_DDMACH0_DA_8822B)
4170 /* 2 REG_DDMA_CH0CTRL_8822B */
4171 #define BIT_DDMACH0_OWN_8822B BIT(31)
4172 #define BIT_DDMACH0_CHKSUM_EN_8822B BIT(29)
4173 #define BIT_DDMACH0_DA_W_DISABLE_8822B BIT(28)
4174 #define BIT_DDMACH0_CHKSUM_STS_8822B BIT(27)
4175 #define BIT_DDMACH0_DDMA_MODE_8822B BIT(26)
4176 #define BIT_DDMACH0_RESET_CHKSUM_STS_8822B BIT(25)
4177 #define BIT_DDMACH0_CHKSUM_CONT_8822B BIT(24)
4179 #define BIT_SHIFT_DDMACH0_DLEN_8822B 0
4180 #define BIT_MASK_DDMACH0_DLEN_8822B 0x3ffff
4181 #define BIT_DDMACH0_DLEN_8822B(x) \
4182 (((x) & BIT_MASK_DDMACH0_DLEN_8822B) << BIT_SHIFT_DDMACH0_DLEN_8822B)
4183 #define BIT_GET_DDMACH0_DLEN_8822B(x) \
4184 (((x) >> BIT_SHIFT_DDMACH0_DLEN_8822B) & BIT_MASK_DDMACH0_DLEN_8822B)
4186 /* 2 REG_DDMA_CH1SA_8822B */
4188 #define BIT_SHIFT_DDMACH1_SA_8822B 0
4189 #define BIT_MASK_DDMACH1_SA_8822B 0xffffffffL
4190 #define BIT_DDMACH1_SA_8822B(x) \
4191 (((x) & BIT_MASK_DDMACH1_SA_8822B) << BIT_SHIFT_DDMACH1_SA_8822B)
4192 #define BIT_GET_DDMACH1_SA_8822B(x) \
4193 (((x) >> BIT_SHIFT_DDMACH1_SA_8822B) & BIT_MASK_DDMACH1_SA_8822B)
4195 /* 2 REG_DDMA_CH1DA_8822B */
4197 #define BIT_SHIFT_DDMACH1_DA_8822B 0
4198 #define BIT_MASK_DDMACH1_DA_8822B 0xffffffffL
4199 #define BIT_DDMACH1_DA_8822B(x) \
4200 (((x) & BIT_MASK_DDMACH1_DA_8822B) << BIT_SHIFT_DDMACH1_DA_8822B)
4201 #define BIT_GET_DDMACH1_DA_8822B(x) \
4202 (((x) >> BIT_SHIFT_DDMACH1_DA_8822B) & BIT_MASK_DDMACH1_DA_8822B)
4204 /* 2 REG_DDMA_CH1CTRL_8822B */
4205 #define BIT_DDMACH1_OWN_8822B BIT(31)
4206 #define BIT_DDMACH1_CHKSUM_EN_8822B BIT(29)
4207 #define BIT_DDMACH1_DA_W_DISABLE_8822B BIT(28)
4208 #define BIT_DDMACH1_CHKSUM_STS_8822B BIT(27)
4209 #define BIT_DDMACH1_DDMA_MODE_8822B BIT(26)
4210 #define BIT_DDMACH1_RESET_CHKSUM_STS_8822B BIT(25)
4211 #define BIT_DDMACH1_CHKSUM_CONT_8822B BIT(24)
4213 #define BIT_SHIFT_DDMACH1_DLEN_8822B 0
4214 #define BIT_MASK_DDMACH1_DLEN_8822B 0x3ffff
4215 #define BIT_DDMACH1_DLEN_8822B(x) \
4216 (((x) & BIT_MASK_DDMACH1_DLEN_8822B) << BIT_SHIFT_DDMACH1_DLEN_8822B)
4217 #define BIT_GET_DDMACH1_DLEN_8822B(x) \
4218 (((x) >> BIT_SHIFT_DDMACH1_DLEN_8822B) & BIT_MASK_DDMACH1_DLEN_8822B)
4220 /* 2 REG_DDMA_CH2SA_8822B */
4222 #define BIT_SHIFT_DDMACH2_SA_8822B 0
4223 #define BIT_MASK_DDMACH2_SA_8822B 0xffffffffL
4224 #define BIT_DDMACH2_SA_8822B(x) \
4225 (((x) & BIT_MASK_DDMACH2_SA_8822B) << BIT_SHIFT_DDMACH2_SA_8822B)
4226 #define BIT_GET_DDMACH2_SA_8822B(x) \
4227 (((x) >> BIT_SHIFT_DDMACH2_SA_8822B) & BIT_MASK_DDMACH2_SA_8822B)
4229 /* 2 REG_DDMA_CH2DA_8822B */
4231 #define BIT_SHIFT_DDMACH2_DA_8822B 0
4232 #define BIT_MASK_DDMACH2_DA_8822B 0xffffffffL
4233 #define BIT_DDMACH2_DA_8822B(x) \
4234 (((x) & BIT_MASK_DDMACH2_DA_8822B) << BIT_SHIFT_DDMACH2_DA_8822B)
4235 #define BIT_GET_DDMACH2_DA_8822B(x) \
4236 (((x) >> BIT_SHIFT_DDMACH2_DA_8822B) & BIT_MASK_DDMACH2_DA_8822B)
4238 /* 2 REG_DDMA_CH2CTRL_8822B */
4239 #define BIT_DDMACH2_OWN_8822B BIT(31)
4240 #define BIT_DDMACH2_CHKSUM_EN_8822B BIT(29)
4241 #define BIT_DDMACH2_DA_W_DISABLE_8822B BIT(28)
4242 #define BIT_DDMACH2_CHKSUM_STS_8822B BIT(27)
4243 #define BIT_DDMACH2_DDMA_MODE_8822B BIT(26)
4244 #define BIT_DDMACH2_RESET_CHKSUM_STS_8822B BIT(25)
4245 #define BIT_DDMACH2_CHKSUM_CONT_8822B BIT(24)
4247 #define BIT_SHIFT_DDMACH2_DLEN_8822B 0
4248 #define BIT_MASK_DDMACH2_DLEN_8822B 0x3ffff
4249 #define BIT_DDMACH2_DLEN_8822B(x) \
4250 (((x) & BIT_MASK_DDMACH2_DLEN_8822B) << BIT_SHIFT_DDMACH2_DLEN_8822B)
4251 #define BIT_GET_DDMACH2_DLEN_8822B(x) \
4252 (((x) >> BIT_SHIFT_DDMACH2_DLEN_8822B) & BIT_MASK_DDMACH2_DLEN_8822B)
4254 /* 2 REG_DDMA_CH3SA_8822B */
4256 #define BIT_SHIFT_DDMACH3_SA_8822B 0
4257 #define BIT_MASK_DDMACH3_SA_8822B 0xffffffffL
4258 #define BIT_DDMACH3_SA_8822B(x) \
4259 (((x) & BIT_MASK_DDMACH3_SA_8822B) << BIT_SHIFT_DDMACH3_SA_8822B)
4260 #define BIT_GET_DDMACH3_SA_8822B(x) \
4261 (((x) >> BIT_SHIFT_DDMACH3_SA_8822B) & BIT_MASK_DDMACH3_SA_8822B)
4263 /* 2 REG_DDMA_CH3DA_8822B */
4265 #define BIT_SHIFT_DDMACH3_DA_8822B 0
4266 #define BIT_MASK_DDMACH3_DA_8822B 0xffffffffL
4267 #define BIT_DDMACH3_DA_8822B(x) \
4268 (((x) & BIT_MASK_DDMACH3_DA_8822B) << BIT_SHIFT_DDMACH3_DA_8822B)
4269 #define BIT_GET_DDMACH3_DA_8822B(x) \
4270 (((x) >> BIT_SHIFT_DDMACH3_DA_8822B) & BIT_MASK_DDMACH3_DA_8822B)
4272 /* 2 REG_DDMA_CH3CTRL_8822B */
4273 #define BIT_DDMACH3_OWN_8822B BIT(31)
4274 #define BIT_DDMACH3_CHKSUM_EN_8822B BIT(29)
4275 #define BIT_DDMACH3_DA_W_DISABLE_8822B BIT(28)
4276 #define BIT_DDMACH3_CHKSUM_STS_8822B BIT(27)
4277 #define BIT_DDMACH3_DDMA_MODE_8822B BIT(26)
4278 #define BIT_DDMACH3_RESET_CHKSUM_STS_8822B BIT(25)
4279 #define BIT_DDMACH3_CHKSUM_CONT_8822B BIT(24)
4281 #define BIT_SHIFT_DDMACH3_DLEN_8822B 0
4282 #define BIT_MASK_DDMACH3_DLEN_8822B 0x3ffff
4283 #define BIT_DDMACH3_DLEN_8822B(x) \
4284 (((x) & BIT_MASK_DDMACH3_DLEN_8822B) << BIT_SHIFT_DDMACH3_DLEN_8822B)
4285 #define BIT_GET_DDMACH3_DLEN_8822B(x) \
4286 (((x) >> BIT_SHIFT_DDMACH3_DLEN_8822B) & BIT_MASK_DDMACH3_DLEN_8822B)
4288 /* 2 REG_DDMA_CH4SA_8822B */
4290 #define BIT_SHIFT_DDMACH4_SA_8822B 0
4291 #define BIT_MASK_DDMACH4_SA_8822B 0xffffffffL
4292 #define BIT_DDMACH4_SA_8822B(x) \
4293 (((x) & BIT_MASK_DDMACH4_SA_8822B) << BIT_SHIFT_DDMACH4_SA_8822B)
4294 #define BIT_GET_DDMACH4_SA_8822B(x) \
4295 (((x) >> BIT_SHIFT_DDMACH4_SA_8822B) & BIT_MASK_DDMACH4_SA_8822B)
4297 /* 2 REG_DDMA_CH4DA_8822B */
4299 #define BIT_SHIFT_DDMACH4_DA_8822B 0
4300 #define BIT_MASK_DDMACH4_DA_8822B 0xffffffffL
4301 #define BIT_DDMACH4_DA_8822B(x) \
4302 (((x) & BIT_MASK_DDMACH4_DA_8822B) << BIT_SHIFT_DDMACH4_DA_8822B)
4303 #define BIT_GET_DDMACH4_DA_8822B(x) \
4304 (((x) >> BIT_SHIFT_DDMACH4_DA_8822B) & BIT_MASK_DDMACH4_DA_8822B)
4306 /* 2 REG_DDMA_CH4CTRL_8822B */
4307 #define BIT_DDMACH4_OWN_8822B BIT(31)
4308 #define BIT_DDMACH4_CHKSUM_EN_8822B BIT(29)
4309 #define BIT_DDMACH4_DA_W_DISABLE_8822B BIT(28)
4310 #define BIT_DDMACH4_CHKSUM_STS_8822B BIT(27)
4311 #define BIT_DDMACH4_DDMA_MODE_8822B BIT(26)
4312 #define BIT_DDMACH4_RESET_CHKSUM_STS_8822B BIT(25)
4313 #define BIT_DDMACH4_CHKSUM_CONT_8822B BIT(24)
4315 #define BIT_SHIFT_DDMACH4_DLEN_8822B 0
4316 #define BIT_MASK_DDMACH4_DLEN_8822B 0x3ffff
4317 #define BIT_DDMACH4_DLEN_8822B(x) \
4318 (((x) & BIT_MASK_DDMACH4_DLEN_8822B) << BIT_SHIFT_DDMACH4_DLEN_8822B)
4319 #define BIT_GET_DDMACH4_DLEN_8822B(x) \
4320 (((x) >> BIT_SHIFT_DDMACH4_DLEN_8822B) & BIT_MASK_DDMACH4_DLEN_8822B)
4322 /* 2 REG_DDMA_CH5SA_8822B */
4324 #define BIT_SHIFT_DDMACH5_SA_8822B 0
4325 #define BIT_MASK_DDMACH5_SA_8822B 0xffffffffL
4326 #define BIT_DDMACH5_SA_8822B(x) \
4327 (((x) & BIT_MASK_DDMACH5_SA_8822B) << BIT_SHIFT_DDMACH5_SA_8822B)
4328 #define BIT_GET_DDMACH5_SA_8822B(x) \
4329 (((x) >> BIT_SHIFT_DDMACH5_SA_8822B) & BIT_MASK_DDMACH5_SA_8822B)
4331 /* 2 REG_DDMA_CH5DA_8822B */
4333 #define BIT_SHIFT_DDMACH5_DA_8822B 0
4334 #define BIT_MASK_DDMACH5_DA_8822B 0xffffffffL
4335 #define BIT_DDMACH5_DA_8822B(x) \
4336 (((x) & BIT_MASK_DDMACH5_DA_8822B) << BIT_SHIFT_DDMACH5_DA_8822B)
4337 #define BIT_GET_DDMACH5_DA_8822B(x) \
4338 (((x) >> BIT_SHIFT_DDMACH5_DA_8822B) & BIT_MASK_DDMACH5_DA_8822B)
4340 /* 2 REG_REG_DDMA_CH5CTRL_8822B */
4341 #define BIT_DDMACH5_OWN_8822B BIT(31)
4342 #define BIT_DDMACH5_CHKSUM_EN_8822B BIT(29)
4343 #define BIT_DDMACH5_DA_W_DISABLE_8822B BIT(28)
4344 #define BIT_DDMACH5_CHKSUM_STS_8822B BIT(27)
4345 #define BIT_DDMACH5_DDMA_MODE_8822B BIT(26)
4346 #define BIT_DDMACH5_RESET_CHKSUM_STS_8822B BIT(25)
4347 #define BIT_DDMACH5_CHKSUM_CONT_8822B BIT(24)
4349 #define BIT_SHIFT_DDMACH5_DLEN_8822B 0
4350 #define BIT_MASK_DDMACH5_DLEN_8822B 0x3ffff
4351 #define BIT_DDMACH5_DLEN_8822B(x) \
4352 (((x) & BIT_MASK_DDMACH5_DLEN_8822B) << BIT_SHIFT_DDMACH5_DLEN_8822B)
4353 #define BIT_GET_DDMACH5_DLEN_8822B(x) \
4354 (((x) >> BIT_SHIFT_DDMACH5_DLEN_8822B) & BIT_MASK_DDMACH5_DLEN_8822B)
4356 /* 2 REG_DDMA_INT_MSK_8822B */
4357 #define BIT_DDMACH5_MSK_8822B BIT(5)
4358 #define BIT_DDMACH4_MSK_8822B BIT(4)
4359 #define BIT_DDMACH3_MSK_8822B BIT(3)
4360 #define BIT_DDMACH2_MSK_8822B BIT(2)
4361 #define BIT_DDMACH1_MSK_8822B BIT(1)
4362 #define BIT_DDMACH0_MSK_8822B BIT(0)
4364 /* 2 REG_DDMA_CHSTATUS_8822B */
4365 #define BIT_DDMACH5_BUSY_8822B BIT(5)
4366 #define BIT_DDMACH4_BUSY_8822B BIT(4)
4367 #define BIT_DDMACH3_BUSY_8822B BIT(3)
4368 #define BIT_DDMACH2_BUSY_8822B BIT(2)
4369 #define BIT_DDMACH1_BUSY_8822B BIT(1)
4370 #define BIT_DDMACH0_BUSY_8822B BIT(0)
4372 /* 2 REG_DDMA_CHKSUM_8822B */
4374 #define BIT_SHIFT_IDDMA0_CHKSUM_8822B 0
4375 #define BIT_MASK_IDDMA0_CHKSUM_8822B 0xffff
4376 #define BIT_IDDMA0_CHKSUM_8822B(x) \
4377 (((x) & BIT_MASK_IDDMA0_CHKSUM_8822B) << BIT_SHIFT_IDDMA0_CHKSUM_8822B)
4378 #define BIT_GET_IDDMA0_CHKSUM_8822B(x) \
4379 (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8822B) & BIT_MASK_IDDMA0_CHKSUM_8822B)
4381 /* 2 REG_DDMA_MONITOR_8822B */
4382 #define BIT_IDDMA0_PERMU_UNDERFLOW_8822B BIT(14)
4383 #define BIT_IDDMA0_FIFO_UNDERFLOW_8822B BIT(13)
4384 #define BIT_IDDMA0_FIFO_OVERFLOW_8822B BIT(12)
4385 #define BIT_CH5_ERR_8822B BIT(5)
4386 #define BIT_CH4_ERR_8822B BIT(4)
4387 #define BIT_CH3_ERR_8822B BIT(3)
4388 #define BIT_CH2_ERR_8822B BIT(2)
4389 #define BIT_CH1_ERR_8822B BIT(1)
4390 #define BIT_CH0_ERR_8822B BIT(0)
4392 /* 2 REG_NOT_VALID_8822B */
4394 /* 2 REG_PCIE_CTRL_8822B */
4395 #define BIT_PCIEIO_PERSTB_SEL_8822B BIT(31)
4397 #define BIT_SHIFT_PCIE_MAX_RXDMA_8822B 28
4398 #define BIT_MASK_PCIE_MAX_RXDMA_8822B 0x7
4399 #define BIT_PCIE_MAX_RXDMA_8822B(x) \
4400 (((x) & BIT_MASK_PCIE_MAX_RXDMA_8822B) \
4401 << BIT_SHIFT_PCIE_MAX_RXDMA_8822B)
4402 #define BIT_GET_PCIE_MAX_RXDMA_8822B(x) \
4403 (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8822B) & \
4404 BIT_MASK_PCIE_MAX_RXDMA_8822B)
4406 #define BIT_MULRW_8822B BIT(27)
4408 #define BIT_SHIFT_PCIE_MAX_TXDMA_8822B 24
4409 #define BIT_MASK_PCIE_MAX_TXDMA_8822B 0x7
4410 #define BIT_PCIE_MAX_TXDMA_8822B(x) \
4411 (((x) & BIT_MASK_PCIE_MAX_TXDMA_8822B) \
4412 << BIT_SHIFT_PCIE_MAX_TXDMA_8822B)
4413 #define BIT_GET_PCIE_MAX_TXDMA_8822B(x) \
4414 (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8822B) & \
4415 BIT_MASK_PCIE_MAX_TXDMA_8822B)
4417 #define BIT_EN_CPL_TIMEOUT_PS_8822B BIT(22)
4418 #define BIT_REG_TXDMA_FAIL_PS_8822B BIT(21)
4419 #define BIT_PCIE_RST_TRXDMA_INTF_8822B BIT(20)
4420 #define BIT_EN_HWENTR_L1_8822B BIT(19)
4421 #define BIT_EN_ADV_CLKGATE_8822B BIT(18)
4422 #define BIT_PCIE_EN_SWENT_L23_8822B BIT(17)
4423 #define BIT_PCIE_EN_HWEXT_L1_8822B BIT(16)
4424 #define BIT_RX_CLOSE_EN_8822B BIT(15)
4425 #define BIT_STOP_BCNQ_8822B BIT(14)
4426 #define BIT_STOP_MGQ_8822B BIT(13)
4427 #define BIT_STOP_VOQ_8822B BIT(12)
4428 #define BIT_STOP_VIQ_8822B BIT(11)
4429 #define BIT_STOP_BEQ_8822B BIT(10)
4430 #define BIT_STOP_BKQ_8822B BIT(9)
4431 #define BIT_STOP_RXQ_8822B BIT(8)
4432 #define BIT_STOP_HI7Q_8822B BIT(7)
4433 #define BIT_STOP_HI6Q_8822B BIT(6)
4434 #define BIT_STOP_HI5Q_8822B BIT(5)
4435 #define BIT_STOP_HI4Q_8822B BIT(4)
4436 #define BIT_STOP_HI3Q_8822B BIT(3)
4437 #define BIT_STOP_HI2Q_8822B BIT(2)
4438 #define BIT_STOP_HI1Q_8822B BIT(1)
4439 #define BIT_STOP_HI0Q_8822B BIT(0)
4441 /* 2 REG_INT_MIG_8822B */
4443 #define BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B 28
4444 #define BIT_MASK_TXTTIMER_MATCH_NUM_8822B 0xf
4445 #define BIT_TXTTIMER_MATCH_NUM_8822B(x) \
4446 (((x) & BIT_MASK_TXTTIMER_MATCH_NUM_8822B) \
4447 << BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B)
4448 #define BIT_GET_TXTTIMER_MATCH_NUM_8822B(x) \
4449 (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B) & \
4450 BIT_MASK_TXTTIMER_MATCH_NUM_8822B)
4452 #define BIT_SHIFT_TXPKT_NUM_MATCH_8822B 24
4453 #define BIT_MASK_TXPKT_NUM_MATCH_8822B 0xf
4454 #define BIT_TXPKT_NUM_MATCH_8822B(x) \
4455 (((x) & BIT_MASK_TXPKT_NUM_MATCH_8822B) \
4456 << BIT_SHIFT_TXPKT_NUM_MATCH_8822B)
4457 #define BIT_GET_TXPKT_NUM_MATCH_8822B(x) \
4458 (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8822B) & \
4459 BIT_MASK_TXPKT_NUM_MATCH_8822B)
4461 #define BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B 20
4462 #define BIT_MASK_RXTTIMER_MATCH_NUM_8822B 0xf
4463 #define BIT_RXTTIMER_MATCH_NUM_8822B(x) \
4464 (((x) & BIT_MASK_RXTTIMER_MATCH_NUM_8822B) \
4465 << BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B)
4466 #define BIT_GET_RXTTIMER_MATCH_NUM_8822B(x) \
4467 (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B) & \
4468 BIT_MASK_RXTTIMER_MATCH_NUM_8822B)
4470 #define BIT_SHIFT_RXPKT_NUM_MATCH_8822B 16
4471 #define BIT_MASK_RXPKT_NUM_MATCH_8822B 0xf
4472 #define BIT_RXPKT_NUM_MATCH_8822B(x) \
4473 (((x) & BIT_MASK_RXPKT_NUM_MATCH_8822B) \
4474 << BIT_SHIFT_RXPKT_NUM_MATCH_8822B)
4475 #define BIT_GET_RXPKT_NUM_MATCH_8822B(x) \
4476 (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8822B) & \
4477 BIT_MASK_RXPKT_NUM_MATCH_8822B)
4479 #define BIT_SHIFT_MIGRATE_TIMER_8822B 0
4480 #define BIT_MASK_MIGRATE_TIMER_8822B 0xffff
4481 #define BIT_MIGRATE_TIMER_8822B(x) \
4482 (((x) & BIT_MASK_MIGRATE_TIMER_8822B) << BIT_SHIFT_MIGRATE_TIMER_8822B)
4483 #define BIT_GET_MIGRATE_TIMER_8822B(x) \
4484 (((x) >> BIT_SHIFT_MIGRATE_TIMER_8822B) & BIT_MASK_MIGRATE_TIMER_8822B)
4486 /* 2 REG_BCNQ_TXBD_DESA_8822B */
4488 #define BIT_SHIFT_BCNQ_TXBD_DESA_8822B 0
4489 #define BIT_MASK_BCNQ_TXBD_DESA_8822B 0xffffffffffffffffL
4490 #define BIT_BCNQ_TXBD_DESA_8822B(x) \
4491 (((x) & BIT_MASK_BCNQ_TXBD_DESA_8822B) \
4492 << BIT_SHIFT_BCNQ_TXBD_DESA_8822B)
4493 #define BIT_GET_BCNQ_TXBD_DESA_8822B(x) \
4494 (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8822B) & \
4495 BIT_MASK_BCNQ_TXBD_DESA_8822B)
4497 /* 2 REG_MGQ_TXBD_DESA_8822B */
4499 #define BIT_SHIFT_MGQ_TXBD_DESA_8822B 0
4500 #define BIT_MASK_MGQ_TXBD_DESA_8822B 0xffffffffffffffffL
4501 #define BIT_MGQ_TXBD_DESA_8822B(x) \
4502 (((x) & BIT_MASK_MGQ_TXBD_DESA_8822B) << BIT_SHIFT_MGQ_TXBD_DESA_8822B)
4503 #define BIT_GET_MGQ_TXBD_DESA_8822B(x) \
4504 (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8822B) & BIT_MASK_MGQ_TXBD_DESA_8822B)
4506 /* 2 REG_VOQ_TXBD_DESA_8822B */
4508 #define BIT_SHIFT_VOQ_TXBD_DESA_8822B 0
4509 #define BIT_MASK_VOQ_TXBD_DESA_8822B 0xffffffffffffffffL
4510 #define BIT_VOQ_TXBD_DESA_8822B(x) \
4511 (((x) & BIT_MASK_VOQ_TXBD_DESA_8822B) << BIT_SHIFT_VOQ_TXBD_DESA_8822B)
4512 #define BIT_GET_VOQ_TXBD_DESA_8822B(x) \
4513 (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8822B) & BIT_MASK_VOQ_TXBD_DESA_8822B)
4515 /* 2 REG_VIQ_TXBD_DESA_8822B */
4517 #define BIT_SHIFT_VIQ_TXBD_DESA_8822B 0
4518 #define BIT_MASK_VIQ_TXBD_DESA_8822B 0xffffffffffffffffL
4519 #define BIT_VIQ_TXBD_DESA_8822B(x) \
4520 (((x) & BIT_MASK_VIQ_TXBD_DESA_8822B) << BIT_SHIFT_VIQ_TXBD_DESA_8822B)
4521 #define BIT_GET_VIQ_TXBD_DESA_8822B(x) \
4522 (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8822B) & BIT_MASK_VIQ_TXBD_DESA_8822B)
4524 /* 2 REG_BEQ_TXBD_DESA_8822B */
4526 #define BIT_SHIFT_BEQ_TXBD_DESA_8822B 0
4527 #define BIT_MASK_BEQ_TXBD_DESA_8822B 0xffffffffffffffffL
4528 #define BIT_BEQ_TXBD_DESA_8822B(x) \
4529 (((x) & BIT_MASK_BEQ_TXBD_DESA_8822B) << BIT_SHIFT_BEQ_TXBD_DESA_8822B)
4530 #define BIT_GET_BEQ_TXBD_DESA_8822B(x) \
4531 (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8822B) & BIT_MASK_BEQ_TXBD_DESA_8822B)
4533 /* 2 REG_BKQ_TXBD_DESA_8822B */
4535 #define BIT_SHIFT_BKQ_TXBD_DESA_8822B 0
4536 #define BIT_MASK_BKQ_TXBD_DESA_8822B 0xffffffffffffffffL
4537 #define BIT_BKQ_TXBD_DESA_8822B(x) \
4538 (((x) & BIT_MASK_BKQ_TXBD_DESA_8822B) << BIT_SHIFT_BKQ_TXBD_DESA_8822B)
4539 #define BIT_GET_BKQ_TXBD_DESA_8822B(x) \
4540 (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8822B) & BIT_MASK_BKQ_TXBD_DESA_8822B)
4542 /* 2 REG_RXQ_RXBD_DESA_8822B */
4544 #define BIT_SHIFT_RXQ_RXBD_DESA_8822B 0
4545 #define BIT_MASK_RXQ_RXBD_DESA_8822B 0xffffffffffffffffL
4546 #define BIT_RXQ_RXBD_DESA_8822B(x) \
4547 (((x) & BIT_MASK_RXQ_RXBD_DESA_8822B) << BIT_SHIFT_RXQ_RXBD_DESA_8822B)
4548 #define BIT_GET_RXQ_RXBD_DESA_8822B(x) \
4549 (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8822B) & BIT_MASK_RXQ_RXBD_DESA_8822B)
4551 /* 2 REG_HI0Q_TXBD_DESA_8822B */
4553 #define BIT_SHIFT_HI0Q_TXBD_DESA_8822B 0
4554 #define BIT_MASK_HI0Q_TXBD_DESA_8822B 0xffffffffffffffffL
4555 #define BIT_HI0Q_TXBD_DESA_8822B(x) \
4556 (((x) & BIT_MASK_HI0Q_TXBD_DESA_8822B) \
4557 << BIT_SHIFT_HI0Q_TXBD_DESA_8822B)
4558 #define BIT_GET_HI0Q_TXBD_DESA_8822B(x) \
4559 (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8822B) & \
4560 BIT_MASK_HI0Q_TXBD_DESA_8822B)
4562 /* 2 REG_HI1Q_TXBD_DESA_8822B */
4564 #define BIT_SHIFT_HI1Q_TXBD_DESA_8822B 0
4565 #define BIT_MASK_HI1Q_TXBD_DESA_8822B 0xffffffffffffffffL
4566 #define BIT_HI1Q_TXBD_DESA_8822B(x) \
4567 (((x) & BIT_MASK_HI1Q_TXBD_DESA_8822B) \
4568 << BIT_SHIFT_HI1Q_TXBD_DESA_8822B)
4569 #define BIT_GET_HI1Q_TXBD_DESA_8822B(x) \
4570 (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8822B) & \
4571 BIT_MASK_HI1Q_TXBD_DESA_8822B)
4573 /* 2 REG_HI2Q_TXBD_DESA_8822B */
4575 #define BIT_SHIFT_HI2Q_TXBD_DESA_8822B 0
4576 #define BIT_MASK_HI2Q_TXBD_DESA_8822B 0xffffffffffffffffL
4577 #define BIT_HI2Q_TXBD_DESA_8822B(x) \
4578 (((x) & BIT_MASK_HI2Q_TXBD_DESA_8822B) \
4579 << BIT_SHIFT_HI2Q_TXBD_DESA_8822B)
4580 #define BIT_GET_HI2Q_TXBD_DESA_8822B(x) \
4581 (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8822B) & \
4582 BIT_MASK_HI2Q_TXBD_DESA_8822B)
4584 /* 2 REG_HI3Q_TXBD_DESA_8822B */
4586 #define BIT_SHIFT_HI3Q_TXBD_DESA_8822B 0
4587 #define BIT_MASK_HI3Q_TXBD_DESA_8822B 0xffffffffffffffffL
4588 #define BIT_HI3Q_TXBD_DESA_8822B(x) \
4589 (((x) & BIT_MASK_HI3Q_TXBD_DESA_8822B) \
4590 << BIT_SHIFT_HI3Q_TXBD_DESA_8822B)
4591 #define BIT_GET_HI3Q_TXBD_DESA_8822B(x) \
4592 (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8822B) & \
4593 BIT_MASK_HI3Q_TXBD_DESA_8822B)
4595 /* 2 REG_HI4Q_TXBD_DESA_8822B */
4597 #define BIT_SHIFT_HI4Q_TXBD_DESA_8822B 0
4598 #define BIT_MASK_HI4Q_TXBD_DESA_8822B 0xffffffffffffffffL
4599 #define BIT_HI4Q_TXBD_DESA_8822B(x) \
4600 (((x) & BIT_MASK_HI4Q_TXBD_DESA_8822B) \
4601 << BIT_SHIFT_HI4Q_TXBD_DESA_8822B)
4602 #define BIT_GET_HI4Q_TXBD_DESA_8822B(x) \
4603 (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8822B) & \
4604 BIT_MASK_HI4Q_TXBD_DESA_8822B)
4606 /* 2 REG_HI5Q_TXBD_DESA_8822B */
4608 #define BIT_SHIFT_HI5Q_TXBD_DESA_8822B 0
4609 #define BIT_MASK_HI5Q_TXBD_DESA_8822B 0xffffffffffffffffL
4610 #define BIT_HI5Q_TXBD_DESA_8822B(x) \
4611 (((x) & BIT_MASK_HI5Q_TXBD_DESA_8822B) \
4612 << BIT_SHIFT_HI5Q_TXBD_DESA_8822B)
4613 #define BIT_GET_HI5Q_TXBD_DESA_8822B(x) \
4614 (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8822B) & \
4615 BIT_MASK_HI5Q_TXBD_DESA_8822B)
4617 /* 2 REG_HI6Q_TXBD_DESA_8822B */
4619 #define BIT_SHIFT_HI6Q_TXBD_DESA_8822B 0
4620 #define BIT_MASK_HI6Q_TXBD_DESA_8822B 0xffffffffffffffffL
4621 #define BIT_HI6Q_TXBD_DESA_8822B(x) \
4622 (((x) & BIT_MASK_HI6Q_TXBD_DESA_8822B) \
4623 << BIT_SHIFT_HI6Q_TXBD_DESA_8822B)
4624 #define BIT_GET_HI6Q_TXBD_DESA_8822B(x) \
4625 (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8822B) & \
4626 BIT_MASK_HI6Q_TXBD_DESA_8822B)
4628 /* 2 REG_HI7Q_TXBD_DESA_8822B */
4630 #define BIT_SHIFT_HI7Q_TXBD_DESA_8822B 0
4631 #define BIT_MASK_HI7Q_TXBD_DESA_8822B 0xffffffffffffffffL
4632 #define BIT_HI7Q_TXBD_DESA_8822B(x) \
4633 (((x) & BIT_MASK_HI7Q_TXBD_DESA_8822B) \
4634 << BIT_SHIFT_HI7Q_TXBD_DESA_8822B)
4635 #define BIT_GET_HI7Q_TXBD_DESA_8822B(x) \
4636 (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8822B) & \
4637 BIT_MASK_HI7Q_TXBD_DESA_8822B)
4639 /* 2 REG_MGQ_TXBD_NUM_8822B */
4640 #define BIT_PCIE_MGQ_FLAG_8822B BIT(14)
4642 #define BIT_SHIFT_MGQ_DESC_MODE_8822B 12
4643 #define BIT_MASK_MGQ_DESC_MODE_8822B 0x3
4644 #define BIT_MGQ_DESC_MODE_8822B(x) \
4645 (((x) & BIT_MASK_MGQ_DESC_MODE_8822B) << BIT_SHIFT_MGQ_DESC_MODE_8822B)
4646 #define BIT_GET_MGQ_DESC_MODE_8822B(x) \
4647 (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8822B) & BIT_MASK_MGQ_DESC_MODE_8822B)
4649 #define BIT_SHIFT_MGQ_DESC_NUM_8822B 0
4650 #define BIT_MASK_MGQ_DESC_NUM_8822B 0xfff
4651 #define BIT_MGQ_DESC_NUM_8822B(x) \
4652 (((x) & BIT_MASK_MGQ_DESC_NUM_8822B) << BIT_SHIFT_MGQ_DESC_NUM_8822B)
4653 #define BIT_GET_MGQ_DESC_NUM_8822B(x) \
4654 (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8822B) & BIT_MASK_MGQ_DESC_NUM_8822B)
4656 /* 2 REG_RX_RXBD_NUM_8822B */
4657 #define BIT_SYS_32_64_8822B BIT(15)
4659 #define BIT_SHIFT_BCNQ_DESC_MODE_8822B 13
4660 #define BIT_MASK_BCNQ_DESC_MODE_8822B 0x3
4661 #define BIT_BCNQ_DESC_MODE_8822B(x) \
4662 (((x) & BIT_MASK_BCNQ_DESC_MODE_8822B) \
4663 << BIT_SHIFT_BCNQ_DESC_MODE_8822B)
4664 #define BIT_GET_BCNQ_DESC_MODE_8822B(x) \
4665 (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8822B) & \
4666 BIT_MASK_BCNQ_DESC_MODE_8822B)
4668 #define BIT_PCIE_BCNQ_FLAG_8822B BIT(12)
4670 #define BIT_SHIFT_RXQ_DESC_NUM_8822B 0
4671 #define BIT_MASK_RXQ_DESC_NUM_8822B 0xfff
4672 #define BIT_RXQ_DESC_NUM_8822B(x) \
4673 (((x) & BIT_MASK_RXQ_DESC_NUM_8822B) << BIT_SHIFT_RXQ_DESC_NUM_8822B)
4674 #define BIT_GET_RXQ_DESC_NUM_8822B(x) \
4675 (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8822B) & BIT_MASK_RXQ_DESC_NUM_8822B)
4677 /* 2 REG_VOQ_TXBD_NUM_8822B */
4678 #define BIT_PCIE_VOQ_FLAG_8822B BIT(14)
4680 #define BIT_SHIFT_VOQ_DESC_MODE_8822B 12
4681 #define BIT_MASK_VOQ_DESC_MODE_8822B 0x3
4682 #define BIT_VOQ_DESC_MODE_8822B(x) \
4683 (((x) & BIT_MASK_VOQ_DESC_MODE_8822B) << BIT_SHIFT_VOQ_DESC_MODE_8822B)
4684 #define BIT_GET_VOQ_DESC_MODE_8822B(x) \
4685 (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8822B) & BIT_MASK_VOQ_DESC_MODE_8822B)
4687 #define BIT_SHIFT_VOQ_DESC_NUM_8822B 0
4688 #define BIT_MASK_VOQ_DESC_NUM_8822B 0xfff
4689 #define BIT_VOQ_DESC_NUM_8822B(x) \
4690 (((x) & BIT_MASK_VOQ_DESC_NUM_8822B) << BIT_SHIFT_VOQ_DESC_NUM_8822B)
4691 #define BIT_GET_VOQ_DESC_NUM_8822B(x) \
4692 (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8822B) & BIT_MASK_VOQ_DESC_NUM_8822B)
4694 /* 2 REG_VIQ_TXBD_NUM_8822B */
4695 #define BIT_PCIE_VIQ_FLAG_8822B BIT(14)
4697 #define BIT_SHIFT_VIQ_DESC_MODE_8822B 12
4698 #define BIT_MASK_VIQ_DESC_MODE_8822B 0x3
4699 #define BIT_VIQ_DESC_MODE_8822B(x) \
4700 (((x) & BIT_MASK_VIQ_DESC_MODE_8822B) << BIT_SHIFT_VIQ_DESC_MODE_8822B)
4701 #define BIT_GET_VIQ_DESC_MODE_8822B(x) \
4702 (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8822B) & BIT_MASK_VIQ_DESC_MODE_8822B)
4704 #define BIT_SHIFT_VIQ_DESC_NUM_8822B 0
4705 #define BIT_MASK_VIQ_DESC_NUM_8822B 0xfff
4706 #define BIT_VIQ_DESC_NUM_8822B(x) \
4707 (((x) & BIT_MASK_VIQ_DESC_NUM_8822B) << BIT_SHIFT_VIQ_DESC_NUM_8822B)
4708 #define BIT_GET_VIQ_DESC_NUM_8822B(x) \
4709 (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8822B) & BIT_MASK_VIQ_DESC_NUM_8822B)
4711 /* 2 REG_BEQ_TXBD_NUM_8822B */
4712 #define BIT_PCIE_BEQ_FLAG_8822B BIT(14)
4714 #define BIT_SHIFT_BEQ_DESC_MODE_8822B 12
4715 #define BIT_MASK_BEQ_DESC_MODE_8822B 0x3
4716 #define BIT_BEQ_DESC_MODE_8822B(x) \
4717 (((x) & BIT_MASK_BEQ_DESC_MODE_8822B) << BIT_SHIFT_BEQ_DESC_MODE_8822B)
4718 #define BIT_GET_BEQ_DESC_MODE_8822B(x) \
4719 (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8822B) & BIT_MASK_BEQ_DESC_MODE_8822B)
4721 #define BIT_SHIFT_BEQ_DESC_NUM_8822B 0
4722 #define BIT_MASK_BEQ_DESC_NUM_8822B 0xfff
4723 #define BIT_BEQ_DESC_NUM_8822B(x) \
4724 (((x) & BIT_MASK_BEQ_DESC_NUM_8822B) << BIT_SHIFT_BEQ_DESC_NUM_8822B)
4725 #define BIT_GET_BEQ_DESC_NUM_8822B(x) \
4726 (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8822B) & BIT_MASK_BEQ_DESC_NUM_8822B)
4728 /* 2 REG_BKQ_TXBD_NUM_8822B */
4729 #define BIT_PCIE_BKQ_FLAG_8822B BIT(14)
4731 #define BIT_SHIFT_BKQ_DESC_MODE_8822B 12
4732 #define BIT_MASK_BKQ_DESC_MODE_8822B 0x3
4733 #define BIT_BKQ_DESC_MODE_8822B(x) \
4734 (((x) & BIT_MASK_BKQ_DESC_MODE_8822B) << BIT_SHIFT_BKQ_DESC_MODE_8822B)
4735 #define BIT_GET_BKQ_DESC_MODE_8822B(x) \
4736 (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8822B) & BIT_MASK_BKQ_DESC_MODE_8822B)
4738 #define BIT_SHIFT_BKQ_DESC_NUM_8822B 0
4739 #define BIT_MASK_BKQ_DESC_NUM_8822B 0xfff
4740 #define BIT_BKQ_DESC_NUM_8822B(x) \
4741 (((x) & BIT_MASK_BKQ_DESC_NUM_8822B) << BIT_SHIFT_BKQ_DESC_NUM_8822B)
4742 #define BIT_GET_BKQ_DESC_NUM_8822B(x) \
4743 (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8822B) & BIT_MASK_BKQ_DESC_NUM_8822B)
4745 /* 2 REG_HI0Q_TXBD_NUM_8822B */
4746 #define BIT_HI0Q_FLAG_8822B BIT(14)
4748 #define BIT_SHIFT_HI0Q_DESC_MODE_8822B 12
4749 #define BIT_MASK_HI0Q_DESC_MODE_8822B 0x3
4750 #define BIT_HI0Q_DESC_MODE_8822B(x) \
4751 (((x) & BIT_MASK_HI0Q_DESC_MODE_8822B) \
4752 << BIT_SHIFT_HI0Q_DESC_MODE_8822B)
4753 #define BIT_GET_HI0Q_DESC_MODE_8822B(x) \
4754 (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8822B) & \
4755 BIT_MASK_HI0Q_DESC_MODE_8822B)
4757 #define BIT_SHIFT_HI0Q_DESC_NUM_8822B 0
4758 #define BIT_MASK_HI0Q_DESC_NUM_8822B 0xfff
4759 #define BIT_HI0Q_DESC_NUM_8822B(x) \
4760 (((x) & BIT_MASK_HI0Q_DESC_NUM_8822B) << BIT_SHIFT_HI0Q_DESC_NUM_8822B)
4761 #define BIT_GET_HI0Q_DESC_NUM_8822B(x) \
4762 (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8822B) & BIT_MASK_HI0Q_DESC_NUM_8822B)
4764 /* 2 REG_HI1Q_TXBD_NUM_8822B */
4765 #define BIT_HI1Q_FLAG_8822B BIT(14)
4767 #define BIT_SHIFT_HI1Q_DESC_MODE_8822B 12
4768 #define BIT_MASK_HI1Q_DESC_MODE_8822B 0x3
4769 #define BIT_HI1Q_DESC_MODE_8822B(x) \
4770 (((x) & BIT_MASK_HI1Q_DESC_MODE_8822B) \
4771 << BIT_SHIFT_HI1Q_DESC_MODE_8822B)
4772 #define BIT_GET_HI1Q_DESC_MODE_8822B(x) \
4773 (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8822B) & \
4774 BIT_MASK_HI1Q_DESC_MODE_8822B)
4776 #define BIT_SHIFT_HI1Q_DESC_NUM_8822B 0
4777 #define BIT_MASK_HI1Q_DESC_NUM_8822B 0xfff
4778 #define BIT_HI1Q_DESC_NUM_8822B(x) \
4779 (((x) & BIT_MASK_HI1Q_DESC_NUM_8822B) << BIT_SHIFT_HI1Q_DESC_NUM_8822B)
4780 #define BIT_GET_HI1Q_DESC_NUM_8822B(x) \
4781 (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8822B) & BIT_MASK_HI1Q_DESC_NUM_8822B)
4783 /* 2 REG_HI2Q_TXBD_NUM_8822B */
4784 #define BIT_HI2Q_FLAG_8822B BIT(14)
4786 #define BIT_SHIFT_HI2Q_DESC_MODE_8822B 12
4787 #define BIT_MASK_HI2Q_DESC_MODE_8822B 0x3
4788 #define BIT_HI2Q_DESC_MODE_8822B(x) \
4789 (((x) & BIT_MASK_HI2Q_DESC_MODE_8822B) \
4790 << BIT_SHIFT_HI2Q_DESC_MODE_8822B)
4791 #define BIT_GET_HI2Q_DESC_MODE_8822B(x) \
4792 (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8822B) & \
4793 BIT_MASK_HI2Q_DESC_MODE_8822B)
4795 #define BIT_SHIFT_HI2Q_DESC_NUM_8822B 0
4796 #define BIT_MASK_HI2Q_DESC_NUM_8822B 0xfff
4797 #define BIT_HI2Q_DESC_NUM_8822B(x) \
4798 (((x) & BIT_MASK_HI2Q_DESC_NUM_8822B) << BIT_SHIFT_HI2Q_DESC_NUM_8822B)
4799 #define BIT_GET_HI2Q_DESC_NUM_8822B(x) \
4800 (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8822B) & BIT_MASK_HI2Q_DESC_NUM_8822B)
4802 /* 2 REG_HI3Q_TXBD_NUM_8822B */
4803 #define BIT_HI3Q_FLAG_8822B BIT(14)
4805 #define BIT_SHIFT_HI3Q_DESC_MODE_8822B 12
4806 #define BIT_MASK_HI3Q_DESC_MODE_8822B 0x3
4807 #define BIT_HI3Q_DESC_MODE_8822B(x) \
4808 (((x) & BIT_MASK_HI3Q_DESC_MODE_8822B) \
4809 << BIT_SHIFT_HI3Q_DESC_MODE_8822B)
4810 #define BIT_GET_HI3Q_DESC_MODE_8822B(x) \
4811 (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8822B) & \
4812 BIT_MASK_HI3Q_DESC_MODE_8822B)
4814 #define BIT_SHIFT_HI3Q_DESC_NUM_8822B 0
4815 #define BIT_MASK_HI3Q_DESC_NUM_8822B 0xfff
4816 #define BIT_HI3Q_DESC_NUM_8822B(x) \
4817 (((x) & BIT_MASK_HI3Q_DESC_NUM_8822B) << BIT_SHIFT_HI3Q_DESC_NUM_8822B)
4818 #define BIT_GET_HI3Q_DESC_NUM_8822B(x) \
4819 (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8822B) & BIT_MASK_HI3Q_DESC_NUM_8822B)
4821 /* 2 REG_HI4Q_TXBD_NUM_8822B */
4822 #define BIT_HI4Q_FLAG_8822B BIT(14)
4824 #define BIT_SHIFT_HI4Q_DESC_MODE_8822B 12
4825 #define BIT_MASK_HI4Q_DESC_MODE_8822B 0x3
4826 #define BIT_HI4Q_DESC_MODE_8822B(x) \
4827 (((x) & BIT_MASK_HI4Q_DESC_MODE_8822B) \
4828 << BIT_SHIFT_HI4Q_DESC_MODE_8822B)
4829 #define BIT_GET_HI4Q_DESC_MODE_8822B(x) \
4830 (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8822B) & \
4831 BIT_MASK_HI4Q_DESC_MODE_8822B)
4833 #define BIT_SHIFT_HI4Q_DESC_NUM_8822B 0
4834 #define BIT_MASK_HI4Q_DESC_NUM_8822B 0xfff
4835 #define BIT_HI4Q_DESC_NUM_8822B(x) \
4836 (((x) & BIT_MASK_HI4Q_DESC_NUM_8822B) << BIT_SHIFT_HI4Q_DESC_NUM_8822B)
4837 #define BIT_GET_HI4Q_DESC_NUM_8822B(x) \
4838 (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8822B) & BIT_MASK_HI4Q_DESC_NUM_8822B)
4840 /* 2 REG_HI5Q_TXBD_NUM_8822B */
4841 #define BIT_HI5Q_FLAG_8822B BIT(14)
4843 #define BIT_SHIFT_HI5Q_DESC_MODE_8822B 12
4844 #define BIT_MASK_HI5Q_DESC_MODE_8822B 0x3
4845 #define BIT_HI5Q_DESC_MODE_8822B(x) \
4846 (((x) & BIT_MASK_HI5Q_DESC_MODE_8822B) \
4847 << BIT_SHIFT_HI5Q_DESC_MODE_8822B)
4848 #define BIT_GET_HI5Q_DESC_MODE_8822B(x) \
4849 (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8822B) & \
4850 BIT_MASK_HI5Q_DESC_MODE_8822B)
4852 #define BIT_SHIFT_HI5Q_DESC_NUM_8822B 0
4853 #define BIT_MASK_HI5Q_DESC_NUM_8822B 0xfff
4854 #define BIT_HI5Q_DESC_NUM_8822B(x) \
4855 (((x) & BIT_MASK_HI5Q_DESC_NUM_8822B) << BIT_SHIFT_HI5Q_DESC_NUM_8822B)
4856 #define BIT_GET_HI5Q_DESC_NUM_8822B(x) \
4857 (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8822B) & BIT_MASK_HI5Q_DESC_NUM_8822B)
4859 /* 2 REG_HI6Q_TXBD_NUM_8822B */
4860 #define BIT_HI6Q_FLAG_8822B BIT(14)
4862 #define BIT_SHIFT_HI6Q_DESC_MODE_8822B 12
4863 #define BIT_MASK_HI6Q_DESC_MODE_8822B 0x3
4864 #define BIT_HI6Q_DESC_MODE_8822B(x) \
4865 (((x) & BIT_MASK_HI6Q_DESC_MODE_8822B) \
4866 << BIT_SHIFT_HI6Q_DESC_MODE_8822B)
4867 #define BIT_GET_HI6Q_DESC_MODE_8822B(x) \
4868 (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8822B) & \
4869 BIT_MASK_HI6Q_DESC_MODE_8822B)
4871 #define BIT_SHIFT_HI6Q_DESC_NUM_8822B 0
4872 #define BIT_MASK_HI6Q_DESC_NUM_8822B 0xfff
4873 #define BIT_HI6Q_DESC_NUM_8822B(x) \
4874 (((x) & BIT_MASK_HI6Q_DESC_NUM_8822B) << BIT_SHIFT_HI6Q_DESC_NUM_8822B)
4875 #define BIT_GET_HI6Q_DESC_NUM_8822B(x) \
4876 (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8822B) & BIT_MASK_HI6Q_DESC_NUM_8822B)
4878 /* 2 REG_HI7Q_TXBD_NUM_8822B */
4879 #define BIT_HI7Q_FLAG_8822B BIT(14)
4881 #define BIT_SHIFT_HI7Q_DESC_MODE_8822B 12
4882 #define BIT_MASK_HI7Q_DESC_MODE_8822B 0x3
4883 #define BIT_HI7Q_DESC_MODE_8822B(x) \
4884 (((x) & BIT_MASK_HI7Q_DESC_MODE_8822B) \
4885 << BIT_SHIFT_HI7Q_DESC_MODE_8822B)
4886 #define BIT_GET_HI7Q_DESC_MODE_8822B(x) \
4887 (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8822B) & \
4888 BIT_MASK_HI7Q_DESC_MODE_8822B)
4890 #define BIT_SHIFT_HI7Q_DESC_NUM_8822B 0
4891 #define BIT_MASK_HI7Q_DESC_NUM_8822B 0xfff
4892 #define BIT_HI7Q_DESC_NUM_8822B(x) \
4893 (((x) & BIT_MASK_HI7Q_DESC_NUM_8822B) << BIT_SHIFT_HI7Q_DESC_NUM_8822B)
4894 #define BIT_GET_HI7Q_DESC_NUM_8822B(x) \
4895 (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8822B) & BIT_MASK_HI7Q_DESC_NUM_8822B)
4897 /* 2 REG_TSFTIMER_HCI_8822B */
4899 #define BIT_SHIFT_TSFT2_HCI_8822B 16
4900 #define BIT_MASK_TSFT2_HCI_8822B 0xffff
4901 #define BIT_TSFT2_HCI_8822B(x) \
4902 (((x) & BIT_MASK_TSFT2_HCI_8822B) << BIT_SHIFT_TSFT2_HCI_8822B)
4903 #define BIT_GET_TSFT2_HCI_8822B(x) \
4904 (((x) >> BIT_SHIFT_TSFT2_HCI_8822B) & BIT_MASK_TSFT2_HCI_8822B)
4906 #define BIT_SHIFT_TSFT1_HCI_8822B 0
4907 #define BIT_MASK_TSFT1_HCI_8822B 0xffff
4908 #define BIT_TSFT1_HCI_8822B(x) \
4909 (((x) & BIT_MASK_TSFT1_HCI_8822B) << BIT_SHIFT_TSFT1_HCI_8822B)
4910 #define BIT_GET_TSFT1_HCI_8822B(x) \
4911 (((x) >> BIT_SHIFT_TSFT1_HCI_8822B) & BIT_MASK_TSFT1_HCI_8822B)
4913 /* 2 REG_BD_RWPTR_CLR_8822B */
4914 #define BIT_CLR_HI7Q_HW_IDX_8822B BIT(29)
4915 #define BIT_CLR_HI6Q_HW_IDX_8822B BIT(28)
4916 #define BIT_CLR_HI5Q_HW_IDX_8822B BIT(27)
4917 #define BIT_CLR_HI4Q_HW_IDX_8822B BIT(26)
4918 #define BIT_CLR_HI3Q_HW_IDX_8822B BIT(25)
4919 #define BIT_CLR_HI2Q_HW_IDX_8822B BIT(24)
4920 #define BIT_CLR_HI1Q_HW_IDX_8822B BIT(23)
4921 #define BIT_CLR_HI0Q_HW_IDX_8822B BIT(22)
4922 #define BIT_CLR_BKQ_HW_IDX_8822B BIT(21)
4923 #define BIT_CLR_BEQ_HW_IDX_8822B BIT(20)
4924 #define BIT_CLR_VIQ_HW_IDX_8822B BIT(19)
4925 #define BIT_CLR_VOQ_HW_IDX_8822B BIT(18)
4926 #define BIT_CLR_MGQ_HW_IDX_8822B BIT(17)
4927 #define BIT_CLR_RXQ_HW_IDX_8822B BIT(16)
4928 #define BIT_CLR_HI7Q_HOST_IDX_8822B BIT(13)
4929 #define BIT_CLR_HI6Q_HOST_IDX_8822B BIT(12)
4930 #define BIT_CLR_HI5Q_HOST_IDX_8822B BIT(11)
4931 #define BIT_CLR_HI4Q_HOST_IDX_8822B BIT(10)
4932 #define BIT_CLR_HI3Q_HOST_IDX_8822B BIT(9)
4933 #define BIT_CLR_HI2Q_HOST_IDX_8822B BIT(8)
4934 #define BIT_CLR_HI1Q_HOST_IDX_8822B BIT(7)
4935 #define BIT_CLR_HI0Q_HOST_IDX_8822B BIT(6)
4936 #define BIT_CLR_BKQ_HOST_IDX_8822B BIT(5)
4937 #define BIT_CLR_BEQ_HOST_IDX_8822B BIT(4)
4938 #define BIT_CLR_VIQ_HOST_IDX_8822B BIT(3)
4939 #define BIT_CLR_VOQ_HOST_IDX_8822B BIT(2)
4940 #define BIT_CLR_MGQ_HOST_IDX_8822B BIT(1)
4941 #define BIT_CLR_RXQ_HOST_IDX_8822B BIT(0)
4943 /* 2 REG_VOQ_TXBD_IDX_8822B */
4945 #define BIT_SHIFT_VOQ_HW_IDX_8822B 16
4946 #define BIT_MASK_VOQ_HW_IDX_8822B 0xfff
4947 #define BIT_VOQ_HW_IDX_8822B(x) \
4948 (((x) & BIT_MASK_VOQ_HW_IDX_8822B) << BIT_SHIFT_VOQ_HW_IDX_8822B)
4949 #define BIT_GET_VOQ_HW_IDX_8822B(x) \
4950 (((x) >> BIT_SHIFT_VOQ_HW_IDX_8822B) & BIT_MASK_VOQ_HW_IDX_8822B)
4952 #define BIT_SHIFT_VOQ_HOST_IDX_8822B 0
4953 #define BIT_MASK_VOQ_HOST_IDX_8822B 0xfff
4954 #define BIT_VOQ_HOST_IDX_8822B(x) \
4955 (((x) & BIT_MASK_VOQ_HOST_IDX_8822B) << BIT_SHIFT_VOQ_HOST_IDX_8822B)
4956 #define BIT_GET_VOQ_HOST_IDX_8822B(x) \
4957 (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8822B) & BIT_MASK_VOQ_HOST_IDX_8822B)
4959 /* 2 REG_VIQ_TXBD_IDX_8822B */
4961 #define BIT_SHIFT_VIQ_HW_IDX_8822B 16
4962 #define BIT_MASK_VIQ_HW_IDX_8822B 0xfff
4963 #define BIT_VIQ_HW_IDX_8822B(x) \
4964 (((x) & BIT_MASK_VIQ_HW_IDX_8822B) << BIT_SHIFT_VIQ_HW_IDX_8822B)
4965 #define BIT_GET_VIQ_HW_IDX_8822B(x) \
4966 (((x) >> BIT_SHIFT_VIQ_HW_IDX_8822B) & BIT_MASK_VIQ_HW_IDX_8822B)
4968 #define BIT_SHIFT_VIQ_HOST_IDX_8822B 0
4969 #define BIT_MASK_VIQ_HOST_IDX_8822B 0xfff
4970 #define BIT_VIQ_HOST_IDX_8822B(x) \
4971 (((x) & BIT_MASK_VIQ_HOST_IDX_8822B) << BIT_SHIFT_VIQ_HOST_IDX_8822B)
4972 #define BIT_GET_VIQ_HOST_IDX_8822B(x) \
4973 (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8822B) & BIT_MASK_VIQ_HOST_IDX_8822B)
4975 /* 2 REG_BEQ_TXBD_IDX_8822B */
4977 #define BIT_SHIFT_BEQ_HW_IDX_8822B 16
4978 #define BIT_MASK_BEQ_HW_IDX_8822B 0xfff
4979 #define BIT_BEQ_HW_IDX_8822B(x) \
4980 (((x) & BIT_MASK_BEQ_HW_IDX_8822B) << BIT_SHIFT_BEQ_HW_IDX_8822B)
4981 #define BIT_GET_BEQ_HW_IDX_8822B(x) \
4982 (((x) >> BIT_SHIFT_BEQ_HW_IDX_8822B) & BIT_MASK_BEQ_HW_IDX_8822B)
4984 #define BIT_SHIFT_BEQ_HOST_IDX_8822B 0
4985 #define BIT_MASK_BEQ_HOST_IDX_8822B 0xfff
4986 #define BIT_BEQ_HOST_IDX_8822B(x) \
4987 (((x) & BIT_MASK_BEQ_HOST_IDX_8822B) << BIT_SHIFT_BEQ_HOST_IDX_8822B)
4988 #define BIT_GET_BEQ_HOST_IDX_8822B(x) \
4989 (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8822B) & BIT_MASK_BEQ_HOST_IDX_8822B)
4991 /* 2 REG_BKQ_TXBD_IDX_8822B */
4993 #define BIT_SHIFT_BKQ_HW_IDX_8822B 16
4994 #define BIT_MASK_BKQ_HW_IDX_8822B 0xfff
4995 #define BIT_BKQ_HW_IDX_8822B(x) \
4996 (((x) & BIT_MASK_BKQ_HW_IDX_8822B) << BIT_SHIFT_BKQ_HW_IDX_8822B)
4997 #define BIT_GET_BKQ_HW_IDX_8822B(x) \
4998 (((x) >> BIT_SHIFT_BKQ_HW_IDX_8822B) & BIT_MASK_BKQ_HW_IDX_8822B)
5000 #define BIT_SHIFT_BKQ_HOST_IDX_8822B 0
5001 #define BIT_MASK_BKQ_HOST_IDX_8822B 0xfff
5002 #define BIT_BKQ_HOST_IDX_8822B(x) \
5003 (((x) & BIT_MASK_BKQ_HOST_IDX_8822B) << BIT_SHIFT_BKQ_HOST_IDX_8822B)
5004 #define BIT_GET_BKQ_HOST_IDX_8822B(x) \
5005 (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8822B) & BIT_MASK_BKQ_HOST_IDX_8822B)
5007 /* 2 REG_MGQ_TXBD_IDX_8822B */
5009 #define BIT_SHIFT_MGQ_HW_IDX_8822B 16
5010 #define BIT_MASK_MGQ_HW_IDX_8822B 0xfff
5011 #define BIT_MGQ_HW_IDX_8822B(x) \
5012 (((x) & BIT_MASK_MGQ_HW_IDX_8822B) << BIT_SHIFT_MGQ_HW_IDX_8822B)
5013 #define BIT_GET_MGQ_HW_IDX_8822B(x) \
5014 (((x) >> BIT_SHIFT_MGQ_HW_IDX_8822B) & BIT_MASK_MGQ_HW_IDX_8822B)
5016 #define BIT_SHIFT_MGQ_HOST_IDX_8822B 0
5017 #define BIT_MASK_MGQ_HOST_IDX_8822B 0xfff
5018 #define BIT_MGQ_HOST_IDX_8822B(x) \
5019 (((x) & BIT_MASK_MGQ_HOST_IDX_8822B) << BIT_SHIFT_MGQ_HOST_IDX_8822B)
5020 #define BIT_GET_MGQ_HOST_IDX_8822B(x) \
5021 (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8822B) & BIT_MASK_MGQ_HOST_IDX_8822B)
5023 /* 2 REG_RXQ_RXBD_IDX_8822B */
5025 #define BIT_SHIFT_RXQ_HW_IDX_8822B 16
5026 #define BIT_MASK_RXQ_HW_IDX_8822B 0xfff
5027 #define BIT_RXQ_HW_IDX_8822B(x) \
5028 (((x) & BIT_MASK_RXQ_HW_IDX_8822B) << BIT_SHIFT_RXQ_HW_IDX_8822B)
5029 #define BIT_GET_RXQ_HW_IDX_8822B(x) \
5030 (((x) >> BIT_SHIFT_RXQ_HW_IDX_8822B) & BIT_MASK_RXQ_HW_IDX_8822B)
5032 #define BIT_SHIFT_RXQ_HOST_IDX_8822B 0
5033 #define BIT_MASK_RXQ_HOST_IDX_8822B 0xfff
5034 #define BIT_RXQ_HOST_IDX_8822B(x) \
5035 (((x) & BIT_MASK_RXQ_HOST_IDX_8822B) << BIT_SHIFT_RXQ_HOST_IDX_8822B)
5036 #define BIT_GET_RXQ_HOST_IDX_8822B(x) \
5037 (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8822B) & BIT_MASK_RXQ_HOST_IDX_8822B)
5039 /* 2 REG_HI0Q_TXBD_IDX_8822B */
5041 #define BIT_SHIFT_HI0Q_HW_IDX_8822B 16
5042 #define BIT_MASK_HI0Q_HW_IDX_8822B 0xfff
5043 #define BIT_HI0Q_HW_IDX_8822B(x) \
5044 (((x) & BIT_MASK_HI0Q_HW_IDX_8822B) << BIT_SHIFT_HI0Q_HW_IDX_8822B)
5045 #define BIT_GET_HI0Q_HW_IDX_8822B(x) \
5046 (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8822B) & BIT_MASK_HI0Q_HW_IDX_8822B)
5048 #define BIT_SHIFT_HI0Q_HOST_IDX_8822B 0
5049 #define BIT_MASK_HI0Q_HOST_IDX_8822B 0xfff
5050 #define BIT_HI0Q_HOST_IDX_8822B(x) \
5051 (((x) & BIT_MASK_HI0Q_HOST_IDX_8822B) << BIT_SHIFT_HI0Q_HOST_IDX_8822B)
5052 #define BIT_GET_HI0Q_HOST_IDX_8822B(x) \
5053 (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8822B) & BIT_MASK_HI0Q_HOST_IDX_8822B)
5055 /* 2 REG_HI1Q_TXBD_IDX_8822B */
5057 #define BIT_SHIFT_HI1Q_HW_IDX_8822B 16
5058 #define BIT_MASK_HI1Q_HW_IDX_8822B 0xfff
5059 #define BIT_HI1Q_HW_IDX_8822B(x) \
5060 (((x) & BIT_MASK_HI1Q_HW_IDX_8822B) << BIT_SHIFT_HI1Q_HW_IDX_8822B)
5061 #define BIT_GET_HI1Q_HW_IDX_8822B(x) \
5062 (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8822B) & BIT_MASK_HI1Q_HW_IDX_8822B)
5064 #define BIT_SHIFT_HI1Q_HOST_IDX_8822B 0
5065 #define BIT_MASK_HI1Q_HOST_IDX_8822B 0xfff
5066 #define BIT_HI1Q_HOST_IDX_8822B(x) \
5067 (((x) & BIT_MASK_HI1Q_HOST_IDX_8822B) << BIT_SHIFT_HI1Q_HOST_IDX_8822B)
5068 #define BIT_GET_HI1Q_HOST_IDX_8822B(x) \
5069 (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8822B) & BIT_MASK_HI1Q_HOST_IDX_8822B)
5071 /* 2 REG_HI2Q_TXBD_IDX_8822B */
5073 #define BIT_SHIFT_HI2Q_HW_IDX_8822B 16
5074 #define BIT_MASK_HI2Q_HW_IDX_8822B 0xfff
5075 #define BIT_HI2Q_HW_IDX_8822B(x) \
5076 (((x) & BIT_MASK_HI2Q_HW_IDX_8822B) << BIT_SHIFT_HI2Q_HW_IDX_8822B)
5077 #define BIT_GET_HI2Q_HW_IDX_8822B(x) \
5078 (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8822B) & BIT_MASK_HI2Q_HW_IDX_8822B)
5080 #define BIT_SHIFT_HI2Q_HOST_IDX_8822B 0
5081 #define BIT_MASK_HI2Q_HOST_IDX_8822B 0xfff
5082 #define BIT_HI2Q_HOST_IDX_8822B(x) \
5083 (((x) & BIT_MASK_HI2Q_HOST_IDX_8822B) << BIT_SHIFT_HI2Q_HOST_IDX_8822B)
5084 #define BIT_GET_HI2Q_HOST_IDX_8822B(x) \
5085 (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8822B) & BIT_MASK_HI2Q_HOST_IDX_8822B)
5087 /* 2 REG_HI3Q_TXBD_IDX_8822B */
5089 #define BIT_SHIFT_HI3Q_HW_IDX_8822B 16
5090 #define BIT_MASK_HI3Q_HW_IDX_8822B 0xfff
5091 #define BIT_HI3Q_HW_IDX_8822B(x) \
5092 (((x) & BIT_MASK_HI3Q_HW_IDX_8822B) << BIT_SHIFT_HI3Q_HW_IDX_8822B)
5093 #define BIT_GET_HI3Q_HW_IDX_8822B(x) \
5094 (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8822B) & BIT_MASK_HI3Q_HW_IDX_8822B)
5096 #define BIT_SHIFT_HI3Q_HOST_IDX_8822B 0
5097 #define BIT_MASK_HI3Q_HOST_IDX_8822B 0xfff
5098 #define BIT_HI3Q_HOST_IDX_8822B(x) \
5099 (((x) & BIT_MASK_HI3Q_HOST_IDX_8822B) << BIT_SHIFT_HI3Q_HOST_IDX_8822B)
5100 #define BIT_GET_HI3Q_HOST_IDX_8822B(x) \
5101 (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8822B) & BIT_MASK_HI3Q_HOST_IDX_8822B)
5103 /* 2 REG_HI4Q_TXBD_IDX_8822B */
5105 #define BIT_SHIFT_HI4Q_HW_IDX_8822B 16
5106 #define BIT_MASK_HI4Q_HW_IDX_8822B 0xfff
5107 #define BIT_HI4Q_HW_IDX_8822B(x) \
5108 (((x) & BIT_MASK_HI4Q_HW_IDX_8822B) << BIT_SHIFT_HI4Q_HW_IDX_8822B)
5109 #define BIT_GET_HI4Q_HW_IDX_8822B(x) \
5110 (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8822B) & BIT_MASK_HI4Q_HW_IDX_8822B)
5112 #define BIT_SHIFT_HI4Q_HOST_IDX_8822B 0
5113 #define BIT_MASK_HI4Q_HOST_IDX_8822B 0xfff
5114 #define BIT_HI4Q_HOST_IDX_8822B(x) \
5115 (((x) & BIT_MASK_HI4Q_HOST_IDX_8822B) << BIT_SHIFT_HI4Q_HOST_IDX_8822B)
5116 #define BIT_GET_HI4Q_HOST_IDX_8822B(x) \
5117 (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8822B) & BIT_MASK_HI4Q_HOST_IDX_8822B)
5119 /* 2 REG_HI5Q_TXBD_IDX_8822B */
5121 #define BIT_SHIFT_HI5Q_HW_IDX_8822B 16
5122 #define BIT_MASK_HI5Q_HW_IDX_8822B 0xfff
5123 #define BIT_HI5Q_HW_IDX_8822B(x) \
5124 (((x) & BIT_MASK_HI5Q_HW_IDX_8822B) << BIT_SHIFT_HI5Q_HW_IDX_8822B)
5125 #define BIT_GET_HI5Q_HW_IDX_8822B(x) \
5126 (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8822B) & BIT_MASK_HI5Q_HW_IDX_8822B)
5128 #define BIT_SHIFT_HI5Q_HOST_IDX_8822B 0
5129 #define BIT_MASK_HI5Q_HOST_IDX_8822B 0xfff
5130 #define BIT_HI5Q_HOST_IDX_8822B(x) \
5131 (((x) & BIT_MASK_HI5Q_HOST_IDX_8822B) << BIT_SHIFT_HI5Q_HOST_IDX_8822B)
5132 #define BIT_GET_HI5Q_HOST_IDX_8822B(x) \
5133 (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8822B) & BIT_MASK_HI5Q_HOST_IDX_8822B)
5135 /* 2 REG_HI6Q_TXBD_IDX_8822B */
5137 #define BIT_SHIFT_HI6Q_HW_IDX_8822B 16
5138 #define BIT_MASK_HI6Q_HW_IDX_8822B 0xfff
5139 #define BIT_HI6Q_HW_IDX_8822B(x) \
5140 (((x) & BIT_MASK_HI6Q_HW_IDX_8822B) << BIT_SHIFT_HI6Q_HW_IDX_8822B)
5141 #define BIT_GET_HI6Q_HW_IDX_8822B(x) \
5142 (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8822B) & BIT_MASK_HI6Q_HW_IDX_8822B)
5144 #define BIT_SHIFT_HI6Q_HOST_IDX_8822B 0
5145 #define BIT_MASK_HI6Q_HOST_IDX_8822B 0xfff
5146 #define BIT_HI6Q_HOST_IDX_8822B(x) \
5147 (((x) & BIT_MASK_HI6Q_HOST_IDX_8822B) << BIT_SHIFT_HI6Q_HOST_IDX_8822B)
5148 #define BIT_GET_HI6Q_HOST_IDX_8822B(x) \
5149 (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8822B) & BIT_MASK_HI6Q_HOST_IDX_8822B)
5151 /* 2 REG_HI7Q_TXBD_IDX_8822B */
5153 #define BIT_SHIFT_HI7Q_HW_IDX_8822B 16
5154 #define BIT_MASK_HI7Q_HW_IDX_8822B 0xfff
5155 #define BIT_HI7Q_HW_IDX_8822B(x) \
5156 (((x) & BIT_MASK_HI7Q_HW_IDX_8822B) << BIT_SHIFT_HI7Q_HW_IDX_8822B)
5157 #define BIT_GET_HI7Q_HW_IDX_8822B(x) \
5158 (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8822B) & BIT_MASK_HI7Q_HW_IDX_8822B)
5160 #define BIT_SHIFT_HI7Q_HOST_IDX_8822B 0
5161 #define BIT_MASK_HI7Q_HOST_IDX_8822B 0xfff
5162 #define BIT_HI7Q_HOST_IDX_8822B(x) \
5163 (((x) & BIT_MASK_HI7Q_HOST_IDX_8822B) << BIT_SHIFT_HI7Q_HOST_IDX_8822B)
5164 #define BIT_GET_HI7Q_HOST_IDX_8822B(x) \
5165 (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8822B) & BIT_MASK_HI7Q_HOST_IDX_8822B)
5167 /* 2 REG_DBG_SEL_V1_8822B */
5169 #define BIT_SHIFT_DBG_SEL_8822B 0
5170 #define BIT_MASK_DBG_SEL_8822B 0xff
5171 #define BIT_DBG_SEL_8822B(x) \
5172 (((x) & BIT_MASK_DBG_SEL_8822B) << BIT_SHIFT_DBG_SEL_8822B)
5173 #define BIT_GET_DBG_SEL_8822B(x) \
5174 (((x) >> BIT_SHIFT_DBG_SEL_8822B) & BIT_MASK_DBG_SEL_8822B)
5176 /* 2 REG_PCIE_HRPWM1_V1_8822B */
5178 #define BIT_SHIFT_PCIE_HRPWM_8822B 0
5179 #define BIT_MASK_PCIE_HRPWM_8822B 0xff
5180 #define BIT_PCIE_HRPWM_8822B(x) \
5181 (((x) & BIT_MASK_PCIE_HRPWM_8822B) << BIT_SHIFT_PCIE_HRPWM_8822B)
5182 #define BIT_GET_PCIE_HRPWM_8822B(x) \
5183 (((x) >> BIT_SHIFT_PCIE_HRPWM_8822B) & BIT_MASK_PCIE_HRPWM_8822B)
5185 /* 2 REG_PCIE_HCPWM1_V1_8822B */
5187 #define BIT_SHIFT_PCIE_HCPWM_8822B 0
5188 #define BIT_MASK_PCIE_HCPWM_8822B 0xff
5189 #define BIT_PCIE_HCPWM_8822B(x) \
5190 (((x) & BIT_MASK_PCIE_HCPWM_8822B) << BIT_SHIFT_PCIE_HCPWM_8822B)
5191 #define BIT_GET_PCIE_HCPWM_8822B(x) \
5192 (((x) >> BIT_SHIFT_PCIE_HCPWM_8822B) & BIT_MASK_PCIE_HCPWM_8822B)
5194 /* 2 REG_PCIE_CTRL2_8822B */
5195 #define BIT_DIS_TXDMA_PRE_8822B BIT(7)
5196 #define BIT_DIS_RXDMA_PRE_8822B BIT(6)
5198 #define BIT_SHIFT_HPS_CLKR_PCIE_8822B 4
5199 #define BIT_MASK_HPS_CLKR_PCIE_8822B 0x3
5200 #define BIT_HPS_CLKR_PCIE_8822B(x) \
5201 (((x) & BIT_MASK_HPS_CLKR_PCIE_8822B) << BIT_SHIFT_HPS_CLKR_PCIE_8822B)
5202 #define BIT_GET_HPS_CLKR_PCIE_8822B(x) \
5203 (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8822B) & BIT_MASK_HPS_CLKR_PCIE_8822B)
5205 #define BIT_PCIE_INT_8822B BIT(3)
5206 #define BIT_TXFLAG_EXIT_L1_EN_8822B BIT(2)
5207 #define BIT_EN_RXDMA_ALIGN_8822B BIT(1)
5208 #define BIT_EN_TXDMA_ALIGN_8822B BIT(0)
5210 /* 2 REG_PCIE_HRPWM2_V1_8822B */
5212 #define BIT_SHIFT_PCIE_HRPWM2_8822B 0
5213 #define BIT_MASK_PCIE_HRPWM2_8822B 0xffff
5214 #define BIT_PCIE_HRPWM2_8822B(x) \
5215 (((x) & BIT_MASK_PCIE_HRPWM2_8822B) << BIT_SHIFT_PCIE_HRPWM2_8822B)
5216 #define BIT_GET_PCIE_HRPWM2_8822B(x) \
5217 (((x) >> BIT_SHIFT_PCIE_HRPWM2_8822B) & BIT_MASK_PCIE_HRPWM2_8822B)
5219 /* 2 REG_PCIE_HCPWM2_V1_8822B */
5221 #define BIT_SHIFT_PCIE_HCPWM2_8822B 0
5222 #define BIT_MASK_PCIE_HCPWM2_8822B 0xffff
5223 #define BIT_PCIE_HCPWM2_8822B(x) \
5224 (((x) & BIT_MASK_PCIE_HCPWM2_8822B) << BIT_SHIFT_PCIE_HCPWM2_8822B)
5225 #define BIT_GET_PCIE_HCPWM2_8822B(x) \
5226 (((x) >> BIT_SHIFT_PCIE_HCPWM2_8822B) & BIT_MASK_PCIE_HCPWM2_8822B)
5228 /* 2 REG_PCIE_H2C_MSG_V1_8822B */
5230 #define BIT_SHIFT_DRV2FW_INFO_8822B 0
5231 #define BIT_MASK_DRV2FW_INFO_8822B 0xffffffffL
5232 #define BIT_DRV2FW_INFO_8822B(x) \
5233 (((x) & BIT_MASK_DRV2FW_INFO_8822B) << BIT_SHIFT_DRV2FW_INFO_8822B)
5234 #define BIT_GET_DRV2FW_INFO_8822B(x) \
5235 (((x) >> BIT_SHIFT_DRV2FW_INFO_8822B) & BIT_MASK_DRV2FW_INFO_8822B)
5237 /* 2 REG_PCIE_C2H_MSG_V1_8822B */
5239 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B 0
5240 #define BIT_MASK_HCI_PCIE_C2H_MSG_8822B 0xffffffffL
5241 #define BIT_HCI_PCIE_C2H_MSG_8822B(x) \
5242 (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8822B) \
5243 << BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B)
5244 #define BIT_GET_HCI_PCIE_C2H_MSG_8822B(x) \
5245 (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B) & \
5246 BIT_MASK_HCI_PCIE_C2H_MSG_8822B)
5248 /* 2 REG_DBI_WDATA_V1_8822B */
5250 #define BIT_SHIFT_DBI_WDATA_8822B 0
5251 #define BIT_MASK_DBI_WDATA_8822B 0xffffffffL
5252 #define BIT_DBI_WDATA_8822B(x) \
5253 (((x) & BIT_MASK_DBI_WDATA_8822B) << BIT_SHIFT_DBI_WDATA_8822B)
5254 #define BIT_GET_DBI_WDATA_8822B(x) \
5255 (((x) >> BIT_SHIFT_DBI_WDATA_8822B) & BIT_MASK_DBI_WDATA_8822B)
5257 /* 2 REG_DBI_RDATA_V1_8822B */
5259 #define BIT_SHIFT_DBI_RDATA_8822B 0
5260 #define BIT_MASK_DBI_RDATA_8822B 0xffffffffL
5261 #define BIT_DBI_RDATA_8822B(x) \
5262 (((x) & BIT_MASK_DBI_RDATA_8822B) << BIT_SHIFT_DBI_RDATA_8822B)
5263 #define BIT_GET_DBI_RDATA_8822B(x) \
5264 (((x) >> BIT_SHIFT_DBI_RDATA_8822B) & BIT_MASK_DBI_RDATA_8822B)
5266 /* 2 REG_DBI_FLAG_V1_8822B */
5267 #define BIT_EN_STUCK_DBG_8822B BIT(26)
5268 #define BIT_RX_STUCK_8822B BIT(25)
5269 #define BIT_TX_STUCK_8822B BIT(24)
5270 #define BIT_DBI_RFLAG_8822B BIT(17)
5271 #define BIT_DBI_WFLAG_8822B BIT(16)
5273 #define BIT_SHIFT_DBI_WREN_8822B 12
5274 #define BIT_MASK_DBI_WREN_8822B 0xf
5275 #define BIT_DBI_WREN_8822B(x) \
5276 (((x) & BIT_MASK_DBI_WREN_8822B) << BIT_SHIFT_DBI_WREN_8822B)
5277 #define BIT_GET_DBI_WREN_8822B(x) \
5278 (((x) >> BIT_SHIFT_DBI_WREN_8822B) & BIT_MASK_DBI_WREN_8822B)
5280 #define BIT_SHIFT_DBI_ADDR_8822B 0
5281 #define BIT_MASK_DBI_ADDR_8822B 0xfff
5282 #define BIT_DBI_ADDR_8822B(x) \
5283 (((x) & BIT_MASK_DBI_ADDR_8822B) << BIT_SHIFT_DBI_ADDR_8822B)
5284 #define BIT_GET_DBI_ADDR_8822B(x) \
5285 (((x) >> BIT_SHIFT_DBI_ADDR_8822B) & BIT_MASK_DBI_ADDR_8822B)
5287 /* 2 REG_MDIO_V1_8822B */
5289 #define BIT_SHIFT_MDIO_RDATA_8822B 16
5290 #define BIT_MASK_MDIO_RDATA_8822B 0xffff
5291 #define BIT_MDIO_RDATA_8822B(x) \
5292 (((x) & BIT_MASK_MDIO_RDATA_8822B) << BIT_SHIFT_MDIO_RDATA_8822B)
5293 #define BIT_GET_MDIO_RDATA_8822B(x) \
5294 (((x) >> BIT_SHIFT_MDIO_RDATA_8822B) & BIT_MASK_MDIO_RDATA_8822B)
5296 #define BIT_SHIFT_MDIO_WDATA_8822B 0
5297 #define BIT_MASK_MDIO_WDATA_8822B 0xffff
5298 #define BIT_MDIO_WDATA_8822B(x) \
5299 (((x) & BIT_MASK_MDIO_WDATA_8822B) << BIT_SHIFT_MDIO_WDATA_8822B)
5300 #define BIT_GET_MDIO_WDATA_8822B(x) \
5301 (((x) >> BIT_SHIFT_MDIO_WDATA_8822B) & BIT_MASK_MDIO_WDATA_8822B)
5303 /* 2 REG_PCIE_MIX_CFG_8822B */
5305 #define BIT_SHIFT_MDIO_PHY_ADDR_8822B 24
5306 #define BIT_MASK_MDIO_PHY_ADDR_8822B 0x1f
5307 #define BIT_MDIO_PHY_ADDR_8822B(x) \
5308 (((x) & BIT_MASK_MDIO_PHY_ADDR_8822B) << BIT_SHIFT_MDIO_PHY_ADDR_8822B)
5309 #define BIT_GET_MDIO_PHY_ADDR_8822B(x) \
5310 (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8822B) & BIT_MASK_MDIO_PHY_ADDR_8822B)
5312 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B 10
5313 #define BIT_MASK_WATCH_DOG_RECORD_V1_8822B 0x3fff
5314 #define BIT_WATCH_DOG_RECORD_V1_8822B(x) \
5315 (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8822B) \
5316 << BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B)
5317 #define BIT_GET_WATCH_DOG_RECORD_V1_8822B(x) \
5318 (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B) & \
5319 BIT_MASK_WATCH_DOG_RECORD_V1_8822B)
5321 #define BIT_R_IO_TIMEOUT_FLAG_V1_8822B BIT(9)
5322 #define BIT_EN_WATCH_DOG_8822B BIT(8)
5323 #define BIT_ECRC_EN_V1_8822B BIT(7)
5324 #define BIT_MDIO_RFLAG_V1_8822B BIT(6)
5325 #define BIT_MDIO_WFLAG_V1_8822B BIT(5)
5327 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8822B 0
5328 #define BIT_MASK_MDIO_REG_ADDR_V1_8822B 0x1f
5329 #define BIT_MDIO_REG_ADDR_V1_8822B(x) \
5330 (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8822B) \
5331 << BIT_SHIFT_MDIO_REG_ADDR_V1_8822B)
5332 #define BIT_GET_MDIO_REG_ADDR_V1_8822B(x) \
5333 (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8822B) & \
5334 BIT_MASK_MDIO_REG_ADDR_V1_8822B)
5336 /* 2 REG_HCI_MIX_CFG_8822B */
5337 #define BIT_HOST_GEN2_SUPPORT_8822B BIT(20)
5339 #define BIT_SHIFT_TXDMA_ERR_FLAG_8822B 16
5340 #define BIT_MASK_TXDMA_ERR_FLAG_8822B 0xf
5341 #define BIT_TXDMA_ERR_FLAG_8822B(x) \
5342 (((x) & BIT_MASK_TXDMA_ERR_FLAG_8822B) \
5343 << BIT_SHIFT_TXDMA_ERR_FLAG_8822B)
5344 #define BIT_GET_TXDMA_ERR_FLAG_8822B(x) \
5345 (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8822B) & \
5346 BIT_MASK_TXDMA_ERR_FLAG_8822B)
5348 #define BIT_SHIFT_EARLY_MODE_SEL_8822B 12
5349 #define BIT_MASK_EARLY_MODE_SEL_8822B 0xf
5350 #define BIT_EARLY_MODE_SEL_8822B(x) \
5351 (((x) & BIT_MASK_EARLY_MODE_SEL_8822B) \
5352 << BIT_SHIFT_EARLY_MODE_SEL_8822B)
5353 #define BIT_GET_EARLY_MODE_SEL_8822B(x) \
5354 (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8822B) & \
5355 BIT_MASK_EARLY_MODE_SEL_8822B)
5357 #define BIT_EPHY_RX50_EN_8822B BIT(11)
5359 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B 8
5360 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8822B 0x7
5361 #define BIT_MSI_TIMEOUT_ID_V1_8822B(x) \
5362 (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8822B) \
5363 << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B)
5364 #define BIT_GET_MSI_TIMEOUT_ID_V1_8822B(x) \
5365 (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B) & \
5366 BIT_MASK_MSI_TIMEOUT_ID_V1_8822B)
5368 #define BIT_RADDR_RD_8822B BIT(7)
5369 #define BIT_EN_MUL_TAG_8822B BIT(6)
5370 #define BIT_EN_EARLY_MODE_8822B BIT(5)
5371 #define BIT_L0S_LINK_OFF_8822B BIT(4)
5372 #define BIT_ACT_LINK_OFF_8822B BIT(3)
5373 #define BIT_EN_SLOW_MAC_TX_8822B BIT(2)
5374 #define BIT_EN_SLOW_MAC_RX_8822B BIT(1)
5376 /* 2 REG_STC_INT_CS_8822B(PCIE STATE CHANGE INTERRUPT CONTROL AND STATUS) */
5377 #define BIT_STC_INT_EN_8822B BIT(31)
5379 #define BIT_SHIFT_STC_INT_FLAG_8822B 16
5380 #define BIT_MASK_STC_INT_FLAG_8822B 0xff
5381 #define BIT_STC_INT_FLAG_8822B(x) \
5382 (((x) & BIT_MASK_STC_INT_FLAG_8822B) << BIT_SHIFT_STC_INT_FLAG_8822B)
5383 #define BIT_GET_STC_INT_FLAG_8822B(x) \
5384 (((x) >> BIT_SHIFT_STC_INT_FLAG_8822B) & BIT_MASK_STC_INT_FLAG_8822B)
5386 #define BIT_SHIFT_STC_INT_IDX_8822B 8
5387 #define BIT_MASK_STC_INT_IDX_8822B 0x7
5388 #define BIT_STC_INT_IDX_8822B(x) \
5389 (((x) & BIT_MASK_STC_INT_IDX_8822B) << BIT_SHIFT_STC_INT_IDX_8822B)
5390 #define BIT_GET_STC_INT_IDX_8822B(x) \
5391 (((x) >> BIT_SHIFT_STC_INT_IDX_8822B) & BIT_MASK_STC_INT_IDX_8822B)
5393 #define BIT_SHIFT_STC_INT_REALTIME_CS_8822B 0
5394 #define BIT_MASK_STC_INT_REALTIME_CS_8822B 0x3f
5395 #define BIT_STC_INT_REALTIME_CS_8822B(x) \
5396 (((x) & BIT_MASK_STC_INT_REALTIME_CS_8822B) \
5397 << BIT_SHIFT_STC_INT_REALTIME_CS_8822B)
5398 #define BIT_GET_STC_INT_REALTIME_CS_8822B(x) \
5399 (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8822B) & \
5400 BIT_MASK_STC_INT_REALTIME_CS_8822B)
5402 /* 2 REG_ST_INT_CFG_8822B(PCIE STATE CHANGE INTERRUPT CONFIGURATION) */
5403 #define BIT_STC_INT_GRP_EN_8822B BIT(31)
5405 #define BIT_SHIFT_STC_INT_EXPECT_LS_8822B 8
5406 #define BIT_MASK_STC_INT_EXPECT_LS_8822B 0x3f
5407 #define BIT_STC_INT_EXPECT_LS_8822B(x) \
5408 (((x) & BIT_MASK_STC_INT_EXPECT_LS_8822B) \
5409 << BIT_SHIFT_STC_INT_EXPECT_LS_8822B)
5410 #define BIT_GET_STC_INT_EXPECT_LS_8822B(x) \
5411 (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8822B) & \
5412 BIT_MASK_STC_INT_EXPECT_LS_8822B)
5414 #define BIT_SHIFT_STC_INT_EXPECT_CS_8822B 0
5415 #define BIT_MASK_STC_INT_EXPECT_CS_8822B 0x3f
5416 #define BIT_STC_INT_EXPECT_CS_8822B(x) \
5417 (((x) & BIT_MASK_STC_INT_EXPECT_CS_8822B) \
5418 << BIT_SHIFT_STC_INT_EXPECT_CS_8822B)
5419 #define BIT_GET_STC_INT_EXPECT_CS_8822B(x) \
5420 (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8822B) & \
5421 BIT_MASK_STC_INT_EXPECT_CS_8822B)
5423 /* 2 REG_CMU_DLY_CTRL_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONTROL ) */
5424 #define BIT_CMU_DLY_EN_8822B BIT(31)
5425 #define BIT_CMU_DLY_MODE_8822B BIT(30)
5427 #define BIT_SHIFT_CMU_DLY_PRE_DIV_8822B 0
5428 #define BIT_MASK_CMU_DLY_PRE_DIV_8822B 0xff
5429 #define BIT_CMU_DLY_PRE_DIV_8822B(x) \
5430 (((x) & BIT_MASK_CMU_DLY_PRE_DIV_8822B) \
5431 << BIT_SHIFT_CMU_DLY_PRE_DIV_8822B)
5432 #define BIT_GET_CMU_DLY_PRE_DIV_8822B(x) \
5433 (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8822B) & \
5434 BIT_MASK_CMU_DLY_PRE_DIV_8822B)
5436 /* 2 REG_CMU_DLY_CFG_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONFIGURATION ) */
5438 #define BIT_SHIFT_CMU_DLY_LTR_A2I_8822B 24
5439 #define BIT_MASK_CMU_DLY_LTR_A2I_8822B 0xff
5440 #define BIT_CMU_DLY_LTR_A2I_8822B(x) \
5441 (((x) & BIT_MASK_CMU_DLY_LTR_A2I_8822B) \
5442 << BIT_SHIFT_CMU_DLY_LTR_A2I_8822B)
5443 #define BIT_GET_CMU_DLY_LTR_A2I_8822B(x) \
5444 (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8822B) & \
5445 BIT_MASK_CMU_DLY_LTR_A2I_8822B)
5447 #define BIT_SHIFT_CMU_DLY_LTR_I2A_8822B 16
5448 #define BIT_MASK_CMU_DLY_LTR_I2A_8822B 0xff
5449 #define BIT_CMU_DLY_LTR_I2A_8822B(x) \
5450 (((x) & BIT_MASK_CMU_DLY_LTR_I2A_8822B) \
5451 << BIT_SHIFT_CMU_DLY_LTR_I2A_8822B)
5452 #define BIT_GET_CMU_DLY_LTR_I2A_8822B(x) \
5453 (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8822B) & \
5454 BIT_MASK_CMU_DLY_LTR_I2A_8822B)
5456 #define BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B 8
5457 #define BIT_MASK_CMU_DLY_LTR_IDLE_8822B 0xff
5458 #define BIT_CMU_DLY_LTR_IDLE_8822B(x) \
5459 (((x) & BIT_MASK_CMU_DLY_LTR_IDLE_8822B) \
5460 << BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B)
5461 #define BIT_GET_CMU_DLY_LTR_IDLE_8822B(x) \
5462 (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B) & \
5463 BIT_MASK_CMU_DLY_LTR_IDLE_8822B)
5465 #define BIT_SHIFT_CMU_DLY_LTR_ACT_8822B 0
5466 #define BIT_MASK_CMU_DLY_LTR_ACT_8822B 0xff
5467 #define BIT_CMU_DLY_LTR_ACT_8822B(x) \
5468 (((x) & BIT_MASK_CMU_DLY_LTR_ACT_8822B) \
5469 << BIT_SHIFT_CMU_DLY_LTR_ACT_8822B)
5470 #define BIT_GET_CMU_DLY_LTR_ACT_8822B(x) \
5471 (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8822B) & \
5472 BIT_MASK_CMU_DLY_LTR_ACT_8822B)
5474 /* 2 REG_H2CQ_TXBD_DESA_8822B */
5476 #define BIT_SHIFT_H2CQ_TXBD_DESA_8822B 0
5477 #define BIT_MASK_H2CQ_TXBD_DESA_8822B 0xffffffffffffffffL
5478 #define BIT_H2CQ_TXBD_DESA_8822B(x) \
5479 (((x) & BIT_MASK_H2CQ_TXBD_DESA_8822B) \
5480 << BIT_SHIFT_H2CQ_TXBD_DESA_8822B)
5481 #define BIT_GET_H2CQ_TXBD_DESA_8822B(x) \
5482 (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8822B) & \
5483 BIT_MASK_H2CQ_TXBD_DESA_8822B)
5485 /* 2 REG_H2CQ_TXBD_NUM_8822B */
5486 #define BIT_PCIE_H2CQ_FLAG_8822B BIT(14)
5488 #define BIT_SHIFT_H2CQ_DESC_MODE_8822B 12
5489 #define BIT_MASK_H2CQ_DESC_MODE_8822B 0x3
5490 #define BIT_H2CQ_DESC_MODE_8822B(x) \
5491 (((x) & BIT_MASK_H2CQ_DESC_MODE_8822B) \
5492 << BIT_SHIFT_H2CQ_DESC_MODE_8822B)
5493 #define BIT_GET_H2CQ_DESC_MODE_8822B(x) \
5494 (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8822B) & \
5495 BIT_MASK_H2CQ_DESC_MODE_8822B)
5497 #define BIT_SHIFT_H2CQ_DESC_NUM_8822B 0
5498 #define BIT_MASK_H2CQ_DESC_NUM_8822B 0xfff
5499 #define BIT_H2CQ_DESC_NUM_8822B(x) \
5500 (((x) & BIT_MASK_H2CQ_DESC_NUM_8822B) << BIT_SHIFT_H2CQ_DESC_NUM_8822B)
5501 #define BIT_GET_H2CQ_DESC_NUM_8822B(x) \
5502 (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8822B) & BIT_MASK_H2CQ_DESC_NUM_8822B)
5504 /* 2 REG_H2CQ_TXBD_IDX_8822B */
5506 #define BIT_SHIFT_H2CQ_HW_IDX_8822B 16
5507 #define BIT_MASK_H2CQ_HW_IDX_8822B 0xfff
5508 #define BIT_H2CQ_HW_IDX_8822B(x) \
5509 (((x) & BIT_MASK_H2CQ_HW_IDX_8822B) << BIT_SHIFT_H2CQ_HW_IDX_8822B)
5510 #define BIT_GET_H2CQ_HW_IDX_8822B(x) \
5511 (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8822B) & BIT_MASK_H2CQ_HW_IDX_8822B)
5513 #define BIT_SHIFT_H2CQ_HOST_IDX_8822B 0
5514 #define BIT_MASK_H2CQ_HOST_IDX_8822B 0xfff
5515 #define BIT_H2CQ_HOST_IDX_8822B(x) \
5516 (((x) & BIT_MASK_H2CQ_HOST_IDX_8822B) << BIT_SHIFT_H2CQ_HOST_IDX_8822B)
5517 #define BIT_GET_H2CQ_HOST_IDX_8822B(x) \
5518 (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8822B) & BIT_MASK_H2CQ_HOST_IDX_8822B)
5520 /* 2 REG_H2CQ_CSR_8822B[31:0] (H2CQ CONTROL AND STATUS) */
5521 #define BIT_H2CQ_FULL_8822B BIT(31)
5522 #define BIT_CLR_H2CQ_HOST_IDX_8822B BIT(16)
5523 #define BIT_CLR_H2CQ_HW_IDX_8822B BIT(8)
5525 /* 2 REG_CHANGE_PCIE_SPEED_8822B */
5526 #define BIT_CHANGE_PCIE_SPEED_8822B BIT(18)
5528 #define BIT_SHIFT_GEN1_GEN2_8822B 16
5529 #define BIT_MASK_GEN1_GEN2_8822B 0x3
5530 #define BIT_GEN1_GEN2_8822B(x) \
5531 (((x) & BIT_MASK_GEN1_GEN2_8822B) << BIT_SHIFT_GEN1_GEN2_8822B)
5532 #define BIT_GET_GEN1_GEN2_8822B(x) \
5533 (((x) >> BIT_SHIFT_GEN1_GEN2_8822B) & BIT_MASK_GEN1_GEN2_8822B)
5535 #define BIT_SHIFT_AUTO_HANG_RELEASE_8822B 0
5536 #define BIT_MASK_AUTO_HANG_RELEASE_8822B 0x7
5537 #define BIT_AUTO_HANG_RELEASE_8822B(x) \
5538 (((x) & BIT_MASK_AUTO_HANG_RELEASE_8822B) \
5539 << BIT_SHIFT_AUTO_HANG_RELEASE_8822B)
5540 #define BIT_GET_AUTO_HANG_RELEASE_8822B(x) \
5541 (((x) >> BIT_SHIFT_AUTO_HANG_RELEASE_8822B) & \
5542 BIT_MASK_AUTO_HANG_RELEASE_8822B)
5544 /* 2 REG_OLD_DEHANG_8822B */
5545 #define BIT_OLD_DEHANG_8822B BIT(1)
5547 /* 2 REG_Q0_INFO_8822B */
5549 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8822B 25
5550 #define BIT_MASK_QUEUEMACID_Q0_V1_8822B 0x7f
5551 #define BIT_QUEUEMACID_Q0_V1_8822B(x) \
5552 (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8822B) \
5553 << BIT_SHIFT_QUEUEMACID_Q0_V1_8822B)
5554 #define BIT_GET_QUEUEMACID_Q0_V1_8822B(x) \
5555 (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8822B) & \
5556 BIT_MASK_QUEUEMACID_Q0_V1_8822B)
5558 #define BIT_SHIFT_QUEUEAC_Q0_V1_8822B 23
5559 #define BIT_MASK_QUEUEAC_Q0_V1_8822B 0x3
5560 #define BIT_QUEUEAC_Q0_V1_8822B(x) \
5561 (((x) & BIT_MASK_QUEUEAC_Q0_V1_8822B) << BIT_SHIFT_QUEUEAC_Q0_V1_8822B)
5562 #define BIT_GET_QUEUEAC_Q0_V1_8822B(x) \
5563 (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8822B) & BIT_MASK_QUEUEAC_Q0_V1_8822B)
5565 #define BIT_TIDEMPTY_Q0_V1_8822B BIT(22)
5567 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8822B 11
5568 #define BIT_MASK_TAIL_PKT_Q0_V2_8822B 0x7ff
5569 #define BIT_TAIL_PKT_Q0_V2_8822B(x) \
5570 (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8822B) \
5571 << BIT_SHIFT_TAIL_PKT_Q0_V2_8822B)
5572 #define BIT_GET_TAIL_PKT_Q0_V2_8822B(x) \
5573 (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8822B) & \
5574 BIT_MASK_TAIL_PKT_Q0_V2_8822B)
5576 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8822B 0
5577 #define BIT_MASK_HEAD_PKT_Q0_V1_8822B 0x7ff
5578 #define BIT_HEAD_PKT_Q0_V1_8822B(x) \
5579 (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8822B) \
5580 << BIT_SHIFT_HEAD_PKT_Q0_V1_8822B)
5581 #define BIT_GET_HEAD_PKT_Q0_V1_8822B(x) \
5582 (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8822B) & \
5583 BIT_MASK_HEAD_PKT_Q0_V1_8822B)
5585 /* 2 REG_Q1_INFO_8822B */
5587 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8822B 25
5588 #define BIT_MASK_QUEUEMACID_Q1_V1_8822B 0x7f
5589 #define BIT_QUEUEMACID_Q1_V1_8822B(x) \
5590 (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8822B) \
5591 << BIT_SHIFT_QUEUEMACID_Q1_V1_8822B)
5592 #define BIT_GET_QUEUEMACID_Q1_V1_8822B(x) \
5593 (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8822B) & \
5594 BIT_MASK_QUEUEMACID_Q1_V1_8822B)
5596 #define BIT_SHIFT_QUEUEAC_Q1_V1_8822B 23
5597 #define BIT_MASK_QUEUEAC_Q1_V1_8822B 0x3
5598 #define BIT_QUEUEAC_Q1_V1_8822B(x) \
5599 (((x) & BIT_MASK_QUEUEAC_Q1_V1_8822B) << BIT_SHIFT_QUEUEAC_Q1_V1_8822B)
5600 #define BIT_GET_QUEUEAC_Q1_V1_8822B(x) \
5601 (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8822B) & BIT_MASK_QUEUEAC_Q1_V1_8822B)
5603 #define BIT_TIDEMPTY_Q1_V1_8822B BIT(22)
5605 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8822B 11
5606 #define BIT_MASK_TAIL_PKT_Q1_V2_8822B 0x7ff
5607 #define BIT_TAIL_PKT_Q1_V2_8822B(x) \
5608 (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8822B) \
5609 << BIT_SHIFT_TAIL_PKT_Q1_V2_8822B)
5610 #define BIT_GET_TAIL_PKT_Q1_V2_8822B(x) \
5611 (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8822B) & \
5612 BIT_MASK_TAIL_PKT_Q1_V2_8822B)
5614 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8822B 0
5615 #define BIT_MASK_HEAD_PKT_Q1_V1_8822B 0x7ff
5616 #define BIT_HEAD_PKT_Q1_V1_8822B(x) \
5617 (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8822B) \
5618 << BIT_SHIFT_HEAD_PKT_Q1_V1_8822B)
5619 #define BIT_GET_HEAD_PKT_Q1_V1_8822B(x) \
5620 (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8822B) & \
5621 BIT_MASK_HEAD_PKT_Q1_V1_8822B)
5623 /* 2 REG_Q2_INFO_8822B */
5625 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8822B 25
5626 #define BIT_MASK_QUEUEMACID_Q2_V1_8822B 0x7f
5627 #define BIT_QUEUEMACID_Q2_V1_8822B(x) \
5628 (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8822B) \
5629 << BIT_SHIFT_QUEUEMACID_Q2_V1_8822B)
5630 #define BIT_GET_QUEUEMACID_Q2_V1_8822B(x) \
5631 (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8822B) & \
5632 BIT_MASK_QUEUEMACID_Q2_V1_8822B)
5634 #define BIT_SHIFT_QUEUEAC_Q2_V1_8822B 23
5635 #define BIT_MASK_QUEUEAC_Q2_V1_8822B 0x3
5636 #define BIT_QUEUEAC_Q2_V1_8822B(x) \
5637 (((x) & BIT_MASK_QUEUEAC_Q2_V1_8822B) << BIT_SHIFT_QUEUEAC_Q2_V1_8822B)
5638 #define BIT_GET_QUEUEAC_Q2_V1_8822B(x) \
5639 (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8822B) & BIT_MASK_QUEUEAC_Q2_V1_8822B)
5641 #define BIT_TIDEMPTY_Q2_V1_8822B BIT(22)
5643 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8822B 11
5644 #define BIT_MASK_TAIL_PKT_Q2_V2_8822B 0x7ff
5645 #define BIT_TAIL_PKT_Q2_V2_8822B(x) \
5646 (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8822B) \
5647 << BIT_SHIFT_TAIL_PKT_Q2_V2_8822B)
5648 #define BIT_GET_TAIL_PKT_Q2_V2_8822B(x) \
5649 (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8822B) & \
5650 BIT_MASK_TAIL_PKT_Q2_V2_8822B)
5652 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8822B 0
5653 #define BIT_MASK_HEAD_PKT_Q2_V1_8822B 0x7ff
5654 #define BIT_HEAD_PKT_Q2_V1_8822B(x) \
5655 (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8822B) \
5656 << BIT_SHIFT_HEAD_PKT_Q2_V1_8822B)
5657 #define BIT_GET_HEAD_PKT_Q2_V1_8822B(x) \
5658 (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8822B) & \
5659 BIT_MASK_HEAD_PKT_Q2_V1_8822B)
5661 /* 2 REG_Q3_INFO_8822B */
5663 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8822B 25
5664 #define BIT_MASK_QUEUEMACID_Q3_V1_8822B 0x7f
5665 #define BIT_QUEUEMACID_Q3_V1_8822B(x) \
5666 (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8822B) \
5667 << BIT_SHIFT_QUEUEMACID_Q3_V1_8822B)
5668 #define BIT_GET_QUEUEMACID_Q3_V1_8822B(x) \
5669 (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8822B) & \
5670 BIT_MASK_QUEUEMACID_Q3_V1_8822B)
5672 #define BIT_SHIFT_QUEUEAC_Q3_V1_8822B 23
5673 #define BIT_MASK_QUEUEAC_Q3_V1_8822B 0x3
5674 #define BIT_QUEUEAC_Q3_V1_8822B(x) \
5675 (((x) & BIT_MASK_QUEUEAC_Q3_V1_8822B) << BIT_SHIFT_QUEUEAC_Q3_V1_8822B)
5676 #define BIT_GET_QUEUEAC_Q3_V1_8822B(x) \
5677 (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8822B) & BIT_MASK_QUEUEAC_Q3_V1_8822B)
5679 #define BIT_TIDEMPTY_Q3_V1_8822B BIT(22)
5681 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8822B 11
5682 #define BIT_MASK_TAIL_PKT_Q3_V2_8822B 0x7ff
5683 #define BIT_TAIL_PKT_Q3_V2_8822B(x) \
5684 (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8822B) \
5685 << BIT_SHIFT_TAIL_PKT_Q3_V2_8822B)
5686 #define BIT_GET_TAIL_PKT_Q3_V2_8822B(x) \
5687 (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8822B) & \
5688 BIT_MASK_TAIL_PKT_Q3_V2_8822B)
5690 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8822B 0
5691 #define BIT_MASK_HEAD_PKT_Q3_V1_8822B 0x7ff
5692 #define BIT_HEAD_PKT_Q3_V1_8822B(x) \
5693 (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8822B) \
5694 << BIT_SHIFT_HEAD_PKT_Q3_V1_8822B)
5695 #define BIT_GET_HEAD_PKT_Q3_V1_8822B(x) \
5696 (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8822B) & \
5697 BIT_MASK_HEAD_PKT_Q3_V1_8822B)
5699 /* 2 REG_MGQ_INFO_8822B */
5701 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B 25
5702 #define BIT_MASK_QUEUEMACID_MGQ_V1_8822B 0x7f
5703 #define BIT_QUEUEMACID_MGQ_V1_8822B(x) \
5704 (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8822B) \
5705 << BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B)
5706 #define BIT_GET_QUEUEMACID_MGQ_V1_8822B(x) \
5707 (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B) & \
5708 BIT_MASK_QUEUEMACID_MGQ_V1_8822B)
5710 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8822B 23
5711 #define BIT_MASK_QUEUEAC_MGQ_V1_8822B 0x3
5712 #define BIT_QUEUEAC_MGQ_V1_8822B(x) \
5713 (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8822B) \
5714 << BIT_SHIFT_QUEUEAC_MGQ_V1_8822B)
5715 #define BIT_GET_QUEUEAC_MGQ_V1_8822B(x) \
5716 (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8822B) & \
5717 BIT_MASK_QUEUEAC_MGQ_V1_8822B)
5719 #define BIT_TIDEMPTY_MGQ_V1_8822B BIT(22)
5721 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B 11
5722 #define BIT_MASK_TAIL_PKT_MGQ_V2_8822B 0x7ff
5723 #define BIT_TAIL_PKT_MGQ_V2_8822B(x) \
5724 (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8822B) \
5725 << BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B)
5726 #define BIT_GET_TAIL_PKT_MGQ_V2_8822B(x) \
5727 (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B) & \
5728 BIT_MASK_TAIL_PKT_MGQ_V2_8822B)
5730 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B 0
5731 #define BIT_MASK_HEAD_PKT_MGQ_V1_8822B 0x7ff
5732 #define BIT_HEAD_PKT_MGQ_V1_8822B(x) \
5733 (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8822B) \
5734 << BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B)
5735 #define BIT_GET_HEAD_PKT_MGQ_V1_8822B(x) \
5736 (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B) & \
5737 BIT_MASK_HEAD_PKT_MGQ_V1_8822B)
5739 /* 2 REG_HIQ_INFO_8822B */
5741 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B 25
5742 #define BIT_MASK_QUEUEMACID_HIQ_V1_8822B 0x7f
5743 #define BIT_QUEUEMACID_HIQ_V1_8822B(x) \
5744 (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8822B) \
5745 << BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B)
5746 #define BIT_GET_QUEUEMACID_HIQ_V1_8822B(x) \
5747 (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B) & \
5748 BIT_MASK_QUEUEMACID_HIQ_V1_8822B)
5750 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8822B 23
5751 #define BIT_MASK_QUEUEAC_HIQ_V1_8822B 0x3
5752 #define BIT_QUEUEAC_HIQ_V1_8822B(x) \
5753 (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8822B) \
5754 << BIT_SHIFT_QUEUEAC_HIQ_V1_8822B)
5755 #define BIT_GET_QUEUEAC_HIQ_V1_8822B(x) \
5756 (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8822B) & \
5757 BIT_MASK_QUEUEAC_HIQ_V1_8822B)
5759 #define BIT_TIDEMPTY_HIQ_V1_8822B BIT(22)
5761 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B 11
5762 #define BIT_MASK_TAIL_PKT_HIQ_V2_8822B 0x7ff
5763 #define BIT_TAIL_PKT_HIQ_V2_8822B(x) \
5764 (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8822B) \
5765 << BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B)
5766 #define BIT_GET_TAIL_PKT_HIQ_V2_8822B(x) \
5767 (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B) & \
5768 BIT_MASK_TAIL_PKT_HIQ_V2_8822B)
5770 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B 0
5771 #define BIT_MASK_HEAD_PKT_HIQ_V1_8822B 0x7ff
5772 #define BIT_HEAD_PKT_HIQ_V1_8822B(x) \
5773 (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8822B) \
5774 << BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B)
5775 #define BIT_GET_HEAD_PKT_HIQ_V1_8822B(x) \
5776 (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B) & \
5777 BIT_MASK_HEAD_PKT_HIQ_V1_8822B)
5779 /* 2 REG_BCNQ_INFO_8822B */
5781 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B 0
5782 #define BIT_MASK_BCNQ_HEAD_PG_V1_8822B 0xfff
5783 #define BIT_BCNQ_HEAD_PG_V1_8822B(x) \
5784 (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8822B) \
5785 << BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B)
5786 #define BIT_GET_BCNQ_HEAD_PG_V1_8822B(x) \
5787 (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B) & \
5788 BIT_MASK_BCNQ_HEAD_PG_V1_8822B)
5790 /* 2 REG_TXPKT_EMPTY_8822B */
5791 #define BIT_BCNQ_EMPTY_8822B BIT(11)
5792 #define BIT_HQQ_EMPTY_8822B BIT(10)
5793 #define BIT_MQQ_EMPTY_8822B BIT(9)
5794 #define BIT_MGQ_CPU_EMPTY_8822B BIT(8)
5795 #define BIT_AC7Q_EMPTY_8822B BIT(7)
5796 #define BIT_AC6Q_EMPTY_8822B BIT(6)
5797 #define BIT_AC5Q_EMPTY_8822B BIT(5)
5798 #define BIT_AC4Q_EMPTY_8822B BIT(4)
5799 #define BIT_AC3Q_EMPTY_8822B BIT(3)
5800 #define BIT_AC2Q_EMPTY_8822B BIT(2)
5801 #define BIT_AC1Q_EMPTY_8822B BIT(1)
5802 #define BIT_AC0Q_EMPTY_8822B BIT(0)
5804 /* 2 REG_CPU_MGQ_INFO_8822B */
5805 #define BIT_BCN1_POLL_8822B BIT(30)
5806 #define BIT_CPUMGT_POLL_8822B BIT(29)
5807 #define BIT_BCN_POLL_8822B BIT(28)
5808 #define BIT_CPUMGQ_FW_NUM_V1_8822B BIT(12)
5810 #define BIT_SHIFT_FW_FREE_TAIL_V1_8822B 0
5811 #define BIT_MASK_FW_FREE_TAIL_V1_8822B 0xfff
5812 #define BIT_FW_FREE_TAIL_V1_8822B(x) \
5813 (((x) & BIT_MASK_FW_FREE_TAIL_V1_8822B) \
5814 << BIT_SHIFT_FW_FREE_TAIL_V1_8822B)
5815 #define BIT_GET_FW_FREE_TAIL_V1_8822B(x) \
5816 (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8822B) & \
5817 BIT_MASK_FW_FREE_TAIL_V1_8822B)
5819 /* 2 REG_FWHW_TXQ_CTRL_8822B */
5820 #define BIT_RTS_LIMIT_IN_OFDM_8822B BIT(23)
5821 #define BIT_EN_BCNQ_DL_8822B BIT(22)
5822 #define BIT_EN_RD_RESP_NAV_BK_8822B BIT(21)
5823 #define BIT_EN_WR_FREE_TAIL_8822B BIT(20)
5825 #define BIT_SHIFT_EN_QUEUE_RPT_8822B 8
5826 #define BIT_MASK_EN_QUEUE_RPT_8822B 0xff
5827 #define BIT_EN_QUEUE_RPT_8822B(x) \
5828 (((x) & BIT_MASK_EN_QUEUE_RPT_8822B) << BIT_SHIFT_EN_QUEUE_RPT_8822B)
5829 #define BIT_GET_EN_QUEUE_RPT_8822B(x) \
5830 (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8822B) & BIT_MASK_EN_QUEUE_RPT_8822B)
5832 #define BIT_EN_RTY_BK_8822B BIT(7)
5833 #define BIT_EN_USE_INI_RAT_8822B BIT(6)
5834 #define BIT_EN_RTS_NAV_BK_8822B BIT(5)
5835 #define BIT_DIS_SSN_CHECK_8822B BIT(4)
5836 #define BIT_MACID_MATCH_RTS_8822B BIT(3)
5837 #define BIT_EN_BCN_TRXRPT_V1_8822B BIT(2)
5838 #define BIT_EN_FTMACKRPT_8822B BIT(1)
5839 #define BIT_EN_FTMRPT_8822B BIT(0)
5841 /* 2 REG_DATAFB_SEL_8822B */
5842 #define BIT__R_EN_RTY_BK_COD_8822B BIT(2)
5844 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B 0
5845 #define BIT_MASK__R_DATA_FALLBACK_SEL_8822B 0x3
5846 #define BIT__R_DATA_FALLBACK_SEL_8822B(x) \
5847 (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8822B) \
5848 << BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B)
5849 #define BIT_GET__R_DATA_FALLBACK_SEL_8822B(x) \
5850 (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B) & \
5851 BIT_MASK__R_DATA_FALLBACK_SEL_8822B)
5853 /* 2 REG_BCNQ_BDNY_V1_8822B */
5855 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8822B 0
5856 #define BIT_MASK_BCNQ_PGBNDY_V1_8822B 0xfff
5857 #define BIT_BCNQ_PGBNDY_V1_8822B(x) \
5858 (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8822B) \
5859 << BIT_SHIFT_BCNQ_PGBNDY_V1_8822B)
5860 #define BIT_GET_BCNQ_PGBNDY_V1_8822B(x) \
5861 (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8822B) & \
5862 BIT_MASK_BCNQ_PGBNDY_V1_8822B)
5864 /* 2 REG_LIFETIME_EN_8822B */
5865 #define BIT_BT_INT_CPU_8822B BIT(7)
5866 #define BIT_BT_INT_PTA_8822B BIT(6)
5867 #define BIT_EN_CTRL_RTYBIT_8822B BIT(4)
5868 #define BIT_LIFETIME_BK_EN_8822B BIT(3)
5869 #define BIT_LIFETIME_BE_EN_8822B BIT(2)
5870 #define BIT_LIFETIME_VI_EN_8822B BIT(1)
5871 #define BIT_LIFETIME_VO_EN_8822B BIT(0)
5873 /* 2 REG_SPEC_SIFS_8822B */
5875 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B 8
5876 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B 0xff
5877 #define BIT_SPEC_SIFS_OFDM_PTCL_8822B(x) \
5878 (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B) \
5879 << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B)
5880 #define BIT_GET_SPEC_SIFS_OFDM_PTCL_8822B(x) \
5881 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B) & \
5882 BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B)
5884 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B 0
5885 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B 0xff
5886 #define BIT_SPEC_SIFS_CCK_PTCL_8822B(x) \
5887 (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B) \
5888 << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B)
5889 #define BIT_GET_SPEC_SIFS_CCK_PTCL_8822B(x) \
5890 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B) & \
5891 BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B)
5893 /* 2 REG_RETRY_LIMIT_8822B */
5895 #define BIT_SHIFT_SRL_8822B 8
5896 #define BIT_MASK_SRL_8822B 0x3f
5897 #define BIT_SRL_8822B(x) (((x) & BIT_MASK_SRL_8822B) << BIT_SHIFT_SRL_8822B)
5898 #define BIT_GET_SRL_8822B(x) (((x) >> BIT_SHIFT_SRL_8822B) & BIT_MASK_SRL_8822B)
5900 #define BIT_SHIFT_LRL_8822B 0
5901 #define BIT_MASK_LRL_8822B 0x3f
5902 #define BIT_LRL_8822B(x) (((x) & BIT_MASK_LRL_8822B) << BIT_SHIFT_LRL_8822B)
5903 #define BIT_GET_LRL_8822B(x) (((x) >> BIT_SHIFT_LRL_8822B) & BIT_MASK_LRL_8822B)
5905 /* 2 REG_TXBF_CTRL_8822B */
5906 #define BIT_R_ENABLE_NDPA_8822B BIT(31)
5907 #define BIT_USE_NDPA_PARAMETER_8822B BIT(30)
5908 #define BIT_R_PROP_TXBF_8822B BIT(29)
5909 #define BIT_R_EN_NDPA_INT_8822B BIT(28)
5910 #define BIT_R_TXBF1_80M_8822B BIT(27)
5911 #define BIT_R_TXBF1_40M_8822B BIT(26)
5912 #define BIT_R_TXBF1_20M_8822B BIT(25)
5914 #define BIT_SHIFT_R_TXBF1_AID_8822B 16
5915 #define BIT_MASK_R_TXBF1_AID_8822B 0x1ff
5916 #define BIT_R_TXBF1_AID_8822B(x) \
5917 (((x) & BIT_MASK_R_TXBF1_AID_8822B) << BIT_SHIFT_R_TXBF1_AID_8822B)
5918 #define BIT_GET_R_TXBF1_AID_8822B(x) \
5919 (((x) >> BIT_SHIFT_R_TXBF1_AID_8822B) & BIT_MASK_R_TXBF1_AID_8822B)
5921 #define BIT_DIS_NDP_BFEN_8822B BIT(15)
5922 #define BIT_R_TXBCN_NOBLOCK_NDP_8822B BIT(14)
5923 #define BIT_R_TXBF0_80M_8822B BIT(11)
5924 #define BIT_R_TXBF0_40M_8822B BIT(10)
5925 #define BIT_R_TXBF0_20M_8822B BIT(9)
5927 #define BIT_SHIFT_R_TXBF0_AID_8822B 0
5928 #define BIT_MASK_R_TXBF0_AID_8822B 0x1ff
5929 #define BIT_R_TXBF0_AID_8822B(x) \
5930 (((x) & BIT_MASK_R_TXBF0_AID_8822B) << BIT_SHIFT_R_TXBF0_AID_8822B)
5931 #define BIT_GET_R_TXBF0_AID_8822B(x) \
5932 (((x) >> BIT_SHIFT_R_TXBF0_AID_8822B) & BIT_MASK_R_TXBF0_AID_8822B)
5934 /* 2 REG_DARFRC_8822B */
5936 #define BIT_SHIFT_DARF_RC8_8822B (56 & CPU_OPT_WIDTH)
5937 #define BIT_MASK_DARF_RC8_8822B 0x1f
5938 #define BIT_DARF_RC8_8822B(x) \
5939 (((x) & BIT_MASK_DARF_RC8_8822B) << BIT_SHIFT_DARF_RC8_8822B)
5940 #define BIT_GET_DARF_RC8_8822B(x) \
5941 (((x) >> BIT_SHIFT_DARF_RC8_8822B) & BIT_MASK_DARF_RC8_8822B)
5943 #define BIT_SHIFT_DARF_RC7_8822B (48 & CPU_OPT_WIDTH)
5944 #define BIT_MASK_DARF_RC7_8822B 0x1f
5945 #define BIT_DARF_RC7_8822B(x) \
5946 (((x) & BIT_MASK_DARF_RC7_8822B) << BIT_SHIFT_DARF_RC7_8822B)
5947 #define BIT_GET_DARF_RC7_8822B(x) \
5948 (((x) >> BIT_SHIFT_DARF_RC7_8822B) & BIT_MASK_DARF_RC7_8822B)
5950 #define BIT_SHIFT_DARF_RC6_8822B (40 & CPU_OPT_WIDTH)
5951 #define BIT_MASK_DARF_RC6_8822B 0x1f
5952 #define BIT_DARF_RC6_8822B(x) \
5953 (((x) & BIT_MASK_DARF_RC6_8822B) << BIT_SHIFT_DARF_RC6_8822B)
5954 #define BIT_GET_DARF_RC6_8822B(x) \
5955 (((x) >> BIT_SHIFT_DARF_RC6_8822B) & BIT_MASK_DARF_RC6_8822B)
5957 #define BIT_SHIFT_DARF_RC5_8822B (32 & CPU_OPT_WIDTH)
5958 #define BIT_MASK_DARF_RC5_8822B 0x1f
5959 #define BIT_DARF_RC5_8822B(x) \
5960 (((x) & BIT_MASK_DARF_RC5_8822B) << BIT_SHIFT_DARF_RC5_8822B)
5961 #define BIT_GET_DARF_RC5_8822B(x) \
5962 (((x) >> BIT_SHIFT_DARF_RC5_8822B) & BIT_MASK_DARF_RC5_8822B)
5964 #define BIT_SHIFT_DARF_RC4_8822B 24
5965 #define BIT_MASK_DARF_RC4_8822B 0x1f
5966 #define BIT_DARF_RC4_8822B(x) \
5967 (((x) & BIT_MASK_DARF_RC4_8822B) << BIT_SHIFT_DARF_RC4_8822B)
5968 #define BIT_GET_DARF_RC4_8822B(x) \
5969 (((x) >> BIT_SHIFT_DARF_RC4_8822B) & BIT_MASK_DARF_RC4_8822B)
5971 #define BIT_SHIFT_DARF_RC3_8822B 16
5972 #define BIT_MASK_DARF_RC3_8822B 0x1f
5973 #define BIT_DARF_RC3_8822B(x) \
5974 (((x) & BIT_MASK_DARF_RC3_8822B) << BIT_SHIFT_DARF_RC3_8822B)
5975 #define BIT_GET_DARF_RC3_8822B(x) \
5976 (((x) >> BIT_SHIFT_DARF_RC3_8822B) & BIT_MASK_DARF_RC3_8822B)
5978 #define BIT_SHIFT_DARF_RC2_8822B 8
5979 #define BIT_MASK_DARF_RC2_8822B 0x1f
5980 #define BIT_DARF_RC2_8822B(x) \
5981 (((x) & BIT_MASK_DARF_RC2_8822B) << BIT_SHIFT_DARF_RC2_8822B)
5982 #define BIT_GET_DARF_RC2_8822B(x) \
5983 (((x) >> BIT_SHIFT_DARF_RC2_8822B) & BIT_MASK_DARF_RC2_8822B)
5985 #define BIT_SHIFT_DARF_RC1_8822B 0
5986 #define BIT_MASK_DARF_RC1_8822B 0x1f
5987 #define BIT_DARF_RC1_8822B(x) \
5988 (((x) & BIT_MASK_DARF_RC1_8822B) << BIT_SHIFT_DARF_RC1_8822B)
5989 #define BIT_GET_DARF_RC1_8822B(x) \
5990 (((x) >> BIT_SHIFT_DARF_RC1_8822B) & BIT_MASK_DARF_RC1_8822B)
5992 /* 2 REG_RARFRC_8822B */
5994 #define BIT_SHIFT_RARF_RC8_8822B (56 & CPU_OPT_WIDTH)
5995 #define BIT_MASK_RARF_RC8_8822B 0x1f
5996 #define BIT_RARF_RC8_8822B(x) \
5997 (((x) & BIT_MASK_RARF_RC8_8822B) << BIT_SHIFT_RARF_RC8_8822B)
5998 #define BIT_GET_RARF_RC8_8822B(x) \
5999 (((x) >> BIT_SHIFT_RARF_RC8_8822B) & BIT_MASK_RARF_RC8_8822B)
6001 #define BIT_SHIFT_RARF_RC7_8822B (48 & CPU_OPT_WIDTH)
6002 #define BIT_MASK_RARF_RC7_8822B 0x1f
6003 #define BIT_RARF_RC7_8822B(x) \
6004 (((x) & BIT_MASK_RARF_RC7_8822B) << BIT_SHIFT_RARF_RC7_8822B)
6005 #define BIT_GET_RARF_RC7_8822B(x) \
6006 (((x) >> BIT_SHIFT_RARF_RC7_8822B) & BIT_MASK_RARF_RC7_8822B)
6008 #define BIT_SHIFT_RARF_RC6_8822B (40 & CPU_OPT_WIDTH)
6009 #define BIT_MASK_RARF_RC6_8822B 0x1f
6010 #define BIT_RARF_RC6_8822B(x) \
6011 (((x) & BIT_MASK_RARF_RC6_8822B) << BIT_SHIFT_RARF_RC6_8822B)
6012 #define BIT_GET_RARF_RC6_8822B(x) \
6013 (((x) >> BIT_SHIFT_RARF_RC6_8822B) & BIT_MASK_RARF_RC6_8822B)
6015 #define BIT_SHIFT_RARF_RC5_8822B (32 & CPU_OPT_WIDTH)
6016 #define BIT_MASK_RARF_RC5_8822B 0x1f
6017 #define BIT_RARF_RC5_8822B(x) \
6018 (((x) & BIT_MASK_RARF_RC5_8822B) << BIT_SHIFT_RARF_RC5_8822B)
6019 #define BIT_GET_RARF_RC5_8822B(x) \
6020 (((x) >> BIT_SHIFT_RARF_RC5_8822B) & BIT_MASK_RARF_RC5_8822B)
6022 #define BIT_SHIFT_RARF_RC4_8822B 24
6023 #define BIT_MASK_RARF_RC4_8822B 0x1f
6024 #define BIT_RARF_RC4_8822B(x) \
6025 (((x) & BIT_MASK_RARF_RC4_8822B) << BIT_SHIFT_RARF_RC4_8822B)
6026 #define BIT_GET_RARF_RC4_8822B(x) \
6027 (((x) >> BIT_SHIFT_RARF_RC4_8822B) & BIT_MASK_RARF_RC4_8822B)
6029 #define BIT_SHIFT_RARF_RC3_8822B 16
6030 #define BIT_MASK_RARF_RC3_8822B 0x1f
6031 #define BIT_RARF_RC3_8822B(x) \
6032 (((x) & BIT_MASK_RARF_RC3_8822B) << BIT_SHIFT_RARF_RC3_8822B)
6033 #define BIT_GET_RARF_RC3_8822B(x) \
6034 (((x) >> BIT_SHIFT_RARF_RC3_8822B) & BIT_MASK_RARF_RC3_8822B)
6036 #define BIT_SHIFT_RARF_RC2_8822B 8
6037 #define BIT_MASK_RARF_RC2_8822B 0x1f
6038 #define BIT_RARF_RC2_8822B(x) \
6039 (((x) & BIT_MASK_RARF_RC2_8822B) << BIT_SHIFT_RARF_RC2_8822B)
6040 #define BIT_GET_RARF_RC2_8822B(x) \
6041 (((x) >> BIT_SHIFT_RARF_RC2_8822B) & BIT_MASK_RARF_RC2_8822B)
6043 #define BIT_SHIFT_RARF_RC1_8822B 0
6044 #define BIT_MASK_RARF_RC1_8822B 0x1f
6045 #define BIT_RARF_RC1_8822B(x) \
6046 (((x) & BIT_MASK_RARF_RC1_8822B) << BIT_SHIFT_RARF_RC1_8822B)
6047 #define BIT_GET_RARF_RC1_8822B(x) \
6048 (((x) >> BIT_SHIFT_RARF_RC1_8822B) & BIT_MASK_RARF_RC1_8822B)
6050 /* 2 REG_RRSR_8822B */
6052 #define BIT_SHIFT_RRSR_RSC_8822B 21
6053 #define BIT_MASK_RRSR_RSC_8822B 0x3
6054 #define BIT_RRSR_RSC_8822B(x) \
6055 (((x) & BIT_MASK_RRSR_RSC_8822B) << BIT_SHIFT_RRSR_RSC_8822B)
6056 #define BIT_GET_RRSR_RSC_8822B(x) \
6057 (((x) >> BIT_SHIFT_RRSR_RSC_8822B) & BIT_MASK_RRSR_RSC_8822B)
6059 #define BIT_RRSR_BW_8822B BIT(20)
6061 #define BIT_SHIFT_RRSC_BITMAP_8822B 0
6062 #define BIT_MASK_RRSC_BITMAP_8822B 0xfffff
6063 #define BIT_RRSC_BITMAP_8822B(x) \
6064 (((x) & BIT_MASK_RRSC_BITMAP_8822B) << BIT_SHIFT_RRSC_BITMAP_8822B)
6065 #define BIT_GET_RRSC_BITMAP_8822B(x) \
6066 (((x) >> BIT_SHIFT_RRSC_BITMAP_8822B) & BIT_MASK_RRSC_BITMAP_8822B)
6068 /* 2 REG_ARFR0_8822B */
6070 #define BIT_SHIFT_ARFR0_V1_8822B 0
6071 #define BIT_MASK_ARFR0_V1_8822B 0xffffffffffffffffL
6072 #define BIT_ARFR0_V1_8822B(x) \
6073 (((x) & BIT_MASK_ARFR0_V1_8822B) << BIT_SHIFT_ARFR0_V1_8822B)
6074 #define BIT_GET_ARFR0_V1_8822B(x) \
6075 (((x) >> BIT_SHIFT_ARFR0_V1_8822B) & BIT_MASK_ARFR0_V1_8822B)
6077 /* 2 REG_ARFR1_V1_8822B */
6079 #define BIT_SHIFT_ARFR1_V1_8822B 0
6080 #define BIT_MASK_ARFR1_V1_8822B 0xffffffffffffffffL
6081 #define BIT_ARFR1_V1_8822B(x) \
6082 (((x) & BIT_MASK_ARFR1_V1_8822B) << BIT_SHIFT_ARFR1_V1_8822B)
6083 #define BIT_GET_ARFR1_V1_8822B(x) \
6084 (((x) >> BIT_SHIFT_ARFR1_V1_8822B) & BIT_MASK_ARFR1_V1_8822B)
6086 /* 2 REG_CCK_CHECK_8822B */
6087 #define BIT_CHECK_CCK_EN_8822B BIT(7)
6088 #define BIT_EN_BCN_PKT_REL_8822B BIT(6)
6089 #define BIT_BCN_PORT_SEL_8822B BIT(5)
6090 #define BIT_MOREDATA_BYPASS_8822B BIT(4)
6091 #define BIT_EN_CLR_CMD_REL_BCN_PKT_8822B BIT(3)
6092 #define BIT_R_EN_SET_MOREDATA_8822B BIT(2)
6093 #define BIT__R_DIS_CLEAR_MACID_RELEASE_8822B BIT(1)
6094 #define BIT__R_MACID_RELEASE_EN_8822B BIT(0)
6096 /* 2 REG_AMPDU_MAX_TIME_V1_8822B */
6098 #define BIT_SHIFT_AMPDU_MAX_TIME_8822B 0
6099 #define BIT_MASK_AMPDU_MAX_TIME_8822B 0xff
6100 #define BIT_AMPDU_MAX_TIME_8822B(x) \
6101 (((x) & BIT_MASK_AMPDU_MAX_TIME_8822B) \
6102 << BIT_SHIFT_AMPDU_MAX_TIME_8822B)
6103 #define BIT_GET_AMPDU_MAX_TIME_8822B(x) \
6104 (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8822B) & \
6105 BIT_MASK_AMPDU_MAX_TIME_8822B)
6107 /* 2 REG_BCNQ1_BDNY_V1_8822B */
6109 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B 0
6110 #define BIT_MASK_BCNQ1_PGBNDY_V1_8822B 0xfff
6111 #define BIT_BCNQ1_PGBNDY_V1_8822B(x) \
6112 (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8822B) \
6113 << BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B)
6114 #define BIT_GET_BCNQ1_PGBNDY_V1_8822B(x) \
6115 (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B) & \
6116 BIT_MASK_BCNQ1_PGBNDY_V1_8822B)
6118 /* 2 REG_AMPDU_MAX_LENGTH_8822B */
6120 #define BIT_SHIFT_AMPDU_MAX_LENGTH_8822B 0
6121 #define BIT_MASK_AMPDU_MAX_LENGTH_8822B 0xffffffffL
6122 #define BIT_AMPDU_MAX_LENGTH_8822B(x) \
6123 (((x) & BIT_MASK_AMPDU_MAX_LENGTH_8822B) \
6124 << BIT_SHIFT_AMPDU_MAX_LENGTH_8822B)
6125 #define BIT_GET_AMPDU_MAX_LENGTH_8822B(x) \
6126 (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8822B) & \
6127 BIT_MASK_AMPDU_MAX_LENGTH_8822B)
6129 /* 2 REG_ACQ_STOP_8822B */
6130 #define BIT_AC7Q_STOP_8822B BIT(7)
6131 #define BIT_AC6Q_STOP_8822B BIT(6)
6132 #define BIT_AC5Q_STOP_8822B BIT(5)
6133 #define BIT_AC4Q_STOP_8822B BIT(4)
6134 #define BIT_AC3Q_STOP_8822B BIT(3)
6135 #define BIT_AC2Q_STOP_8822B BIT(2)
6136 #define BIT_AC1Q_STOP_8822B BIT(1)
6137 #define BIT_AC0Q_STOP_8822B BIT(0)
6139 /* 2 REG_NDPA_RATE_8822B */
6141 #define BIT_SHIFT_R_NDPA_RATE_V1_8822B 0
6142 #define BIT_MASK_R_NDPA_RATE_V1_8822B 0xff
6143 #define BIT_R_NDPA_RATE_V1_8822B(x) \
6144 (((x) & BIT_MASK_R_NDPA_RATE_V1_8822B) \
6145 << BIT_SHIFT_R_NDPA_RATE_V1_8822B)
6146 #define BIT_GET_R_NDPA_RATE_V1_8822B(x) \
6147 (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8822B) & \
6148 BIT_MASK_R_NDPA_RATE_V1_8822B)
6150 /* 2 REG_TX_HANG_CTRL_8822B */
6151 #define BIT_R_EN_GNT_BT_AWAKE_8822B BIT(3)
6152 #define BIT_EN_EOF_V1_8822B BIT(2)
6153 #define BIT_DIS_OQT_BLOCK_8822B BIT(1)
6154 #define BIT_SEARCH_QUEUE_EN_8822B BIT(0)
6156 /* 2 REG_NDPA_OPT_CTRL_8822B */
6157 #define BIT_R_DIS_MACID_RELEASE_RTY_8822B BIT(5)
6159 #define BIT_SHIFT_BW_SIGTA_8822B 3
6160 #define BIT_MASK_BW_SIGTA_8822B 0x3
6161 #define BIT_BW_SIGTA_8822B(x) \
6162 (((x) & BIT_MASK_BW_SIGTA_8822B) << BIT_SHIFT_BW_SIGTA_8822B)
6163 #define BIT_GET_BW_SIGTA_8822B(x) \
6164 (((x) >> BIT_SHIFT_BW_SIGTA_8822B) & BIT_MASK_BW_SIGTA_8822B)
6166 #define BIT_EN_BAR_SIGTA_8822B BIT(2)
6168 #define BIT_SHIFT_R_NDPA_BW_8822B 0
6169 #define BIT_MASK_R_NDPA_BW_8822B 0x3
6170 #define BIT_R_NDPA_BW_8822B(x) \
6171 (((x) & BIT_MASK_R_NDPA_BW_8822B) << BIT_SHIFT_R_NDPA_BW_8822B)
6172 #define BIT_GET_R_NDPA_BW_8822B(x) \
6173 (((x) >> BIT_SHIFT_R_NDPA_BW_8822B) & BIT_MASK_R_NDPA_BW_8822B)
6175 /* 2 REG_RD_RESP_PKT_TH_8822B */
6177 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B 0
6178 #define BIT_MASK_RD_RESP_PKT_TH_V1_8822B 0x3f
6179 #define BIT_RD_RESP_PKT_TH_V1_8822B(x) \
6180 (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8822B) \
6181 << BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B)
6182 #define BIT_GET_RD_RESP_PKT_TH_V1_8822B(x) \
6183 (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B) & \
6184 BIT_MASK_RD_RESP_PKT_TH_V1_8822B)
6186 /* 2 REG_CMDQ_INFO_8822B */
6188 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B 25
6189 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8822B 0x7f
6190 #define BIT_QUEUEMACID_CMDQ_V1_8822B(x) \
6191 (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8822B) \
6192 << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B)
6193 #define BIT_GET_QUEUEMACID_CMDQ_V1_8822B(x) \
6194 (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B) & \
6195 BIT_MASK_QUEUEMACID_CMDQ_V1_8822B)
6197 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B 23
6198 #define BIT_MASK_QUEUEAC_CMDQ_V1_8822B 0x3
6199 #define BIT_QUEUEAC_CMDQ_V1_8822B(x) \
6200 (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8822B) \
6201 << BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B)
6202 #define BIT_GET_QUEUEAC_CMDQ_V1_8822B(x) \
6203 (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B) & \
6204 BIT_MASK_QUEUEAC_CMDQ_V1_8822B)
6206 #define BIT_TIDEMPTY_CMDQ_V1_8822B BIT(22)
6208 #define BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B 11
6209 #define BIT_MASK_TAIL_PKT_CMDQ_V2_8822B 0x7ff
6210 #define BIT_TAIL_PKT_CMDQ_V2_8822B(x) \
6211 (((x) & BIT_MASK_TAIL_PKT_CMDQ_V2_8822B) \
6212 << BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B)
6213 #define BIT_GET_TAIL_PKT_CMDQ_V2_8822B(x) \
6214 (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B) & \
6215 BIT_MASK_TAIL_PKT_CMDQ_V2_8822B)
6217 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B 0
6218 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8822B 0x7ff
6219 #define BIT_HEAD_PKT_CMDQ_V1_8822B(x) \
6220 (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8822B) \
6221 << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B)
6222 #define BIT_GET_HEAD_PKT_CMDQ_V1_8822B(x) \
6223 (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B) & \
6224 BIT_MASK_HEAD_PKT_CMDQ_V1_8822B)
6226 /* 2 REG_Q4_INFO_8822B */
6228 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8822B 25
6229 #define BIT_MASK_QUEUEMACID_Q4_V1_8822B 0x7f
6230 #define BIT_QUEUEMACID_Q4_V1_8822B(x) \
6231 (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8822B) \
6232 << BIT_SHIFT_QUEUEMACID_Q4_V1_8822B)
6233 #define BIT_GET_QUEUEMACID_Q4_V1_8822B(x) \
6234 (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8822B) & \
6235 BIT_MASK_QUEUEMACID_Q4_V1_8822B)
6237 #define BIT_SHIFT_QUEUEAC_Q4_V1_8822B 23
6238 #define BIT_MASK_QUEUEAC_Q4_V1_8822B 0x3
6239 #define BIT_QUEUEAC_Q4_V1_8822B(x) \
6240 (((x) & BIT_MASK_QUEUEAC_Q4_V1_8822B) << BIT_SHIFT_QUEUEAC_Q4_V1_8822B)
6241 #define BIT_GET_QUEUEAC_Q4_V1_8822B(x) \
6242 (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8822B) & BIT_MASK_QUEUEAC_Q4_V1_8822B)
6244 #define BIT_TIDEMPTY_Q4_V1_8822B BIT(22)
6246 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8822B 11
6247 #define BIT_MASK_TAIL_PKT_Q4_V2_8822B 0x7ff
6248 #define BIT_TAIL_PKT_Q4_V2_8822B(x) \
6249 (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8822B) \
6250 << BIT_SHIFT_TAIL_PKT_Q4_V2_8822B)
6251 #define BIT_GET_TAIL_PKT_Q4_V2_8822B(x) \
6252 (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8822B) & \
6253 BIT_MASK_TAIL_PKT_Q4_V2_8822B)
6255 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8822B 0
6256 #define BIT_MASK_HEAD_PKT_Q4_V1_8822B 0x7ff
6257 #define BIT_HEAD_PKT_Q4_V1_8822B(x) \
6258 (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8822B) \
6259 << BIT_SHIFT_HEAD_PKT_Q4_V1_8822B)
6260 #define BIT_GET_HEAD_PKT_Q4_V1_8822B(x) \
6261 (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8822B) & \
6262 BIT_MASK_HEAD_PKT_Q4_V1_8822B)
6264 /* 2 REG_Q5_INFO_8822B */
6266 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8822B 25
6267 #define BIT_MASK_QUEUEMACID_Q5_V1_8822B 0x7f
6268 #define BIT_QUEUEMACID_Q5_V1_8822B(x) \
6269 (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8822B) \
6270 << BIT_SHIFT_QUEUEMACID_Q5_V1_8822B)
6271 #define BIT_GET_QUEUEMACID_Q5_V1_8822B(x) \
6272 (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8822B) & \
6273 BIT_MASK_QUEUEMACID_Q5_V1_8822B)
6275 #define BIT_SHIFT_QUEUEAC_Q5_V1_8822B 23
6276 #define BIT_MASK_QUEUEAC_Q5_V1_8822B 0x3
6277 #define BIT_QUEUEAC_Q5_V1_8822B(x) \
6278 (((x) & BIT_MASK_QUEUEAC_Q5_V1_8822B) << BIT_SHIFT_QUEUEAC_Q5_V1_8822B)
6279 #define BIT_GET_QUEUEAC_Q5_V1_8822B(x) \
6280 (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8822B) & BIT_MASK_QUEUEAC_Q5_V1_8822B)
6282 #define BIT_TIDEMPTY_Q5_V1_8822B BIT(22)
6284 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8822B 11
6285 #define BIT_MASK_TAIL_PKT_Q5_V2_8822B 0x7ff
6286 #define BIT_TAIL_PKT_Q5_V2_8822B(x) \
6287 (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8822B) \
6288 << BIT_SHIFT_TAIL_PKT_Q5_V2_8822B)
6289 #define BIT_GET_TAIL_PKT_Q5_V2_8822B(x) \
6290 (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8822B) & \
6291 BIT_MASK_TAIL_PKT_Q5_V2_8822B)
6293 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8822B 0
6294 #define BIT_MASK_HEAD_PKT_Q5_V1_8822B 0x7ff
6295 #define BIT_HEAD_PKT_Q5_V1_8822B(x) \
6296 (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8822B) \
6297 << BIT_SHIFT_HEAD_PKT_Q5_V1_8822B)
6298 #define BIT_GET_HEAD_PKT_Q5_V1_8822B(x) \
6299 (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8822B) & \
6300 BIT_MASK_HEAD_PKT_Q5_V1_8822B)
6302 /* 2 REG_Q6_INFO_8822B */
6304 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8822B 25
6305 #define BIT_MASK_QUEUEMACID_Q6_V1_8822B 0x7f
6306 #define BIT_QUEUEMACID_Q6_V1_8822B(x) \
6307 (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8822B) \
6308 << BIT_SHIFT_QUEUEMACID_Q6_V1_8822B)
6309 #define BIT_GET_QUEUEMACID_Q6_V1_8822B(x) \
6310 (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8822B) & \
6311 BIT_MASK_QUEUEMACID_Q6_V1_8822B)
6313 #define BIT_SHIFT_QUEUEAC_Q6_V1_8822B 23
6314 #define BIT_MASK_QUEUEAC_Q6_V1_8822B 0x3
6315 #define BIT_QUEUEAC_Q6_V1_8822B(x) \
6316 (((x) & BIT_MASK_QUEUEAC_Q6_V1_8822B) << BIT_SHIFT_QUEUEAC_Q6_V1_8822B)
6317 #define BIT_GET_QUEUEAC_Q6_V1_8822B(x) \
6318 (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8822B) & BIT_MASK_QUEUEAC_Q6_V1_8822B)
6320 #define BIT_TIDEMPTY_Q6_V1_8822B BIT(22)
6322 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8822B 11
6323 #define BIT_MASK_TAIL_PKT_Q6_V2_8822B 0x7ff
6324 #define BIT_TAIL_PKT_Q6_V2_8822B(x) \
6325 (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8822B) \
6326 << BIT_SHIFT_TAIL_PKT_Q6_V2_8822B)
6327 #define BIT_GET_TAIL_PKT_Q6_V2_8822B(x) \
6328 (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8822B) & \
6329 BIT_MASK_TAIL_PKT_Q6_V2_8822B)
6331 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8822B 0
6332 #define BIT_MASK_HEAD_PKT_Q6_V1_8822B 0x7ff
6333 #define BIT_HEAD_PKT_Q6_V1_8822B(x) \
6334 (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8822B) \
6335 << BIT_SHIFT_HEAD_PKT_Q6_V1_8822B)
6336 #define BIT_GET_HEAD_PKT_Q6_V1_8822B(x) \
6337 (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8822B) & \
6338 BIT_MASK_HEAD_PKT_Q6_V1_8822B)
6340 /* 2 REG_Q7_INFO_8822B */
6342 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8822B 25
6343 #define BIT_MASK_QUEUEMACID_Q7_V1_8822B 0x7f
6344 #define BIT_QUEUEMACID_Q7_V1_8822B(x) \
6345 (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8822B) \
6346 << BIT_SHIFT_QUEUEMACID_Q7_V1_8822B)
6347 #define BIT_GET_QUEUEMACID_Q7_V1_8822B(x) \
6348 (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8822B) & \
6349 BIT_MASK_QUEUEMACID_Q7_V1_8822B)
6351 #define BIT_SHIFT_QUEUEAC_Q7_V1_8822B 23
6352 #define BIT_MASK_QUEUEAC_Q7_V1_8822B 0x3
6353 #define BIT_QUEUEAC_Q7_V1_8822B(x) \
6354 (((x) & BIT_MASK_QUEUEAC_Q7_V1_8822B) << BIT_SHIFT_QUEUEAC_Q7_V1_8822B)
6355 #define BIT_GET_QUEUEAC_Q7_V1_8822B(x) \
6356 (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8822B) & BIT_MASK_QUEUEAC_Q7_V1_8822B)
6358 #define BIT_TIDEMPTY_Q7_V1_8822B BIT(22)
6360 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8822B 11
6361 #define BIT_MASK_TAIL_PKT_Q7_V2_8822B 0x7ff
6362 #define BIT_TAIL_PKT_Q7_V2_8822B(x) \
6363 (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8822B) \
6364 << BIT_SHIFT_TAIL_PKT_Q7_V2_8822B)
6365 #define BIT_GET_TAIL_PKT_Q7_V2_8822B(x) \
6366 (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8822B) & \
6367 BIT_MASK_TAIL_PKT_Q7_V2_8822B)
6369 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8822B 0
6370 #define BIT_MASK_HEAD_PKT_Q7_V1_8822B 0x7ff
6371 #define BIT_HEAD_PKT_Q7_V1_8822B(x) \
6372 (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8822B) \
6373 << BIT_SHIFT_HEAD_PKT_Q7_V1_8822B)
6374 #define BIT_GET_HEAD_PKT_Q7_V1_8822B(x) \
6375 (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8822B) & \
6376 BIT_MASK_HEAD_PKT_Q7_V1_8822B)
6378 /* 2 REG_WMAC_LBK_BUF_HD_V1_8822B */
6380 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B 0
6381 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B 0xfff
6382 #define BIT_WMAC_LBK_BUF_HEAD_V1_8822B(x) \
6383 (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B) \
6384 << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B)
6385 #define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8822B(x) \
6386 (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B) & \
6387 BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B)
6389 /* 2 REG_MGQ_BDNY_V1_8822B */
6391 #define BIT_SHIFT_MGQ_PGBNDY_V1_8822B 0
6392 #define BIT_MASK_MGQ_PGBNDY_V1_8822B 0xfff
6393 #define BIT_MGQ_PGBNDY_V1_8822B(x) \
6394 (((x) & BIT_MASK_MGQ_PGBNDY_V1_8822B) << BIT_SHIFT_MGQ_PGBNDY_V1_8822B)
6395 #define BIT_GET_MGQ_PGBNDY_V1_8822B(x) \
6396 (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8822B) & BIT_MASK_MGQ_PGBNDY_V1_8822B)
6398 /* 2 REG_TXRPT_CTRL_8822B */
6400 #define BIT_SHIFT_TRXRPT_TIMER_TH_8822B 24
6401 #define BIT_MASK_TRXRPT_TIMER_TH_8822B 0xff
6402 #define BIT_TRXRPT_TIMER_TH_8822B(x) \
6403 (((x) & BIT_MASK_TRXRPT_TIMER_TH_8822B) \
6404 << BIT_SHIFT_TRXRPT_TIMER_TH_8822B)
6405 #define BIT_GET_TRXRPT_TIMER_TH_8822B(x) \
6406 (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8822B) & \
6407 BIT_MASK_TRXRPT_TIMER_TH_8822B)
6409 #define BIT_SHIFT_TRXRPT_LEN_TH_8822B 16
6410 #define BIT_MASK_TRXRPT_LEN_TH_8822B 0xff
6411 #define BIT_TRXRPT_LEN_TH_8822B(x) \
6412 (((x) & BIT_MASK_TRXRPT_LEN_TH_8822B) << BIT_SHIFT_TRXRPT_LEN_TH_8822B)
6413 #define BIT_GET_TRXRPT_LEN_TH_8822B(x) \
6414 (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8822B) & BIT_MASK_TRXRPT_LEN_TH_8822B)
6416 #define BIT_SHIFT_TRXRPT_READ_PTR_8822B 8
6417 #define BIT_MASK_TRXRPT_READ_PTR_8822B 0xff
6418 #define BIT_TRXRPT_READ_PTR_8822B(x) \
6419 (((x) & BIT_MASK_TRXRPT_READ_PTR_8822B) \
6420 << BIT_SHIFT_TRXRPT_READ_PTR_8822B)
6421 #define BIT_GET_TRXRPT_READ_PTR_8822B(x) \
6422 (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8822B) & \
6423 BIT_MASK_TRXRPT_READ_PTR_8822B)
6425 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8822B 0
6426 #define BIT_MASK_TRXRPT_WRITE_PTR_8822B 0xff
6427 #define BIT_TRXRPT_WRITE_PTR_8822B(x) \
6428 (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8822B) \
6429 << BIT_SHIFT_TRXRPT_WRITE_PTR_8822B)
6430 #define BIT_GET_TRXRPT_WRITE_PTR_8822B(x) \
6431 (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8822B) & \
6432 BIT_MASK_TRXRPT_WRITE_PTR_8822B)
6434 /* 2 REG_INIRTS_RATE_SEL_8822B */
6435 #define BIT_LEAG_RTS_BW_DUP_8822B BIT(5)
6437 /* 2 REG_BASIC_CFEND_RATE_8822B */
6439 #define BIT_SHIFT_BASIC_CFEND_RATE_8822B 0
6440 #define BIT_MASK_BASIC_CFEND_RATE_8822B 0x1f
6441 #define BIT_BASIC_CFEND_RATE_8822B(x) \
6442 (((x) & BIT_MASK_BASIC_CFEND_RATE_8822B) \
6443 << BIT_SHIFT_BASIC_CFEND_RATE_8822B)
6444 #define BIT_GET_BASIC_CFEND_RATE_8822B(x) \
6445 (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8822B) & \
6446 BIT_MASK_BASIC_CFEND_RATE_8822B)
6448 /* 2 REG_STBC_CFEND_RATE_8822B */
6450 #define BIT_SHIFT_STBC_CFEND_RATE_8822B 0
6451 #define BIT_MASK_STBC_CFEND_RATE_8822B 0x1f
6452 #define BIT_STBC_CFEND_RATE_8822B(x) \
6453 (((x) & BIT_MASK_STBC_CFEND_RATE_8822B) \
6454 << BIT_SHIFT_STBC_CFEND_RATE_8822B)
6455 #define BIT_GET_STBC_CFEND_RATE_8822B(x) \
6456 (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8822B) & \
6457 BIT_MASK_STBC_CFEND_RATE_8822B)
6459 /* 2 REG_DATA_SC_8822B */
6461 #define BIT_SHIFT_TXSC_40M_8822B 4
6462 #define BIT_MASK_TXSC_40M_8822B 0xf
6463 #define BIT_TXSC_40M_8822B(x) \
6464 (((x) & BIT_MASK_TXSC_40M_8822B) << BIT_SHIFT_TXSC_40M_8822B)
6465 #define BIT_GET_TXSC_40M_8822B(x) \
6466 (((x) >> BIT_SHIFT_TXSC_40M_8822B) & BIT_MASK_TXSC_40M_8822B)
6468 #define BIT_SHIFT_TXSC_20M_8822B 0
6469 #define BIT_MASK_TXSC_20M_8822B 0xf
6470 #define BIT_TXSC_20M_8822B(x) \
6471 (((x) & BIT_MASK_TXSC_20M_8822B) << BIT_SHIFT_TXSC_20M_8822B)
6472 #define BIT_GET_TXSC_20M_8822B(x) \
6473 (((x) >> BIT_SHIFT_TXSC_20M_8822B) & BIT_MASK_TXSC_20M_8822B)
6475 /* 2 REG_MACID_SLEEP3_8822B */
6477 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8822B 0
6478 #define BIT_MASK_MACID127_96_PKTSLEEP_8822B 0xffffffffL
6479 #define BIT_MACID127_96_PKTSLEEP_8822B(x) \
6480 (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8822B) \
6481 << BIT_SHIFT_MACID127_96_PKTSLEEP_8822B)
6482 #define BIT_GET_MACID127_96_PKTSLEEP_8822B(x) \
6483 (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8822B) & \
6484 BIT_MASK_MACID127_96_PKTSLEEP_8822B)
6486 /* 2 REG_MACID_SLEEP1_8822B */
6488 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8822B 0
6489 #define BIT_MASK_MACID63_32_PKTSLEEP_8822B 0xffffffffL
6490 #define BIT_MACID63_32_PKTSLEEP_8822B(x) \
6491 (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8822B) \
6492 << BIT_SHIFT_MACID63_32_PKTSLEEP_8822B)
6493 #define BIT_GET_MACID63_32_PKTSLEEP_8822B(x) \
6494 (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8822B) & \
6495 BIT_MASK_MACID63_32_PKTSLEEP_8822B)
6497 /* 2 REG_ARFR2_V1_8822B */
6499 #define BIT_SHIFT_ARFR2_V1_8822B 0
6500 #define BIT_MASK_ARFR2_V1_8822B 0xffffffffffffffffL
6501 #define BIT_ARFR2_V1_8822B(x) \
6502 (((x) & BIT_MASK_ARFR2_V1_8822B) << BIT_SHIFT_ARFR2_V1_8822B)
6503 #define BIT_GET_ARFR2_V1_8822B(x) \
6504 (((x) >> BIT_SHIFT_ARFR2_V1_8822B) & BIT_MASK_ARFR2_V1_8822B)
6506 /* 2 REG_ARFR3_V1_8822B */
6508 #define BIT_SHIFT_ARFR3_V1_8822B 0
6509 #define BIT_MASK_ARFR3_V1_8822B 0xffffffffffffffffL
6510 #define BIT_ARFR3_V1_8822B(x) \
6511 (((x) & BIT_MASK_ARFR3_V1_8822B) << BIT_SHIFT_ARFR3_V1_8822B)
6512 #define BIT_GET_ARFR3_V1_8822B(x) \
6513 (((x) >> BIT_SHIFT_ARFR3_V1_8822B) & BIT_MASK_ARFR3_V1_8822B)
6515 /* 2 REG_ARFR4_8822B */
6517 #define BIT_SHIFT_ARFR4_8822B 0
6518 #define BIT_MASK_ARFR4_8822B 0xffffffffffffffffL
6519 #define BIT_ARFR4_8822B(x) \
6520 (((x) & BIT_MASK_ARFR4_8822B) << BIT_SHIFT_ARFR4_8822B)
6521 #define BIT_GET_ARFR4_8822B(x) \
6522 (((x) >> BIT_SHIFT_ARFR4_8822B) & BIT_MASK_ARFR4_8822B)
6524 /* 2 REG_ARFR5_8822B */
6526 #define BIT_SHIFT_ARFR5_8822B 0
6527 #define BIT_MASK_ARFR5_8822B 0xffffffffffffffffL
6528 #define BIT_ARFR5_8822B(x) \
6529 (((x) & BIT_MASK_ARFR5_8822B) << BIT_SHIFT_ARFR5_8822B)
6530 #define BIT_GET_ARFR5_8822B(x) \
6531 (((x) >> BIT_SHIFT_ARFR5_8822B) & BIT_MASK_ARFR5_8822B)
6533 /* 2 REG_TXRPT_START_OFFSET_8822B */
6535 #define BIT_SHIFT_MACID_MURATE_OFFSET_8822B 24
6536 #define BIT_MASK_MACID_MURATE_OFFSET_8822B 0xff
6537 #define BIT_MACID_MURATE_OFFSET_8822B(x) \
6538 (((x) & BIT_MASK_MACID_MURATE_OFFSET_8822B) \
6539 << BIT_SHIFT_MACID_MURATE_OFFSET_8822B)
6540 #define BIT_GET_MACID_MURATE_OFFSET_8822B(x) \
6541 (((x) >> BIT_SHIFT_MACID_MURATE_OFFSET_8822B) & \
6542 BIT_MASK_MACID_MURATE_OFFSET_8822B)
6544 #define BIT_RPTFIFO_SIZE_OPT_8822B BIT(16)
6546 #define BIT_SHIFT_MACID_CTRL_OFFSET_8822B 8
6547 #define BIT_MASK_MACID_CTRL_OFFSET_8822B 0xff
6548 #define BIT_MACID_CTRL_OFFSET_8822B(x) \
6549 (((x) & BIT_MASK_MACID_CTRL_OFFSET_8822B) \
6550 << BIT_SHIFT_MACID_CTRL_OFFSET_8822B)
6551 #define BIT_GET_MACID_CTRL_OFFSET_8822B(x) \
6552 (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8822B) & \
6553 BIT_MASK_MACID_CTRL_OFFSET_8822B)
6555 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B 0
6556 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8822B 0xff
6557 #define BIT_AMPDU_TXRPT_OFFSET_8822B(x) \
6558 (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8822B) \
6559 << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B)
6560 #define BIT_GET_AMPDU_TXRPT_OFFSET_8822B(x) \
6561 (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B) & \
6562 BIT_MASK_AMPDU_TXRPT_OFFSET_8822B)
6564 /* 2 REG_POWER_STAGE1_8822B */
6565 #define BIT_PTA_WL_PRI_MASK_CPU_MGQ_8822B BIT(31)
6566 #define BIT_PTA_WL_PRI_MASK_BCNQ_8822B BIT(30)
6567 #define BIT_PTA_WL_PRI_MASK_HIQ_8822B BIT(29)
6568 #define BIT_PTA_WL_PRI_MASK_MGQ_8822B BIT(28)
6569 #define BIT_PTA_WL_PRI_MASK_BK_8822B BIT(27)
6570 #define BIT_PTA_WL_PRI_MASK_BE_8822B BIT(26)
6571 #define BIT_PTA_WL_PRI_MASK_VI_8822B BIT(25)
6572 #define BIT_PTA_WL_PRI_MASK_VO_8822B BIT(24)
6574 #define BIT_SHIFT_POWER_STAGE1_8822B 0
6575 #define BIT_MASK_POWER_STAGE1_8822B 0xffffff
6576 #define BIT_POWER_STAGE1_8822B(x) \
6577 (((x) & BIT_MASK_POWER_STAGE1_8822B) << BIT_SHIFT_POWER_STAGE1_8822B)
6578 #define BIT_GET_POWER_STAGE1_8822B(x) \
6579 (((x) >> BIT_SHIFT_POWER_STAGE1_8822B) & BIT_MASK_POWER_STAGE1_8822B)
6581 /* 2 REG_POWER_STAGE2_8822B */
6582 #define BIT__R_CTRL_PKT_POW_ADJ_8822B BIT(24)
6584 #define BIT_SHIFT_POWER_STAGE2_8822B 0
6585 #define BIT_MASK_POWER_STAGE2_8822B 0xffffff
6586 #define BIT_POWER_STAGE2_8822B(x) \
6587 (((x) & BIT_MASK_POWER_STAGE2_8822B) << BIT_SHIFT_POWER_STAGE2_8822B)
6588 #define BIT_GET_POWER_STAGE2_8822B(x) \
6589 (((x) >> BIT_SHIFT_POWER_STAGE2_8822B) & BIT_MASK_POWER_STAGE2_8822B)
6591 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8822B */
6593 #define BIT_SHIFT_PAD_NUM_THRES_8822B 24
6594 #define BIT_MASK_PAD_NUM_THRES_8822B 0x3f
6595 #define BIT_PAD_NUM_THRES_8822B(x) \
6596 (((x) & BIT_MASK_PAD_NUM_THRES_8822B) << BIT_SHIFT_PAD_NUM_THRES_8822B)
6597 #define BIT_GET_PAD_NUM_THRES_8822B(x) \
6598 (((x) >> BIT_SHIFT_PAD_NUM_THRES_8822B) & BIT_MASK_PAD_NUM_THRES_8822B)
6600 #define BIT_R_DMA_THIS_QUEUE_BK_8822B BIT(23)
6601 #define BIT_R_DMA_THIS_QUEUE_BE_8822B BIT(22)
6602 #define BIT_R_DMA_THIS_QUEUE_VI_8822B BIT(21)
6603 #define BIT_R_DMA_THIS_QUEUE_VO_8822B BIT(20)
6605 #define BIT_SHIFT_R_TOTAL_LEN_TH_8822B 8
6606 #define BIT_MASK_R_TOTAL_LEN_TH_8822B 0xfff
6607 #define BIT_R_TOTAL_LEN_TH_8822B(x) \
6608 (((x) & BIT_MASK_R_TOTAL_LEN_TH_8822B) \
6609 << BIT_SHIFT_R_TOTAL_LEN_TH_8822B)
6610 #define BIT_GET_R_TOTAL_LEN_TH_8822B(x) \
6611 (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8822B) & \
6612 BIT_MASK_R_TOTAL_LEN_TH_8822B)
6614 #define BIT_EN_NEW_EARLY_8822B BIT(7)
6615 #define BIT_PRE_TX_CMD_8822B BIT(6)
6617 #define BIT_SHIFT_NUM_SCL_EN_8822B 4
6618 #define BIT_MASK_NUM_SCL_EN_8822B 0x3
6619 #define BIT_NUM_SCL_EN_8822B(x) \
6620 (((x) & BIT_MASK_NUM_SCL_EN_8822B) << BIT_SHIFT_NUM_SCL_EN_8822B)
6621 #define BIT_GET_NUM_SCL_EN_8822B(x) \
6622 (((x) >> BIT_SHIFT_NUM_SCL_EN_8822B) & BIT_MASK_NUM_SCL_EN_8822B)
6624 #define BIT_BK_EN_8822B BIT(3)
6625 #define BIT_BE_EN_8822B BIT(2)
6626 #define BIT_VI_EN_8822B BIT(1)
6627 #define BIT_VO_EN_8822B BIT(0)
6629 /* 2 REG_PKT_LIFE_TIME_8822B */
6631 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8822B 16
6632 #define BIT_MASK_PKT_LIFTIME_BEBK_8822B 0xffff
6633 #define BIT_PKT_LIFTIME_BEBK_8822B(x) \
6634 (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8822B) \
6635 << BIT_SHIFT_PKT_LIFTIME_BEBK_8822B)
6636 #define BIT_GET_PKT_LIFTIME_BEBK_8822B(x) \
6637 (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8822B) & \
6638 BIT_MASK_PKT_LIFTIME_BEBK_8822B)
6640 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8822B 0
6641 #define BIT_MASK_PKT_LIFTIME_VOVI_8822B 0xffff
6642 #define BIT_PKT_LIFTIME_VOVI_8822B(x) \
6643 (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8822B) \
6644 << BIT_SHIFT_PKT_LIFTIME_VOVI_8822B)
6645 #define BIT_GET_PKT_LIFTIME_VOVI_8822B(x) \
6646 (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8822B) & \
6647 BIT_MASK_PKT_LIFTIME_VOVI_8822B)
6649 /* 2 REG_STBC_SETTING_8822B */
6651 #define BIT_SHIFT_CDEND_TXTIME_L_8822B 4
6652 #define BIT_MASK_CDEND_TXTIME_L_8822B 0xf
6653 #define BIT_CDEND_TXTIME_L_8822B(x) \
6654 (((x) & BIT_MASK_CDEND_TXTIME_L_8822B) \
6655 << BIT_SHIFT_CDEND_TXTIME_L_8822B)
6656 #define BIT_GET_CDEND_TXTIME_L_8822B(x) \
6657 (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8822B) & \
6658 BIT_MASK_CDEND_TXTIME_L_8822B)
6660 #define BIT_SHIFT_NESS_8822B 2
6661 #define BIT_MASK_NESS_8822B 0x3
6662 #define BIT_NESS_8822B(x) (((x) & BIT_MASK_NESS_8822B) << BIT_SHIFT_NESS_8822B)
6663 #define BIT_GET_NESS_8822B(x) \
6664 (((x) >> BIT_SHIFT_NESS_8822B) & BIT_MASK_NESS_8822B)
6666 #define BIT_SHIFT_STBC_CFEND_8822B 0
6667 #define BIT_MASK_STBC_CFEND_8822B 0x3
6668 #define BIT_STBC_CFEND_8822B(x) \
6669 (((x) & BIT_MASK_STBC_CFEND_8822B) << BIT_SHIFT_STBC_CFEND_8822B)
6670 #define BIT_GET_STBC_CFEND_8822B(x) \
6671 (((x) >> BIT_SHIFT_STBC_CFEND_8822B) & BIT_MASK_STBC_CFEND_8822B)
6673 /* 2 REG_STBC_SETTING2_8822B */
6675 #define BIT_SHIFT_CDEND_TXTIME_H_8822B 0
6676 #define BIT_MASK_CDEND_TXTIME_H_8822B 0x1f
6677 #define BIT_CDEND_TXTIME_H_8822B(x) \
6678 (((x) & BIT_MASK_CDEND_TXTIME_H_8822B) \
6679 << BIT_SHIFT_CDEND_TXTIME_H_8822B)
6680 #define BIT_GET_CDEND_TXTIME_H_8822B(x) \
6681 (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8822B) & \
6682 BIT_MASK_CDEND_TXTIME_H_8822B)
6684 /* 2 REG_QUEUE_CTRL_8822B */
6685 #define BIT_PTA_EDCCA_EN_8822B BIT(5)
6686 #define BIT_PTA_WL_TX_EN_8822B BIT(4)
6687 #define BIT_R_USE_DATA_BW_8822B BIT(3)
6688 #define BIT_TRI_PKT_INT_MODE1_8822B BIT(2)
6689 #define BIT_TRI_PKT_INT_MODE0_8822B BIT(1)
6690 #define BIT_ACQ_MODE_SEL_8822B BIT(0)
6692 /* 2 REG_SINGLE_AMPDU_CTRL_8822B */
6693 #define BIT_EN_SINGLE_APMDU_8822B BIT(7)
6695 /* 2 REG_PROT_MODE_CTRL_8822B */
6697 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8822B 24
6698 #define BIT_MASK_RTS_MAX_AGG_NUM_8822B 0x3f
6699 #define BIT_RTS_MAX_AGG_NUM_8822B(x) \
6700 (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8822B) \
6701 << BIT_SHIFT_RTS_MAX_AGG_NUM_8822B)
6702 #define BIT_GET_RTS_MAX_AGG_NUM_8822B(x) \
6703 (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8822B) & \
6704 BIT_MASK_RTS_MAX_AGG_NUM_8822B)
6706 #define BIT_SHIFT_MAX_AGG_NUM_8822B 16
6707 #define BIT_MASK_MAX_AGG_NUM_8822B 0x3f
6708 #define BIT_MAX_AGG_NUM_8822B(x) \
6709 (((x) & BIT_MASK_MAX_AGG_NUM_8822B) << BIT_SHIFT_MAX_AGG_NUM_8822B)
6710 #define BIT_GET_MAX_AGG_NUM_8822B(x) \
6711 (((x) >> BIT_SHIFT_MAX_AGG_NUM_8822B) & BIT_MASK_MAX_AGG_NUM_8822B)
6713 #define BIT_SHIFT_RTS_TXTIME_TH_8822B 8
6714 #define BIT_MASK_RTS_TXTIME_TH_8822B 0xff
6715 #define BIT_RTS_TXTIME_TH_8822B(x) \
6716 (((x) & BIT_MASK_RTS_TXTIME_TH_8822B) << BIT_SHIFT_RTS_TXTIME_TH_8822B)
6717 #define BIT_GET_RTS_TXTIME_TH_8822B(x) \
6718 (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8822B) & BIT_MASK_RTS_TXTIME_TH_8822B)
6720 #define BIT_SHIFT_RTS_LEN_TH_8822B 0
6721 #define BIT_MASK_RTS_LEN_TH_8822B 0xff
6722 #define BIT_RTS_LEN_TH_8822B(x) \
6723 (((x) & BIT_MASK_RTS_LEN_TH_8822B) << BIT_SHIFT_RTS_LEN_TH_8822B)
6724 #define BIT_GET_RTS_LEN_TH_8822B(x) \
6725 (((x) >> BIT_SHIFT_RTS_LEN_TH_8822B) & BIT_MASK_RTS_LEN_TH_8822B)
6727 /* 2 REG_BAR_MODE_CTRL_8822B */
6729 #define BIT_SHIFT_BAR_RTY_LMT_8822B 16
6730 #define BIT_MASK_BAR_RTY_LMT_8822B 0x3
6731 #define BIT_BAR_RTY_LMT_8822B(x) \
6732 (((x) & BIT_MASK_BAR_RTY_LMT_8822B) << BIT_SHIFT_BAR_RTY_LMT_8822B)
6733 #define BIT_GET_BAR_RTY_LMT_8822B(x) \
6734 (((x) >> BIT_SHIFT_BAR_RTY_LMT_8822B) & BIT_MASK_BAR_RTY_LMT_8822B)
6736 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B 8
6737 #define BIT_MASK_BAR_PKT_TXTIME_TH_8822B 0xff
6738 #define BIT_BAR_PKT_TXTIME_TH_8822B(x) \
6739 (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8822B) \
6740 << BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B)
6741 #define BIT_GET_BAR_PKT_TXTIME_TH_8822B(x) \
6742 (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B) & \
6743 BIT_MASK_BAR_PKT_TXTIME_TH_8822B)
6745 #define BIT_BAR_EN_V1_8822B BIT(6)
6747 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B 0
6748 #define BIT_MASK_BAR_PKTNUM_TH_V1_8822B 0x3f
6749 #define BIT_BAR_PKTNUM_TH_V1_8822B(x) \
6750 (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8822B) \
6751 << BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B)
6752 #define BIT_GET_BAR_PKTNUM_TH_V1_8822B(x) \
6753 (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B) & \
6754 BIT_MASK_BAR_PKTNUM_TH_V1_8822B)
6756 /* 2 REG_RA_TRY_RATE_AGG_LMT_8822B */
6758 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B 0
6759 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B 0x3f
6760 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8822B(x) \
6761 (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B) \
6762 << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B)
6763 #define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8822B(x) \
6764 (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B) & \
6765 BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B)
6767 /* 2 REG_MACID_SLEEP2_8822B */
6769 #define BIT_SHIFT_MACID95_64PKTSLEEP_8822B 0
6770 #define BIT_MASK_MACID95_64PKTSLEEP_8822B 0xffffffffL
6771 #define BIT_MACID95_64PKTSLEEP_8822B(x) \
6772 (((x) & BIT_MASK_MACID95_64PKTSLEEP_8822B) \
6773 << BIT_SHIFT_MACID95_64PKTSLEEP_8822B)
6774 #define BIT_GET_MACID95_64PKTSLEEP_8822B(x) \
6775 (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8822B) & \
6776 BIT_MASK_MACID95_64PKTSLEEP_8822B)
6778 /* 2 REG_MACID_SLEEP_8822B */
6780 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8822B 0
6781 #define BIT_MASK_MACID31_0_PKTSLEEP_8822B 0xffffffffL
6782 #define BIT_MACID31_0_PKTSLEEP_8822B(x) \
6783 (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8822B) \
6784 << BIT_SHIFT_MACID31_0_PKTSLEEP_8822B)
6785 #define BIT_GET_MACID31_0_PKTSLEEP_8822B(x) \
6786 (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8822B) & \
6787 BIT_MASK_MACID31_0_PKTSLEEP_8822B)
6789 /* 2 REG_HW_SEQ0_8822B */
6791 #define BIT_SHIFT_HW_SSN_SEQ0_8822B 0
6792 #define BIT_MASK_HW_SSN_SEQ0_8822B 0xfff
6793 #define BIT_HW_SSN_SEQ0_8822B(x) \
6794 (((x) & BIT_MASK_HW_SSN_SEQ0_8822B) << BIT_SHIFT_HW_SSN_SEQ0_8822B)
6795 #define BIT_GET_HW_SSN_SEQ0_8822B(x) \
6796 (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8822B) & BIT_MASK_HW_SSN_SEQ0_8822B)
6798 /* 2 REG_HW_SEQ1_8822B */
6800 #define BIT_SHIFT_HW_SSN_SEQ1_8822B 0
6801 #define BIT_MASK_HW_SSN_SEQ1_8822B 0xfff
6802 #define BIT_HW_SSN_SEQ1_8822B(x) \
6803 (((x) & BIT_MASK_HW_SSN_SEQ1_8822B) << BIT_SHIFT_HW_SSN_SEQ1_8822B)
6804 #define BIT_GET_HW_SSN_SEQ1_8822B(x) \
6805 (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8822B) & BIT_MASK_HW_SSN_SEQ1_8822B)
6807 /* 2 REG_HW_SEQ2_8822B */
6809 #define BIT_SHIFT_HW_SSN_SEQ2_8822B 0
6810 #define BIT_MASK_HW_SSN_SEQ2_8822B 0xfff
6811 #define BIT_HW_SSN_SEQ2_8822B(x) \
6812 (((x) & BIT_MASK_HW_SSN_SEQ2_8822B) << BIT_SHIFT_HW_SSN_SEQ2_8822B)
6813 #define BIT_GET_HW_SSN_SEQ2_8822B(x) \
6814 (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8822B) & BIT_MASK_HW_SSN_SEQ2_8822B)
6816 /* 2 REG_HW_SEQ3_8822B */
6818 #define BIT_SHIFT_HW_SSN_SEQ3_8822B 0
6819 #define BIT_MASK_HW_SSN_SEQ3_8822B 0xfff
6820 #define BIT_HW_SSN_SEQ3_8822B(x) \
6821 (((x) & BIT_MASK_HW_SSN_SEQ3_8822B) << BIT_SHIFT_HW_SSN_SEQ3_8822B)
6822 #define BIT_GET_HW_SSN_SEQ3_8822B(x) \
6823 (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8822B) & BIT_MASK_HW_SSN_SEQ3_8822B)
6825 /* 2 REG_NULL_PKT_STATUS_V1_8822B */
6827 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B 2
6828 #define BIT_MASK_PTCL_TOTAL_PG_V2_8822B 0x3fff
6829 #define BIT_PTCL_TOTAL_PG_V2_8822B(x) \
6830 (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8822B) \
6831 << BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B)
6832 #define BIT_GET_PTCL_TOTAL_PG_V2_8822B(x) \
6833 (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B) & \
6834 BIT_MASK_PTCL_TOTAL_PG_V2_8822B)
6836 #define BIT_TX_NULL_1_8822B BIT(1)
6837 #define BIT_TX_NULL_0_8822B BIT(0)
6839 /* 2 REG_PTCL_ERR_STATUS_8822B */
6840 #define BIT_PTCL_RATE_TABLE_INVALID_8822B BIT(7)
6841 #define BIT_FTM_T2R_ERROR_8822B BIT(6)
6842 #define BIT_PTCL_ERR0_8822B BIT(5)
6843 #define BIT_PTCL_ERR1_8822B BIT(4)
6844 #define BIT_PTCL_ERR2_8822B BIT(3)
6845 #define BIT_PTCL_ERR3_8822B BIT(2)
6846 #define BIT_PTCL_ERR4_8822B BIT(1)
6847 #define BIT_PTCL_ERR5_8822B BIT(0)
6849 /* 2 REG_NULL_PKT_STATUS_EXTEND_8822B */
6850 #define BIT_CLI3_TX_NULL_1_8822B BIT(7)
6851 #define BIT_CLI3_TX_NULL_0_8822B BIT(6)
6852 #define BIT_CLI2_TX_NULL_1_8822B BIT(5)
6853 #define BIT_CLI2_TX_NULL_0_8822B BIT(4)
6854 #define BIT_CLI1_TX_NULL_1_8822B BIT(3)
6855 #define BIT_CLI1_TX_NULL_0_8822B BIT(2)
6856 #define BIT_CLI0_TX_NULL_1_8822B BIT(1)
6857 #define BIT_CLI0_TX_NULL_0_8822B BIT(0)
6859 /* 2 REG_VIDEO_ENHANCEMENT_FUN_8822B */
6860 #define BIT_VIDEO_JUST_DROP_8822B BIT(1)
6861 #define BIT_VIDEO_ENHANCEMENT_FUN_EN_8822B BIT(0)
6863 /* 2 REG_BT_POLLUTE_PKT_CNT_8822B */
6865 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B 0
6866 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8822B 0xffff
6867 #define BIT_BT_POLLUTE_PKT_CNT_8822B(x) \
6868 (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8822B) \
6869 << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B)
6870 #define BIT_GET_BT_POLLUTE_PKT_CNT_8822B(x) \
6871 (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B) & \
6872 BIT_MASK_BT_POLLUTE_PKT_CNT_8822B)
6874 /* 2 REG_NOT_VALID_8822B */
6876 /* 2 REG_PTCL_DBG_8822B */
6878 #define BIT_SHIFT_PTCL_DBG_8822B 0
6879 #define BIT_MASK_PTCL_DBG_8822B 0xffffffffL
6880 #define BIT_PTCL_DBG_8822B(x) \
6881 (((x) & BIT_MASK_PTCL_DBG_8822B) << BIT_SHIFT_PTCL_DBG_8822B)
6882 #define BIT_GET_PTCL_DBG_8822B(x) \
6883 (((x) >> BIT_SHIFT_PTCL_DBG_8822B) & BIT_MASK_PTCL_DBG_8822B)
6885 /* 2 REG_NOT_VALID_8822B */
6887 /* 2 REG_CPUMGQ_TIMER_CTRL2_8822B */
6889 #define BIT_SHIFT_TRI_HEAD_ADDR_8822B 16
6890 #define BIT_MASK_TRI_HEAD_ADDR_8822B 0xfff
6891 #define BIT_TRI_HEAD_ADDR_8822B(x) \
6892 (((x) & BIT_MASK_TRI_HEAD_ADDR_8822B) << BIT_SHIFT_TRI_HEAD_ADDR_8822B)
6893 #define BIT_GET_TRI_HEAD_ADDR_8822B(x) \
6894 (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8822B) & BIT_MASK_TRI_HEAD_ADDR_8822B)
6896 #define BIT_DROP_TH_EN_8822B BIT(8)
6898 #define BIT_SHIFT_DROP_TH_8822B 0
6899 #define BIT_MASK_DROP_TH_8822B 0xff
6900 #define BIT_DROP_TH_8822B(x) \
6901 (((x) & BIT_MASK_DROP_TH_8822B) << BIT_SHIFT_DROP_TH_8822B)
6902 #define BIT_GET_DROP_TH_8822B(x) \
6903 (((x) >> BIT_SHIFT_DROP_TH_8822B) & BIT_MASK_DROP_TH_8822B)
6905 /* 2 REG_NOT_VALID_8822B */
6907 /* 2 REG_DUMMY_PAGE4_V1_8822B */
6908 #define BIT_BCN_EN_EXTHWSEQ_8822B BIT(1)
6909 #define BIT_BCN_EN_HWSEQ_8822B BIT(0)
6911 /* 2 REG_MOREDATA_8822B */
6912 #define BIT_MOREDATA_CTRL2_EN_V1_8822B BIT(3)
6913 #define BIT_MOREDATA_CTRL1_EN_V1_8822B BIT(2)
6914 #define BIT_PKTIN_MOREDATA_REPLACE_ENABLE_V1_8822B BIT(0)
6916 /* 2 REG_NOT_VALID_8822B */
6918 /* 2 REG_Q0_Q1_INFO_8822B */
6919 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
6921 #define BIT_SHIFT_GTAB_ID_8822B 28
6922 #define BIT_MASK_GTAB_ID_8822B 0x7
6923 #define BIT_GTAB_ID_8822B(x) \
6924 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
6925 #define BIT_GET_GTAB_ID_8822B(x) \
6926 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
6928 #define BIT_SHIFT_AC1_PKT_INFO_8822B 16
6929 #define BIT_MASK_AC1_PKT_INFO_8822B 0xfff
6930 #define BIT_AC1_PKT_INFO_8822B(x) \
6931 (((x) & BIT_MASK_AC1_PKT_INFO_8822B) << BIT_SHIFT_AC1_PKT_INFO_8822B)
6932 #define BIT_GET_AC1_PKT_INFO_8822B(x) \
6933 (((x) >> BIT_SHIFT_AC1_PKT_INFO_8822B) & BIT_MASK_AC1_PKT_INFO_8822B)
6935 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
6937 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
6938 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
6939 #define BIT_GTAB_ID_V1_8822B(x) \
6940 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
6941 #define BIT_GET_GTAB_ID_V1_8822B(x) \
6942 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
6944 #define BIT_SHIFT_AC0_PKT_INFO_8822B 0
6945 #define BIT_MASK_AC0_PKT_INFO_8822B 0xfff
6946 #define BIT_AC0_PKT_INFO_8822B(x) \
6947 (((x) & BIT_MASK_AC0_PKT_INFO_8822B) << BIT_SHIFT_AC0_PKT_INFO_8822B)
6948 #define BIT_GET_AC0_PKT_INFO_8822B(x) \
6949 (((x) >> BIT_SHIFT_AC0_PKT_INFO_8822B) & BIT_MASK_AC0_PKT_INFO_8822B)
6951 /* 2 REG_Q2_Q3_INFO_8822B */
6952 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
6954 #define BIT_SHIFT_GTAB_ID_8822B 28
6955 #define BIT_MASK_GTAB_ID_8822B 0x7
6956 #define BIT_GTAB_ID_8822B(x) \
6957 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
6958 #define BIT_GET_GTAB_ID_8822B(x) \
6959 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
6961 #define BIT_SHIFT_AC3_PKT_INFO_8822B 16
6962 #define BIT_MASK_AC3_PKT_INFO_8822B 0xfff
6963 #define BIT_AC3_PKT_INFO_8822B(x) \
6964 (((x) & BIT_MASK_AC3_PKT_INFO_8822B) << BIT_SHIFT_AC3_PKT_INFO_8822B)
6965 #define BIT_GET_AC3_PKT_INFO_8822B(x) \
6966 (((x) >> BIT_SHIFT_AC3_PKT_INFO_8822B) & BIT_MASK_AC3_PKT_INFO_8822B)
6968 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
6970 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
6971 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
6972 #define BIT_GTAB_ID_V1_8822B(x) \
6973 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
6974 #define BIT_GET_GTAB_ID_V1_8822B(x) \
6975 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
6977 #define BIT_SHIFT_AC2_PKT_INFO_8822B 0
6978 #define BIT_MASK_AC2_PKT_INFO_8822B 0xfff
6979 #define BIT_AC2_PKT_INFO_8822B(x) \
6980 (((x) & BIT_MASK_AC2_PKT_INFO_8822B) << BIT_SHIFT_AC2_PKT_INFO_8822B)
6981 #define BIT_GET_AC2_PKT_INFO_8822B(x) \
6982 (((x) >> BIT_SHIFT_AC2_PKT_INFO_8822B) & BIT_MASK_AC2_PKT_INFO_8822B)
6984 /* 2 REG_Q4_Q5_INFO_8822B */
6985 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
6987 #define BIT_SHIFT_GTAB_ID_8822B 28
6988 #define BIT_MASK_GTAB_ID_8822B 0x7
6989 #define BIT_GTAB_ID_8822B(x) \
6990 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
6991 #define BIT_GET_GTAB_ID_8822B(x) \
6992 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
6994 #define BIT_SHIFT_AC5_PKT_INFO_8822B 16
6995 #define BIT_MASK_AC5_PKT_INFO_8822B 0xfff
6996 #define BIT_AC5_PKT_INFO_8822B(x) \
6997 (((x) & BIT_MASK_AC5_PKT_INFO_8822B) << BIT_SHIFT_AC5_PKT_INFO_8822B)
6998 #define BIT_GET_AC5_PKT_INFO_8822B(x) \
6999 (((x) >> BIT_SHIFT_AC5_PKT_INFO_8822B) & BIT_MASK_AC5_PKT_INFO_8822B)
7001 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
7003 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
7004 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
7005 #define BIT_GTAB_ID_V1_8822B(x) \
7006 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
7007 #define BIT_GET_GTAB_ID_V1_8822B(x) \
7008 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
7010 #define BIT_SHIFT_AC4_PKT_INFO_8822B 0
7011 #define BIT_MASK_AC4_PKT_INFO_8822B 0xfff
7012 #define BIT_AC4_PKT_INFO_8822B(x) \
7013 (((x) & BIT_MASK_AC4_PKT_INFO_8822B) << BIT_SHIFT_AC4_PKT_INFO_8822B)
7014 #define BIT_GET_AC4_PKT_INFO_8822B(x) \
7015 (((x) >> BIT_SHIFT_AC4_PKT_INFO_8822B) & BIT_MASK_AC4_PKT_INFO_8822B)
7017 /* 2 REG_Q6_Q7_INFO_8822B */
7018 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
7020 #define BIT_SHIFT_GTAB_ID_8822B 28
7021 #define BIT_MASK_GTAB_ID_8822B 0x7
7022 #define BIT_GTAB_ID_8822B(x) \
7023 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
7024 #define BIT_GET_GTAB_ID_8822B(x) \
7025 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
7027 #define BIT_SHIFT_AC7_PKT_INFO_8822B 16
7028 #define BIT_MASK_AC7_PKT_INFO_8822B 0xfff
7029 #define BIT_AC7_PKT_INFO_8822B(x) \
7030 (((x) & BIT_MASK_AC7_PKT_INFO_8822B) << BIT_SHIFT_AC7_PKT_INFO_8822B)
7031 #define BIT_GET_AC7_PKT_INFO_8822B(x) \
7032 (((x) >> BIT_SHIFT_AC7_PKT_INFO_8822B) & BIT_MASK_AC7_PKT_INFO_8822B)
7034 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
7036 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
7037 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
7038 #define BIT_GTAB_ID_V1_8822B(x) \
7039 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
7040 #define BIT_GET_GTAB_ID_V1_8822B(x) \
7041 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
7043 #define BIT_SHIFT_AC6_PKT_INFO_8822B 0
7044 #define BIT_MASK_AC6_PKT_INFO_8822B 0xfff
7045 #define BIT_AC6_PKT_INFO_8822B(x) \
7046 (((x) & BIT_MASK_AC6_PKT_INFO_8822B) << BIT_SHIFT_AC6_PKT_INFO_8822B)
7047 #define BIT_GET_AC6_PKT_INFO_8822B(x) \
7048 (((x) >> BIT_SHIFT_AC6_PKT_INFO_8822B) & BIT_MASK_AC6_PKT_INFO_8822B)
7050 /* 2 REG_MGQ_HIQ_INFO_8822B */
7052 #define BIT_SHIFT_HIQ_PKT_INFO_8822B 16
7053 #define BIT_MASK_HIQ_PKT_INFO_8822B 0xfff
7054 #define BIT_HIQ_PKT_INFO_8822B(x) \
7055 (((x) & BIT_MASK_HIQ_PKT_INFO_8822B) << BIT_SHIFT_HIQ_PKT_INFO_8822B)
7056 #define BIT_GET_HIQ_PKT_INFO_8822B(x) \
7057 (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8822B) & BIT_MASK_HIQ_PKT_INFO_8822B)
7059 #define BIT_SHIFT_MGQ_PKT_INFO_8822B 0
7060 #define BIT_MASK_MGQ_PKT_INFO_8822B 0xfff
7061 #define BIT_MGQ_PKT_INFO_8822B(x) \
7062 (((x) & BIT_MASK_MGQ_PKT_INFO_8822B) << BIT_SHIFT_MGQ_PKT_INFO_8822B)
7063 #define BIT_GET_MGQ_PKT_INFO_8822B(x) \
7064 (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8822B) & BIT_MASK_MGQ_PKT_INFO_8822B)
7066 /* 2 REG_CMDQ_BCNQ_INFO_8822B */
7068 #define BIT_SHIFT_CMDQ_PKT_INFO_8822B 16
7069 #define BIT_MASK_CMDQ_PKT_INFO_8822B 0xfff
7070 #define BIT_CMDQ_PKT_INFO_8822B(x) \
7071 (((x) & BIT_MASK_CMDQ_PKT_INFO_8822B) << BIT_SHIFT_CMDQ_PKT_INFO_8822B)
7072 #define BIT_GET_CMDQ_PKT_INFO_8822B(x) \
7073 (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8822B) & BIT_MASK_CMDQ_PKT_INFO_8822B)
7075 #define BIT_SHIFT_BCNQ_PKT_INFO_8822B 0
7076 #define BIT_MASK_BCNQ_PKT_INFO_8822B 0xfff
7077 #define BIT_BCNQ_PKT_INFO_8822B(x) \
7078 (((x) & BIT_MASK_BCNQ_PKT_INFO_8822B) << BIT_SHIFT_BCNQ_PKT_INFO_8822B)
7079 #define BIT_GET_BCNQ_PKT_INFO_8822B(x) \
7080 (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8822B) & BIT_MASK_BCNQ_PKT_INFO_8822B)
7082 /* 2 REG_USEREG_SETTING_8822B */
7083 #define BIT_NDPA_USEREG_8822B BIT(21)
7085 #define BIT_SHIFT_RETRY_USEREG_8822B 19
7086 #define BIT_MASK_RETRY_USEREG_8822B 0x3
7087 #define BIT_RETRY_USEREG_8822B(x) \
7088 (((x) & BIT_MASK_RETRY_USEREG_8822B) << BIT_SHIFT_RETRY_USEREG_8822B)
7089 #define BIT_GET_RETRY_USEREG_8822B(x) \
7090 (((x) >> BIT_SHIFT_RETRY_USEREG_8822B) & BIT_MASK_RETRY_USEREG_8822B)
7092 #define BIT_SHIFT_TRYPKT_USEREG_8822B 17
7093 #define BIT_MASK_TRYPKT_USEREG_8822B 0x3
7094 #define BIT_TRYPKT_USEREG_8822B(x) \
7095 (((x) & BIT_MASK_TRYPKT_USEREG_8822B) << BIT_SHIFT_TRYPKT_USEREG_8822B)
7096 #define BIT_GET_TRYPKT_USEREG_8822B(x) \
7097 (((x) >> BIT_SHIFT_TRYPKT_USEREG_8822B) & BIT_MASK_TRYPKT_USEREG_8822B)
7099 #define BIT_CTLPKT_USEREG_8822B BIT(16)
7101 /* 2 REG_AESIV_SETTING_8822B */
7103 #define BIT_SHIFT_AESIV_OFFSET_8822B 0
7104 #define BIT_MASK_AESIV_OFFSET_8822B 0xfff
7105 #define BIT_AESIV_OFFSET_8822B(x) \
7106 (((x) & BIT_MASK_AESIV_OFFSET_8822B) << BIT_SHIFT_AESIV_OFFSET_8822B)
7107 #define BIT_GET_AESIV_OFFSET_8822B(x) \
7108 (((x) >> BIT_SHIFT_AESIV_OFFSET_8822B) & BIT_MASK_AESIV_OFFSET_8822B)
7110 /* 2 REG_BF0_TIME_SETTING_8822B */
7111 #define BIT_BF0_TIMER_SET_8822B BIT(31)
7112 #define BIT_BF0_TIMER_CLR_8822B BIT(30)
7113 #define BIT_BF0_UPDATE_EN_8822B BIT(29)
7114 #define BIT_BF0_TIMER_EN_8822B BIT(28)
7116 #define BIT_SHIFT_BF0_PRETIME_OVER_8822B 16
7117 #define BIT_MASK_BF0_PRETIME_OVER_8822B 0xfff
7118 #define BIT_BF0_PRETIME_OVER_8822B(x) \
7119 (((x) & BIT_MASK_BF0_PRETIME_OVER_8822B) \
7120 << BIT_SHIFT_BF0_PRETIME_OVER_8822B)
7121 #define BIT_GET_BF0_PRETIME_OVER_8822B(x) \
7122 (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8822B) & \
7123 BIT_MASK_BF0_PRETIME_OVER_8822B)
7125 #define BIT_SHIFT_BF0_LIFETIME_8822B 0
7126 #define BIT_MASK_BF0_LIFETIME_8822B 0xffff
7127 #define BIT_BF0_LIFETIME_8822B(x) \
7128 (((x) & BIT_MASK_BF0_LIFETIME_8822B) << BIT_SHIFT_BF0_LIFETIME_8822B)
7129 #define BIT_GET_BF0_LIFETIME_8822B(x) \
7130 (((x) >> BIT_SHIFT_BF0_LIFETIME_8822B) & BIT_MASK_BF0_LIFETIME_8822B)
7132 /* 2 REG_BF1_TIME_SETTING_8822B */
7133 #define BIT_BF1_TIMER_SET_8822B BIT(31)
7134 #define BIT_BF1_TIMER_CLR_8822B BIT(30)
7135 #define BIT_BF1_UPDATE_EN_8822B BIT(29)
7136 #define BIT_BF1_TIMER_EN_8822B BIT(28)
7138 #define BIT_SHIFT_BF1_PRETIME_OVER_8822B 16
7139 #define BIT_MASK_BF1_PRETIME_OVER_8822B 0xfff
7140 #define BIT_BF1_PRETIME_OVER_8822B(x) \
7141 (((x) & BIT_MASK_BF1_PRETIME_OVER_8822B) \
7142 << BIT_SHIFT_BF1_PRETIME_OVER_8822B)
7143 #define BIT_GET_BF1_PRETIME_OVER_8822B(x) \
7144 (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8822B) & \
7145 BIT_MASK_BF1_PRETIME_OVER_8822B)
7147 #define BIT_SHIFT_BF1_LIFETIME_8822B 0
7148 #define BIT_MASK_BF1_LIFETIME_8822B 0xffff
7149 #define BIT_BF1_LIFETIME_8822B(x) \
7150 (((x) & BIT_MASK_BF1_LIFETIME_8822B) << BIT_SHIFT_BF1_LIFETIME_8822B)
7151 #define BIT_GET_BF1_LIFETIME_8822B(x) \
7152 (((x) >> BIT_SHIFT_BF1_LIFETIME_8822B) & BIT_MASK_BF1_LIFETIME_8822B)
7154 /* 2 REG_BF_TIMEOUT_EN_8822B */
7155 #define BIT_EN_VHT_LDPC_8822B BIT(9)
7156 #define BIT_EN_HT_LDPC_8822B BIT(8)
7157 #define BIT_BF1_TIMEOUT_EN_8822B BIT(1)
7158 #define BIT_BF0_TIMEOUT_EN_8822B BIT(0)
7160 /* 2 REG_MACID_RELEASE0_8822B */
7162 #define BIT_SHIFT_MACID31_0_RELEASE_8822B 0
7163 #define BIT_MASK_MACID31_0_RELEASE_8822B 0xffffffffL
7164 #define BIT_MACID31_0_RELEASE_8822B(x) \
7165 (((x) & BIT_MASK_MACID31_0_RELEASE_8822B) \
7166 << BIT_SHIFT_MACID31_0_RELEASE_8822B)
7167 #define BIT_GET_MACID31_0_RELEASE_8822B(x) \
7168 (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8822B) & \
7169 BIT_MASK_MACID31_0_RELEASE_8822B)
7171 /* 2 REG_MACID_RELEASE1_8822B */
7173 #define BIT_SHIFT_MACID63_32_RELEASE_8822B 0
7174 #define BIT_MASK_MACID63_32_RELEASE_8822B 0xffffffffL
7175 #define BIT_MACID63_32_RELEASE_8822B(x) \
7176 (((x) & BIT_MASK_MACID63_32_RELEASE_8822B) \
7177 << BIT_SHIFT_MACID63_32_RELEASE_8822B)
7178 #define BIT_GET_MACID63_32_RELEASE_8822B(x) \
7179 (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8822B) & \
7180 BIT_MASK_MACID63_32_RELEASE_8822B)
7182 /* 2 REG_MACID_RELEASE2_8822B */
7184 #define BIT_SHIFT_MACID95_64_RELEASE_8822B 0
7185 #define BIT_MASK_MACID95_64_RELEASE_8822B 0xffffffffL
7186 #define BIT_MACID95_64_RELEASE_8822B(x) \
7187 (((x) & BIT_MASK_MACID95_64_RELEASE_8822B) \
7188 << BIT_SHIFT_MACID95_64_RELEASE_8822B)
7189 #define BIT_GET_MACID95_64_RELEASE_8822B(x) \
7190 (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8822B) & \
7191 BIT_MASK_MACID95_64_RELEASE_8822B)
7193 /* 2 REG_MACID_RELEASE3_8822B */
7195 #define BIT_SHIFT_MACID127_96_RELEASE_8822B 0
7196 #define BIT_MASK_MACID127_96_RELEASE_8822B 0xffffffffL
7197 #define BIT_MACID127_96_RELEASE_8822B(x) \
7198 (((x) & BIT_MASK_MACID127_96_RELEASE_8822B) \
7199 << BIT_SHIFT_MACID127_96_RELEASE_8822B)
7200 #define BIT_GET_MACID127_96_RELEASE_8822B(x) \
7201 (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8822B) & \
7202 BIT_MASK_MACID127_96_RELEASE_8822B)
7204 /* 2 REG_MACID_RELEASE_SETTING_8822B */
7205 #define BIT_MACID_VALUE_8822B BIT(7)
7207 #define BIT_SHIFT_MACID_OFFSET_8822B 0
7208 #define BIT_MASK_MACID_OFFSET_8822B 0x7f
7209 #define BIT_MACID_OFFSET_8822B(x) \
7210 (((x) & BIT_MASK_MACID_OFFSET_8822B) << BIT_SHIFT_MACID_OFFSET_8822B)
7211 #define BIT_GET_MACID_OFFSET_8822B(x) \
7212 (((x) >> BIT_SHIFT_MACID_OFFSET_8822B) & BIT_MASK_MACID_OFFSET_8822B)
7214 /* 2 REG_FAST_EDCA_VOVI_SETTING_8822B */
7216 #define BIT_SHIFT_VI_FAST_EDCA_TO_8822B 24
7217 #define BIT_MASK_VI_FAST_EDCA_TO_8822B 0xff
7218 #define BIT_VI_FAST_EDCA_TO_8822B(x) \
7219 (((x) & BIT_MASK_VI_FAST_EDCA_TO_8822B) \
7220 << BIT_SHIFT_VI_FAST_EDCA_TO_8822B)
7221 #define BIT_GET_VI_FAST_EDCA_TO_8822B(x) \
7222 (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8822B) & \
7223 BIT_MASK_VI_FAST_EDCA_TO_8822B)
7225 #define BIT_VI_THRESHOLD_SEL_8822B BIT(23)
7227 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B 16
7228 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B 0x7f
7229 #define BIT_VI_FAST_EDCA_PKT_TH_8822B(x) \
7230 (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B) \
7231 << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B)
7232 #define BIT_GET_VI_FAST_EDCA_PKT_TH_8822B(x) \
7233 (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B) & \
7234 BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B)
7236 #define BIT_SHIFT_VO_FAST_EDCA_TO_8822B 8
7237 #define BIT_MASK_VO_FAST_EDCA_TO_8822B 0xff
7238 #define BIT_VO_FAST_EDCA_TO_8822B(x) \
7239 (((x) & BIT_MASK_VO_FAST_EDCA_TO_8822B) \
7240 << BIT_SHIFT_VO_FAST_EDCA_TO_8822B)
7241 #define BIT_GET_VO_FAST_EDCA_TO_8822B(x) \
7242 (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8822B) & \
7243 BIT_MASK_VO_FAST_EDCA_TO_8822B)
7245 #define BIT_VO_THRESHOLD_SEL_8822B BIT(7)
7247 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B 0
7248 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B 0x7f
7249 #define BIT_VO_FAST_EDCA_PKT_TH_8822B(x) \
7250 (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B) \
7251 << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B)
7252 #define BIT_GET_VO_FAST_EDCA_PKT_TH_8822B(x) \
7253 (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B) & \
7254 BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B)
7256 /* 2 REG_FAST_EDCA_BEBK_SETTING_8822B */
7258 #define BIT_SHIFT_BK_FAST_EDCA_TO_8822B 24
7259 #define BIT_MASK_BK_FAST_EDCA_TO_8822B 0xff
7260 #define BIT_BK_FAST_EDCA_TO_8822B(x) \
7261 (((x) & BIT_MASK_BK_FAST_EDCA_TO_8822B) \
7262 << BIT_SHIFT_BK_FAST_EDCA_TO_8822B)
7263 #define BIT_GET_BK_FAST_EDCA_TO_8822B(x) \
7264 (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8822B) & \
7265 BIT_MASK_BK_FAST_EDCA_TO_8822B)
7267 #define BIT_BK_THRESHOLD_SEL_8822B BIT(23)
7269 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B 16
7270 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B 0x7f
7271 #define BIT_BK_FAST_EDCA_PKT_TH_8822B(x) \
7272 (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B) \
7273 << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B)
7274 #define BIT_GET_BK_FAST_EDCA_PKT_TH_8822B(x) \
7275 (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B) & \
7276 BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B)
7278 #define BIT_SHIFT_BE_FAST_EDCA_TO_8822B 8
7279 #define BIT_MASK_BE_FAST_EDCA_TO_8822B 0xff
7280 #define BIT_BE_FAST_EDCA_TO_8822B(x) \
7281 (((x) & BIT_MASK_BE_FAST_EDCA_TO_8822B) \
7282 << BIT_SHIFT_BE_FAST_EDCA_TO_8822B)
7283 #define BIT_GET_BE_FAST_EDCA_TO_8822B(x) \
7284 (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8822B) & \
7285 BIT_MASK_BE_FAST_EDCA_TO_8822B)
7287 #define BIT_BE_THRESHOLD_SEL_8822B BIT(7)
7289 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B 0
7290 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B 0x7f
7291 #define BIT_BE_FAST_EDCA_PKT_TH_8822B(x) \
7292 (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B) \
7293 << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B)
7294 #define BIT_GET_BE_FAST_EDCA_PKT_TH_8822B(x) \
7295 (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B) & \
7296 BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B)
7298 /* 2 REG_MACID_DROP0_8822B */
7300 #define BIT_SHIFT_MACID31_0_DROP_8822B 0
7301 #define BIT_MASK_MACID31_0_DROP_8822B 0xffffffffL
7302 #define BIT_MACID31_0_DROP_8822B(x) \
7303 (((x) & BIT_MASK_MACID31_0_DROP_8822B) \
7304 << BIT_SHIFT_MACID31_0_DROP_8822B)
7305 #define BIT_GET_MACID31_0_DROP_8822B(x) \
7306 (((x) >> BIT_SHIFT_MACID31_0_DROP_8822B) & \
7307 BIT_MASK_MACID31_0_DROP_8822B)
7309 /* 2 REG_MACID_DROP1_8822B */
7311 #define BIT_SHIFT_MACID63_32_DROP_8822B 0
7312 #define BIT_MASK_MACID63_32_DROP_8822B 0xffffffffL
7313 #define BIT_MACID63_32_DROP_8822B(x) \
7314 (((x) & BIT_MASK_MACID63_32_DROP_8822B) \
7315 << BIT_SHIFT_MACID63_32_DROP_8822B)
7316 #define BIT_GET_MACID63_32_DROP_8822B(x) \
7317 (((x) >> BIT_SHIFT_MACID63_32_DROP_8822B) & \
7318 BIT_MASK_MACID63_32_DROP_8822B)
7320 /* 2 REG_MACID_DROP2_8822B */
7322 #define BIT_SHIFT_MACID95_64_DROP_8822B 0
7323 #define BIT_MASK_MACID95_64_DROP_8822B 0xffffffffL
7324 #define BIT_MACID95_64_DROP_8822B(x) \
7325 (((x) & BIT_MASK_MACID95_64_DROP_8822B) \
7326 << BIT_SHIFT_MACID95_64_DROP_8822B)
7327 #define BIT_GET_MACID95_64_DROP_8822B(x) \
7328 (((x) >> BIT_SHIFT_MACID95_64_DROP_8822B) & \
7329 BIT_MASK_MACID95_64_DROP_8822B)
7331 /* 2 REG_MACID_DROP3_8822B */
7333 #define BIT_SHIFT_MACID127_96_DROP_8822B 0
7334 #define BIT_MASK_MACID127_96_DROP_8822B 0xffffffffL
7335 #define BIT_MACID127_96_DROP_8822B(x) \
7336 (((x) & BIT_MASK_MACID127_96_DROP_8822B) \
7337 << BIT_SHIFT_MACID127_96_DROP_8822B)
7338 #define BIT_GET_MACID127_96_DROP_8822B(x) \
7339 (((x) >> BIT_SHIFT_MACID127_96_DROP_8822B) & \
7340 BIT_MASK_MACID127_96_DROP_8822B)
7342 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8822B */
7344 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B 0
7345 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B 0xffffffffL
7346 #define BIT_R_MACID_RELEASE_SUCCESS_0_8822B(x) \
7347 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B) \
7348 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B)
7349 #define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8822B(x) \
7350 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B) & \
7351 BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B)
7353 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8822B */
7355 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B 0
7356 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B 0xffffffffL
7357 #define BIT_R_MACID_RELEASE_SUCCESS_1_8822B(x) \
7358 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B) \
7359 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B)
7360 #define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8822B(x) \
7361 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B) & \
7362 BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B)
7364 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8822B */
7366 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B 0
7367 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B 0xffffffffL
7368 #define BIT_R_MACID_RELEASE_SUCCESS_2_8822B(x) \
7369 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B) \
7370 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B)
7371 #define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8822B(x) \
7372 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B) & \
7373 BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B)
7375 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8822B */
7377 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B 0
7378 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B 0xffffffffL
7379 #define BIT_R_MACID_RELEASE_SUCCESS_3_8822B(x) \
7380 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B) \
7381 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B)
7382 #define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8822B(x) \
7383 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B) & \
7384 BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B)
7386 /* 2 REG_MGG_FIFO_CRTL_8822B */
7387 #define BIT_R_MGG_FIFO_EN_8822B BIT(31)
7389 #define BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B 28
7390 #define BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B 0x7
7391 #define BIT_R_MGG_FIFO_PG_SIZE_8822B(x) \
7392 (((x) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B) \
7393 << BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B)
7394 #define BIT_GET_R_MGG_FIFO_PG_SIZE_8822B(x) \
7395 (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B) & \
7396 BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B)
7398 #define BIT_SHIFT_R_MGG_FIFO_START_PG_8822B 16
7399 #define BIT_MASK_R_MGG_FIFO_START_PG_8822B 0xfff
7400 #define BIT_R_MGG_FIFO_START_PG_8822B(x) \
7401 (((x) & BIT_MASK_R_MGG_FIFO_START_PG_8822B) \
7402 << BIT_SHIFT_R_MGG_FIFO_START_PG_8822B)
7403 #define BIT_GET_R_MGG_FIFO_START_PG_8822B(x) \
7404 (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8822B) & \
7405 BIT_MASK_R_MGG_FIFO_START_PG_8822B)
7407 #define BIT_SHIFT_R_MGG_FIFO_SIZE_8822B 14
7408 #define BIT_MASK_R_MGG_FIFO_SIZE_8822B 0x3
7409 #define BIT_R_MGG_FIFO_SIZE_8822B(x) \
7410 (((x) & BIT_MASK_R_MGG_FIFO_SIZE_8822B) \
7411 << BIT_SHIFT_R_MGG_FIFO_SIZE_8822B)
7412 #define BIT_GET_R_MGG_FIFO_SIZE_8822B(x) \
7413 (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8822B) & \
7414 BIT_MASK_R_MGG_FIFO_SIZE_8822B)
7416 #define BIT_R_MGG_FIFO_PAUSE_8822B BIT(13)
7418 #define BIT_SHIFT_R_MGG_FIFO_RPTR_8822B 8
7419 #define BIT_MASK_R_MGG_FIFO_RPTR_8822B 0x1f
7420 #define BIT_R_MGG_FIFO_RPTR_8822B(x) \
7421 (((x) & BIT_MASK_R_MGG_FIFO_RPTR_8822B) \
7422 << BIT_SHIFT_R_MGG_FIFO_RPTR_8822B)
7423 #define BIT_GET_R_MGG_FIFO_RPTR_8822B(x) \
7424 (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8822B) & \
7425 BIT_MASK_R_MGG_FIFO_RPTR_8822B)
7427 #define BIT_R_MGG_FIFO_OV_8822B BIT(7)
7428 #define BIT_R_MGG_FIFO_WPTR_ERROR_8822B BIT(6)
7429 #define BIT_R_EN_CPU_LIFETIME_8822B BIT(5)
7431 #define BIT_SHIFT_R_MGG_FIFO_WPTR_8822B 0
7432 #define BIT_MASK_R_MGG_FIFO_WPTR_8822B 0x1f
7433 #define BIT_R_MGG_FIFO_WPTR_8822B(x) \
7434 (((x) & BIT_MASK_R_MGG_FIFO_WPTR_8822B) \
7435 << BIT_SHIFT_R_MGG_FIFO_WPTR_8822B)
7436 #define BIT_GET_R_MGG_FIFO_WPTR_8822B(x) \
7437 (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8822B) & \
7438 BIT_MASK_R_MGG_FIFO_WPTR_8822B)
7440 /* 2 REG_MGG_FIFO_INT_8822B */
7442 #define BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B 16
7443 #define BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B 0xffff
7444 #define BIT_R_MGG_FIFO_INT_FLAG_8822B(x) \
7445 (((x) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B) \
7446 << BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B)
7447 #define BIT_GET_R_MGG_FIFO_INT_FLAG_8822B(x) \
7448 (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B) & \
7449 BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B)
7451 #define BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B 0
7452 #define BIT_MASK_R_MGG_FIFO_INT_MASK_8822B 0xffff
7453 #define BIT_R_MGG_FIFO_INT_MASK_8822B(x) \
7454 (((x) & BIT_MASK_R_MGG_FIFO_INT_MASK_8822B) \
7455 << BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B)
7456 #define BIT_GET_R_MGG_FIFO_INT_MASK_8822B(x) \
7457 (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B) & \
7458 BIT_MASK_R_MGG_FIFO_INT_MASK_8822B)
7460 /* 2 REG_MGG_FIFO_LIFETIME_8822B */
7462 #define BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B 16
7463 #define BIT_MASK_R_MGG_FIFO_LIFETIME_8822B 0xffff
7464 #define BIT_R_MGG_FIFO_LIFETIME_8822B(x) \
7465 (((x) & BIT_MASK_R_MGG_FIFO_LIFETIME_8822B) \
7466 << BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B)
7467 #define BIT_GET_R_MGG_FIFO_LIFETIME_8822B(x) \
7468 (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B) & \
7469 BIT_MASK_R_MGG_FIFO_LIFETIME_8822B)
7471 #define BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B 0
7472 #define BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B 0xffff
7473 #define BIT_R_MGG_FIFO_VALID_MAP_8822B(x) \
7474 (((x) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B) \
7475 << BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B)
7476 #define BIT_GET_R_MGG_FIFO_VALID_MAP_8822B(x) \
7477 (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B) & \
7478 BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B)
7480 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B */
7482 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0
7483 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0x7f
7484 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) \
7485 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) \
7486 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
7487 #define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) \
7488 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) & \
7489 BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
7491 /* 2 REG_MACID_SHCUT_OFFSET_8822B */
7493 #define BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B 0
7494 #define BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B 0xff
7495 #define BIT_MACID_SHCUT_OFFSET_V1_8822B(x) \
7496 (((x) & BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B) \
7497 << BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B)
7498 #define BIT_GET_MACID_SHCUT_OFFSET_V1_8822B(x) \
7499 (((x) >> BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B) & \
7500 BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B)
7502 /* 2 REG_MU_TX_CTL_8822B */
7503 #define BIT_R_EN_REVERS_GTAB_8822B BIT(6)
7505 #define BIT_SHIFT_R_MU_TABLE_VALID_8822B 0
7506 #define BIT_MASK_R_MU_TABLE_VALID_8822B 0x3f
7507 #define BIT_R_MU_TABLE_VALID_8822B(x) \
7508 (((x) & BIT_MASK_R_MU_TABLE_VALID_8822B) \
7509 << BIT_SHIFT_R_MU_TABLE_VALID_8822B)
7510 #define BIT_GET_R_MU_TABLE_VALID_8822B(x) \
7511 (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8822B) & \
7512 BIT_MASK_R_MU_TABLE_VALID_8822B)
7514 /* 2 REG_MU_STA_GID_VLD_8822B */
7516 /* 2 REG_NOT_VALID_8822B */
7518 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
7519 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
7520 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) \
7521 (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) \
7522 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
7523 #define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) \
7524 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & \
7525 BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
7527 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
7528 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
7529 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) \
7530 (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) \
7531 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
7532 #define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) \
7533 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & \
7534 BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
7536 /* 2 REG_MU_STA_USER_POS_INFO_8822B */
7538 /* 2 REG_NOT_VALID_8822B */
7540 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
7541 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
7542 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) \
7543 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) \
7544 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
7545 #define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) \
7546 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & \
7547 BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
7549 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
7550 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
7551 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) \
7552 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) \
7553 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
7554 #define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) \
7555 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & \
7556 BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
7558 /* 2 REG_MU_TRX_DBG_CNT_8822B */
7559 #define BIT_MU_DNGCNT_RST_8822B BIT(20)
7561 #define BIT_SHIFT_MU_DBGCNT_SEL_8822B 16
7562 #define BIT_MASK_MU_DBGCNT_SEL_8822B 0xf
7563 #define BIT_MU_DBGCNT_SEL_8822B(x) \
7564 (((x) & BIT_MASK_MU_DBGCNT_SEL_8822B) << BIT_SHIFT_MU_DBGCNT_SEL_8822B)
7565 #define BIT_GET_MU_DBGCNT_SEL_8822B(x) \
7566 (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8822B) & BIT_MASK_MU_DBGCNT_SEL_8822B)
7568 #define BIT_SHIFT_MU_DNGCNT_8822B 0
7569 #define BIT_MASK_MU_DNGCNT_8822B 0xffff
7570 #define BIT_MU_DNGCNT_8822B(x) \
7571 (((x) & BIT_MASK_MU_DNGCNT_8822B) << BIT_SHIFT_MU_DNGCNT_8822B)
7572 #define BIT_GET_MU_DNGCNT_8822B(x) \
7573 (((x) >> BIT_SHIFT_MU_DNGCNT_8822B) & BIT_MASK_MU_DNGCNT_8822B)
7575 /* 2 REG_NOT_VALID_8822B */
7577 /* 2 REG_EDCA_VO_PARAM_8822B */
7579 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7580 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7581 #define BIT_TXOPLIMIT_8822B(x) \
7582 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7583 #define BIT_GET_TXOPLIMIT_8822B(x) \
7584 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7586 #define BIT_SHIFT_CW_8822B 8
7587 #define BIT_MASK_CW_8822B 0xff
7588 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7589 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7591 #define BIT_SHIFT_AIFS_8822B 0
7592 #define BIT_MASK_AIFS_8822B 0xff
7593 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7594 #define BIT_GET_AIFS_8822B(x) \
7595 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7597 /* 2 REG_EDCA_VI_PARAM_8822B */
7599 /* 2 REG_NOT_VALID_8822B */
7601 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7602 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7603 #define BIT_TXOPLIMIT_8822B(x) \
7604 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7605 #define BIT_GET_TXOPLIMIT_8822B(x) \
7606 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7608 #define BIT_SHIFT_CW_8822B 8
7609 #define BIT_MASK_CW_8822B 0xff
7610 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7611 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7613 #define BIT_SHIFT_AIFS_8822B 0
7614 #define BIT_MASK_AIFS_8822B 0xff
7615 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7616 #define BIT_GET_AIFS_8822B(x) \
7617 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7619 /* 2 REG_EDCA_BE_PARAM_8822B */
7621 /* 2 REG_NOT_VALID_8822B */
7623 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7624 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7625 #define BIT_TXOPLIMIT_8822B(x) \
7626 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7627 #define BIT_GET_TXOPLIMIT_8822B(x) \
7628 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7630 #define BIT_SHIFT_CW_8822B 8
7631 #define BIT_MASK_CW_8822B 0xff
7632 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7633 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7635 #define BIT_SHIFT_AIFS_8822B 0
7636 #define BIT_MASK_AIFS_8822B 0xff
7637 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7638 #define BIT_GET_AIFS_8822B(x) \
7639 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7641 /* 2 REG_EDCA_BK_PARAM_8822B */
7643 /* 2 REG_NOT_VALID_8822B */
7645 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7646 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7647 #define BIT_TXOPLIMIT_8822B(x) \
7648 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7649 #define BIT_GET_TXOPLIMIT_8822B(x) \
7650 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7652 #define BIT_SHIFT_CW_8822B 8
7653 #define BIT_MASK_CW_8822B 0xff
7654 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7655 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7657 #define BIT_SHIFT_AIFS_8822B 0
7658 #define BIT_MASK_AIFS_8822B 0xff
7659 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7660 #define BIT_GET_AIFS_8822B(x) \
7661 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7663 /* 2 REG_BCNTCFG_8822B */
7665 #define BIT_SHIFT_BCNCW_MAX_8822B 12
7666 #define BIT_MASK_BCNCW_MAX_8822B 0xf
7667 #define BIT_BCNCW_MAX_8822B(x) \
7668 (((x) & BIT_MASK_BCNCW_MAX_8822B) << BIT_SHIFT_BCNCW_MAX_8822B)
7669 #define BIT_GET_BCNCW_MAX_8822B(x) \
7670 (((x) >> BIT_SHIFT_BCNCW_MAX_8822B) & BIT_MASK_BCNCW_MAX_8822B)
7672 #define BIT_SHIFT_BCNCW_MIN_8822B 8
7673 #define BIT_MASK_BCNCW_MIN_8822B 0xf
7674 #define BIT_BCNCW_MIN_8822B(x) \
7675 (((x) & BIT_MASK_BCNCW_MIN_8822B) << BIT_SHIFT_BCNCW_MIN_8822B)
7676 #define BIT_GET_BCNCW_MIN_8822B(x) \
7677 (((x) >> BIT_SHIFT_BCNCW_MIN_8822B) & BIT_MASK_BCNCW_MIN_8822B)
7679 #define BIT_SHIFT_BCNIFS_8822B 0
7680 #define BIT_MASK_BCNIFS_8822B 0xff
7681 #define BIT_BCNIFS_8822B(x) \
7682 (((x) & BIT_MASK_BCNIFS_8822B) << BIT_SHIFT_BCNIFS_8822B)
7683 #define BIT_GET_BCNIFS_8822B(x) \
7684 (((x) >> BIT_SHIFT_BCNIFS_8822B) & BIT_MASK_BCNIFS_8822B)
7686 /* 2 REG_PIFS_8822B */
7688 #define BIT_SHIFT_PIFS_8822B 0
7689 #define BIT_MASK_PIFS_8822B 0xff
7690 #define BIT_PIFS_8822B(x) (((x) & BIT_MASK_PIFS_8822B) << BIT_SHIFT_PIFS_8822B)
7691 #define BIT_GET_PIFS_8822B(x) \
7692 (((x) >> BIT_SHIFT_PIFS_8822B) & BIT_MASK_PIFS_8822B)
7694 /* 2 REG_RDG_PIFS_8822B */
7696 #define BIT_SHIFT_RDG_PIFS_8822B 0
7697 #define BIT_MASK_RDG_PIFS_8822B 0xff
7698 #define BIT_RDG_PIFS_8822B(x) \
7699 (((x) & BIT_MASK_RDG_PIFS_8822B) << BIT_SHIFT_RDG_PIFS_8822B)
7700 #define BIT_GET_RDG_PIFS_8822B(x) \
7701 (((x) >> BIT_SHIFT_RDG_PIFS_8822B) & BIT_MASK_RDG_PIFS_8822B)
7703 /* 2 REG_SIFS_8822B */
7705 #define BIT_SHIFT_SIFS_OFDM_TRX_8822B 24
7706 #define BIT_MASK_SIFS_OFDM_TRX_8822B 0xff
7707 #define BIT_SIFS_OFDM_TRX_8822B(x) \
7708 (((x) & BIT_MASK_SIFS_OFDM_TRX_8822B) << BIT_SHIFT_SIFS_OFDM_TRX_8822B)
7709 #define BIT_GET_SIFS_OFDM_TRX_8822B(x) \
7710 (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8822B) & BIT_MASK_SIFS_OFDM_TRX_8822B)
7712 #define BIT_SHIFT_SIFS_CCK_TRX_8822B 16
7713 #define BIT_MASK_SIFS_CCK_TRX_8822B 0xff
7714 #define BIT_SIFS_CCK_TRX_8822B(x) \
7715 (((x) & BIT_MASK_SIFS_CCK_TRX_8822B) << BIT_SHIFT_SIFS_CCK_TRX_8822B)
7716 #define BIT_GET_SIFS_CCK_TRX_8822B(x) \
7717 (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8822B) & BIT_MASK_SIFS_CCK_TRX_8822B)
7719 #define BIT_SHIFT_SIFS_OFDM_CTX_8822B 8
7720 #define BIT_MASK_SIFS_OFDM_CTX_8822B 0xff
7721 #define BIT_SIFS_OFDM_CTX_8822B(x) \
7722 (((x) & BIT_MASK_SIFS_OFDM_CTX_8822B) << BIT_SHIFT_SIFS_OFDM_CTX_8822B)
7723 #define BIT_GET_SIFS_OFDM_CTX_8822B(x) \
7724 (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8822B) & BIT_MASK_SIFS_OFDM_CTX_8822B)
7726 #define BIT_SHIFT_SIFS_CCK_CTX_8822B 0
7727 #define BIT_MASK_SIFS_CCK_CTX_8822B 0xff
7728 #define BIT_SIFS_CCK_CTX_8822B(x) \
7729 (((x) & BIT_MASK_SIFS_CCK_CTX_8822B) << BIT_SHIFT_SIFS_CCK_CTX_8822B)
7730 #define BIT_GET_SIFS_CCK_CTX_8822B(x) \
7731 (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8822B) & BIT_MASK_SIFS_CCK_CTX_8822B)
7733 /* 2 REG_TSFTR_SYN_OFFSET_8822B */
7735 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8822B 0
7736 #define BIT_MASK_TSFTR_SNC_OFFSET_8822B 0xffff
7737 #define BIT_TSFTR_SNC_OFFSET_8822B(x) \
7738 (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8822B) \
7739 << BIT_SHIFT_TSFTR_SNC_OFFSET_8822B)
7740 #define BIT_GET_TSFTR_SNC_OFFSET_8822B(x) \
7741 (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8822B) & \
7742 BIT_MASK_TSFTR_SNC_OFFSET_8822B)
7744 /* 2 REG_AGGR_BREAK_TIME_8822B */
7746 #define BIT_SHIFT_AGGR_BK_TIME_8822B 0
7747 #define BIT_MASK_AGGR_BK_TIME_8822B 0xff
7748 #define BIT_AGGR_BK_TIME_8822B(x) \
7749 (((x) & BIT_MASK_AGGR_BK_TIME_8822B) << BIT_SHIFT_AGGR_BK_TIME_8822B)
7750 #define BIT_GET_AGGR_BK_TIME_8822B(x) \
7751 (((x) >> BIT_SHIFT_AGGR_BK_TIME_8822B) & BIT_MASK_AGGR_BK_TIME_8822B)
7753 /* 2 REG_SLOT_8822B */
7755 #define BIT_SHIFT_SLOT_8822B 0
7756 #define BIT_MASK_SLOT_8822B 0xff
7757 #define BIT_SLOT_8822B(x) (((x) & BIT_MASK_SLOT_8822B) << BIT_SHIFT_SLOT_8822B)
7758 #define BIT_GET_SLOT_8822B(x) \
7759 (((x) >> BIT_SHIFT_SLOT_8822B) & BIT_MASK_SLOT_8822B)
7761 /* 2 REG_TX_PTCL_CTRL_8822B */
7762 #define BIT_DIS_EDCCA_8822B BIT(15)
7763 #define BIT_DIS_CCA_8822B BIT(14)
7764 #define BIT_LSIG_TXOP_TXCMD_NAV_8822B BIT(13)
7765 #define BIT_SIFS_BK_EN_8822B BIT(12)
7767 #define BIT_SHIFT_TXQ_NAV_MSK_8822B 8
7768 #define BIT_MASK_TXQ_NAV_MSK_8822B 0xf
7769 #define BIT_TXQ_NAV_MSK_8822B(x) \
7770 (((x) & BIT_MASK_TXQ_NAV_MSK_8822B) << BIT_SHIFT_TXQ_NAV_MSK_8822B)
7771 #define BIT_GET_TXQ_NAV_MSK_8822B(x) \
7772 (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8822B) & BIT_MASK_TXQ_NAV_MSK_8822B)
7774 #define BIT_DIS_CW_8822B BIT(7)
7775 #define BIT_NAV_END_TXOP_8822B BIT(6)
7776 #define BIT_RDG_END_TXOP_8822B BIT(5)
7777 #define BIT_AC_INBCN_HOLD_8822B BIT(4)
7778 #define BIT_MGTQ_TXOP_EN_8822B BIT(3)
7779 #define BIT_MGTQ_RTSMF_EN_8822B BIT(2)
7780 #define BIT_HIQ_RTSMF_EN_8822B BIT(1)
7781 #define BIT_BCN_RTSMF_EN_8822B BIT(0)
7783 /* 2 REG_TXPAUSE_8822B */
7784 #define BIT_STOP_BCN_HI_MGT_8822B BIT(7)
7785 #define BIT_MAC_STOPBCNQ_8822B BIT(6)
7786 #define BIT_MAC_STOPHIQ_8822B BIT(5)
7787 #define BIT_MAC_STOPMGQ_8822B BIT(4)
7788 #define BIT_MAC_STOPBK_8822B BIT(3)
7789 #define BIT_MAC_STOPBE_8822B BIT(2)
7790 #define BIT_MAC_STOPVI_8822B BIT(1)
7791 #define BIT_MAC_STOPVO_8822B BIT(0)
7793 /* 2 REG_DIS_TXREQ_CLR_8822B */
7794 #define BIT_DIS_BT_CCA_8822B BIT(7)
7795 #define BIT_DIS_TXREQ_CLR_HI_8822B BIT(5)
7796 #define BIT_DIS_TXREQ_CLR_MGQ_8822B BIT(4)
7797 #define BIT_DIS_TXREQ_CLR_VO_8822B BIT(3)
7798 #define BIT_DIS_TXREQ_CLR_VI_8822B BIT(2)
7799 #define BIT_DIS_TXREQ_CLR_BE_8822B BIT(1)
7800 #define BIT_DIS_TXREQ_CLR_BK_8822B BIT(0)
7802 /* 2 REG_RD_CTRL_8822B */
7803 #define BIT_EN_CLR_TXREQ_INCCA_8822B BIT(15)
7804 #define BIT_DIS_TX_OVER_BCNQ_8822B BIT(14)
7805 #define BIT_EN_BCNERR_INCCCA_8822B BIT(13)
7806 #define BIT_EDCCA_MSK_CNTDOWN_EN_8822B BIT(11)
7807 #define BIT_DIS_TXOP_CFE_8822B BIT(10)
7808 #define BIT_DIS_LSIG_CFE_8822B BIT(9)
7809 #define BIT_DIS_STBC_CFE_8822B BIT(8)
7810 #define BIT_BKQ_RD_INIT_EN_8822B BIT(7)
7811 #define BIT_BEQ_RD_INIT_EN_8822B BIT(6)
7812 #define BIT_VIQ_RD_INIT_EN_8822B BIT(5)
7813 #define BIT_VOQ_RD_INIT_EN_8822B BIT(4)
7814 #define BIT_BKQ_RD_RESP_EN_8822B BIT(3)
7815 #define BIT_BEQ_RD_RESP_EN_8822B BIT(2)
7816 #define BIT_VIQ_RD_RESP_EN_8822B BIT(1)
7817 #define BIT_VOQ_RD_RESP_EN_8822B BIT(0)
7819 /* 2 REG_MBSSID_CTRL_8822B */
7820 #define BIT_MBID_BCNQ7_EN_8822B BIT(7)
7821 #define BIT_MBID_BCNQ6_EN_8822B BIT(6)
7822 #define BIT_MBID_BCNQ5_EN_8822B BIT(5)
7823 #define BIT_MBID_BCNQ4_EN_8822B BIT(4)
7824 #define BIT_MBID_BCNQ3_EN_8822B BIT(3)
7825 #define BIT_MBID_BCNQ2_EN_8822B BIT(2)
7826 #define BIT_MBID_BCNQ1_EN_8822B BIT(1)
7827 #define BIT_MBID_BCNQ0_EN_8822B BIT(0)
7829 /* 2 REG_P2PPS_CTRL_8822B */
7830 #define BIT_P2P_CTW_ALLSTASLEEP_8822B BIT(7)
7831 #define BIT_P2P_OFF_DISTX_EN_8822B BIT(6)
7832 #define BIT_PWR_MGT_EN_8822B BIT(5)
7833 #define BIT_P2P_NOA1_EN_8822B BIT(2)
7834 #define BIT_P2P_NOA0_EN_8822B BIT(1)
7836 /* 2 REG_PKT_LIFETIME_CTRL_8822B */
7837 #define BIT_EN_P2P_CTWND1_8822B BIT(23)
7838 #define BIT_EN_BKF_CLR_TXREQ_8822B BIT(22)
7839 #define BIT_EN_TSFBIT32_RST_P2P_8822B BIT(21)
7840 #define BIT_EN_BCN_TX_BTCCA_8822B BIT(20)
7841 #define BIT_DIS_PKT_TX_ATIM_8822B BIT(19)
7842 #define BIT_DIS_BCN_DIS_CTN_8822B BIT(18)
7843 #define BIT_EN_NAVEND_RST_TXOP_8822B BIT(17)
7844 #define BIT_EN_FILTER_CCA_8822B BIT(16)
7846 #define BIT_SHIFT_CCA_FILTER_THRS_8822B 8
7847 #define BIT_MASK_CCA_FILTER_THRS_8822B 0xff
7848 #define BIT_CCA_FILTER_THRS_8822B(x) \
7849 (((x) & BIT_MASK_CCA_FILTER_THRS_8822B) \
7850 << BIT_SHIFT_CCA_FILTER_THRS_8822B)
7851 #define BIT_GET_CCA_FILTER_THRS_8822B(x) \
7852 (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8822B) & \
7853 BIT_MASK_CCA_FILTER_THRS_8822B)
7855 #define BIT_SHIFT_EDCCA_THRS_8822B 0
7856 #define BIT_MASK_EDCCA_THRS_8822B 0xff
7857 #define BIT_EDCCA_THRS_8822B(x) \
7858 (((x) & BIT_MASK_EDCCA_THRS_8822B) << BIT_SHIFT_EDCCA_THRS_8822B)
7859 #define BIT_GET_EDCCA_THRS_8822B(x) \
7860 (((x) >> BIT_SHIFT_EDCCA_THRS_8822B) & BIT_MASK_EDCCA_THRS_8822B)
7862 /* 2 REG_P2PPS_SPEC_STATE_8822B */
7863 #define BIT_SPEC_POWER_STATE_8822B BIT(7)
7864 #define BIT_SPEC_CTWINDOW_ON_8822B BIT(6)
7865 #define BIT_SPEC_BEACON_AREA_ON_8822B BIT(5)
7866 #define BIT_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
7867 #define BIT_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
7868 #define BIT_SPEC_FORCE_DOZE1_8822B BIT(2)
7869 #define BIT_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
7870 #define BIT_SPEC_FORCE_DOZE0_8822B BIT(0)
7872 /* 2 REG_BAR_TX_CTRL_8822B */
7874 /* 2 REG_NOT_VALID_8822B */
7876 #define BIT_SHIFT_P2PON_DIS_TXTIME_8822B 0
7877 #define BIT_MASK_P2PON_DIS_TXTIME_8822B 0xff
7878 #define BIT_P2PON_DIS_TXTIME_8822B(x) \
7879 (((x) & BIT_MASK_P2PON_DIS_TXTIME_8822B) \
7880 << BIT_SHIFT_P2PON_DIS_TXTIME_8822B)
7881 #define BIT_GET_P2PON_DIS_TXTIME_8822B(x) \
7882 (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8822B) & \
7883 BIT_MASK_P2PON_DIS_TXTIME_8822B)
7885 /* 2 REG_QUEUE_INCOL_THR_8822B */
7887 #define BIT_SHIFT_BK_QUEUE_THR_8822B 24
7888 #define BIT_MASK_BK_QUEUE_THR_8822B 0xff
7889 #define BIT_BK_QUEUE_THR_8822B(x) \
7890 (((x) & BIT_MASK_BK_QUEUE_THR_8822B) << BIT_SHIFT_BK_QUEUE_THR_8822B)
7891 #define BIT_GET_BK_QUEUE_THR_8822B(x) \
7892 (((x) >> BIT_SHIFT_BK_QUEUE_THR_8822B) & BIT_MASK_BK_QUEUE_THR_8822B)
7894 #define BIT_SHIFT_BE_QUEUE_THR_8822B 16
7895 #define BIT_MASK_BE_QUEUE_THR_8822B 0xff
7896 #define BIT_BE_QUEUE_THR_8822B(x) \
7897 (((x) & BIT_MASK_BE_QUEUE_THR_8822B) << BIT_SHIFT_BE_QUEUE_THR_8822B)
7898 #define BIT_GET_BE_QUEUE_THR_8822B(x) \
7899 (((x) >> BIT_SHIFT_BE_QUEUE_THR_8822B) & BIT_MASK_BE_QUEUE_THR_8822B)
7901 #define BIT_SHIFT_VI_QUEUE_THR_8822B 8
7902 #define BIT_MASK_VI_QUEUE_THR_8822B 0xff
7903 #define BIT_VI_QUEUE_THR_8822B(x) \
7904 (((x) & BIT_MASK_VI_QUEUE_THR_8822B) << BIT_SHIFT_VI_QUEUE_THR_8822B)
7905 #define BIT_GET_VI_QUEUE_THR_8822B(x) \
7906 (((x) >> BIT_SHIFT_VI_QUEUE_THR_8822B) & BIT_MASK_VI_QUEUE_THR_8822B)
7908 #define BIT_SHIFT_VO_QUEUE_THR_8822B 0
7909 #define BIT_MASK_VO_QUEUE_THR_8822B 0xff
7910 #define BIT_VO_QUEUE_THR_8822B(x) \
7911 (((x) & BIT_MASK_VO_QUEUE_THR_8822B) << BIT_SHIFT_VO_QUEUE_THR_8822B)
7912 #define BIT_GET_VO_QUEUE_THR_8822B(x) \
7913 (((x) >> BIT_SHIFT_VO_QUEUE_THR_8822B) & BIT_MASK_VO_QUEUE_THR_8822B)
7915 /* 2 REG_QUEUE_INCOL_EN_8822B */
7916 #define BIT_QUEUE_INCOL_EN_8822B BIT(16)
7918 #define BIT_SHIFT_BE_TRIGGER_NUM_8822B 12
7919 #define BIT_MASK_BE_TRIGGER_NUM_8822B 0xf
7920 #define BIT_BE_TRIGGER_NUM_8822B(x) \
7921 (((x) & BIT_MASK_BE_TRIGGER_NUM_8822B) \
7922 << BIT_SHIFT_BE_TRIGGER_NUM_8822B)
7923 #define BIT_GET_BE_TRIGGER_NUM_8822B(x) \
7924 (((x) >> BIT_SHIFT_BE_TRIGGER_NUM_8822B) & \
7925 BIT_MASK_BE_TRIGGER_NUM_8822B)
7927 #define BIT_SHIFT_BK_TRIGGER_NUM_8822B 8
7928 #define BIT_MASK_BK_TRIGGER_NUM_8822B 0xf
7929 #define BIT_BK_TRIGGER_NUM_8822B(x) \
7930 (((x) & BIT_MASK_BK_TRIGGER_NUM_8822B) \
7931 << BIT_SHIFT_BK_TRIGGER_NUM_8822B)
7932 #define BIT_GET_BK_TRIGGER_NUM_8822B(x) \
7933 (((x) >> BIT_SHIFT_BK_TRIGGER_NUM_8822B) & \
7934 BIT_MASK_BK_TRIGGER_NUM_8822B)
7936 #define BIT_SHIFT_VI_TRIGGER_NUM_8822B 4
7937 #define BIT_MASK_VI_TRIGGER_NUM_8822B 0xf
7938 #define BIT_VI_TRIGGER_NUM_8822B(x) \
7939 (((x) & BIT_MASK_VI_TRIGGER_NUM_8822B) \
7940 << BIT_SHIFT_VI_TRIGGER_NUM_8822B)
7941 #define BIT_GET_VI_TRIGGER_NUM_8822B(x) \
7942 (((x) >> BIT_SHIFT_VI_TRIGGER_NUM_8822B) & \
7943 BIT_MASK_VI_TRIGGER_NUM_8822B)
7945 #define BIT_SHIFT_VO_TRIGGER_NUM_8822B 0
7946 #define BIT_MASK_VO_TRIGGER_NUM_8822B 0xf
7947 #define BIT_VO_TRIGGER_NUM_8822B(x) \
7948 (((x) & BIT_MASK_VO_TRIGGER_NUM_8822B) \
7949 << BIT_SHIFT_VO_TRIGGER_NUM_8822B)
7950 #define BIT_GET_VO_TRIGGER_NUM_8822B(x) \
7951 (((x) >> BIT_SHIFT_VO_TRIGGER_NUM_8822B) & \
7952 BIT_MASK_VO_TRIGGER_NUM_8822B)
7954 /* 2 REG_TBTT_PROHIBIT_8822B */
7956 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B 8
7957 #define BIT_MASK_TBTT_HOLD_TIME_AP_8822B 0xfff
7958 #define BIT_TBTT_HOLD_TIME_AP_8822B(x) \
7959 (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8822B) \
7960 << BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B)
7961 #define BIT_GET_TBTT_HOLD_TIME_AP_8822B(x) \
7962 (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B) & \
7963 BIT_MASK_TBTT_HOLD_TIME_AP_8822B)
7965 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B 0
7966 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8822B 0xf
7967 #define BIT_TBTT_PROHIBIT_SETUP_8822B(x) \
7968 (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8822B) \
7969 << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B)
7970 #define BIT_GET_TBTT_PROHIBIT_SETUP_8822B(x) \
7971 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B) & \
7972 BIT_MASK_TBTT_PROHIBIT_SETUP_8822B)
7974 /* 2 REG_P2PPS_STATE_8822B */
7975 #define BIT_POWER_STATE_8822B BIT(7)
7976 #define BIT_CTWINDOW_ON_8822B BIT(6)
7977 #define BIT_BEACON_AREA_ON_8822B BIT(5)
7978 #define BIT_CTWIN_EARLY_DISTX_8822B BIT(4)
7979 #define BIT_NOA1_OFF_PERIOD_8822B BIT(3)
7980 #define BIT_FORCE_DOZE1_8822B BIT(2)
7981 #define BIT_NOA0_OFF_PERIOD_8822B BIT(1)
7982 #define BIT_FORCE_DOZE0_8822B BIT(0)
7984 /* 2 REG_RD_NAV_NXT_8822B */
7986 #define BIT_SHIFT_RD_NAV_PROT_NXT_8822B 0
7987 #define BIT_MASK_RD_NAV_PROT_NXT_8822B 0xffff
7988 #define BIT_RD_NAV_PROT_NXT_8822B(x) \
7989 (((x) & BIT_MASK_RD_NAV_PROT_NXT_8822B) \
7990 << BIT_SHIFT_RD_NAV_PROT_NXT_8822B)
7991 #define BIT_GET_RD_NAV_PROT_NXT_8822B(x) \
7992 (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8822B) & \
7993 BIT_MASK_RD_NAV_PROT_NXT_8822B)
7995 /* 2 REG_NAV_PROT_LEN_8822B */
7997 #define BIT_SHIFT_NAV_PROT_LEN_8822B 0
7998 #define BIT_MASK_NAV_PROT_LEN_8822B 0xffff
7999 #define BIT_NAV_PROT_LEN_8822B(x) \
8000 (((x) & BIT_MASK_NAV_PROT_LEN_8822B) << BIT_SHIFT_NAV_PROT_LEN_8822B)
8001 #define BIT_GET_NAV_PROT_LEN_8822B(x) \
8002 (((x) >> BIT_SHIFT_NAV_PROT_LEN_8822B) & BIT_MASK_NAV_PROT_LEN_8822B)
8004 /* 2 REG_BCN_CTRL_8822B */
8005 #define BIT_DIS_RX_BSSID_FIT_8822B BIT(6)
8006 #define BIT_P0_EN_TXBCN_RPT_8822B BIT(5)
8007 #define BIT_DIS_TSF_UDT_8822B BIT(4)
8008 #define BIT_EN_BCN_FUNCTION_8822B BIT(3)
8009 #define BIT_P0_EN_RXBCN_RPT_8822B BIT(2)
8010 #define BIT_EN_P2P_CTWINDOW_8822B BIT(1)
8011 #define BIT_EN_P2P_BCNQ_AREA_8822B BIT(0)
8013 /* 2 REG_BCN_CTRL_CLINT0_8822B */
8014 #define BIT_CLI0_DIS_RX_BSSID_FIT_8822B BIT(6)
8015 #define BIT_CLI0_DIS_TSF_UDT_8822B BIT(4)
8016 #define BIT_CLI0_EN_BCN_FUNCTION_8822B BIT(3)
8017 #define BIT_CLI0_EN_RXBCN_RPT_8822B BIT(2)
8018 #define BIT_CLI0_ENP2P_CTWINDOW_8822B BIT(1)
8019 #define BIT_CLI0_ENP2P_BCNQ_AREA_8822B BIT(0)
8021 /* 2 REG_MBID_NUM_8822B */
8022 #define BIT_EN_PRE_DL_BEACON_8822B BIT(3)
8024 #define BIT_SHIFT_MBID_BCN_NUM_8822B 0
8025 #define BIT_MASK_MBID_BCN_NUM_8822B 0x7
8026 #define BIT_MBID_BCN_NUM_8822B(x) \
8027 (((x) & BIT_MASK_MBID_BCN_NUM_8822B) << BIT_SHIFT_MBID_BCN_NUM_8822B)
8028 #define BIT_GET_MBID_BCN_NUM_8822B(x) \
8029 (((x) >> BIT_SHIFT_MBID_BCN_NUM_8822B) & BIT_MASK_MBID_BCN_NUM_8822B)
8031 /* 2 REG_DUAL_TSF_RST_8822B */
8032 #define BIT_FREECNT_RST_8822B BIT(5)
8033 #define BIT_TSFTR_CLI3_RST_8822B BIT(4)
8034 #define BIT_TSFTR_CLI2_RST_8822B BIT(3)
8035 #define BIT_TSFTR_CLI1_RST_8822B BIT(2)
8036 #define BIT_TSFTR_CLI0_RST_8822B BIT(1)
8037 #define BIT_TSFTR_RST_8822B BIT(0)
8039 /* 2 REG_MBSSID_BCN_SPACE_8822B */
8041 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B 28
8042 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8822B 0x7
8043 #define BIT_BCN_TIMER_SEL_FWRD_8822B(x) \
8044 (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8822B) \
8045 << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B)
8046 #define BIT_GET_BCN_TIMER_SEL_FWRD_8822B(x) \
8047 (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B) & \
8048 BIT_MASK_BCN_TIMER_SEL_FWRD_8822B)
8050 #define BIT_SHIFT_BCN_SPACE_CLINT0_8822B 16
8051 #define BIT_MASK_BCN_SPACE_CLINT0_8822B 0xfff
8052 #define BIT_BCN_SPACE_CLINT0_8822B(x) \
8053 (((x) & BIT_MASK_BCN_SPACE_CLINT0_8822B) \
8054 << BIT_SHIFT_BCN_SPACE_CLINT0_8822B)
8055 #define BIT_GET_BCN_SPACE_CLINT0_8822B(x) \
8056 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8822B) & \
8057 BIT_MASK_BCN_SPACE_CLINT0_8822B)
8059 #define BIT_SHIFT_BCN_SPACE0_8822B 0
8060 #define BIT_MASK_BCN_SPACE0_8822B 0xffff
8061 #define BIT_BCN_SPACE0_8822B(x) \
8062 (((x) & BIT_MASK_BCN_SPACE0_8822B) << BIT_SHIFT_BCN_SPACE0_8822B)
8063 #define BIT_GET_BCN_SPACE0_8822B(x) \
8064 (((x) >> BIT_SHIFT_BCN_SPACE0_8822B) & BIT_MASK_BCN_SPACE0_8822B)
8066 /* 2 REG_DRVERLYINT_8822B */
8068 #define BIT_SHIFT_DRVERLYITV_8822B 0
8069 #define BIT_MASK_DRVERLYITV_8822B 0xff
8070 #define BIT_DRVERLYITV_8822B(x) \
8071 (((x) & BIT_MASK_DRVERLYITV_8822B) << BIT_SHIFT_DRVERLYITV_8822B)
8072 #define BIT_GET_DRVERLYITV_8822B(x) \
8073 (((x) >> BIT_SHIFT_DRVERLYITV_8822B) & BIT_MASK_DRVERLYITV_8822B)
8075 /* 2 REG_BCNDMATIM_8822B */
8077 #define BIT_SHIFT_BCNDMATIM_8822B 0
8078 #define BIT_MASK_BCNDMATIM_8822B 0xff
8079 #define BIT_BCNDMATIM_8822B(x) \
8080 (((x) & BIT_MASK_BCNDMATIM_8822B) << BIT_SHIFT_BCNDMATIM_8822B)
8081 #define BIT_GET_BCNDMATIM_8822B(x) \
8082 (((x) >> BIT_SHIFT_BCNDMATIM_8822B) & BIT_MASK_BCNDMATIM_8822B)
8084 /* 2 REG_ATIMWND_8822B */
8086 #define BIT_SHIFT_ATIMWND0_8822B 0
8087 #define BIT_MASK_ATIMWND0_8822B 0xffff
8088 #define BIT_ATIMWND0_8822B(x) \
8089 (((x) & BIT_MASK_ATIMWND0_8822B) << BIT_SHIFT_ATIMWND0_8822B)
8090 #define BIT_GET_ATIMWND0_8822B(x) \
8091 (((x) >> BIT_SHIFT_ATIMWND0_8822B) & BIT_MASK_ATIMWND0_8822B)
8093 /* 2 REG_USTIME_TSF_8822B */
8095 #define BIT_SHIFT_USTIME_TSF_V1_8822B 0
8096 #define BIT_MASK_USTIME_TSF_V1_8822B 0xff
8097 #define BIT_USTIME_TSF_V1_8822B(x) \
8098 (((x) & BIT_MASK_USTIME_TSF_V1_8822B) << BIT_SHIFT_USTIME_TSF_V1_8822B)
8099 #define BIT_GET_USTIME_TSF_V1_8822B(x) \
8100 (((x) >> BIT_SHIFT_USTIME_TSF_V1_8822B) & BIT_MASK_USTIME_TSF_V1_8822B)
8102 /* 2 REG_BCN_MAX_ERR_8822B */
8104 #define BIT_SHIFT_BCN_MAX_ERR_8822B 0
8105 #define BIT_MASK_BCN_MAX_ERR_8822B 0xff
8106 #define BIT_BCN_MAX_ERR_8822B(x) \
8107 (((x) & BIT_MASK_BCN_MAX_ERR_8822B) << BIT_SHIFT_BCN_MAX_ERR_8822B)
8108 #define BIT_GET_BCN_MAX_ERR_8822B(x) \
8109 (((x) >> BIT_SHIFT_BCN_MAX_ERR_8822B) & BIT_MASK_BCN_MAX_ERR_8822B)
8111 /* 2 REG_RXTSF_OFFSET_CCK_8822B */
8113 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8822B 0
8114 #define BIT_MASK_CCK_RXTSF_OFFSET_8822B 0xff
8115 #define BIT_CCK_RXTSF_OFFSET_8822B(x) \
8116 (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8822B) \
8117 << BIT_SHIFT_CCK_RXTSF_OFFSET_8822B)
8118 #define BIT_GET_CCK_RXTSF_OFFSET_8822B(x) \
8119 (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8822B) & \
8120 BIT_MASK_CCK_RXTSF_OFFSET_8822B)
8122 /* 2 REG_RXTSF_OFFSET_OFDM_8822B */
8124 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B 0
8125 #define BIT_MASK_OFDM_RXTSF_OFFSET_8822B 0xff
8126 #define BIT_OFDM_RXTSF_OFFSET_8822B(x) \
8127 (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8822B) \
8128 << BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B)
8129 #define BIT_GET_OFDM_RXTSF_OFFSET_8822B(x) \
8130 (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B) & \
8131 BIT_MASK_OFDM_RXTSF_OFFSET_8822B)
8133 /* 2 REG_TSFTR_8822B */
8135 #define BIT_SHIFT_TSF_TIMER_8822B 0
8136 #define BIT_MASK_TSF_TIMER_8822B 0xffffffffffffffffL
8137 #define BIT_TSF_TIMER_8822B(x) \
8138 (((x) & BIT_MASK_TSF_TIMER_8822B) << BIT_SHIFT_TSF_TIMER_8822B)
8139 #define BIT_GET_TSF_TIMER_8822B(x) \
8140 (((x) >> BIT_SHIFT_TSF_TIMER_8822B) & BIT_MASK_TSF_TIMER_8822B)
8142 /* 2 REG_FREERUN_CNT_8822B */
8144 #define BIT_SHIFT_FREERUN_CNT_8822B 0
8145 #define BIT_MASK_FREERUN_CNT_8822B 0xffffffffffffffffL
8146 #define BIT_FREERUN_CNT_8822B(x) \
8147 (((x) & BIT_MASK_FREERUN_CNT_8822B) << BIT_SHIFT_FREERUN_CNT_8822B)
8148 #define BIT_GET_FREERUN_CNT_8822B(x) \
8149 (((x) >> BIT_SHIFT_FREERUN_CNT_8822B) & BIT_MASK_FREERUN_CNT_8822B)
8151 /* 2 REG_ATIMWND1_V1_8822B */
8153 #define BIT_SHIFT_ATIMWND1_V1_8822B 0
8154 #define BIT_MASK_ATIMWND1_V1_8822B 0xff
8155 #define BIT_ATIMWND1_V1_8822B(x) \
8156 (((x) & BIT_MASK_ATIMWND1_V1_8822B) << BIT_SHIFT_ATIMWND1_V1_8822B)
8157 #define BIT_GET_ATIMWND1_V1_8822B(x) \
8158 (((x) >> BIT_SHIFT_ATIMWND1_V1_8822B) & BIT_MASK_ATIMWND1_V1_8822B)
8160 /* 2 REG_TBTT_PROHIBIT_INFRA_8822B */
8162 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B 0
8163 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8822B 0xff
8164 #define BIT_TBTT_PROHIBIT_INFRA_8822B(x) \
8165 (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8822B) \
8166 << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B)
8167 #define BIT_GET_TBTT_PROHIBIT_INFRA_8822B(x) \
8168 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B) & \
8169 BIT_MASK_TBTT_PROHIBIT_INFRA_8822B)
8171 /* 2 REG_CTWND_8822B */
8173 #define BIT_SHIFT_CTWND_8822B 0
8174 #define BIT_MASK_CTWND_8822B 0xff
8175 #define BIT_CTWND_8822B(x) \
8176 (((x) & BIT_MASK_CTWND_8822B) << BIT_SHIFT_CTWND_8822B)
8177 #define BIT_GET_CTWND_8822B(x) \
8178 (((x) >> BIT_SHIFT_CTWND_8822B) & BIT_MASK_CTWND_8822B)
8180 /* 2 REG_BCNIVLCUNT_8822B */
8182 #define BIT_SHIFT_BCNIVLCUNT_8822B 0
8183 #define BIT_MASK_BCNIVLCUNT_8822B 0x7f
8184 #define BIT_BCNIVLCUNT_8822B(x) \
8185 (((x) & BIT_MASK_BCNIVLCUNT_8822B) << BIT_SHIFT_BCNIVLCUNT_8822B)
8186 #define BIT_GET_BCNIVLCUNT_8822B(x) \
8187 (((x) >> BIT_SHIFT_BCNIVLCUNT_8822B) & BIT_MASK_BCNIVLCUNT_8822B)
8189 /* 2 REG_BCNDROPCTRL_8822B */
8190 #define BIT_BEACON_DROP_EN_8822B BIT(7)
8192 #define BIT_SHIFT_BEACON_DROP_IVL_8822B 0
8193 #define BIT_MASK_BEACON_DROP_IVL_8822B 0x7f
8194 #define BIT_BEACON_DROP_IVL_8822B(x) \
8195 (((x) & BIT_MASK_BEACON_DROP_IVL_8822B) \
8196 << BIT_SHIFT_BEACON_DROP_IVL_8822B)
8197 #define BIT_GET_BEACON_DROP_IVL_8822B(x) \
8198 (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8822B) & \
8199 BIT_MASK_BEACON_DROP_IVL_8822B)
8201 /* 2 REG_HGQ_TIMEOUT_PERIOD_8822B */
8203 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B 0
8204 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B 0xff
8205 #define BIT_HGQ_TIMEOUT_PERIOD_8822B(x) \
8206 (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B) \
8207 << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B)
8208 #define BIT_GET_HGQ_TIMEOUT_PERIOD_8822B(x) \
8209 (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B) & \
8210 BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B)
8212 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8822B */
8214 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B 0
8215 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B 0xff
8216 #define BIT_TXCMD_TIMEOUT_PERIOD_8822B(x) \
8217 (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B) \
8218 << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B)
8219 #define BIT_GET_TXCMD_TIMEOUT_PERIOD_8822B(x) \
8220 (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B) & \
8221 BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B)
8223 /* 2 REG_MISC_CTRL_8822B */
8224 #define BIT_DIS_TRX_CAL_BCN_8822B BIT(5)
8225 #define BIT_DIS_TX_CAL_TBTT_8822B BIT(4)
8226 #define BIT_EN_FREECNT_8822B BIT(3)
8227 #define BIT_BCN_AGGRESSION_8822B BIT(2)
8229 #define BIT_SHIFT_DIS_SECONDARY_CCA_8822B 0
8230 #define BIT_MASK_DIS_SECONDARY_CCA_8822B 0x3
8231 #define BIT_DIS_SECONDARY_CCA_8822B(x) \
8232 (((x) & BIT_MASK_DIS_SECONDARY_CCA_8822B) \
8233 << BIT_SHIFT_DIS_SECONDARY_CCA_8822B)
8234 #define BIT_GET_DIS_SECONDARY_CCA_8822B(x) \
8235 (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8822B) & \
8236 BIT_MASK_DIS_SECONDARY_CCA_8822B)
8238 /* 2 REG_BCN_CTRL_CLINT1_8822B */
8239 #define BIT_CLI1_DIS_RX_BSSID_FIT_8822B BIT(6)
8240 #define BIT_CLI1_DIS_TSF_UDT_8822B BIT(4)
8241 #define BIT_CLI1_EN_BCN_FUNCTION_8822B BIT(3)
8242 #define BIT_CLI1_EN_RXBCN_RPT_8822B BIT(2)
8243 #define BIT_CLI1_ENP2P_CTWINDOW_8822B BIT(1)
8244 #define BIT_CLI1_ENP2P_BCNQ_AREA_8822B BIT(0)
8246 /* 2 REG_BCN_CTRL_CLINT2_8822B */
8247 #define BIT_CLI2_DIS_RX_BSSID_FIT_8822B BIT(6)
8248 #define BIT_CLI2_DIS_TSF_UDT_8822B BIT(4)
8249 #define BIT_CLI2_EN_BCN_FUNCTION_8822B BIT(3)
8250 #define BIT_CLI2_EN_RXBCN_RPT_8822B BIT(2)
8251 #define BIT_CLI2_ENP2P_CTWINDOW_8822B BIT(1)
8252 #define BIT_CLI2_ENP2P_BCNQ_AREA_8822B BIT(0)
8254 /* 2 REG_BCN_CTRL_CLINT3_8822B */
8255 #define BIT_CLI3_DIS_RX_BSSID_FIT_8822B BIT(6)
8256 #define BIT_CLI3_DIS_TSF_UDT_8822B BIT(4)
8257 #define BIT_CLI3_EN_BCN_FUNCTION_8822B BIT(3)
8258 #define BIT_CLI3_EN_RXBCN_RPT_8822B BIT(2)
8259 #define BIT_CLI3_ENP2P_CTWINDOW_8822B BIT(1)
8260 #define BIT_CLI3_ENP2P_BCNQ_AREA_8822B BIT(0)
8262 /* 2 REG_EXTEND_CTRL_8822B */
8263 #define BIT_EN_TSFBIT32_RST_P2P2_8822B BIT(5)
8264 #define BIT_EN_TSFBIT32_RST_P2P1_8822B BIT(4)
8266 #define BIT_SHIFT_PORT_SEL_8822B 0
8267 #define BIT_MASK_PORT_SEL_8822B 0x7
8268 #define BIT_PORT_SEL_8822B(x) \
8269 (((x) & BIT_MASK_PORT_SEL_8822B) << BIT_SHIFT_PORT_SEL_8822B)
8270 #define BIT_GET_PORT_SEL_8822B(x) \
8271 (((x) >> BIT_SHIFT_PORT_SEL_8822B) & BIT_MASK_PORT_SEL_8822B)
8273 /* 2 REG_P2PPS1_SPEC_STATE_8822B */
8274 #define BIT_P2P1_SPEC_POWER_STATE_8822B BIT(7)
8275 #define BIT_P2P1_SPEC_CTWINDOW_ON_8822B BIT(6)
8276 #define BIT_P2P1_SPEC_BCN_AREA_ON_8822B BIT(5)
8277 #define BIT_P2P1_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
8278 #define BIT_P2P1_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
8279 #define BIT_P2P1_SPEC_FORCE_DOZE1_8822B BIT(2)
8280 #define BIT_P2P1_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
8281 #define BIT_P2P1_SPEC_FORCE_DOZE0_8822B BIT(0)
8283 /* 2 REG_P2PPS1_STATE_8822B */
8284 #define BIT_P2P1_POWER_STATE_8822B BIT(7)
8285 #define BIT_P2P1_CTWINDOW_ON_8822B BIT(6)
8286 #define BIT_P2P1_BEACON_AREA_ON_8822B BIT(5)
8287 #define BIT_P2P1_CTWIN_EARLY_DISTX_8822B BIT(4)
8288 #define BIT_P2P1_NOA1_OFF_PERIOD_8822B BIT(3)
8289 #define BIT_P2P1_FORCE_DOZE1_8822B BIT(2)
8290 #define BIT_P2P1_NOA0_OFF_PERIOD_8822B BIT(1)
8291 #define BIT_P2P1_FORCE_DOZE0_8822B BIT(0)
8293 /* 2 REG_P2PPS2_SPEC_STATE_8822B */
8294 #define BIT_P2P2_SPEC_POWER_STATE_8822B BIT(7)
8295 #define BIT_P2P2_SPEC_CTWINDOW_ON_8822B BIT(6)
8296 #define BIT_P2P2_SPEC_BCN_AREA_ON_8822B BIT(5)
8297 #define BIT_P2P2_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
8298 #define BIT_P2P2_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
8299 #define BIT_P2P2_SPEC_FORCE_DOZE1_8822B BIT(2)
8300 #define BIT_P2P2_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
8301 #define BIT_P2P2_SPEC_FORCE_DOZE0_8822B BIT(0)
8303 /* 2 REG_P2PPS2_STATE_8822B */
8304 #define BIT_P2P2_POWER_STATE_8822B BIT(7)
8305 #define BIT_P2P2_CTWINDOW_ON_8822B BIT(6)
8306 #define BIT_P2P2_BEACON_AREA_ON_8822B BIT(5)
8307 #define BIT_P2P2_CTWIN_EARLY_DISTX_8822B BIT(4)
8308 #define BIT_P2P2_NOA1_OFF_PERIOD_8822B BIT(3)
8309 #define BIT_P2P2_FORCE_DOZE1_8822B BIT(2)
8310 #define BIT_P2P2_NOA0_OFF_PERIOD_8822B BIT(1)
8311 #define BIT_P2P2_FORCE_DOZE0_8822B BIT(0)
8313 /* 2 REG_PS_TIMER0_8822B */
8315 #define BIT_SHIFT_PSTIMER0_INT_8822B 5
8316 #define BIT_MASK_PSTIMER0_INT_8822B 0x7ffffff
8317 #define BIT_PSTIMER0_INT_8822B(x) \
8318 (((x) & BIT_MASK_PSTIMER0_INT_8822B) << BIT_SHIFT_PSTIMER0_INT_8822B)
8319 #define BIT_GET_PSTIMER0_INT_8822B(x) \
8320 (((x) >> BIT_SHIFT_PSTIMER0_INT_8822B) & BIT_MASK_PSTIMER0_INT_8822B)
8322 /* 2 REG_PS_TIMER1_8822B */
8324 #define BIT_SHIFT_PSTIMER1_INT_8822B 5
8325 #define BIT_MASK_PSTIMER1_INT_8822B 0x7ffffff
8326 #define BIT_PSTIMER1_INT_8822B(x) \
8327 (((x) & BIT_MASK_PSTIMER1_INT_8822B) << BIT_SHIFT_PSTIMER1_INT_8822B)
8328 #define BIT_GET_PSTIMER1_INT_8822B(x) \
8329 (((x) >> BIT_SHIFT_PSTIMER1_INT_8822B) & BIT_MASK_PSTIMER1_INT_8822B)
8331 /* 2 REG_PS_TIMER2_8822B */
8333 #define BIT_SHIFT_PSTIMER2_INT_8822B 5
8334 #define BIT_MASK_PSTIMER2_INT_8822B 0x7ffffff
8335 #define BIT_PSTIMER2_INT_8822B(x) \
8336 (((x) & BIT_MASK_PSTIMER2_INT_8822B) << BIT_SHIFT_PSTIMER2_INT_8822B)
8337 #define BIT_GET_PSTIMER2_INT_8822B(x) \
8338 (((x) >> BIT_SHIFT_PSTIMER2_INT_8822B) & BIT_MASK_PSTIMER2_INT_8822B)
8340 /* 2 REG_TBTT_CTN_AREA_8822B */
8342 #define BIT_SHIFT_TBTT_CTN_AREA_8822B 0
8343 #define BIT_MASK_TBTT_CTN_AREA_8822B 0xff
8344 #define BIT_TBTT_CTN_AREA_8822B(x) \
8345 (((x) & BIT_MASK_TBTT_CTN_AREA_8822B) << BIT_SHIFT_TBTT_CTN_AREA_8822B)
8346 #define BIT_GET_TBTT_CTN_AREA_8822B(x) \
8347 (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8822B) & BIT_MASK_TBTT_CTN_AREA_8822B)
8349 /* 2 REG_FORCE_BCN_IFS_8822B */
8351 #define BIT_SHIFT_FORCE_BCN_IFS_8822B 0
8352 #define BIT_MASK_FORCE_BCN_IFS_8822B 0xff
8353 #define BIT_FORCE_BCN_IFS_8822B(x) \
8354 (((x) & BIT_MASK_FORCE_BCN_IFS_8822B) << BIT_SHIFT_FORCE_BCN_IFS_8822B)
8355 #define BIT_GET_FORCE_BCN_IFS_8822B(x) \
8356 (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8822B) & BIT_MASK_FORCE_BCN_IFS_8822B)
8358 /* 2 REG_TXOP_MIN_8822B */
8360 #define BIT_SHIFT_TXOP_MIN_8822B 0
8361 #define BIT_MASK_TXOP_MIN_8822B 0x3fff
8362 #define BIT_TXOP_MIN_8822B(x) \
8363 (((x) & BIT_MASK_TXOP_MIN_8822B) << BIT_SHIFT_TXOP_MIN_8822B)
8364 #define BIT_GET_TXOP_MIN_8822B(x) \
8365 (((x) >> BIT_SHIFT_TXOP_MIN_8822B) & BIT_MASK_TXOP_MIN_8822B)
8367 /* 2 REG_PRE_BKF_TIME_8822B */
8369 #define BIT_SHIFT_PRE_BKF_TIME_8822B 0
8370 #define BIT_MASK_PRE_BKF_TIME_8822B 0xff
8371 #define BIT_PRE_BKF_TIME_8822B(x) \
8372 (((x) & BIT_MASK_PRE_BKF_TIME_8822B) << BIT_SHIFT_PRE_BKF_TIME_8822B)
8373 #define BIT_GET_PRE_BKF_TIME_8822B(x) \
8374 (((x) >> BIT_SHIFT_PRE_BKF_TIME_8822B) & BIT_MASK_PRE_BKF_TIME_8822B)
8376 /* 2 REG_CROSS_TXOP_CTRL_8822B */
8377 #define BIT_DTIM_BYPASS_8822B BIT(2)
8378 #define BIT_RTS_NAV_TXOP_8822B BIT(1)
8379 #define BIT_NOT_CROSS_TXOP_8822B BIT(0)
8381 /* 2 REG_ATIMWND2_8822B */
8383 #define BIT_SHIFT_ATIMWND2_8822B 0
8384 #define BIT_MASK_ATIMWND2_8822B 0xff
8385 #define BIT_ATIMWND2_8822B(x) \
8386 (((x) & BIT_MASK_ATIMWND2_8822B) << BIT_SHIFT_ATIMWND2_8822B)
8387 #define BIT_GET_ATIMWND2_8822B(x) \
8388 (((x) >> BIT_SHIFT_ATIMWND2_8822B) & BIT_MASK_ATIMWND2_8822B)
8390 /* 2 REG_ATIMWND3_8822B */
8392 #define BIT_SHIFT_ATIMWND3_8822B 0
8393 #define BIT_MASK_ATIMWND3_8822B 0xff
8394 #define BIT_ATIMWND3_8822B(x) \
8395 (((x) & BIT_MASK_ATIMWND3_8822B) << BIT_SHIFT_ATIMWND3_8822B)
8396 #define BIT_GET_ATIMWND3_8822B(x) \
8397 (((x) >> BIT_SHIFT_ATIMWND3_8822B) & BIT_MASK_ATIMWND3_8822B)
8399 /* 2 REG_ATIMWND4_8822B */
8401 #define BIT_SHIFT_ATIMWND4_8822B 0
8402 #define BIT_MASK_ATIMWND4_8822B 0xff
8403 #define BIT_ATIMWND4_8822B(x) \
8404 (((x) & BIT_MASK_ATIMWND4_8822B) << BIT_SHIFT_ATIMWND4_8822B)
8405 #define BIT_GET_ATIMWND4_8822B(x) \
8406 (((x) >> BIT_SHIFT_ATIMWND4_8822B) & BIT_MASK_ATIMWND4_8822B)
8408 /* 2 REG_ATIMWND5_8822B */
8410 #define BIT_SHIFT_ATIMWND5_8822B 0
8411 #define BIT_MASK_ATIMWND5_8822B 0xff
8412 #define BIT_ATIMWND5_8822B(x) \
8413 (((x) & BIT_MASK_ATIMWND5_8822B) << BIT_SHIFT_ATIMWND5_8822B)
8414 #define BIT_GET_ATIMWND5_8822B(x) \
8415 (((x) >> BIT_SHIFT_ATIMWND5_8822B) & BIT_MASK_ATIMWND5_8822B)
8417 /* 2 REG_ATIMWND6_8822B */
8419 #define BIT_SHIFT_ATIMWND6_8822B 0
8420 #define BIT_MASK_ATIMWND6_8822B 0xff
8421 #define BIT_ATIMWND6_8822B(x) \
8422 (((x) & BIT_MASK_ATIMWND6_8822B) << BIT_SHIFT_ATIMWND6_8822B)
8423 #define BIT_GET_ATIMWND6_8822B(x) \
8424 (((x) >> BIT_SHIFT_ATIMWND6_8822B) & BIT_MASK_ATIMWND6_8822B)
8426 /* 2 REG_ATIMWND7_8822B */
8428 #define BIT_SHIFT_ATIMWND7_8822B 0
8429 #define BIT_MASK_ATIMWND7_8822B 0xff
8430 #define BIT_ATIMWND7_8822B(x) \
8431 (((x) & BIT_MASK_ATIMWND7_8822B) << BIT_SHIFT_ATIMWND7_8822B)
8432 #define BIT_GET_ATIMWND7_8822B(x) \
8433 (((x) >> BIT_SHIFT_ATIMWND7_8822B) & BIT_MASK_ATIMWND7_8822B)
8435 /* 2 REG_ATIMUGT_8822B */
8437 #define BIT_SHIFT_ATIM_URGENT_8822B 0
8438 #define BIT_MASK_ATIM_URGENT_8822B 0xff
8439 #define BIT_ATIM_URGENT_8822B(x) \
8440 (((x) & BIT_MASK_ATIM_URGENT_8822B) << BIT_SHIFT_ATIM_URGENT_8822B)
8441 #define BIT_GET_ATIM_URGENT_8822B(x) \
8442 (((x) >> BIT_SHIFT_ATIM_URGENT_8822B) & BIT_MASK_ATIM_URGENT_8822B)
8444 /* 2 REG_HIQ_NO_LMT_EN_8822B */
8445 #define BIT_HIQ_NO_LMT_EN_VAP7_8822B BIT(7)
8446 #define BIT_HIQ_NO_LMT_EN_VAP6_8822B BIT(6)
8447 #define BIT_HIQ_NO_LMT_EN_VAP5_8822B BIT(5)
8448 #define BIT_HIQ_NO_LMT_EN_VAP4_8822B BIT(4)
8449 #define BIT_HIQ_NO_LMT_EN_VAP3_8822B BIT(3)
8450 #define BIT_HIQ_NO_LMT_EN_VAP2_8822B BIT(2)
8451 #define BIT_HIQ_NO_LMT_EN_VAP1_8822B BIT(1)
8452 #define BIT_HIQ_NO_LMT_EN_ROOT_8822B BIT(0)
8454 /* 2 REG_DTIM_COUNTER_ROOT_8822B */
8456 #define BIT_SHIFT_DTIM_COUNT_ROOT_8822B 0
8457 #define BIT_MASK_DTIM_COUNT_ROOT_8822B 0xff
8458 #define BIT_DTIM_COUNT_ROOT_8822B(x) \
8459 (((x) & BIT_MASK_DTIM_COUNT_ROOT_8822B) \
8460 << BIT_SHIFT_DTIM_COUNT_ROOT_8822B)
8461 #define BIT_GET_DTIM_COUNT_ROOT_8822B(x) \
8462 (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8822B) & \
8463 BIT_MASK_DTIM_COUNT_ROOT_8822B)
8465 /* 2 REG_DTIM_COUNTER_VAP1_8822B */
8467 #define BIT_SHIFT_DTIM_COUNT_VAP1_8822B 0
8468 #define BIT_MASK_DTIM_COUNT_VAP1_8822B 0xff
8469 #define BIT_DTIM_COUNT_VAP1_8822B(x) \
8470 (((x) & BIT_MASK_DTIM_COUNT_VAP1_8822B) \
8471 << BIT_SHIFT_DTIM_COUNT_VAP1_8822B)
8472 #define BIT_GET_DTIM_COUNT_VAP1_8822B(x) \
8473 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8822B) & \
8474 BIT_MASK_DTIM_COUNT_VAP1_8822B)
8476 /* 2 REG_DTIM_COUNTER_VAP2_8822B */
8478 #define BIT_SHIFT_DTIM_COUNT_VAP2_8822B 0
8479 #define BIT_MASK_DTIM_COUNT_VAP2_8822B 0xff
8480 #define BIT_DTIM_COUNT_VAP2_8822B(x) \
8481 (((x) & BIT_MASK_DTIM_COUNT_VAP2_8822B) \
8482 << BIT_SHIFT_DTIM_COUNT_VAP2_8822B)
8483 #define BIT_GET_DTIM_COUNT_VAP2_8822B(x) \
8484 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8822B) & \
8485 BIT_MASK_DTIM_COUNT_VAP2_8822B)
8487 /* 2 REG_DTIM_COUNTER_VAP3_8822B */
8489 #define BIT_SHIFT_DTIM_COUNT_VAP3_8822B 0
8490 #define BIT_MASK_DTIM_COUNT_VAP3_8822B 0xff
8491 #define BIT_DTIM_COUNT_VAP3_8822B(x) \
8492 (((x) & BIT_MASK_DTIM_COUNT_VAP3_8822B) \
8493 << BIT_SHIFT_DTIM_COUNT_VAP3_8822B)
8494 #define BIT_GET_DTIM_COUNT_VAP3_8822B(x) \
8495 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8822B) & \
8496 BIT_MASK_DTIM_COUNT_VAP3_8822B)
8498 /* 2 REG_DTIM_COUNTER_VAP4_8822B */
8500 #define BIT_SHIFT_DTIM_COUNT_VAP4_8822B 0
8501 #define BIT_MASK_DTIM_COUNT_VAP4_8822B 0xff
8502 #define BIT_DTIM_COUNT_VAP4_8822B(x) \
8503 (((x) & BIT_MASK_DTIM_COUNT_VAP4_8822B) \
8504 << BIT_SHIFT_DTIM_COUNT_VAP4_8822B)
8505 #define BIT_GET_DTIM_COUNT_VAP4_8822B(x) \
8506 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8822B) & \
8507 BIT_MASK_DTIM_COUNT_VAP4_8822B)
8509 /* 2 REG_DTIM_COUNTER_VAP5_8822B */
8511 #define BIT_SHIFT_DTIM_COUNT_VAP5_8822B 0
8512 #define BIT_MASK_DTIM_COUNT_VAP5_8822B 0xff
8513 #define BIT_DTIM_COUNT_VAP5_8822B(x) \
8514 (((x) & BIT_MASK_DTIM_COUNT_VAP5_8822B) \
8515 << BIT_SHIFT_DTIM_COUNT_VAP5_8822B)
8516 #define BIT_GET_DTIM_COUNT_VAP5_8822B(x) \
8517 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8822B) & \
8518 BIT_MASK_DTIM_COUNT_VAP5_8822B)
8520 /* 2 REG_DTIM_COUNTER_VAP6_8822B */
8522 #define BIT_SHIFT_DTIM_COUNT_VAP6_8822B 0
8523 #define BIT_MASK_DTIM_COUNT_VAP6_8822B 0xff
8524 #define BIT_DTIM_COUNT_VAP6_8822B(x) \
8525 (((x) & BIT_MASK_DTIM_COUNT_VAP6_8822B) \
8526 << BIT_SHIFT_DTIM_COUNT_VAP6_8822B)
8527 #define BIT_GET_DTIM_COUNT_VAP6_8822B(x) \
8528 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8822B) & \
8529 BIT_MASK_DTIM_COUNT_VAP6_8822B)
8531 /* 2 REG_DTIM_COUNTER_VAP7_8822B */
8533 #define BIT_SHIFT_DTIM_COUNT_VAP7_8822B 0
8534 #define BIT_MASK_DTIM_COUNT_VAP7_8822B 0xff
8535 #define BIT_DTIM_COUNT_VAP7_8822B(x) \
8536 (((x) & BIT_MASK_DTIM_COUNT_VAP7_8822B) \
8537 << BIT_SHIFT_DTIM_COUNT_VAP7_8822B)
8538 #define BIT_GET_DTIM_COUNT_VAP7_8822B(x) \
8539 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8822B) & \
8540 BIT_MASK_DTIM_COUNT_VAP7_8822B)
8542 /* 2 REG_DIS_ATIM_8822B */
8543 #define BIT_DIS_ATIM_VAP7_8822B BIT(7)
8544 #define BIT_DIS_ATIM_VAP6_8822B BIT(6)
8545 #define BIT_DIS_ATIM_VAP5_8822B BIT(5)
8546 #define BIT_DIS_ATIM_VAP4_8822B BIT(4)
8547 #define BIT_DIS_ATIM_VAP3_8822B BIT(3)
8548 #define BIT_DIS_ATIM_VAP2_8822B BIT(2)
8549 #define BIT_DIS_ATIM_VAP1_8822B BIT(1)
8550 #define BIT_DIS_ATIM_ROOT_8822B BIT(0)
8552 /* 2 REG_EARLY_128US_8822B */
8554 #define BIT_SHIFT_TSFT_SEL_TIMER1_8822B 3
8555 #define BIT_MASK_TSFT_SEL_TIMER1_8822B 0x7
8556 #define BIT_TSFT_SEL_TIMER1_8822B(x) \
8557 (((x) & BIT_MASK_TSFT_SEL_TIMER1_8822B) \
8558 << BIT_SHIFT_TSFT_SEL_TIMER1_8822B)
8559 #define BIT_GET_TSFT_SEL_TIMER1_8822B(x) \
8560 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8822B) & \
8561 BIT_MASK_TSFT_SEL_TIMER1_8822B)
8563 #define BIT_SHIFT_EARLY_128US_8822B 0
8564 #define BIT_MASK_EARLY_128US_8822B 0x7
8565 #define BIT_EARLY_128US_8822B(x) \
8566 (((x) & BIT_MASK_EARLY_128US_8822B) << BIT_SHIFT_EARLY_128US_8822B)
8567 #define BIT_GET_EARLY_128US_8822B(x) \
8568 (((x) >> BIT_SHIFT_EARLY_128US_8822B) & BIT_MASK_EARLY_128US_8822B)
8570 /* 2 REG_P2PPS1_CTRL_8822B */
8571 #define BIT_P2P1_CTW_ALLSTASLEEP_8822B BIT(7)
8572 #define BIT_P2P1_OFF_DISTX_EN_8822B BIT(6)
8573 #define BIT_P2P1_PWR_MGT_EN_8822B BIT(5)
8574 #define BIT_P2P1_NOA1_EN_8822B BIT(2)
8575 #define BIT_P2P1_NOA0_EN_8822B BIT(1)
8577 /* 2 REG_P2PPS2_CTRL_8822B */
8578 #define BIT_P2P2_CTW_ALLSTASLEEP_8822B BIT(7)
8579 #define BIT_P2P2_OFF_DISTX_EN_8822B BIT(6)
8580 #define BIT_P2P2_PWR_MGT_EN_8822B BIT(5)
8581 #define BIT_P2P2_NOA1_EN_8822B BIT(2)
8582 #define BIT_P2P2_NOA0_EN_8822B BIT(1)
8584 /* 2 REG_TIMER0_SRC_SEL_8822B */
8586 #define BIT_SHIFT_SYNC_CLI_SEL_8822B 4
8587 #define BIT_MASK_SYNC_CLI_SEL_8822B 0x7
8588 #define BIT_SYNC_CLI_SEL_8822B(x) \
8589 (((x) & BIT_MASK_SYNC_CLI_SEL_8822B) << BIT_SHIFT_SYNC_CLI_SEL_8822B)
8590 #define BIT_GET_SYNC_CLI_SEL_8822B(x) \
8591 (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8822B) & BIT_MASK_SYNC_CLI_SEL_8822B)
8593 #define BIT_SHIFT_TSFT_SEL_TIMER0_8822B 0
8594 #define BIT_MASK_TSFT_SEL_TIMER0_8822B 0x7
8595 #define BIT_TSFT_SEL_TIMER0_8822B(x) \
8596 (((x) & BIT_MASK_TSFT_SEL_TIMER0_8822B) \
8597 << BIT_SHIFT_TSFT_SEL_TIMER0_8822B)
8598 #define BIT_GET_TSFT_SEL_TIMER0_8822B(x) \
8599 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8822B) & \
8600 BIT_MASK_TSFT_SEL_TIMER0_8822B)
8602 /* 2 REG_NOA_UNIT_SEL_8822B */
8604 #define BIT_SHIFT_NOA_UNIT2_SEL_8822B 8
8605 #define BIT_MASK_NOA_UNIT2_SEL_8822B 0x7
8606 #define BIT_NOA_UNIT2_SEL_8822B(x) \
8607 (((x) & BIT_MASK_NOA_UNIT2_SEL_8822B) << BIT_SHIFT_NOA_UNIT2_SEL_8822B)
8608 #define BIT_GET_NOA_UNIT2_SEL_8822B(x) \
8609 (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8822B) & BIT_MASK_NOA_UNIT2_SEL_8822B)
8611 #define BIT_SHIFT_NOA_UNIT1_SEL_8822B 4
8612 #define BIT_MASK_NOA_UNIT1_SEL_8822B 0x7
8613 #define BIT_NOA_UNIT1_SEL_8822B(x) \
8614 (((x) & BIT_MASK_NOA_UNIT1_SEL_8822B) << BIT_SHIFT_NOA_UNIT1_SEL_8822B)
8615 #define BIT_GET_NOA_UNIT1_SEL_8822B(x) \
8616 (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8822B) & BIT_MASK_NOA_UNIT1_SEL_8822B)
8618 #define BIT_SHIFT_NOA_UNIT0_SEL_8822B 0
8619 #define BIT_MASK_NOA_UNIT0_SEL_8822B 0x7
8620 #define BIT_NOA_UNIT0_SEL_8822B(x) \
8621 (((x) & BIT_MASK_NOA_UNIT0_SEL_8822B) << BIT_SHIFT_NOA_UNIT0_SEL_8822B)
8622 #define BIT_GET_NOA_UNIT0_SEL_8822B(x) \
8623 (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8822B) & BIT_MASK_NOA_UNIT0_SEL_8822B)
8625 /* 2 REG_P2POFF_DIS_TXTIME_8822B */
8627 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8822B 0
8628 #define BIT_MASK_P2POFF_DIS_TXTIME_8822B 0xff
8629 #define BIT_P2POFF_DIS_TXTIME_8822B(x) \
8630 (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8822B) \
8631 << BIT_SHIFT_P2POFF_DIS_TXTIME_8822B)
8632 #define BIT_GET_P2POFF_DIS_TXTIME_8822B(x) \
8633 (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8822B) & \
8634 BIT_MASK_P2POFF_DIS_TXTIME_8822B)
8636 /* 2 REG_MBSSID_BCN_SPACE2_8822B */
8638 #define BIT_SHIFT_BCN_SPACE_CLINT2_8822B 16
8639 #define BIT_MASK_BCN_SPACE_CLINT2_8822B 0xfff
8640 #define BIT_BCN_SPACE_CLINT2_8822B(x) \
8641 (((x) & BIT_MASK_BCN_SPACE_CLINT2_8822B) \
8642 << BIT_SHIFT_BCN_SPACE_CLINT2_8822B)
8643 #define BIT_GET_BCN_SPACE_CLINT2_8822B(x) \
8644 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8822B) & \
8645 BIT_MASK_BCN_SPACE_CLINT2_8822B)
8647 #define BIT_SHIFT_BCN_SPACE_CLINT1_8822B 0
8648 #define BIT_MASK_BCN_SPACE_CLINT1_8822B 0xfff
8649 #define BIT_BCN_SPACE_CLINT1_8822B(x) \
8650 (((x) & BIT_MASK_BCN_SPACE_CLINT1_8822B) \
8651 << BIT_SHIFT_BCN_SPACE_CLINT1_8822B)
8652 #define BIT_GET_BCN_SPACE_CLINT1_8822B(x) \
8653 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8822B) & \
8654 BIT_MASK_BCN_SPACE_CLINT1_8822B)
8656 /* 2 REG_MBSSID_BCN_SPACE3_8822B */
8658 #define BIT_SHIFT_SUB_BCN_SPACE_8822B 16
8659 #define BIT_MASK_SUB_BCN_SPACE_8822B 0xff
8660 #define BIT_SUB_BCN_SPACE_8822B(x) \
8661 (((x) & BIT_MASK_SUB_BCN_SPACE_8822B) << BIT_SHIFT_SUB_BCN_SPACE_8822B)
8662 #define BIT_GET_SUB_BCN_SPACE_8822B(x) \
8663 (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8822B) & BIT_MASK_SUB_BCN_SPACE_8822B)
8665 #define BIT_SHIFT_BCN_SPACE_CLINT3_8822B 0
8666 #define BIT_MASK_BCN_SPACE_CLINT3_8822B 0xfff
8667 #define BIT_BCN_SPACE_CLINT3_8822B(x) \
8668 (((x) & BIT_MASK_BCN_SPACE_CLINT3_8822B) \
8669 << BIT_SHIFT_BCN_SPACE_CLINT3_8822B)
8670 #define BIT_GET_BCN_SPACE_CLINT3_8822B(x) \
8671 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8822B) & \
8672 BIT_MASK_BCN_SPACE_CLINT3_8822B)
8674 /* 2 REG_ACMHWCTRL_8822B */
8675 #define BIT_BEQ_ACM_STATUS_8822B BIT(7)
8676 #define BIT_VIQ_ACM_STATUS_8822B BIT(6)
8677 #define BIT_VOQ_ACM_STATUS_8822B BIT(5)
8678 #define BIT_BEQ_ACM_EN_8822B BIT(3)
8679 #define BIT_VIQ_ACM_EN_8822B BIT(2)
8680 #define BIT_VOQ_ACM_EN_8822B BIT(1)
8681 #define BIT_ACMHWEN_8822B BIT(0)
8683 /* 2 REG_ACMRSTCTRL_8822B */
8684 #define BIT_BE_ACM_RESET_USED_TIME_8822B BIT(2)
8685 #define BIT_VI_ACM_RESET_USED_TIME_8822B BIT(1)
8686 #define BIT_VO_ACM_RESET_USED_TIME_8822B BIT(0)
8688 /* 2 REG_ACMAVG_8822B */
8690 #define BIT_SHIFT_AVGPERIOD_8822B 0
8691 #define BIT_MASK_AVGPERIOD_8822B 0xffff
8692 #define BIT_AVGPERIOD_8822B(x) \
8693 (((x) & BIT_MASK_AVGPERIOD_8822B) << BIT_SHIFT_AVGPERIOD_8822B)
8694 #define BIT_GET_AVGPERIOD_8822B(x) \
8695 (((x) >> BIT_SHIFT_AVGPERIOD_8822B) & BIT_MASK_AVGPERIOD_8822B)
8697 /* 2 REG_VO_ADMTIME_8822B */
8699 #define BIT_SHIFT_VO_ADMITTED_TIME_8822B 0
8700 #define BIT_MASK_VO_ADMITTED_TIME_8822B 0xffff
8701 #define BIT_VO_ADMITTED_TIME_8822B(x) \
8702 (((x) & BIT_MASK_VO_ADMITTED_TIME_8822B) \
8703 << BIT_SHIFT_VO_ADMITTED_TIME_8822B)
8704 #define BIT_GET_VO_ADMITTED_TIME_8822B(x) \
8705 (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8822B) & \
8706 BIT_MASK_VO_ADMITTED_TIME_8822B)
8708 /* 2 REG_VI_ADMTIME_8822B */
8710 #define BIT_SHIFT_VI_ADMITTED_TIME_8822B 0
8711 #define BIT_MASK_VI_ADMITTED_TIME_8822B 0xffff
8712 #define BIT_VI_ADMITTED_TIME_8822B(x) \
8713 (((x) & BIT_MASK_VI_ADMITTED_TIME_8822B) \
8714 << BIT_SHIFT_VI_ADMITTED_TIME_8822B)
8715 #define BIT_GET_VI_ADMITTED_TIME_8822B(x) \
8716 (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8822B) & \
8717 BIT_MASK_VI_ADMITTED_TIME_8822B)
8719 /* 2 REG_BE_ADMTIME_8822B */
8721 #define BIT_SHIFT_BE_ADMITTED_TIME_8822B 0
8722 #define BIT_MASK_BE_ADMITTED_TIME_8822B 0xffff
8723 #define BIT_BE_ADMITTED_TIME_8822B(x) \
8724 (((x) & BIT_MASK_BE_ADMITTED_TIME_8822B) \
8725 << BIT_SHIFT_BE_ADMITTED_TIME_8822B)
8726 #define BIT_GET_BE_ADMITTED_TIME_8822B(x) \
8727 (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8822B) & \
8728 BIT_MASK_BE_ADMITTED_TIME_8822B)
8730 /* 2 REG_EDCA_RANDOM_GEN_8822B */
8732 #define BIT_SHIFT_RANDOM_GEN_8822B 0
8733 #define BIT_MASK_RANDOM_GEN_8822B 0xffffff
8734 #define BIT_RANDOM_GEN_8822B(x) \
8735 (((x) & BIT_MASK_RANDOM_GEN_8822B) << BIT_SHIFT_RANDOM_GEN_8822B)
8736 #define BIT_GET_RANDOM_GEN_8822B(x) \
8737 (((x) >> BIT_SHIFT_RANDOM_GEN_8822B) & BIT_MASK_RANDOM_GEN_8822B)
8739 /* 2 REG_TXCMD_NOA_SEL_8822B */
8741 #define BIT_SHIFT_NOA_SEL_8822B 4
8742 #define BIT_MASK_NOA_SEL_8822B 0x7
8743 #define BIT_NOA_SEL_8822B(x) \
8744 (((x) & BIT_MASK_NOA_SEL_8822B) << BIT_SHIFT_NOA_SEL_8822B)
8745 #define BIT_GET_NOA_SEL_8822B(x) \
8746 (((x) >> BIT_SHIFT_NOA_SEL_8822B) & BIT_MASK_NOA_SEL_8822B)
8748 #define BIT_SHIFT_TXCMD_SEG_SEL_8822B 0
8749 #define BIT_MASK_TXCMD_SEG_SEL_8822B 0xf
8750 #define BIT_TXCMD_SEG_SEL_8822B(x) \
8751 (((x) & BIT_MASK_TXCMD_SEG_SEL_8822B) << BIT_SHIFT_TXCMD_SEG_SEL_8822B)
8752 #define BIT_GET_TXCMD_SEG_SEL_8822B(x) \
8753 (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8822B) & BIT_MASK_TXCMD_SEG_SEL_8822B)
8755 /* 2 REG_NOA_PARAM_8822B */
8757 #define BIT_SHIFT_NOA_COUNT_8822B (96 & CPU_OPT_WIDTH)
8758 #define BIT_MASK_NOA_COUNT_8822B 0xff
8759 #define BIT_NOA_COUNT_8822B(x) \
8760 (((x) & BIT_MASK_NOA_COUNT_8822B) << BIT_SHIFT_NOA_COUNT_8822B)
8761 #define BIT_GET_NOA_COUNT_8822B(x) \
8762 (((x) >> BIT_SHIFT_NOA_COUNT_8822B) & BIT_MASK_NOA_COUNT_8822B)
8764 #define BIT_SHIFT_NOA_START_TIME_8822B (64 & CPU_OPT_WIDTH)
8765 #define BIT_MASK_NOA_START_TIME_8822B 0xffffffffL
8766 #define BIT_NOA_START_TIME_8822B(x) \
8767 (((x) & BIT_MASK_NOA_START_TIME_8822B) \
8768 << BIT_SHIFT_NOA_START_TIME_8822B)
8769 #define BIT_GET_NOA_START_TIME_8822B(x) \
8770 (((x) >> BIT_SHIFT_NOA_START_TIME_8822B) & \
8771 BIT_MASK_NOA_START_TIME_8822B)
8773 #define BIT_SHIFT_NOA_INTERVAL_8822B (32 & CPU_OPT_WIDTH)
8774 #define BIT_MASK_NOA_INTERVAL_8822B 0xffffffffL
8775 #define BIT_NOA_INTERVAL_8822B(x) \
8776 (((x) & BIT_MASK_NOA_INTERVAL_8822B) << BIT_SHIFT_NOA_INTERVAL_8822B)
8777 #define BIT_GET_NOA_INTERVAL_8822B(x) \
8778 (((x) >> BIT_SHIFT_NOA_INTERVAL_8822B) & BIT_MASK_NOA_INTERVAL_8822B)
8780 #define BIT_SHIFT_NOA_DURATION_8822B 0
8781 #define BIT_MASK_NOA_DURATION_8822B 0xffffffffL
8782 #define BIT_NOA_DURATION_8822B(x) \
8783 (((x) & BIT_MASK_NOA_DURATION_8822B) << BIT_SHIFT_NOA_DURATION_8822B)
8784 #define BIT_GET_NOA_DURATION_8822B(x) \
8785 (((x) >> BIT_SHIFT_NOA_DURATION_8822B) & BIT_MASK_NOA_DURATION_8822B)
8787 /* 2 REG_P2P_RST_8822B */
8788 #define BIT_P2P2_PWR_RST1_8822B BIT(5)
8789 #define BIT_P2P2_PWR_RST0_8822B BIT(4)
8790 #define BIT_P2P1_PWR_RST1_8822B BIT(3)
8791 #define BIT_P2P1_PWR_RST0_8822B BIT(2)
8792 #define BIT_P2P_PWR_RST1_V1_8822B BIT(1)
8793 #define BIT_P2P_PWR_RST0_V1_8822B BIT(0)
8795 /* 2 REG_SCHEDULER_RST_8822B */
8796 #define BIT_SYNC_CLI_8822B BIT(1)
8797 #define BIT_SCHEDULER_RST_V1_8822B BIT(0)
8799 /* 2 REG_SCH_TXCMD_8822B */
8801 #define BIT_SHIFT_SCH_TXCMD_8822B 0
8802 #define BIT_MASK_SCH_TXCMD_8822B 0xffffffffL
8803 #define BIT_SCH_TXCMD_8822B(x) \
8804 (((x) & BIT_MASK_SCH_TXCMD_8822B) << BIT_SHIFT_SCH_TXCMD_8822B)
8805 #define BIT_GET_SCH_TXCMD_8822B(x) \
8806 (((x) >> BIT_SHIFT_SCH_TXCMD_8822B) & BIT_MASK_SCH_TXCMD_8822B)
8808 /* 2 REG_PAGE5_DUMMY_8822B */
8810 /* 2 REG_CPUMGQ_TX_TIMER_8822B */
8812 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B 0
8813 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B 0xffffffffL
8814 #define BIT_CPUMGQ_TX_TIMER_V1_8822B(x) \
8815 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B) \
8816 << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B)
8817 #define BIT_GET_CPUMGQ_TX_TIMER_V1_8822B(x) \
8818 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B) & \
8819 BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B)
8821 /* 2 REG_PS_TIMER_A_8822B */
8823 #define BIT_SHIFT_PS_TIMER_A_V1_8822B 0
8824 #define BIT_MASK_PS_TIMER_A_V1_8822B 0xffffffffL
8825 #define BIT_PS_TIMER_A_V1_8822B(x) \
8826 (((x) & BIT_MASK_PS_TIMER_A_V1_8822B) << BIT_SHIFT_PS_TIMER_A_V1_8822B)
8827 #define BIT_GET_PS_TIMER_A_V1_8822B(x) \
8828 (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8822B) & BIT_MASK_PS_TIMER_A_V1_8822B)
8830 /* 2 REG_PS_TIMER_B_8822B */
8832 #define BIT_SHIFT_PS_TIMER_B_V1_8822B 0
8833 #define BIT_MASK_PS_TIMER_B_V1_8822B 0xffffffffL
8834 #define BIT_PS_TIMER_B_V1_8822B(x) \
8835 (((x) & BIT_MASK_PS_TIMER_B_V1_8822B) << BIT_SHIFT_PS_TIMER_B_V1_8822B)
8836 #define BIT_GET_PS_TIMER_B_V1_8822B(x) \
8837 (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8822B) & BIT_MASK_PS_TIMER_B_V1_8822B)
8839 /* 2 REG_PS_TIMER_C_8822B */
8841 #define BIT_SHIFT_PS_TIMER_C_V1_8822B 0
8842 #define BIT_MASK_PS_TIMER_C_V1_8822B 0xffffffffL
8843 #define BIT_PS_TIMER_C_V1_8822B(x) \
8844 (((x) & BIT_MASK_PS_TIMER_C_V1_8822B) << BIT_SHIFT_PS_TIMER_C_V1_8822B)
8845 #define BIT_GET_PS_TIMER_C_V1_8822B(x) \
8846 (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8822B) & BIT_MASK_PS_TIMER_C_V1_8822B)
8848 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8822B */
8849 #define BIT_CPUMGQ_TIMER_EN_8822B BIT(31)
8850 #define BIT_CPUMGQ_TX_EN_8822B BIT(28)
8852 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B 24
8853 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B 0x7
8854 #define BIT_CPUMGQ_TIMER_TSF_SEL_8822B(x) \
8855 (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B) \
8856 << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B)
8857 #define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8822B(x) \
8858 (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B) & \
8859 BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B)
8861 #define BIT_PS_TIMER_C_EN_8822B BIT(23)
8863 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B 16
8864 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8822B 0x7
8865 #define BIT_PS_TIMER_C_TSF_SEL_8822B(x) \
8866 (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8822B) \
8867 << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B)
8868 #define BIT_GET_PS_TIMER_C_TSF_SEL_8822B(x) \
8869 (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B) & \
8870 BIT_MASK_PS_TIMER_C_TSF_SEL_8822B)
8872 #define BIT_PS_TIMER_B_EN_8822B BIT(15)
8874 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B 8
8875 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8822B 0x7
8876 #define BIT_PS_TIMER_B_TSF_SEL_8822B(x) \
8877 (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8822B) \
8878 << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B)
8879 #define BIT_GET_PS_TIMER_B_TSF_SEL_8822B(x) \
8880 (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B) & \
8881 BIT_MASK_PS_TIMER_B_TSF_SEL_8822B)
8883 #define BIT_PS_TIMER_A_EN_8822B BIT(7)
8885 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B 0
8886 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8822B 0x7
8887 #define BIT_PS_TIMER_A_TSF_SEL_8822B(x) \
8888 (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8822B) \
8889 << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B)
8890 #define BIT_GET_PS_TIMER_A_TSF_SEL_8822B(x) \
8891 (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B) & \
8892 BIT_MASK_PS_TIMER_A_TSF_SEL_8822B)
8894 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8822B */
8896 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B 0
8897 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B 0xff
8898 #define BIT_CPUMGQ_TX_TIMER_EARLY_8822B(x) \
8899 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B) \
8900 << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B)
8901 #define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8822B(x) \
8902 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B) & \
8903 BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B)
8905 /* 2 REG_PS_TIMER_A_EARLY_8822B */
8907 #define BIT_SHIFT_PS_TIMER_A_EARLY_8822B 0
8908 #define BIT_MASK_PS_TIMER_A_EARLY_8822B 0xff
8909 #define BIT_PS_TIMER_A_EARLY_8822B(x) \
8910 (((x) & BIT_MASK_PS_TIMER_A_EARLY_8822B) \
8911 << BIT_SHIFT_PS_TIMER_A_EARLY_8822B)
8912 #define BIT_GET_PS_TIMER_A_EARLY_8822B(x) \
8913 (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8822B) & \
8914 BIT_MASK_PS_TIMER_A_EARLY_8822B)
8916 /* 2 REG_PS_TIMER_B_EARLY_8822B */
8918 #define BIT_SHIFT_PS_TIMER_B_EARLY_8822B 0
8919 #define BIT_MASK_PS_TIMER_B_EARLY_8822B 0xff
8920 #define BIT_PS_TIMER_B_EARLY_8822B(x) \
8921 (((x) & BIT_MASK_PS_TIMER_B_EARLY_8822B) \
8922 << BIT_SHIFT_PS_TIMER_B_EARLY_8822B)
8923 #define BIT_GET_PS_TIMER_B_EARLY_8822B(x) \
8924 (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8822B) & \
8925 BIT_MASK_PS_TIMER_B_EARLY_8822B)
8927 /* 2 REG_PS_TIMER_C_EARLY_8822B */
8929 #define BIT_SHIFT_PS_TIMER_C_EARLY_8822B 0
8930 #define BIT_MASK_PS_TIMER_C_EARLY_8822B 0xff
8931 #define BIT_PS_TIMER_C_EARLY_8822B(x) \
8932 (((x) & BIT_MASK_PS_TIMER_C_EARLY_8822B) \
8933 << BIT_SHIFT_PS_TIMER_C_EARLY_8822B)
8934 #define BIT_GET_PS_TIMER_C_EARLY_8822B(x) \
8935 (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8822B) & \
8936 BIT_MASK_PS_TIMER_C_EARLY_8822B)
8938 /* 2 REG_NOT_VALID_8822B */
8940 /* 2 REG_BWOPMODE_8822B (BW OPERATION MODE REGISTER) */
8942 /* 2 REG_WMAC_FWPKT_CR_8822B */
8943 #define BIT_FWEN_8822B BIT(7)
8944 #define BIT_PHYSTS_PKT_CTRL_8822B BIT(6)
8945 #define BIT_APPHDR_MIDSRCH_FAIL_8822B BIT(4)
8946 #define BIT_FWPARSING_EN_8822B BIT(3)
8948 #define BIT_SHIFT_APPEND_MHDR_LEN_8822B 0
8949 #define BIT_MASK_APPEND_MHDR_LEN_8822B 0x7
8950 #define BIT_APPEND_MHDR_LEN_8822B(x) \
8951 (((x) & BIT_MASK_APPEND_MHDR_LEN_8822B) \
8952 << BIT_SHIFT_APPEND_MHDR_LEN_8822B)
8953 #define BIT_GET_APPEND_MHDR_LEN_8822B(x) \
8954 (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8822B) & \
8955 BIT_MASK_APPEND_MHDR_LEN_8822B)
8957 /* 2 REG_WMAC_CR_8822B (WMAC CR AND APSD CONTROL REGISTER) */
8958 #define BIT_IC_MACPHY_M_8822B BIT(0)
8960 /* 2 REG_TCR_8822B (TRANSMISSION CONFIGURATION REGISTER) */
8961 #define BIT_WMAC_EN_RTS_ADDR_8822B BIT(31)
8962 #define BIT_WMAC_DISABLE_CCK_8822B BIT(30)
8963 #define BIT_WMAC_RAW_LEN_8822B BIT(29)
8964 #define BIT_WMAC_NOTX_IN_RXNDP_8822B BIT(28)
8965 #define BIT_WMAC_EN_EOF_8822B BIT(27)
8966 #define BIT_WMAC_BF_SEL_8822B BIT(26)
8967 #define BIT_WMAC_ANTMODE_SEL_8822B BIT(25)
8968 #define BIT_WMAC_TCRPWRMGT_HWCTL_8822B BIT(24)
8969 #define BIT_WMAC_SMOOTH_VAL_8822B BIT(23)
8970 #define BIT_FETCH_MPDU_AFTER_WSEC_RDY_8822B BIT(20)
8971 #define BIT_WMAC_TCR_EN_20MST_8822B BIT(19)
8972 #define BIT_WMAC_DIS_SIGTA_8822B BIT(18)
8973 #define BIT_WMAC_DIS_A2B0_8822B BIT(17)
8974 #define BIT_WMAC_MSK_SIGBCRC_8822B BIT(16)
8975 #define BIT_WMAC_TCR_ERRSTEN_3_8822B BIT(15)
8976 #define BIT_WMAC_TCR_ERRSTEN_2_8822B BIT(14)
8977 #define BIT_WMAC_TCR_ERRSTEN_1_8822B BIT(13)
8978 #define BIT_WMAC_TCR_ERRSTEN_0_8822B BIT(12)
8979 #define BIT_WMAC_TCR_TXSK_PERPKT_8822B BIT(11)
8980 #define BIT_ICV_8822B BIT(10)
8981 #define BIT_CFEND_FORMAT_8822B BIT(9)
8982 #define BIT_CRC_8822B BIT(8)
8983 #define BIT_PWRBIT_OW_EN_8822B BIT(7)
8984 #define BIT_PWR_ST_8822B BIT(6)
8985 #define BIT_WMAC_TCR_UPD_TIMIE_8822B BIT(5)
8986 #define BIT_WMAC_TCR_UPD_HGQMD_8822B BIT(4)
8987 #define BIT_VHTSIGA1_TXPS_8822B BIT(3)
8988 #define BIT_PAD_SEL_8822B BIT(2)
8989 #define BIT_DIS_GCLK_8822B BIT(1)
8991 /* 2 REG_RCR_8822B (RECEIVE CONFIGURATION REGISTER) */
8992 #define BIT_APP_FCS_8822B BIT(31)
8993 #define BIT_APP_MIC_8822B BIT(30)
8994 #define BIT_APP_ICV_8822B BIT(29)
8995 #define BIT_APP_PHYSTS_8822B BIT(28)
8996 #define BIT_APP_BASSN_8822B BIT(27)
8997 #define BIT_VHT_DACK_8822B BIT(26)
8998 #define BIT_TCPOFLD_EN_8822B BIT(25)
8999 #define BIT_ENMBID_8822B BIT(24)
9000 #define BIT_LSIGEN_8822B BIT(23)
9001 #define BIT_MFBEN_8822B BIT(22)
9002 #define BIT_DISCHKPPDLLEN_8822B BIT(21)
9003 #define BIT_PKTCTL_DLEN_8822B BIT(20)
9004 #define BIT_TIM_PARSER_EN_8822B BIT(18)
9005 #define BIT_BC_MD_EN_8822B BIT(17)
9006 #define BIT_UC_MD_EN_8822B BIT(16)
9007 #define BIT_RXSK_PERPKT_8822B BIT(15)
9008 #define BIT_HTC_LOC_CTRL_8822B BIT(14)
9009 #define BIT_RPFM_CAM_ENABLE_8822B BIT(12)
9010 #define BIT_TA_BCN_8822B BIT(11)
9011 #define BIT_DISDECMYPKT_8822B BIT(10)
9012 #define BIT_AICV_8822B BIT(9)
9013 #define BIT_ACRC32_8822B BIT(8)
9014 #define BIT_CBSSID_BCN_8822B BIT(7)
9015 #define BIT_CBSSID_DATA_8822B BIT(6)
9016 #define BIT_APWRMGT_8822B BIT(5)
9017 #define BIT_ADD3_8822B BIT(4)
9018 #define BIT_AB_8822B BIT(3)
9019 #define BIT_AM_8822B BIT(2)
9020 #define BIT_APM_8822B BIT(1)
9021 #define BIT_AAP_8822B BIT(0)
9023 /* 2 REG_RX_DRVINFO_SZ_8822B (RX DRIVER INFO SIZE REGISTER) */
9024 #define BIT_PHYSTS_PER_PKT_MODE_8822B BIT(7)
9026 #define BIT_SHIFT_DRVINFO_SZ_V1_8822B 0
9027 #define BIT_MASK_DRVINFO_SZ_V1_8822B 0xf
9028 #define BIT_DRVINFO_SZ_V1_8822B(x) \
9029 (((x) & BIT_MASK_DRVINFO_SZ_V1_8822B) << BIT_SHIFT_DRVINFO_SZ_V1_8822B)
9030 #define BIT_GET_DRVINFO_SZ_V1_8822B(x) \
9031 (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8822B) & BIT_MASK_DRVINFO_SZ_V1_8822B)
9033 /* 2 REG_RX_DLK_TIME_8822B (RX DEADLOCK TIME REGISTER) */
9035 #define BIT_SHIFT_RX_DLK_TIME_8822B 0
9036 #define BIT_MASK_RX_DLK_TIME_8822B 0xff
9037 #define BIT_RX_DLK_TIME_8822B(x) \
9038 (((x) & BIT_MASK_RX_DLK_TIME_8822B) << BIT_SHIFT_RX_DLK_TIME_8822B)
9039 #define BIT_GET_RX_DLK_TIME_8822B(x) \
9040 (((x) >> BIT_SHIFT_RX_DLK_TIME_8822B) & BIT_MASK_RX_DLK_TIME_8822B)
9042 /* 2 REG_RX_PKT_LIMIT_8822B (RX PACKET LENGTH LIMIT REGISTER) */
9044 #define BIT_SHIFT_RXPKTLMT_8822B 0
9045 #define BIT_MASK_RXPKTLMT_8822B 0x3f
9046 #define BIT_RXPKTLMT_8822B(x) \
9047 (((x) & BIT_MASK_RXPKTLMT_8822B) << BIT_SHIFT_RXPKTLMT_8822B)
9048 #define BIT_GET_RXPKTLMT_8822B(x) \
9049 (((x) >> BIT_SHIFT_RXPKTLMT_8822B) & BIT_MASK_RXPKTLMT_8822B)
9051 /* 2 REG_MACID_8822B (MAC ID REGISTER) */
9053 #define BIT_SHIFT_MACID_8822B 0
9054 #define BIT_MASK_MACID_8822B 0xffffffffffffL
9055 #define BIT_MACID_8822B(x) \
9056 (((x) & BIT_MASK_MACID_8822B) << BIT_SHIFT_MACID_8822B)
9057 #define BIT_GET_MACID_8822B(x) \
9058 (((x) >> BIT_SHIFT_MACID_8822B) & BIT_MASK_MACID_8822B)
9060 /* 2 REG_BSSID_8822B (BSSID REGISTER) */
9062 #define BIT_SHIFT_BSSID_8822B 0
9063 #define BIT_MASK_BSSID_8822B 0xffffffffffffL
9064 #define BIT_BSSID_8822B(x) \
9065 (((x) & BIT_MASK_BSSID_8822B) << BIT_SHIFT_BSSID_8822B)
9066 #define BIT_GET_BSSID_8822B(x) \
9067 (((x) >> BIT_SHIFT_BSSID_8822B) & BIT_MASK_BSSID_8822B)
9069 /* 2 REG_MAR_8822B (MULTICAST ADDRESS REGISTER) */
9071 #define BIT_SHIFT_MAR_8822B 0
9072 #define BIT_MASK_MAR_8822B 0xffffffffffffffffL
9073 #define BIT_MAR_8822B(x) (((x) & BIT_MASK_MAR_8822B) << BIT_SHIFT_MAR_8822B)
9074 #define BIT_GET_MAR_8822B(x) (((x) >> BIT_SHIFT_MAR_8822B) & BIT_MASK_MAR_8822B)
9076 /* 2 REG_MBIDCAMCFG_1_8822B (MBSSID CAM CONFIGURATION REGISTER) */
9078 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8822B 0
9079 #define BIT_MASK_MBIDCAM_RWDATA_L_8822B 0xffffffffL
9080 #define BIT_MBIDCAM_RWDATA_L_8822B(x) \
9081 (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8822B) \
9082 << BIT_SHIFT_MBIDCAM_RWDATA_L_8822B)
9083 #define BIT_GET_MBIDCAM_RWDATA_L_8822B(x) \
9084 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8822B) & \
9085 BIT_MASK_MBIDCAM_RWDATA_L_8822B)
9087 /* 2 REG_MBIDCAMCFG_2_8822B (MBSSID CAM CONFIGURATION REGISTER) */
9088 #define BIT_MBIDCAM_POLL_8822B BIT(31)
9089 #define BIT_MBIDCAM_WT_EN_8822B BIT(30)
9091 #define BIT_SHIFT_MBIDCAM_ADDR_8822B 24
9092 #define BIT_MASK_MBIDCAM_ADDR_8822B 0x1f
9093 #define BIT_MBIDCAM_ADDR_8822B(x) \
9094 (((x) & BIT_MASK_MBIDCAM_ADDR_8822B) << BIT_SHIFT_MBIDCAM_ADDR_8822B)
9095 #define BIT_GET_MBIDCAM_ADDR_8822B(x) \
9096 (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8822B) & BIT_MASK_MBIDCAM_ADDR_8822B)
9098 #define BIT_MBIDCAM_VALID_8822B BIT(23)
9099 #define BIT_LSIC_TXOP_EN_8822B BIT(17)
9100 #define BIT_CTS_EN_8822B BIT(16)
9102 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8822B 0
9103 #define BIT_MASK_MBIDCAM_RWDATA_H_8822B 0xffff
9104 #define BIT_MBIDCAM_RWDATA_H_8822B(x) \
9105 (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8822B) \
9106 << BIT_SHIFT_MBIDCAM_RWDATA_H_8822B)
9107 #define BIT_GET_MBIDCAM_RWDATA_H_8822B(x) \
9108 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8822B) & \
9109 BIT_MASK_MBIDCAM_RWDATA_H_8822B)
9111 /* 2 REG_ZLD_NUM_8822B */
9113 #define BIT_SHIFT_ZLD_NUM_8822B 0
9114 #define BIT_MASK_ZLD_NUM_8822B 0xff
9115 #define BIT_ZLD_NUM_8822B(x) \
9116 (((x) & BIT_MASK_ZLD_NUM_8822B) << BIT_SHIFT_ZLD_NUM_8822B)
9117 #define BIT_GET_ZLD_NUM_8822B(x) \
9118 (((x) >> BIT_SHIFT_ZLD_NUM_8822B) & BIT_MASK_ZLD_NUM_8822B)
9120 /* 2 REG_UDF_THSD_8822B */
9122 #define BIT_SHIFT_UDF_THSD_8822B 0
9123 #define BIT_MASK_UDF_THSD_8822B 0xff
9124 #define BIT_UDF_THSD_8822B(x) \
9125 (((x) & BIT_MASK_UDF_THSD_8822B) << BIT_SHIFT_UDF_THSD_8822B)
9126 #define BIT_GET_UDF_THSD_8822B(x) \
9127 (((x) >> BIT_SHIFT_UDF_THSD_8822B) & BIT_MASK_UDF_THSD_8822B)
9129 /* 2 REG_WMAC_TCR_TSFT_OFS_8822B */
9131 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B 0
9132 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8822B 0xffff
9133 #define BIT_WMAC_TCR_TSFT_OFS_8822B(x) \
9134 (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8822B) \
9135 << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B)
9136 #define BIT_GET_WMAC_TCR_TSFT_OFS_8822B(x) \
9137 (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B) & \
9138 BIT_MASK_WMAC_TCR_TSFT_OFS_8822B)
9140 /* 2 REG_MCU_TEST_2_V1_8822B */
9142 #define BIT_SHIFT_MCU_RSVD_2_V1_8822B 0
9143 #define BIT_MASK_MCU_RSVD_2_V1_8822B 0xffff
9144 #define BIT_MCU_RSVD_2_V1_8822B(x) \
9145 (((x) & BIT_MASK_MCU_RSVD_2_V1_8822B) << BIT_SHIFT_MCU_RSVD_2_V1_8822B)
9146 #define BIT_GET_MCU_RSVD_2_V1_8822B(x) \
9147 (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8822B) & BIT_MASK_MCU_RSVD_2_V1_8822B)
9149 /* 2 REG_WMAC_TXTIMEOUT_8822B */
9151 #define BIT_SHIFT_WMAC_TXTIMEOUT_8822B 0
9152 #define BIT_MASK_WMAC_TXTIMEOUT_8822B 0xff
9153 #define BIT_WMAC_TXTIMEOUT_8822B(x) \
9154 (((x) & BIT_MASK_WMAC_TXTIMEOUT_8822B) \
9155 << BIT_SHIFT_WMAC_TXTIMEOUT_8822B)
9156 #define BIT_GET_WMAC_TXTIMEOUT_8822B(x) \
9157 (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8822B) & \
9158 BIT_MASK_WMAC_TXTIMEOUT_8822B)
9160 /* 2 REG_STMP_THSD_8822B */
9162 #define BIT_SHIFT_STMP_THSD_8822B 0
9163 #define BIT_MASK_STMP_THSD_8822B 0xff
9164 #define BIT_STMP_THSD_8822B(x) \
9165 (((x) & BIT_MASK_STMP_THSD_8822B) << BIT_SHIFT_STMP_THSD_8822B)
9166 #define BIT_GET_STMP_THSD_8822B(x) \
9167 (((x) >> BIT_SHIFT_STMP_THSD_8822B) & BIT_MASK_STMP_THSD_8822B)
9169 /* 2 REG_MAC_SPEC_SIFS_8822B (SPECIFICATION SIFS REGISTER) */
9171 #define BIT_SHIFT_SPEC_SIFS_OFDM_8822B 8
9172 #define BIT_MASK_SPEC_SIFS_OFDM_8822B 0xff
9173 #define BIT_SPEC_SIFS_OFDM_8822B(x) \
9174 (((x) & BIT_MASK_SPEC_SIFS_OFDM_8822B) \
9175 << BIT_SHIFT_SPEC_SIFS_OFDM_8822B)
9176 #define BIT_GET_SPEC_SIFS_OFDM_8822B(x) \
9177 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8822B) & \
9178 BIT_MASK_SPEC_SIFS_OFDM_8822B)
9180 #define BIT_SHIFT_SPEC_SIFS_CCK_8822B 0
9181 #define BIT_MASK_SPEC_SIFS_CCK_8822B 0xff
9182 #define BIT_SPEC_SIFS_CCK_8822B(x) \
9183 (((x) & BIT_MASK_SPEC_SIFS_CCK_8822B) << BIT_SHIFT_SPEC_SIFS_CCK_8822B)
9184 #define BIT_GET_SPEC_SIFS_CCK_8822B(x) \
9185 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8822B) & BIT_MASK_SPEC_SIFS_CCK_8822B)
9187 /* 2 REG_USTIME_EDCA_8822B (US TIME TUNING FOR EDCA REGISTER) */
9189 #define BIT_SHIFT_USTIME_EDCA_V1_8822B 0
9190 #define BIT_MASK_USTIME_EDCA_V1_8822B 0x1ff
9191 #define BIT_USTIME_EDCA_V1_8822B(x) \
9192 (((x) & BIT_MASK_USTIME_EDCA_V1_8822B) \
9193 << BIT_SHIFT_USTIME_EDCA_V1_8822B)
9194 #define BIT_GET_USTIME_EDCA_V1_8822B(x) \
9195 (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8822B) & \
9196 BIT_MASK_USTIME_EDCA_V1_8822B)
9198 /* 2 REG_RESP_SIFS_OFDM_8822B (RESPONSE SIFS FOR OFDM REGISTER) */
9200 #define BIT_SHIFT_SIFS_R2T_OFDM_8822B 8
9201 #define BIT_MASK_SIFS_R2T_OFDM_8822B 0xff
9202 #define BIT_SIFS_R2T_OFDM_8822B(x) \
9203 (((x) & BIT_MASK_SIFS_R2T_OFDM_8822B) << BIT_SHIFT_SIFS_R2T_OFDM_8822B)
9204 #define BIT_GET_SIFS_R2T_OFDM_8822B(x) \
9205 (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8822B) & BIT_MASK_SIFS_R2T_OFDM_8822B)
9207 #define BIT_SHIFT_SIFS_T2T_OFDM_8822B 0
9208 #define BIT_MASK_SIFS_T2T_OFDM_8822B 0xff
9209 #define BIT_SIFS_T2T_OFDM_8822B(x) \
9210 (((x) & BIT_MASK_SIFS_T2T_OFDM_8822B) << BIT_SHIFT_SIFS_T2T_OFDM_8822B)
9211 #define BIT_GET_SIFS_T2T_OFDM_8822B(x) \
9212 (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8822B) & BIT_MASK_SIFS_T2T_OFDM_8822B)
9214 /* 2 REG_RESP_SIFS_CCK_8822B (RESPONSE SIFS FOR CCK REGISTER) */
9216 #define BIT_SHIFT_SIFS_R2T_CCK_8822B 8
9217 #define BIT_MASK_SIFS_R2T_CCK_8822B 0xff
9218 #define BIT_SIFS_R2T_CCK_8822B(x) \
9219 (((x) & BIT_MASK_SIFS_R2T_CCK_8822B) << BIT_SHIFT_SIFS_R2T_CCK_8822B)
9220 #define BIT_GET_SIFS_R2T_CCK_8822B(x) \
9221 (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8822B) & BIT_MASK_SIFS_R2T_CCK_8822B)
9223 #define BIT_SHIFT_SIFS_T2T_CCK_8822B 0
9224 #define BIT_MASK_SIFS_T2T_CCK_8822B 0xff
9225 #define BIT_SIFS_T2T_CCK_8822B(x) \
9226 (((x) & BIT_MASK_SIFS_T2T_CCK_8822B) << BIT_SHIFT_SIFS_T2T_CCK_8822B)
9227 #define BIT_GET_SIFS_T2T_CCK_8822B(x) \
9228 (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8822B) & BIT_MASK_SIFS_T2T_CCK_8822B)
9230 /* 2 REG_EIFS_8822B (EIFS REGISTER) */
9232 #define BIT_SHIFT_EIFS_8822B 0
9233 #define BIT_MASK_EIFS_8822B 0xffff
9234 #define BIT_EIFS_8822B(x) (((x) & BIT_MASK_EIFS_8822B) << BIT_SHIFT_EIFS_8822B)
9235 #define BIT_GET_EIFS_8822B(x) \
9236 (((x) >> BIT_SHIFT_EIFS_8822B) & BIT_MASK_EIFS_8822B)
9238 /* 2 REG_CTS2TO_8822B (CTS2 TIMEOUT REGISTER) */
9240 #define BIT_SHIFT_CTS2TO_8822B 0
9241 #define BIT_MASK_CTS2TO_8822B 0xff
9242 #define BIT_CTS2TO_8822B(x) \
9243 (((x) & BIT_MASK_CTS2TO_8822B) << BIT_SHIFT_CTS2TO_8822B)
9244 #define BIT_GET_CTS2TO_8822B(x) \
9245 (((x) >> BIT_SHIFT_CTS2TO_8822B) & BIT_MASK_CTS2TO_8822B)
9247 /* 2 REG_ACKTO_8822B (ACK TIMEOUT REGISTER) */
9249 #define BIT_SHIFT_ACKTO_8822B 0
9250 #define BIT_MASK_ACKTO_8822B 0xff
9251 #define BIT_ACKTO_8822B(x) \
9252 (((x) & BIT_MASK_ACKTO_8822B) << BIT_SHIFT_ACKTO_8822B)
9253 #define BIT_GET_ACKTO_8822B(x) \
9254 (((x) >> BIT_SHIFT_ACKTO_8822B) & BIT_MASK_ACKTO_8822B)
9256 /* 2 REG_NAV_CTRL_8822B (NAV CONTROL REGISTER) */
9258 #define BIT_SHIFT_NAV_UPPER_8822B 16
9259 #define BIT_MASK_NAV_UPPER_8822B 0xff
9260 #define BIT_NAV_UPPER_8822B(x) \
9261 (((x) & BIT_MASK_NAV_UPPER_8822B) << BIT_SHIFT_NAV_UPPER_8822B)
9262 #define BIT_GET_NAV_UPPER_8822B(x) \
9263 (((x) >> BIT_SHIFT_NAV_UPPER_8822B) & BIT_MASK_NAV_UPPER_8822B)
9265 #define BIT_SHIFT_RXMYRTS_NAV_8822B 8
9266 #define BIT_MASK_RXMYRTS_NAV_8822B 0xf
9267 #define BIT_RXMYRTS_NAV_8822B(x) \
9268 (((x) & BIT_MASK_RXMYRTS_NAV_8822B) << BIT_SHIFT_RXMYRTS_NAV_8822B)
9269 #define BIT_GET_RXMYRTS_NAV_8822B(x) \
9270 (((x) >> BIT_SHIFT_RXMYRTS_NAV_8822B) & BIT_MASK_RXMYRTS_NAV_8822B)
9272 #define BIT_SHIFT_RTSRST_8822B 0
9273 #define BIT_MASK_RTSRST_8822B 0xff
9274 #define BIT_RTSRST_8822B(x) \
9275 (((x) & BIT_MASK_RTSRST_8822B) << BIT_SHIFT_RTSRST_8822B)
9276 #define BIT_GET_RTSRST_8822B(x) \
9277 (((x) >> BIT_SHIFT_RTSRST_8822B) & BIT_MASK_RTSRST_8822B)
9279 /* 2 REG_BACAMCMD_8822B (BLOCK ACK CAM COMMAND REGISTER) */
9280 #define BIT_BACAM_POLL_8822B BIT(31)
9281 #define BIT_BACAM_RST_8822B BIT(17)
9282 #define BIT_BACAM_RW_8822B BIT(16)
9284 #define BIT_SHIFT_TXSBM_8822B 14
9285 #define BIT_MASK_TXSBM_8822B 0x3
9286 #define BIT_TXSBM_8822B(x) \
9287 (((x) & BIT_MASK_TXSBM_8822B) << BIT_SHIFT_TXSBM_8822B)
9288 #define BIT_GET_TXSBM_8822B(x) \
9289 (((x) >> BIT_SHIFT_TXSBM_8822B) & BIT_MASK_TXSBM_8822B)
9291 #define BIT_SHIFT_BACAM_ADDR_8822B 0
9292 #define BIT_MASK_BACAM_ADDR_8822B 0x3f
9293 #define BIT_BACAM_ADDR_8822B(x) \
9294 (((x) & BIT_MASK_BACAM_ADDR_8822B) << BIT_SHIFT_BACAM_ADDR_8822B)
9295 #define BIT_GET_BACAM_ADDR_8822B(x) \
9296 (((x) >> BIT_SHIFT_BACAM_ADDR_8822B) & BIT_MASK_BACAM_ADDR_8822B)
9298 /* 2 REG_BACAMCONTENT_8822B (BLOCK ACK CAM CONTENT REGISTER) */
9300 #define BIT_SHIFT_BA_CONTENT_H_8822B (32 & CPU_OPT_WIDTH)
9301 #define BIT_MASK_BA_CONTENT_H_8822B 0xffffffffL
9302 #define BIT_BA_CONTENT_H_8822B(x) \
9303 (((x) & BIT_MASK_BA_CONTENT_H_8822B) << BIT_SHIFT_BA_CONTENT_H_8822B)
9304 #define BIT_GET_BA_CONTENT_H_8822B(x) \
9305 (((x) >> BIT_SHIFT_BA_CONTENT_H_8822B) & BIT_MASK_BA_CONTENT_H_8822B)
9307 #define BIT_SHIFT_BA_CONTENT_L_8822B 0
9308 #define BIT_MASK_BA_CONTENT_L_8822B 0xffffffffL
9309 #define BIT_BA_CONTENT_L_8822B(x) \
9310 (((x) & BIT_MASK_BA_CONTENT_L_8822B) << BIT_SHIFT_BA_CONTENT_L_8822B)
9311 #define BIT_GET_BA_CONTENT_L_8822B(x) \
9312 (((x) >> BIT_SHIFT_BA_CONTENT_L_8822B) & BIT_MASK_BA_CONTENT_L_8822B)
9314 /* 2 REG_WMAC_BITMAP_CTL_8822B */
9315 #define BIT_BITMAP_VO_8822B BIT(7)
9316 #define BIT_BITMAP_VI_8822B BIT(6)
9317 #define BIT_BITMAP_BE_8822B BIT(5)
9318 #define BIT_BITMAP_BK_8822B BIT(4)
9320 #define BIT_SHIFT_BITMAP_CONDITION_8822B 2
9321 #define BIT_MASK_BITMAP_CONDITION_8822B 0x3
9322 #define BIT_BITMAP_CONDITION_8822B(x) \
9323 (((x) & BIT_MASK_BITMAP_CONDITION_8822B) \
9324 << BIT_SHIFT_BITMAP_CONDITION_8822B)
9325 #define BIT_GET_BITMAP_CONDITION_8822B(x) \
9326 (((x) >> BIT_SHIFT_BITMAP_CONDITION_8822B) & \
9327 BIT_MASK_BITMAP_CONDITION_8822B)
9329 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8822B BIT(1)
9330 #define BIT_BITMAP_FORCE_8822B BIT(0)
9332 /* 2 REG_TX_RX_8822B STATUS */
9334 #define BIT_SHIFT_RXPKT_TYPE_8822B 2
9335 #define BIT_MASK_RXPKT_TYPE_8822B 0x3f
9336 #define BIT_RXPKT_TYPE_8822B(x) \
9337 (((x) & BIT_MASK_RXPKT_TYPE_8822B) << BIT_SHIFT_RXPKT_TYPE_8822B)
9338 #define BIT_GET_RXPKT_TYPE_8822B(x) \
9339 (((x) >> BIT_SHIFT_RXPKT_TYPE_8822B) & BIT_MASK_RXPKT_TYPE_8822B)
9341 #define BIT_TXACT_IND_8822B BIT(1)
9342 #define BIT_RXACT_IND_8822B BIT(0)
9344 /* 2 REG_WMAC_BACAM_RPMEN_8822B */
9346 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B 2
9347 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8822B 0x3f
9348 #define BIT_BITMAP_SSNBK_COUNTER_8822B(x) \
9349 (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8822B) \
9350 << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B)
9351 #define BIT_GET_BITMAP_SSNBK_COUNTER_8822B(x) \
9352 (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B) & \
9353 BIT_MASK_BITMAP_SSNBK_COUNTER_8822B)
9355 #define BIT_BITMAP_EN_8822B BIT(1)
9356 #define BIT_WMAC_BACAM_RPMEN_8822B BIT(0)
9358 /* 2 REG_LBDLY_8822B (LOOPBACK DELAY REGISTER) */
9360 #define BIT_SHIFT_LBDLY_8822B 0
9361 #define BIT_MASK_LBDLY_8822B 0x1f
9362 #define BIT_LBDLY_8822B(x) \
9363 (((x) & BIT_MASK_LBDLY_8822B) << BIT_SHIFT_LBDLY_8822B)
9364 #define BIT_GET_LBDLY_8822B(x) \
9365 (((x) >> BIT_SHIFT_LBDLY_8822B) & BIT_MASK_LBDLY_8822B)
9367 /* 2 REG_RXERR_RPT_8822B (RX ERROR REPORT REGISTER) */
9369 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B 28
9370 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B 0xf
9371 #define BIT_RXERR_RPT_SEL_V1_3_0_8822B(x) \
9372 (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B) \
9373 << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B)
9374 #define BIT_GET_RXERR_RPT_SEL_V1_3_0_8822B(x) \
9375 (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B) & \
9376 BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B)
9378 #define BIT_RXERR_RPT_RST_8822B BIT(27)
9379 #define BIT_RXERR_RPT_SEL_V1_4_8822B BIT(26)
9380 #define BIT_W1S_8822B BIT(23)
9381 #define BIT_UD_SELECT_BSSID_8822B BIT(22)
9383 #define BIT_SHIFT_UD_SUB_TYPE_8822B 18
9384 #define BIT_MASK_UD_SUB_TYPE_8822B 0xf
9385 #define BIT_UD_SUB_TYPE_8822B(x) \
9386 (((x) & BIT_MASK_UD_SUB_TYPE_8822B) << BIT_SHIFT_UD_SUB_TYPE_8822B)
9387 #define BIT_GET_UD_SUB_TYPE_8822B(x) \
9388 (((x) >> BIT_SHIFT_UD_SUB_TYPE_8822B) & BIT_MASK_UD_SUB_TYPE_8822B)
9390 #define BIT_SHIFT_UD_TYPE_8822B 16
9391 #define BIT_MASK_UD_TYPE_8822B 0x3
9392 #define BIT_UD_TYPE_8822B(x) \
9393 (((x) & BIT_MASK_UD_TYPE_8822B) << BIT_SHIFT_UD_TYPE_8822B)
9394 #define BIT_GET_UD_TYPE_8822B(x) \
9395 (((x) >> BIT_SHIFT_UD_TYPE_8822B) & BIT_MASK_UD_TYPE_8822B)
9397 #define BIT_SHIFT_RPT_COUNTER_8822B 0
9398 #define BIT_MASK_RPT_COUNTER_8822B 0xffff
9399 #define BIT_RPT_COUNTER_8822B(x) \
9400 (((x) & BIT_MASK_RPT_COUNTER_8822B) << BIT_SHIFT_RPT_COUNTER_8822B)
9401 #define BIT_GET_RPT_COUNTER_8822B(x) \
9402 (((x) >> BIT_SHIFT_RPT_COUNTER_8822B) & BIT_MASK_RPT_COUNTER_8822B)
9404 /* 2 REG_WMAC_TRXPTCL_CTL_8822B (WMAC TX/RX PROTOCOL CONTROL REGISTER) */
9406 #define BIT_SHIFT_ACKBA_TYPSEL_8822B (60 & CPU_OPT_WIDTH)
9407 #define BIT_MASK_ACKBA_TYPSEL_8822B 0xf
9408 #define BIT_ACKBA_TYPSEL_8822B(x) \
9409 (((x) & BIT_MASK_ACKBA_TYPSEL_8822B) << BIT_SHIFT_ACKBA_TYPSEL_8822B)
9410 #define BIT_GET_ACKBA_TYPSEL_8822B(x) \
9411 (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8822B) & BIT_MASK_ACKBA_TYPSEL_8822B)
9413 #define BIT_SHIFT_ACKBA_ACKPCHK_8822B (56 & CPU_OPT_WIDTH)
9414 #define BIT_MASK_ACKBA_ACKPCHK_8822B 0xf
9415 #define BIT_ACKBA_ACKPCHK_8822B(x) \
9416 (((x) & BIT_MASK_ACKBA_ACKPCHK_8822B) << BIT_SHIFT_ACKBA_ACKPCHK_8822B)
9417 #define BIT_GET_ACKBA_ACKPCHK_8822B(x) \
9418 (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8822B) & BIT_MASK_ACKBA_ACKPCHK_8822B)
9420 #define BIT_SHIFT_ACKBAR_TYPESEL_8822B (48 & CPU_OPT_WIDTH)
9421 #define BIT_MASK_ACKBAR_TYPESEL_8822B 0xff
9422 #define BIT_ACKBAR_TYPESEL_8822B(x) \
9423 (((x) & BIT_MASK_ACKBAR_TYPESEL_8822B) \
9424 << BIT_SHIFT_ACKBAR_TYPESEL_8822B)
9425 #define BIT_GET_ACKBAR_TYPESEL_8822B(x) \
9426 (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8822B) & \
9427 BIT_MASK_ACKBAR_TYPESEL_8822B)
9429 #define BIT_SHIFT_ACKBAR_ACKPCHK_8822B (44 & CPU_OPT_WIDTH)
9430 #define BIT_MASK_ACKBAR_ACKPCHK_8822B 0xf
9431 #define BIT_ACKBAR_ACKPCHK_8822B(x) \
9432 (((x) & BIT_MASK_ACKBAR_ACKPCHK_8822B) \
9433 << BIT_SHIFT_ACKBAR_ACKPCHK_8822B)
9434 #define BIT_GET_ACKBAR_ACKPCHK_8822B(x) \
9435 (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8822B) & \
9436 BIT_MASK_ACKBAR_ACKPCHK_8822B)
9438 #define BIT_RXBA_IGNOREA2_8822B BIT(42)
9439 #define BIT_EN_SAVE_ALL_TXOPADDR_8822B BIT(41)
9440 #define BIT_EN_TXCTS_TO_TXOPOWNER_INRXNAV_8822B BIT(40)
9441 #define BIT_DIS_TXBA_AMPDUFCSERR_8822B BIT(39)
9442 #define BIT_DIS_TXBA_RXBARINFULL_8822B BIT(38)
9443 #define BIT_DIS_TXCFE_INFULL_8822B BIT(37)
9444 #define BIT_DIS_TXCTS_INFULL_8822B BIT(36)
9445 #define BIT_EN_TXACKBA_IN_TX_RDG_8822B BIT(35)
9446 #define BIT_EN_TXACKBA_IN_TXOP_8822B BIT(34)
9447 #define BIT_EN_TXCTS_IN_RXNAV_8822B BIT(33)
9448 #define BIT_EN_TXCTS_INTXOP_8822B BIT(32)
9449 #define BIT_BLK_EDCA_BBSLP_8822B BIT(31)
9450 #define BIT_BLK_EDCA_BBSBY_8822B BIT(30)
9451 #define BIT_ACKTO_BLOCK_SCH_EN_8822B BIT(27)
9452 #define BIT_EIFS_BLOCK_SCH_EN_8822B BIT(26)
9453 #define BIT_PLCPCHK_RST_EIFS_8822B BIT(25)
9454 #define BIT_CCA_RST_EIFS_8822B BIT(24)
9455 #define BIT_DIS_UPD_MYRXPKTNAV_8822B BIT(23)
9456 #define BIT_EARLY_TXBA_8822B BIT(22)
9458 #define BIT_SHIFT_RESP_CHNBUSY_8822B 20
9459 #define BIT_MASK_RESP_CHNBUSY_8822B 0x3
9460 #define BIT_RESP_CHNBUSY_8822B(x) \
9461 (((x) & BIT_MASK_RESP_CHNBUSY_8822B) << BIT_SHIFT_RESP_CHNBUSY_8822B)
9462 #define BIT_GET_RESP_CHNBUSY_8822B(x) \
9463 (((x) >> BIT_SHIFT_RESP_CHNBUSY_8822B) & BIT_MASK_RESP_CHNBUSY_8822B)
9465 #define BIT_RESP_DCTS_EN_8822B BIT(19)
9466 #define BIT_RESP_DCFE_EN_8822B BIT(18)
9467 #define BIT_RESP_SPLCPEN_8822B BIT(17)
9468 #define BIT_RESP_SGIEN_8822B BIT(16)
9469 #define BIT_RESP_LDPC_EN_8822B BIT(15)
9470 #define BIT_DIS_RESP_ACKINCCA_8822B BIT(14)
9471 #define BIT_DIS_RESP_CTSINCCA_8822B BIT(13)
9473 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B 10
9474 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B 0x7
9475 #define BIT_R_WMAC_SECOND_CCA_TIMER_8822B(x) \
9476 (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B) \
9477 << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B)
9478 #define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8822B(x) \
9479 (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B) & \
9480 BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B)
9482 #define BIT_SHIFT_RFMOD_8822B 7
9483 #define BIT_MASK_RFMOD_8822B 0x3
9484 #define BIT_RFMOD_8822B(x) \
9485 (((x) & BIT_MASK_RFMOD_8822B) << BIT_SHIFT_RFMOD_8822B)
9486 #define BIT_GET_RFMOD_8822B(x) \
9487 (((x) >> BIT_SHIFT_RFMOD_8822B) & BIT_MASK_RFMOD_8822B)
9489 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B 5
9490 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8822B 0x3
9491 #define BIT_RESP_CTS_DYNBW_SEL_8822B(x) \
9492 (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8822B) \
9493 << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B)
9494 #define BIT_GET_RESP_CTS_DYNBW_SEL_8822B(x) \
9495 (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B) & \
9496 BIT_MASK_RESP_CTS_DYNBW_SEL_8822B)
9498 #define BIT_DLY_TX_WAIT_RXANTSEL_8822B BIT(4)
9499 #define BIT_TXRESP_BY_RXANTSEL_8822B BIT(3)
9501 #define BIT_SHIFT_ORIG_DCTS_CHK_8822B 0
9502 #define BIT_MASK_ORIG_DCTS_CHK_8822B 0x3
9503 #define BIT_ORIG_DCTS_CHK_8822B(x) \
9504 (((x) & BIT_MASK_ORIG_DCTS_CHK_8822B) << BIT_SHIFT_ORIG_DCTS_CHK_8822B)
9505 #define BIT_GET_ORIG_DCTS_CHK_8822B(x) \
9506 (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8822B) & BIT_MASK_ORIG_DCTS_CHK_8822B)
9508 /* 2 REG_CAMCMD_8822B (CAM COMMAND REGISTER) */
9509 #define BIT_SECCAM_POLLING_8822B BIT(31)
9510 #define BIT_SECCAM_CLR_8822B BIT(30)
9511 #define BIT_MFBCAM_CLR_8822B BIT(29)
9512 #define BIT_SECCAM_WE_8822B BIT(16)
9514 #define BIT_SHIFT_SECCAM_ADDR_V2_8822B 0
9515 #define BIT_MASK_SECCAM_ADDR_V2_8822B 0x3ff
9516 #define BIT_SECCAM_ADDR_V2_8822B(x) \
9517 (((x) & BIT_MASK_SECCAM_ADDR_V2_8822B) \
9518 << BIT_SHIFT_SECCAM_ADDR_V2_8822B)
9519 #define BIT_GET_SECCAM_ADDR_V2_8822B(x) \
9520 (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8822B) & \
9521 BIT_MASK_SECCAM_ADDR_V2_8822B)
9523 /* 2 REG_CAMWRITE_8822B (CAM WRITE REGISTER) */
9525 #define BIT_SHIFT_CAMW_DATA_8822B 0
9526 #define BIT_MASK_CAMW_DATA_8822B 0xffffffffL
9527 #define BIT_CAMW_DATA_8822B(x) \
9528 (((x) & BIT_MASK_CAMW_DATA_8822B) << BIT_SHIFT_CAMW_DATA_8822B)
9529 #define BIT_GET_CAMW_DATA_8822B(x) \
9530 (((x) >> BIT_SHIFT_CAMW_DATA_8822B) & BIT_MASK_CAMW_DATA_8822B)
9532 /* 2 REG_CAMREAD_8822B (CAM READ REGISTER) */
9534 #define BIT_SHIFT_CAMR_DATA_8822B 0
9535 #define BIT_MASK_CAMR_DATA_8822B 0xffffffffL
9536 #define BIT_CAMR_DATA_8822B(x) \
9537 (((x) & BIT_MASK_CAMR_DATA_8822B) << BIT_SHIFT_CAMR_DATA_8822B)
9538 #define BIT_GET_CAMR_DATA_8822B(x) \
9539 (((x) >> BIT_SHIFT_CAMR_DATA_8822B) & BIT_MASK_CAMR_DATA_8822B)
9541 /* 2 REG_CAMDBG_8822B (CAM DEBUG REGISTER) */
9542 #define BIT_SECCAM_INFO_8822B BIT(31)
9543 #define BIT_SEC_KEYFOUND_8822B BIT(15)
9545 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8822B 12
9546 #define BIT_MASK_CAMDBG_SEC_TYPE_8822B 0x7
9547 #define BIT_CAMDBG_SEC_TYPE_8822B(x) \
9548 (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8822B) \
9549 << BIT_SHIFT_CAMDBG_SEC_TYPE_8822B)
9550 #define BIT_GET_CAMDBG_SEC_TYPE_8822B(x) \
9551 (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8822B) & \
9552 BIT_MASK_CAMDBG_SEC_TYPE_8822B)
9554 #define BIT_CAMDBG_EXT_SECTYPE_8822B BIT(11)
9556 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B 5
9557 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B 0x1f
9558 #define BIT_CAMDBG_MIC_KEY_IDX_8822B(x) \
9559 (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B) \
9560 << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B)
9561 #define BIT_GET_CAMDBG_MIC_KEY_IDX_8822B(x) \
9562 (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B) & \
9563 BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B)
9565 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B 0
9566 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B 0x1f
9567 #define BIT_CAMDBG_SEC_KEY_IDX_8822B(x) \
9568 (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B) \
9569 << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B)
9570 #define BIT_GET_CAMDBG_SEC_KEY_IDX_8822B(x) \
9571 (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B) & \
9572 BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B)
9574 /* 2 REG_RXFILTER_ACTION_1_8822B */
9576 #define BIT_SHIFT_RXFILTER_ACTION_1_8822B 0
9577 #define BIT_MASK_RXFILTER_ACTION_1_8822B 0xff
9578 #define BIT_RXFILTER_ACTION_1_8822B(x) \
9579 (((x) & BIT_MASK_RXFILTER_ACTION_1_8822B) \
9580 << BIT_SHIFT_RXFILTER_ACTION_1_8822B)
9581 #define BIT_GET_RXFILTER_ACTION_1_8822B(x) \
9582 (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8822B) & \
9583 BIT_MASK_RXFILTER_ACTION_1_8822B)
9585 /* 2 REG_RXFILTER_CATEGORY_1_8822B */
9587 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8822B 0
9588 #define BIT_MASK_RXFILTER_CATEGORY_1_8822B 0xff
9589 #define BIT_RXFILTER_CATEGORY_1_8822B(x) \
9590 (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8822B) \
9591 << BIT_SHIFT_RXFILTER_CATEGORY_1_8822B)
9592 #define BIT_GET_RXFILTER_CATEGORY_1_8822B(x) \
9593 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8822B) & \
9594 BIT_MASK_RXFILTER_CATEGORY_1_8822B)
9596 /* 2 REG_SECCFG_8822B (SECURITY CONFIGURATION REGISTER) */
9597 #define BIT_DIS_GCLK_WAPI_8822B BIT(15)
9598 #define BIT_DIS_GCLK_AES_8822B BIT(14)
9599 #define BIT_DIS_GCLK_TKIP_8822B BIT(13)
9600 #define BIT_AES_SEL_QC_1_8822B BIT(12)
9601 #define BIT_AES_SEL_QC_0_8822B BIT(11)
9602 #define BIT_CHK_BMC_8822B BIT(9)
9603 #define BIT_CHK_KEYID_8822B BIT(8)
9604 #define BIT_RXBCUSEDK_8822B BIT(7)
9605 #define BIT_TXBCUSEDK_8822B BIT(6)
9606 #define BIT_NOSKMC_8822B BIT(5)
9607 #define BIT_SKBYA2_8822B BIT(4)
9608 #define BIT_RXDEC_8822B BIT(3)
9609 #define BIT_TXENC_8822B BIT(2)
9610 #define BIT_RXUHUSEDK_8822B BIT(1)
9611 #define BIT_TXUHUSEDK_8822B BIT(0)
9613 /* 2 REG_RXFILTER_ACTION_3_8822B */
9615 #define BIT_SHIFT_RXFILTER_ACTION_3_8822B 0
9616 #define BIT_MASK_RXFILTER_ACTION_3_8822B 0xff
9617 #define BIT_RXFILTER_ACTION_3_8822B(x) \
9618 (((x) & BIT_MASK_RXFILTER_ACTION_3_8822B) \
9619 << BIT_SHIFT_RXFILTER_ACTION_3_8822B)
9620 #define BIT_GET_RXFILTER_ACTION_3_8822B(x) \
9621 (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8822B) & \
9622 BIT_MASK_RXFILTER_ACTION_3_8822B)
9624 /* 2 REG_RXFILTER_CATEGORY_3_8822B */
9626 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8822B 0
9627 #define BIT_MASK_RXFILTER_CATEGORY_3_8822B 0xff
9628 #define BIT_RXFILTER_CATEGORY_3_8822B(x) \
9629 (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8822B) \
9630 << BIT_SHIFT_RXFILTER_CATEGORY_3_8822B)
9631 #define BIT_GET_RXFILTER_CATEGORY_3_8822B(x) \
9632 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8822B) & \
9633 BIT_MASK_RXFILTER_CATEGORY_3_8822B)
9635 /* 2 REG_RXFILTER_ACTION_2_8822B */
9637 #define BIT_SHIFT_RXFILTER_ACTION_2_8822B 0
9638 #define BIT_MASK_RXFILTER_ACTION_2_8822B 0xff
9639 #define BIT_RXFILTER_ACTION_2_8822B(x) \
9640 (((x) & BIT_MASK_RXFILTER_ACTION_2_8822B) \
9641 << BIT_SHIFT_RXFILTER_ACTION_2_8822B)
9642 #define BIT_GET_RXFILTER_ACTION_2_8822B(x) \
9643 (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8822B) & \
9644 BIT_MASK_RXFILTER_ACTION_2_8822B)
9646 /* 2 REG_RXFILTER_CATEGORY_2_8822B */
9648 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8822B 0
9649 #define BIT_MASK_RXFILTER_CATEGORY_2_8822B 0xff
9650 #define BIT_RXFILTER_CATEGORY_2_8822B(x) \
9651 (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8822B) \
9652 << BIT_SHIFT_RXFILTER_CATEGORY_2_8822B)
9653 #define BIT_GET_RXFILTER_CATEGORY_2_8822B(x) \
9654 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8822B) & \
9655 BIT_MASK_RXFILTER_CATEGORY_2_8822B)
9657 /* 2 REG_RXFLTMAP4_8822B (RX FILTER MAP GROUP 4) */
9658 #define BIT_CTRLFLT15EN_FW_8822B BIT(15)
9659 #define BIT_CTRLFLT14EN_FW_8822B BIT(14)
9660 #define BIT_CTRLFLT13EN_FW_8822B BIT(13)
9661 #define BIT_CTRLFLT12EN_FW_8822B BIT(12)
9662 #define BIT_CTRLFLT11EN_FW_8822B BIT(11)
9663 #define BIT_CTRLFLT10EN_FW_8822B BIT(10)
9664 #define BIT_CTRLFLT9EN_FW_8822B BIT(9)
9665 #define BIT_CTRLFLT8EN_FW_8822B BIT(8)
9666 #define BIT_CTRLFLT7EN_FW_8822B BIT(7)
9667 #define BIT_CTRLFLT6EN_FW_8822B BIT(6)
9668 #define BIT_CTRLFLT5EN_FW_8822B BIT(5)
9669 #define BIT_CTRLFLT4EN_FW_8822B BIT(4)
9670 #define BIT_CTRLFLT3EN_FW_8822B BIT(3)
9671 #define BIT_CTRLFLT2EN_FW_8822B BIT(2)
9672 #define BIT_CTRLFLT1EN_FW_8822B BIT(1)
9673 #define BIT_CTRLFLT0EN_FW_8822B BIT(0)
9675 /* 2 REG_RXFLTMAP3_8822B (RX FILTER MAP GROUP 3) */
9676 #define BIT_MGTFLT15EN_FW_8822B BIT(15)
9677 #define BIT_MGTFLT14EN_FW_8822B BIT(14)
9678 #define BIT_MGTFLT13EN_FW_8822B BIT(13)
9679 #define BIT_MGTFLT12EN_FW_8822B BIT(12)
9680 #define BIT_MGTFLT11EN_FW_8822B BIT(11)
9681 #define BIT_MGTFLT10EN_FW_8822B BIT(10)
9682 #define BIT_MGTFLT9EN_FW_8822B BIT(9)
9683 #define BIT_MGTFLT8EN_FW_8822B BIT(8)
9684 #define BIT_MGTFLT7EN_FW_8822B BIT(7)
9685 #define BIT_MGTFLT6EN_FW_8822B BIT(6)
9686 #define BIT_MGTFLT5EN_FW_8822B BIT(5)
9687 #define BIT_MGTFLT4EN_FW_8822B BIT(4)
9688 #define BIT_MGTFLT3EN_FW_8822B BIT(3)
9689 #define BIT_MGTFLT2EN_FW_8822B BIT(2)
9690 #define BIT_MGTFLT1EN_FW_8822B BIT(1)
9691 #define BIT_MGTFLT0EN_FW_8822B BIT(0)
9693 /* 2 REG_RXFLTMAP6_8822B (RX FILTER MAP GROUP 3) */
9694 #define BIT_ACTIONFLT15EN_FW_8822B BIT(15)
9695 #define BIT_ACTIONFLT14EN_FW_8822B BIT(14)
9696 #define BIT_ACTIONFLT13EN_FW_8822B BIT(13)
9697 #define BIT_ACTIONFLT12EN_FW_8822B BIT(12)
9698 #define BIT_ACTIONFLT11EN_FW_8822B BIT(11)
9699 #define BIT_ACTIONFLT10EN_FW_8822B BIT(10)
9700 #define BIT_ACTIONFLT9EN_FW_8822B BIT(9)
9701 #define BIT_ACTIONFLT8EN_FW_8822B BIT(8)
9702 #define BIT_ACTIONFLT7EN_FW_8822B BIT(7)
9703 #define BIT_ACTIONFLT6EN_FW_8822B BIT(6)
9704 #define BIT_ACTIONFLT5EN_FW_8822B BIT(5)
9705 #define BIT_ACTIONFLT4EN_FW_8822B BIT(4)
9706 #define BIT_ACTIONFLT3EN_FW_8822B BIT(3)
9707 #define BIT_ACTIONFLT2EN_FW_8822B BIT(2)
9708 #define BIT_ACTIONFLT1EN_FW_8822B BIT(1)
9709 #define BIT_ACTIONFLT0EN_FW_8822B BIT(0)
9711 /* 2 REG_RXFLTMAP5_8822B (RX FILTER MAP GROUP 3) */
9712 #define BIT_DATAFLT15EN_FW_8822B BIT(15)
9713 #define BIT_DATAFLT14EN_FW_8822B BIT(14)
9714 #define BIT_DATAFLT13EN_FW_8822B BIT(13)
9715 #define BIT_DATAFLT12EN_FW_8822B BIT(12)
9716 #define BIT_DATAFLT11EN_FW_8822B BIT(11)
9717 #define BIT_DATAFLT10EN_FW_8822B BIT(10)
9718 #define BIT_DATAFLT9EN_FW_8822B BIT(9)
9719 #define BIT_DATAFLT8EN_FW_8822B BIT(8)
9720 #define BIT_DATAFLT7EN_FW_8822B BIT(7)
9721 #define BIT_DATAFLT6EN_FW_8822B BIT(6)
9722 #define BIT_DATAFLT5EN_FW_8822B BIT(5)
9723 #define BIT_DATAFLT4EN_FW_8822B BIT(4)
9724 #define BIT_DATAFLT3EN_FW_8822B BIT(3)
9725 #define BIT_DATAFLT2EN_FW_8822B BIT(2)
9726 #define BIT_DATAFLT1EN_FW_8822B BIT(1)
9727 #define BIT_DATAFLT0EN_FW_8822B BIT(0)
9729 /* 2 REG_WMMPS_UAPSD_TID_8822B (WMM POWER SAVE UAPSD TID REGISTER) */
9730 #define BIT_WMMPS_UAPSD_TID7_8822B BIT(7)
9731 #define BIT_WMMPS_UAPSD_TID6_8822B BIT(6)
9732 #define BIT_WMMPS_UAPSD_TID5_8822B BIT(5)
9733 #define BIT_WMMPS_UAPSD_TID4_8822B BIT(4)
9734 #define BIT_WMMPS_UAPSD_TID3_8822B BIT(3)
9735 #define BIT_WMMPS_UAPSD_TID2_8822B BIT(2)
9736 #define BIT_WMMPS_UAPSD_TID1_8822B BIT(1)
9737 #define BIT_WMMPS_UAPSD_TID0_8822B BIT(0)
9739 /* 2 REG_PS_RX_INFO_8822B (POWER SAVE RX INFORMATION REGISTER) */
9741 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B 5
9742 #define BIT_MASK_PORTSEL__PS_RX_INFO_8822B 0x7
9743 #define BIT_PORTSEL__PS_RX_INFO_8822B(x) \
9744 (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8822B) \
9745 << BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B)
9746 #define BIT_GET_PORTSEL__PS_RX_INFO_8822B(x) \
9747 (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B) & \
9748 BIT_MASK_PORTSEL__PS_RX_INFO_8822B)
9750 #define BIT_RXCTRLIN0_8822B BIT(4)
9751 #define BIT_RXMGTIN0_8822B BIT(3)
9752 #define BIT_RXDATAIN2_8822B BIT(2)
9753 #define BIT_RXDATAIN1_8822B BIT(1)
9754 #define BIT_RXDATAIN0_8822B BIT(0)
9756 /* 2 REG_NAN_RX_TSF_FILTER_8822B(NAN_RX_TSF_ADDRESS_FILTER) */
9757 #define BIT_CHK_TSF_TA_8822B BIT(2)
9758 #define BIT_CHK_TSF_CBSSID_8822B BIT(1)
9759 #define BIT_CHK_TSF_EN_8822B BIT(0)
9761 /* 2 REG_WOW_CTRL_8822B (WAKE ON WLAN CONTROL REGISTER) */
9763 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B 6
9764 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8822B 0x3
9765 #define BIT_PSF_BSSIDSEL_B2B1_8822B(x) \
9766 (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8822B) \
9767 << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B)
9768 #define BIT_GET_PSF_BSSIDSEL_B2B1_8822B(x) \
9769 (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B) & \
9770 BIT_MASK_PSF_BSSIDSEL_B2B1_8822B)
9772 #define BIT_WOWHCI_8822B BIT(5)
9773 #define BIT_PSF_BSSIDSEL_B0_8822B BIT(4)
9774 #define BIT_UWF_8822B BIT(3)
9775 #define BIT_MAGIC_8822B BIT(2)
9776 #define BIT_WOWEN_8822B BIT(1)
9777 #define BIT_FORCE_WAKEUP_8822B BIT(0)
9779 /* 2 REG_LPNAV_CTRL_8822B (LOW POWER NAV CONTROL REGISTER) */
9780 #define BIT_LPNAV_EN_8822B BIT(31)
9782 #define BIT_SHIFT_LPNAV_EARLY_8822B 16
9783 #define BIT_MASK_LPNAV_EARLY_8822B 0x7fff
9784 #define BIT_LPNAV_EARLY_8822B(x) \
9785 (((x) & BIT_MASK_LPNAV_EARLY_8822B) << BIT_SHIFT_LPNAV_EARLY_8822B)
9786 #define BIT_GET_LPNAV_EARLY_8822B(x) \
9787 (((x) >> BIT_SHIFT_LPNAV_EARLY_8822B) & BIT_MASK_LPNAV_EARLY_8822B)
9789 #define BIT_SHIFT_LPNAV_TH_8822B 0
9790 #define BIT_MASK_LPNAV_TH_8822B 0xffff
9791 #define BIT_LPNAV_TH_8822B(x) \
9792 (((x) & BIT_MASK_LPNAV_TH_8822B) << BIT_SHIFT_LPNAV_TH_8822B)
9793 #define BIT_GET_LPNAV_TH_8822B(x) \
9794 (((x) >> BIT_SHIFT_LPNAV_TH_8822B) & BIT_MASK_LPNAV_TH_8822B)
9796 /* 2 REG_WKFMCAM_CMD_8822B (WAKEUP FRAME CAM COMMAND REGISTER) */
9797 #define BIT_WKFCAM_POLLING_V1_8822B BIT(31)
9798 #define BIT_WKFCAM_CLR_V1_8822B BIT(30)
9799 #define BIT_WKFCAM_WE_8822B BIT(16)
9801 #define BIT_SHIFT_WKFCAM_ADDR_V2_8822B 8
9802 #define BIT_MASK_WKFCAM_ADDR_V2_8822B 0xff
9803 #define BIT_WKFCAM_ADDR_V2_8822B(x) \
9804 (((x) & BIT_MASK_WKFCAM_ADDR_V2_8822B) \
9805 << BIT_SHIFT_WKFCAM_ADDR_V2_8822B)
9806 #define BIT_GET_WKFCAM_ADDR_V2_8822B(x) \
9807 (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8822B) & \
9808 BIT_MASK_WKFCAM_ADDR_V2_8822B)
9810 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B 0
9811 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8822B 0xff
9812 #define BIT_WKFCAM_CAM_NUM_V1_8822B(x) \
9813 (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8822B) \
9814 << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B)
9815 #define BIT_GET_WKFCAM_CAM_NUM_V1_8822B(x) \
9816 (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B) & \
9817 BIT_MASK_WKFCAM_CAM_NUM_V1_8822B)
9819 /* 2 REG_WKFMCAM_RWD_8822B (WAKEUP FRAME READ/WRITE DATA) */
9821 #define BIT_SHIFT_WKFMCAM_RWD_8822B 0
9822 #define BIT_MASK_WKFMCAM_RWD_8822B 0xffffffffL
9823 #define BIT_WKFMCAM_RWD_8822B(x) \
9824 (((x) & BIT_MASK_WKFMCAM_RWD_8822B) << BIT_SHIFT_WKFMCAM_RWD_8822B)
9825 #define BIT_GET_WKFMCAM_RWD_8822B(x) \
9826 (((x) >> BIT_SHIFT_WKFMCAM_RWD_8822B) & BIT_MASK_WKFMCAM_RWD_8822B)
9828 /* 2 REG_RXFLTMAP1_8822B (RX FILTER MAP GROUP 1) */
9829 #define BIT_CTRLFLT15EN_8822B BIT(15)
9830 #define BIT_CTRLFLT14EN_8822B BIT(14)
9831 #define BIT_CTRLFLT13EN_8822B BIT(13)
9832 #define BIT_CTRLFLT12EN_8822B BIT(12)
9833 #define BIT_CTRLFLT11EN_8822B BIT(11)
9834 #define BIT_CTRLFLT10EN_8822B BIT(10)
9835 #define BIT_CTRLFLT9EN_8822B BIT(9)
9836 #define BIT_CTRLFLT8EN_8822B BIT(8)
9837 #define BIT_CTRLFLT7EN_8822B BIT(7)
9838 #define BIT_CTRLFLT6EN_8822B BIT(6)
9839 #define BIT_CTRLFLT5EN_8822B BIT(5)
9840 #define BIT_CTRLFLT4EN_8822B BIT(4)
9841 #define BIT_CTRLFLT3EN_8822B BIT(3)
9842 #define BIT_CTRLFLT2EN_8822B BIT(2)
9843 #define BIT_CTRLFLT1EN_8822B BIT(1)
9844 #define BIT_CTRLFLT0EN_8822B BIT(0)
9846 /* 2 REG_RXFLTMAP0_8822B (RX FILTER MAP GROUP 0) */
9847 #define BIT_MGTFLT15EN_8822B BIT(15)
9848 #define BIT_MGTFLT14EN_8822B BIT(14)
9849 #define BIT_MGTFLT13EN_8822B BIT(13)
9850 #define BIT_MGTFLT12EN_8822B BIT(12)
9851 #define BIT_MGTFLT11EN_8822B BIT(11)
9852 #define BIT_MGTFLT10EN_8822B BIT(10)
9853 #define BIT_MGTFLT9EN_8822B BIT(9)
9854 #define BIT_MGTFLT8EN_8822B BIT(8)
9855 #define BIT_MGTFLT7EN_8822B BIT(7)
9856 #define BIT_MGTFLT6EN_8822B BIT(6)
9857 #define BIT_MGTFLT5EN_8822B BIT(5)
9858 #define BIT_MGTFLT4EN_8822B BIT(4)
9859 #define BIT_MGTFLT3EN_8822B BIT(3)
9860 #define BIT_MGTFLT2EN_8822B BIT(2)
9861 #define BIT_MGTFLT1EN_8822B BIT(1)
9862 #define BIT_MGTFLT0EN_8822B BIT(0)
9864 /* 2 REG_NOT_VALID_8822B */
9866 /* 2 REG_RXFLTMAP_8822B (RX FILTER MAP GROUP 2) */
9867 #define BIT_DATAFLT15EN_8822B BIT(15)
9868 #define BIT_DATAFLT14EN_8822B BIT(14)
9869 #define BIT_DATAFLT13EN_8822B BIT(13)
9870 #define BIT_DATAFLT12EN_8822B BIT(12)
9871 #define BIT_DATAFLT11EN_8822B BIT(11)
9872 #define BIT_DATAFLT10EN_8822B BIT(10)
9873 #define BIT_DATAFLT9EN_8822B BIT(9)
9874 #define BIT_DATAFLT8EN_8822B BIT(8)
9875 #define BIT_DATAFLT7EN_8822B BIT(7)
9876 #define BIT_DATAFLT6EN_8822B BIT(6)
9877 #define BIT_DATAFLT5EN_8822B BIT(5)
9878 #define BIT_DATAFLT4EN_8822B BIT(4)
9879 #define BIT_DATAFLT3EN_8822B BIT(3)
9880 #define BIT_DATAFLT2EN_8822B BIT(2)
9881 #define BIT_DATAFLT1EN_8822B BIT(1)
9882 #define BIT_DATAFLT0EN_8822B BIT(0)
9884 /* 2 REG_BCN_PSR_RPT_8822B (BEACON PARSER REPORT REGISTER) */
9886 #define BIT_SHIFT_DTIM_CNT_8822B 24
9887 #define BIT_MASK_DTIM_CNT_8822B 0xff
9888 #define BIT_DTIM_CNT_8822B(x) \
9889 (((x) & BIT_MASK_DTIM_CNT_8822B) << BIT_SHIFT_DTIM_CNT_8822B)
9890 #define BIT_GET_DTIM_CNT_8822B(x) \
9891 (((x) >> BIT_SHIFT_DTIM_CNT_8822B) & BIT_MASK_DTIM_CNT_8822B)
9893 #define BIT_SHIFT_DTIM_PERIOD_8822B 16
9894 #define BIT_MASK_DTIM_PERIOD_8822B 0xff
9895 #define BIT_DTIM_PERIOD_8822B(x) \
9896 (((x) & BIT_MASK_DTIM_PERIOD_8822B) << BIT_SHIFT_DTIM_PERIOD_8822B)
9897 #define BIT_GET_DTIM_PERIOD_8822B(x) \
9898 (((x) >> BIT_SHIFT_DTIM_PERIOD_8822B) & BIT_MASK_DTIM_PERIOD_8822B)
9900 #define BIT_DTIM_8822B BIT(15)
9901 #define BIT_TIM_8822B BIT(14)
9903 #define BIT_SHIFT_PS_AID_0_8822B 0
9904 #define BIT_MASK_PS_AID_0_8822B 0x7ff
9905 #define BIT_PS_AID_0_8822B(x) \
9906 (((x) & BIT_MASK_PS_AID_0_8822B) << BIT_SHIFT_PS_AID_0_8822B)
9907 #define BIT_GET_PS_AID_0_8822B(x) \
9908 (((x) >> BIT_SHIFT_PS_AID_0_8822B) & BIT_MASK_PS_AID_0_8822B)
9910 /* 2 REG_FLC_TRPC_8822B (TIMER OF FLC_RPC) */
9911 #define BIT_FLC_RPCT_V1_8822B BIT(7)
9912 #define BIT_MODE_8822B BIT(6)
9914 #define BIT_SHIFT_TRPCD_8822B 0
9915 #define BIT_MASK_TRPCD_8822B 0x3f
9916 #define BIT_TRPCD_8822B(x) \
9917 (((x) & BIT_MASK_TRPCD_8822B) << BIT_SHIFT_TRPCD_8822B)
9918 #define BIT_GET_TRPCD_8822B(x) \
9919 (((x) >> BIT_SHIFT_TRPCD_8822B) & BIT_MASK_TRPCD_8822B)
9921 /* 2 REG_FLC_PTS_8822B (PKT TYPE SELECTION OF FLC_RPC T) */
9922 #define BIT_CMF_8822B BIT(2)
9923 #define BIT_CCF_8822B BIT(1)
9924 #define BIT_CDF_8822B BIT(0)
9926 /* 2 REG_FLC_RPCT_8822B (FLC_RPC THRESHOLD) */
9928 #define BIT_SHIFT_FLC_RPCT_8822B 0
9929 #define BIT_MASK_FLC_RPCT_8822B 0xff
9930 #define BIT_FLC_RPCT_8822B(x) \
9931 (((x) & BIT_MASK_FLC_RPCT_8822B) << BIT_SHIFT_FLC_RPCT_8822B)
9932 #define BIT_GET_FLC_RPCT_8822B(x) \
9933 (((x) >> BIT_SHIFT_FLC_RPCT_8822B) & BIT_MASK_FLC_RPCT_8822B)
9935 /* 2 REG_FLC_RPC_8822B (FW LPS CONDITION -- RX PKT COUNTER) */
9937 #define BIT_SHIFT_FLC_RPC_8822B 0
9938 #define BIT_MASK_FLC_RPC_8822B 0xff
9939 #define BIT_FLC_RPC_8822B(x) \
9940 (((x) & BIT_MASK_FLC_RPC_8822B) << BIT_SHIFT_FLC_RPC_8822B)
9941 #define BIT_GET_FLC_RPC_8822B(x) \
9942 (((x) >> BIT_SHIFT_FLC_RPC_8822B) & BIT_MASK_FLC_RPC_8822B)
9944 /* 2 REG_RXPKTMON_CTRL_8822B */
9946 #define BIT_SHIFT_RXBKQPKT_SEQ_8822B 20
9947 #define BIT_MASK_RXBKQPKT_SEQ_8822B 0xf
9948 #define BIT_RXBKQPKT_SEQ_8822B(x) \
9949 (((x) & BIT_MASK_RXBKQPKT_SEQ_8822B) << BIT_SHIFT_RXBKQPKT_SEQ_8822B)
9950 #define BIT_GET_RXBKQPKT_SEQ_8822B(x) \
9951 (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8822B) & BIT_MASK_RXBKQPKT_SEQ_8822B)
9953 #define BIT_SHIFT_RXBEQPKT_SEQ_8822B 16
9954 #define BIT_MASK_RXBEQPKT_SEQ_8822B 0xf
9955 #define BIT_RXBEQPKT_SEQ_8822B(x) \
9956 (((x) & BIT_MASK_RXBEQPKT_SEQ_8822B) << BIT_SHIFT_RXBEQPKT_SEQ_8822B)
9957 #define BIT_GET_RXBEQPKT_SEQ_8822B(x) \
9958 (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8822B) & BIT_MASK_RXBEQPKT_SEQ_8822B)
9960 #define BIT_SHIFT_RXVIQPKT_SEQ_8822B 12
9961 #define BIT_MASK_RXVIQPKT_SEQ_8822B 0xf
9962 #define BIT_RXVIQPKT_SEQ_8822B(x) \
9963 (((x) & BIT_MASK_RXVIQPKT_SEQ_8822B) << BIT_SHIFT_RXVIQPKT_SEQ_8822B)
9964 #define BIT_GET_RXVIQPKT_SEQ_8822B(x) \
9965 (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8822B) & BIT_MASK_RXVIQPKT_SEQ_8822B)
9967 #define BIT_SHIFT_RXVOQPKT_SEQ_8822B 8
9968 #define BIT_MASK_RXVOQPKT_SEQ_8822B 0xf
9969 #define BIT_RXVOQPKT_SEQ_8822B(x) \
9970 (((x) & BIT_MASK_RXVOQPKT_SEQ_8822B) << BIT_SHIFT_RXVOQPKT_SEQ_8822B)
9971 #define BIT_GET_RXVOQPKT_SEQ_8822B(x) \
9972 (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8822B) & BIT_MASK_RXVOQPKT_SEQ_8822B)
9974 #define BIT_RXBKQPKT_ERR_8822B BIT(7)
9975 #define BIT_RXBEQPKT_ERR_8822B BIT(6)
9976 #define BIT_RXVIQPKT_ERR_8822B BIT(5)
9977 #define BIT_RXVOQPKT_ERR_8822B BIT(4)
9978 #define BIT_RXDMA_MON_EN_8822B BIT(2)
9979 #define BIT_RXPKT_MON_RST_8822B BIT(1)
9980 #define BIT_RXPKT_MON_EN_8822B BIT(0)
9982 /* 2 REG_STATE_MON_8822B */
9984 #define BIT_SHIFT_STATE_SEL_8822B 24
9985 #define BIT_MASK_STATE_SEL_8822B 0x1f
9986 #define BIT_STATE_SEL_8822B(x) \
9987 (((x) & BIT_MASK_STATE_SEL_8822B) << BIT_SHIFT_STATE_SEL_8822B)
9988 #define BIT_GET_STATE_SEL_8822B(x) \
9989 (((x) >> BIT_SHIFT_STATE_SEL_8822B) & BIT_MASK_STATE_SEL_8822B)
9991 #define BIT_SHIFT_STATE_INFO_8822B 8
9992 #define BIT_MASK_STATE_INFO_8822B 0xff
9993 #define BIT_STATE_INFO_8822B(x) \
9994 (((x) & BIT_MASK_STATE_INFO_8822B) << BIT_SHIFT_STATE_INFO_8822B)
9995 #define BIT_GET_STATE_INFO_8822B(x) \
9996 (((x) >> BIT_SHIFT_STATE_INFO_8822B) & BIT_MASK_STATE_INFO_8822B)
9998 #define BIT_UPD_NXT_STATE_8822B BIT(7)
10000 #define BIT_SHIFT_CUR_STATE_8822B 0
10001 #define BIT_MASK_CUR_STATE_8822B 0x7f
10002 #define BIT_CUR_STATE_8822B(x) \
10003 (((x) & BIT_MASK_CUR_STATE_8822B) << BIT_SHIFT_CUR_STATE_8822B)
10004 #define BIT_GET_CUR_STATE_8822B(x) \
10005 (((x) >> BIT_SHIFT_CUR_STATE_8822B) & BIT_MASK_CUR_STATE_8822B)
10007 /* 2 REG_ERROR_MON_8822B */
10008 #define BIT_MACRX_ERR_1_8822B BIT(17)
10009 #define BIT_MACRX_ERR_0_8822B BIT(16)
10010 #define BIT_MACTX_ERR_3_8822B BIT(3)
10011 #define BIT_MACTX_ERR_2_8822B BIT(2)
10012 #define BIT_MACTX_ERR_1_8822B BIT(1)
10013 #define BIT_MACTX_ERR_0_8822B BIT(0)
10015 /* 2 REG_SEARCH_MACID_8822B */
10016 #define BIT_EN_TXRPTBUF_CLK_8822B BIT(31)
10018 #define BIT_SHIFT_INFO_INDEX_OFFSET_8822B 16
10019 #define BIT_MASK_INFO_INDEX_OFFSET_8822B 0x1fff
10020 #define BIT_INFO_INDEX_OFFSET_8822B(x) \
10021 (((x) & BIT_MASK_INFO_INDEX_OFFSET_8822B) \
10022 << BIT_SHIFT_INFO_INDEX_OFFSET_8822B)
10023 #define BIT_GET_INFO_INDEX_OFFSET_8822B(x) \
10024 (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8822B) & \
10025 BIT_MASK_INFO_INDEX_OFFSET_8822B)
10027 #define BIT_WMAC_SRCH_FIFOFULL_8822B BIT(15)
10028 #define BIT_DIS_INFOSRCH_8822B BIT(14)
10029 #define BIT_DISABLE_B0_8822B BIT(13)
10031 #define BIT_SHIFT_INFO_ADDR_OFFSET_8822B 0
10032 #define BIT_MASK_INFO_ADDR_OFFSET_8822B 0x1fff
10033 #define BIT_INFO_ADDR_OFFSET_8822B(x) \
10034 (((x) & BIT_MASK_INFO_ADDR_OFFSET_8822B) \
10035 << BIT_SHIFT_INFO_ADDR_OFFSET_8822B)
10036 #define BIT_GET_INFO_ADDR_OFFSET_8822B(x) \
10037 (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8822B) & \
10038 BIT_MASK_INFO_ADDR_OFFSET_8822B)
10040 /* 2 REG_BT_COEX_TABLE_8822B (BT-COEXISTENCE CONTROL REGISTER) */
10041 #define BIT_PRI_MASK_RX_RESP_8822B BIT(126)
10042 #define BIT_PRI_MASK_RXOFDM_8822B BIT(125)
10043 #define BIT_PRI_MASK_RXCCK_8822B BIT(124)
10045 #define BIT_SHIFT_PRI_MASK_TXAC_8822B (117 & CPU_OPT_WIDTH)
10046 #define BIT_MASK_PRI_MASK_TXAC_8822B 0x7f
10047 #define BIT_PRI_MASK_TXAC_8822B(x) \
10048 (((x) & BIT_MASK_PRI_MASK_TXAC_8822B) << BIT_SHIFT_PRI_MASK_TXAC_8822B)
10049 #define BIT_GET_PRI_MASK_TXAC_8822B(x) \
10050 (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8822B) & BIT_MASK_PRI_MASK_TXAC_8822B)
10052 #define BIT_SHIFT_PRI_MASK_NAV_8822B (109 & CPU_OPT_WIDTH)
10053 #define BIT_MASK_PRI_MASK_NAV_8822B 0xff
10054 #define BIT_PRI_MASK_NAV_8822B(x) \
10055 (((x) & BIT_MASK_PRI_MASK_NAV_8822B) << BIT_SHIFT_PRI_MASK_NAV_8822B)
10056 #define BIT_GET_PRI_MASK_NAV_8822B(x) \
10057 (((x) >> BIT_SHIFT_PRI_MASK_NAV_8822B) & BIT_MASK_PRI_MASK_NAV_8822B)
10059 #define BIT_PRI_MASK_CCK_8822B BIT(108)
10060 #define BIT_PRI_MASK_OFDM_8822B BIT(107)
10061 #define BIT_PRI_MASK_RTY_8822B BIT(106)
10063 #define BIT_SHIFT_PRI_MASK_NUM_8822B (102 & CPU_OPT_WIDTH)
10064 #define BIT_MASK_PRI_MASK_NUM_8822B 0xf
10065 #define BIT_PRI_MASK_NUM_8822B(x) \
10066 (((x) & BIT_MASK_PRI_MASK_NUM_8822B) << BIT_SHIFT_PRI_MASK_NUM_8822B)
10067 #define BIT_GET_PRI_MASK_NUM_8822B(x) \
10068 (((x) >> BIT_SHIFT_PRI_MASK_NUM_8822B) & BIT_MASK_PRI_MASK_NUM_8822B)
10070 #define BIT_SHIFT_PRI_MASK_TYPE_8822B (98 & CPU_OPT_WIDTH)
10071 #define BIT_MASK_PRI_MASK_TYPE_8822B 0xf
10072 #define BIT_PRI_MASK_TYPE_8822B(x) \
10073 (((x) & BIT_MASK_PRI_MASK_TYPE_8822B) << BIT_SHIFT_PRI_MASK_TYPE_8822B)
10074 #define BIT_GET_PRI_MASK_TYPE_8822B(x) \
10075 (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8822B) & BIT_MASK_PRI_MASK_TYPE_8822B)
10077 #define BIT_OOB_8822B BIT(97)
10078 #define BIT_ANT_SEL_8822B BIT(96)
10080 #define BIT_SHIFT_BREAK_TABLE_2_8822B (80 & CPU_OPT_WIDTH)
10081 #define BIT_MASK_BREAK_TABLE_2_8822B 0xffff
10082 #define BIT_BREAK_TABLE_2_8822B(x) \
10083 (((x) & BIT_MASK_BREAK_TABLE_2_8822B) << BIT_SHIFT_BREAK_TABLE_2_8822B)
10084 #define BIT_GET_BREAK_TABLE_2_8822B(x) \
10085 (((x) >> BIT_SHIFT_BREAK_TABLE_2_8822B) & BIT_MASK_BREAK_TABLE_2_8822B)
10087 #define BIT_SHIFT_BREAK_TABLE_1_8822B (64 & CPU_OPT_WIDTH)
10088 #define BIT_MASK_BREAK_TABLE_1_8822B 0xffff
10089 #define BIT_BREAK_TABLE_1_8822B(x) \
10090 (((x) & BIT_MASK_BREAK_TABLE_1_8822B) << BIT_SHIFT_BREAK_TABLE_1_8822B)
10091 #define BIT_GET_BREAK_TABLE_1_8822B(x) \
10092 (((x) >> BIT_SHIFT_BREAK_TABLE_1_8822B) & BIT_MASK_BREAK_TABLE_1_8822B)
10094 #define BIT_SHIFT_COEX_TABLE_2_8822B (32 & CPU_OPT_WIDTH)
10095 #define BIT_MASK_COEX_TABLE_2_8822B 0xffffffffL
10096 #define BIT_COEX_TABLE_2_8822B(x) \
10097 (((x) & BIT_MASK_COEX_TABLE_2_8822B) << BIT_SHIFT_COEX_TABLE_2_8822B)
10098 #define BIT_GET_COEX_TABLE_2_8822B(x) \
10099 (((x) >> BIT_SHIFT_COEX_TABLE_2_8822B) & BIT_MASK_COEX_TABLE_2_8822B)
10101 #define BIT_SHIFT_COEX_TABLE_1_8822B 0
10102 #define BIT_MASK_COEX_TABLE_1_8822B 0xffffffffL
10103 #define BIT_COEX_TABLE_1_8822B(x) \
10104 (((x) & BIT_MASK_COEX_TABLE_1_8822B) << BIT_SHIFT_COEX_TABLE_1_8822B)
10105 #define BIT_GET_COEX_TABLE_1_8822B(x) \
10106 (((x) >> BIT_SHIFT_COEX_TABLE_1_8822B) & BIT_MASK_COEX_TABLE_1_8822B)
10108 /* 2 REG_RXCMD_0_8822B */
10109 #define BIT_RXCMD_EN_8822B BIT(31)
10111 #define BIT_SHIFT_RXCMD_INFO_8822B 0
10112 #define BIT_MASK_RXCMD_INFO_8822B 0x7fffffffL
10113 #define BIT_RXCMD_INFO_8822B(x) \
10114 (((x) & BIT_MASK_RXCMD_INFO_8822B) << BIT_SHIFT_RXCMD_INFO_8822B)
10115 #define BIT_GET_RXCMD_INFO_8822B(x) \
10116 (((x) >> BIT_SHIFT_RXCMD_INFO_8822B) & BIT_MASK_RXCMD_INFO_8822B)
10118 /* 2 REG_RXCMD_1_8822B */
10120 #define BIT_SHIFT_RXCMD_PRD_8822B 0
10121 #define BIT_MASK_RXCMD_PRD_8822B 0xffff
10122 #define BIT_RXCMD_PRD_8822B(x) \
10123 (((x) & BIT_MASK_RXCMD_PRD_8822B) << BIT_SHIFT_RXCMD_PRD_8822B)
10124 #define BIT_GET_RXCMD_PRD_8822B(x) \
10125 (((x) >> BIT_SHIFT_RXCMD_PRD_8822B) & BIT_MASK_RXCMD_PRD_8822B)
10127 /* 2 REG_NOT_VALID_8822B */
10129 /* 2 REG_WMAC_RESP_TXINFO_8822B (RESPONSE TXINFO REGISTER) */
10131 #define BIT_SHIFT_WMAC_RESP_MFB_8822B 25
10132 #define BIT_MASK_WMAC_RESP_MFB_8822B 0x7f
10133 #define BIT_WMAC_RESP_MFB_8822B(x) \
10134 (((x) & BIT_MASK_WMAC_RESP_MFB_8822B) << BIT_SHIFT_WMAC_RESP_MFB_8822B)
10135 #define BIT_GET_WMAC_RESP_MFB_8822B(x) \
10136 (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8822B) & BIT_MASK_WMAC_RESP_MFB_8822B)
10138 #define BIT_SHIFT_WMAC_ANTINF_SEL_8822B 23
10139 #define BIT_MASK_WMAC_ANTINF_SEL_8822B 0x3
10140 #define BIT_WMAC_ANTINF_SEL_8822B(x) \
10141 (((x) & BIT_MASK_WMAC_ANTINF_SEL_8822B) \
10142 << BIT_SHIFT_WMAC_ANTINF_SEL_8822B)
10143 #define BIT_GET_WMAC_ANTINF_SEL_8822B(x) \
10144 (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8822B) & \
10145 BIT_MASK_WMAC_ANTINF_SEL_8822B)
10147 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8822B 21
10148 #define BIT_MASK_WMAC_ANTSEL_SEL_8822B 0x3
10149 #define BIT_WMAC_ANTSEL_SEL_8822B(x) \
10150 (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8822B) \
10151 << BIT_SHIFT_WMAC_ANTSEL_SEL_8822B)
10152 #define BIT_GET_WMAC_ANTSEL_SEL_8822B(x) \
10153 (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8822B) & \
10154 BIT_MASK_WMAC_ANTSEL_SEL_8822B)
10156 #define BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B 18
10157 #define BIT_MASK_R_WMAC_RESP_TXPOWER_8822B 0x7
10158 #define BIT_R_WMAC_RESP_TXPOWER_8822B(x) \
10159 (((x) & BIT_MASK_R_WMAC_RESP_TXPOWER_8822B) \
10160 << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B)
10161 #define BIT_GET_R_WMAC_RESP_TXPOWER_8822B(x) \
10162 (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B) & \
10163 BIT_MASK_R_WMAC_RESP_TXPOWER_8822B)
10165 #define BIT_SHIFT_WMAC_RESP_TXANT_8822B 0
10166 #define BIT_MASK_WMAC_RESP_TXANT_8822B 0x3ffff
10167 #define BIT_WMAC_RESP_TXANT_8822B(x) \
10168 (((x) & BIT_MASK_WMAC_RESP_TXANT_8822B) \
10169 << BIT_SHIFT_WMAC_RESP_TXANT_8822B)
10170 #define BIT_GET_WMAC_RESP_TXANT_8822B(x) \
10171 (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8822B) & \
10172 BIT_MASK_WMAC_RESP_TXANT_8822B)
10174 /* 2 REG_BBPSF_CTRL_8822B */
10175 #define BIT_CTL_IDLE_CLR_CSI_RPT_8822B BIT(31)
10176 #define BIT_WMAC_USE_NDPARATE_8822B BIT(30)
10178 #define BIT_SHIFT_WMAC_CSI_RATE_8822B 24
10179 #define BIT_MASK_WMAC_CSI_RATE_8822B 0x3f
10180 #define BIT_WMAC_CSI_RATE_8822B(x) \
10181 (((x) & BIT_MASK_WMAC_CSI_RATE_8822B) << BIT_SHIFT_WMAC_CSI_RATE_8822B)
10182 #define BIT_GET_WMAC_CSI_RATE_8822B(x) \
10183 (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8822B) & BIT_MASK_WMAC_CSI_RATE_8822B)
10185 #define BIT_SHIFT_WMAC_RESP_TXRATE_8822B 16
10186 #define BIT_MASK_WMAC_RESP_TXRATE_8822B 0xff
10187 #define BIT_WMAC_RESP_TXRATE_8822B(x) \
10188 (((x) & BIT_MASK_WMAC_RESP_TXRATE_8822B) \
10189 << BIT_SHIFT_WMAC_RESP_TXRATE_8822B)
10190 #define BIT_GET_WMAC_RESP_TXRATE_8822B(x) \
10191 (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8822B) & \
10192 BIT_MASK_WMAC_RESP_TXRATE_8822B)
10194 #define BIT_BBPSF_MPDUCHKEN_8822B BIT(5)
10195 #define BIT_BBPSF_MHCHKEN_8822B BIT(4)
10196 #define BIT_BBPSF_ERRCHKEN_8822B BIT(3)
10198 #define BIT_SHIFT_BBPSF_ERRTHR_8822B 0
10199 #define BIT_MASK_BBPSF_ERRTHR_8822B 0x7
10200 #define BIT_BBPSF_ERRTHR_8822B(x) \
10201 (((x) & BIT_MASK_BBPSF_ERRTHR_8822B) << BIT_SHIFT_BBPSF_ERRTHR_8822B)
10202 #define BIT_GET_BBPSF_ERRTHR_8822B(x) \
10203 (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8822B) & BIT_MASK_BBPSF_ERRTHR_8822B)
10205 /* 2 REG_NOT_VALID_8822B */
10207 /* 2 REG_P2P_RX_BCN_NOA_8822B (P2P RX BEACON NOA REGISTER) */
10208 #define BIT_NOA_PARSER_EN_8822B BIT(15)
10209 #define BIT_BSSID_SEL_8822B BIT(14)
10211 #define BIT_SHIFT_P2P_OUI_TYPE_8822B 0
10212 #define BIT_MASK_P2P_OUI_TYPE_8822B 0xff
10213 #define BIT_P2P_OUI_TYPE_8822B(x) \
10214 (((x) & BIT_MASK_P2P_OUI_TYPE_8822B) << BIT_SHIFT_P2P_OUI_TYPE_8822B)
10215 #define BIT_GET_P2P_OUI_TYPE_8822B(x) \
10216 (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8822B) & BIT_MASK_P2P_OUI_TYPE_8822B)
10218 /* 2 REG_ASSOCIATED_BFMER0_INFO_8822B (ASSOCIATED BEAMFORMER0 INFO REGISTER) */
10220 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B (48 & CPU_OPT_WIDTH)
10221 #define BIT_MASK_R_WMAC_TXCSI_AID0_8822B 0x1ff
10222 #define BIT_R_WMAC_TXCSI_AID0_8822B(x) \
10223 (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8822B) \
10224 << BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B)
10225 #define BIT_GET_R_WMAC_TXCSI_AID0_8822B(x) \
10226 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B) & \
10227 BIT_MASK_R_WMAC_TXCSI_AID0_8822B)
10229 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B 0
10230 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B 0xffffffffffffL
10231 #define BIT_R_WMAC_SOUNDING_RXADD_R0_8822B(x) \
10232 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B) \
10233 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B)
10234 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8822B(x) \
10235 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B) & \
10236 BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B)
10238 /* 2 REG_ASSOCIATED_BFMER1_INFO_8822B (ASSOCIATED BEAMFORMER1 INFO REGISTER) */
10240 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B (48 & CPU_OPT_WIDTH)
10241 #define BIT_MASK_R_WMAC_TXCSI_AID1_8822B 0x1ff
10242 #define BIT_R_WMAC_TXCSI_AID1_8822B(x) \
10243 (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8822B) \
10244 << BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B)
10245 #define BIT_GET_R_WMAC_TXCSI_AID1_8822B(x) \
10246 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B) & \
10247 BIT_MASK_R_WMAC_TXCSI_AID1_8822B)
10249 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B 0
10250 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B 0xffffffffffffL
10251 #define BIT_R_WMAC_SOUNDING_RXADD_R1_8822B(x) \
10252 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B) \
10253 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B)
10254 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8822B(x) \
10255 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B) & \
10256 BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B)
10258 /* 2 REG_TX_CSI_RPT_PARAM_BW20_8822B (TX CSI REPORT PARAMETER REGISTER) */
10260 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B 16
10261 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8822B 0xfff
10262 #define BIT_R_WMAC_BFINFO_20M_1_8822B(x) \
10263 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8822B) \
10264 << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B)
10265 #define BIT_GET_R_WMAC_BFINFO_20M_1_8822B(x) \
10266 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B) & \
10267 BIT_MASK_R_WMAC_BFINFO_20M_1_8822B)
10269 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B 0
10270 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8822B 0xfff
10271 #define BIT_R_WMAC_BFINFO_20M_0_8822B(x) \
10272 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8822B) \
10273 << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B)
10274 #define BIT_GET_R_WMAC_BFINFO_20M_0_8822B(x) \
10275 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B) & \
10276 BIT_MASK_R_WMAC_BFINFO_20M_0_8822B)
10278 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8822B (TX CSI REPORT PARAMETER_BW40 REGISTER) */
10280 #define BIT_SHIFT_WMAC_RESP_ANTCD_8822B 0
10281 #define BIT_MASK_WMAC_RESP_ANTCD_8822B 0xf
10282 #define BIT_WMAC_RESP_ANTCD_8822B(x) \
10283 (((x) & BIT_MASK_WMAC_RESP_ANTCD_8822B) \
10284 << BIT_SHIFT_WMAC_RESP_ANTCD_8822B)
10285 #define BIT_GET_WMAC_RESP_ANTCD_8822B(x) \
10286 (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8822B) & \
10287 BIT_MASK_WMAC_RESP_ANTCD_8822B)
10289 /* 2 REG_TX_CSI_RPT_PARAM_BW80_8822B (TX CSI REPORT PARAMETER_BW80 REGISTER) */
10291 /* 2 REG_BCN_PSR_RPT2_8822B (BEACON PARSER REPORT REGISTER2) */
10293 #define BIT_SHIFT_DTIM_CNT2_8822B 24
10294 #define BIT_MASK_DTIM_CNT2_8822B 0xff
10295 #define BIT_DTIM_CNT2_8822B(x) \
10296 (((x) & BIT_MASK_DTIM_CNT2_8822B) << BIT_SHIFT_DTIM_CNT2_8822B)
10297 #define BIT_GET_DTIM_CNT2_8822B(x) \
10298 (((x) >> BIT_SHIFT_DTIM_CNT2_8822B) & BIT_MASK_DTIM_CNT2_8822B)
10300 #define BIT_SHIFT_DTIM_PERIOD2_8822B 16
10301 #define BIT_MASK_DTIM_PERIOD2_8822B 0xff
10302 #define BIT_DTIM_PERIOD2_8822B(x) \
10303 (((x) & BIT_MASK_DTIM_PERIOD2_8822B) << BIT_SHIFT_DTIM_PERIOD2_8822B)
10304 #define BIT_GET_DTIM_PERIOD2_8822B(x) \
10305 (((x) >> BIT_SHIFT_DTIM_PERIOD2_8822B) & BIT_MASK_DTIM_PERIOD2_8822B)
10307 #define BIT_DTIM2_8822B BIT(15)
10308 #define BIT_TIM2_8822B BIT(14)
10310 #define BIT_SHIFT_PS_AID_2_8822B 0
10311 #define BIT_MASK_PS_AID_2_8822B 0x7ff
10312 #define BIT_PS_AID_2_8822B(x) \
10313 (((x) & BIT_MASK_PS_AID_2_8822B) << BIT_SHIFT_PS_AID_2_8822B)
10314 #define BIT_GET_PS_AID_2_8822B(x) \
10315 (((x) >> BIT_SHIFT_PS_AID_2_8822B) & BIT_MASK_PS_AID_2_8822B)
10317 /* 2 REG_BCN_PSR_RPT3_8822B (BEACON PARSER REPORT REGISTER3) */
10319 #define BIT_SHIFT_DTIM_CNT3_8822B 24
10320 #define BIT_MASK_DTIM_CNT3_8822B 0xff
10321 #define BIT_DTIM_CNT3_8822B(x) \
10322 (((x) & BIT_MASK_DTIM_CNT3_8822B) << BIT_SHIFT_DTIM_CNT3_8822B)
10323 #define BIT_GET_DTIM_CNT3_8822B(x) \
10324 (((x) >> BIT_SHIFT_DTIM_CNT3_8822B) & BIT_MASK_DTIM_CNT3_8822B)
10326 #define BIT_SHIFT_DTIM_PERIOD3_8822B 16
10327 #define BIT_MASK_DTIM_PERIOD3_8822B 0xff
10328 #define BIT_DTIM_PERIOD3_8822B(x) \
10329 (((x) & BIT_MASK_DTIM_PERIOD3_8822B) << BIT_SHIFT_DTIM_PERIOD3_8822B)
10330 #define BIT_GET_DTIM_PERIOD3_8822B(x) \
10331 (((x) >> BIT_SHIFT_DTIM_PERIOD3_8822B) & BIT_MASK_DTIM_PERIOD3_8822B)
10333 #define BIT_DTIM3_8822B BIT(15)
10334 #define BIT_TIM3_8822B BIT(14)
10336 #define BIT_SHIFT_PS_AID_3_8822B 0
10337 #define BIT_MASK_PS_AID_3_8822B 0x7ff
10338 #define BIT_PS_AID_3_8822B(x) \
10339 (((x) & BIT_MASK_PS_AID_3_8822B) << BIT_SHIFT_PS_AID_3_8822B)
10340 #define BIT_GET_PS_AID_3_8822B(x) \
10341 (((x) >> BIT_SHIFT_PS_AID_3_8822B) & BIT_MASK_PS_AID_3_8822B)
10343 /* 2 REG_BCN_PSR_RPT4_8822B (BEACON PARSER REPORT REGISTER4) */
10345 #define BIT_SHIFT_DTIM_CNT4_8822B 24
10346 #define BIT_MASK_DTIM_CNT4_8822B 0xff
10347 #define BIT_DTIM_CNT4_8822B(x) \
10348 (((x) & BIT_MASK_DTIM_CNT4_8822B) << BIT_SHIFT_DTIM_CNT4_8822B)
10349 #define BIT_GET_DTIM_CNT4_8822B(x) \
10350 (((x) >> BIT_SHIFT_DTIM_CNT4_8822B) & BIT_MASK_DTIM_CNT4_8822B)
10352 #define BIT_SHIFT_DTIM_PERIOD4_8822B 16
10353 #define BIT_MASK_DTIM_PERIOD4_8822B 0xff
10354 #define BIT_DTIM_PERIOD4_8822B(x) \
10355 (((x) & BIT_MASK_DTIM_PERIOD4_8822B) << BIT_SHIFT_DTIM_PERIOD4_8822B)
10356 #define BIT_GET_DTIM_PERIOD4_8822B(x) \
10357 (((x) >> BIT_SHIFT_DTIM_PERIOD4_8822B) & BIT_MASK_DTIM_PERIOD4_8822B)
10359 #define BIT_DTIM4_8822B BIT(15)
10360 #define BIT_TIM4_8822B BIT(14)
10362 #define BIT_SHIFT_PS_AID_4_8822B 0
10363 #define BIT_MASK_PS_AID_4_8822B 0x7ff
10364 #define BIT_PS_AID_4_8822B(x) \
10365 (((x) & BIT_MASK_PS_AID_4_8822B) << BIT_SHIFT_PS_AID_4_8822B)
10366 #define BIT_GET_PS_AID_4_8822B(x) \
10367 (((x) >> BIT_SHIFT_PS_AID_4_8822B) & BIT_MASK_PS_AID_4_8822B)
10369 /* 2 REG_A1_ADDR_MASK_8822B (A1 ADDR MASK REGISTER) */
10371 #define BIT_SHIFT_A1_ADDR_MASK_8822B 0
10372 #define BIT_MASK_A1_ADDR_MASK_8822B 0xffffffffL
10373 #define BIT_A1_ADDR_MASK_8822B(x) \
10374 (((x) & BIT_MASK_A1_ADDR_MASK_8822B) << BIT_SHIFT_A1_ADDR_MASK_8822B)
10375 #define BIT_GET_A1_ADDR_MASK_8822B(x) \
10376 (((x) >> BIT_SHIFT_A1_ADDR_MASK_8822B) & BIT_MASK_A1_ADDR_MASK_8822B)
10378 /* 2 REG_MACID2_8822B (MAC ID2 REGISTER) */
10380 #define BIT_SHIFT_MACID2_8822B 0
10381 #define BIT_MASK_MACID2_8822B 0xffffffffffffL
10382 #define BIT_MACID2_8822B(x) \
10383 (((x) & BIT_MASK_MACID2_8822B) << BIT_SHIFT_MACID2_8822B)
10384 #define BIT_GET_MACID2_8822B(x) \
10385 (((x) >> BIT_SHIFT_MACID2_8822B) & BIT_MASK_MACID2_8822B)
10387 /* 2 REG_BSSID2_8822B (BSSID2 REGISTER) */
10389 #define BIT_SHIFT_BSSID2_8822B 0
10390 #define BIT_MASK_BSSID2_8822B 0xffffffffffffL
10391 #define BIT_BSSID2_8822B(x) \
10392 (((x) & BIT_MASK_BSSID2_8822B) << BIT_SHIFT_BSSID2_8822B)
10393 #define BIT_GET_BSSID2_8822B(x) \
10394 (((x) >> BIT_SHIFT_BSSID2_8822B) & BIT_MASK_BSSID2_8822B)
10396 /* 2 REG_MACID3_8822B (MAC ID3 REGISTER) */
10398 #define BIT_SHIFT_MACID3_8822B 0
10399 #define BIT_MASK_MACID3_8822B 0xffffffffffffL
10400 #define BIT_MACID3_8822B(x) \
10401 (((x) & BIT_MASK_MACID3_8822B) << BIT_SHIFT_MACID3_8822B)
10402 #define BIT_GET_MACID3_8822B(x) \
10403 (((x) >> BIT_SHIFT_MACID3_8822B) & BIT_MASK_MACID3_8822B)
10405 /* 2 REG_BSSID3_8822B (BSSID3 REGISTER) */
10407 #define BIT_SHIFT_BSSID3_8822B 0
10408 #define BIT_MASK_BSSID3_8822B 0xffffffffffffL
10409 #define BIT_BSSID3_8822B(x) \
10410 (((x) & BIT_MASK_BSSID3_8822B) << BIT_SHIFT_BSSID3_8822B)
10411 #define BIT_GET_BSSID3_8822B(x) \
10412 (((x) >> BIT_SHIFT_BSSID3_8822B) & BIT_MASK_BSSID3_8822B)
10414 /* 2 REG_MACID4_8822B (MAC ID4 REGISTER) */
10416 #define BIT_SHIFT_MACID4_8822B 0
10417 #define BIT_MASK_MACID4_8822B 0xffffffffffffL
10418 #define BIT_MACID4_8822B(x) \
10419 (((x) & BIT_MASK_MACID4_8822B) << BIT_SHIFT_MACID4_8822B)
10420 #define BIT_GET_MACID4_8822B(x) \
10421 (((x) >> BIT_SHIFT_MACID4_8822B) & BIT_MASK_MACID4_8822B)
10423 /* 2 REG_BSSID4_8822B (BSSID4 REGISTER) */
10425 #define BIT_SHIFT_BSSID4_8822B 0
10426 #define BIT_MASK_BSSID4_8822B 0xffffffffffffL
10427 #define BIT_BSSID4_8822B(x) \
10428 (((x) & BIT_MASK_BSSID4_8822B) << BIT_SHIFT_BSSID4_8822B)
10429 #define BIT_GET_BSSID4_8822B(x) \
10430 (((x) >> BIT_SHIFT_BSSID4_8822B) & BIT_MASK_BSSID4_8822B)
10432 /* 2 REG_NOA_REPORT_8822B */
10434 /* 2 REG_PWRBIT_SETTING_8822B */
10435 #define BIT_CLI3_PWRBIT_OW_EN_8822B BIT(7)
10436 #define BIT_CLI3_PWR_ST_8822B BIT(6)
10437 #define BIT_CLI2_PWRBIT_OW_EN_8822B BIT(5)
10438 #define BIT_CLI2_PWR_ST_8822B BIT(4)
10439 #define BIT_CLI1_PWRBIT_OW_EN_8822B BIT(3)
10440 #define BIT_CLI1_PWR_ST_8822B BIT(2)
10441 #define BIT_CLI0_PWRBIT_OW_EN_8822B BIT(1)
10442 #define BIT_CLI0_PWR_ST_8822B BIT(0)
10444 /* 2 REG_WMAC_MU_BF_OPTION_8822B */
10445 #define BIT_WMAC_RESP_NONSTA1_DIS_8822B BIT(7)
10446 #define BIT_BIT_WMAC_TXMU_ACKPOLICY_EN_8822B BIT(6)
10448 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B 4
10449 #define BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B 0x3
10450 #define BIT_WMAC_TXMU_ACKPOLICY_8822B(x) \
10451 (((x) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B) \
10452 << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B)
10453 #define BIT_GET_WMAC_TXMU_ACKPOLICY_8822B(x) \
10454 (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B) & \
10455 BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B)
10457 #define BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B 1
10458 #define BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B 0x7
10459 #define BIT_WMAC_MU_BFEE_PORT_SEL_8822B(x) \
10460 (((x) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B) \
10461 << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B)
10462 #define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8822B(x) \
10463 (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B) & \
10464 BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B)
10466 #define BIT_WMAC_MU_BFEE_DIS_8822B BIT(0)
10468 /* 2 REG_NOT_VALID_8822B */
10470 #define BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B 0
10471 #define BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B 0xff
10472 #define BIT_WMAC_PAUSE_BB_CLR_TH_8822B(x) \
10473 (((x) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B) \
10474 << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B)
10475 #define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8822B(x) \
10476 (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B) & \
10477 BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B)
10479 /* 2 REG_WMAC_MU_ARB_8822B */
10480 #define BIT_WMAC_ARB_HW_ADAPT_EN_8822B BIT(7)
10481 #define BIT_WMAC_ARB_SW_EN_8822B BIT(6)
10483 #define BIT_SHIFT_WMAC_ARB_SW_STATE_8822B 0
10484 #define BIT_MASK_WMAC_ARB_SW_STATE_8822B 0x3f
10485 #define BIT_WMAC_ARB_SW_STATE_8822B(x) \
10486 (((x) & BIT_MASK_WMAC_ARB_SW_STATE_8822B) \
10487 << BIT_SHIFT_WMAC_ARB_SW_STATE_8822B)
10488 #define BIT_GET_WMAC_ARB_SW_STATE_8822B(x) \
10489 (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8822B) & \
10490 BIT_MASK_WMAC_ARB_SW_STATE_8822B)
10492 /* 2 REG_WMAC_MU_OPTION_8822B */
10494 #define BIT_SHIFT_WMAC_MU_DBGSEL_8822B 5
10495 #define BIT_MASK_WMAC_MU_DBGSEL_8822B 0x3
10496 #define BIT_WMAC_MU_DBGSEL_8822B(x) \
10497 (((x) & BIT_MASK_WMAC_MU_DBGSEL_8822B) \
10498 << BIT_SHIFT_WMAC_MU_DBGSEL_8822B)
10499 #define BIT_GET_WMAC_MU_DBGSEL_8822B(x) \
10500 (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8822B) & \
10501 BIT_MASK_WMAC_MU_DBGSEL_8822B)
10503 #define BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B 0
10504 #define BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B 0x1f
10505 #define BIT_WMAC_MU_CPRD_TIMEOUT_8822B(x) \
10506 (((x) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B) \
10507 << BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B)
10508 #define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8822B(x) \
10509 (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B) & \
10510 BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B)
10512 /* 2 REG_WMAC_MU_BF_CTL_8822B */
10513 #define BIT_WMAC_INVLD_BFPRT_CHK_8822B BIT(15)
10514 #define BIT_WMAC_RETXBFRPTSEQ_UPD_8822B BIT(14)
10516 #define BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B 12
10517 #define BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B 0x3
10518 #define BIT_WMAC_MU_BFRPTSEG_SEL_8822B(x) \
10519 (((x) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B) \
10520 << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B)
10521 #define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8822B(x) \
10522 (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B) & \
10523 BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B)
10525 #define BIT_SHIFT_WMAC_MU_BF_MYAID_8822B 0
10526 #define BIT_MASK_WMAC_MU_BF_MYAID_8822B 0xfff
10527 #define BIT_WMAC_MU_BF_MYAID_8822B(x) \
10528 (((x) & BIT_MASK_WMAC_MU_BF_MYAID_8822B) \
10529 << BIT_SHIFT_WMAC_MU_BF_MYAID_8822B)
10530 #define BIT_GET_WMAC_MU_BF_MYAID_8822B(x) \
10531 (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8822B) & \
10532 BIT_MASK_WMAC_MU_BF_MYAID_8822B)
10534 /* 2 REG_WMAC_MU_BFRPT_PARA_8822B */
10536 #define BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B 12
10537 #define BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B 0x7
10538 #define BIT_BIT_BFRPT_PARA_USERID_SEL_8822B(x) \
10539 (((x) & BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B) \
10540 << BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B)
10541 #define BIT_GET_BIT_BFRPT_PARA_USERID_SEL_8822B(x) \
10542 (((x) >> BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B) & \
10543 BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B)
10545 #define BIT_SHIFT_BFRPT_PARA_8822B 0
10546 #define BIT_MASK_BFRPT_PARA_8822B 0xfff
10547 #define BIT_BFRPT_PARA_8822B(x) \
10548 (((x) & BIT_MASK_BFRPT_PARA_8822B) << BIT_SHIFT_BFRPT_PARA_8822B)
10549 #define BIT_GET_BFRPT_PARA_8822B(x) \
10550 (((x) >> BIT_SHIFT_BFRPT_PARA_8822B) & BIT_MASK_BFRPT_PARA_8822B)
10552 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE2_8822B */
10553 #define BIT_STATUS_BFEE2_8822B BIT(10)
10554 #define BIT_WMAC_MU_BFEE2_EN_8822B BIT(9)
10556 #define BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B 0
10557 #define BIT_MASK_WMAC_MU_BFEE2_AID_8822B 0x1ff
10558 #define BIT_WMAC_MU_BFEE2_AID_8822B(x) \
10559 (((x) & BIT_MASK_WMAC_MU_BFEE2_AID_8822B) \
10560 << BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B)
10561 #define BIT_GET_WMAC_MU_BFEE2_AID_8822B(x) \
10562 (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B) & \
10563 BIT_MASK_WMAC_MU_BFEE2_AID_8822B)
10565 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE3_8822B */
10566 #define BIT_STATUS_BFEE3_8822B BIT(10)
10567 #define BIT_WMAC_MU_BFEE3_EN_8822B BIT(9)
10569 #define BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B 0
10570 #define BIT_MASK_WMAC_MU_BFEE3_AID_8822B 0x1ff
10571 #define BIT_WMAC_MU_BFEE3_AID_8822B(x) \
10572 (((x) & BIT_MASK_WMAC_MU_BFEE3_AID_8822B) \
10573 << BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B)
10574 #define BIT_GET_WMAC_MU_BFEE3_AID_8822B(x) \
10575 (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B) & \
10576 BIT_MASK_WMAC_MU_BFEE3_AID_8822B)
10578 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE4_8822B */
10579 #define BIT_STATUS_BFEE4_8822B BIT(10)
10580 #define BIT_WMAC_MU_BFEE4_EN_8822B BIT(9)
10582 #define BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B 0
10583 #define BIT_MASK_WMAC_MU_BFEE4_AID_8822B 0x1ff
10584 #define BIT_WMAC_MU_BFEE4_AID_8822B(x) \
10585 (((x) & BIT_MASK_WMAC_MU_BFEE4_AID_8822B) \
10586 << BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B)
10587 #define BIT_GET_WMAC_MU_BFEE4_AID_8822B(x) \
10588 (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B) & \
10589 BIT_MASK_WMAC_MU_BFEE4_AID_8822B)
10591 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE5_8822B */
10592 #define BIT_STATUS_BFEE5_8822B BIT(10)
10593 #define BIT_WMAC_MU_BFEE5_EN_8822B BIT(9)
10595 #define BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B 0
10596 #define BIT_MASK_WMAC_MU_BFEE5_AID_8822B 0x1ff
10597 #define BIT_WMAC_MU_BFEE5_AID_8822B(x) \
10598 (((x) & BIT_MASK_WMAC_MU_BFEE5_AID_8822B) \
10599 << BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B)
10600 #define BIT_GET_WMAC_MU_BFEE5_AID_8822B(x) \
10601 (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B) & \
10602 BIT_MASK_WMAC_MU_BFEE5_AID_8822B)
10604 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE6_8822B */
10605 #define BIT_STATUS_BFEE6_8822B BIT(10)
10606 #define BIT_WMAC_MU_BFEE6_EN_8822B BIT(9)
10608 #define BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B 0
10609 #define BIT_MASK_WMAC_MU_BFEE6_AID_8822B 0x1ff
10610 #define BIT_WMAC_MU_BFEE6_AID_8822B(x) \
10611 (((x) & BIT_MASK_WMAC_MU_BFEE6_AID_8822B) \
10612 << BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B)
10613 #define BIT_GET_WMAC_MU_BFEE6_AID_8822B(x) \
10614 (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B) & \
10615 BIT_MASK_WMAC_MU_BFEE6_AID_8822B)
10617 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE7_8822B */
10618 #define BIT_BIT_STATUS_BFEE4_8822B BIT(10)
10619 #define BIT_WMAC_MU_BFEE7_EN_8822B BIT(9)
10621 #define BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B 0
10622 #define BIT_MASK_WMAC_MU_BFEE7_AID_8822B 0x1ff
10623 #define BIT_WMAC_MU_BFEE7_AID_8822B(x) \
10624 (((x) & BIT_MASK_WMAC_MU_BFEE7_AID_8822B) \
10625 << BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B)
10626 #define BIT_GET_WMAC_MU_BFEE7_AID_8822B(x) \
10627 (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B) & \
10628 BIT_MASK_WMAC_MU_BFEE7_AID_8822B)
10630 /* 2 REG_NOT_VALID_8822B */
10631 #define BIT_RST_ALL_COUNTER_8822B BIT(31)
10633 #define BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B 16
10634 #define BIT_MASK_ABORT_RX_VBON_COUNTER_8822B 0xff
10635 #define BIT_ABORT_RX_VBON_COUNTER_8822B(x) \
10636 (((x) & BIT_MASK_ABORT_RX_VBON_COUNTER_8822B) \
10637 << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B)
10638 #define BIT_GET_ABORT_RX_VBON_COUNTER_8822B(x) \
10639 (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B) & \
10640 BIT_MASK_ABORT_RX_VBON_COUNTER_8822B)
10642 #define BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B 8
10643 #define BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B 0xff
10644 #define BIT_ABORT_RX_RDRDY_COUNTER_8822B(x) \
10645 (((x) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B) \
10646 << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B)
10647 #define BIT_GET_ABORT_RX_RDRDY_COUNTER_8822B(x) \
10648 (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B) & \
10649 BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B)
10651 #define BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B 0
10652 #define BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B 0xff
10653 #define BIT_VBON_EARLY_FALLING_COUNTER_8822B(x) \
10654 (((x) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B) \
10655 << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B)
10656 #define BIT_GET_VBON_EARLY_FALLING_COUNTER_8822B(x) \
10657 (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B) & \
10658 BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B)
10660 /* 2 REG_NOT_VALID_8822B */
10661 #define BIT_WMAC_PLCP_TRX_SEL_8822B BIT(31)
10663 #define BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B 28
10664 #define BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B 0x7
10665 #define BIT_WMAC_PLCP_RDSIG_SEL_8822B(x) \
10666 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B) \
10667 << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B)
10668 #define BIT_GET_WMAC_PLCP_RDSIG_SEL_8822B(x) \
10669 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B) & \
10670 BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B)
10672 #define BIT_SHIFT_WMAC_RATE_IDX_8822B 24
10673 #define BIT_MASK_WMAC_RATE_IDX_8822B 0xf
10674 #define BIT_WMAC_RATE_IDX_8822B(x) \
10675 (((x) & BIT_MASK_WMAC_RATE_IDX_8822B) << BIT_SHIFT_WMAC_RATE_IDX_8822B)
10676 #define BIT_GET_WMAC_RATE_IDX_8822B(x) \
10677 (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8822B) & BIT_MASK_WMAC_RATE_IDX_8822B)
10679 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8822B 0
10680 #define BIT_MASK_WMAC_PLCP_RDSIG_8822B 0xffffff
10681 #define BIT_WMAC_PLCP_RDSIG_8822B(x) \
10682 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8822B) \
10683 << BIT_SHIFT_WMAC_PLCP_RDSIG_8822B)
10684 #define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) \
10685 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & \
10686 BIT_MASK_WMAC_PLCP_RDSIG_8822B)
10688 /* 2 REG_NOT_VALID_8822B */
10689 #define BIT_WMAC_MUTX_IDX_8822B BIT(24)
10691 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8822B 0
10692 #define BIT_MASK_WMAC_PLCP_RDSIG_8822B 0xffffff
10693 #define BIT_WMAC_PLCP_RDSIG_8822B(x) \
10694 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8822B) \
10695 << BIT_SHIFT_WMAC_PLCP_RDSIG_8822B)
10696 #define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) \
10697 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & \
10698 BIT_MASK_WMAC_PLCP_RDSIG_8822B)
10700 /* 2 REG_TRANSMIT_ADDRSS_0_8822B (TA0 REGISTER) */
10702 #define BIT_SHIFT_TA0_8822B 0
10703 #define BIT_MASK_TA0_8822B 0xffffffffffffL
10704 #define BIT_TA0_8822B(x) (((x) & BIT_MASK_TA0_8822B) << BIT_SHIFT_TA0_8822B)
10705 #define BIT_GET_TA0_8822B(x) (((x) >> BIT_SHIFT_TA0_8822B) & BIT_MASK_TA0_8822B)
10707 /* 2 REG_TRANSMIT_ADDRSS_1_8822B (TA1 REGISTER) */
10709 #define BIT_SHIFT_TA1_8822B 0
10710 #define BIT_MASK_TA1_8822B 0xffffffffffffL
10711 #define BIT_TA1_8822B(x) (((x) & BIT_MASK_TA1_8822B) << BIT_SHIFT_TA1_8822B)
10712 #define BIT_GET_TA1_8822B(x) (((x) >> BIT_SHIFT_TA1_8822B) & BIT_MASK_TA1_8822B)
10714 /* 2 REG_TRANSMIT_ADDRSS_2_8822B (TA2 REGISTER) */
10716 #define BIT_SHIFT_TA2_8822B 0
10717 #define BIT_MASK_TA2_8822B 0xffffffffffffL
10718 #define BIT_TA2_8822B(x) (((x) & BIT_MASK_TA2_8822B) << BIT_SHIFT_TA2_8822B)
10719 #define BIT_GET_TA2_8822B(x) (((x) >> BIT_SHIFT_TA2_8822B) & BIT_MASK_TA2_8822B)
10721 /* 2 REG_TRANSMIT_ADDRSS_3_8822B (TA3 REGISTER) */
10723 #define BIT_SHIFT_TA3_8822B 0
10724 #define BIT_MASK_TA3_8822B 0xffffffffffffL
10725 #define BIT_TA3_8822B(x) (((x) & BIT_MASK_TA3_8822B) << BIT_SHIFT_TA3_8822B)
10726 #define BIT_GET_TA3_8822B(x) (((x) >> BIT_SHIFT_TA3_8822B) & BIT_MASK_TA3_8822B)
10728 /* 2 REG_TRANSMIT_ADDRSS_4_8822B (TA4 REGISTER) */
10730 #define BIT_SHIFT_TA4_8822B 0
10731 #define BIT_MASK_TA4_8822B 0xffffffffffffL
10732 #define BIT_TA4_8822B(x) (((x) & BIT_MASK_TA4_8822B) << BIT_SHIFT_TA4_8822B)
10733 #define BIT_GET_TA4_8822B(x) (((x) >> BIT_SHIFT_TA4_8822B) & BIT_MASK_TA4_8822B)
10735 /* 2 REG_NOT_VALID_8822B */
10737 /* 2 REG_MACID1_8822B */
10739 #define BIT_SHIFT_MACID1_8822B 0
10740 #define BIT_MASK_MACID1_8822B 0xffffffffffffL
10741 #define BIT_MACID1_8822B(x) \
10742 (((x) & BIT_MASK_MACID1_8822B) << BIT_SHIFT_MACID1_8822B)
10743 #define BIT_GET_MACID1_8822B(x) \
10744 (((x) >> BIT_SHIFT_MACID1_8822B) & BIT_MASK_MACID1_8822B)
10746 /* 2 REG_BSSID1_8822B */
10748 #define BIT_SHIFT_BSSID1_8822B 0
10749 #define BIT_MASK_BSSID1_8822B 0xffffffffffffL
10750 #define BIT_BSSID1_8822B(x) \
10751 (((x) & BIT_MASK_BSSID1_8822B) << BIT_SHIFT_BSSID1_8822B)
10752 #define BIT_GET_BSSID1_8822B(x) \
10753 (((x) >> BIT_SHIFT_BSSID1_8822B) & BIT_MASK_BSSID1_8822B)
10755 /* 2 REG_BCN_PSR_RPT1_8822B */
10757 #define BIT_SHIFT_DTIM_CNT1_8822B 24
10758 #define BIT_MASK_DTIM_CNT1_8822B 0xff
10759 #define BIT_DTIM_CNT1_8822B(x) \
10760 (((x) & BIT_MASK_DTIM_CNT1_8822B) << BIT_SHIFT_DTIM_CNT1_8822B)
10761 #define BIT_GET_DTIM_CNT1_8822B(x) \
10762 (((x) >> BIT_SHIFT_DTIM_CNT1_8822B) & BIT_MASK_DTIM_CNT1_8822B)
10764 #define BIT_SHIFT_DTIM_PERIOD1_8822B 16
10765 #define BIT_MASK_DTIM_PERIOD1_8822B 0xff
10766 #define BIT_DTIM_PERIOD1_8822B(x) \
10767 (((x) & BIT_MASK_DTIM_PERIOD1_8822B) << BIT_SHIFT_DTIM_PERIOD1_8822B)
10768 #define BIT_GET_DTIM_PERIOD1_8822B(x) \
10769 (((x) >> BIT_SHIFT_DTIM_PERIOD1_8822B) & BIT_MASK_DTIM_PERIOD1_8822B)
10771 #define BIT_DTIM1_8822B BIT(15)
10772 #define BIT_TIM1_8822B BIT(14)
10774 #define BIT_SHIFT_PS_AID_1_8822B 0
10775 #define BIT_MASK_PS_AID_1_8822B 0x7ff
10776 #define BIT_PS_AID_1_8822B(x) \
10777 (((x) & BIT_MASK_PS_AID_1_8822B) << BIT_SHIFT_PS_AID_1_8822B)
10778 #define BIT_GET_PS_AID_1_8822B(x) \
10779 (((x) >> BIT_SHIFT_PS_AID_1_8822B) & BIT_MASK_PS_AID_1_8822B)
10781 /* 2 REG_ASSOCIATED_BFMEE_SEL_8822B */
10782 #define BIT_TXUSER_ID1_8822B BIT(25)
10784 #define BIT_SHIFT_AID1_8822B 16
10785 #define BIT_MASK_AID1_8822B 0x1ff
10786 #define BIT_AID1_8822B(x) (((x) & BIT_MASK_AID1_8822B) << BIT_SHIFT_AID1_8822B)
10787 #define BIT_GET_AID1_8822B(x) \
10788 (((x) >> BIT_SHIFT_AID1_8822B) & BIT_MASK_AID1_8822B)
10790 #define BIT_TXUSER_ID0_8822B BIT(9)
10792 #define BIT_SHIFT_AID0_8822B 0
10793 #define BIT_MASK_AID0_8822B 0x1ff
10794 #define BIT_AID0_8822B(x) (((x) & BIT_MASK_AID0_8822B) << BIT_SHIFT_AID0_8822B)
10795 #define BIT_GET_AID0_8822B(x) \
10796 (((x) >> BIT_SHIFT_AID0_8822B) & BIT_MASK_AID0_8822B)
10798 /* 2 REG_SND_PTCL_CTRL_8822B */
10800 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B 24
10801 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8822B 0xff
10802 #define BIT_NDP_RX_STANDBY_TIMER_8822B(x) \
10803 (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8822B) \
10804 << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B)
10805 #define BIT_GET_NDP_RX_STANDBY_TIMER_8822B(x) \
10806 (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B) & \
10807 BIT_MASK_NDP_RX_STANDBY_TIMER_8822B)
10809 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B 16
10810 #define BIT_MASK_CSI_RPT_OFFSET_HT_8822B 0xff
10811 #define BIT_CSI_RPT_OFFSET_HT_8822B(x) \
10812 (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_8822B) \
10813 << BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B)
10814 #define BIT_GET_CSI_RPT_OFFSET_HT_8822B(x) \
10815 (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B) & \
10816 BIT_MASK_CSI_RPT_OFFSET_HT_8822B)
10818 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B 8
10819 #define BIT_MASK_R_WMAC_VHT_CATEGORY_8822B 0xff
10820 #define BIT_R_WMAC_VHT_CATEGORY_8822B(x) \
10821 (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_8822B) \
10822 << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B)
10823 #define BIT_GET_R_WMAC_VHT_CATEGORY_8822B(x) \
10824 (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B) & \
10825 BIT_MASK_R_WMAC_VHT_CATEGORY_8822B)
10827 #define BIT_R_WMAC_USE_NSTS_8822B BIT(7)
10828 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8822B BIT(6)
10829 #define BIT_R_DISABLE_CHECK_VHTSIGA_CRC_8822B BIT(5)
10830 #define BIT_R_WMAC_BFPARAM_SEL_8822B BIT(4)
10831 #define BIT_R_WMAC_CSISEQ_SEL_8822B BIT(3)
10832 #define BIT_R_WMAC_CSI_WITHHTC_EN_8822B BIT(2)
10833 #define BIT_R_WMAC_HT_NDPA_EN_8822B BIT(1)
10834 #define BIT_R_WMAC_VHT_NDPA_EN_8822B BIT(0)
10836 /* 2 REG_RX_CSI_RPT_INFO_8822B */
10838 /* 2 REG_NS_ARP_CTRL_8822B */
10839 #define BIT_R_WMAC_NSARP_RSPEN_8822B BIT(15)
10840 #define BIT_R_WMAC_NSARP_RARP_8822B BIT(9)
10841 #define BIT_R_WMAC_NSARP_RIPV6_8822B BIT(8)
10843 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B 6
10844 #define BIT_MASK_R_WMAC_NSARP_MODEN_8822B 0x3
10845 #define BIT_R_WMAC_NSARP_MODEN_8822B(x) \
10846 (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8822B) \
10847 << BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B)
10848 #define BIT_GET_R_WMAC_NSARP_MODEN_8822B(x) \
10849 (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B) & \
10850 BIT_MASK_R_WMAC_NSARP_MODEN_8822B)
10852 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B 4
10853 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B 0x3
10854 #define BIT_R_WMAC_NSARP_RSPFTP_8822B(x) \
10855 (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B) \
10856 << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B)
10857 #define BIT_GET_R_WMAC_NSARP_RSPFTP_8822B(x) \
10858 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B) & \
10859 BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B)
10861 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B 0
10862 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B 0xf
10863 #define BIT_R_WMAC_NSARP_RSPSEC_8822B(x) \
10864 (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B) \
10865 << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B)
10866 #define BIT_GET_R_WMAC_NSARP_RSPSEC_8822B(x) \
10867 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B) & \
10868 BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B)
10870 /* 2 REG_NS_ARP_INFO_8822B */
10871 #define BIT_REQ_IS_MCNS_8822B BIT(23)
10872 #define BIT_REQ_IS_UCNS_8822B BIT(22)
10873 #define BIT_REQ_IS_USNS_8822B BIT(21)
10874 #define BIT_REQ_IS_ARP_8822B BIT(20)
10875 #define BIT_EXPRSP_MH_WITHQC_8822B BIT(19)
10877 #define BIT_SHIFT_EXPRSP_SECTYPE_8822B 16
10878 #define BIT_MASK_EXPRSP_SECTYPE_8822B 0x7
10879 #define BIT_EXPRSP_SECTYPE_8822B(x) \
10880 (((x) & BIT_MASK_EXPRSP_SECTYPE_8822B) \
10881 << BIT_SHIFT_EXPRSP_SECTYPE_8822B)
10882 #define BIT_GET_EXPRSP_SECTYPE_8822B(x) \
10883 (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8822B) & \
10884 BIT_MASK_EXPRSP_SECTYPE_8822B)
10886 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B 8
10887 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B 0xff
10888 #define BIT_EXPRSP_CHKSM_7_TO_0_8822B(x) \
10889 (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B) \
10890 << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B)
10891 #define BIT_GET_EXPRSP_CHKSM_7_TO_0_8822B(x) \
10892 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B) & \
10893 BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B)
10895 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B 0
10896 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B 0xff
10897 #define BIT_EXPRSP_CHKSM_15_TO_8_8822B(x) \
10898 (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B) \
10899 << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B)
10900 #define BIT_GET_EXPRSP_CHKSM_15_TO_8_8822B(x) \
10901 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B) & \
10902 BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B)
10904 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8822B */
10906 #define BIT_SHIFT_WMAC_ARPIP_8822B 0
10907 #define BIT_MASK_WMAC_ARPIP_8822B 0xffffffffL
10908 #define BIT_WMAC_ARPIP_8822B(x) \
10909 (((x) & BIT_MASK_WMAC_ARPIP_8822B) << BIT_SHIFT_WMAC_ARPIP_8822B)
10910 #define BIT_GET_WMAC_ARPIP_8822B(x) \
10911 (((x) >> BIT_SHIFT_WMAC_ARPIP_8822B) & BIT_MASK_WMAC_ARPIP_8822B)
10913 /* 2 REG_BEAMFORMING_INFO_NSARP_8822B */
10915 #define BIT_SHIFT_BEAMFORMING_INFO_8822B 0
10916 #define BIT_MASK_BEAMFORMING_INFO_8822B 0xffffffffL
10917 #define BIT_BEAMFORMING_INFO_8822B(x) \
10918 (((x) & BIT_MASK_BEAMFORMING_INFO_8822B) \
10919 << BIT_SHIFT_BEAMFORMING_INFO_8822B)
10920 #define BIT_GET_BEAMFORMING_INFO_8822B(x) \
10921 (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8822B) & \
10922 BIT_MASK_BEAMFORMING_INFO_8822B)
10924 /* 2 REG_NOT_VALID_8822B */
10926 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B 0
10927 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B 0xffffffffffffffffffffffffffffffffL
10928 #define BIT_R_WMAC_IPV6_MYIPAD_8822B(x) \
10929 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B) \
10930 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B)
10931 #define BIT_GET_R_WMAC_IPV6_MYIPAD_8822B(x) \
10932 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B) & \
10933 BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B)
10935 /* 2 REG_RSVD_0X740_8822B */
10937 /* 2 REG_WMAC_RTX_CTX_SUBTYPE_CFG_8822B */
10939 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B 4
10940 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B 0xf
10941 #define BIT_R_WMAC_CTX_SUBTYPE_8822B(x) \
10942 (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B) \
10943 << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B)
10944 #define BIT_GET_R_WMAC_CTX_SUBTYPE_8822B(x) \
10945 (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B) & \
10946 BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B)
10948 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B 0
10949 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B 0xf
10950 #define BIT_R_WMAC_RTX_SUBTYPE_8822B(x) \
10951 (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B) \
10952 << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B)
10953 #define BIT_GET_R_WMAC_RTX_SUBTYPE_8822B(x) \
10954 (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B) & \
10955 BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B)
10957 /* 2 REG_WMAC_SWAES_CFG_8822B */
10959 /* 2 REG_BT_COEX_V2_8822B */
10960 #define BIT_GNT_BT_POLARITY_8822B BIT(12)
10961 #define BIT_GNT_BT_BYPASS_PRIORITY_8822B BIT(8)
10963 #define BIT_SHIFT_TIMER_8822B 0
10964 #define BIT_MASK_TIMER_8822B 0xff
10965 #define BIT_TIMER_8822B(x) \
10966 (((x) & BIT_MASK_TIMER_8822B) << BIT_SHIFT_TIMER_8822B)
10967 #define BIT_GET_TIMER_8822B(x) \
10968 (((x) >> BIT_SHIFT_TIMER_8822B) & BIT_MASK_TIMER_8822B)
10970 /* 2 REG_BT_COEX_8822B */
10971 #define BIT_R_GNT_BT_RFC_SW_8822B BIT(12)
10972 #define BIT_R_GNT_BT_RFC_SW_EN_8822B BIT(11)
10973 #define BIT_R_GNT_BT_BB_SW_8822B BIT(10)
10974 #define BIT_R_GNT_BT_BB_SW_EN_8822B BIT(9)
10975 #define BIT_R_BT_CNT_THREN_8822B BIT(8)
10977 #define BIT_SHIFT_R_BT_CNT_THR_8822B 0
10978 #define BIT_MASK_R_BT_CNT_THR_8822B 0xff
10979 #define BIT_R_BT_CNT_THR_8822B(x) \
10980 (((x) & BIT_MASK_R_BT_CNT_THR_8822B) << BIT_SHIFT_R_BT_CNT_THR_8822B)
10981 #define BIT_GET_R_BT_CNT_THR_8822B(x) \
10982 (((x) >> BIT_SHIFT_R_BT_CNT_THR_8822B) & BIT_MASK_R_BT_CNT_THR_8822B)
10984 /* 2 REG_WLAN_ACT_MASK_CTRL_8822B */
10985 #define BIT_WLRX_TER_BY_CTL_8822B BIT(43)
10986 #define BIT_WLRX_TER_BY_AD_8822B BIT(42)
10987 #define BIT_ANT_DIVERSITY_SEL_8822B BIT(41)
10988 #define BIT_ANTSEL_FOR_BT_CTRL_EN_8822B BIT(40)
10989 #define BIT_WLACT_LOW_GNTWL_EN_8822B BIT(34)
10990 #define BIT_WLACT_HIGH_GNTBT_EN_8822B BIT(33)
10991 #define BIT_NAV_UPPER_V1_8822B BIT(32)
10993 #define BIT_SHIFT_RXMYRTS_NAV_V1_8822B 8
10994 #define BIT_MASK_RXMYRTS_NAV_V1_8822B 0xff
10995 #define BIT_RXMYRTS_NAV_V1_8822B(x) \
10996 (((x) & BIT_MASK_RXMYRTS_NAV_V1_8822B) \
10997 << BIT_SHIFT_RXMYRTS_NAV_V1_8822B)
10998 #define BIT_GET_RXMYRTS_NAV_V1_8822B(x) \
10999 (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8822B) & \
11000 BIT_MASK_RXMYRTS_NAV_V1_8822B)
11002 #define BIT_SHIFT_RTSRST_V1_8822B 0
11003 #define BIT_MASK_RTSRST_V1_8822B 0xff
11004 #define BIT_RTSRST_V1_8822B(x) \
11005 (((x) & BIT_MASK_RTSRST_V1_8822B) << BIT_SHIFT_RTSRST_V1_8822B)
11006 #define BIT_GET_RTSRST_V1_8822B(x) \
11007 (((x) >> BIT_SHIFT_RTSRST_V1_8822B) & BIT_MASK_RTSRST_V1_8822B)
11009 /* 2 REG_BT_COEX_ENHANCED_INTR_CTRL_8822B */
11011 #define BIT_SHIFT_BT_STAT_DELAY_8822B 12
11012 #define BIT_MASK_BT_STAT_DELAY_8822B 0xf
11013 #define BIT_BT_STAT_DELAY_8822B(x) \
11014 (((x) & BIT_MASK_BT_STAT_DELAY_8822B) << BIT_SHIFT_BT_STAT_DELAY_8822B)
11015 #define BIT_GET_BT_STAT_DELAY_8822B(x) \
11016 (((x) >> BIT_SHIFT_BT_STAT_DELAY_8822B) & BIT_MASK_BT_STAT_DELAY_8822B)
11018 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8822B 8
11019 #define BIT_MASK_BT_TRX_INIT_DETECT_8822B 0xf
11020 #define BIT_BT_TRX_INIT_DETECT_8822B(x) \
11021 (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8822B) \
11022 << BIT_SHIFT_BT_TRX_INIT_DETECT_8822B)
11023 #define BIT_GET_BT_TRX_INIT_DETECT_8822B(x) \
11024 (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8822B) & \
11025 BIT_MASK_BT_TRX_INIT_DETECT_8822B)
11027 #define BIT_SHIFT_BT_PRI_DETECT_TO_8822B 4
11028 #define BIT_MASK_BT_PRI_DETECT_TO_8822B 0xf
11029 #define BIT_BT_PRI_DETECT_TO_8822B(x) \
11030 (((x) & BIT_MASK_BT_PRI_DETECT_TO_8822B) \
11031 << BIT_SHIFT_BT_PRI_DETECT_TO_8822B)
11032 #define BIT_GET_BT_PRI_DETECT_TO_8822B(x) \
11033 (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8822B) & \
11034 BIT_MASK_BT_PRI_DETECT_TO_8822B)
11036 #define BIT_R_GRANTALL_WLMASK_8822B BIT(3)
11037 #define BIT_STATIS_BT_EN_8822B BIT(2)
11038 #define BIT_WL_ACT_MASK_ENABLE_8822B BIT(1)
11039 #define BIT_ENHANCED_BT_8822B BIT(0)
11041 /* 2 REG_BT_ACT_STATISTICS_8822B */
11043 #define BIT_SHIFT_STATIS_BT_LO_RX_8822B (48 & CPU_OPT_WIDTH)
11044 #define BIT_MASK_STATIS_BT_LO_RX_8822B 0xffff
11045 #define BIT_STATIS_BT_LO_RX_8822B(x) \
11046 (((x) & BIT_MASK_STATIS_BT_LO_RX_8822B) \
11047 << BIT_SHIFT_STATIS_BT_LO_RX_8822B)
11048 #define BIT_GET_STATIS_BT_LO_RX_8822B(x) \
11049 (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_8822B) & \
11050 BIT_MASK_STATIS_BT_LO_RX_8822B)
11052 #define BIT_SHIFT_STATIS_BT_LO_TX_8822B (32 & CPU_OPT_WIDTH)
11053 #define BIT_MASK_STATIS_BT_LO_TX_8822B 0xffff
11054 #define BIT_STATIS_BT_LO_TX_8822B(x) \
11055 (((x) & BIT_MASK_STATIS_BT_LO_TX_8822B) \
11056 << BIT_SHIFT_STATIS_BT_LO_TX_8822B)
11057 #define BIT_GET_STATIS_BT_LO_TX_8822B(x) \
11058 (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_8822B) & \
11059 BIT_MASK_STATIS_BT_LO_TX_8822B)
11061 #define BIT_SHIFT_STATIS_BT_HI_RX_8822B 16
11062 #define BIT_MASK_STATIS_BT_HI_RX_8822B 0xffff
11063 #define BIT_STATIS_BT_HI_RX_8822B(x) \
11064 (((x) & BIT_MASK_STATIS_BT_HI_RX_8822B) \
11065 << BIT_SHIFT_STATIS_BT_HI_RX_8822B)
11066 #define BIT_GET_STATIS_BT_HI_RX_8822B(x) \
11067 (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8822B) & \
11068 BIT_MASK_STATIS_BT_HI_RX_8822B)
11070 #define BIT_SHIFT_STATIS_BT_HI_TX_8822B 0
11071 #define BIT_MASK_STATIS_BT_HI_TX_8822B 0xffff
11072 #define BIT_STATIS_BT_HI_TX_8822B(x) \
11073 (((x) & BIT_MASK_STATIS_BT_HI_TX_8822B) \
11074 << BIT_SHIFT_STATIS_BT_HI_TX_8822B)
11075 #define BIT_GET_STATIS_BT_HI_TX_8822B(x) \
11076 (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8822B) & \
11077 BIT_MASK_STATIS_BT_HI_TX_8822B)
11079 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8822B */
11081 #define BIT_SHIFT_R_BT_CMD_RPT_8822B 16
11082 #define BIT_MASK_R_BT_CMD_RPT_8822B 0xffff
11083 #define BIT_R_BT_CMD_RPT_8822B(x) \
11084 (((x) & BIT_MASK_R_BT_CMD_RPT_8822B) << BIT_SHIFT_R_BT_CMD_RPT_8822B)
11085 #define BIT_GET_R_BT_CMD_RPT_8822B(x) \
11086 (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8822B) & BIT_MASK_R_BT_CMD_RPT_8822B)
11088 #define BIT_SHIFT_R_RPT_FROM_BT_8822B 8
11089 #define BIT_MASK_R_RPT_FROM_BT_8822B 0xff
11090 #define BIT_R_RPT_FROM_BT_8822B(x) \
11091 (((x) & BIT_MASK_R_RPT_FROM_BT_8822B) << BIT_SHIFT_R_RPT_FROM_BT_8822B)
11092 #define BIT_GET_R_RPT_FROM_BT_8822B(x) \
11093 (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8822B) & BIT_MASK_R_RPT_FROM_BT_8822B)
11095 #define BIT_SHIFT_BT_HID_ISR_SET_8822B 6
11096 #define BIT_MASK_BT_HID_ISR_SET_8822B 0x3
11097 #define BIT_BT_HID_ISR_SET_8822B(x) \
11098 (((x) & BIT_MASK_BT_HID_ISR_SET_8822B) \
11099 << BIT_SHIFT_BT_HID_ISR_SET_8822B)
11100 #define BIT_GET_BT_HID_ISR_SET_8822B(x) \
11101 (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8822B) & \
11102 BIT_MASK_BT_HID_ISR_SET_8822B)
11104 #define BIT_TDMA_BT_START_NOTIFY_8822B BIT(5)
11105 #define BIT_ENABLE_TDMA_FW_MODE_8822B BIT(4)
11106 #define BIT_ENABLE_PTA_TDMA_MODE_8822B BIT(3)
11107 #define BIT_ENABLE_COEXIST_TAB_IN_TDMA_8822B BIT(2)
11108 #define BIT_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA_8822B BIT(1)
11109 #define BIT_RTK_BT_ENABLE_8822B BIT(0)
11111 /* 2 REG_BT_STATUS_REPORT_REGISTER_8822B */
11113 #define BIT_SHIFT_BT_PROFILE_8822B 24
11114 #define BIT_MASK_BT_PROFILE_8822B 0xff
11115 #define BIT_BT_PROFILE_8822B(x) \
11116 (((x) & BIT_MASK_BT_PROFILE_8822B) << BIT_SHIFT_BT_PROFILE_8822B)
11117 #define BIT_GET_BT_PROFILE_8822B(x) \
11118 (((x) >> BIT_SHIFT_BT_PROFILE_8822B) & BIT_MASK_BT_PROFILE_8822B)
11120 #define BIT_SHIFT_BT_POWER_8822B 16
11121 #define BIT_MASK_BT_POWER_8822B 0xff
11122 #define BIT_BT_POWER_8822B(x) \
11123 (((x) & BIT_MASK_BT_POWER_8822B) << BIT_SHIFT_BT_POWER_8822B)
11124 #define BIT_GET_BT_POWER_8822B(x) \
11125 (((x) >> BIT_SHIFT_BT_POWER_8822B) & BIT_MASK_BT_POWER_8822B)
11127 #define BIT_SHIFT_BT_PREDECT_STATUS_8822B 8
11128 #define BIT_MASK_BT_PREDECT_STATUS_8822B 0xff
11129 #define BIT_BT_PREDECT_STATUS_8822B(x) \
11130 (((x) & BIT_MASK_BT_PREDECT_STATUS_8822B) \
11131 << BIT_SHIFT_BT_PREDECT_STATUS_8822B)
11132 #define BIT_GET_BT_PREDECT_STATUS_8822B(x) \
11133 (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8822B) & \
11134 BIT_MASK_BT_PREDECT_STATUS_8822B)
11136 #define BIT_SHIFT_BT_CMD_INFO_8822B 0
11137 #define BIT_MASK_BT_CMD_INFO_8822B 0xff
11138 #define BIT_BT_CMD_INFO_8822B(x) \
11139 (((x) & BIT_MASK_BT_CMD_INFO_8822B) << BIT_SHIFT_BT_CMD_INFO_8822B)
11140 #define BIT_GET_BT_CMD_INFO_8822B(x) \
11141 (((x) >> BIT_SHIFT_BT_CMD_INFO_8822B) & BIT_MASK_BT_CMD_INFO_8822B)
11143 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8822B */
11144 #define BIT_EN_MAC_NULL_PKT_NOTIFY_8822B BIT(31)
11145 #define BIT_EN_WLAN_RPT_AND_BT_QUERY_8822B BIT(30)
11146 #define BIT_EN_BT_STSTUS_RPT_8822B BIT(29)
11147 #define BIT_EN_BT_POWER_8822B BIT(28)
11148 #define BIT_EN_BT_CHANNEL_8822B BIT(27)
11149 #define BIT_EN_BT_SLOT_CHANGE_8822B BIT(26)
11150 #define BIT_EN_BT_PROFILE_OR_HID_8822B BIT(25)
11151 #define BIT_WLAN_RPT_NOTIFY_8822B BIT(24)
11153 #define BIT_SHIFT_WLAN_RPT_DATA_8822B 16
11154 #define BIT_MASK_WLAN_RPT_DATA_8822B 0xff
11155 #define BIT_WLAN_RPT_DATA_8822B(x) \
11156 (((x) & BIT_MASK_WLAN_RPT_DATA_8822B) << BIT_SHIFT_WLAN_RPT_DATA_8822B)
11157 #define BIT_GET_WLAN_RPT_DATA_8822B(x) \
11158 (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8822B) & BIT_MASK_WLAN_RPT_DATA_8822B)
11160 #define BIT_SHIFT_CMD_ID_8822B 8
11161 #define BIT_MASK_CMD_ID_8822B 0xff
11162 #define BIT_CMD_ID_8822B(x) \
11163 (((x) & BIT_MASK_CMD_ID_8822B) << BIT_SHIFT_CMD_ID_8822B)
11164 #define BIT_GET_CMD_ID_8822B(x) \
11165 (((x) >> BIT_SHIFT_CMD_ID_8822B) & BIT_MASK_CMD_ID_8822B)
11167 #define BIT_SHIFT_BT_DATA_8822B 0
11168 #define BIT_MASK_BT_DATA_8822B 0xff
11169 #define BIT_BT_DATA_8822B(x) \
11170 (((x) & BIT_MASK_BT_DATA_8822B) << BIT_SHIFT_BT_DATA_8822B)
11171 #define BIT_GET_BT_DATA_8822B(x) \
11172 (((x) >> BIT_SHIFT_BT_DATA_8822B) & BIT_MASK_BT_DATA_8822B)
11174 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8822B */
11176 #define BIT_SHIFT_WLAN_RPT_TO_8822B 0
11177 #define BIT_MASK_WLAN_RPT_TO_8822B 0xff
11178 #define BIT_WLAN_RPT_TO_8822B(x) \
11179 (((x) & BIT_MASK_WLAN_RPT_TO_8822B) << BIT_SHIFT_WLAN_RPT_TO_8822B)
11180 #define BIT_GET_WLAN_RPT_TO_8822B(x) \
11181 (((x) >> BIT_SHIFT_WLAN_RPT_TO_8822B) & BIT_MASK_WLAN_RPT_TO_8822B)
11183 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8822B */
11185 #define BIT_SHIFT_ISOLATION_CHK_8822B 1
11186 #define BIT_MASK_ISOLATION_CHK_8822B 0x7fffffffffffffffffffL
11187 #define BIT_ISOLATION_CHK_8822B(x) \
11188 (((x) & BIT_MASK_ISOLATION_CHK_8822B) << BIT_SHIFT_ISOLATION_CHK_8822B)
11189 #define BIT_GET_ISOLATION_CHK_8822B(x) \
11190 (((x) >> BIT_SHIFT_ISOLATION_CHK_8822B) & BIT_MASK_ISOLATION_CHK_8822B)
11192 #define BIT_ISOLATION_EN_8822B BIT(0)
11194 /* 2 REG_BT_INTERRUPT_STATUS_REGISTER_8822B */
11195 #define BIT_BT_HID_ISR_8822B BIT(7)
11196 #define BIT_BT_QUERY_ISR_8822B BIT(6)
11197 #define BIT_MAC_NULL_PKT_NOTIFY_ISR_8822B BIT(5)
11198 #define BIT_WLAN_RPT_ISR_8822B BIT(4)
11199 #define BIT_BT_POWER_ISR_8822B BIT(3)
11200 #define BIT_BT_CHANNEL_ISR_8822B BIT(2)
11201 #define BIT_BT_SLOT_CHANGE_ISR_8822B BIT(1)
11202 #define BIT_BT_PROFILE_ISR_8822B BIT(0)
11204 /* 2 REG_BT_TDMA_TIME_REGISTER_8822B */
11206 #define BIT_SHIFT_BT_TIME_8822B 6
11207 #define BIT_MASK_BT_TIME_8822B 0x3ffffff
11208 #define BIT_BT_TIME_8822B(x) \
11209 (((x) & BIT_MASK_BT_TIME_8822B) << BIT_SHIFT_BT_TIME_8822B)
11210 #define BIT_GET_BT_TIME_8822B(x) \
11211 (((x) >> BIT_SHIFT_BT_TIME_8822B) & BIT_MASK_BT_TIME_8822B)
11213 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B 0
11214 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8822B 0x3f
11215 #define BIT_BT_RPT_SAMPLE_RATE_8822B(x) \
11216 (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8822B) \
11217 << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B)
11218 #define BIT_GET_BT_RPT_SAMPLE_RATE_8822B(x) \
11219 (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B) & \
11220 BIT_MASK_BT_RPT_SAMPLE_RATE_8822B)
11222 /* 2 REG_BT_ACT_REGISTER_8822B */
11224 #define BIT_SHIFT_BT_EISR_EN_8822B 16
11225 #define BIT_MASK_BT_EISR_EN_8822B 0xff
11226 #define BIT_BT_EISR_EN_8822B(x) \
11227 (((x) & BIT_MASK_BT_EISR_EN_8822B) << BIT_SHIFT_BT_EISR_EN_8822B)
11228 #define BIT_GET_BT_EISR_EN_8822B(x) \
11229 (((x) >> BIT_SHIFT_BT_EISR_EN_8822B) & BIT_MASK_BT_EISR_EN_8822B)
11231 #define BIT_BT_ACT_FALLING_ISR_8822B BIT(10)
11232 #define BIT_BT_ACT_RISING_ISR_8822B BIT(9)
11233 #define BIT_TDMA_TO_ISR_8822B BIT(8)
11235 #define BIT_SHIFT_BT_CH_8822B 0
11236 #define BIT_MASK_BT_CH_8822B 0xff
11237 #define BIT_BT_CH_8822B(x) \
11238 (((x) & BIT_MASK_BT_CH_8822B) << BIT_SHIFT_BT_CH_8822B)
11239 #define BIT_GET_BT_CH_8822B(x) \
11240 (((x) >> BIT_SHIFT_BT_CH_8822B) & BIT_MASK_BT_CH_8822B)
11242 /* 2 REG_OBFF_CTRL_BASIC_8822B */
11243 #define BIT_OBFF_EN_V1_8822B BIT(31)
11245 #define BIT_SHIFT_OBFF_STATE_V1_8822B 28
11246 #define BIT_MASK_OBFF_STATE_V1_8822B 0x3
11247 #define BIT_OBFF_STATE_V1_8822B(x) \
11248 (((x) & BIT_MASK_OBFF_STATE_V1_8822B) << BIT_SHIFT_OBFF_STATE_V1_8822B)
11249 #define BIT_GET_OBFF_STATE_V1_8822B(x) \
11250 (((x) >> BIT_SHIFT_OBFF_STATE_V1_8822B) & BIT_MASK_OBFF_STATE_V1_8822B)
11252 #define BIT_OBFF_ACT_RXDMA_EN_8822B BIT(27)
11253 #define BIT_OBFF_BLOCK_INT_EN_8822B BIT(26)
11254 #define BIT_OBFF_AUTOACT_EN_8822B BIT(25)
11255 #define BIT_OBFF_AUTOIDLE_EN_8822B BIT(24)
11257 #define BIT_SHIFT_WAKE_MAX_PLS_8822B 20
11258 #define BIT_MASK_WAKE_MAX_PLS_8822B 0x7
11259 #define BIT_WAKE_MAX_PLS_8822B(x) \
11260 (((x) & BIT_MASK_WAKE_MAX_PLS_8822B) << BIT_SHIFT_WAKE_MAX_PLS_8822B)
11261 #define BIT_GET_WAKE_MAX_PLS_8822B(x) \
11262 (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8822B) & BIT_MASK_WAKE_MAX_PLS_8822B)
11264 #define BIT_SHIFT_WAKE_MIN_PLS_8822B 16
11265 #define BIT_MASK_WAKE_MIN_PLS_8822B 0x7
11266 #define BIT_WAKE_MIN_PLS_8822B(x) \
11267 (((x) & BIT_MASK_WAKE_MIN_PLS_8822B) << BIT_SHIFT_WAKE_MIN_PLS_8822B)
11268 #define BIT_GET_WAKE_MIN_PLS_8822B(x) \
11269 (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8822B) & BIT_MASK_WAKE_MIN_PLS_8822B)
11271 #define BIT_SHIFT_WAKE_MAX_F2F_8822B 12
11272 #define BIT_MASK_WAKE_MAX_F2F_8822B 0x7
11273 #define BIT_WAKE_MAX_F2F_8822B(x) \
11274 (((x) & BIT_MASK_WAKE_MAX_F2F_8822B) << BIT_SHIFT_WAKE_MAX_F2F_8822B)
11275 #define BIT_GET_WAKE_MAX_F2F_8822B(x) \
11276 (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8822B) & BIT_MASK_WAKE_MAX_F2F_8822B)
11278 #define BIT_SHIFT_WAKE_MIN_F2F_8822B 8
11279 #define BIT_MASK_WAKE_MIN_F2F_8822B 0x7
11280 #define BIT_WAKE_MIN_F2F_8822B(x) \
11281 (((x) & BIT_MASK_WAKE_MIN_F2F_8822B) << BIT_SHIFT_WAKE_MIN_F2F_8822B)
11282 #define BIT_GET_WAKE_MIN_F2F_8822B(x) \
11283 (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8822B) & BIT_MASK_WAKE_MIN_F2F_8822B)
11285 #define BIT_APP_CPU_ACT_V1_8822B BIT(3)
11286 #define BIT_APP_OBFF_V1_8822B BIT(2)
11287 #define BIT_APP_IDLE_V1_8822B BIT(1)
11288 #define BIT_APP_INIT_V1_8822B BIT(0)
11290 /* 2 REG_OBFF_CTRL2_TIMER_8822B */
11292 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B 24
11293 #define BIT_MASK_RX_HIGH_TIMER_IDX_8822B 0x7
11294 #define BIT_RX_HIGH_TIMER_IDX_8822B(x) \
11295 (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8822B) \
11296 << BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B)
11297 #define BIT_GET_RX_HIGH_TIMER_IDX_8822B(x) \
11298 (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B) & \
11299 BIT_MASK_RX_HIGH_TIMER_IDX_8822B)
11301 #define BIT_SHIFT_RX_MED_TIMER_IDX_8822B 16
11302 #define BIT_MASK_RX_MED_TIMER_IDX_8822B 0x7
11303 #define BIT_RX_MED_TIMER_IDX_8822B(x) \
11304 (((x) & BIT_MASK_RX_MED_TIMER_IDX_8822B) \
11305 << BIT_SHIFT_RX_MED_TIMER_IDX_8822B)
11306 #define BIT_GET_RX_MED_TIMER_IDX_8822B(x) \
11307 (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8822B) & \
11308 BIT_MASK_RX_MED_TIMER_IDX_8822B)
11310 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8822B 8
11311 #define BIT_MASK_RX_LOW_TIMER_IDX_8822B 0x7
11312 #define BIT_RX_LOW_TIMER_IDX_8822B(x) \
11313 (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8822B) \
11314 << BIT_SHIFT_RX_LOW_TIMER_IDX_8822B)
11315 #define BIT_GET_RX_LOW_TIMER_IDX_8822B(x) \
11316 (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8822B) & \
11317 BIT_MASK_RX_LOW_TIMER_IDX_8822B)
11319 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B 0
11320 #define BIT_MASK_OBFF_INT_TIMER_IDX_8822B 0x7
11321 #define BIT_OBFF_INT_TIMER_IDX_8822B(x) \
11322 (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8822B) \
11323 << BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B)
11324 #define BIT_GET_OBFF_INT_TIMER_IDX_8822B(x) \
11325 (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B) & \
11326 BIT_MASK_OBFF_INT_TIMER_IDX_8822B)
11328 /* 2 REG_LTR_CTRL_BASIC_8822B */
11329 #define BIT_LTR_EN_V1_8822B BIT(31)
11330 #define BIT_LTR_HW_EN_V1_8822B BIT(30)
11331 #define BIT_LRT_ACT_CTS_EN_8822B BIT(29)
11332 #define BIT_LTR_ACT_RXPKT_EN_8822B BIT(28)
11333 #define BIT_LTR_ACT_RXDMA_EN_8822B BIT(27)
11334 #define BIT_LTR_IDLE_NO_SNOOP_8822B BIT(26)
11335 #define BIT_SPDUP_MGTPKT_8822B BIT(25)
11336 #define BIT_RX_AGG_EN_8822B BIT(24)
11337 #define BIT_APP_LTR_ACT_8822B BIT(23)
11338 #define BIT_APP_LTR_IDLE_8822B BIT(22)
11340 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B 20
11341 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8822B 0x3
11342 #define BIT_HIGH_RATE_TRIG_SEL_8822B(x) \
11343 (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8822B) \
11344 << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B)
11345 #define BIT_GET_HIGH_RATE_TRIG_SEL_8822B(x) \
11346 (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B) & \
11347 BIT_MASK_HIGH_RATE_TRIG_SEL_8822B)
11349 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8822B 18
11350 #define BIT_MASK_MED_RATE_TRIG_SEL_8822B 0x3
11351 #define BIT_MED_RATE_TRIG_SEL_8822B(x) \
11352 (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8822B) \
11353 << BIT_SHIFT_MED_RATE_TRIG_SEL_8822B)
11354 #define BIT_GET_MED_RATE_TRIG_SEL_8822B(x) \
11355 (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8822B) & \
11356 BIT_MASK_MED_RATE_TRIG_SEL_8822B)
11358 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B 16
11359 #define BIT_MASK_LOW_RATE_TRIG_SEL_8822B 0x3
11360 #define BIT_LOW_RATE_TRIG_SEL_8822B(x) \
11361 (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8822B) \
11362 << BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B)
11363 #define BIT_GET_LOW_RATE_TRIG_SEL_8822B(x) \
11364 (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B) & \
11365 BIT_MASK_LOW_RATE_TRIG_SEL_8822B)
11367 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8822B 8
11368 #define BIT_MASK_HIGH_RATE_BD_IDX_8822B 0x7f
11369 #define BIT_HIGH_RATE_BD_IDX_8822B(x) \
11370 (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8822B) \
11371 << BIT_SHIFT_HIGH_RATE_BD_IDX_8822B)
11372 #define BIT_GET_HIGH_RATE_BD_IDX_8822B(x) \
11373 (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8822B) & \
11374 BIT_MASK_HIGH_RATE_BD_IDX_8822B)
11376 #define BIT_SHIFT_LOW_RATE_BD_IDX_8822B 0
11377 #define BIT_MASK_LOW_RATE_BD_IDX_8822B 0x7f
11378 #define BIT_LOW_RATE_BD_IDX_8822B(x) \
11379 (((x) & BIT_MASK_LOW_RATE_BD_IDX_8822B) \
11380 << BIT_SHIFT_LOW_RATE_BD_IDX_8822B)
11381 #define BIT_GET_LOW_RATE_BD_IDX_8822B(x) \
11382 (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8822B) & \
11383 BIT_MASK_LOW_RATE_BD_IDX_8822B)
11385 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8822B */
11387 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B 24
11388 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8822B 0x7
11389 #define BIT_RX_EMPTY_TIMER_IDX_8822B(x) \
11390 (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8822B) \
11391 << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B)
11392 #define BIT_GET_RX_EMPTY_TIMER_IDX_8822B(x) \
11393 (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B) & \
11394 BIT_MASK_RX_EMPTY_TIMER_IDX_8822B)
11396 #define BIT_SHIFT_RX_AFULL_TH_IDX_8822B 20
11397 #define BIT_MASK_RX_AFULL_TH_IDX_8822B 0x7
11398 #define BIT_RX_AFULL_TH_IDX_8822B(x) \
11399 (((x) & BIT_MASK_RX_AFULL_TH_IDX_8822B) \
11400 << BIT_SHIFT_RX_AFULL_TH_IDX_8822B)
11401 #define BIT_GET_RX_AFULL_TH_IDX_8822B(x) \
11402 (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8822B) & \
11403 BIT_MASK_RX_AFULL_TH_IDX_8822B)
11405 #define BIT_SHIFT_RX_HIGH_TH_IDX_8822B 16
11406 #define BIT_MASK_RX_HIGH_TH_IDX_8822B 0x7
11407 #define BIT_RX_HIGH_TH_IDX_8822B(x) \
11408 (((x) & BIT_MASK_RX_HIGH_TH_IDX_8822B) \
11409 << BIT_SHIFT_RX_HIGH_TH_IDX_8822B)
11410 #define BIT_GET_RX_HIGH_TH_IDX_8822B(x) \
11411 (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8822B) & \
11412 BIT_MASK_RX_HIGH_TH_IDX_8822B)
11414 #define BIT_SHIFT_RX_MED_TH_IDX_8822B 12
11415 #define BIT_MASK_RX_MED_TH_IDX_8822B 0x7
11416 #define BIT_RX_MED_TH_IDX_8822B(x) \
11417 (((x) & BIT_MASK_RX_MED_TH_IDX_8822B) << BIT_SHIFT_RX_MED_TH_IDX_8822B)
11418 #define BIT_GET_RX_MED_TH_IDX_8822B(x) \
11419 (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8822B) & BIT_MASK_RX_MED_TH_IDX_8822B)
11421 #define BIT_SHIFT_RX_LOW_TH_IDX_8822B 8
11422 #define BIT_MASK_RX_LOW_TH_IDX_8822B 0x7
11423 #define BIT_RX_LOW_TH_IDX_8822B(x) \
11424 (((x) & BIT_MASK_RX_LOW_TH_IDX_8822B) << BIT_SHIFT_RX_LOW_TH_IDX_8822B)
11425 #define BIT_GET_RX_LOW_TH_IDX_8822B(x) \
11426 (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8822B) & BIT_MASK_RX_LOW_TH_IDX_8822B)
11428 #define BIT_SHIFT_LTR_SPACE_IDX_8822B 4
11429 #define BIT_MASK_LTR_SPACE_IDX_8822B 0x3
11430 #define BIT_LTR_SPACE_IDX_8822B(x) \
11431 (((x) & BIT_MASK_LTR_SPACE_IDX_8822B) << BIT_SHIFT_LTR_SPACE_IDX_8822B)
11432 #define BIT_GET_LTR_SPACE_IDX_8822B(x) \
11433 (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8822B) & BIT_MASK_LTR_SPACE_IDX_8822B)
11435 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B 0
11436 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8822B 0x7
11437 #define BIT_LTR_IDLE_TIMER_IDX_8822B(x) \
11438 (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8822B) \
11439 << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B)
11440 #define BIT_GET_LTR_IDLE_TIMER_IDX_8822B(x) \
11441 (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B) & \
11442 BIT_MASK_LTR_IDLE_TIMER_IDX_8822B)
11444 /* 2 REG_LTR_IDLE_LATENCY_V1_8822B */
11446 #define BIT_SHIFT_LTR_IDLE_L_8822B 0
11447 #define BIT_MASK_LTR_IDLE_L_8822B 0xffffffffL
11448 #define BIT_LTR_IDLE_L_8822B(x) \
11449 (((x) & BIT_MASK_LTR_IDLE_L_8822B) << BIT_SHIFT_LTR_IDLE_L_8822B)
11450 #define BIT_GET_LTR_IDLE_L_8822B(x) \
11451 (((x) >> BIT_SHIFT_LTR_IDLE_L_8822B) & BIT_MASK_LTR_IDLE_L_8822B)
11453 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8822B */
11455 #define BIT_SHIFT_LTR_ACT_L_8822B 0
11456 #define BIT_MASK_LTR_ACT_L_8822B 0xffffffffL
11457 #define BIT_LTR_ACT_L_8822B(x) \
11458 (((x) & BIT_MASK_LTR_ACT_L_8822B) << BIT_SHIFT_LTR_ACT_L_8822B)
11459 #define BIT_GET_LTR_ACT_L_8822B(x) \
11460 (((x) >> BIT_SHIFT_LTR_ACT_L_8822B) & BIT_MASK_LTR_ACT_L_8822B)
11462 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8822B */
11463 #define BIT_APPEND_MACID_IN_RESP_EN_8822B BIT(50)
11464 #define BIT_ADDR2_MATCH_EN_8822B BIT(49)
11465 #define BIT_ANTTRN_EN_8822B BIT(48)
11467 #define BIT_SHIFT_TRAIN_STA_ADDR_8822B 0
11468 #define BIT_MASK_TRAIN_STA_ADDR_8822B 0xffffffffffffL
11469 #define BIT_TRAIN_STA_ADDR_8822B(x) \
11470 (((x) & BIT_MASK_TRAIN_STA_ADDR_8822B) \
11471 << BIT_SHIFT_TRAIN_STA_ADDR_8822B)
11472 #define BIT_GET_TRAIN_STA_ADDR_8822B(x) \
11473 (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_8822B) & \
11474 BIT_MASK_TRAIN_STA_ADDR_8822B)
11476 /* 2 REG_RSVD_0X7B4_8822B */
11478 /* 2 REG_WMAC_PKTCNT_RWD_8822B */
11480 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8822B 4
11481 #define BIT_MASK_PKTCNT_BSSIDMAP_8822B 0xf
11482 #define BIT_PKTCNT_BSSIDMAP_8822B(x) \
11483 (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8822B) \
11484 << BIT_SHIFT_PKTCNT_BSSIDMAP_8822B)
11485 #define BIT_GET_PKTCNT_BSSIDMAP_8822B(x) \
11486 (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8822B) & \
11487 BIT_MASK_PKTCNT_BSSIDMAP_8822B)
11489 #define BIT_PKTCNT_CNTRST_8822B BIT(1)
11490 #define BIT_PKTCNT_CNTEN_8822B BIT(0)
11492 /* 2 REG_WMAC_PKTCNT_CTRL_8822B */
11493 #define BIT_WMAC_PKTCNT_TRST_8822B BIT(9)
11494 #define BIT_WMAC_PKTCNT_FEN_8822B BIT(8)
11496 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B 0
11497 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8822B 0xff
11498 #define BIT_WMAC_PKTCNT_CFGAD_8822B(x) \
11499 (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8822B) \
11500 << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B)
11501 #define BIT_GET_WMAC_PKTCNT_CFGAD_8822B(x) \
11502 (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B) & \
11503 BIT_MASK_WMAC_PKTCNT_CFGAD_8822B)
11505 /* 2 REG_IQ_DUMP_8822B */
11507 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B (64 & CPU_OPT_WIDTH)
11508 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B 0xffffffffL
11509 #define BIT_R_WMAC_MATCH_REF_MAC_8822B(x) \
11510 (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B) \
11511 << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B)
11512 #define BIT_GET_R_WMAC_MATCH_REF_MAC_8822B(x) \
11513 (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B) & \
11514 BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B)
11516 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B (32 & CPU_OPT_WIDTH)
11517 #define BIT_MASK_R_WMAC_MASK_LA_MAC_8822B 0xffffffffL
11518 #define BIT_R_WMAC_MASK_LA_MAC_8822B(x) \
11519 (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_8822B) \
11520 << BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B)
11521 #define BIT_GET_R_WMAC_MASK_LA_MAC_8822B(x) \
11522 (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B) & \
11523 BIT_MASK_R_WMAC_MASK_LA_MAC_8822B)
11525 #define BIT_SHIFT_DUMP_OK_ADDR_8822B 15
11526 #define BIT_MASK_DUMP_OK_ADDR_8822B 0x1ffff
11527 #define BIT_DUMP_OK_ADDR_8822B(x) \
11528 (((x) & BIT_MASK_DUMP_OK_ADDR_8822B) << BIT_SHIFT_DUMP_OK_ADDR_8822B)
11529 #define BIT_GET_DUMP_OK_ADDR_8822B(x) \
11530 (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8822B) & BIT_MASK_DUMP_OK_ADDR_8822B)
11532 #define BIT_SHIFT_R_TRIG_TIME_SEL_8822B 8
11533 #define BIT_MASK_R_TRIG_TIME_SEL_8822B 0x7f
11534 #define BIT_R_TRIG_TIME_SEL_8822B(x) \
11535 (((x) & BIT_MASK_R_TRIG_TIME_SEL_8822B) \
11536 << BIT_SHIFT_R_TRIG_TIME_SEL_8822B)
11537 #define BIT_GET_R_TRIG_TIME_SEL_8822B(x) \
11538 (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8822B) & \
11539 BIT_MASK_R_TRIG_TIME_SEL_8822B)
11541 #define BIT_SHIFT_R_MAC_TRIG_SEL_8822B 6
11542 #define BIT_MASK_R_MAC_TRIG_SEL_8822B 0x3
11543 #define BIT_R_MAC_TRIG_SEL_8822B(x) \
11544 (((x) & BIT_MASK_R_MAC_TRIG_SEL_8822B) \
11545 << BIT_SHIFT_R_MAC_TRIG_SEL_8822B)
11546 #define BIT_GET_R_MAC_TRIG_SEL_8822B(x) \
11547 (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8822B) & \
11548 BIT_MASK_R_MAC_TRIG_SEL_8822B)
11550 #define BIT_MAC_TRIG_REG_8822B BIT(5)
11552 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B 3
11553 #define BIT_MASK_R_LEVEL_PULSE_SEL_8822B 0x3
11554 #define BIT_R_LEVEL_PULSE_SEL_8822B(x) \
11555 (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8822B) \
11556 << BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B)
11557 #define BIT_GET_R_LEVEL_PULSE_SEL_8822B(x) \
11558 (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B) & \
11559 BIT_MASK_R_LEVEL_PULSE_SEL_8822B)
11561 #define BIT_EN_LA_MAC_8822B BIT(2)
11562 #define BIT_R_EN_IQDUMP_8822B BIT(1)
11563 #define BIT_R_IQDATA_DUMP_8822B BIT(0)
11565 /* 2 REG_WMAC_FTM_CTL_8822B */
11566 #define BIT_RXFTM_TXACK_SC_8822B BIT(6)
11567 #define BIT_RXFTM_TXACK_BW_8822B BIT(5)
11568 #define BIT_RXFTM_EN_8822B BIT(3)
11569 #define BIT_RXFTMREQ_BYDRV_8822B BIT(2)
11570 #define BIT_RXFTMREQ_EN_8822B BIT(1)
11571 #define BIT_FTM_EN_8822B BIT(0)
11573 /* 2 REG_WMAC_IQ_MDPK_FUNC_8822B */
11575 /* 2 REG_WMAC_OPTION_FUNCTION_8822B */
11577 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B (64 & CPU_OPT_WIDTH)
11578 #define BIT_MASK_R_WMAC_RX_FIL_LEN_8822B 0xffff
11579 #define BIT_R_WMAC_RX_FIL_LEN_8822B(x) \
11580 (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_8822B) \
11581 << BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B)
11582 #define BIT_GET_R_WMAC_RX_FIL_LEN_8822B(x) \
11583 (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B) & \
11584 BIT_MASK_R_WMAC_RX_FIL_LEN_8822B)
11586 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B (56 & CPU_OPT_WIDTH)
11587 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B 0xff
11588 #define BIT_R_WMAC_RXFIFO_FULL_TH_8822B(x) \
11589 (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B) \
11590 << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B)
11591 #define BIT_GET_R_WMAC_RXFIFO_FULL_TH_8822B(x) \
11592 (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B) & \
11593 BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B)
11595 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_8822B BIT(55)
11596 #define BIT_R_WMAC_RXRST_DLY_8822B BIT(54)
11597 #define BIT_R_WMAC_SRCH_TXRPT_REF_DROP_8822B BIT(53)
11598 #define BIT_R_WMAC_SRCH_TXRPT_UA1_8822B BIT(52)
11599 #define BIT_R_WMAC_SRCH_TXRPT_TYPE_8822B BIT(51)
11600 #define BIT_R_WMAC_NDP_RST_8822B BIT(50)
11601 #define BIT_R_WMAC_POWINT_EN_8822B BIT(49)
11602 #define BIT_R_WMAC_SRCH_TXRPT_PERPKT_8822B BIT(48)
11603 #define BIT_R_WMAC_SRCH_TXRPT_MID_8822B BIT(47)
11604 #define BIT_R_WMAC_PFIN_TOEN_8822B BIT(46)
11605 #define BIT_R_WMAC_FIL_SECERR_8822B BIT(45)
11606 #define BIT_R_WMAC_FIL_CTLPKTLEN_8822B BIT(44)
11607 #define BIT_R_WMAC_FIL_FCTYPE_8822B BIT(43)
11608 #define BIT_R_WMAC_FIL_FCPROVER_8822B BIT(42)
11609 #define BIT_R_WMAC_PHYSTS_SNIF_8822B BIT(41)
11610 #define BIT_R_WMAC_PHYSTS_PLCP_8822B BIT(40)
11611 #define BIT_R_MAC_TCR_VBONF_RD_8822B BIT(39)
11612 #define BIT_R_WMAC_TCR_MPAR_NDP_8822B BIT(38)
11613 #define BIT_R_WMAC_NDP_FILTER_8822B BIT(37)
11614 #define BIT_R_WMAC_RXLEN_SEL_8822B BIT(36)
11615 #define BIT_R_WMAC_RXLEN_SEL1_8822B BIT(35)
11616 #define BIT_R_OFDM_FILTER_8822B BIT(34)
11617 #define BIT_R_WMAC_CHK_OFDM_LEN_8822B BIT(33)
11618 #define BIT_R_WMAC_CHK_CCK_LEN_8822B BIT(32)
11620 #define BIT_SHIFT_R_OFDM_LEN_8822B 26
11621 #define BIT_MASK_R_OFDM_LEN_8822B 0x3f
11622 #define BIT_R_OFDM_LEN_8822B(x) \
11623 (((x) & BIT_MASK_R_OFDM_LEN_8822B) << BIT_SHIFT_R_OFDM_LEN_8822B)
11624 #define BIT_GET_R_OFDM_LEN_8822B(x) \
11625 (((x) >> BIT_SHIFT_R_OFDM_LEN_8822B) & BIT_MASK_R_OFDM_LEN_8822B)
11627 #define BIT_SHIFT_R_CCK_LEN_8822B 0
11628 #define BIT_MASK_R_CCK_LEN_8822B 0xffff
11629 #define BIT_R_CCK_LEN_8822B(x) \
11630 (((x) & BIT_MASK_R_CCK_LEN_8822B) << BIT_SHIFT_R_CCK_LEN_8822B)
11631 #define BIT_GET_R_CCK_LEN_8822B(x) \
11632 (((x) >> BIT_SHIFT_R_CCK_LEN_8822B) & BIT_MASK_R_CCK_LEN_8822B)
11634 /* 2 REG_RX_FILTER_FUNCTION_8822B */
11635 #define BIT_R_WMAC_MHRDDY_LATCH_8822B BIT(14)
11636 #define BIT_R_WMAC_MHRDDY_CLR_8822B BIT(13)
11637 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY1_8822B BIT(12)
11638 #define BIT_WMAC_DIS_VHT_PLCP_CHK_MU_8822B BIT(11)
11639 #define BIT_R_CHK_DELIMIT_LEN_8822B BIT(10)
11640 #define BIT_R_REAPTER_ADDR_MATCH_8822B BIT(9)
11641 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY_8822B BIT(8)
11642 #define BIT_R_LATCH_MACHRDY_8822B BIT(7)
11643 #define BIT_R_WMAC_RXFIL_REND_8822B BIT(6)
11644 #define BIT_R_WMAC_MPDURDY_CLR_8822B BIT(5)
11645 #define BIT_R_WMAC_CLRRXSEC_8822B BIT(4)
11646 #define BIT_R_WMAC_RXFIL_RDEL_8822B BIT(3)
11647 #define BIT_R_WMAC_RXFIL_FCSE_8822B BIT(2)
11648 #define BIT_R_WMAC_RXFIL_MESH_DEL_8822B BIT(1)
11649 #define BIT_R_WMAC_RXFIL_MASKM_8822B BIT(0)
11651 /* 2 REG_NDP_SIG_8822B */
11653 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B 0
11654 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8822B 0x1fffff
11655 #define BIT_R_WMAC_TXNDP_SIGB_8822B(x) \
11656 (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8822B) \
11657 << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B)
11658 #define BIT_GET_R_WMAC_TXNDP_SIGB_8822B(x) \
11659 (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B) & \
11660 BIT_MASK_R_WMAC_TXNDP_SIGB_8822B)
11662 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8822B */
11664 #define BIT_SHIFT_R_MAC_DEBUG_8822B (32 & CPU_OPT_WIDTH)
11665 #define BIT_MASK_R_MAC_DEBUG_8822B 0xffffffffL
11666 #define BIT_R_MAC_DEBUG_8822B(x) \
11667 (((x) & BIT_MASK_R_MAC_DEBUG_8822B) << BIT_SHIFT_R_MAC_DEBUG_8822B)
11668 #define BIT_GET_R_MAC_DEBUG_8822B(x) \
11669 (((x) >> BIT_SHIFT_R_MAC_DEBUG_8822B) & BIT_MASK_R_MAC_DEBUG_8822B)
11671 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8822B 8
11672 #define BIT_MASK_R_MAC_DBG_SHIFT_8822B 0x7
11673 #define BIT_R_MAC_DBG_SHIFT_8822B(x) \
11674 (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8822B) \
11675 << BIT_SHIFT_R_MAC_DBG_SHIFT_8822B)
11676 #define BIT_GET_R_MAC_DBG_SHIFT_8822B(x) \
11677 (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8822B) & \
11678 BIT_MASK_R_MAC_DBG_SHIFT_8822B)
11680 #define BIT_SHIFT_R_MAC_DBG_SEL_8822B 0
11681 #define BIT_MASK_R_MAC_DBG_SEL_8822B 0x3
11682 #define BIT_R_MAC_DBG_SEL_8822B(x) \
11683 (((x) & BIT_MASK_R_MAC_DBG_SEL_8822B) << BIT_SHIFT_R_MAC_DBG_SEL_8822B)
11684 #define BIT_GET_R_MAC_DBG_SEL_8822B(x) \
11685 (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8822B) & BIT_MASK_R_MAC_DBG_SEL_8822B)
11687 /* 2 REG_RTS_ADDRESS_0_8822B */
11689 /* 2 REG_RTS_ADDRESS_1_8822B */
11691 /* 2 REG__RPFM_MAP1_8822B
11692 * (RX PAYLOAD FILTER MAP FRAME TYPE CONTROL REGISTER GROUP 1
11694 #define BIT_DATA_RPFM15EN_8822B BIT(15)
11695 #define BIT_DATA_RPFM14EN_8822B BIT(14)
11696 #define BIT_DATA_RPFM13EN_8822B BIT(13)
11697 #define BIT_DATA_RPFM12EN_8822B BIT(12)
11698 #define BIT_DATA_RPFM11EN_8822B BIT(11)
11699 #define BIT_DATA_RPFM10EN_8822B BIT(10)
11700 #define BIT_DATA_RPFM9EN_8822B BIT(9)
11701 #define BIT_DATA_RPFM8EN_8822B BIT(8)
11702 #define BIT_DATA_RPFM7EN_8822B BIT(7)
11703 #define BIT_DATA_RPFM6EN_8822B BIT(6)
11704 #define BIT_DATA_RPFM5EN_8822B BIT(5)
11705 #define BIT_DATA_RPFM4EN_8822B BIT(4)
11706 #define BIT_DATA_RPFM3EN_8822B BIT(3)
11707 #define BIT_DATA_RPFM2EN_8822B BIT(2)
11708 #define BIT_DATA_RPFM1EN_8822B BIT(1)
11709 #define BIT_DATA_RPFM0EN_8822B BIT(0)
11711 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1_8822B */
11712 #define BIT_LTECOEX_ACCESS_START_V1_8822B BIT(31)
11713 #define BIT_LTECOEX_WRITE_MODE_V1_8822B BIT(30)
11714 #define BIT_LTECOEX_READY_BIT_V1_8822B BIT(29)
11716 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8822B 16
11717 #define BIT_MASK_WRITE_BYTE_EN_V1_8822B 0xf
11718 #define BIT_WRITE_BYTE_EN_V1_8822B(x) \
11719 (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8822B) \
11720 << BIT_SHIFT_WRITE_BYTE_EN_V1_8822B)
11721 #define BIT_GET_WRITE_BYTE_EN_V1_8822B(x) \
11722 (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8822B) & \
11723 BIT_MASK_WRITE_BYTE_EN_V1_8822B)
11725 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B 0
11726 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8822B 0xffff
11727 #define BIT_LTECOEX_REG_ADDR_V1_8822B(x) \
11728 (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8822B) \
11729 << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B)
11730 #define BIT_GET_LTECOEX_REG_ADDR_V1_8822B(x) \
11731 (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B) & \
11732 BIT_MASK_LTECOEX_REG_ADDR_V1_8822B)
11734 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8822B */
11736 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8822B 0
11737 #define BIT_MASK_LTECOEX_W_DATA_V1_8822B 0xffffffffL
11738 #define BIT_LTECOEX_W_DATA_V1_8822B(x) \
11739 (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8822B) \
11740 << BIT_SHIFT_LTECOEX_W_DATA_V1_8822B)
11741 #define BIT_GET_LTECOEX_W_DATA_V1_8822B(x) \
11742 (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8822B) & \
11743 BIT_MASK_LTECOEX_W_DATA_V1_8822B)
11745 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8822B */
11747 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8822B 0
11748 #define BIT_MASK_LTECOEX_R_DATA_V1_8822B 0xffffffffL
11749 #define BIT_LTECOEX_R_DATA_V1_8822B(x) \
11750 (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8822B) \
11751 << BIT_SHIFT_LTECOEX_R_DATA_V1_8822B)
11752 #define BIT_GET_LTECOEX_R_DATA_V1_8822B(x) \
11753 (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8822B) & \
11754 BIT_MASK_LTECOEX_R_DATA_V1_8822B)
11756 /* 2 REG_NOT_VALID_8822B */
11758 /* 2 REG_SDIO_TX_CTRL_8822B */
11760 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8822B 16
11761 #define BIT_MASK_SDIO_INT_TIMEOUT_8822B 0xffff
11762 #define BIT_SDIO_INT_TIMEOUT_8822B(x) \
11763 (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8822B) \
11764 << BIT_SHIFT_SDIO_INT_TIMEOUT_8822B)
11765 #define BIT_GET_SDIO_INT_TIMEOUT_8822B(x) \
11766 (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8822B) & \
11767 BIT_MASK_SDIO_INT_TIMEOUT_8822B)
11769 #define BIT_IO_ERR_STATUS_8822B BIT(15)
11770 #define BIT_REPLY_ERRCRC_IN_DATA_8822B BIT(9)
11771 #define BIT_EN_CMD53_OVERLAP_8822B BIT(8)
11772 #define BIT_REPLY_ERR_IN_R5_8822B BIT(7)
11773 #define BIT_R18A_EN_8822B BIT(6)
11774 #define BIT_INIT_CMD_EN_8822B BIT(5)
11775 #define BIT_EN_RXDMA_MASK_INT_8822B BIT(2)
11776 #define BIT_EN_MASK_TIMER_8822B BIT(1)
11777 #define BIT_CMD_ERR_STOP_INT_EN_8822B BIT(0)
11779 /* 2 REG_SDIO_HIMR_8822B */
11780 #define BIT_SDIO_CRCERR_MSK_8822B BIT(31)
11781 #define BIT_SDIO_HSISR3_IND_MSK_8822B BIT(30)
11782 #define BIT_SDIO_HSISR2_IND_MSK_8822B BIT(29)
11783 #define BIT_SDIO_HEISR_IND_MSK_8822B BIT(28)
11784 #define BIT_SDIO_CTWEND_MSK_8822B BIT(27)
11785 #define BIT_SDIO_ATIMEND_E_MSK_8822B BIT(26)
11786 #define BIT_SDIIO_ATIMEND_MSK_8822B BIT(25)
11787 #define BIT_SDIO_OCPINT_MSK_8822B BIT(24)
11788 #define BIT_SDIO_PSTIMEOUT_MSK_8822B BIT(23)
11789 #define BIT_SDIO_GTINT4_MSK_8822B BIT(22)
11790 #define BIT_SDIO_GTINT3_MSK_8822B BIT(21)
11791 #define BIT_SDIO_HSISR_IND_MSK_8822B BIT(20)
11792 #define BIT_SDIO_CPWM2_MSK_8822B BIT(19)
11793 #define BIT_SDIO_CPWM1_MSK_8822B BIT(18)
11794 #define BIT_SDIO_C2HCMD_INT_MSK_8822B BIT(17)
11795 #define BIT_SDIO_BCNERLY_INT_MSK_8822B BIT(16)
11796 #define BIT_SDIO_TXBCNERR_MSK_8822B BIT(7)
11797 #define BIT_SDIO_TXBCNOK_MSK_8822B BIT(6)
11798 #define BIT_SDIO_RXFOVW_MSK_8822B BIT(5)
11799 #define BIT_SDIO_TXFOVW_MSK_8822B BIT(4)
11800 #define BIT_SDIO_RXERR_MSK_8822B BIT(3)
11801 #define BIT_SDIO_TXERR_MSK_8822B BIT(2)
11802 #define BIT_SDIO_AVAL_MSK_8822B BIT(1)
11803 #define BIT_RX_REQUEST_MSK_8822B BIT(0)
11805 /* 2 REG_SDIO_HISR_8822B */
11806 #define BIT_SDIO_CRCERR_8822B BIT(31)
11807 #define BIT_SDIO_HSISR3_IND_8822B BIT(30)
11808 #define BIT_SDIO_HSISR2_IND_8822B BIT(29)
11809 #define BIT_SDIO_HEISR_IND_8822B BIT(28)
11810 #define BIT_SDIO_CTWEND_8822B BIT(27)
11811 #define BIT_SDIO_ATIMEND_E_8822B BIT(26)
11812 #define BIT_SDIO_ATIMEND_8822B BIT(25)
11813 #define BIT_SDIO_OCPINT_8822B BIT(24)
11814 #define BIT_SDIO_PSTIMEOUT_8822B BIT(23)
11815 #define BIT_SDIO_GTINT4_8822B BIT(22)
11816 #define BIT_SDIO_GTINT3_8822B BIT(21)
11817 #define BIT_SDIO_HSISR_IND_8822B BIT(20)
11818 #define BIT_SDIO_CPWM2_8822B BIT(19)
11819 #define BIT_SDIO_CPWM1_8822B BIT(18)
11820 #define BIT_SDIO_C2HCMD_INT_8822B BIT(17)
11821 #define BIT_SDIO_BCNERLY_INT_8822B BIT(16)
11822 #define BIT_SDIO_TXBCNERR_8822B BIT(7)
11823 #define BIT_SDIO_TXBCNOK_8822B BIT(6)
11824 #define BIT_SDIO_RXFOVW_8822B BIT(5)
11825 #define BIT_SDIO_TXFOVW_8822B BIT(4)
11826 #define BIT_SDIO_RXERR_8822B BIT(3)
11827 #define BIT_SDIO_TXERR_8822B BIT(2)
11828 #define BIT_SDIO_AVAL_8822B BIT(1)
11829 #define BIT_RX_REQUEST_8822B BIT(0)
11831 /* 2 REG_SDIO_RX_REQ_LEN_8822B */
11833 #define BIT_SHIFT_RX_REQ_LEN_V1_8822B 0
11834 #define BIT_MASK_RX_REQ_LEN_V1_8822B 0x3ffff
11835 #define BIT_RX_REQ_LEN_V1_8822B(x) \
11836 (((x) & BIT_MASK_RX_REQ_LEN_V1_8822B) << BIT_SHIFT_RX_REQ_LEN_V1_8822B)
11837 #define BIT_GET_RX_REQ_LEN_V1_8822B(x) \
11838 (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8822B) & BIT_MASK_RX_REQ_LEN_V1_8822B)
11840 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8822B */
11842 #define BIT_SHIFT_FREE_TXPG_SEQ_8822B 0
11843 #define BIT_MASK_FREE_TXPG_SEQ_8822B 0xff
11844 #define BIT_FREE_TXPG_SEQ_8822B(x) \
11845 (((x) & BIT_MASK_FREE_TXPG_SEQ_8822B) << BIT_SHIFT_FREE_TXPG_SEQ_8822B)
11846 #define BIT_GET_FREE_TXPG_SEQ_8822B(x) \
11847 (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8822B) & BIT_MASK_FREE_TXPG_SEQ_8822B)
11849 /* 2 REG_SDIO_FREE_TXPG_8822B */
11851 #define BIT_SHIFT_MID_FREEPG_V1_8822B 16
11852 #define BIT_MASK_MID_FREEPG_V1_8822B 0xfff
11853 #define BIT_MID_FREEPG_V1_8822B(x) \
11854 (((x) & BIT_MASK_MID_FREEPG_V1_8822B) << BIT_SHIFT_MID_FREEPG_V1_8822B)
11855 #define BIT_GET_MID_FREEPG_V1_8822B(x) \
11856 (((x) >> BIT_SHIFT_MID_FREEPG_V1_8822B) & BIT_MASK_MID_FREEPG_V1_8822B)
11858 #define BIT_SHIFT_HIQ_FREEPG_V1_8822B 0
11859 #define BIT_MASK_HIQ_FREEPG_V1_8822B 0xfff
11860 #define BIT_HIQ_FREEPG_V1_8822B(x) \
11861 (((x) & BIT_MASK_HIQ_FREEPG_V1_8822B) << BIT_SHIFT_HIQ_FREEPG_V1_8822B)
11862 #define BIT_GET_HIQ_FREEPG_V1_8822B(x) \
11863 (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8822B) & BIT_MASK_HIQ_FREEPG_V1_8822B)
11865 /* 2 REG_SDIO_FREE_TXPG2_8822B */
11867 #define BIT_SHIFT_PUB_FREEPG_V1_8822B 16
11868 #define BIT_MASK_PUB_FREEPG_V1_8822B 0xfff
11869 #define BIT_PUB_FREEPG_V1_8822B(x) \
11870 (((x) & BIT_MASK_PUB_FREEPG_V1_8822B) << BIT_SHIFT_PUB_FREEPG_V1_8822B)
11871 #define BIT_GET_PUB_FREEPG_V1_8822B(x) \
11872 (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8822B) & BIT_MASK_PUB_FREEPG_V1_8822B)
11874 #define BIT_SHIFT_LOW_FREEPG_V1_8822B 0
11875 #define BIT_MASK_LOW_FREEPG_V1_8822B 0xfff
11876 #define BIT_LOW_FREEPG_V1_8822B(x) \
11877 (((x) & BIT_MASK_LOW_FREEPG_V1_8822B) << BIT_SHIFT_LOW_FREEPG_V1_8822B)
11878 #define BIT_GET_LOW_FREEPG_V1_8822B(x) \
11879 (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8822B) & BIT_MASK_LOW_FREEPG_V1_8822B)
11881 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8822B */
11883 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B 24
11884 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8822B 0xff
11885 #define BIT_NOAC_OQT_FREEPG_V1_8822B(x) \
11886 (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8822B) \
11887 << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B)
11888 #define BIT_GET_NOAC_OQT_FREEPG_V1_8822B(x) \
11889 (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B) & \
11890 BIT_MASK_NOAC_OQT_FREEPG_V1_8822B)
11892 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8822B 16
11893 #define BIT_MASK_AC_OQT_FREEPG_V1_8822B 0xff
11894 #define BIT_AC_OQT_FREEPG_V1_8822B(x) \
11895 (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8822B) \
11896 << BIT_SHIFT_AC_OQT_FREEPG_V1_8822B)
11897 #define BIT_GET_AC_OQT_FREEPG_V1_8822B(x) \
11898 (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8822B) & \
11899 BIT_MASK_AC_OQT_FREEPG_V1_8822B)
11901 #define BIT_SHIFT_EXQ_FREEPG_V1_8822B 0
11902 #define BIT_MASK_EXQ_FREEPG_V1_8822B 0xfff
11903 #define BIT_EXQ_FREEPG_V1_8822B(x) \
11904 (((x) & BIT_MASK_EXQ_FREEPG_V1_8822B) << BIT_SHIFT_EXQ_FREEPG_V1_8822B)
11905 #define BIT_GET_EXQ_FREEPG_V1_8822B(x) \
11906 (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8822B) & BIT_MASK_EXQ_FREEPG_V1_8822B)
11908 /* 2 REG_SDIO_HTSFR_INFO_8822B */
11910 #define BIT_SHIFT_HTSFR1_8822B 16
11911 #define BIT_MASK_HTSFR1_8822B 0xffff
11912 #define BIT_HTSFR1_8822B(x) \
11913 (((x) & BIT_MASK_HTSFR1_8822B) << BIT_SHIFT_HTSFR1_8822B)
11914 #define BIT_GET_HTSFR1_8822B(x) \
11915 (((x) >> BIT_SHIFT_HTSFR1_8822B) & BIT_MASK_HTSFR1_8822B)
11917 #define BIT_SHIFT_HTSFR0_8822B 0
11918 #define BIT_MASK_HTSFR0_8822B 0xffff
11919 #define BIT_HTSFR0_8822B(x) \
11920 (((x) & BIT_MASK_HTSFR0_8822B) << BIT_SHIFT_HTSFR0_8822B)
11921 #define BIT_GET_HTSFR0_8822B(x) \
11922 (((x) >> BIT_SHIFT_HTSFR0_8822B) & BIT_MASK_HTSFR0_8822B)
11924 /* 2 REG_SDIO_HCPWM1_V2_8822B */
11925 #define BIT_TOGGLING_8822B BIT(7)
11926 #define BIT_ACK_8822B BIT(6)
11927 #define BIT_SYS_CLK_8822B BIT(0)
11929 /* 2 REG_SDIO_HCPWM2_V2_8822B */
11931 /* 2 REG_SDIO_INDIRECT_REG_CFG_8822B */
11932 #define BIT_INDIRECT_REG_RDY_8822B BIT(20)
11933 #define BIT_INDIRECT_REG_R_8822B BIT(19)
11934 #define BIT_INDIRECT_REG_W_8822B BIT(18)
11936 #define BIT_SHIFT_INDIRECT_REG_SIZE_8822B 16
11937 #define BIT_MASK_INDIRECT_REG_SIZE_8822B 0x3
11938 #define BIT_INDIRECT_REG_SIZE_8822B(x) \
11939 (((x) & BIT_MASK_INDIRECT_REG_SIZE_8822B) \
11940 << BIT_SHIFT_INDIRECT_REG_SIZE_8822B)
11941 #define BIT_GET_INDIRECT_REG_SIZE_8822B(x) \
11942 (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8822B) & \
11943 BIT_MASK_INDIRECT_REG_SIZE_8822B)
11945 #define BIT_SHIFT_INDIRECT_REG_ADDR_8822B 0
11946 #define BIT_MASK_INDIRECT_REG_ADDR_8822B 0xffff
11947 #define BIT_INDIRECT_REG_ADDR_8822B(x) \
11948 (((x) & BIT_MASK_INDIRECT_REG_ADDR_8822B) \
11949 << BIT_SHIFT_INDIRECT_REG_ADDR_8822B)
11950 #define BIT_GET_INDIRECT_REG_ADDR_8822B(x) \
11951 (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8822B) & \
11952 BIT_MASK_INDIRECT_REG_ADDR_8822B)
11954 /* 2 REG_SDIO_INDIRECT_REG_DATA_8822B */
11956 #define BIT_SHIFT_INDIRECT_REG_DATA_8822B 0
11957 #define BIT_MASK_INDIRECT_REG_DATA_8822B 0xffffffffL
11958 #define BIT_INDIRECT_REG_DATA_8822B(x) \
11959 (((x) & BIT_MASK_INDIRECT_REG_DATA_8822B) \
11960 << BIT_SHIFT_INDIRECT_REG_DATA_8822B)
11961 #define BIT_GET_INDIRECT_REG_DATA_8822B(x) \
11962 (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8822B) & \
11963 BIT_MASK_INDIRECT_REG_DATA_8822B)
11965 /* 2 REG_SDIO_H2C_8822B */
11967 #define BIT_SHIFT_SDIO_H2C_MSG_8822B 0
11968 #define BIT_MASK_SDIO_H2C_MSG_8822B 0xffffffffL
11969 #define BIT_SDIO_H2C_MSG_8822B(x) \
11970 (((x) & BIT_MASK_SDIO_H2C_MSG_8822B) << BIT_SHIFT_SDIO_H2C_MSG_8822B)
11971 #define BIT_GET_SDIO_H2C_MSG_8822B(x) \
11972 (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8822B) & BIT_MASK_SDIO_H2C_MSG_8822B)
11974 /* 2 REG_SDIO_C2H_8822B */
11976 #define BIT_SHIFT_SDIO_C2H_MSG_8822B 0
11977 #define BIT_MASK_SDIO_C2H_MSG_8822B 0xffffffffL
11978 #define BIT_SDIO_C2H_MSG_8822B(x) \
11979 (((x) & BIT_MASK_SDIO_C2H_MSG_8822B) << BIT_SHIFT_SDIO_C2H_MSG_8822B)
11980 #define BIT_GET_SDIO_C2H_MSG_8822B(x) \
11981 (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8822B) & BIT_MASK_SDIO_C2H_MSG_8822B)
11983 /* 2 REG_SDIO_HRPWM1_8822B */
11984 #define BIT_TOGGLING_8822B BIT(7)
11985 #define BIT_ACK_8822B BIT(6)
11986 #define BIT_32K_PERMISSION_8822B BIT(0)
11988 /* 2 REG_SDIO_HRPWM2_8822B */
11990 /* 2 REG_SDIO_HPS_CLKR_8822B */
11992 /* 2 REG_SDIO_BUS_CTRL_8822B */
11993 #define BIT_PAD_CLK_XHGE_EN_8822B BIT(3)
11994 #define BIT_INTER_CLK_EN_8822B BIT(2)
11995 #define BIT_EN_RPT_TXCRC_8822B BIT(1)
11996 #define BIT_DIS_RXDMA_STS_8822B BIT(0)
11998 /* 2 REG_SDIO_HSUS_CTRL_8822B */
11999 #define BIT_INTR_CTRL_8822B BIT(4)
12000 #define BIT_SDIO_VOLTAGE_8822B BIT(3)
12001 #define BIT_BYPASS_INIT_8822B BIT(2)
12002 #define BIT_HCI_RESUME_RDY_8822B BIT(1)
12003 #define BIT_HCI_SUS_REQ_8822B BIT(0)
12005 /* 2 REG_SDIO_RESPONSE_TIMER_8822B */
12007 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8822B 0
12008 #define BIT_MASK_CMDIN_2RESP_TIMER_8822B 0xffff
12009 #define BIT_CMDIN_2RESP_TIMER_8822B(x) \
12010 (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8822B) \
12011 << BIT_SHIFT_CMDIN_2RESP_TIMER_8822B)
12012 #define BIT_GET_CMDIN_2RESP_TIMER_8822B(x) \
12013 (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8822B) & \
12014 BIT_MASK_CMDIN_2RESP_TIMER_8822B)
12016 /* 2 REG_SDIO_CMD_CRC_8822B */
12018 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8822B 0
12019 #define BIT_MASK_SDIO_CMD_CRC_V1_8822B 0xff
12020 #define BIT_SDIO_CMD_CRC_V1_8822B(x) \
12021 (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8822B) \
12022 << BIT_SHIFT_SDIO_CMD_CRC_V1_8822B)
12023 #define BIT_GET_SDIO_CMD_CRC_V1_8822B(x) \
12024 (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8822B) & \
12025 BIT_MASK_SDIO_CMD_CRC_V1_8822B)
12027 /* 2 REG_SDIO_HSISR_8822B */
12028 #define BIT_DRV_WLAN_INT_CLR_8822B BIT(1)
12029 #define BIT_DRV_WLAN_INT_8822B BIT(0)
12031 /* 2 REG_SDIO_HSIMR_8822B */
12032 #define BIT_HISR_MASK_8822B BIT(0)
12034 /* 2 REG_SDIO_ERR_RPT_8822B */
12035 #define BIT_HR_FF_OVF_8822B BIT(6)
12036 #define BIT_HR_FF_UDN_8822B BIT(5)
12037 #define BIT_TXDMA_BUSY_ERR_8822B BIT(4)
12038 #define BIT_TXDMA_VLD_ERR_8822B BIT(3)
12039 #define BIT_QSEL_UNKNOWN_ERR_8822B BIT(2)
12040 #define BIT_QSEL_MIS_ERR_8822B BIT(1)
12041 #define BIT_SDIO_OVERRD_ERR_8822B BIT(0)
12043 /* 2 REG_SDIO_CMD_ERRCNT_8822B */
12045 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8822B 0
12046 #define BIT_MASK_CMD_CRC_ERR_CNT_8822B 0xff
12047 #define BIT_CMD_CRC_ERR_CNT_8822B(x) \
12048 (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8822B) \
12049 << BIT_SHIFT_CMD_CRC_ERR_CNT_8822B)
12050 #define BIT_GET_CMD_CRC_ERR_CNT_8822B(x) \
12051 (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8822B) & \
12052 BIT_MASK_CMD_CRC_ERR_CNT_8822B)
12054 /* 2 REG_SDIO_DATA_ERRCNT_8822B */
12056 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8822B 0
12057 #define BIT_MASK_DATA_CRC_ERR_CNT_8822B 0xff
12058 #define BIT_DATA_CRC_ERR_CNT_8822B(x) \
12059 (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8822B) \
12060 << BIT_SHIFT_DATA_CRC_ERR_CNT_8822B)
12061 #define BIT_GET_DATA_CRC_ERR_CNT_8822B(x) \
12062 (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8822B) & \
12063 BIT_MASK_DATA_CRC_ERR_CNT_8822B)
12065 /* 2 REG_SDIO_CMD_ERR_CONTENT_8822B */
12067 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B 0
12068 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B 0xffffffffffL
12069 #define BIT_SDIO_CMD_ERR_CONTENT_8822B(x) \
12070 (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B) \
12071 << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B)
12072 #define BIT_GET_SDIO_CMD_ERR_CONTENT_8822B(x) \
12073 (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B) & \
12074 BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B)
12076 /* 2 REG_SDIO_CRC_ERR_IDX_8822B */
12077 #define BIT_D3_CRC_ERR_8822B BIT(4)
12078 #define BIT_D2_CRC_ERR_8822B BIT(3)
12079 #define BIT_D1_CRC_ERR_8822B BIT(2)
12080 #define BIT_D0_CRC_ERR_8822B BIT(1)
12081 #define BIT_CMD_CRC_ERR_8822B BIT(0)
12083 /* 2 REG_SDIO_DATA_CRC_8822B */
12085 #define BIT_SHIFT_SDIO_DATA_CRC_8822B 0
12086 #define BIT_MASK_SDIO_DATA_CRC_8822B 0xff
12087 #define BIT_SDIO_DATA_CRC_8822B(x) \
12088 (((x) & BIT_MASK_SDIO_DATA_CRC_8822B) << BIT_SHIFT_SDIO_DATA_CRC_8822B)
12089 #define BIT_GET_SDIO_DATA_CRC_8822B(x) \
12090 (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8822B) & BIT_MASK_SDIO_DATA_CRC_8822B)
12092 /* 2 REG_SDIO_DATA_REPLY_TIME_8822B */
12094 #define BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B 0
12095 #define BIT_MASK_SDIO_DATA_REPLY_TIME_8822B 0x7
12096 #define BIT_SDIO_DATA_REPLY_TIME_8822B(x) \
12097 (((x) & BIT_MASK_SDIO_DATA_REPLY_TIME_8822B) \
12098 << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B)
12099 #define BIT_GET_SDIO_DATA_REPLY_TIME_8822B(x) \
12100 (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B) & \
12101 BIT_MASK_SDIO_DATA_REPLY_TIME_8822B)