1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
4 * Copyright(c) 2016 Realtek Corporation.
7 * wlanfae <wlanfae@realtek.com>
8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
11 * Larry Finger <Larry.Finger@lwfinger.net>
13 *****************************************************************************/
14 #ifndef __INC_HALMAC_BIT_8822B_H
15 #define __INC_HALMAC_BIT_8822B_H
17 #define CPU_OPT_WIDTH 0x1F
19 /* 2 REG_NOT_VALID_8822B */
21 /* 2 REG_SYS_ISO_CTRL_8822B */
22 #define BIT_PWC_EV12V_8822B BIT(15)
23 #define BIT_PWC_EV25V_8822B BIT(14)
24 #define BIT_PA33V_EN_8822B BIT(13)
25 #define BIT_PA12V_EN_8822B BIT(12)
26 #define BIT_UA33V_EN_8822B BIT(11)
27 #define BIT_UA12V_EN_8822B BIT(10)
28 #define BIT_ISO_RFDIO_8822B BIT(9)
29 #define BIT_ISO_EB2CORE_8822B BIT(8)
30 #define BIT_ISO_DIOE_8822B BIT(7)
31 #define BIT_ISO_WLPON2PP_8822B BIT(6)
32 #define BIT_ISO_IP2MAC_WA2PP_8822B BIT(5)
33 #define BIT_ISO_PD2CORE_8822B BIT(4)
34 #define BIT_ISO_PA2PCIE_8822B BIT(3)
35 #define BIT_ISO_UD2CORE_8822B BIT(2)
36 #define BIT_ISO_UA2USB_8822B BIT(1)
37 #define BIT_ISO_WD2PP_8822B BIT(0)
39 /* 2 REG_SYS_FUNC_EN_8822B */
40 #define BIT_FEN_MREGEN_8822B BIT(15)
41 #define BIT_FEN_HWPDN_8822B BIT(14)
42 #define BIT_EN_25_1_8822B BIT(13)
43 #define BIT_FEN_ELDR_8822B BIT(12)
44 #define BIT_FEN_DCORE_8822B BIT(11)
45 #define BIT_FEN_CPUEN_8822B BIT(10)
46 #define BIT_FEN_DIOE_8822B BIT(9)
47 #define BIT_FEN_PCIED_8822B BIT(8)
48 #define BIT_FEN_PPLL_8822B BIT(7)
49 #define BIT_FEN_PCIEA_8822B BIT(6)
50 #define BIT_FEN_DIO_PCIE_8822B BIT(5)
51 #define BIT_FEN_USBD_8822B BIT(4)
52 #define BIT_FEN_UPLL_8822B BIT(3)
53 #define BIT_FEN_USBA_8822B BIT(2)
54 #define BIT_FEN_BB_GLB_RSTN_8822B BIT(1)
55 #define BIT_FEN_BBRSTB_8822B BIT(0)
57 /* 2 REG_SYS_PW_CTRL_8822B */
58 #define BIT_SOP_EABM_8822B BIT(31)
59 #define BIT_SOP_ACKF_8822B BIT(30)
60 #define BIT_SOP_ERCK_8822B BIT(29)
61 #define BIT_SOP_ESWR_8822B BIT(28)
62 #define BIT_SOP_PWMM_8822B BIT(27)
63 #define BIT_SOP_EECK_8822B BIT(26)
64 #define BIT_SOP_EXTL_8822B BIT(24)
65 #define BIT_SYM_OP_RING_12M_8822B BIT(22)
66 #define BIT_ROP_SWPR_8822B BIT(21)
67 #define BIT_DIS_HW_LPLDM_8822B BIT(20)
68 #define BIT_OPT_SWRST_WLMCU_8822B BIT(19)
69 #define BIT_RDY_SYSPWR_8822B BIT(17)
70 #define BIT_EN_WLON_8822B BIT(16)
71 #define BIT_APDM_HPDN_8822B BIT(15)
72 #define BIT_AFSM_PCIE_SUS_EN_8822B BIT(12)
73 #define BIT_AFSM_WLSUS_EN_8822B BIT(11)
74 #define BIT_APFM_SWLPS_8822B BIT(10)
75 #define BIT_APFM_OFFMAC_8822B BIT(9)
76 #define BIT_APFN_ONMAC_8822B BIT(8)
77 #define BIT_CHIP_PDN_EN_8822B BIT(7)
78 #define BIT_RDY_MACDIS_8822B BIT(6)
79 #define BIT_RING_CLK_12M_EN_8822B BIT(4)
80 #define BIT_PFM_WOWL_8822B BIT(3)
81 #define BIT_PFM_LDKP_8822B BIT(2)
82 #define BIT_WL_HCI_ALD_8822B BIT(1)
83 #define BIT_PFM_LDALL_8822B BIT(0)
85 /* 2 REG_SYS_CLK_CTRL_8822B */
86 #define BIT_LDO_DUMMY_8822B BIT(15)
87 #define BIT_CPU_CLK_EN_8822B BIT(14)
88 #define BIT_SYMREG_CLK_EN_8822B BIT(13)
89 #define BIT_HCI_CLK_EN_8822B BIT(12)
90 #define BIT_MAC_CLK_EN_8822B BIT(11)
91 #define BIT_SEC_CLK_EN_8822B BIT(10)
92 #define BIT_PHY_SSC_RSTB_8822B BIT(9)
93 #define BIT_EXT_32K_EN_8822B BIT(8)
94 #define BIT_WL_CLK_TEST_8822B BIT(7)
95 #define BIT_OP_SPS_PWM_EN_8822B BIT(6)
96 #define BIT_LOADER_CLK_EN_8822B BIT(5)
97 #define BIT_MACSLP_8822B BIT(4)
98 #define BIT_WAKEPAD_EN_8822B BIT(3)
99 #define BIT_ROMD16V_EN_8822B BIT(2)
100 #define BIT_CKANA12M_EN_8822B BIT(1)
101 #define BIT_CNTD16V_EN_8822B BIT(0)
103 /* 2 REG_SYS_EEPROM_CTRL_8822B */
105 #define BIT_SHIFT_VPDIDX_8822B 8
106 #define BIT_MASK_VPDIDX_8822B 0xff
107 #define BIT_VPDIDX_8822B(x) \
108 (((x) & BIT_MASK_VPDIDX_8822B) << BIT_SHIFT_VPDIDX_8822B)
109 #define BIT_GET_VPDIDX_8822B(x) \
110 (((x) >> BIT_SHIFT_VPDIDX_8822B) & BIT_MASK_VPDIDX_8822B)
112 #define BIT_SHIFT_EEM1_0_8822B 6
113 #define BIT_MASK_EEM1_0_8822B 0x3
114 #define BIT_EEM1_0_8822B(x) \
115 (((x) & BIT_MASK_EEM1_0_8822B) << BIT_SHIFT_EEM1_0_8822B)
116 #define BIT_GET_EEM1_0_8822B(x) \
117 (((x) >> BIT_SHIFT_EEM1_0_8822B) & BIT_MASK_EEM1_0_8822B)
119 #define BIT_AUTOLOAD_SUS_8822B BIT(5)
120 #define BIT_EERPOMSEL_8822B BIT(4)
121 #define BIT_EECS_V1_8822B BIT(3)
122 #define BIT_EESK_V1_8822B BIT(2)
123 #define BIT_EEDI_V1_8822B BIT(1)
124 #define BIT_EEDO_V1_8822B BIT(0)
126 /* 2 REG_EE_VPD_8822B */
128 #define BIT_SHIFT_VPD_DATA_8822B 0
129 #define BIT_MASK_VPD_DATA_8822B 0xffffffffL
130 #define BIT_VPD_DATA_8822B(x) \
131 (((x) & BIT_MASK_VPD_DATA_8822B) << BIT_SHIFT_VPD_DATA_8822B)
132 #define BIT_GET_VPD_DATA_8822B(x) \
133 (((x) >> BIT_SHIFT_VPD_DATA_8822B) & BIT_MASK_VPD_DATA_8822B)
135 /* 2 REG_SYS_SWR_CTRL1_8822B */
136 #define BIT_C2_L_BIT0_8822B BIT(31)
138 #define BIT_SHIFT_C1_L_8822B 29
139 #define BIT_MASK_C1_L_8822B 0x3
140 #define BIT_C1_L_8822B(x) (((x) & BIT_MASK_C1_L_8822B) << BIT_SHIFT_C1_L_8822B)
141 #define BIT_GET_C1_L_8822B(x) \
142 (((x) >> BIT_SHIFT_C1_L_8822B) & BIT_MASK_C1_L_8822B)
144 #define BIT_SHIFT_REG_FREQ_L_8822B 25
145 #define BIT_MASK_REG_FREQ_L_8822B 0x7
146 #define BIT_REG_FREQ_L_8822B(x) \
147 (((x) & BIT_MASK_REG_FREQ_L_8822B) << BIT_SHIFT_REG_FREQ_L_8822B)
148 #define BIT_GET_REG_FREQ_L_8822B(x) \
149 (((x) >> BIT_SHIFT_REG_FREQ_L_8822B) & BIT_MASK_REG_FREQ_L_8822B)
151 #define BIT_REG_EN_DUTY_8822B BIT(24)
153 #define BIT_SHIFT_REG_MODE_8822B 22
154 #define BIT_MASK_REG_MODE_8822B 0x3
155 #define BIT_REG_MODE_8822B(x) \
156 (((x) & BIT_MASK_REG_MODE_8822B) << BIT_SHIFT_REG_MODE_8822B)
157 #define BIT_GET_REG_MODE_8822B(x) \
158 (((x) >> BIT_SHIFT_REG_MODE_8822B) & BIT_MASK_REG_MODE_8822B)
160 #define BIT_REG_EN_SP_8822B BIT(21)
161 #define BIT_REG_AUTO_L_8822B BIT(20)
162 #define BIT_SW18_SELD_BIT0_8822B BIT(19)
163 #define BIT_SW18_POWOCP_8822B BIT(18)
165 #define BIT_SHIFT_OCP_L1_8822B 15
166 #define BIT_MASK_OCP_L1_8822B 0x7
167 #define BIT_OCP_L1_8822B(x) \
168 (((x) & BIT_MASK_OCP_L1_8822B) << BIT_SHIFT_OCP_L1_8822B)
169 #define BIT_GET_OCP_L1_8822B(x) \
170 (((x) >> BIT_SHIFT_OCP_L1_8822B) & BIT_MASK_OCP_L1_8822B)
172 #define BIT_SHIFT_CF_L_8822B 13
173 #define BIT_MASK_CF_L_8822B 0x3
174 #define BIT_CF_L_8822B(x) (((x) & BIT_MASK_CF_L_8822B) << BIT_SHIFT_CF_L_8822B)
175 #define BIT_GET_CF_L_8822B(x) \
176 (((x) >> BIT_SHIFT_CF_L_8822B) & BIT_MASK_CF_L_8822B)
178 #define BIT_SW18_FPWM_8822B BIT(11)
179 #define BIT_SW18_SWEN_8822B BIT(9)
180 #define BIT_SW18_LDEN_8822B BIT(8)
181 #define BIT_MAC_ID_EN_8822B BIT(7)
182 #define BIT_AFE_BGEN_8822B BIT(0)
184 /* 2 REG_SYS_SWR_CTRL2_8822B */
185 #define BIT_POW_ZCD_L_8822B BIT(31)
186 #define BIT_AUTOZCD_L_8822B BIT(30)
188 #define BIT_SHIFT_REG_DELAY_8822B 28
189 #define BIT_MASK_REG_DELAY_8822B 0x3
190 #define BIT_REG_DELAY_8822B(x) \
191 (((x) & BIT_MASK_REG_DELAY_8822B) << BIT_SHIFT_REG_DELAY_8822B)
192 #define BIT_GET_REG_DELAY_8822B(x) \
193 (((x) >> BIT_SHIFT_REG_DELAY_8822B) & BIT_MASK_REG_DELAY_8822B)
195 #define BIT_SHIFT_V15ADJ_L1_V1_8822B 24
196 #define BIT_MASK_V15ADJ_L1_V1_8822B 0x7
197 #define BIT_V15ADJ_L1_V1_8822B(x) \
198 (((x) & BIT_MASK_V15ADJ_L1_V1_8822B) << BIT_SHIFT_V15ADJ_L1_V1_8822B)
199 #define BIT_GET_V15ADJ_L1_V1_8822B(x) \
200 (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8822B) & BIT_MASK_V15ADJ_L1_V1_8822B)
202 #define BIT_SHIFT_VOL_L1_V1_8822B 20
203 #define BIT_MASK_VOL_L1_V1_8822B 0xf
204 #define BIT_VOL_L1_V1_8822B(x) \
205 (((x) & BIT_MASK_VOL_L1_V1_8822B) << BIT_SHIFT_VOL_L1_V1_8822B)
206 #define BIT_GET_VOL_L1_V1_8822B(x) \
207 (((x) >> BIT_SHIFT_VOL_L1_V1_8822B) & BIT_MASK_VOL_L1_V1_8822B)
209 #define BIT_SHIFT_IN_L1_V1_8822B 17
210 #define BIT_MASK_IN_L1_V1_8822B 0x7
211 #define BIT_IN_L1_V1_8822B(x) \
212 (((x) & BIT_MASK_IN_L1_V1_8822B) << BIT_SHIFT_IN_L1_V1_8822B)
213 #define BIT_GET_IN_L1_V1_8822B(x) \
214 (((x) >> BIT_SHIFT_IN_L1_V1_8822B) & BIT_MASK_IN_L1_V1_8822B)
216 #define BIT_SHIFT_TBOX_L1_8822B 15
217 #define BIT_MASK_TBOX_L1_8822B 0x3
218 #define BIT_TBOX_L1_8822B(x) \
219 (((x) & BIT_MASK_TBOX_L1_8822B) << BIT_SHIFT_TBOX_L1_8822B)
220 #define BIT_GET_TBOX_L1_8822B(x) \
221 (((x) >> BIT_SHIFT_TBOX_L1_8822B) & BIT_MASK_TBOX_L1_8822B)
223 #define BIT_SW18_SEL_8822B BIT(13)
225 /* 2 REG_NOT_VALID_8822B */
226 #define BIT_SW18_SD_8822B BIT(10)
228 #define BIT_SHIFT_R3_L_8822B 7
229 #define BIT_MASK_R3_L_8822B 0x3
230 #define BIT_R3_L_8822B(x) (((x) & BIT_MASK_R3_L_8822B) << BIT_SHIFT_R3_L_8822B)
231 #define BIT_GET_R3_L_8822B(x) \
232 (((x) >> BIT_SHIFT_R3_L_8822B) & BIT_MASK_R3_L_8822B)
234 #define BIT_SHIFT_SW18_R2_8822B 5
235 #define BIT_MASK_SW18_R2_8822B 0x3
236 #define BIT_SW18_R2_8822B(x) \
237 (((x) & BIT_MASK_SW18_R2_8822B) << BIT_SHIFT_SW18_R2_8822B)
238 #define BIT_GET_SW18_R2_8822B(x) \
239 (((x) >> BIT_SHIFT_SW18_R2_8822B) & BIT_MASK_SW18_R2_8822B)
241 #define BIT_SHIFT_SW18_R1_8822B 3
242 #define BIT_MASK_SW18_R1_8822B 0x3
243 #define BIT_SW18_R1_8822B(x) \
244 (((x) & BIT_MASK_SW18_R1_8822B) << BIT_SHIFT_SW18_R1_8822B)
245 #define BIT_GET_SW18_R1_8822B(x) \
246 (((x) >> BIT_SHIFT_SW18_R1_8822B) & BIT_MASK_SW18_R1_8822B)
248 #define BIT_SHIFT_C3_L_C3_8822B 1
249 #define BIT_MASK_C3_L_C3_8822B 0x3
250 #define BIT_C3_L_C3_8822B(x) \
251 (((x) & BIT_MASK_C3_L_C3_8822B) << BIT_SHIFT_C3_L_C3_8822B)
252 #define BIT_GET_C3_L_C3_8822B(x) \
253 (((x) >> BIT_SHIFT_C3_L_C3_8822B) & BIT_MASK_C3_L_C3_8822B)
255 #define BIT_C2_L_BIT1_8822B BIT(0)
257 /* 2 REG_SYS_SWR_CTRL3_8822B */
258 #define BIT_SPS18_OCP_DIS_8822B BIT(31)
260 #define BIT_SHIFT_SPS18_OCP_TH_8822B 16
261 #define BIT_MASK_SPS18_OCP_TH_8822B 0x7fff
262 #define BIT_SPS18_OCP_TH_8822B(x) \
263 (((x) & BIT_MASK_SPS18_OCP_TH_8822B) << BIT_SHIFT_SPS18_OCP_TH_8822B)
264 #define BIT_GET_SPS18_OCP_TH_8822B(x) \
265 (((x) >> BIT_SHIFT_SPS18_OCP_TH_8822B) & BIT_MASK_SPS18_OCP_TH_8822B)
267 #define BIT_SHIFT_OCP_WINDOW_8822B 0
268 #define BIT_MASK_OCP_WINDOW_8822B 0xffff
269 #define BIT_OCP_WINDOW_8822B(x) \
270 (((x) & BIT_MASK_OCP_WINDOW_8822B) << BIT_SHIFT_OCP_WINDOW_8822B)
271 #define BIT_GET_OCP_WINDOW_8822B(x) \
272 (((x) >> BIT_SHIFT_OCP_WINDOW_8822B) & BIT_MASK_OCP_WINDOW_8822B)
274 /* 2 REG_RSV_CTRL_8822B */
275 #define BIT_HREG_DBG_8822B BIT(23)
276 #define BIT_WLMCUIOIF_8822B BIT(8)
277 #define BIT_LOCK_ALL_EN_8822B BIT(7)
278 #define BIT_R_DIS_PRST_8822B BIT(6)
279 #define BIT_WLOCK_1C_B6_8822B BIT(5)
280 #define BIT_WLOCK_40_8822B BIT(4)
281 #define BIT_WLOCK_08_8822B BIT(3)
282 #define BIT_WLOCK_04_8822B BIT(2)
283 #define BIT_WLOCK_00_8822B BIT(1)
284 #define BIT_WLOCK_ALL_8822B BIT(0)
286 /* 2 REG_RF_CTRL_8822B */
287 #define BIT_RF_SDMRSTB_8822B BIT(2)
288 #define BIT_RF_RSTB_8822B BIT(1)
289 #define BIT_RF_EN_8822B BIT(0)
291 /* 2 REG_AFE_LDO_CTRL_8822B */
293 #define BIT_SHIFT_LPLDH12_RSV_8822B 29
294 #define BIT_MASK_LPLDH12_RSV_8822B 0x7
295 #define BIT_LPLDH12_RSV_8822B(x) \
296 (((x) & BIT_MASK_LPLDH12_RSV_8822B) << BIT_SHIFT_LPLDH12_RSV_8822B)
297 #define BIT_GET_LPLDH12_RSV_8822B(x) \
298 (((x) >> BIT_SHIFT_LPLDH12_RSV_8822B) & BIT_MASK_LPLDH12_RSV_8822B)
300 #define BIT_LPLDH12_SLP_8822B BIT(28)
302 #define BIT_SHIFT_LPLDH12_VADJ_8822B 24
303 #define BIT_MASK_LPLDH12_VADJ_8822B 0xf
304 #define BIT_LPLDH12_VADJ_8822B(x) \
305 (((x) & BIT_MASK_LPLDH12_VADJ_8822B) << BIT_SHIFT_LPLDH12_VADJ_8822B)
306 #define BIT_GET_LPLDH12_VADJ_8822B(x) \
307 (((x) >> BIT_SHIFT_LPLDH12_VADJ_8822B) & BIT_MASK_LPLDH12_VADJ_8822B)
309 #define BIT_LDH12_EN_8822B BIT(16)
310 #define BIT_WLBBOFF_BIG_PWC_EN_8822B BIT(14)
311 #define BIT_WLBBOFF_SMALL_PWC_EN_8822B BIT(13)
312 #define BIT_WLMACOFF_BIG_PWC_EN_8822B BIT(12)
313 #define BIT_WLPON_PWC_EN_8822B BIT(11)
314 #define BIT_POW_REGU_P1_8822B BIT(10)
315 #define BIT_LDOV12W_EN_8822B BIT(8)
316 #define BIT_EX_XTAL_DRV_DIGI_8822B BIT(7)
317 #define BIT_EX_XTAL_DRV_USB_8822B BIT(6)
318 #define BIT_EX_XTAL_DRV_AFE_8822B BIT(5)
319 #define BIT_EX_XTAL_DRV_RF2_8822B BIT(4)
320 #define BIT_EX_XTAL_DRV_RF1_8822B BIT(3)
321 #define BIT_POW_REGU_P0_8822B BIT(2)
323 /* 2 REG_NOT_VALID_8822B */
324 #define BIT_POW_PLL_LDO_8822B BIT(0)
326 /* 2 REG_AFE_CTRL1_8822B */
327 #define BIT_AGPIO_GPE_8822B BIT(31)
329 #define BIT_SHIFT_XTAL_CAP_XI_8822B 25
330 #define BIT_MASK_XTAL_CAP_XI_8822B 0x3f
331 #define BIT_XTAL_CAP_XI_8822B(x) \
332 (((x) & BIT_MASK_XTAL_CAP_XI_8822B) << BIT_SHIFT_XTAL_CAP_XI_8822B)
333 #define BIT_GET_XTAL_CAP_XI_8822B(x) \
334 (((x) >> BIT_SHIFT_XTAL_CAP_XI_8822B) & BIT_MASK_XTAL_CAP_XI_8822B)
336 #define BIT_SHIFT_XTAL_DRV_DIGI_8822B 23
337 #define BIT_MASK_XTAL_DRV_DIGI_8822B 0x3
338 #define BIT_XTAL_DRV_DIGI_8822B(x) \
339 (((x) & BIT_MASK_XTAL_DRV_DIGI_8822B) << BIT_SHIFT_XTAL_DRV_DIGI_8822B)
340 #define BIT_GET_XTAL_DRV_DIGI_8822B(x) \
341 (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8822B) & BIT_MASK_XTAL_DRV_DIGI_8822B)
343 #define BIT_XTAL_DRV_USB_BIT1_8822B BIT(22)
345 #define BIT_SHIFT_MAC_CLK_SEL_8822B 20
346 #define BIT_MASK_MAC_CLK_SEL_8822B 0x3
347 #define BIT_MAC_CLK_SEL_8822B(x) \
348 (((x) & BIT_MASK_MAC_CLK_SEL_8822B) << BIT_SHIFT_MAC_CLK_SEL_8822B)
349 #define BIT_GET_MAC_CLK_SEL_8822B(x) \
350 (((x) >> BIT_SHIFT_MAC_CLK_SEL_8822B) & BIT_MASK_MAC_CLK_SEL_8822B)
352 #define BIT_XTAL_DRV_USB_BIT0_8822B BIT(19)
354 #define BIT_SHIFT_XTAL_DRV_AFE_8822B 17
355 #define BIT_MASK_XTAL_DRV_AFE_8822B 0x3
356 #define BIT_XTAL_DRV_AFE_8822B(x) \
357 (((x) & BIT_MASK_XTAL_DRV_AFE_8822B) << BIT_SHIFT_XTAL_DRV_AFE_8822B)
358 #define BIT_GET_XTAL_DRV_AFE_8822B(x) \
359 (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8822B) & BIT_MASK_XTAL_DRV_AFE_8822B)
361 #define BIT_SHIFT_XTAL_DRV_RF2_8822B 15
362 #define BIT_MASK_XTAL_DRV_RF2_8822B 0x3
363 #define BIT_XTAL_DRV_RF2_8822B(x) \
364 (((x) & BIT_MASK_XTAL_DRV_RF2_8822B) << BIT_SHIFT_XTAL_DRV_RF2_8822B)
365 #define BIT_GET_XTAL_DRV_RF2_8822B(x) \
366 (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8822B) & BIT_MASK_XTAL_DRV_RF2_8822B)
368 #define BIT_SHIFT_XTAL_DRV_RF1_8822B 13
369 #define BIT_MASK_XTAL_DRV_RF1_8822B 0x3
370 #define BIT_XTAL_DRV_RF1_8822B(x) \
371 (((x) & BIT_MASK_XTAL_DRV_RF1_8822B) << BIT_SHIFT_XTAL_DRV_RF1_8822B)
372 #define BIT_GET_XTAL_DRV_RF1_8822B(x) \
373 (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8822B) & BIT_MASK_XTAL_DRV_RF1_8822B)
375 #define BIT_XTAL_DELAY_DIGI_8822B BIT(12)
376 #define BIT_XTAL_DELAY_USB_8822B BIT(11)
377 #define BIT_XTAL_DELAY_AFE_8822B BIT(10)
379 #define BIT_SHIFT_XTAL_LDO_VREF_8822B 7
380 #define BIT_MASK_XTAL_LDO_VREF_8822B 0x7
381 #define BIT_XTAL_LDO_VREF_8822B(x) \
382 (((x) & BIT_MASK_XTAL_LDO_VREF_8822B) << BIT_SHIFT_XTAL_LDO_VREF_8822B)
383 #define BIT_GET_XTAL_LDO_VREF_8822B(x) \
384 (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8822B) & BIT_MASK_XTAL_LDO_VREF_8822B)
386 #define BIT_XTAL_XQSEL_RF_8822B BIT(6)
387 #define BIT_XTAL_XQSEL_8822B BIT(5)
389 #define BIT_SHIFT_XTAL_GMN_V2_8822B 3
390 #define BIT_MASK_XTAL_GMN_V2_8822B 0x3
391 #define BIT_XTAL_GMN_V2_8822B(x) \
392 (((x) & BIT_MASK_XTAL_GMN_V2_8822B) << BIT_SHIFT_XTAL_GMN_V2_8822B)
393 #define BIT_GET_XTAL_GMN_V2_8822B(x) \
394 (((x) >> BIT_SHIFT_XTAL_GMN_V2_8822B) & BIT_MASK_XTAL_GMN_V2_8822B)
396 #define BIT_SHIFT_XTAL_GMP_V2_8822B 1
397 #define BIT_MASK_XTAL_GMP_V2_8822B 0x3
398 #define BIT_XTAL_GMP_V2_8822B(x) \
399 (((x) & BIT_MASK_XTAL_GMP_V2_8822B) << BIT_SHIFT_XTAL_GMP_V2_8822B)
400 #define BIT_GET_XTAL_GMP_V2_8822B(x) \
401 (((x) >> BIT_SHIFT_XTAL_GMP_V2_8822B) & BIT_MASK_XTAL_GMP_V2_8822B)
403 #define BIT_XTAL_EN_8822B BIT(0)
405 /* 2 REG_AFE_CTRL2_8822B */
407 #define BIT_SHIFT_REG_C3_V4_8822B 30
408 #define BIT_MASK_REG_C3_V4_8822B 0x3
409 #define BIT_REG_C3_V4_8822B(x) \
410 (((x) & BIT_MASK_REG_C3_V4_8822B) << BIT_SHIFT_REG_C3_V4_8822B)
411 #define BIT_GET_REG_C3_V4_8822B(x) \
412 (((x) >> BIT_SHIFT_REG_C3_V4_8822B) & BIT_MASK_REG_C3_V4_8822B)
414 #define BIT_REG_CP_BIT1_8822B BIT(29)
416 #define BIT_SHIFT_REG_RS_V4_8822B 26
417 #define BIT_MASK_REG_RS_V4_8822B 0x7
418 #define BIT_REG_RS_V4_8822B(x) \
419 (((x) & BIT_MASK_REG_RS_V4_8822B) << BIT_SHIFT_REG_RS_V4_8822B)
420 #define BIT_GET_REG_RS_V4_8822B(x) \
421 (((x) >> BIT_SHIFT_REG_RS_V4_8822B) & BIT_MASK_REG_RS_V4_8822B)
423 #define BIT_SHIFT_REG__CS_8822B 24
424 #define BIT_MASK_REG__CS_8822B 0x3
425 #define BIT_REG__CS_8822B(x) \
426 (((x) & BIT_MASK_REG__CS_8822B) << BIT_SHIFT_REG__CS_8822B)
427 #define BIT_GET_REG__CS_8822B(x) \
428 (((x) >> BIT_SHIFT_REG__CS_8822B) & BIT_MASK_REG__CS_8822B)
430 #define BIT_SHIFT_REG_CP_OFFSET_8822B 21
431 #define BIT_MASK_REG_CP_OFFSET_8822B 0x7
432 #define BIT_REG_CP_OFFSET_8822B(x) \
433 (((x) & BIT_MASK_REG_CP_OFFSET_8822B) << BIT_SHIFT_REG_CP_OFFSET_8822B)
434 #define BIT_GET_REG_CP_OFFSET_8822B(x) \
435 (((x) >> BIT_SHIFT_REG_CP_OFFSET_8822B) & BIT_MASK_REG_CP_OFFSET_8822B)
437 #define BIT_SHIFT_CP_BIAS_8822B 18
438 #define BIT_MASK_CP_BIAS_8822B 0x7
439 #define BIT_CP_BIAS_8822B(x) \
440 (((x) & BIT_MASK_CP_BIAS_8822B) << BIT_SHIFT_CP_BIAS_8822B)
441 #define BIT_GET_CP_BIAS_8822B(x) \
442 (((x) >> BIT_SHIFT_CP_BIAS_8822B) & BIT_MASK_CP_BIAS_8822B)
444 #define BIT_REG_IDOUBLE_V2_8822B BIT(17)
445 #define BIT_EN_SYN_8822B BIT(16)
447 #define BIT_SHIFT_MCCO_8822B 14
448 #define BIT_MASK_MCCO_8822B 0x3
449 #define BIT_MCCO_8822B(x) (((x) & BIT_MASK_MCCO_8822B) << BIT_SHIFT_MCCO_8822B)
450 #define BIT_GET_MCCO_8822B(x) \
451 (((x) >> BIT_SHIFT_MCCO_8822B) & BIT_MASK_MCCO_8822B)
453 #define BIT_SHIFT_REG_LDO_SEL_8822B 12
454 #define BIT_MASK_REG_LDO_SEL_8822B 0x3
455 #define BIT_REG_LDO_SEL_8822B(x) \
456 (((x) & BIT_MASK_REG_LDO_SEL_8822B) << BIT_SHIFT_REG_LDO_SEL_8822B)
457 #define BIT_GET_REG_LDO_SEL_8822B(x) \
458 (((x) >> BIT_SHIFT_REG_LDO_SEL_8822B) & BIT_MASK_REG_LDO_SEL_8822B)
460 #define BIT_REG_KVCO_V2_8822B BIT(10)
461 #define BIT_AGPIO_GPO_8822B BIT(9)
463 #define BIT_SHIFT_AGPIO_DRV_8822B 7
464 #define BIT_MASK_AGPIO_DRV_8822B 0x3
465 #define BIT_AGPIO_DRV_8822B(x) \
466 (((x) & BIT_MASK_AGPIO_DRV_8822B) << BIT_SHIFT_AGPIO_DRV_8822B)
467 #define BIT_GET_AGPIO_DRV_8822B(x) \
468 (((x) >> BIT_SHIFT_AGPIO_DRV_8822B) & BIT_MASK_AGPIO_DRV_8822B)
470 #define BIT_SHIFT_XTAL_CAP_XO_8822B 1
471 #define BIT_MASK_XTAL_CAP_XO_8822B 0x3f
472 #define BIT_XTAL_CAP_XO_8822B(x) \
473 (((x) & BIT_MASK_XTAL_CAP_XO_8822B) << BIT_SHIFT_XTAL_CAP_XO_8822B)
474 #define BIT_GET_XTAL_CAP_XO_8822B(x) \
475 (((x) >> BIT_SHIFT_XTAL_CAP_XO_8822B) & BIT_MASK_XTAL_CAP_XO_8822B)
477 #define BIT_POW_PLL_8822B BIT(0)
479 /* 2 REG_AFE_CTRL3_8822B */
481 #define BIT_SHIFT_PS_8822B 7
482 #define BIT_MASK_PS_8822B 0x7
483 #define BIT_PS_8822B(x) (((x) & BIT_MASK_PS_8822B) << BIT_SHIFT_PS_8822B)
484 #define BIT_GET_PS_8822B(x) (((x) >> BIT_SHIFT_PS_8822B) & BIT_MASK_PS_8822B)
486 #define BIT_PSEN_8822B BIT(6)
487 #define BIT_DOGENB_8822B BIT(5)
488 #define BIT_REG_MBIAS_8822B BIT(4)
490 #define BIT_SHIFT_REG_R3_V4_8822B 1
491 #define BIT_MASK_REG_R3_V4_8822B 0x7
492 #define BIT_REG_R3_V4_8822B(x) \
493 (((x) & BIT_MASK_REG_R3_V4_8822B) << BIT_SHIFT_REG_R3_V4_8822B)
494 #define BIT_GET_REG_R3_V4_8822B(x) \
495 (((x) >> BIT_SHIFT_REG_R3_V4_8822B) & BIT_MASK_REG_R3_V4_8822B)
497 #define BIT_REG_CP_BIT0_8822B BIT(0)
499 /* 2 REG_EFUSE_CTRL_8822B */
500 #define BIT_EF_FLAG_8822B BIT(31)
502 #define BIT_SHIFT_EF_PGPD_8822B 28
503 #define BIT_MASK_EF_PGPD_8822B 0x7
504 #define BIT_EF_PGPD_8822B(x) \
505 (((x) & BIT_MASK_EF_PGPD_8822B) << BIT_SHIFT_EF_PGPD_8822B)
506 #define BIT_GET_EF_PGPD_8822B(x) \
507 (((x) >> BIT_SHIFT_EF_PGPD_8822B) & BIT_MASK_EF_PGPD_8822B)
509 #define BIT_SHIFT_EF_RDT_8822B 24
510 #define BIT_MASK_EF_RDT_8822B 0xf
511 #define BIT_EF_RDT_8822B(x) \
512 (((x) & BIT_MASK_EF_RDT_8822B) << BIT_SHIFT_EF_RDT_8822B)
513 #define BIT_GET_EF_RDT_8822B(x) \
514 (((x) >> BIT_SHIFT_EF_RDT_8822B) & BIT_MASK_EF_RDT_8822B)
516 #define BIT_SHIFT_EF_PGTS_8822B 20
517 #define BIT_MASK_EF_PGTS_8822B 0xf
518 #define BIT_EF_PGTS_8822B(x) \
519 (((x) & BIT_MASK_EF_PGTS_8822B) << BIT_SHIFT_EF_PGTS_8822B)
520 #define BIT_GET_EF_PGTS_8822B(x) \
521 (((x) >> BIT_SHIFT_EF_PGTS_8822B) & BIT_MASK_EF_PGTS_8822B)
523 #define BIT_EF_PDWN_8822B BIT(19)
524 #define BIT_EF_ALDEN_8822B BIT(18)
526 #define BIT_SHIFT_EF_ADDR_8822B 8
527 #define BIT_MASK_EF_ADDR_8822B 0x3ff
528 #define BIT_EF_ADDR_8822B(x) \
529 (((x) & BIT_MASK_EF_ADDR_8822B) << BIT_SHIFT_EF_ADDR_8822B)
530 #define BIT_GET_EF_ADDR_8822B(x) \
531 (((x) >> BIT_SHIFT_EF_ADDR_8822B) & BIT_MASK_EF_ADDR_8822B)
533 #define BIT_SHIFT_EF_DATA_8822B 0
534 #define BIT_MASK_EF_DATA_8822B 0xff
535 #define BIT_EF_DATA_8822B(x) \
536 (((x) & BIT_MASK_EF_DATA_8822B) << BIT_SHIFT_EF_DATA_8822B)
537 #define BIT_GET_EF_DATA_8822B(x) \
538 (((x) >> BIT_SHIFT_EF_DATA_8822B) & BIT_MASK_EF_DATA_8822B)
540 /* 2 REG_LDO_EFUSE_CTRL_8822B */
541 #define BIT_LDOE25_EN_8822B BIT(31)
543 #define BIT_SHIFT_LDOE25_V12ADJ_L_8822B 27
544 #define BIT_MASK_LDOE25_V12ADJ_L_8822B 0xf
545 #define BIT_LDOE25_V12ADJ_L_8822B(x) \
546 (((x) & BIT_MASK_LDOE25_V12ADJ_L_8822B) \
547 << BIT_SHIFT_LDOE25_V12ADJ_L_8822B)
548 #define BIT_GET_LDOE25_V12ADJ_L_8822B(x) \
549 (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8822B) & \
550 BIT_MASK_LDOE25_V12ADJ_L_8822B)
552 #define BIT_EF_CRES_SEL_8822B BIT(26)
554 #define BIT_SHIFT_EF_SCAN_START_V1_8822B 16
555 #define BIT_MASK_EF_SCAN_START_V1_8822B 0x3ff
556 #define BIT_EF_SCAN_START_V1_8822B(x) \
557 (((x) & BIT_MASK_EF_SCAN_START_V1_8822B) \
558 << BIT_SHIFT_EF_SCAN_START_V1_8822B)
559 #define BIT_GET_EF_SCAN_START_V1_8822B(x) \
560 (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8822B) & \
561 BIT_MASK_EF_SCAN_START_V1_8822B)
563 #define BIT_SHIFT_EF_SCAN_END_8822B 12
564 #define BIT_MASK_EF_SCAN_END_8822B 0xf
565 #define BIT_EF_SCAN_END_8822B(x) \
566 (((x) & BIT_MASK_EF_SCAN_END_8822B) << BIT_SHIFT_EF_SCAN_END_8822B)
567 #define BIT_GET_EF_SCAN_END_8822B(x) \
568 (((x) >> BIT_SHIFT_EF_SCAN_END_8822B) & BIT_MASK_EF_SCAN_END_8822B)
570 #define BIT_EF_PD_DIS_8822B BIT(11)
572 #define BIT_SHIFT_EF_CELL_SEL_8822B 8
573 #define BIT_MASK_EF_CELL_SEL_8822B 0x3
574 #define BIT_EF_CELL_SEL_8822B(x) \
575 (((x) & BIT_MASK_EF_CELL_SEL_8822B) << BIT_SHIFT_EF_CELL_SEL_8822B)
576 #define BIT_GET_EF_CELL_SEL_8822B(x) \
577 (((x) >> BIT_SHIFT_EF_CELL_SEL_8822B) & BIT_MASK_EF_CELL_SEL_8822B)
579 #define BIT_EF_TRPT_8822B BIT(7)
581 #define BIT_SHIFT_EF_TTHD_8822B 0
582 #define BIT_MASK_EF_TTHD_8822B 0x7f
583 #define BIT_EF_TTHD_8822B(x) \
584 (((x) & BIT_MASK_EF_TTHD_8822B) << BIT_SHIFT_EF_TTHD_8822B)
585 #define BIT_GET_EF_TTHD_8822B(x) \
586 (((x) >> BIT_SHIFT_EF_TTHD_8822B) & BIT_MASK_EF_TTHD_8822B)
588 /* 2 REG_PWR_OPTION_CTRL_8822B */
590 #define BIT_SHIFT_DBG_SEL_V1_8822B 16
591 #define BIT_MASK_DBG_SEL_V1_8822B 0xff
592 #define BIT_DBG_SEL_V1_8822B(x) \
593 (((x) & BIT_MASK_DBG_SEL_V1_8822B) << BIT_SHIFT_DBG_SEL_V1_8822B)
594 #define BIT_GET_DBG_SEL_V1_8822B(x) \
595 (((x) >> BIT_SHIFT_DBG_SEL_V1_8822B) & BIT_MASK_DBG_SEL_V1_8822B)
597 #define BIT_SHIFT_DBG_SEL_BYTE_8822B 14
598 #define BIT_MASK_DBG_SEL_BYTE_8822B 0x3
599 #define BIT_DBG_SEL_BYTE_8822B(x) \
600 (((x) & BIT_MASK_DBG_SEL_BYTE_8822B) << BIT_SHIFT_DBG_SEL_BYTE_8822B)
601 #define BIT_GET_DBG_SEL_BYTE_8822B(x) \
602 (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8822B) & BIT_MASK_DBG_SEL_BYTE_8822B)
604 #define BIT_SHIFT_STD_L1_V1_8822B 12
605 #define BIT_MASK_STD_L1_V1_8822B 0x3
606 #define BIT_STD_L1_V1_8822B(x) \
607 (((x) & BIT_MASK_STD_L1_V1_8822B) << BIT_SHIFT_STD_L1_V1_8822B)
608 #define BIT_GET_STD_L1_V1_8822B(x) \
609 (((x) >> BIT_SHIFT_STD_L1_V1_8822B) & BIT_MASK_STD_L1_V1_8822B)
611 #define BIT_SYSON_DBG_PAD_E2_8822B BIT(11)
612 #define BIT_SYSON_LED_PAD_E2_8822B BIT(10)
613 #define BIT_SYSON_GPEE_PAD_E2_8822B BIT(9)
614 #define BIT_SYSON_PCI_PAD_E2_8822B BIT(8)
615 #define BIT_AUTO_SW_LDO_VOL_EN_8822B BIT(7)
617 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8822B 4
618 #define BIT_MASK_SYSON_SPS0WWV_WT_8822B 0x3
619 #define BIT_SYSON_SPS0WWV_WT_8822B(x) \
620 (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8822B) \
621 << BIT_SHIFT_SYSON_SPS0WWV_WT_8822B)
622 #define BIT_GET_SYSON_SPS0WWV_WT_8822B(x) \
623 (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8822B) & \
624 BIT_MASK_SYSON_SPS0WWV_WT_8822B)
626 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8822B 2
627 #define BIT_MASK_SYSON_SPS0LDO_WT_8822B 0x3
628 #define BIT_SYSON_SPS0LDO_WT_8822B(x) \
629 (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8822B) \
630 << BIT_SHIFT_SYSON_SPS0LDO_WT_8822B)
631 #define BIT_GET_SYSON_SPS0LDO_WT_8822B(x) \
632 (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8822B) & \
633 BIT_MASK_SYSON_SPS0LDO_WT_8822B)
635 #define BIT_SHIFT_SYSON_RCLK_SCALE_8822B 0
636 #define BIT_MASK_SYSON_RCLK_SCALE_8822B 0x3
637 #define BIT_SYSON_RCLK_SCALE_8822B(x) \
638 (((x) & BIT_MASK_SYSON_RCLK_SCALE_8822B) \
639 << BIT_SHIFT_SYSON_RCLK_SCALE_8822B)
640 #define BIT_GET_SYSON_RCLK_SCALE_8822B(x) \
641 (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8822B) & \
642 BIT_MASK_SYSON_RCLK_SCALE_8822B)
644 /* 2 REG_CAL_TIMER_8822B */
646 #define BIT_SHIFT_MATCH_CNT_8822B 8
647 #define BIT_MASK_MATCH_CNT_8822B 0xff
648 #define BIT_MATCH_CNT_8822B(x) \
649 (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
650 #define BIT_GET_MATCH_CNT_8822B(x) \
651 (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
653 #define BIT_SHIFT_CAL_SCAL_8822B 0
654 #define BIT_MASK_CAL_SCAL_8822B 0xff
655 #define BIT_CAL_SCAL_8822B(x) \
656 (((x) & BIT_MASK_CAL_SCAL_8822B) << BIT_SHIFT_CAL_SCAL_8822B)
657 #define BIT_GET_CAL_SCAL_8822B(x) \
658 (((x) >> BIT_SHIFT_CAL_SCAL_8822B) & BIT_MASK_CAL_SCAL_8822B)
660 /* 2 REG_ACLK_MON_8822B */
662 #define BIT_SHIFT_RCLK_MON_8822B 5
663 #define BIT_MASK_RCLK_MON_8822B 0x7ff
664 #define BIT_RCLK_MON_8822B(x) \
665 (((x) & BIT_MASK_RCLK_MON_8822B) << BIT_SHIFT_RCLK_MON_8822B)
666 #define BIT_GET_RCLK_MON_8822B(x) \
667 (((x) >> BIT_SHIFT_RCLK_MON_8822B) & BIT_MASK_RCLK_MON_8822B)
669 #define BIT_CAL_EN_8822B BIT(4)
671 #define BIT_SHIFT_DPSTU_8822B 2
672 #define BIT_MASK_DPSTU_8822B 0x3
673 #define BIT_DPSTU_8822B(x) \
674 (((x) & BIT_MASK_DPSTU_8822B) << BIT_SHIFT_DPSTU_8822B)
675 #define BIT_GET_DPSTU_8822B(x) \
676 (((x) >> BIT_SHIFT_DPSTU_8822B) & BIT_MASK_DPSTU_8822B)
678 #define BIT_SUS_16X_8822B BIT(1)
680 /* 2 REG_GPIO_MUXCFG_8822B */
681 #define BIT_FSPI_EN_8822B BIT(19)
682 #define BIT_WL_RTS_EXT_32K_SEL_8822B BIT(18)
683 #define BIT_WLGP_SPI_EN_8822B BIT(16)
684 #define BIT_SIC_LBK_8822B BIT(15)
685 #define BIT_ENHTP_8822B BIT(14)
686 #define BIT_ENSIC_8822B BIT(12)
687 #define BIT_SIC_SWRST_8822B BIT(11)
688 #define BIT_PO_WIFI_PTA_PINS_8822B BIT(10)
689 #define BIT_PO_BT_PTA_PINS_8822B BIT(9)
690 #define BIT_ENUART_8822B BIT(8)
692 #define BIT_SHIFT_BTMODE_8822B 6
693 #define BIT_MASK_BTMODE_8822B 0x3
694 #define BIT_BTMODE_8822B(x) \
695 (((x) & BIT_MASK_BTMODE_8822B) << BIT_SHIFT_BTMODE_8822B)
696 #define BIT_GET_BTMODE_8822B(x) \
697 (((x) >> BIT_SHIFT_BTMODE_8822B) & BIT_MASK_BTMODE_8822B)
699 #define BIT_ENBT_8822B BIT(5)
700 #define BIT_EROM_EN_8822B BIT(4)
701 #define BIT_WLRFE_6_7_EN_8822B BIT(3)
702 #define BIT_WLRFE_4_5_EN_8822B BIT(2)
704 #define BIT_SHIFT_GPIOSEL_8822B 0
705 #define BIT_MASK_GPIOSEL_8822B 0x3
706 #define BIT_GPIOSEL_8822B(x) \
707 (((x) & BIT_MASK_GPIOSEL_8822B) << BIT_SHIFT_GPIOSEL_8822B)
708 #define BIT_GET_GPIOSEL_8822B(x) \
709 (((x) >> BIT_SHIFT_GPIOSEL_8822B) & BIT_MASK_GPIOSEL_8822B)
711 /* 2 REG_GPIO_PIN_CTRL_8822B */
713 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8822B 24
714 #define BIT_MASK_GPIO_MOD_7_TO_0_8822B 0xff
715 #define BIT_GPIO_MOD_7_TO_0_8822B(x) \
716 (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8822B) \
717 << BIT_SHIFT_GPIO_MOD_7_TO_0_8822B)
718 #define BIT_GET_GPIO_MOD_7_TO_0_8822B(x) \
719 (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8822B) & \
720 BIT_MASK_GPIO_MOD_7_TO_0_8822B)
722 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B 16
723 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B 0xff
724 #define BIT_GPIO_IO_SEL_7_TO_0_8822B(x) \
725 (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B) \
726 << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B)
727 #define BIT_GET_GPIO_IO_SEL_7_TO_0_8822B(x) \
728 (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B) & \
729 BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B)
731 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8822B 8
732 #define BIT_MASK_GPIO_OUT_7_TO_0_8822B 0xff
733 #define BIT_GPIO_OUT_7_TO_0_8822B(x) \
734 (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8822B) \
735 << BIT_SHIFT_GPIO_OUT_7_TO_0_8822B)
736 #define BIT_GET_GPIO_OUT_7_TO_0_8822B(x) \
737 (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8822B) & \
738 BIT_MASK_GPIO_OUT_7_TO_0_8822B)
740 #define BIT_SHIFT_GPIO_IN_7_TO_0_8822B 0
741 #define BIT_MASK_GPIO_IN_7_TO_0_8822B 0xff
742 #define BIT_GPIO_IN_7_TO_0_8822B(x) \
743 (((x) & BIT_MASK_GPIO_IN_7_TO_0_8822B) \
744 << BIT_SHIFT_GPIO_IN_7_TO_0_8822B)
745 #define BIT_GET_GPIO_IN_7_TO_0_8822B(x) \
746 (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8822B) & \
747 BIT_MASK_GPIO_IN_7_TO_0_8822B)
749 /* 2 REG_GPIO_INTM_8822B */
751 #define BIT_SHIFT_MUXDBG_SEL_8822B 30
752 #define BIT_MASK_MUXDBG_SEL_8822B 0x3
753 #define BIT_MUXDBG_SEL_8822B(x) \
754 (((x) & BIT_MASK_MUXDBG_SEL_8822B) << BIT_SHIFT_MUXDBG_SEL_8822B)
755 #define BIT_GET_MUXDBG_SEL_8822B(x) \
756 (((x) >> BIT_SHIFT_MUXDBG_SEL_8822B) & BIT_MASK_MUXDBG_SEL_8822B)
758 #define BIT_EXTWOL_SEL_8822B BIT(17)
759 #define BIT_EXTWOL_EN_8822B BIT(16)
760 #define BIT_GPIOF_INT_MD_8822B BIT(15)
761 #define BIT_GPIOE_INT_MD_8822B BIT(14)
762 #define BIT_GPIOD_INT_MD_8822B BIT(13)
763 #define BIT_GPIOF_INT_MD_8822B BIT(15)
764 #define BIT_GPIOE_INT_MD_8822B BIT(14)
765 #define BIT_GPIOD_INT_MD_8822B BIT(13)
766 #define BIT_GPIOC_INT_MD_8822B BIT(12)
767 #define BIT_GPIOB_INT_MD_8822B BIT(11)
768 #define BIT_GPIOA_INT_MD_8822B BIT(10)
769 #define BIT_GPIO9_INT_MD_8822B BIT(9)
770 #define BIT_GPIO8_INT_MD_8822B BIT(8)
771 #define BIT_GPIO7_INT_MD_8822B BIT(7)
772 #define BIT_GPIO6_INT_MD_8822B BIT(6)
773 #define BIT_GPIO5_INT_MD_8822B BIT(5)
774 #define BIT_GPIO4_INT_MD_8822B BIT(4)
775 #define BIT_GPIO3_INT_MD_8822B BIT(3)
776 #define BIT_GPIO2_INT_MD_8822B BIT(2)
777 #define BIT_GPIO1_INT_MD_8822B BIT(1)
778 #define BIT_GPIO0_INT_MD_8822B BIT(0)
780 /* 2 REG_LED_CFG_8822B */
781 #define BIT_GPIO3_WL_CTRL_EN_8822B BIT(27)
782 #define BIT_LNAON_SEL_EN_8822B BIT(26)
783 #define BIT_PAPE_SEL_EN_8822B BIT(25)
784 #define BIT_DPDT_WLBT_SEL_8822B BIT(24)
785 #define BIT_DPDT_SEL_EN_8822B BIT(23)
786 #define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
787 #define BIT_GPIO13_14_WL_CTRL_EN_8822B BIT(22)
788 #define BIT_LED2DIS_8822B BIT(21)
789 #define BIT_LED2PL_8822B BIT(20)
790 #define BIT_LED2SV_8822B BIT(19)
792 #define BIT_SHIFT_LED2CM_8822B 16
793 #define BIT_MASK_LED2CM_8822B 0x7
794 #define BIT_LED2CM_8822B(x) \
795 (((x) & BIT_MASK_LED2CM_8822B) << BIT_SHIFT_LED2CM_8822B)
796 #define BIT_GET_LED2CM_8822B(x) \
797 (((x) >> BIT_SHIFT_LED2CM_8822B) & BIT_MASK_LED2CM_8822B)
799 #define BIT_LED1DIS_8822B BIT(15)
800 #define BIT_LED1PL_8822B BIT(12)
801 #define BIT_LED1SV_8822B BIT(11)
803 #define BIT_SHIFT_LED1CM_8822B 8
804 #define BIT_MASK_LED1CM_8822B 0x7
805 #define BIT_LED1CM_8822B(x) \
806 (((x) & BIT_MASK_LED1CM_8822B) << BIT_SHIFT_LED1CM_8822B)
807 #define BIT_GET_LED1CM_8822B(x) \
808 (((x) >> BIT_SHIFT_LED1CM_8822B) & BIT_MASK_LED1CM_8822B)
810 #define BIT_LED0DIS_8822B BIT(7)
812 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B 5
813 #define BIT_MASK_AFE_LDO_SWR_CHECK_8822B 0x3
814 #define BIT_AFE_LDO_SWR_CHECK_8822B(x) \
815 (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B) \
816 << BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B)
817 #define BIT_GET_AFE_LDO_SWR_CHECK_8822B(x) \
818 (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B) & \
819 BIT_MASK_AFE_LDO_SWR_CHECK_8822B)
821 #define BIT_LED0PL_8822B BIT(4)
822 #define BIT_LED0SV_8822B BIT(3)
824 #define BIT_SHIFT_LED0CM_8822B 0
825 #define BIT_MASK_LED0CM_8822B 0x7
826 #define BIT_LED0CM_8822B(x) \
827 (((x) & BIT_MASK_LED0CM_8822B) << BIT_SHIFT_LED0CM_8822B)
828 #define BIT_GET_LED0CM_8822B(x) \
829 (((x) >> BIT_SHIFT_LED0CM_8822B) & BIT_MASK_LED0CM_8822B)
831 /* 2 REG_FSIMR_8822B */
832 #define BIT_FS_PDNINT_EN_8822B BIT(31)
833 #define BIT_NFC_INT_PAD_EN_8822B BIT(30)
834 #define BIT_FS_SPS_OCP_INT_EN_8822B BIT(29)
835 #define BIT_FS_PWMERR_INT_EN_8822B BIT(28)
836 #define BIT_FS_GPIOF_INT_EN_8822B BIT(27)
837 #define BIT_FS_GPIOE_INT_EN_8822B BIT(26)
838 #define BIT_FS_GPIOD_INT_EN_8822B BIT(25)
839 #define BIT_FS_GPIOC_INT_EN_8822B BIT(24)
840 #define BIT_FS_GPIOB_INT_EN_8822B BIT(23)
841 #define BIT_FS_GPIOA_INT_EN_8822B BIT(22)
842 #define BIT_FS_GPIO9_INT_EN_8822B BIT(21)
843 #define BIT_FS_GPIO8_INT_EN_8822B BIT(20)
844 #define BIT_FS_GPIO7_INT_EN_8822B BIT(19)
845 #define BIT_FS_GPIO6_INT_EN_8822B BIT(18)
846 #define BIT_FS_GPIO5_INT_EN_8822B BIT(17)
847 #define BIT_FS_GPIO4_INT_EN_8822B BIT(16)
848 #define BIT_FS_GPIO3_INT_EN_8822B BIT(15)
849 #define BIT_FS_GPIO2_INT_EN_8822B BIT(14)
850 #define BIT_FS_GPIO1_INT_EN_8822B BIT(13)
851 #define BIT_FS_GPIO0_INT_EN_8822B BIT(12)
852 #define BIT_FS_HCI_SUS_EN_8822B BIT(11)
853 #define BIT_FS_HCI_RES_EN_8822B BIT(10)
854 #define BIT_FS_HCI_RESET_EN_8822B BIT(9)
855 #define BIT_FS_BTON_STS_UPDATE_MSK_EN_8822B BIT(7)
856 #define BIT_ACT2RECOVERY_INT_EN_V1_8822B BIT(6)
857 #define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
858 #define BIT_HCI_TXDMA_REQ_HIMR_8822B BIT(4)
859 #define BIT_FS_32K_LEAVE_SETTING_MAK_8822B BIT(3)
860 #define BIT_FS_32K_ENTER_SETTING_MAK_8822B BIT(2)
861 #define BIT_FS_USB_LPMRSM_MSK_8822B BIT(1)
862 #define BIT_FS_USB_LPMINT_MSK_8822B BIT(0)
864 /* 2 REG_FSISR_8822B */
865 #define BIT_FS_PDNINT_8822B BIT(31)
866 #define BIT_FS_SPS_OCP_INT_8822B BIT(29)
867 #define BIT_FS_PWMERR_INT_8822B BIT(28)
868 #define BIT_FS_GPIOF_INT_8822B BIT(27)
869 #define BIT_FS_GPIOE_INT_8822B BIT(26)
870 #define BIT_FS_GPIOD_INT_8822B BIT(25)
871 #define BIT_FS_GPIOC_INT_8822B BIT(24)
872 #define BIT_FS_GPIOB_INT_8822B BIT(23)
873 #define BIT_FS_GPIOA_INT_8822B BIT(22)
874 #define BIT_FS_GPIO9_INT_8822B BIT(21)
875 #define BIT_FS_GPIO8_INT_8822B BIT(20)
876 #define BIT_FS_GPIO7_INT_8822B BIT(19)
877 #define BIT_FS_GPIO6_INT_8822B BIT(18)
878 #define BIT_FS_GPIO5_INT_8822B BIT(17)
879 #define BIT_FS_GPIO4_INT_8822B BIT(16)
880 #define BIT_FS_GPIO3_INT_8822B BIT(15)
881 #define BIT_FS_GPIO2_INT_8822B BIT(14)
882 #define BIT_FS_GPIO1_INT_8822B BIT(13)
883 #define BIT_FS_GPIO0_INT_8822B BIT(12)
884 #define BIT_FS_HCI_SUS_INT_8822B BIT(11)
885 #define BIT_FS_HCI_RES_INT_8822B BIT(10)
886 #define BIT_FS_HCI_RESET_INT_8822B BIT(9)
887 #define BIT_ACT2RECOVERY_8822B BIT(6)
888 #define BIT_GEN1GEN2_SWITCH_8822B BIT(5)
889 #define BIT_HCI_TXDMA_REQ_HISR_8822B BIT(4)
890 #define BIT_FS_32K_LEAVE_SETTING_INT_8822B BIT(3)
891 #define BIT_FS_32K_ENTER_SETTING_INT_8822B BIT(2)
892 #define BIT_FS_USB_LPMRSM_INT_8822B BIT(1)
893 #define BIT_FS_USB_LPMINT_INT_8822B BIT(0)
895 /* 2 REG_HSIMR_8822B */
896 #define BIT_GPIOF_INT_EN_8822B BIT(31)
897 #define BIT_GPIOE_INT_EN_8822B BIT(30)
898 #define BIT_GPIOD_INT_EN_8822B BIT(29)
899 #define BIT_GPIOC_INT_EN_8822B BIT(28)
900 #define BIT_GPIOB_INT_EN_8822B BIT(27)
901 #define BIT_GPIOA_INT_EN_8822B BIT(26)
902 #define BIT_GPIO9_INT_EN_8822B BIT(25)
903 #define BIT_GPIO8_INT_EN_8822B BIT(24)
904 #define BIT_GPIO7_INT_EN_8822B BIT(23)
905 #define BIT_GPIO6_INT_EN_8822B BIT(22)
906 #define BIT_GPIO5_INT_EN_8822B BIT(21)
907 #define BIT_GPIO4_INT_EN_8822B BIT(20)
908 #define BIT_GPIO3_INT_EN_8822B BIT(19)
909 #define BIT_GPIO2_INT_EN_V1_8822B BIT(16)
910 #define BIT_GPIO1_INT_EN_8822B BIT(17)
911 #define BIT_GPIO0_INT_EN_8822B BIT(16)
912 #define BIT_PDNINT_EN_8822B BIT(7)
913 #define BIT_RON_INT_EN_8822B BIT(6)
914 #define BIT_SPS_OCP_INT_EN_8822B BIT(5)
915 #define BIT_GPIO15_0_INT_EN_8822B BIT(0)
917 /* 2 REG_HSISR_8822B */
918 #define BIT_GPIOF_INT_8822B BIT(31)
919 #define BIT_GPIOE_INT_8822B BIT(30)
920 #define BIT_GPIOD_INT_8822B BIT(29)
921 #define BIT_GPIOC_INT_8822B BIT(28)
922 #define BIT_GPIOB_INT_8822B BIT(27)
923 #define BIT_GPIOA_INT_8822B BIT(26)
924 #define BIT_GPIO9_INT_8822B BIT(25)
925 #define BIT_GPIO8_INT_8822B BIT(24)
926 #define BIT_GPIO7_INT_8822B BIT(23)
927 #define BIT_GPIO6_INT_8822B BIT(22)
928 #define BIT_GPIO5_INT_8822B BIT(21)
929 #define BIT_GPIO4_INT_8822B BIT(20)
930 #define BIT_GPIO3_INT_8822B BIT(19)
931 #define BIT_GPIO2_INT_V1_8822B BIT(16)
932 #define BIT_GPIO1_INT_8822B BIT(17)
933 #define BIT_GPIO0_INT_8822B BIT(16)
934 #define BIT_PDNINT_8822B BIT(7)
935 #define BIT_RON_INT_8822B BIT(6)
936 #define BIT_SPS_OCP_INT_8822B BIT(5)
937 #define BIT_GPIO15_0_INT_8822B BIT(0)
939 /* 2 REG_GPIO_EXT_CTRL_8822B */
941 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8822B 24
942 #define BIT_MASK_GPIO_MOD_15_TO_8_8822B 0xff
943 #define BIT_GPIO_MOD_15_TO_8_8822B(x) \
944 (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8822B) \
945 << BIT_SHIFT_GPIO_MOD_15_TO_8_8822B)
946 #define BIT_GET_GPIO_MOD_15_TO_8_8822B(x) \
947 (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8822B) & \
948 BIT_MASK_GPIO_MOD_15_TO_8_8822B)
950 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B 16
951 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B 0xff
952 #define BIT_GPIO_IO_SEL_15_TO_8_8822B(x) \
953 (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B) \
954 << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B)
955 #define BIT_GET_GPIO_IO_SEL_15_TO_8_8822B(x) \
956 (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B) & \
957 BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B)
959 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8822B 8
960 #define BIT_MASK_GPIO_OUT_15_TO_8_8822B 0xff
961 #define BIT_GPIO_OUT_15_TO_8_8822B(x) \
962 (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8822B) \
963 << BIT_SHIFT_GPIO_OUT_15_TO_8_8822B)
964 #define BIT_GET_GPIO_OUT_15_TO_8_8822B(x) \
965 (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8822B) & \
966 BIT_MASK_GPIO_OUT_15_TO_8_8822B)
968 #define BIT_SHIFT_GPIO_IN_15_TO_8_8822B 0
969 #define BIT_MASK_GPIO_IN_15_TO_8_8822B 0xff
970 #define BIT_GPIO_IN_15_TO_8_8822B(x) \
971 (((x) & BIT_MASK_GPIO_IN_15_TO_8_8822B) \
972 << BIT_SHIFT_GPIO_IN_15_TO_8_8822B)
973 #define BIT_GET_GPIO_IN_15_TO_8_8822B(x) \
974 (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8822B) & \
975 BIT_MASK_GPIO_IN_15_TO_8_8822B)
977 /* 2 REG_PAD_CTRL1_8822B */
978 #define BIT_PAPE_WLBT_SEL_8822B BIT(29)
979 #define BIT_LNAON_WLBT_SEL_8822B BIT(28)
980 #define BIT_BTGP_GPG3_FEN_8822B BIT(26)
981 #define BIT_BTGP_GPG2_FEN_8822B BIT(25)
982 #define BIT_BTGP_JTAG_EN_8822B BIT(24)
983 #define BIT_XTAL_CLK_EXTARNAL_EN_8822B BIT(23)
984 #define BIT_BTGP_UART0_EN_8822B BIT(22)
985 #define BIT_BTGP_UART1_EN_8822B BIT(21)
986 #define BIT_BTGP_SPI_EN_8822B BIT(20)
987 #define BIT_BTGP_GPIO_E2_8822B BIT(19)
988 #define BIT_BTGP_GPIO_EN_8822B BIT(18)
990 #define BIT_SHIFT_BTGP_GPIO_SL_8822B 16
991 #define BIT_MASK_BTGP_GPIO_SL_8822B 0x3
992 #define BIT_BTGP_GPIO_SL_8822B(x) \
993 (((x) & BIT_MASK_BTGP_GPIO_SL_8822B) << BIT_SHIFT_BTGP_GPIO_SL_8822B)
994 #define BIT_GET_BTGP_GPIO_SL_8822B(x) \
995 (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8822B) & BIT_MASK_BTGP_GPIO_SL_8822B)
997 #define BIT_PAD_SDIO_SR_8822B BIT(14)
998 #define BIT_GPIO14_OUTPUT_PL_8822B BIT(13)
999 #define BIT_HOST_WAKE_PAD_PULL_EN_8822B BIT(12)
1000 #define BIT_HOST_WAKE_PAD_SL_8822B BIT(11)
1001 #define BIT_PAD_LNAON_SR_8822B BIT(10)
1002 #define BIT_PAD_LNAON_E2_8822B BIT(9)
1003 #define BIT_SW_LNAON_G_SEL_DATA_8822B BIT(8)
1004 #define BIT_SW_LNAON_A_SEL_DATA_8822B BIT(7)
1005 #define BIT_PAD_PAPE_SR_8822B BIT(6)
1006 #define BIT_PAD_PAPE_E2_8822B BIT(5)
1007 #define BIT_SW_PAPE_G_SEL_DATA_8822B BIT(4)
1008 #define BIT_SW_PAPE_A_SEL_DATA_8822B BIT(3)
1009 #define BIT_PAD_DPDT_SR_8822B BIT(2)
1010 #define BIT_PAD_DPDT_PAD_E2_8822B BIT(1)
1011 #define BIT_SW_DPDT_SEL_DATA_8822B BIT(0)
1013 /* 2 REG_WL_BT_PWR_CTRL_8822B */
1014 #define BIT_ISO_BD2PP_8822B BIT(31)
1015 #define BIT_LDOV12B_EN_8822B BIT(30)
1016 #define BIT_CKEN_BTGPS_8822B BIT(29)
1017 #define BIT_FEN_BTGPS_8822B BIT(28)
1018 #define BIT_BTCPU_BOOTSEL_8822B BIT(27)
1019 #define BIT_SPI_SPEEDUP_8822B BIT(26)
1020 #define BIT_DEVWAKE_PAD_TYPE_SEL_8822B BIT(24)
1021 #define BIT_CLKREQ_PAD_TYPE_SEL_8822B BIT(23)
1022 #define BIT_ISO_BTPON2PP_8822B BIT(22)
1023 #define BIT_BT_HWROF_EN_8822B BIT(19)
1024 #define BIT_BT_FUNC_EN_8822B BIT(18)
1025 #define BIT_BT_HWPDN_SL_8822B BIT(17)
1026 #define BIT_BT_DISN_EN_8822B BIT(16)
1027 #define BIT_BT_PDN_PULL_EN_8822B BIT(15)
1028 #define BIT_WL_PDN_PULL_EN_8822B BIT(14)
1029 #define BIT_EXTERNAL_REQUEST_PL_8822B BIT(13)
1030 #define BIT_GPIO0_2_3_PULL_LOW_EN_8822B BIT(12)
1031 #define BIT_ISO_BA2PP_8822B BIT(11)
1032 #define BIT_BT_AFE_LDO_EN_8822B BIT(10)
1033 #define BIT_BT_AFE_PLL_EN_8822B BIT(9)
1034 #define BIT_BT_DIG_CLK_EN_8822B BIT(8)
1035 #define BIT_WL_DRV_EXIST_IDX_8822B BIT(5)
1036 #define BIT_DOP_EHPAD_8822B BIT(4)
1037 #define BIT_WL_HWROF_EN_8822B BIT(3)
1038 #define BIT_WL_FUNC_EN_8822B BIT(2)
1039 #define BIT_WL_HWPDN_SL_8822B BIT(1)
1040 #define BIT_WL_HWPDN_EN_8822B BIT(0)
1042 /* 2 REG_SDM_DEBUG_8822B */
1044 #define BIT_SHIFT_WLCLK_PHASE_8822B 0
1045 #define BIT_MASK_WLCLK_PHASE_8822B 0x1f
1046 #define BIT_WLCLK_PHASE_8822B(x) \
1047 (((x) & BIT_MASK_WLCLK_PHASE_8822B) << BIT_SHIFT_WLCLK_PHASE_8822B)
1048 #define BIT_GET_WLCLK_PHASE_8822B(x) \
1049 (((x) >> BIT_SHIFT_WLCLK_PHASE_8822B) & BIT_MASK_WLCLK_PHASE_8822B)
1051 /* 2 REG_SYS_SDIO_CTRL_8822B */
1052 #define BIT_DBG_GNT_WL_BT_8822B BIT(27)
1053 #define BIT_LTE_MUX_CTRL_PATH_8822B BIT(26)
1054 #define BIT_LTE_COEX_UART_8822B BIT(25)
1055 #define BIT_3W_LTE_WL_GPIO_8822B BIT(24)
1056 #define BIT_SDIO_INT_POLARITY_8822B BIT(19)
1057 #define BIT_SDIO_INT_8822B BIT(18)
1058 #define BIT_SDIO_OFF_EN_8822B BIT(17)
1059 #define BIT_SDIO_ON_EN_8822B BIT(16)
1060 #define BIT_PCIE_WAIT_TIMEOUT_EVENT_8822B BIT(10)
1061 #define BIT_PCIE_WAIT_TIME_8822B BIT(9)
1062 #define BIT_MPCIE_REFCLK_XTAL_SEL_8822B BIT(8)
1064 /* 2 REG_HCI_OPT_CTRL_8822B */
1066 #define BIT_SHIFT_TSFT_SEL_8822B 29
1067 #define BIT_MASK_TSFT_SEL_8822B 0x7
1068 #define BIT_TSFT_SEL_8822B(x) \
1069 (((x) & BIT_MASK_TSFT_SEL_8822B) << BIT_SHIFT_TSFT_SEL_8822B)
1070 #define BIT_GET_TSFT_SEL_8822B(x) \
1071 (((x) >> BIT_SHIFT_TSFT_SEL_8822B) & BIT_MASK_TSFT_SEL_8822B)
1073 #define BIT_USB_HOST_PWR_OFF_EN_8822B BIT(12)
1074 #define BIT_SYM_LPS_BLOCK_EN_8822B BIT(11)
1075 #define BIT_USB_LPM_ACT_EN_8822B BIT(10)
1076 #define BIT_USB_LPM_NY_8822B BIT(9)
1077 #define BIT_USB_SUS_DIS_8822B BIT(8)
1079 #define BIT_SHIFT_SDIO_PAD_E_8822B 5
1080 #define BIT_MASK_SDIO_PAD_E_8822B 0x7
1081 #define BIT_SDIO_PAD_E_8822B(x) \
1082 (((x) & BIT_MASK_SDIO_PAD_E_8822B) << BIT_SHIFT_SDIO_PAD_E_8822B)
1083 #define BIT_GET_SDIO_PAD_E_8822B(x) \
1084 (((x) >> BIT_SHIFT_SDIO_PAD_E_8822B) & BIT_MASK_SDIO_PAD_E_8822B)
1086 #define BIT_USB_LPPLL_EN_8822B BIT(4)
1087 #define BIT_ROP_SW15_8822B BIT(2)
1088 #define BIT_PCI_CKRDY_OPT_8822B BIT(1)
1089 #define BIT_PCI_VAUX_EN_8822B BIT(0)
1091 /* 2 REG_AFE_CTRL4_8822B */
1093 /* 2 REG_LDO_SWR_CTRL_8822B */
1094 #define BIT_ZCD_HW_AUTO_EN_8822B BIT(27)
1095 #define BIT_ZCD_REGSEL_8822B BIT(26)
1097 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B 21
1098 #define BIT_MASK_AUTO_ZCD_IN_CODE_8822B 0x1f
1099 #define BIT_AUTO_ZCD_IN_CODE_8822B(x) \
1100 (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B) \
1101 << BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B)
1102 #define BIT_GET_AUTO_ZCD_IN_CODE_8822B(x) \
1103 (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B) & \
1104 BIT_MASK_AUTO_ZCD_IN_CODE_8822B)
1106 #define BIT_SHIFT_ZCD_CODE_IN_L_8822B 16
1107 #define BIT_MASK_ZCD_CODE_IN_L_8822B 0x1f
1108 #define BIT_ZCD_CODE_IN_L_8822B(x) \
1109 (((x) & BIT_MASK_ZCD_CODE_IN_L_8822B) << BIT_SHIFT_ZCD_CODE_IN_L_8822B)
1110 #define BIT_GET_ZCD_CODE_IN_L_8822B(x) \
1111 (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8822B) & BIT_MASK_ZCD_CODE_IN_L_8822B)
1113 #define BIT_SHIFT_LDO_HV5_DUMMY_8822B 14
1114 #define BIT_MASK_LDO_HV5_DUMMY_8822B 0x3
1115 #define BIT_LDO_HV5_DUMMY_8822B(x) \
1116 (((x) & BIT_MASK_LDO_HV5_DUMMY_8822B) << BIT_SHIFT_LDO_HV5_DUMMY_8822B)
1117 #define BIT_GET_LDO_HV5_DUMMY_8822B(x) \
1118 (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8822B) & BIT_MASK_LDO_HV5_DUMMY_8822B)
1120 #define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B 12
1121 #define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B 0x3
1122 #define BIT_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) \
1123 (((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B) \
1124 << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B)
1125 #define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) \
1126 (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B) & \
1127 BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B)
1129 #define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B 10
1130 #define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B 0x3
1131 #define BIT_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) \
1132 (((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B) \
1133 << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B)
1134 #define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) \
1135 (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B) & \
1136 BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B)
1138 #define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B 8
1139 #define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B 0x3
1140 #define BIT_REG_LOAD33_BIT0_TO_BIT1_8822B(x) \
1141 (((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B) \
1142 << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B)
1143 #define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8822B(x) \
1144 (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B) & \
1145 BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B)
1147 #define BIT_REG_BYPASS_L_8822B BIT(7)
1148 #define BIT_REG_LDOF_L_8822B BIT(6)
1149 #define BIT_REG_TYPE_L_V1_8822B BIT(5)
1150 #define BIT_ARENB_L_8822B BIT(3)
1152 #define BIT_SHIFT_CFC_L_8822B 1
1153 #define BIT_MASK_CFC_L_8822B 0x3
1154 #define BIT_CFC_L_8822B(x) \
1155 (((x) & BIT_MASK_CFC_L_8822B) << BIT_SHIFT_CFC_L_8822B)
1156 #define BIT_GET_CFC_L_8822B(x) \
1157 (((x) >> BIT_SHIFT_CFC_L_8822B) & BIT_MASK_CFC_L_8822B)
1159 #define BIT_REG_OCPS_L_V1_8822B BIT(0)
1161 /* 2 REG_MCUFW_CTRL_8822B */
1163 #define BIT_SHIFT_RPWM_8822B 24
1164 #define BIT_MASK_RPWM_8822B 0xff
1165 #define BIT_RPWM_8822B(x) (((x) & BIT_MASK_RPWM_8822B) << BIT_SHIFT_RPWM_8822B)
1166 #define BIT_GET_RPWM_8822B(x) \
1167 (((x) >> BIT_SHIFT_RPWM_8822B) & BIT_MASK_RPWM_8822B)
1169 #define BIT_ANA_PORT_EN_8822B BIT(22)
1170 #define BIT_MAC_PORT_EN_8822B BIT(21)
1171 #define BIT_BOOT_FSPI_EN_8822B BIT(20)
1172 #define BIT_ROM_DLEN_8822B BIT(19)
1174 #define BIT_SHIFT_ROM_PGE_8822B 16
1175 #define BIT_MASK_ROM_PGE_8822B 0x7
1176 #define BIT_ROM_PGE_8822B(x) \
1177 (((x) & BIT_MASK_ROM_PGE_8822B) << BIT_SHIFT_ROM_PGE_8822B)
1178 #define BIT_GET_ROM_PGE_8822B(x) \
1179 (((x) >> BIT_SHIFT_ROM_PGE_8822B) & BIT_MASK_ROM_PGE_8822B)
1181 #define BIT_FW_INIT_RDY_8822B BIT(15)
1182 #define BIT_FW_DW_RDY_8822B BIT(14)
1184 #define BIT_SHIFT_CPU_CLK_SEL_8822B 12
1185 #define BIT_MASK_CPU_CLK_SEL_8822B 0x3
1186 #define BIT_CPU_CLK_SEL_8822B(x) \
1187 (((x) & BIT_MASK_CPU_CLK_SEL_8822B) << BIT_SHIFT_CPU_CLK_SEL_8822B)
1188 #define BIT_GET_CPU_CLK_SEL_8822B(x) \
1189 (((x) >> BIT_SHIFT_CPU_CLK_SEL_8822B) & BIT_MASK_CPU_CLK_SEL_8822B)
1191 #define BIT_CCLK_CHG_MASK_8822B BIT(11)
1192 #define BIT_EMEM__TXBUF_CHKSUM_OK_8822B BIT(10)
1193 #define BIT_EMEM_TXBUF_DW_RDY_8822B BIT(9)
1194 #define BIT_EMEM_CHKSUM_OK_8822B BIT(8)
1195 #define BIT_EMEM_DW_OK_8822B BIT(7)
1196 #define BIT_DMEM_CHKSUM_OK_8822B BIT(6)
1197 #define BIT_DMEM_DW_OK_8822B BIT(5)
1198 #define BIT_IMEM_CHKSUM_OK_8822B BIT(4)
1199 #define BIT_IMEM_DW_OK_8822B BIT(3)
1200 #define BIT_IMEM_BOOT_LOAD_CHKSUM_OK_8822B BIT(2)
1201 #define BIT_IMEM_BOOT_LOAD_DW_OK_8822B BIT(1)
1202 #define BIT_MCUFWDL_EN_8822B BIT(0)
1204 /* 2 REG_MCU_TST_CFG_8822B */
1206 #define BIT_SHIFT_LBKTST_8822B 0
1207 #define BIT_MASK_LBKTST_8822B 0xffff
1208 #define BIT_LBKTST_8822B(x) \
1209 (((x) & BIT_MASK_LBKTST_8822B) << BIT_SHIFT_LBKTST_8822B)
1210 #define BIT_GET_LBKTST_8822B(x) \
1211 (((x) >> BIT_SHIFT_LBKTST_8822B) & BIT_MASK_LBKTST_8822B)
1213 /* 2 REG_HMEBOX_E0_E1_8822B */
1215 #define BIT_SHIFT_HOST_MSG_E1_8822B 16
1216 #define BIT_MASK_HOST_MSG_E1_8822B 0xffff
1217 #define BIT_HOST_MSG_E1_8822B(x) \
1218 (((x) & BIT_MASK_HOST_MSG_E1_8822B) << BIT_SHIFT_HOST_MSG_E1_8822B)
1219 #define BIT_GET_HOST_MSG_E1_8822B(x) \
1220 (((x) >> BIT_SHIFT_HOST_MSG_E1_8822B) & BIT_MASK_HOST_MSG_E1_8822B)
1222 #define BIT_SHIFT_HOST_MSG_E0_8822B 0
1223 #define BIT_MASK_HOST_MSG_E0_8822B 0xffff
1224 #define BIT_HOST_MSG_E0_8822B(x) \
1225 (((x) & BIT_MASK_HOST_MSG_E0_8822B) << BIT_SHIFT_HOST_MSG_E0_8822B)
1226 #define BIT_GET_HOST_MSG_E0_8822B(x) \
1227 (((x) >> BIT_SHIFT_HOST_MSG_E0_8822B) & BIT_MASK_HOST_MSG_E0_8822B)
1229 /* 2 REG_HMEBOX_E2_E3_8822B */
1231 #define BIT_SHIFT_HOST_MSG_E3_8822B 16
1232 #define BIT_MASK_HOST_MSG_E3_8822B 0xffff
1233 #define BIT_HOST_MSG_E3_8822B(x) \
1234 (((x) & BIT_MASK_HOST_MSG_E3_8822B) << BIT_SHIFT_HOST_MSG_E3_8822B)
1235 #define BIT_GET_HOST_MSG_E3_8822B(x) \
1236 (((x) >> BIT_SHIFT_HOST_MSG_E3_8822B) & BIT_MASK_HOST_MSG_E3_8822B)
1238 #define BIT_SHIFT_HOST_MSG_E2_8822B 0
1239 #define BIT_MASK_HOST_MSG_E2_8822B 0xffff
1240 #define BIT_HOST_MSG_E2_8822B(x) \
1241 (((x) & BIT_MASK_HOST_MSG_E2_8822B) << BIT_SHIFT_HOST_MSG_E2_8822B)
1242 #define BIT_GET_HOST_MSG_E2_8822B(x) \
1243 (((x) >> BIT_SHIFT_HOST_MSG_E2_8822B) & BIT_MASK_HOST_MSG_E2_8822B)
1245 /* 2 REG_WLLPS_CTRL_8822B */
1246 #define BIT_WLLPSOP_EABM_8822B BIT(31)
1247 #define BIT_WLLPSOP_ACKF_8822B BIT(30)
1248 #define BIT_WLLPSOP_DLDM_8822B BIT(29)
1249 #define BIT_WLLPSOP_ESWR_8822B BIT(28)
1250 #define BIT_WLLPSOP_PWMM_8822B BIT(27)
1251 #define BIT_WLLPSOP_EECK_8822B BIT(26)
1252 #define BIT_WLLPSOP_WLMACOFF_8822B BIT(25)
1253 #define BIT_WLLPSOP_EXTAL_8822B BIT(24)
1254 #define BIT_WL_SYNPON_VOLTSPDN_8822B BIT(23)
1255 #define BIT_WLLPSOP_WLBBOFF_8822B BIT(22)
1256 #define BIT_WLLPSOP_WLMEM_DS_8822B BIT(21)
1258 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B 12
1259 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B 0xf
1260 #define BIT_LPLDH12_VADJ_STEP_DN_8822B(x) \
1261 (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B) \
1262 << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B)
1263 #define BIT_GET_LPLDH12_VADJ_STEP_DN_8822B(x) \
1264 (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B) & \
1265 BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B)
1267 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B 8
1268 #define BIT_MASK_V15ADJ_L1_STEP_DN_8822B 0x7
1269 #define BIT_V15ADJ_L1_STEP_DN_8822B(x) \
1270 (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B) \
1271 << BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B)
1272 #define BIT_GET_V15ADJ_L1_STEP_DN_8822B(x) \
1273 (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B) & \
1274 BIT_MASK_V15ADJ_L1_STEP_DN_8822B)
1276 #define BIT_REGU_32K_CLK_EN_8822B BIT(1)
1277 #define BIT_WL_LPS_EN_8822B BIT(0)
1279 /* 2 REG_AFE_CTRL5_8822B */
1280 #define BIT_BB_DBG_SEL_AFE_SDM_BIT0_8822B BIT(31)
1281 #define BIT_ORDER_SDM_8822B BIT(30)
1282 #define BIT_RFE_SEL_SDM_8822B BIT(29)
1284 #define BIT_SHIFT_REF_SEL_8822B 25
1285 #define BIT_MASK_REF_SEL_8822B 0xf
1286 #define BIT_REF_SEL_8822B(x) \
1287 (((x) & BIT_MASK_REF_SEL_8822B) << BIT_SHIFT_REF_SEL_8822B)
1288 #define BIT_GET_REF_SEL_8822B(x) \
1289 (((x) >> BIT_SHIFT_REF_SEL_8822B) & BIT_MASK_REF_SEL_8822B)
1291 #define BIT_SHIFT_F0F_SDM_8822B 12
1292 #define BIT_MASK_F0F_SDM_8822B 0x1fff
1293 #define BIT_F0F_SDM_8822B(x) \
1294 (((x) & BIT_MASK_F0F_SDM_8822B) << BIT_SHIFT_F0F_SDM_8822B)
1295 #define BIT_GET_F0F_SDM_8822B(x) \
1296 (((x) >> BIT_SHIFT_F0F_SDM_8822B) & BIT_MASK_F0F_SDM_8822B)
1298 #define BIT_SHIFT_F0N_SDM_8822B 9
1299 #define BIT_MASK_F0N_SDM_8822B 0x7
1300 #define BIT_F0N_SDM_8822B(x) \
1301 (((x) & BIT_MASK_F0N_SDM_8822B) << BIT_SHIFT_F0N_SDM_8822B)
1302 #define BIT_GET_F0N_SDM_8822B(x) \
1303 (((x) >> BIT_SHIFT_F0N_SDM_8822B) & BIT_MASK_F0N_SDM_8822B)
1305 #define BIT_SHIFT_DIVN_SDM_8822B 3
1306 #define BIT_MASK_DIVN_SDM_8822B 0x3f
1307 #define BIT_DIVN_SDM_8822B(x) \
1308 (((x) & BIT_MASK_DIVN_SDM_8822B) << BIT_SHIFT_DIVN_SDM_8822B)
1309 #define BIT_GET_DIVN_SDM_8822B(x) \
1310 (((x) >> BIT_SHIFT_DIVN_SDM_8822B) & BIT_MASK_DIVN_SDM_8822B)
1312 /* 2 REG_GPIO_DEBOUNCE_CTRL_8822B */
1313 #define BIT_WLGP_DBC1EN_8822B BIT(15)
1315 #define BIT_SHIFT_WLGP_DBC1_8822B 8
1316 #define BIT_MASK_WLGP_DBC1_8822B 0xf
1317 #define BIT_WLGP_DBC1_8822B(x) \
1318 (((x) & BIT_MASK_WLGP_DBC1_8822B) << BIT_SHIFT_WLGP_DBC1_8822B)
1319 #define BIT_GET_WLGP_DBC1_8822B(x) \
1320 (((x) >> BIT_SHIFT_WLGP_DBC1_8822B) & BIT_MASK_WLGP_DBC1_8822B)
1322 #define BIT_WLGP_DBC0EN_8822B BIT(7)
1324 #define BIT_SHIFT_WLGP_DBC0_8822B 0
1325 #define BIT_MASK_WLGP_DBC0_8822B 0xf
1326 #define BIT_WLGP_DBC0_8822B(x) \
1327 (((x) & BIT_MASK_WLGP_DBC0_8822B) << BIT_SHIFT_WLGP_DBC0_8822B)
1328 #define BIT_GET_WLGP_DBC0_8822B(x) \
1329 (((x) >> BIT_SHIFT_WLGP_DBC0_8822B) & BIT_MASK_WLGP_DBC0_8822B)
1331 /* 2 REG_RPWM2_8822B */
1333 #define BIT_SHIFT_RPWM2_8822B 16
1334 #define BIT_MASK_RPWM2_8822B 0xffff
1335 #define BIT_RPWM2_8822B(x) \
1336 (((x) & BIT_MASK_RPWM2_8822B) << BIT_SHIFT_RPWM2_8822B)
1337 #define BIT_GET_RPWM2_8822B(x) \
1338 (((x) >> BIT_SHIFT_RPWM2_8822B) & BIT_MASK_RPWM2_8822B)
1340 /* 2 REG_SYSON_FSM_MON_8822B */
1342 #define BIT_SHIFT_FSM_MON_SEL_8822B 24
1343 #define BIT_MASK_FSM_MON_SEL_8822B 0x7
1344 #define BIT_FSM_MON_SEL_8822B(x) \
1345 (((x) & BIT_MASK_FSM_MON_SEL_8822B) << BIT_SHIFT_FSM_MON_SEL_8822B)
1346 #define BIT_GET_FSM_MON_SEL_8822B(x) \
1347 (((x) >> BIT_SHIFT_FSM_MON_SEL_8822B) & BIT_MASK_FSM_MON_SEL_8822B)
1349 #define BIT_DOP_ELDO_8822B BIT(23)
1350 #define BIT_FSM_MON_UPD_8822B BIT(15)
1352 #define BIT_SHIFT_FSM_PAR_8822B 0
1353 #define BIT_MASK_FSM_PAR_8822B 0x7fff
1354 #define BIT_FSM_PAR_8822B(x) \
1355 (((x) & BIT_MASK_FSM_PAR_8822B) << BIT_SHIFT_FSM_PAR_8822B)
1356 #define BIT_GET_FSM_PAR_8822B(x) \
1357 (((x) >> BIT_SHIFT_FSM_PAR_8822B) & BIT_MASK_FSM_PAR_8822B)
1359 /* 2 REG_AFE_CTRL6_8822B */
1361 #define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0
1362 #define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0x7
1363 #define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) \
1364 (((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) \
1365 << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
1366 #define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) \
1367 (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) & \
1368 BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
1370 /* 2 REG_PMC_DBG_CTRL1_8822B */
1371 #define BIT_BT_INT_EN_8822B BIT(31)
1373 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B 16
1374 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8822B 0x7fff
1375 #define BIT_RD_WR_WIFI_BT_INFO_8822B(x) \
1376 (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B) \
1377 << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B)
1378 #define BIT_GET_RD_WR_WIFI_BT_INFO_8822B(x) \
1379 (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B) & \
1380 BIT_MASK_RD_WR_WIFI_BT_INFO_8822B)
1382 #define BIT_PMC_WR_OVF_8822B BIT(8)
1384 #define BIT_SHIFT_WLPMC_ERRINT_8822B 0
1385 #define BIT_MASK_WLPMC_ERRINT_8822B 0xff
1386 #define BIT_WLPMC_ERRINT_8822B(x) \
1387 (((x) & BIT_MASK_WLPMC_ERRINT_8822B) << BIT_SHIFT_WLPMC_ERRINT_8822B)
1388 #define BIT_GET_WLPMC_ERRINT_8822B(x) \
1389 (((x) >> BIT_SHIFT_WLPMC_ERRINT_8822B) & BIT_MASK_WLPMC_ERRINT_8822B)
1391 /* 2 REG_AFE_CTRL7_8822B */
1393 #define BIT_SHIFT_SEL_V_8822B 30
1394 #define BIT_MASK_SEL_V_8822B 0x3
1395 #define BIT_SEL_V_8822B(x) \
1396 (((x) & BIT_MASK_SEL_V_8822B) << BIT_SHIFT_SEL_V_8822B)
1397 #define BIT_GET_SEL_V_8822B(x) \
1398 (((x) >> BIT_SHIFT_SEL_V_8822B) & BIT_MASK_SEL_V_8822B)
1400 #define BIT_SEL_LDO_PC_8822B BIT(29)
1402 #define BIT_SHIFT_CK_MON_SEL_8822B 26
1403 #define BIT_MASK_CK_MON_SEL_8822B 0x7
1404 #define BIT_CK_MON_SEL_8822B(x) \
1405 (((x) & BIT_MASK_CK_MON_SEL_8822B) << BIT_SHIFT_CK_MON_SEL_8822B)
1406 #define BIT_GET_CK_MON_SEL_8822B(x) \
1407 (((x) >> BIT_SHIFT_CK_MON_SEL_8822B) & BIT_MASK_CK_MON_SEL_8822B)
1409 #define BIT_CK_MON_EN_8822B BIT(25)
1410 #define BIT_FREF_EDGE_8822B BIT(24)
1411 #define BIT_CK320M_EN_8822B BIT(23)
1412 #define BIT_CK_5M_EN_8822B BIT(22)
1413 #define BIT_TESTEN_8822B BIT(21)
1415 /* 2 REG_HIMR0_8822B */
1416 #define BIT_TIMEOUT_INTERRUPT2_MASK_8822B BIT(31)
1417 #define BIT_TIMEOUT_INTERRUTP1_MASK_8822B BIT(30)
1418 #define BIT_PSTIMEOUT_MSK_8822B BIT(29)
1419 #define BIT_GTINT4_MSK_8822B BIT(28)
1420 #define BIT_GTINT3_MSK_8822B BIT(27)
1421 #define BIT_TXBCN0ERR_MSK_8822B BIT(26)
1422 #define BIT_TXBCN0OK_MSK_8822B BIT(25)
1423 #define BIT_TSF_BIT32_TOGGLE_MSK_8822B BIT(24)
1424 #define BIT_BCNDMAINT0_MSK_8822B BIT(20)
1425 #define BIT_BCNDERR0_MSK_8822B BIT(16)
1426 #define BIT_HSISR_IND_ON_INT_MSK_8822B BIT(15)
1427 #define BIT_BCNDMAINT_E_MSK_8822B BIT(14)
1428 #define BIT_CTWEND_MSK_8822B BIT(12)
1429 #define BIT_HISR1_IND_MSK_8822B BIT(11)
1430 #define BIT_C2HCMD_MSK_8822B BIT(10)
1431 #define BIT_CPWM2_MSK_8822B BIT(9)
1432 #define BIT_CPWM_MSK_8822B BIT(8)
1433 #define BIT_HIGHDOK_MSK_8822B BIT(7)
1434 #define BIT_MGTDOK_MSK_8822B BIT(6)
1435 #define BIT_BKDOK_MSK_8822B BIT(5)
1436 #define BIT_BEDOK_MSK_8822B BIT(4)
1437 #define BIT_VIDOK_MSK_8822B BIT(3)
1438 #define BIT_VODOK_MSK_8822B BIT(2)
1439 #define BIT_RDU_MSK_8822B BIT(1)
1440 #define BIT_RXOK_MSK_8822B BIT(0)
1442 /* 2 REG_HISR0_8822B */
1443 #define BIT_TIMEOUT_INTERRUPT2_8822B BIT(31)
1444 #define BIT_TIMEOUT_INTERRUTP1_8822B BIT(30)
1445 #define BIT_PSTIMEOUT_8822B BIT(29)
1446 #define BIT_GTINT4_8822B BIT(28)
1447 #define BIT_GTINT3_8822B BIT(27)
1448 #define BIT_TXBCN0ERR_8822B BIT(26)
1449 #define BIT_TXBCN0OK_8822B BIT(25)
1450 #define BIT_TSF_BIT32_TOGGLE_8822B BIT(24)
1451 #define BIT_BCNDMAINT0_8822B BIT(20)
1452 #define BIT_BCNDERR0_8822B BIT(16)
1453 #define BIT_HSISR_IND_ON_INT_8822B BIT(15)
1454 #define BIT_BCNDMAINT_E_8822B BIT(14)
1455 #define BIT_CTWEND_8822B BIT(12)
1456 #define BIT_HISR1_IND_INT_8822B BIT(11)
1457 #define BIT_C2HCMD_8822B BIT(10)
1458 #define BIT_CPWM2_8822B BIT(9)
1459 #define BIT_CPWM_8822B BIT(8)
1460 #define BIT_HIGHDOK_8822B BIT(7)
1461 #define BIT_MGTDOK_8822B BIT(6)
1462 #define BIT_BKDOK_8822B BIT(5)
1463 #define BIT_BEDOK_8822B BIT(4)
1464 #define BIT_VIDOK_8822B BIT(3)
1465 #define BIT_VODOK_8822B BIT(2)
1466 #define BIT_RDU_8822B BIT(1)
1467 #define BIT_RXOK_8822B BIT(0)
1469 /* 2 REG_HIMR1_8822B */
1470 #define BIT_TXFIFO_TH_INT_8822B BIT(30)
1471 #define BIT_BTON_STS_UPDATE_MASK_8822B BIT(29)
1472 #define BIT_MCU_ERR_MASK_8822B BIT(28)
1473 #define BIT_BCNDMAINT7__MSK_8822B BIT(27)
1474 #define BIT_BCNDMAINT6__MSK_8822B BIT(26)
1475 #define BIT_BCNDMAINT5__MSK_8822B BIT(25)
1476 #define BIT_BCNDMAINT4__MSK_8822B BIT(24)
1477 #define BIT_BCNDMAINT3_MSK_8822B BIT(23)
1478 #define BIT_BCNDMAINT2_MSK_8822B BIT(22)
1479 #define BIT_BCNDMAINT1_MSK_8822B BIT(21)
1480 #define BIT_BCNDERR7_MSK_8822B BIT(20)
1481 #define BIT_BCNDERR6_MSK_8822B BIT(19)
1482 #define BIT_BCNDERR5_MSK_8822B BIT(18)
1483 #define BIT_BCNDERR4_MSK_8822B BIT(17)
1484 #define BIT_BCNDERR3_MSK_8822B BIT(16)
1485 #define BIT_BCNDERR2_MSK_8822B BIT(15)
1486 #define BIT_BCNDERR1_MSK_8822B BIT(14)
1487 #define BIT_ATIMEND_E_MSK_8822B BIT(13)
1488 #define BIT_ATIMEND__MSK_8822B BIT(12)
1489 #define BIT_TXERR_MSK_8822B BIT(11)
1490 #define BIT_RXERR_MSK_8822B BIT(10)
1491 #define BIT_TXFOVW_MSK_8822B BIT(9)
1492 #define BIT_FOVW_MSK_8822B BIT(8)
1493 #define BIT_CPU_MGQ_TXDONE_MSK_8822B BIT(5)
1494 #define BIT_PS_TIMER_C_MSK_8822B BIT(4)
1495 #define BIT_PS_TIMER_B_MSK_8822B BIT(3)
1496 #define BIT_PS_TIMER_A_MSK_8822B BIT(2)
1497 #define BIT_CPUMGQ_TX_TIMER_MSK_8822B BIT(1)
1499 /* 2 REG_HISR1_8822B */
1500 #define BIT_TXFIFO_TH_INT_8822B BIT(30)
1501 #define BIT_BTON_STS_UPDATE_INT_8822B BIT(29)
1502 #define BIT_MCU_ERR_8822B BIT(28)
1503 #define BIT_BCNDMAINT7_8822B BIT(27)
1504 #define BIT_BCNDMAINT6_8822B BIT(26)
1505 #define BIT_BCNDMAINT5_8822B BIT(25)
1506 #define BIT_BCNDMAINT4_8822B BIT(24)
1507 #define BIT_BCNDMAINT3_8822B BIT(23)
1508 #define BIT_BCNDMAINT2_8822B BIT(22)
1509 #define BIT_BCNDMAINT1_8822B BIT(21)
1510 #define BIT_BCNDERR7_8822B BIT(20)
1511 #define BIT_BCNDERR6_8822B BIT(19)
1512 #define BIT_BCNDERR5_8822B BIT(18)
1513 #define BIT_BCNDERR4_8822B BIT(17)
1514 #define BIT_BCNDERR3_8822B BIT(16)
1515 #define BIT_BCNDERR2_8822B BIT(15)
1516 #define BIT_BCNDERR1_8822B BIT(14)
1517 #define BIT_ATIMEND_E_8822B BIT(13)
1518 #define BIT_ATIMEND_8822B BIT(12)
1519 #define BIT_TXERR_INT_8822B BIT(11)
1520 #define BIT_RXERR_INT_8822B BIT(10)
1521 #define BIT_TXFOVW_8822B BIT(9)
1522 #define BIT_FOVW_8822B BIT(8)
1523 #define BIT_CPU_MGQ_TXDONE_8822B BIT(5)
1524 #define BIT_PS_TIMER_C_8822B BIT(4)
1525 #define BIT_PS_TIMER_B_8822B BIT(3)
1526 #define BIT_PS_TIMER_A_8822B BIT(2)
1527 #define BIT_CPUMGQ_TX_TIMER_8822B BIT(1)
1529 /* 2 REG_DBG_PORT_SEL_8822B */
1531 #define BIT_SHIFT_DEBUG_ST_8822B 0
1532 #define BIT_MASK_DEBUG_ST_8822B 0xffffffffL
1533 #define BIT_DEBUG_ST_8822B(x) \
1534 (((x) & BIT_MASK_DEBUG_ST_8822B) << BIT_SHIFT_DEBUG_ST_8822B)
1535 #define BIT_GET_DEBUG_ST_8822B(x) \
1536 (((x) >> BIT_SHIFT_DEBUG_ST_8822B) & BIT_MASK_DEBUG_ST_8822B)
1538 /* 2 REG_PAD_CTRL2_8822B */
1539 #define BIT_USB3_USB2_TRANSITION_8822B BIT(20)
1541 #define BIT_SHIFT_USB23_SW_MODE_V1_8822B 18
1542 #define BIT_MASK_USB23_SW_MODE_V1_8822B 0x3
1543 #define BIT_USB23_SW_MODE_V1_8822B(x) \
1544 (((x) & BIT_MASK_USB23_SW_MODE_V1_8822B) \
1545 << BIT_SHIFT_USB23_SW_MODE_V1_8822B)
1546 #define BIT_GET_USB23_SW_MODE_V1_8822B(x) \
1547 (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8822B) & \
1548 BIT_MASK_USB23_SW_MODE_V1_8822B)
1550 #define BIT_NO_PDN_CHIPOFF_V1_8822B BIT(17)
1551 #define BIT_RSM_EN_V1_8822B BIT(16)
1553 #define BIT_SHIFT_MATCH_CNT_8822B 8
1554 #define BIT_MASK_MATCH_CNT_8822B 0xff
1555 #define BIT_MATCH_CNT_8822B(x) \
1556 (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
1557 #define BIT_GET_MATCH_CNT_8822B(x) \
1558 (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
1560 #define BIT_LD_B12V_EN_8822B BIT(7)
1561 #define BIT_EECS_IOSEL_V1_8822B BIT(6)
1562 #define BIT_EECS_DATA_O_V1_8822B BIT(5)
1563 #define BIT_EECS_DATA_I_V1_8822B BIT(4)
1564 #define BIT_EESK_IOSEL_V1_8822B BIT(2)
1565 #define BIT_EESK_DATA_O_V1_8822B BIT(1)
1566 #define BIT_EESK_DATA_I_V1_8822B BIT(0)
1568 /* 2 REG_NOT_VALID_8822B */
1570 /* 2 REG_PMC_DBG_CTRL2_8822B */
1572 #define BIT_SHIFT_EFUSE_BURN_GNT_8822B 24
1573 #define BIT_MASK_EFUSE_BURN_GNT_8822B 0xff
1574 #define BIT_EFUSE_BURN_GNT_8822B(x) \
1575 (((x) & BIT_MASK_EFUSE_BURN_GNT_8822B) \
1576 << BIT_SHIFT_EFUSE_BURN_GNT_8822B)
1577 #define BIT_GET_EFUSE_BURN_GNT_8822B(x) \
1578 (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8822B) & \
1579 BIT_MASK_EFUSE_BURN_GNT_8822B)
1581 #define BIT_STOP_WL_PMC_8822B BIT(9)
1582 #define BIT_STOP_SYM_PMC_8822B BIT(8)
1583 #define BIT_REG_RST_WLPMC_8822B BIT(5)
1584 #define BIT_REG_RST_PD12N_8822B BIT(4)
1585 #define BIT_SYSON_DIS_WLREG_WRMSK_8822B BIT(3)
1586 #define BIT_SYSON_DIS_PMCREG_WRMSK_8822B BIT(2)
1588 #define BIT_SHIFT_SYSON_REG_ARB_8822B 0
1589 #define BIT_MASK_SYSON_REG_ARB_8822B 0x3
1590 #define BIT_SYSON_REG_ARB_8822B(x) \
1591 (((x) & BIT_MASK_SYSON_REG_ARB_8822B) << BIT_SHIFT_SYSON_REG_ARB_8822B)
1592 #define BIT_GET_SYSON_REG_ARB_8822B(x) \
1593 (((x) >> BIT_SHIFT_SYSON_REG_ARB_8822B) & BIT_MASK_SYSON_REG_ARB_8822B)
1595 /* 2 REG_BIST_CTRL_8822B */
1596 #define BIT_BIST_USB_DIS_8822B BIT(27)
1597 #define BIT_BIST_PCI_DIS_8822B BIT(26)
1598 #define BIT_BIST_BT_DIS_8822B BIT(25)
1599 #define BIT_BIST_WL_DIS_8822B BIT(24)
1601 #define BIT_SHIFT_BIST_RPT_SEL_8822B 16
1602 #define BIT_MASK_BIST_RPT_SEL_8822B 0xf
1603 #define BIT_BIST_RPT_SEL_8822B(x) \
1604 (((x) & BIT_MASK_BIST_RPT_SEL_8822B) << BIT_SHIFT_BIST_RPT_SEL_8822B)
1605 #define BIT_GET_BIST_RPT_SEL_8822B(x) \
1606 (((x) >> BIT_SHIFT_BIST_RPT_SEL_8822B) & BIT_MASK_BIST_RPT_SEL_8822B)
1608 #define BIT_BIST_RESUME_PS_8822B BIT(4)
1609 #define BIT_BIST_RESUME_8822B BIT(3)
1610 #define BIT_BIST_NORMAL_8822B BIT(2)
1611 #define BIT_BIST_RSTN_8822B BIT(1)
1612 #define BIT_BIST_CLK_EN_8822B BIT(0)
1614 /* 2 REG_BIST_RPT_8822B */
1616 #define BIT_SHIFT_MBIST_REPORT_8822B 0
1617 #define BIT_MASK_MBIST_REPORT_8822B 0xffffffffL
1618 #define BIT_MBIST_REPORT_8822B(x) \
1619 (((x) & BIT_MASK_MBIST_REPORT_8822B) << BIT_SHIFT_MBIST_REPORT_8822B)
1620 #define BIT_GET_MBIST_REPORT_8822B(x) \
1621 (((x) >> BIT_SHIFT_MBIST_REPORT_8822B) & BIT_MASK_MBIST_REPORT_8822B)
1623 /* 2 REG_MEM_CTRL_8822B */
1624 #define BIT_UMEM_RME_8822B BIT(31)
1626 #define BIT_SHIFT_BT_SPRAM_8822B 28
1627 #define BIT_MASK_BT_SPRAM_8822B 0x3
1628 #define BIT_BT_SPRAM_8822B(x) \
1629 (((x) & BIT_MASK_BT_SPRAM_8822B) << BIT_SHIFT_BT_SPRAM_8822B)
1630 #define BIT_GET_BT_SPRAM_8822B(x) \
1631 (((x) >> BIT_SHIFT_BT_SPRAM_8822B) & BIT_MASK_BT_SPRAM_8822B)
1633 #define BIT_SHIFT_BT_ROM_8822B 24
1634 #define BIT_MASK_BT_ROM_8822B 0xf
1635 #define BIT_BT_ROM_8822B(x) \
1636 (((x) & BIT_MASK_BT_ROM_8822B) << BIT_SHIFT_BT_ROM_8822B)
1637 #define BIT_GET_BT_ROM_8822B(x) \
1638 (((x) >> BIT_SHIFT_BT_ROM_8822B) & BIT_MASK_BT_ROM_8822B)
1640 #define BIT_SHIFT_PCI_DPRAM_8822B 10
1641 #define BIT_MASK_PCI_DPRAM_8822B 0x3
1642 #define BIT_PCI_DPRAM_8822B(x) \
1643 (((x) & BIT_MASK_PCI_DPRAM_8822B) << BIT_SHIFT_PCI_DPRAM_8822B)
1644 #define BIT_GET_PCI_DPRAM_8822B(x) \
1645 (((x) >> BIT_SHIFT_PCI_DPRAM_8822B) & BIT_MASK_PCI_DPRAM_8822B)
1647 #define BIT_SHIFT_PCI_SPRAM_8822B 8
1648 #define BIT_MASK_PCI_SPRAM_8822B 0x3
1649 #define BIT_PCI_SPRAM_8822B(x) \
1650 (((x) & BIT_MASK_PCI_SPRAM_8822B) << BIT_SHIFT_PCI_SPRAM_8822B)
1651 #define BIT_GET_PCI_SPRAM_8822B(x) \
1652 (((x) >> BIT_SHIFT_PCI_SPRAM_8822B) & BIT_MASK_PCI_SPRAM_8822B)
1654 #define BIT_SHIFT_USB_SPRAM_8822B 6
1655 #define BIT_MASK_USB_SPRAM_8822B 0x3
1656 #define BIT_USB_SPRAM_8822B(x) \
1657 (((x) & BIT_MASK_USB_SPRAM_8822B) << BIT_SHIFT_USB_SPRAM_8822B)
1658 #define BIT_GET_USB_SPRAM_8822B(x) \
1659 (((x) >> BIT_SHIFT_USB_SPRAM_8822B) & BIT_MASK_USB_SPRAM_8822B)
1661 #define BIT_SHIFT_USB_SPRF_8822B 4
1662 #define BIT_MASK_USB_SPRF_8822B 0x3
1663 #define BIT_USB_SPRF_8822B(x) \
1664 (((x) & BIT_MASK_USB_SPRF_8822B) << BIT_SHIFT_USB_SPRF_8822B)
1665 #define BIT_GET_USB_SPRF_8822B(x) \
1666 (((x) >> BIT_SHIFT_USB_SPRF_8822B) & BIT_MASK_USB_SPRF_8822B)
1668 #define BIT_SHIFT_MCU_ROM_8822B 0
1669 #define BIT_MASK_MCU_ROM_8822B 0xf
1670 #define BIT_MCU_ROM_8822B(x) \
1671 (((x) & BIT_MASK_MCU_ROM_8822B) << BIT_SHIFT_MCU_ROM_8822B)
1672 #define BIT_GET_MCU_ROM_8822B(x) \
1673 (((x) >> BIT_SHIFT_MCU_ROM_8822B) & BIT_MASK_MCU_ROM_8822B)
1675 /* 2 REG_AFE_CTRL8_8822B */
1676 #define BIT_SYN_AGPIO_8822B BIT(20)
1677 #define BIT_XTAL_LP_8822B BIT(4)
1678 #define BIT_XTAL_GM_SEP_8822B BIT(3)
1680 #define BIT_SHIFT_XTAL_SEL_TOK_8822B 0
1681 #define BIT_MASK_XTAL_SEL_TOK_8822B 0x7
1682 #define BIT_XTAL_SEL_TOK_8822B(x) \
1683 (((x) & BIT_MASK_XTAL_SEL_TOK_8822B) << BIT_SHIFT_XTAL_SEL_TOK_8822B)
1684 #define BIT_GET_XTAL_SEL_TOK_8822B(x) \
1685 (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8822B) & BIT_MASK_XTAL_SEL_TOK_8822B)
1687 /* 2 REG_USB_SIE_INTF_8822B */
1688 #define BIT_RD_SEL_8822B BIT(31)
1689 #define BIT_USB_SIE_INTF_WE_V1_8822B BIT(30)
1690 #define BIT_USB_SIE_INTF_BYIOREG_V1_8822B BIT(29)
1691 #define BIT_USB_SIE_SELECT_8822B BIT(28)
1693 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B 16
1694 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B 0x1ff
1695 #define BIT_USB_SIE_INTF_ADDR_V1_8822B(x) \
1696 (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B) \
1697 << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B)
1698 #define BIT_GET_USB_SIE_INTF_ADDR_V1_8822B(x) \
1699 (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B) & \
1700 BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B)
1702 #define BIT_SHIFT_USB_SIE_INTF_RD_8822B 8
1703 #define BIT_MASK_USB_SIE_INTF_RD_8822B 0xff
1704 #define BIT_USB_SIE_INTF_RD_8822B(x) \
1705 (((x) & BIT_MASK_USB_SIE_INTF_RD_8822B) \
1706 << BIT_SHIFT_USB_SIE_INTF_RD_8822B)
1707 #define BIT_GET_USB_SIE_INTF_RD_8822B(x) \
1708 (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8822B) & \
1709 BIT_MASK_USB_SIE_INTF_RD_8822B)
1711 #define BIT_SHIFT_USB_SIE_INTF_WD_8822B 0
1712 #define BIT_MASK_USB_SIE_INTF_WD_8822B 0xff
1713 #define BIT_USB_SIE_INTF_WD_8822B(x) \
1714 (((x) & BIT_MASK_USB_SIE_INTF_WD_8822B) \
1715 << BIT_SHIFT_USB_SIE_INTF_WD_8822B)
1716 #define BIT_GET_USB_SIE_INTF_WD_8822B(x) \
1717 (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8822B) & \
1718 BIT_MASK_USB_SIE_INTF_WD_8822B)
1720 /* 2 REG_PCIE_MIO_INTF_8822B */
1721 #define BIT_PCIE_MIO_BYIOREG_8822B BIT(13)
1722 #define BIT_PCIE_MIO_RE_8822B BIT(12)
1724 #define BIT_SHIFT_PCIE_MIO_WE_8822B 8
1725 #define BIT_MASK_PCIE_MIO_WE_8822B 0xf
1726 #define BIT_PCIE_MIO_WE_8822B(x) \
1727 (((x) & BIT_MASK_PCIE_MIO_WE_8822B) << BIT_SHIFT_PCIE_MIO_WE_8822B)
1728 #define BIT_GET_PCIE_MIO_WE_8822B(x) \
1729 (((x) >> BIT_SHIFT_PCIE_MIO_WE_8822B) & BIT_MASK_PCIE_MIO_WE_8822B)
1731 #define BIT_SHIFT_PCIE_MIO_ADDR_8822B 0
1732 #define BIT_MASK_PCIE_MIO_ADDR_8822B 0xff
1733 #define BIT_PCIE_MIO_ADDR_8822B(x) \
1734 (((x) & BIT_MASK_PCIE_MIO_ADDR_8822B) << BIT_SHIFT_PCIE_MIO_ADDR_8822B)
1735 #define BIT_GET_PCIE_MIO_ADDR_8822B(x) \
1736 (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8822B) & BIT_MASK_PCIE_MIO_ADDR_8822B)
1738 /* 2 REG_PCIE_MIO_INTD_8822B */
1740 #define BIT_SHIFT_PCIE_MIO_DATA_8822B 0
1741 #define BIT_MASK_PCIE_MIO_DATA_8822B 0xffffffffL
1742 #define BIT_PCIE_MIO_DATA_8822B(x) \
1743 (((x) & BIT_MASK_PCIE_MIO_DATA_8822B) << BIT_SHIFT_PCIE_MIO_DATA_8822B)
1744 #define BIT_GET_PCIE_MIO_DATA_8822B(x) \
1745 (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8822B) & BIT_MASK_PCIE_MIO_DATA_8822B)
1747 /* 2 REG_WLRF1_8822B */
1749 #define BIT_SHIFT_WLRF1_CTRL_8822B 24
1750 #define BIT_MASK_WLRF1_CTRL_8822B 0xff
1751 #define BIT_WLRF1_CTRL_8822B(x) \
1752 (((x) & BIT_MASK_WLRF1_CTRL_8822B) << BIT_SHIFT_WLRF1_CTRL_8822B)
1753 #define BIT_GET_WLRF1_CTRL_8822B(x) \
1754 (((x) >> BIT_SHIFT_WLRF1_CTRL_8822B) & BIT_MASK_WLRF1_CTRL_8822B)
1756 /* 2 REG_SYS_CFG1_8822B */
1758 #define BIT_SHIFT_TRP_ICFG_8822B 28
1759 #define BIT_MASK_TRP_ICFG_8822B 0xf
1760 #define BIT_TRP_ICFG_8822B(x) \
1761 (((x) & BIT_MASK_TRP_ICFG_8822B) << BIT_SHIFT_TRP_ICFG_8822B)
1762 #define BIT_GET_TRP_ICFG_8822B(x) \
1763 (((x) >> BIT_SHIFT_TRP_ICFG_8822B) & BIT_MASK_TRP_ICFG_8822B)
1765 #define BIT_RF_TYPE_ID_8822B BIT(27)
1766 #define BIT_BD_HCI_SEL_8822B BIT(26)
1767 #define BIT_BD_PKG_SEL_8822B BIT(25)
1768 #define BIT_SPSLDO_SEL_8822B BIT(24)
1769 #define BIT_RTL_ID_8822B BIT(23)
1770 #define BIT_PAD_HWPD_IDN_8822B BIT(22)
1771 #define BIT_TESTMODE_8822B BIT(20)
1773 #define BIT_SHIFT_VENDOR_ID_8822B 16
1774 #define BIT_MASK_VENDOR_ID_8822B 0xf
1775 #define BIT_VENDOR_ID_8822B(x) \
1776 (((x) & BIT_MASK_VENDOR_ID_8822B) << BIT_SHIFT_VENDOR_ID_8822B)
1777 #define BIT_GET_VENDOR_ID_8822B(x) \
1778 (((x) >> BIT_SHIFT_VENDOR_ID_8822B) & BIT_MASK_VENDOR_ID_8822B)
1780 #define BIT_SHIFT_CHIP_VER_8822B 12
1781 #define BIT_MASK_CHIP_VER_8822B 0xf
1782 #define BIT_CHIP_VER_8822B(x) \
1783 (((x) & BIT_MASK_CHIP_VER_8822B) << BIT_SHIFT_CHIP_VER_8822B)
1784 #define BIT_GET_CHIP_VER_8822B(x) \
1785 (((x) >> BIT_SHIFT_CHIP_VER_8822B) & BIT_MASK_CHIP_VER_8822B)
1787 #define BIT_BD_MAC3_8822B BIT(11)
1788 #define BIT_BD_MAC1_8822B BIT(10)
1789 #define BIT_BD_MAC2_8822B BIT(9)
1790 #define BIT_SIC_IDLE_8822B BIT(8)
1791 #define BIT_SW_OFFLOAD_EN_8822B BIT(7)
1792 #define BIT_OCP_SHUTDN_8822B BIT(6)
1793 #define BIT_V15_VLD_8822B BIT(5)
1794 #define BIT_PCIRSTB_8822B BIT(4)
1795 #define BIT_PCLK_VLD_8822B BIT(3)
1796 #define BIT_UCLK_VLD_8822B BIT(2)
1797 #define BIT_ACLK_VLD_8822B BIT(1)
1798 #define BIT_XCLK_VLD_8822B BIT(0)
1800 /* 2 REG_SYS_STATUS1_8822B */
1802 #define BIT_SHIFT_RF_RL_ID_8822B 28
1803 #define BIT_MASK_RF_RL_ID_8822B 0xf
1804 #define BIT_RF_RL_ID_8822B(x) \
1805 (((x) & BIT_MASK_RF_RL_ID_8822B) << BIT_SHIFT_RF_RL_ID_8822B)
1806 #define BIT_GET_RF_RL_ID_8822B(x) \
1807 (((x) >> BIT_SHIFT_RF_RL_ID_8822B) & BIT_MASK_RF_RL_ID_8822B)
1809 #define BIT_HPHY_ICFG_8822B BIT(19)
1811 #define BIT_SHIFT_SEL_0XC0_8822B 16
1812 #define BIT_MASK_SEL_0XC0_8822B 0x3
1813 #define BIT_SEL_0XC0_8822B(x) \
1814 (((x) & BIT_MASK_SEL_0XC0_8822B) << BIT_SHIFT_SEL_0XC0_8822B)
1815 #define BIT_GET_SEL_0XC0_8822B(x) \
1816 (((x) >> BIT_SHIFT_SEL_0XC0_8822B) & BIT_MASK_SEL_0XC0_8822B)
1818 #define BIT_SHIFT_HCI_SEL_V3_8822B 12
1819 #define BIT_MASK_HCI_SEL_V3_8822B 0x7
1820 #define BIT_HCI_SEL_V3_8822B(x) \
1821 (((x) & BIT_MASK_HCI_SEL_V3_8822B) << BIT_SHIFT_HCI_SEL_V3_8822B)
1822 #define BIT_GET_HCI_SEL_V3_8822B(x) \
1823 (((x) >> BIT_SHIFT_HCI_SEL_V3_8822B) & BIT_MASK_HCI_SEL_V3_8822B)
1825 #define BIT_USB_OPERATION_MODE_8822B BIT(10)
1826 #define BIT_BT_PDN_8822B BIT(9)
1827 #define BIT_AUTO_WLPON_8822B BIT(8)
1828 #define BIT_WL_MODE_8822B BIT(7)
1829 #define BIT_PKG_SEL_HCI_8822B BIT(6)
1831 #define BIT_SHIFT_PAD_HCI_SEL_V1_8822B 3
1832 #define BIT_MASK_PAD_HCI_SEL_V1_8822B 0x7
1833 #define BIT_PAD_HCI_SEL_V1_8822B(x) \
1834 (((x) & BIT_MASK_PAD_HCI_SEL_V1_8822B) \
1835 << BIT_SHIFT_PAD_HCI_SEL_V1_8822B)
1836 #define BIT_GET_PAD_HCI_SEL_V1_8822B(x) \
1837 (((x) >> BIT_SHIFT_PAD_HCI_SEL_V1_8822B) & \
1838 BIT_MASK_PAD_HCI_SEL_V1_8822B)
1840 #define BIT_SHIFT_EFS_HCI_SEL_V1_8822B 0
1841 #define BIT_MASK_EFS_HCI_SEL_V1_8822B 0x7
1842 #define BIT_EFS_HCI_SEL_V1_8822B(x) \
1843 (((x) & BIT_MASK_EFS_HCI_SEL_V1_8822B) \
1844 << BIT_SHIFT_EFS_HCI_SEL_V1_8822B)
1845 #define BIT_GET_EFS_HCI_SEL_V1_8822B(x) \
1846 (((x) >> BIT_SHIFT_EFS_HCI_SEL_V1_8822B) & \
1847 BIT_MASK_EFS_HCI_SEL_V1_8822B)
1849 /* 2 REG_SYS_STATUS2_8822B */
1850 #define BIT_SIO_ALDN_8822B BIT(19)
1851 #define BIT_USB_ALDN_8822B BIT(18)
1852 #define BIT_PCI_ALDN_8822B BIT(17)
1853 #define BIT_SYS_ALDN_8822B BIT(16)
1855 #define BIT_SHIFT_EPVID1_8822B 8
1856 #define BIT_MASK_EPVID1_8822B 0xff
1857 #define BIT_EPVID1_8822B(x) \
1858 (((x) & BIT_MASK_EPVID1_8822B) << BIT_SHIFT_EPVID1_8822B)
1859 #define BIT_GET_EPVID1_8822B(x) \
1860 (((x) >> BIT_SHIFT_EPVID1_8822B) & BIT_MASK_EPVID1_8822B)
1862 #define BIT_SHIFT_EPVID0_8822B 0
1863 #define BIT_MASK_EPVID0_8822B 0xff
1864 #define BIT_EPVID0_8822B(x) \
1865 (((x) & BIT_MASK_EPVID0_8822B) << BIT_SHIFT_EPVID0_8822B)
1866 #define BIT_GET_EPVID0_8822B(x) \
1867 (((x) >> BIT_SHIFT_EPVID0_8822B) & BIT_MASK_EPVID0_8822B)
1869 /* 2 REG_SYS_CFG2_8822B */
1870 #define BIT_HCI_SEL_EMBEDDED_8822B BIT(8)
1872 #define BIT_SHIFT_HW_ID_8822B 0
1873 #define BIT_MASK_HW_ID_8822B 0xff
1874 #define BIT_HW_ID_8822B(x) \
1875 (((x) & BIT_MASK_HW_ID_8822B) << BIT_SHIFT_HW_ID_8822B)
1876 #define BIT_GET_HW_ID_8822B(x) \
1877 (((x) >> BIT_SHIFT_HW_ID_8822B) & BIT_MASK_HW_ID_8822B)
1879 /* 2 REG_SYS_CFG3_8822B */
1880 #define BIT_PWC_MA33V_8822B BIT(15)
1881 #define BIT_PWC_MA12V_8822B BIT(14)
1882 #define BIT_PWC_MD12V_8822B BIT(13)
1883 #define BIT_PWC_PD12V_8822B BIT(12)
1884 #define BIT_PWC_UD12V_8822B BIT(11)
1885 #define BIT_ISO_MA2MD_8822B BIT(1)
1886 #define BIT_ISO_MD2PP_8822B BIT(0)
1888 /* 2 REG_SYS_CFG4_8822B */
1890 /* 2 REG_SYS_CFG5_8822B */
1891 #define BIT_LPS_STATUS_8822B BIT(3)
1892 #define BIT_HCI_TXDMA_BUSY_8822B BIT(2)
1893 #define BIT_HCI_TXDMA_ALLOW_8822B BIT(1)
1894 #define BIT_FW_CTRL_HCI_TXDMA_EN_8822B BIT(0)
1896 /* 2 REG_CPU_DMEM_CON_8822B */
1897 #define BIT_WDT_OPT_IOWRAPPER_8822B BIT(19)
1898 #define BIT_ANA_PORT_IDLE_8822B BIT(18)
1899 #define BIT_MAC_PORT_IDLE_8822B BIT(17)
1900 #define BIT_WL_PLATFORM_RST_8822B BIT(16)
1901 #define BIT_WL_SECURITY_CLK_8822B BIT(15)
1903 #define BIT_SHIFT_CPU_DMEM_CON_8822B 0
1904 #define BIT_MASK_CPU_DMEM_CON_8822B 0xff
1905 #define BIT_CPU_DMEM_CON_8822B(x) \
1906 (((x) & BIT_MASK_CPU_DMEM_CON_8822B) << BIT_SHIFT_CPU_DMEM_CON_8822B)
1907 #define BIT_GET_CPU_DMEM_CON_8822B(x) \
1908 (((x) >> BIT_SHIFT_CPU_DMEM_CON_8822B) & BIT_MASK_CPU_DMEM_CON_8822B)
1910 /* 2 REG_BOOT_REASON_8822B */
1912 #define BIT_SHIFT_BOOT_REASON_8822B 0
1913 #define BIT_MASK_BOOT_REASON_8822B 0x7
1914 #define BIT_BOOT_REASON_8822B(x) \
1915 (((x) & BIT_MASK_BOOT_REASON_8822B) << BIT_SHIFT_BOOT_REASON_8822B)
1916 #define BIT_GET_BOOT_REASON_8822B(x) \
1917 (((x) >> BIT_SHIFT_BOOT_REASON_8822B) & BIT_MASK_BOOT_REASON_8822B)
1919 /* 2 REG_NFCPAD_CTRL_8822B */
1920 #define BIT_PAD_SHUTDW_8822B BIT(18)
1921 #define BIT_SYSON_NFC_PAD_8822B BIT(17)
1922 #define BIT_NFC_INT_PAD_CTRL_8822B BIT(16)
1923 #define BIT_NFC_RFDIS_PAD_CTRL_8822B BIT(15)
1924 #define BIT_NFC_CLK_PAD_CTRL_8822B BIT(14)
1925 #define BIT_NFC_DATA_PAD_CTRL_8822B BIT(13)
1926 #define BIT_NFC_PAD_PULL_CTRL_8822B BIT(12)
1928 #define BIT_SHIFT_NFCPAD_IO_SEL_8822B 8
1929 #define BIT_MASK_NFCPAD_IO_SEL_8822B 0xf
1930 #define BIT_NFCPAD_IO_SEL_8822B(x) \
1931 (((x) & BIT_MASK_NFCPAD_IO_SEL_8822B) << BIT_SHIFT_NFCPAD_IO_SEL_8822B)
1932 #define BIT_GET_NFCPAD_IO_SEL_8822B(x) \
1933 (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8822B) & BIT_MASK_NFCPAD_IO_SEL_8822B)
1935 #define BIT_SHIFT_NFCPAD_OUT_8822B 4
1936 #define BIT_MASK_NFCPAD_OUT_8822B 0xf
1937 #define BIT_NFCPAD_OUT_8822B(x) \
1938 (((x) & BIT_MASK_NFCPAD_OUT_8822B) << BIT_SHIFT_NFCPAD_OUT_8822B)
1939 #define BIT_GET_NFCPAD_OUT_8822B(x) \
1940 (((x) >> BIT_SHIFT_NFCPAD_OUT_8822B) & BIT_MASK_NFCPAD_OUT_8822B)
1942 #define BIT_SHIFT_NFCPAD_IN_8822B 0
1943 #define BIT_MASK_NFCPAD_IN_8822B 0xf
1944 #define BIT_NFCPAD_IN_8822B(x) \
1945 (((x) & BIT_MASK_NFCPAD_IN_8822B) << BIT_SHIFT_NFCPAD_IN_8822B)
1946 #define BIT_GET_NFCPAD_IN_8822B(x) \
1947 (((x) >> BIT_SHIFT_NFCPAD_IN_8822B) & BIT_MASK_NFCPAD_IN_8822B)
1949 /* 2 REG_HIMR2_8822B */
1950 #define BIT_BCNDMAINT_P4_MSK_8822B BIT(31)
1951 #define BIT_BCNDMAINT_P3_MSK_8822B BIT(30)
1952 #define BIT_BCNDMAINT_P2_MSK_8822B BIT(29)
1953 #define BIT_BCNDMAINT_P1_MSK_8822B BIT(28)
1954 #define BIT_ATIMEND7_MSK_8822B BIT(22)
1955 #define BIT_ATIMEND6_MSK_8822B BIT(21)
1956 #define BIT_ATIMEND5_MSK_8822B BIT(20)
1957 #define BIT_ATIMEND4_MSK_8822B BIT(19)
1958 #define BIT_ATIMEND3_MSK_8822B BIT(18)
1959 #define BIT_ATIMEND2_MSK_8822B BIT(17)
1960 #define BIT_ATIMEND1_MSK_8822B BIT(16)
1961 #define BIT_TXBCN7OK_MSK_8822B BIT(14)
1962 #define BIT_TXBCN6OK_MSK_8822B BIT(13)
1963 #define BIT_TXBCN5OK_MSK_8822B BIT(12)
1964 #define BIT_TXBCN4OK_MSK_8822B BIT(11)
1965 #define BIT_TXBCN3OK_MSK_8822B BIT(10)
1966 #define BIT_TXBCN2OK_MSK_8822B BIT(9)
1967 #define BIT_TXBCN1OK_MSK_V1_8822B BIT(8)
1968 #define BIT_TXBCN7ERR_MSK_8822B BIT(6)
1969 #define BIT_TXBCN6ERR_MSK_8822B BIT(5)
1970 #define BIT_TXBCN5ERR_MSK_8822B BIT(4)
1971 #define BIT_TXBCN4ERR_MSK_8822B BIT(3)
1972 #define BIT_TXBCN3ERR_MSK_8822B BIT(2)
1973 #define BIT_TXBCN2ERR_MSK_8822B BIT(1)
1974 #define BIT_TXBCN1ERR_MSK_V1_8822B BIT(0)
1976 /* 2 REG_HISR2_8822B */
1977 #define BIT_BCNDMAINT_P4_8822B BIT(31)
1978 #define BIT_BCNDMAINT_P3_8822B BIT(30)
1979 #define BIT_BCNDMAINT_P2_8822B BIT(29)
1980 #define BIT_BCNDMAINT_P1_8822B BIT(28)
1981 #define BIT_ATIMEND7_8822B BIT(22)
1982 #define BIT_ATIMEND6_8822B BIT(21)
1983 #define BIT_ATIMEND5_8822B BIT(20)
1984 #define BIT_ATIMEND4_8822B BIT(19)
1985 #define BIT_ATIMEND3_8822B BIT(18)
1986 #define BIT_ATIMEND2_8822B BIT(17)
1987 #define BIT_ATIMEND1_8822B BIT(16)
1988 #define BIT_TXBCN7OK_8822B BIT(14)
1989 #define BIT_TXBCN6OK_8822B BIT(13)
1990 #define BIT_TXBCN5OK_8822B BIT(12)
1991 #define BIT_TXBCN4OK_8822B BIT(11)
1992 #define BIT_TXBCN3OK_8822B BIT(10)
1993 #define BIT_TXBCN2OK_8822B BIT(9)
1994 #define BIT_TXBCN1OK_8822B BIT(8)
1995 #define BIT_TXBCN7ERR_8822B BIT(6)
1996 #define BIT_TXBCN6ERR_8822B BIT(5)
1997 #define BIT_TXBCN5ERR_8822B BIT(4)
1998 #define BIT_TXBCN4ERR_8822B BIT(3)
1999 #define BIT_TXBCN3ERR_8822B BIT(2)
2000 #define BIT_TXBCN2ERR_8822B BIT(1)
2001 #define BIT_TXBCN1ERR_8822B BIT(0)
2003 /* 2 REG_HIMR3_8822B */
2004 #define BIT_WDT_PLATFORM_INT_MSK_8822B BIT(18)
2005 #define BIT_WDT_CPU_INT_MSK_8822B BIT(17)
2006 #define BIT_SETH2CDOK_MASK_8822B BIT(16)
2007 #define BIT_H2C_CMD_FULL_MASK_8822B BIT(15)
2008 #define BIT_PWR_INT_127_MASK_8822B BIT(14)
2009 #define BIT_TXSHORTCUT_TXDESUPDATEOK_MASK_8822B BIT(13)
2010 #define BIT_TXSHORTCUT_BKUPDATEOK_MASK_8822B BIT(12)
2011 #define BIT_TXSHORTCUT_BEUPDATEOK_MASK_8822B BIT(11)
2012 #define BIT_TXSHORTCUT_VIUPDATEOK_MAS_8822B BIT(10)
2013 #define BIT_TXSHORTCUT_VOUPDATEOK_MASK_8822B BIT(9)
2014 #define BIT_PWR_INT_127_MASK_V1_8822B BIT(8)
2015 #define BIT_PWR_INT_126TO96_MASK_8822B BIT(7)
2016 #define BIT_PWR_INT_95TO64_MASK_8822B BIT(6)
2017 #define BIT_PWR_INT_63TO32_MASK_8822B BIT(5)
2018 #define BIT_PWR_INT_31TO0_MASK_8822B BIT(4)
2019 #define BIT_DDMA0_LP_INT_MSK_8822B BIT(1)
2020 #define BIT_DDMA0_HP_INT_MSK_8822B BIT(0)
2022 /* 2 REG_HISR3_8822B */
2023 #define BIT_WDT_PLATFORM_INT_8822B BIT(18)
2024 #define BIT_WDT_CPU_INT_8822B BIT(17)
2025 #define BIT_SETH2CDOK_8822B BIT(16)
2026 #define BIT_H2C_CMD_FULL_8822B BIT(15)
2027 #define BIT_PWR_INT_127_8822B BIT(14)
2028 #define BIT_TXSHORTCUT_TXDESUPDATEOK_8822B BIT(13)
2029 #define BIT_TXSHORTCUT_BKUPDATEOK_8822B BIT(12)
2030 #define BIT_TXSHORTCUT_BEUPDATEOK_8822B BIT(11)
2031 #define BIT_TXSHORTCUT_VIUPDATEOK_8822B BIT(10)
2032 #define BIT_TXSHORTCUT_VOUPDATEOK_8822B BIT(9)
2033 #define BIT_PWR_INT_127_V1_8822B BIT(8)
2034 #define BIT_PWR_INT_126TO96_8822B BIT(7)
2035 #define BIT_PWR_INT_95TO64_8822B BIT(6)
2036 #define BIT_PWR_INT_63TO32_8822B BIT(5)
2037 #define BIT_PWR_INT_31TO0_8822B BIT(4)
2038 #define BIT_DDMA0_LP_INT_8822B BIT(1)
2039 #define BIT_DDMA0_HP_INT_8822B BIT(0)
2041 /* 2 REG_SW_MDIO_8822B */
2042 #define BIT_DIS_TIMEOUT_IO_8822B BIT(24)
2044 /* 2 REG_SW_FLUSH_8822B */
2045 #define BIT_FLUSH_HOLDN_EN_8822B BIT(25)
2046 #define BIT_FLUSH_WR_EN_8822B BIT(24)
2047 #define BIT_SW_FLASH_CONTROL_8822B BIT(23)
2048 #define BIT_SW_FLASH_WEN_E_8822B BIT(19)
2049 #define BIT_SW_FLASH_HOLDN_E_8822B BIT(18)
2050 #define BIT_SW_FLASH_SO_E_8822B BIT(17)
2051 #define BIT_SW_FLASH_SI_E_8822B BIT(16)
2052 #define BIT_SW_FLASH_SK_O_8822B BIT(13)
2053 #define BIT_SW_FLASH_CEN_O_8822B BIT(12)
2054 #define BIT_SW_FLASH_WEN_O_8822B BIT(11)
2055 #define BIT_SW_FLASH_HOLDN_O_8822B BIT(10)
2056 #define BIT_SW_FLASH_SO_O_8822B BIT(9)
2057 #define BIT_SW_FLASH_SI_O_8822B BIT(8)
2058 #define BIT_SW_FLASH_WEN_I_8822B BIT(3)
2059 #define BIT_SW_FLASH_HOLDN_I_8822B BIT(2)
2060 #define BIT_SW_FLASH_SO_I_8822B BIT(1)
2061 #define BIT_SW_FLASH_SI_I_8822B BIT(0)
2063 /* 2 REG_H2C_PKT_READADDR_8822B */
2065 #define BIT_SHIFT_H2C_PKT_READADDR_8822B 0
2066 #define BIT_MASK_H2C_PKT_READADDR_8822B 0x3ffff
2067 #define BIT_H2C_PKT_READADDR_8822B(x) \
2068 (((x) & BIT_MASK_H2C_PKT_READADDR_8822B) \
2069 << BIT_SHIFT_H2C_PKT_READADDR_8822B)
2070 #define BIT_GET_H2C_PKT_READADDR_8822B(x) \
2071 (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8822B) & \
2072 BIT_MASK_H2C_PKT_READADDR_8822B)
2074 /* 2 REG_H2C_PKT_WRITEADDR_8822B */
2076 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8822B 0
2077 #define BIT_MASK_H2C_PKT_WRITEADDR_8822B 0x3ffff
2078 #define BIT_H2C_PKT_WRITEADDR_8822B(x) \
2079 (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8822B) \
2080 << BIT_SHIFT_H2C_PKT_WRITEADDR_8822B)
2081 #define BIT_GET_H2C_PKT_WRITEADDR_8822B(x) \
2082 (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8822B) & \
2083 BIT_MASK_H2C_PKT_WRITEADDR_8822B)
2085 /* 2 REG_MEM_PWR_CRTL_8822B */
2086 #define BIT_MEM_BB_SD_8822B BIT(17)
2087 #define BIT_MEM_BB_DS_8822B BIT(16)
2088 #define BIT_MEM_BT_DS_8822B BIT(10)
2089 #define BIT_MEM_SDIO_LS_8822B BIT(9)
2090 #define BIT_MEM_SDIO_DS_8822B BIT(8)
2091 #define BIT_MEM_USB_LS_8822B BIT(7)
2092 #define BIT_MEM_USB_DS_8822B BIT(6)
2093 #define BIT_MEM_PCI_LS_8822B BIT(5)
2094 #define BIT_MEM_PCI_DS_8822B BIT(4)
2095 #define BIT_MEM_WLMAC_LS_8822B BIT(3)
2096 #define BIT_MEM_WLMAC_DS_8822B BIT(2)
2097 #define BIT_MEM_WLMCU_LS_8822B BIT(1)
2098 #define BIT_MEM_WLMCU_DS_8822B BIT(0)
2100 /* 2 REG_FW_DBG0_8822B */
2102 #define BIT_SHIFT_FW_DBG0_8822B 0
2103 #define BIT_MASK_FW_DBG0_8822B 0xffffffffL
2104 #define BIT_FW_DBG0_8822B(x) \
2105 (((x) & BIT_MASK_FW_DBG0_8822B) << BIT_SHIFT_FW_DBG0_8822B)
2106 #define BIT_GET_FW_DBG0_8822B(x) \
2107 (((x) >> BIT_SHIFT_FW_DBG0_8822B) & BIT_MASK_FW_DBG0_8822B)
2109 /* 2 REG_FW_DBG1_8822B */
2111 #define BIT_SHIFT_FW_DBG1_8822B 0
2112 #define BIT_MASK_FW_DBG1_8822B 0xffffffffL
2113 #define BIT_FW_DBG1_8822B(x) \
2114 (((x) & BIT_MASK_FW_DBG1_8822B) << BIT_SHIFT_FW_DBG1_8822B)
2115 #define BIT_GET_FW_DBG1_8822B(x) \
2116 (((x) >> BIT_SHIFT_FW_DBG1_8822B) & BIT_MASK_FW_DBG1_8822B)
2118 /* 2 REG_FW_DBG2_8822B */
2120 #define BIT_SHIFT_FW_DBG2_8822B 0
2121 #define BIT_MASK_FW_DBG2_8822B 0xffffffffL
2122 #define BIT_FW_DBG2_8822B(x) \
2123 (((x) & BIT_MASK_FW_DBG2_8822B) << BIT_SHIFT_FW_DBG2_8822B)
2124 #define BIT_GET_FW_DBG2_8822B(x) \
2125 (((x) >> BIT_SHIFT_FW_DBG2_8822B) & BIT_MASK_FW_DBG2_8822B)
2127 /* 2 REG_FW_DBG3_8822B */
2129 #define BIT_SHIFT_FW_DBG3_8822B 0
2130 #define BIT_MASK_FW_DBG3_8822B 0xffffffffL
2131 #define BIT_FW_DBG3_8822B(x) \
2132 (((x) & BIT_MASK_FW_DBG3_8822B) << BIT_SHIFT_FW_DBG3_8822B)
2133 #define BIT_GET_FW_DBG3_8822B(x) \
2134 (((x) >> BIT_SHIFT_FW_DBG3_8822B) & BIT_MASK_FW_DBG3_8822B)
2136 /* 2 REG_FW_DBG4_8822B */
2138 #define BIT_SHIFT_FW_DBG4_8822B 0
2139 #define BIT_MASK_FW_DBG4_8822B 0xffffffffL
2140 #define BIT_FW_DBG4_8822B(x) \
2141 (((x) & BIT_MASK_FW_DBG4_8822B) << BIT_SHIFT_FW_DBG4_8822B)
2142 #define BIT_GET_FW_DBG4_8822B(x) \
2143 (((x) >> BIT_SHIFT_FW_DBG4_8822B) & BIT_MASK_FW_DBG4_8822B)
2145 /* 2 REG_FW_DBG5_8822B */
2147 #define BIT_SHIFT_FW_DBG5_8822B 0
2148 #define BIT_MASK_FW_DBG5_8822B 0xffffffffL
2149 #define BIT_FW_DBG5_8822B(x) \
2150 (((x) & BIT_MASK_FW_DBG5_8822B) << BIT_SHIFT_FW_DBG5_8822B)
2151 #define BIT_GET_FW_DBG5_8822B(x) \
2152 (((x) >> BIT_SHIFT_FW_DBG5_8822B) & BIT_MASK_FW_DBG5_8822B)
2154 /* 2 REG_FW_DBG6_8822B */
2156 #define BIT_SHIFT_FW_DBG6_8822B 0
2157 #define BIT_MASK_FW_DBG6_8822B 0xffffffffL
2158 #define BIT_FW_DBG6_8822B(x) \
2159 (((x) & BIT_MASK_FW_DBG6_8822B) << BIT_SHIFT_FW_DBG6_8822B)
2160 #define BIT_GET_FW_DBG6_8822B(x) \
2161 (((x) >> BIT_SHIFT_FW_DBG6_8822B) & BIT_MASK_FW_DBG6_8822B)
2163 /* 2 REG_FW_DBG7_8822B */
2165 #define BIT_SHIFT_FW_DBG7_8822B 0
2166 #define BIT_MASK_FW_DBG7_8822B 0xffffffffL
2167 #define BIT_FW_DBG7_8822B(x) \
2168 (((x) & BIT_MASK_FW_DBG7_8822B) << BIT_SHIFT_FW_DBG7_8822B)
2169 #define BIT_GET_FW_DBG7_8822B(x) \
2170 (((x) >> BIT_SHIFT_FW_DBG7_8822B) & BIT_MASK_FW_DBG7_8822B)
2172 /* 2 REG_NOT_VALID_8822B */
2174 /* 2 REG_CR_8822B */
2176 #define BIT_SHIFT_LBMODE_8822B 24
2177 #define BIT_MASK_LBMODE_8822B 0x1f
2178 #define BIT_LBMODE_8822B(x) \
2179 (((x) & BIT_MASK_LBMODE_8822B) << BIT_SHIFT_LBMODE_8822B)
2180 #define BIT_GET_LBMODE_8822B(x) \
2181 (((x) >> BIT_SHIFT_LBMODE_8822B) & BIT_MASK_LBMODE_8822B)
2183 #define BIT_SHIFT_NETYPE1_8822B 18
2184 #define BIT_MASK_NETYPE1_8822B 0x3
2185 #define BIT_NETYPE1_8822B(x) \
2186 (((x) & BIT_MASK_NETYPE1_8822B) << BIT_SHIFT_NETYPE1_8822B)
2187 #define BIT_GET_NETYPE1_8822B(x) \
2188 (((x) >> BIT_SHIFT_NETYPE1_8822B) & BIT_MASK_NETYPE1_8822B)
2190 #define BIT_SHIFT_NETYPE0_8822B 16
2191 #define BIT_MASK_NETYPE0_8822B 0x3
2192 #define BIT_NETYPE0_8822B(x) \
2193 (((x) & BIT_MASK_NETYPE0_8822B) << BIT_SHIFT_NETYPE0_8822B)
2194 #define BIT_GET_NETYPE0_8822B(x) \
2195 (((x) >> BIT_SHIFT_NETYPE0_8822B) & BIT_MASK_NETYPE0_8822B)
2197 #define BIT_I2C_MAILBOX_EN_8822B BIT(12)
2198 #define BIT_SHCUT_EN_8822B BIT(11)
2199 #define BIT_32K_CAL_TMR_EN_8822B BIT(10)
2200 #define BIT_MAC_SEC_EN_8822B BIT(9)
2201 #define BIT_ENSWBCN_8822B BIT(8)
2202 #define BIT_MACRXEN_8822B BIT(7)
2203 #define BIT_MACTXEN_8822B BIT(6)
2204 #define BIT_SCHEDULE_EN_8822B BIT(5)
2205 #define BIT_PROTOCOL_EN_8822B BIT(4)
2206 #define BIT_RXDMA_EN_8822B BIT(3)
2207 #define BIT_TXDMA_EN_8822B BIT(2)
2208 #define BIT_HCI_RXDMA_EN_8822B BIT(1)
2209 #define BIT_HCI_TXDMA_EN_8822B BIT(0)
2211 /* 2 REG_PKT_BUFF_ACCESS_CTRL_8822B */
2213 #define BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B 0
2214 #define BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B 0xff
2215 #define BIT_PKT_BUFF_ACCESS_CTRL_8822B(x) \
2216 (((x) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B) \
2217 << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B)
2218 #define BIT_GET_PKT_BUFF_ACCESS_CTRL_8822B(x) \
2219 (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B) & \
2220 BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B)
2222 /* 2 REG_TSF_CLK_STATE_8822B */
2223 #define BIT_TSF_CLK_STABLE_8822B BIT(15)
2225 /* 2 REG_TXDMA_PQ_MAP_8822B */
2227 #define BIT_SHIFT_TXDMA_HIQ_MAP_8822B 14
2228 #define BIT_MASK_TXDMA_HIQ_MAP_8822B 0x3
2229 #define BIT_TXDMA_HIQ_MAP_8822B(x) \
2230 (((x) & BIT_MASK_TXDMA_HIQ_MAP_8822B) << BIT_SHIFT_TXDMA_HIQ_MAP_8822B)
2231 #define BIT_GET_TXDMA_HIQ_MAP_8822B(x) \
2232 (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8822B) & BIT_MASK_TXDMA_HIQ_MAP_8822B)
2234 #define BIT_SHIFT_TXDMA_MGQ_MAP_8822B 12
2235 #define BIT_MASK_TXDMA_MGQ_MAP_8822B 0x3
2236 #define BIT_TXDMA_MGQ_MAP_8822B(x) \
2237 (((x) & BIT_MASK_TXDMA_MGQ_MAP_8822B) << BIT_SHIFT_TXDMA_MGQ_MAP_8822B)
2238 #define BIT_GET_TXDMA_MGQ_MAP_8822B(x) \
2239 (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8822B) & BIT_MASK_TXDMA_MGQ_MAP_8822B)
2241 #define BIT_SHIFT_TXDMA_BKQ_MAP_8822B 10
2242 #define BIT_MASK_TXDMA_BKQ_MAP_8822B 0x3
2243 #define BIT_TXDMA_BKQ_MAP_8822B(x) \
2244 (((x) & BIT_MASK_TXDMA_BKQ_MAP_8822B) << BIT_SHIFT_TXDMA_BKQ_MAP_8822B)
2245 #define BIT_GET_TXDMA_BKQ_MAP_8822B(x) \
2246 (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8822B) & BIT_MASK_TXDMA_BKQ_MAP_8822B)
2248 #define BIT_SHIFT_TXDMA_BEQ_MAP_8822B 8
2249 #define BIT_MASK_TXDMA_BEQ_MAP_8822B 0x3
2250 #define BIT_TXDMA_BEQ_MAP_8822B(x) \
2251 (((x) & BIT_MASK_TXDMA_BEQ_MAP_8822B) << BIT_SHIFT_TXDMA_BEQ_MAP_8822B)
2252 #define BIT_GET_TXDMA_BEQ_MAP_8822B(x) \
2253 (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8822B) & BIT_MASK_TXDMA_BEQ_MAP_8822B)
2255 #define BIT_SHIFT_TXDMA_VIQ_MAP_8822B 6
2256 #define BIT_MASK_TXDMA_VIQ_MAP_8822B 0x3
2257 #define BIT_TXDMA_VIQ_MAP_8822B(x) \
2258 (((x) & BIT_MASK_TXDMA_VIQ_MAP_8822B) << BIT_SHIFT_TXDMA_VIQ_MAP_8822B)
2259 #define BIT_GET_TXDMA_VIQ_MAP_8822B(x) \
2260 (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8822B) & BIT_MASK_TXDMA_VIQ_MAP_8822B)
2262 #define BIT_SHIFT_TXDMA_VOQ_MAP_8822B 4
2263 #define BIT_MASK_TXDMA_VOQ_MAP_8822B 0x3
2264 #define BIT_TXDMA_VOQ_MAP_8822B(x) \
2265 (((x) & BIT_MASK_TXDMA_VOQ_MAP_8822B) << BIT_SHIFT_TXDMA_VOQ_MAP_8822B)
2266 #define BIT_GET_TXDMA_VOQ_MAP_8822B(x) \
2267 (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8822B) & BIT_MASK_TXDMA_VOQ_MAP_8822B)
2269 #define BIT_RXDMA_AGG_EN_8822B BIT(2)
2270 #define BIT_RXSHFT_EN_8822B BIT(1)
2271 #define BIT_RXDMA_ARBBW_EN_8822B BIT(0)
2273 /* 2 REG_TRXFF_BNDY_8822B */
2275 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8822B 8
2276 #define BIT_MASK_RXFFOVFL_RSV_V2_8822B 0xf
2277 #define BIT_RXFFOVFL_RSV_V2_8822B(x) \
2278 (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8822B) \
2279 << BIT_SHIFT_RXFFOVFL_RSV_V2_8822B)
2280 #define BIT_GET_RXFFOVFL_RSV_V2_8822B(x) \
2281 (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8822B) & \
2282 BIT_MASK_RXFFOVFL_RSV_V2_8822B)
2284 #define BIT_SHIFT_TXPKTBUF_PGBNDY_8822B 0
2285 #define BIT_MASK_TXPKTBUF_PGBNDY_8822B 0xff
2286 #define BIT_TXPKTBUF_PGBNDY_8822B(x) \
2287 (((x) & BIT_MASK_TXPKTBUF_PGBNDY_8822B) \
2288 << BIT_SHIFT_TXPKTBUF_PGBNDY_8822B)
2289 #define BIT_GET_TXPKTBUF_PGBNDY_8822B(x) \
2290 (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8822B) & \
2291 BIT_MASK_TXPKTBUF_PGBNDY_8822B)
2293 /* 2 REG_PTA_I2C_MBOX_8822B */
2295 /* 2 REG_NOT_VALID_8822B */
2297 #define BIT_SHIFT_I2C_M_STATUS_8822B 8
2298 #define BIT_MASK_I2C_M_STATUS_8822B 0xf
2299 #define BIT_I2C_M_STATUS_8822B(x) \
2300 (((x) & BIT_MASK_I2C_M_STATUS_8822B) << BIT_SHIFT_I2C_M_STATUS_8822B)
2301 #define BIT_GET_I2C_M_STATUS_8822B(x) \
2302 (((x) >> BIT_SHIFT_I2C_M_STATUS_8822B) & BIT_MASK_I2C_M_STATUS_8822B)
2304 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B 4
2305 #define BIT_MASK_I2C_M_BUS_GNT_FW_8822B 0x7
2306 #define BIT_I2C_M_BUS_GNT_FW_8822B(x) \
2307 (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B) \
2308 << BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B)
2309 #define BIT_GET_I2C_M_BUS_GNT_FW_8822B(x) \
2310 (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B) & \
2311 BIT_MASK_I2C_M_BUS_GNT_FW_8822B)
2313 #define BIT_I2C_M_GNT_FW_8822B BIT(3)
2315 #define BIT_SHIFT_I2C_M_SPEED_8822B 1
2316 #define BIT_MASK_I2C_M_SPEED_8822B 0x3
2317 #define BIT_I2C_M_SPEED_8822B(x) \
2318 (((x) & BIT_MASK_I2C_M_SPEED_8822B) << BIT_SHIFT_I2C_M_SPEED_8822B)
2319 #define BIT_GET_I2C_M_SPEED_8822B(x) \
2320 (((x) >> BIT_SHIFT_I2C_M_SPEED_8822B) & BIT_MASK_I2C_M_SPEED_8822B)
2322 #define BIT_I2C_M_UNLOCK_8822B BIT(0)
2324 /* 2 REG_RXFF_BNDY_8822B */
2326 /* 2 REG_NOT_VALID_8822B */
2328 #define BIT_SHIFT_RXFF0_BNDY_V2_8822B 0
2329 #define BIT_MASK_RXFF0_BNDY_V2_8822B 0x3ffff
2330 #define BIT_RXFF0_BNDY_V2_8822B(x) \
2331 (((x) & BIT_MASK_RXFF0_BNDY_V2_8822B) << BIT_SHIFT_RXFF0_BNDY_V2_8822B)
2332 #define BIT_GET_RXFF0_BNDY_V2_8822B(x) \
2333 (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8822B) & BIT_MASK_RXFF0_BNDY_V2_8822B)
2335 /* 2 REG_FE1IMR_8822B */
2336 #define BIT_FS_RXDMA2_DONE_INT_EN_8822B BIT(28)
2337 #define BIT_FS_RXDONE3_INT_EN_8822B BIT(27)
2338 #define BIT_FS_RXDONE2_INT_EN_8822B BIT(26)
2339 #define BIT_FS_RX_BCN_P4_INT_EN_8822B BIT(25)
2340 #define BIT_FS_RX_BCN_P3_INT_EN_8822B BIT(24)
2341 #define BIT_FS_RX_BCN_P2_INT_EN_8822B BIT(23)
2342 #define BIT_FS_RX_BCN_P1_INT_EN_8822B BIT(22)
2343 #define BIT_FS_RX_BCN_P0_INT_EN_8822B BIT(21)
2344 #define BIT_FS_RX_UMD0_INT_EN_8822B BIT(20)
2345 #define BIT_FS_RX_UMD1_INT_EN_8822B BIT(19)
2346 #define BIT_FS_RX_BMD0_INT_EN_8822B BIT(18)
2347 #define BIT_FS_RX_BMD1_INT_EN_8822B BIT(17)
2348 #define BIT_FS_RXDONE_INT_EN_8822B BIT(16)
2349 #define BIT_FS_WWLAN_INT_EN_8822B BIT(15)
2350 #define BIT_FS_SOUND_DONE_INT_EN_8822B BIT(14)
2351 #define BIT_FS_LP_STBY_INT_EN_8822B BIT(13)
2352 #define BIT_FS_TRL_MTR_INT_EN_8822B BIT(12)
2353 #define BIT_FS_BF1_PRETO_INT_EN_8822B BIT(11)
2354 #define BIT_FS_BF0_PRETO_INT_EN_8822B BIT(10)
2355 #define BIT_FS_PTCL_RELEASE_MACID_INT_EN_8822B BIT(9)
2356 #define BIT_FS_LTE_COEX_EN_8822B BIT(6)
2357 #define BIT_FS_WLACTOFF_INT_EN_8822B BIT(5)
2358 #define BIT_FS_WLACTON_INT_EN_8822B BIT(4)
2359 #define BIT_FS_BTCMD_INT_EN_8822B BIT(3)
2360 #define BIT_FS_REG_MAILBOX_TO_I2C_INT_EN_8822B BIT(2)
2361 #define BIT_FS_TRPC_TO_INT_EN_V1_8822B BIT(1)
2362 #define BIT_FS_RPC_O_T_INT_EN_V1_8822B BIT(0)
2364 /* 2 REG_FE1ISR_8822B */
2365 #define BIT_FS_RXDMA2_DONE_INT_8822B BIT(28)
2366 #define BIT_FS_RXDONE3_INT_8822B BIT(27)
2367 #define BIT_FS_RXDONE2_INT_8822B BIT(26)
2368 #define BIT_FS_RX_BCN_P4_INT_8822B BIT(25)
2369 #define BIT_FS_RX_BCN_P3_INT_8822B BIT(24)
2370 #define BIT_FS_RX_BCN_P2_INT_8822B BIT(23)
2371 #define BIT_FS_RX_BCN_P1_INT_8822B BIT(22)
2372 #define BIT_FS_RX_BCN_P0_INT_8822B BIT(21)
2373 #define BIT_FS_RX_UMD0_INT_8822B BIT(20)
2374 #define BIT_FS_RX_UMD1_INT_8822B BIT(19)
2375 #define BIT_FS_RX_BMD0_INT_8822B BIT(18)
2376 #define BIT_FS_RX_BMD1_INT_8822B BIT(17)
2377 #define BIT_FS_RXDONE_INT_8822B BIT(16)
2378 #define BIT_FS_WWLAN_INT_8822B BIT(15)
2379 #define BIT_FS_SOUND_DONE_INT_8822B BIT(14)
2380 #define BIT_FS_LP_STBY_INT_8822B BIT(13)
2381 #define BIT_FS_TRL_MTR_INT_8822B BIT(12)
2382 #define BIT_FS_BF1_PRETO_INT_8822B BIT(11)
2383 #define BIT_FS_BF0_PRETO_INT_8822B BIT(10)
2384 #define BIT_FS_PTCL_RELEASE_MACID_INT_8822B BIT(9)
2385 #define BIT_FS_LTE_COEX_INT_8822B BIT(6)
2386 #define BIT_FS_WLACTOFF_INT_8822B BIT(5)
2387 #define BIT_FS_WLACTON_INT_8822B BIT(4)
2388 #define BIT_FS_BCN_RX_INT_INT_8822B BIT(3)
2389 #define BIT_FS_MAILBOX_TO_I2C_INT_8822B BIT(2)
2390 #define BIT_FS_TRPC_TO_INT_8822B BIT(1)
2391 #define BIT_FS_RPC_O_T_INT_8822B BIT(0)
2393 /* 2 REG_NOT_VALID_8822B */
2395 /* 2 REG_CPWM_8822B */
2396 #define BIT_CPWM_TOGGLING_8822B BIT(31)
2398 #define BIT_SHIFT_CPWM_MOD_8822B 24
2399 #define BIT_MASK_CPWM_MOD_8822B 0x7f
2400 #define BIT_CPWM_MOD_8822B(x) \
2401 (((x) & BIT_MASK_CPWM_MOD_8822B) << BIT_SHIFT_CPWM_MOD_8822B)
2402 #define BIT_GET_CPWM_MOD_8822B(x) \
2403 (((x) >> BIT_SHIFT_CPWM_MOD_8822B) & BIT_MASK_CPWM_MOD_8822B)
2405 /* 2 REG_FWIMR_8822B */
2406 #define BIT_FS_TXBCNOK_MB7_INT_EN_8822B BIT(31)
2407 #define BIT_FS_TXBCNOK_MB6_INT_EN_8822B BIT(30)
2408 #define BIT_FS_TXBCNOK_MB5_INT_EN_8822B BIT(29)
2409 #define BIT_FS_TXBCNOK_MB4_INT_EN_8822B BIT(28)
2410 #define BIT_FS_TXBCNOK_MB3_INT_EN_8822B BIT(27)
2411 #define BIT_FS_TXBCNOK_MB2_INT_EN_8822B BIT(26)
2412 #define BIT_FS_TXBCNOK_MB1_INT_EN_8822B BIT(25)
2413 #define BIT_FS_TXBCNOK_MB0_INT_EN_8822B BIT(24)
2414 #define BIT_FS_TXBCNERR_MB7_INT_EN_8822B BIT(23)
2415 #define BIT_FS_TXBCNERR_MB6_INT_EN_8822B BIT(22)
2416 #define BIT_FS_TXBCNERR_MB5_INT_EN_8822B BIT(21)
2417 #define BIT_FS_TXBCNERR_MB4_INT_EN_8822B BIT(20)
2418 #define BIT_FS_TXBCNERR_MB3_INT_EN_8822B BIT(19)
2419 #define BIT_FS_TXBCNERR_MB2_INT_EN_8822B BIT(18)
2420 #define BIT_FS_TXBCNERR_MB1_INT_EN_8822B BIT(17)
2421 #define BIT_FS_TXBCNERR_MB0_INT_EN_8822B BIT(16)
2422 #define BIT_CPU_MGQ_TXDONE_INT_EN_8822B BIT(15)
2423 #define BIT_SIFS_OVERSPEC_INT_EN_8822B BIT(14)
2424 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_EN_8822B BIT(13)
2425 #define BIT_FS_MGNTQFF_TO_INT_EN_8822B BIT(12)
2426 #define BIT_FS_DDMA1_LP_INT_EN_8822B BIT(11)
2427 #define BIT_FS_DDMA1_HP_INT_EN_8822B BIT(10)
2428 #define BIT_FS_DDMA0_LP_INT_EN_8822B BIT(9)
2429 #define BIT_FS_DDMA0_HP_INT_EN_8822B BIT(8)
2430 #define BIT_FS_TRXRPT_INT_EN_8822B BIT(7)
2431 #define BIT_FS_C2H_W_READY_INT_EN_8822B BIT(6)
2432 #define BIT_FS_HRCV_INT_EN_8822B BIT(5)
2433 #define BIT_FS_H2CCMD_INT_EN_8822B BIT(4)
2434 #define BIT_FS_TXPKTIN_INT_EN_8822B BIT(3)
2435 #define BIT_FS_ERRORHDL_INT_EN_8822B BIT(2)
2436 #define BIT_FS_TXCCX_INT_EN_8822B BIT(1)
2437 #define BIT_FS_TXCLOSE_INT_EN_8822B BIT(0)
2439 /* 2 REG_FWISR_8822B */
2440 #define BIT_FS_TXBCNOK_MB7_INT_8822B BIT(31)
2441 #define BIT_FS_TXBCNOK_MB6_INT_8822B BIT(30)
2442 #define BIT_FS_TXBCNOK_MB5_INT_8822B BIT(29)
2443 #define BIT_FS_TXBCNOK_MB4_INT_8822B BIT(28)
2444 #define BIT_FS_TXBCNOK_MB3_INT_8822B BIT(27)
2445 #define BIT_FS_TXBCNOK_MB2_INT_8822B BIT(26)
2446 #define BIT_FS_TXBCNOK_MB1_INT_8822B BIT(25)
2447 #define BIT_FS_TXBCNOK_MB0_INT_8822B BIT(24)
2448 #define BIT_FS_TXBCNERR_MB7_INT_8822B BIT(23)
2449 #define BIT_FS_TXBCNERR_MB6_INT_8822B BIT(22)
2450 #define BIT_FS_TXBCNERR_MB5_INT_8822B BIT(21)
2451 #define BIT_FS_TXBCNERR_MB4_INT_8822B BIT(20)
2452 #define BIT_FS_TXBCNERR_MB3_INT_8822B BIT(19)
2453 #define BIT_FS_TXBCNERR_MB2_INT_8822B BIT(18)
2454 #define BIT_FS_TXBCNERR_MB1_INT_8822B BIT(17)
2455 #define BIT_FS_TXBCNERR_MB0_INT_8822B BIT(16)
2456 #define BIT_CPU_MGQ_TXDONE_INT_8822B BIT(15)
2457 #define BIT_SIFS_OVERSPEC_INT_8822B BIT(14)
2458 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_8822B BIT(13)
2459 #define BIT_FS_MGNTQFF_TO_INT_8822B BIT(12)
2460 #define BIT_FS_DDMA1_LP_INT_8822B BIT(11)
2461 #define BIT_FS_DDMA1_HP_INT_8822B BIT(10)
2462 #define BIT_FS_DDMA0_LP_INT_8822B BIT(9)
2463 #define BIT_FS_DDMA0_HP_INT_8822B BIT(8)
2464 #define BIT_FS_TRXRPT_INT_8822B BIT(7)
2465 #define BIT_FS_C2H_W_READY_INT_8822B BIT(6)
2466 #define BIT_FS_HRCV_INT_8822B BIT(5)
2467 #define BIT_FS_H2CCMD_INT_8822B BIT(4)
2468 #define BIT_FS_TXPKTIN_INT_8822B BIT(3)
2469 #define BIT_FS_ERRORHDL_INT_8822B BIT(2)
2470 #define BIT_FS_TXCCX_INT_8822B BIT(1)
2471 #define BIT_FS_TXCLOSE_INT_8822B BIT(0)
2473 /* 2 REG_FTIMR_8822B */
2474 #define BIT_PS_TIMER_C_EARLY_INT_EN_8822B BIT(23)
2475 #define BIT_PS_TIMER_B_EARLY_INT_EN_8822B BIT(22)
2476 #define BIT_PS_TIMER_A_EARLY_INT_EN_8822B BIT(21)
2477 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_EN_8822B BIT(20)
2478 #define BIT_PS_TIMER_C_INT_EN_8822B BIT(19)
2479 #define BIT_PS_TIMER_B_INT_EN_8822B BIT(18)
2480 #define BIT_PS_TIMER_A_INT_EN_8822B BIT(17)
2481 #define BIT_CPUMGQ_TX_TIMER_INT_EN_8822B BIT(16)
2482 #define BIT_FS_PS_TIMEOUT2_EN_8822B BIT(15)
2483 #define BIT_FS_PS_TIMEOUT1_EN_8822B BIT(14)
2484 #define BIT_FS_PS_TIMEOUT0_EN_8822B BIT(13)
2485 #define BIT_FS_GTINT8_EN_8822B BIT(8)
2486 #define BIT_FS_GTINT7_EN_8822B BIT(7)
2487 #define BIT_FS_GTINT6_EN_8822B BIT(6)
2488 #define BIT_FS_GTINT5_EN_8822B BIT(5)
2489 #define BIT_FS_GTINT4_EN_8822B BIT(4)
2490 #define BIT_FS_GTINT3_EN_8822B BIT(3)
2491 #define BIT_FS_GTINT2_EN_8822B BIT(2)
2492 #define BIT_FS_GTINT1_EN_8822B BIT(1)
2493 #define BIT_FS_GTINT0_EN_8822B BIT(0)
2495 /* 2 REG_FTISR_8822B */
2496 #define BIT_PS_TIMER_C_EARLY__INT_8822B BIT(23)
2497 #define BIT_PS_TIMER_B_EARLY__INT_8822B BIT(22)
2498 #define BIT_PS_TIMER_A_EARLY__INT_8822B BIT(21)
2499 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_8822B BIT(20)
2500 #define BIT_PS_TIMER_C_INT_8822B BIT(19)
2501 #define BIT_PS_TIMER_B_INT_8822B BIT(18)
2502 #define BIT_PS_TIMER_A_INT_8822B BIT(17)
2503 #define BIT_CPUMGQ_TX_TIMER_INT_8822B BIT(16)
2504 #define BIT_FS_PS_TIMEOUT2_INT_8822B BIT(15)
2505 #define BIT_FS_PS_TIMEOUT1_INT_8822B BIT(14)
2506 #define BIT_FS_PS_TIMEOUT0_INT_8822B BIT(13)
2507 #define BIT_FS_GTINT8_INT_8822B BIT(8)
2508 #define BIT_FS_GTINT7_INT_8822B BIT(7)
2509 #define BIT_FS_GTINT6_INT_8822B BIT(6)
2510 #define BIT_FS_GTINT5_INT_8822B BIT(5)
2511 #define BIT_FS_GTINT4_INT_8822B BIT(4)
2512 #define BIT_FS_GTINT3_INT_8822B BIT(3)
2513 #define BIT_FS_GTINT2_INT_8822B BIT(2)
2514 #define BIT_FS_GTINT1_INT_8822B BIT(1)
2515 #define BIT_FS_GTINT0_INT_8822B BIT(0)
2517 /* 2 REG_PKTBUF_DBG_CTRL_8822B */
2519 #define BIT_SHIFT_PKTBUF_WRITE_EN_8822B 24
2520 #define BIT_MASK_PKTBUF_WRITE_EN_8822B 0xff
2521 #define BIT_PKTBUF_WRITE_EN_8822B(x) \
2522 (((x) & BIT_MASK_PKTBUF_WRITE_EN_8822B) \
2523 << BIT_SHIFT_PKTBUF_WRITE_EN_8822B)
2524 #define BIT_GET_PKTBUF_WRITE_EN_8822B(x) \
2525 (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8822B) & \
2526 BIT_MASK_PKTBUF_WRITE_EN_8822B)
2528 #define BIT_TXRPTBUF_DBG_8822B BIT(23)
2530 /* 2 REG_NOT_VALID_8822B */
2531 #define BIT_TXPKTBUF_DBG_V2_8822B BIT(20)
2532 #define BIT_RXPKTBUF_DBG_8822B BIT(16)
2534 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8822B 0
2535 #define BIT_MASK_PKTBUF_DBG_ADDR_8822B 0x1fff
2536 #define BIT_PKTBUF_DBG_ADDR_8822B(x) \
2537 (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8822B) \
2538 << BIT_SHIFT_PKTBUF_DBG_ADDR_8822B)
2539 #define BIT_GET_PKTBUF_DBG_ADDR_8822B(x) \
2540 (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8822B) & \
2541 BIT_MASK_PKTBUF_DBG_ADDR_8822B)
2543 /* 2 REG_PKTBUF_DBG_DATA_L_8822B */
2545 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B 0
2546 #define BIT_MASK_PKTBUF_DBG_DATA_L_8822B 0xffffffffL
2547 #define BIT_PKTBUF_DBG_DATA_L_8822B(x) \
2548 (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B) \
2549 << BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B)
2550 #define BIT_GET_PKTBUF_DBG_DATA_L_8822B(x) \
2551 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B) & \
2552 BIT_MASK_PKTBUF_DBG_DATA_L_8822B)
2554 /* 2 REG_PKTBUF_DBG_DATA_H_8822B */
2556 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B 0
2557 #define BIT_MASK_PKTBUF_DBG_DATA_H_8822B 0xffffffffL
2558 #define BIT_PKTBUF_DBG_DATA_H_8822B(x) \
2559 (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B) \
2560 << BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B)
2561 #define BIT_GET_PKTBUF_DBG_DATA_H_8822B(x) \
2562 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B) & \
2563 BIT_MASK_PKTBUF_DBG_DATA_H_8822B)
2565 /* 2 REG_CPWM2_8822B */
2567 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8822B 16
2568 #define BIT_MASK_L0S_TO_RCVY_NUM_8822B 0xff
2569 #define BIT_L0S_TO_RCVY_NUM_8822B(x) \
2570 (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8822B) \
2571 << BIT_SHIFT_L0S_TO_RCVY_NUM_8822B)
2572 #define BIT_GET_L0S_TO_RCVY_NUM_8822B(x) \
2573 (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8822B) & \
2574 BIT_MASK_L0S_TO_RCVY_NUM_8822B)
2576 #define BIT_CPWM2_TOGGLING_8822B BIT(15)
2578 #define BIT_SHIFT_CPWM2_MOD_8822B 0
2579 #define BIT_MASK_CPWM2_MOD_8822B 0x7fff
2580 #define BIT_CPWM2_MOD_8822B(x) \
2581 (((x) & BIT_MASK_CPWM2_MOD_8822B) << BIT_SHIFT_CPWM2_MOD_8822B)
2582 #define BIT_GET_CPWM2_MOD_8822B(x) \
2583 (((x) >> BIT_SHIFT_CPWM2_MOD_8822B) & BIT_MASK_CPWM2_MOD_8822B)
2585 /* 2 REG_NOT_VALID_8822B */
2587 /* 2 REG_TC0_CTRL_8822B */
2588 #define BIT_TC0INT_EN_8822B BIT(26)
2589 #define BIT_TC0MODE_8822B BIT(25)
2590 #define BIT_TC0EN_8822B BIT(24)
2592 #define BIT_SHIFT_TC0DATA_8822B 0
2593 #define BIT_MASK_TC0DATA_8822B 0xffffff
2594 #define BIT_TC0DATA_8822B(x) \
2595 (((x) & BIT_MASK_TC0DATA_8822B) << BIT_SHIFT_TC0DATA_8822B)
2596 #define BIT_GET_TC0DATA_8822B(x) \
2597 (((x) >> BIT_SHIFT_TC0DATA_8822B) & BIT_MASK_TC0DATA_8822B)
2599 /* 2 REG_TC1_CTRL_8822B */
2600 #define BIT_TC1INT_EN_8822B BIT(26)
2601 #define BIT_TC1MODE_8822B BIT(25)
2602 #define BIT_TC1EN_8822B BIT(24)
2604 #define BIT_SHIFT_TC1DATA_8822B 0
2605 #define BIT_MASK_TC1DATA_8822B 0xffffff
2606 #define BIT_TC1DATA_8822B(x) \
2607 (((x) & BIT_MASK_TC1DATA_8822B) << BIT_SHIFT_TC1DATA_8822B)
2608 #define BIT_GET_TC1DATA_8822B(x) \
2609 (((x) >> BIT_SHIFT_TC1DATA_8822B) & BIT_MASK_TC1DATA_8822B)
2611 /* 2 REG_TC2_CTRL_8822B */
2612 #define BIT_TC2INT_EN_8822B BIT(26)
2613 #define BIT_TC2MODE_8822B BIT(25)
2614 #define BIT_TC2EN_8822B BIT(24)
2616 #define BIT_SHIFT_TC2DATA_8822B 0
2617 #define BIT_MASK_TC2DATA_8822B 0xffffff
2618 #define BIT_TC2DATA_8822B(x) \
2619 (((x) & BIT_MASK_TC2DATA_8822B) << BIT_SHIFT_TC2DATA_8822B)
2620 #define BIT_GET_TC2DATA_8822B(x) \
2621 (((x) >> BIT_SHIFT_TC2DATA_8822B) & BIT_MASK_TC2DATA_8822B)
2623 /* 2 REG_TC3_CTRL_8822B */
2624 #define BIT_TC3INT_EN_8822B BIT(26)
2625 #define BIT_TC3MODE_8822B BIT(25)
2626 #define BIT_TC3EN_8822B BIT(24)
2628 #define BIT_SHIFT_TC3DATA_8822B 0
2629 #define BIT_MASK_TC3DATA_8822B 0xffffff
2630 #define BIT_TC3DATA_8822B(x) \
2631 (((x) & BIT_MASK_TC3DATA_8822B) << BIT_SHIFT_TC3DATA_8822B)
2632 #define BIT_GET_TC3DATA_8822B(x) \
2633 (((x) >> BIT_SHIFT_TC3DATA_8822B) & BIT_MASK_TC3DATA_8822B)
2635 /* 2 REG_TC4_CTRL_8822B */
2636 #define BIT_TC4INT_EN_8822B BIT(26)
2637 #define BIT_TC4MODE_8822B BIT(25)
2638 #define BIT_TC4EN_8822B BIT(24)
2640 #define BIT_SHIFT_TC4DATA_8822B 0
2641 #define BIT_MASK_TC4DATA_8822B 0xffffff
2642 #define BIT_TC4DATA_8822B(x) \
2643 (((x) & BIT_MASK_TC4DATA_8822B) << BIT_SHIFT_TC4DATA_8822B)
2644 #define BIT_GET_TC4DATA_8822B(x) \
2645 (((x) >> BIT_SHIFT_TC4DATA_8822B) & BIT_MASK_TC4DATA_8822B)
2647 /* 2 REG_TCUNIT_BASE_8822B */
2649 #define BIT_SHIFT_TCUNIT_BASE_8822B 0
2650 #define BIT_MASK_TCUNIT_BASE_8822B 0x3fff
2651 #define BIT_TCUNIT_BASE_8822B(x) \
2652 (((x) & BIT_MASK_TCUNIT_BASE_8822B) << BIT_SHIFT_TCUNIT_BASE_8822B)
2653 #define BIT_GET_TCUNIT_BASE_8822B(x) \
2654 (((x) >> BIT_SHIFT_TCUNIT_BASE_8822B) & BIT_MASK_TCUNIT_BASE_8822B)
2656 /* 2 REG_TC5_CTRL_8822B */
2657 #define BIT_TC5INT_EN_8822B BIT(26)
2658 #define BIT_TC5MODE_8822B BIT(25)
2659 #define BIT_TC5EN_8822B BIT(24)
2661 #define BIT_SHIFT_TC5DATA_8822B 0
2662 #define BIT_MASK_TC5DATA_8822B 0xffffff
2663 #define BIT_TC5DATA_8822B(x) \
2664 (((x) & BIT_MASK_TC5DATA_8822B) << BIT_SHIFT_TC5DATA_8822B)
2665 #define BIT_GET_TC5DATA_8822B(x) \
2666 (((x) >> BIT_SHIFT_TC5DATA_8822B) & BIT_MASK_TC5DATA_8822B)
2668 /* 2 REG_TC6_CTRL_8822B */
2669 #define BIT_TC6INT_EN_8822B BIT(26)
2670 #define BIT_TC6MODE_8822B BIT(25)
2671 #define BIT_TC6EN_8822B BIT(24)
2673 #define BIT_SHIFT_TC6DATA_8822B 0
2674 #define BIT_MASK_TC6DATA_8822B 0xffffff
2675 #define BIT_TC6DATA_8822B(x) \
2676 (((x) & BIT_MASK_TC6DATA_8822B) << BIT_SHIFT_TC6DATA_8822B)
2677 #define BIT_GET_TC6DATA_8822B(x) \
2678 (((x) >> BIT_SHIFT_TC6DATA_8822B) & BIT_MASK_TC6DATA_8822B)
2680 /* 2 REG_MBIST_FAIL_8822B */
2682 #define BIT_SHIFT_8051_MBIST_FAIL_8822B 26
2683 #define BIT_MASK_8051_MBIST_FAIL_8822B 0x7
2684 #define BIT_8051_MBIST_FAIL_8822B(x) \
2685 (((x) & BIT_MASK_8051_MBIST_FAIL_8822B) \
2686 << BIT_SHIFT_8051_MBIST_FAIL_8822B)
2687 #define BIT_GET_8051_MBIST_FAIL_8822B(x) \
2688 (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8822B) & \
2689 BIT_MASK_8051_MBIST_FAIL_8822B)
2691 #define BIT_SHIFT_USB_MBIST_FAIL_8822B 24
2692 #define BIT_MASK_USB_MBIST_FAIL_8822B 0x3
2693 #define BIT_USB_MBIST_FAIL_8822B(x) \
2694 (((x) & BIT_MASK_USB_MBIST_FAIL_8822B) \
2695 << BIT_SHIFT_USB_MBIST_FAIL_8822B)
2696 #define BIT_GET_USB_MBIST_FAIL_8822B(x) \
2697 (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8822B) & \
2698 BIT_MASK_USB_MBIST_FAIL_8822B)
2700 #define BIT_SHIFT_PCIE_MBIST_FAIL_8822B 16
2701 #define BIT_MASK_PCIE_MBIST_FAIL_8822B 0x3f
2702 #define BIT_PCIE_MBIST_FAIL_8822B(x) \
2703 (((x) & BIT_MASK_PCIE_MBIST_FAIL_8822B) \
2704 << BIT_SHIFT_PCIE_MBIST_FAIL_8822B)
2705 #define BIT_GET_PCIE_MBIST_FAIL_8822B(x) \
2706 (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8822B) & \
2707 BIT_MASK_PCIE_MBIST_FAIL_8822B)
2709 #define BIT_SHIFT_MAC_MBIST_FAIL_8822B 0
2710 #define BIT_MASK_MAC_MBIST_FAIL_8822B 0xfff
2711 #define BIT_MAC_MBIST_FAIL_8822B(x) \
2712 (((x) & BIT_MASK_MAC_MBIST_FAIL_8822B) \
2713 << BIT_SHIFT_MAC_MBIST_FAIL_8822B)
2714 #define BIT_GET_MAC_MBIST_FAIL_8822B(x) \
2715 (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8822B) & \
2716 BIT_MASK_MAC_MBIST_FAIL_8822B)
2718 /* 2 REG_MBIST_START_PAUSE_8822B */
2720 #define BIT_SHIFT_8051_MBIST_START_PAUSE_8822B 26
2721 #define BIT_MASK_8051_MBIST_START_PAUSE_8822B 0x7
2722 #define BIT_8051_MBIST_START_PAUSE_8822B(x) \
2723 (((x) & BIT_MASK_8051_MBIST_START_PAUSE_8822B) \
2724 << BIT_SHIFT_8051_MBIST_START_PAUSE_8822B)
2725 #define BIT_GET_8051_MBIST_START_PAUSE_8822B(x) \
2726 (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8822B) & \
2727 BIT_MASK_8051_MBIST_START_PAUSE_8822B)
2729 #define BIT_SHIFT_USB_MBIST_START_PAUSE_8822B 24
2730 #define BIT_MASK_USB_MBIST_START_PAUSE_8822B 0x3
2731 #define BIT_USB_MBIST_START_PAUSE_8822B(x) \
2732 (((x) & BIT_MASK_USB_MBIST_START_PAUSE_8822B) \
2733 << BIT_SHIFT_USB_MBIST_START_PAUSE_8822B)
2734 #define BIT_GET_USB_MBIST_START_PAUSE_8822B(x) \
2735 (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8822B) & \
2736 BIT_MASK_USB_MBIST_START_PAUSE_8822B)
2738 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B 16
2739 #define BIT_MASK_PCIE_MBIST_START_PAUSE_8822B 0x3f
2740 #define BIT_PCIE_MBIST_START_PAUSE_8822B(x) \
2741 (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_8822B) \
2742 << BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B)
2743 #define BIT_GET_PCIE_MBIST_START_PAUSE_8822B(x) \
2744 (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B) & \
2745 BIT_MASK_PCIE_MBIST_START_PAUSE_8822B)
2747 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B 0
2748 #define BIT_MASK_MAC_MBIST_START_PAUSE_8822B 0xfff
2749 #define BIT_MAC_MBIST_START_PAUSE_8822B(x) \
2750 (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_8822B) \
2751 << BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B)
2752 #define BIT_GET_MAC_MBIST_START_PAUSE_8822B(x) \
2753 (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B) & \
2754 BIT_MASK_MAC_MBIST_START_PAUSE_8822B)
2756 /* 2 REG_MBIST_DONE_8822B */
2758 #define BIT_SHIFT_8051_MBIST_DONE_8822B 26
2759 #define BIT_MASK_8051_MBIST_DONE_8822B 0x7
2760 #define BIT_8051_MBIST_DONE_8822B(x) \
2761 (((x) & BIT_MASK_8051_MBIST_DONE_8822B) \
2762 << BIT_SHIFT_8051_MBIST_DONE_8822B)
2763 #define BIT_GET_8051_MBIST_DONE_8822B(x) \
2764 (((x) >> BIT_SHIFT_8051_MBIST_DONE_8822B) & \
2765 BIT_MASK_8051_MBIST_DONE_8822B)
2767 #define BIT_SHIFT_USB_MBIST_DONE_8822B 24
2768 #define BIT_MASK_USB_MBIST_DONE_8822B 0x3
2769 #define BIT_USB_MBIST_DONE_8822B(x) \
2770 (((x) & BIT_MASK_USB_MBIST_DONE_8822B) \
2771 << BIT_SHIFT_USB_MBIST_DONE_8822B)
2772 #define BIT_GET_USB_MBIST_DONE_8822B(x) \
2773 (((x) >> BIT_SHIFT_USB_MBIST_DONE_8822B) & \
2774 BIT_MASK_USB_MBIST_DONE_8822B)
2776 #define BIT_SHIFT_PCIE_MBIST_DONE_8822B 16
2777 #define BIT_MASK_PCIE_MBIST_DONE_8822B 0x3f
2778 #define BIT_PCIE_MBIST_DONE_8822B(x) \
2779 (((x) & BIT_MASK_PCIE_MBIST_DONE_8822B) \
2780 << BIT_SHIFT_PCIE_MBIST_DONE_8822B)
2781 #define BIT_GET_PCIE_MBIST_DONE_8822B(x) \
2782 (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8822B) & \
2783 BIT_MASK_PCIE_MBIST_DONE_8822B)
2785 #define BIT_SHIFT_MAC_MBIST_DONE_8822B 0
2786 #define BIT_MASK_MAC_MBIST_DONE_8822B 0xfff
2787 #define BIT_MAC_MBIST_DONE_8822B(x) \
2788 (((x) & BIT_MASK_MAC_MBIST_DONE_8822B) \
2789 << BIT_SHIFT_MAC_MBIST_DONE_8822B)
2790 #define BIT_GET_MAC_MBIST_DONE_8822B(x) \
2791 (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8822B) & \
2792 BIT_MASK_MAC_MBIST_DONE_8822B)
2794 /* 2 REG_MBIST_FAIL_NRML_8822B */
2796 #define BIT_SHIFT_MBIST_FAIL_NRML_8822B 0
2797 #define BIT_MASK_MBIST_FAIL_NRML_8822B 0xffffffffL
2798 #define BIT_MBIST_FAIL_NRML_8822B(x) \
2799 (((x) & BIT_MASK_MBIST_FAIL_NRML_8822B) \
2800 << BIT_SHIFT_MBIST_FAIL_NRML_8822B)
2801 #define BIT_GET_MBIST_FAIL_NRML_8822B(x) \
2802 (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8822B) & \
2803 BIT_MASK_MBIST_FAIL_NRML_8822B)
2805 /* 2 REG_AES_DECRPT_DATA_8822B */
2807 #define BIT_SHIFT_IPS_CFG_ADDR_8822B 0
2808 #define BIT_MASK_IPS_CFG_ADDR_8822B 0xff
2809 #define BIT_IPS_CFG_ADDR_8822B(x) \
2810 (((x) & BIT_MASK_IPS_CFG_ADDR_8822B) << BIT_SHIFT_IPS_CFG_ADDR_8822B)
2811 #define BIT_GET_IPS_CFG_ADDR_8822B(x) \
2812 (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8822B) & BIT_MASK_IPS_CFG_ADDR_8822B)
2814 /* 2 REG_AES_DECRPT_CFG_8822B */
2816 #define BIT_SHIFT_IPS_CFG_DATA_8822B 0
2817 #define BIT_MASK_IPS_CFG_DATA_8822B 0xffffffffL
2818 #define BIT_IPS_CFG_DATA_8822B(x) \
2819 (((x) & BIT_MASK_IPS_CFG_DATA_8822B) << BIT_SHIFT_IPS_CFG_DATA_8822B)
2820 #define BIT_GET_IPS_CFG_DATA_8822B(x) \
2821 (((x) >> BIT_SHIFT_IPS_CFG_DATA_8822B) & BIT_MASK_IPS_CFG_DATA_8822B)
2823 /* 2 REG_NOT_VALID_8822B */
2825 /* 2 REG_NOT_VALID_8822B */
2827 /* 2 REG_TMETER_8822B */
2828 #define BIT_TEMP_VALID_8822B BIT(31)
2830 #define BIT_SHIFT_TEMP_VALUE_8822B 24
2831 #define BIT_MASK_TEMP_VALUE_8822B 0x3f
2832 #define BIT_TEMP_VALUE_8822B(x) \
2833 (((x) & BIT_MASK_TEMP_VALUE_8822B) << BIT_SHIFT_TEMP_VALUE_8822B)
2834 #define BIT_GET_TEMP_VALUE_8822B(x) \
2835 (((x) >> BIT_SHIFT_TEMP_VALUE_8822B) & BIT_MASK_TEMP_VALUE_8822B)
2837 #define BIT_SHIFT_REG_TMETER_TIMER_8822B 8
2838 #define BIT_MASK_REG_TMETER_TIMER_8822B 0xfff
2839 #define BIT_REG_TMETER_TIMER_8822B(x) \
2840 (((x) & BIT_MASK_REG_TMETER_TIMER_8822B) \
2841 << BIT_SHIFT_REG_TMETER_TIMER_8822B)
2842 #define BIT_GET_REG_TMETER_TIMER_8822B(x) \
2843 (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8822B) & \
2844 BIT_MASK_REG_TMETER_TIMER_8822B)
2846 #define BIT_SHIFT_REG_TEMP_DELTA_8822B 2
2847 #define BIT_MASK_REG_TEMP_DELTA_8822B 0x3f
2848 #define BIT_REG_TEMP_DELTA_8822B(x) \
2849 (((x) & BIT_MASK_REG_TEMP_DELTA_8822B) \
2850 << BIT_SHIFT_REG_TEMP_DELTA_8822B)
2851 #define BIT_GET_REG_TEMP_DELTA_8822B(x) \
2852 (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8822B) & \
2853 BIT_MASK_REG_TEMP_DELTA_8822B)
2855 #define BIT_REG_TMETER_EN_8822B BIT(0)
2857 /* 2 REG_OSC_32K_CTRL_8822B */
2859 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8822B 16
2860 #define BIT_MASK_OSC_32K_CLKGEN_0_8822B 0xffff
2861 #define BIT_OSC_32K_CLKGEN_0_8822B(x) \
2862 (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8822B) \
2863 << BIT_SHIFT_OSC_32K_CLKGEN_0_8822B)
2864 #define BIT_GET_OSC_32K_CLKGEN_0_8822B(x) \
2865 (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8822B) & \
2866 BIT_MASK_OSC_32K_CLKGEN_0_8822B)
2868 #define BIT_SHIFT_OSC_32K_RES_COMP_8822B 4
2869 #define BIT_MASK_OSC_32K_RES_COMP_8822B 0x3
2870 #define BIT_OSC_32K_RES_COMP_8822B(x) \
2871 (((x) & BIT_MASK_OSC_32K_RES_COMP_8822B) \
2872 << BIT_SHIFT_OSC_32K_RES_COMP_8822B)
2873 #define BIT_GET_OSC_32K_RES_COMP_8822B(x) \
2874 (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8822B) & \
2875 BIT_MASK_OSC_32K_RES_COMP_8822B)
2877 #define BIT_OSC_32K_OUT_SEL_8822B BIT(3)
2878 #define BIT_ISO_WL_2_OSC_32K_8822B BIT(1)
2879 #define BIT_POW_CKGEN_8822B BIT(0)
2881 /* 2 REG_32K_CAL_REG1_8822B */
2882 #define BIT_CAL_32K_REG_WR_8822B BIT(31)
2883 #define BIT_CAL_32K_DBG_SEL_8822B BIT(22)
2885 #define BIT_SHIFT_CAL_32K_REG_ADDR_8822B 16
2886 #define BIT_MASK_CAL_32K_REG_ADDR_8822B 0x3f
2887 #define BIT_CAL_32K_REG_ADDR_8822B(x) \
2888 (((x) & BIT_MASK_CAL_32K_REG_ADDR_8822B) \
2889 << BIT_SHIFT_CAL_32K_REG_ADDR_8822B)
2890 #define BIT_GET_CAL_32K_REG_ADDR_8822B(x) \
2891 (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8822B) & \
2892 BIT_MASK_CAL_32K_REG_ADDR_8822B)
2894 #define BIT_SHIFT_CAL_32K_REG_DATA_8822B 0
2895 #define BIT_MASK_CAL_32K_REG_DATA_8822B 0xffff
2896 #define BIT_CAL_32K_REG_DATA_8822B(x) \
2897 (((x) & BIT_MASK_CAL_32K_REG_DATA_8822B) \
2898 << BIT_SHIFT_CAL_32K_REG_DATA_8822B)
2899 #define BIT_GET_CAL_32K_REG_DATA_8822B(x) \
2900 (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8822B) & \
2901 BIT_MASK_CAL_32K_REG_DATA_8822B)
2903 /* 2 REG_NOT_VALID_8822B */
2905 /* 2 REG_C2HEVT_8822B */
2907 #define BIT_SHIFT_C2HEVT_MSG_8822B 0
2908 #define BIT_MASK_C2HEVT_MSG_8822B 0xffffffffffffffffffffffffffffffffL
2909 #define BIT_C2HEVT_MSG_8822B(x) \
2910 (((x) & BIT_MASK_C2HEVT_MSG_8822B) << BIT_SHIFT_C2HEVT_MSG_8822B)
2911 #define BIT_GET_C2HEVT_MSG_8822B(x) \
2912 (((x) >> BIT_SHIFT_C2HEVT_MSG_8822B) & BIT_MASK_C2HEVT_MSG_8822B)
2914 /* 2 REG_SW_DEFINED_PAGE1_8822B */
2916 #define BIT_SHIFT_SW_DEFINED_PAGE1_8822B 0
2917 #define BIT_MASK_SW_DEFINED_PAGE1_8822B 0xffffffffffffffffL
2918 #define BIT_SW_DEFINED_PAGE1_8822B(x) \
2919 (((x) & BIT_MASK_SW_DEFINED_PAGE1_8822B) \
2920 << BIT_SHIFT_SW_DEFINED_PAGE1_8822B)
2921 #define BIT_GET_SW_DEFINED_PAGE1_8822B(x) \
2922 (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_8822B) & \
2923 BIT_MASK_SW_DEFINED_PAGE1_8822B)
2925 /* 2 REG_MCUTST_I_8822B */
2927 #define BIT_SHIFT_MCUDMSG_I_8822B 0
2928 #define BIT_MASK_MCUDMSG_I_8822B 0xffffffffL
2929 #define BIT_MCUDMSG_I_8822B(x) \
2930 (((x) & BIT_MASK_MCUDMSG_I_8822B) << BIT_SHIFT_MCUDMSG_I_8822B)
2931 #define BIT_GET_MCUDMSG_I_8822B(x) \
2932 (((x) >> BIT_SHIFT_MCUDMSG_I_8822B) & BIT_MASK_MCUDMSG_I_8822B)
2934 /* 2 REG_MCUTST_II_8822B */
2936 #define BIT_SHIFT_MCUDMSG_II_8822B 0
2937 #define BIT_MASK_MCUDMSG_II_8822B 0xffffffffL
2938 #define BIT_MCUDMSG_II_8822B(x) \
2939 (((x) & BIT_MASK_MCUDMSG_II_8822B) << BIT_SHIFT_MCUDMSG_II_8822B)
2940 #define BIT_GET_MCUDMSG_II_8822B(x) \
2941 (((x) >> BIT_SHIFT_MCUDMSG_II_8822B) & BIT_MASK_MCUDMSG_II_8822B)
2943 /* 2 REG_FMETHR_8822B */
2944 #define BIT_FMSG_INT_8822B BIT(31)
2946 #define BIT_SHIFT_FW_MSG_8822B 0
2947 #define BIT_MASK_FW_MSG_8822B 0xffffffffL
2948 #define BIT_FW_MSG_8822B(x) \
2949 (((x) & BIT_MASK_FW_MSG_8822B) << BIT_SHIFT_FW_MSG_8822B)
2950 #define BIT_GET_FW_MSG_8822B(x) \
2951 (((x) >> BIT_SHIFT_FW_MSG_8822B) & BIT_MASK_FW_MSG_8822B)
2953 /* 2 REG_HMETFR_8822B */
2955 #define BIT_SHIFT_HRCV_MSG_8822B 24
2956 #define BIT_MASK_HRCV_MSG_8822B 0xff
2957 #define BIT_HRCV_MSG_8822B(x) \
2958 (((x) & BIT_MASK_HRCV_MSG_8822B) << BIT_SHIFT_HRCV_MSG_8822B)
2959 #define BIT_GET_HRCV_MSG_8822B(x) \
2960 (((x) >> BIT_SHIFT_HRCV_MSG_8822B) & BIT_MASK_HRCV_MSG_8822B)
2962 #define BIT_INT_BOX3_8822B BIT(3)
2963 #define BIT_INT_BOX2_8822B BIT(2)
2964 #define BIT_INT_BOX1_8822B BIT(1)
2965 #define BIT_INT_BOX0_8822B BIT(0)
2967 /* 2 REG_HMEBOX0_8822B */
2969 #define BIT_SHIFT_HOST_MSG_0_8822B 0
2970 #define BIT_MASK_HOST_MSG_0_8822B 0xffffffffL
2971 #define BIT_HOST_MSG_0_8822B(x) \
2972 (((x) & BIT_MASK_HOST_MSG_0_8822B) << BIT_SHIFT_HOST_MSG_0_8822B)
2973 #define BIT_GET_HOST_MSG_0_8822B(x) \
2974 (((x) >> BIT_SHIFT_HOST_MSG_0_8822B) & BIT_MASK_HOST_MSG_0_8822B)
2976 /* 2 REG_HMEBOX1_8822B */
2978 #define BIT_SHIFT_HOST_MSG_1_8822B 0
2979 #define BIT_MASK_HOST_MSG_1_8822B 0xffffffffL
2980 #define BIT_HOST_MSG_1_8822B(x) \
2981 (((x) & BIT_MASK_HOST_MSG_1_8822B) << BIT_SHIFT_HOST_MSG_1_8822B)
2982 #define BIT_GET_HOST_MSG_1_8822B(x) \
2983 (((x) >> BIT_SHIFT_HOST_MSG_1_8822B) & BIT_MASK_HOST_MSG_1_8822B)
2985 /* 2 REG_HMEBOX2_8822B */
2987 #define BIT_SHIFT_HOST_MSG_2_8822B 0
2988 #define BIT_MASK_HOST_MSG_2_8822B 0xffffffffL
2989 #define BIT_HOST_MSG_2_8822B(x) \
2990 (((x) & BIT_MASK_HOST_MSG_2_8822B) << BIT_SHIFT_HOST_MSG_2_8822B)
2991 #define BIT_GET_HOST_MSG_2_8822B(x) \
2992 (((x) >> BIT_SHIFT_HOST_MSG_2_8822B) & BIT_MASK_HOST_MSG_2_8822B)
2994 /* 2 REG_HMEBOX3_8822B */
2996 #define BIT_SHIFT_HOST_MSG_3_8822B 0
2997 #define BIT_MASK_HOST_MSG_3_8822B 0xffffffffL
2998 #define BIT_HOST_MSG_3_8822B(x) \
2999 (((x) & BIT_MASK_HOST_MSG_3_8822B) << BIT_SHIFT_HOST_MSG_3_8822B)
3000 #define BIT_GET_HOST_MSG_3_8822B(x) \
3001 (((x) >> BIT_SHIFT_HOST_MSG_3_8822B) & BIT_MASK_HOST_MSG_3_8822B)
3003 /* 2 REG_LLT_INIT_8822B */
3005 #define BIT_SHIFT_LLTE_RWM_8822B 30
3006 #define BIT_MASK_LLTE_RWM_8822B 0x3
3007 #define BIT_LLTE_RWM_8822B(x) \
3008 (((x) & BIT_MASK_LLTE_RWM_8822B) << BIT_SHIFT_LLTE_RWM_8822B)
3009 #define BIT_GET_LLTE_RWM_8822B(x) \
3010 (((x) >> BIT_SHIFT_LLTE_RWM_8822B) & BIT_MASK_LLTE_RWM_8822B)
3012 #define BIT_SHIFT_LLTINI_PDATA_V1_8822B 16
3013 #define BIT_MASK_LLTINI_PDATA_V1_8822B 0xfff
3014 #define BIT_LLTINI_PDATA_V1_8822B(x) \
3015 (((x) & BIT_MASK_LLTINI_PDATA_V1_8822B) \
3016 << BIT_SHIFT_LLTINI_PDATA_V1_8822B)
3017 #define BIT_GET_LLTINI_PDATA_V1_8822B(x) \
3018 (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8822B) & \
3019 BIT_MASK_LLTINI_PDATA_V1_8822B)
3021 #define BIT_SHIFT_LLTINI_HDATA_V1_8822B 0
3022 #define BIT_MASK_LLTINI_HDATA_V1_8822B 0xfff
3023 #define BIT_LLTINI_HDATA_V1_8822B(x) \
3024 (((x) & BIT_MASK_LLTINI_HDATA_V1_8822B) \
3025 << BIT_SHIFT_LLTINI_HDATA_V1_8822B)
3026 #define BIT_GET_LLTINI_HDATA_V1_8822B(x) \
3027 (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8822B) & \
3028 BIT_MASK_LLTINI_HDATA_V1_8822B)
3030 /* 2 REG_LLT_INIT_ADDR_8822B */
3032 #define BIT_SHIFT_LLTINI_ADDR_V1_8822B 0
3033 #define BIT_MASK_LLTINI_ADDR_V1_8822B 0xfff
3034 #define BIT_LLTINI_ADDR_V1_8822B(x) \
3035 (((x) & BIT_MASK_LLTINI_ADDR_V1_8822B) \
3036 << BIT_SHIFT_LLTINI_ADDR_V1_8822B)
3037 #define BIT_GET_LLTINI_ADDR_V1_8822B(x) \
3038 (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8822B) & \
3039 BIT_MASK_LLTINI_ADDR_V1_8822B)
3041 /* 2 REG_BB_ACCESS_CTRL_8822B */
3043 #define BIT_SHIFT_BB_WRITE_READ_8822B 30
3044 #define BIT_MASK_BB_WRITE_READ_8822B 0x3
3045 #define BIT_BB_WRITE_READ_8822B(x) \
3046 (((x) & BIT_MASK_BB_WRITE_READ_8822B) << BIT_SHIFT_BB_WRITE_READ_8822B)
3047 #define BIT_GET_BB_WRITE_READ_8822B(x) \
3048 (((x) >> BIT_SHIFT_BB_WRITE_READ_8822B) & BIT_MASK_BB_WRITE_READ_8822B)
3050 #define BIT_SHIFT_BB_WRITE_EN_8822B 12
3051 #define BIT_MASK_BB_WRITE_EN_8822B 0xf
3052 #define BIT_BB_WRITE_EN_8822B(x) \
3053 (((x) & BIT_MASK_BB_WRITE_EN_8822B) << BIT_SHIFT_BB_WRITE_EN_8822B)
3054 #define BIT_GET_BB_WRITE_EN_8822B(x) \
3055 (((x) >> BIT_SHIFT_BB_WRITE_EN_8822B) & BIT_MASK_BB_WRITE_EN_8822B)
3057 #define BIT_SHIFT_BB_ADDR_8822B 2
3058 #define BIT_MASK_BB_ADDR_8822B 0x1ff
3059 #define BIT_BB_ADDR_8822B(x) \
3060 (((x) & BIT_MASK_BB_ADDR_8822B) << BIT_SHIFT_BB_ADDR_8822B)
3061 #define BIT_GET_BB_ADDR_8822B(x) \
3062 (((x) >> BIT_SHIFT_BB_ADDR_8822B) & BIT_MASK_BB_ADDR_8822B)
3064 #define BIT_BB_ERRACC_8822B BIT(0)
3066 /* 2 REG_BB_ACCESS_DATA_8822B */
3068 #define BIT_SHIFT_BB_DATA_8822B 0
3069 #define BIT_MASK_BB_DATA_8822B 0xffffffffL
3070 #define BIT_BB_DATA_8822B(x) \
3071 (((x) & BIT_MASK_BB_DATA_8822B) << BIT_SHIFT_BB_DATA_8822B)
3072 #define BIT_GET_BB_DATA_8822B(x) \
3073 (((x) >> BIT_SHIFT_BB_DATA_8822B) & BIT_MASK_BB_DATA_8822B)
3075 /* 2 REG_HMEBOX_E0_8822B */
3077 #define BIT_SHIFT_HMEBOX_E0_8822B 0
3078 #define BIT_MASK_HMEBOX_E0_8822B 0xffffffffL
3079 #define BIT_HMEBOX_E0_8822B(x) \
3080 (((x) & BIT_MASK_HMEBOX_E0_8822B) << BIT_SHIFT_HMEBOX_E0_8822B)
3081 #define BIT_GET_HMEBOX_E0_8822B(x) \
3082 (((x) >> BIT_SHIFT_HMEBOX_E0_8822B) & BIT_MASK_HMEBOX_E0_8822B)
3084 /* 2 REG_HMEBOX_E1_8822B */
3086 #define BIT_SHIFT_HMEBOX_E1_8822B 0
3087 #define BIT_MASK_HMEBOX_E1_8822B 0xffffffffL
3088 #define BIT_HMEBOX_E1_8822B(x) \
3089 (((x) & BIT_MASK_HMEBOX_E1_8822B) << BIT_SHIFT_HMEBOX_E1_8822B)
3090 #define BIT_GET_HMEBOX_E1_8822B(x) \
3091 (((x) >> BIT_SHIFT_HMEBOX_E1_8822B) & BIT_MASK_HMEBOX_E1_8822B)
3093 /* 2 REG_HMEBOX_E2_8822B */
3095 #define BIT_SHIFT_HMEBOX_E2_8822B 0
3096 #define BIT_MASK_HMEBOX_E2_8822B 0xffffffffL
3097 #define BIT_HMEBOX_E2_8822B(x) \
3098 (((x) & BIT_MASK_HMEBOX_E2_8822B) << BIT_SHIFT_HMEBOX_E2_8822B)
3099 #define BIT_GET_HMEBOX_E2_8822B(x) \
3100 (((x) >> BIT_SHIFT_HMEBOX_E2_8822B) & BIT_MASK_HMEBOX_E2_8822B)
3102 /* 2 REG_HMEBOX_E3_8822B */
3104 #define BIT_SHIFT_HMEBOX_E3_8822B 0
3105 #define BIT_MASK_HMEBOX_E3_8822B 0xffffffffL
3106 #define BIT_HMEBOX_E3_8822B(x) \
3107 (((x) & BIT_MASK_HMEBOX_E3_8822B) << BIT_SHIFT_HMEBOX_E3_8822B)
3108 #define BIT_GET_HMEBOX_E3_8822B(x) \
3109 (((x) >> BIT_SHIFT_HMEBOX_E3_8822B) & BIT_MASK_HMEBOX_E3_8822B)
3111 /* 2 REG_NOT_VALID_8822B */
3113 /* 2 REG_CR_EXT_8822B */
3115 #define BIT_SHIFT_PHY_REQ_DELAY_8822B 24
3116 #define BIT_MASK_PHY_REQ_DELAY_8822B 0xf
3117 #define BIT_PHY_REQ_DELAY_8822B(x) \
3118 (((x) & BIT_MASK_PHY_REQ_DELAY_8822B) << BIT_SHIFT_PHY_REQ_DELAY_8822B)
3119 #define BIT_GET_PHY_REQ_DELAY_8822B(x) \
3120 (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8822B) & BIT_MASK_PHY_REQ_DELAY_8822B)
3122 #define BIT_SPD_DOWN_8822B BIT(16)
3124 #define BIT_SHIFT_NETYPE4_8822B 4
3125 #define BIT_MASK_NETYPE4_8822B 0x3
3126 #define BIT_NETYPE4_8822B(x) \
3127 (((x) & BIT_MASK_NETYPE4_8822B) << BIT_SHIFT_NETYPE4_8822B)
3128 #define BIT_GET_NETYPE4_8822B(x) \
3129 (((x) >> BIT_SHIFT_NETYPE4_8822B) & BIT_MASK_NETYPE4_8822B)
3131 #define BIT_SHIFT_NETYPE3_8822B 2
3132 #define BIT_MASK_NETYPE3_8822B 0x3
3133 #define BIT_NETYPE3_8822B(x) \
3134 (((x) & BIT_MASK_NETYPE3_8822B) << BIT_SHIFT_NETYPE3_8822B)
3135 #define BIT_GET_NETYPE3_8822B(x) \
3136 (((x) >> BIT_SHIFT_NETYPE3_8822B) & BIT_MASK_NETYPE3_8822B)
3138 #define BIT_SHIFT_NETYPE2_8822B 0
3139 #define BIT_MASK_NETYPE2_8822B 0x3
3140 #define BIT_NETYPE2_8822B(x) \
3141 (((x) & BIT_MASK_NETYPE2_8822B) << BIT_SHIFT_NETYPE2_8822B)
3142 #define BIT_GET_NETYPE2_8822B(x) \
3143 (((x) >> BIT_SHIFT_NETYPE2_8822B) & BIT_MASK_NETYPE2_8822B)
3145 /* 2 REG_FWFF_8822B */
3147 #define BIT_SHIFT_PKTNUM_TH_V1_8822B 24
3148 #define BIT_MASK_PKTNUM_TH_V1_8822B 0xff
3149 #define BIT_PKTNUM_TH_V1_8822B(x) \
3150 (((x) & BIT_MASK_PKTNUM_TH_V1_8822B) << BIT_SHIFT_PKTNUM_TH_V1_8822B)
3151 #define BIT_GET_PKTNUM_TH_V1_8822B(x) \
3152 (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8822B) & BIT_MASK_PKTNUM_TH_V1_8822B)
3154 #define BIT_SHIFT_TIMER_TH_8822B 16
3155 #define BIT_MASK_TIMER_TH_8822B 0xff
3156 #define BIT_TIMER_TH_8822B(x) \
3157 (((x) & BIT_MASK_TIMER_TH_8822B) << BIT_SHIFT_TIMER_TH_8822B)
3158 #define BIT_GET_TIMER_TH_8822B(x) \
3159 (((x) >> BIT_SHIFT_TIMER_TH_8822B) & BIT_MASK_TIMER_TH_8822B)
3161 #define BIT_SHIFT_RXPKT1ENADDR_8822B 0
3162 #define BIT_MASK_RXPKT1ENADDR_8822B 0xffff
3163 #define BIT_RXPKT1ENADDR_8822B(x) \
3164 (((x) & BIT_MASK_RXPKT1ENADDR_8822B) << BIT_SHIFT_RXPKT1ENADDR_8822B)
3165 #define BIT_GET_RXPKT1ENADDR_8822B(x) \
3166 (((x) >> BIT_SHIFT_RXPKT1ENADDR_8822B) & BIT_MASK_RXPKT1ENADDR_8822B)
3168 /* 2 REG_RXFF_PTR_V1_8822B */
3170 /* 2 REG_NOT_VALID_8822B */
3172 #define BIT_SHIFT_RXFF0_RDPTR_V2_8822B 0
3173 #define BIT_MASK_RXFF0_RDPTR_V2_8822B 0x3ffff
3174 #define BIT_RXFF0_RDPTR_V2_8822B(x) \
3175 (((x) & BIT_MASK_RXFF0_RDPTR_V2_8822B) \
3176 << BIT_SHIFT_RXFF0_RDPTR_V2_8822B)
3177 #define BIT_GET_RXFF0_RDPTR_V2_8822B(x) \
3178 (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8822B) & \
3179 BIT_MASK_RXFF0_RDPTR_V2_8822B)
3181 /* 2 REG_RXFF_WTR_V1_8822B */
3183 /* 2 REG_NOT_VALID_8822B */
3185 #define BIT_SHIFT_RXFF0_WTPTR_V2_8822B 0
3186 #define BIT_MASK_RXFF0_WTPTR_V2_8822B 0x3ffff
3187 #define BIT_RXFF0_WTPTR_V2_8822B(x) \
3188 (((x) & BIT_MASK_RXFF0_WTPTR_V2_8822B) \
3189 << BIT_SHIFT_RXFF0_WTPTR_V2_8822B)
3190 #define BIT_GET_RXFF0_WTPTR_V2_8822B(x) \
3191 (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8822B) & \
3192 BIT_MASK_RXFF0_WTPTR_V2_8822B)
3194 /* 2 REG_FE2IMR_8822B */
3195 #define BIT__FE4ISR__IND_MSK_8822B BIT(29)
3196 #define BIT_FS_TXSC_DESC_DONE_INT_EN_8822B BIT(28)
3197 #define BIT_FS_TXSC_BKDONE_INT_EN_8822B BIT(27)
3198 #define BIT_FS_TXSC_BEDONE_INT_EN_8822B BIT(26)
3199 #define BIT_FS_TXSC_VIDONE_INT_EN_8822B BIT(25)
3200 #define BIT_FS_TXSC_VODONE_INT_EN_8822B BIT(24)
3201 #define BIT_FS_ATIM_MB7_INT_EN_8822B BIT(23)
3202 #define BIT_FS_ATIM_MB6_INT_EN_8822B BIT(22)
3203 #define BIT_FS_ATIM_MB5_INT_EN_8822B BIT(21)
3204 #define BIT_FS_ATIM_MB4_INT_EN_8822B BIT(20)
3205 #define BIT_FS_ATIM_MB3_INT_EN_8822B BIT(19)
3206 #define BIT_FS_ATIM_MB2_INT_EN_8822B BIT(18)
3207 #define BIT_FS_ATIM_MB1_INT_EN_8822B BIT(17)
3208 #define BIT_FS_ATIM_MB0_INT_EN_8822B BIT(16)
3209 #define BIT_FS_TBTT4INT_EN_8822B BIT(11)
3210 #define BIT_FS_TBTT3INT_EN_8822B BIT(10)
3211 #define BIT_FS_TBTT2INT_EN_8822B BIT(9)
3212 #define BIT_FS_TBTT1INT_EN_8822B BIT(8)
3213 #define BIT_FS_TBTT0_MB7INT_EN_8822B BIT(7)
3214 #define BIT_FS_TBTT0_MB6INT_EN_8822B BIT(6)
3215 #define BIT_FS_TBTT0_MB5INT_EN_8822B BIT(5)
3216 #define BIT_FS_TBTT0_MB4INT_EN_8822B BIT(4)
3217 #define BIT_FS_TBTT0_MB3INT_EN_8822B BIT(3)
3218 #define BIT_FS_TBTT0_MB2INT_EN_8822B BIT(2)
3219 #define BIT_FS_TBTT0_MB1INT_EN_8822B BIT(1)
3220 #define BIT_FS_TBTT0_INT_EN_8822B BIT(0)
3222 /* 2 REG_FE2ISR_8822B */
3223 #define BIT__FE4ISR__IND_INT_8822B BIT(29)
3224 #define BIT_FS_TXSC_DESC_DONE_INT_8822B BIT(28)
3225 #define BIT_FS_TXSC_BKDONE_INT_8822B BIT(27)
3226 #define BIT_FS_TXSC_BEDONE_INT_8822B BIT(26)
3227 #define BIT_FS_TXSC_VIDONE_INT_8822B BIT(25)
3228 #define BIT_FS_TXSC_VODONE_INT_8822B BIT(24)
3229 #define BIT_FS_ATIM_MB7_INT_8822B BIT(23)
3230 #define BIT_FS_ATIM_MB6_INT_8822B BIT(22)
3231 #define BIT_FS_ATIM_MB5_INT_8822B BIT(21)
3232 #define BIT_FS_ATIM_MB4_INT_8822B BIT(20)
3233 #define BIT_FS_ATIM_MB3_INT_8822B BIT(19)
3234 #define BIT_FS_ATIM_MB2_INT_8822B BIT(18)
3235 #define BIT_FS_ATIM_MB1_INT_8822B BIT(17)
3236 #define BIT_FS_ATIM_MB0_INT_8822B BIT(16)
3237 #define BIT_FS_TBTT4INT_8822B BIT(11)
3238 #define BIT_FS_TBTT3INT_8822B BIT(10)
3239 #define BIT_FS_TBTT2INT_8822B BIT(9)
3240 #define BIT_FS_TBTT1INT_8822B BIT(8)
3241 #define BIT_FS_TBTT0_MB7INT_8822B BIT(7)
3242 #define BIT_FS_TBTT0_MB6INT_8822B BIT(6)
3243 #define BIT_FS_TBTT0_MB5INT_8822B BIT(5)
3244 #define BIT_FS_TBTT0_MB4INT_8822B BIT(4)
3245 #define BIT_FS_TBTT0_MB3INT_8822B BIT(3)
3246 #define BIT_FS_TBTT0_MB2INT_8822B BIT(2)
3247 #define BIT_FS_TBTT0_MB1INT_8822B BIT(1)
3248 #define BIT_FS_TBTT0_INT_8822B BIT(0)
3250 /* 2 REG_FE3IMR_8822B */
3251 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT__EN_8822B BIT(31)
3252 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT__EN_8822B BIT(30)
3253 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT__EN_8822B BIT(29)
3254 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT__EN_8822B BIT(28)
3255 #define BIT_FS_BCNDMA4_INT_EN_8822B BIT(27)
3256 #define BIT_FS_BCNDMA3_INT_EN_8822B BIT(26)
3257 #define BIT_FS_BCNDMA2_INT_EN_8822B BIT(25)
3258 #define BIT_FS_BCNDMA1_INT_EN_8822B BIT(24)
3259 #define BIT_FS_BCNDMA0_MB7_INT_EN_8822B BIT(23)
3260 #define BIT_FS_BCNDMA0_MB6_INT_EN_8822B BIT(22)
3261 #define BIT_FS_BCNDMA0_MB5_INT_EN_8822B BIT(21)
3262 #define BIT_FS_BCNDMA0_MB4_INT_EN_8822B BIT(20)
3263 #define BIT_FS_BCNDMA0_MB3_INT_EN_8822B BIT(19)
3264 #define BIT_FS_BCNDMA0_MB2_INT_EN_8822B BIT(18)
3265 #define BIT_FS_BCNDMA0_MB1_INT_EN_8822B BIT(17)
3266 #define BIT_FS_BCNDMA0_INT_EN_8822B BIT(16)
3267 #define BIT_FS_MTI_BCNIVLEAR_INT__EN_8822B BIT(15)
3268 #define BIT_FS_BCNERLY4_INT_EN_8822B BIT(11)
3269 #define BIT_FS_BCNERLY3_INT_EN_8822B BIT(10)
3270 #define BIT_FS_BCNERLY2_INT_EN_8822B BIT(9)
3271 #define BIT_FS_BCNERLY1_INT_EN_8822B BIT(8)
3272 #define BIT_FS_BCNERLY0_MB7INT_EN_8822B BIT(7)
3273 #define BIT_FS_BCNERLY0_MB6INT_EN_8822B BIT(6)
3274 #define BIT_FS_BCNERLY0_MB5INT_EN_8822B BIT(5)
3275 #define BIT_FS_BCNERLY0_MB4INT_EN_8822B BIT(4)
3276 #define BIT_FS_BCNERLY0_MB3INT_EN_8822B BIT(3)
3277 #define BIT_FS_BCNERLY0_MB2INT_EN_8822B BIT(2)
3278 #define BIT_FS_BCNERLY0_MB1INT_EN_8822B BIT(1)
3279 #define BIT_FS_BCNERLY0_INT_EN_8822B BIT(0)
3281 /* 2 REG_FE3ISR_8822B */
3282 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT_8822B BIT(31)
3283 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT_8822B BIT(30)
3284 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT_8822B BIT(29)
3285 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT_8822B BIT(28)
3286 #define BIT_FS_BCNDMA4_INT_8822B BIT(27)
3287 #define BIT_FS_BCNDMA3_INT_8822B BIT(26)
3288 #define BIT_FS_BCNDMA2_INT_8822B BIT(25)
3289 #define BIT_FS_BCNDMA1_INT_8822B BIT(24)
3290 #define BIT_FS_BCNDMA0_MB7_INT_8822B BIT(23)
3291 #define BIT_FS_BCNDMA0_MB6_INT_8822B BIT(22)
3292 #define BIT_FS_BCNDMA0_MB5_INT_8822B BIT(21)
3293 #define BIT_FS_BCNDMA0_MB4_INT_8822B BIT(20)
3294 #define BIT_FS_BCNDMA0_MB3_INT_8822B BIT(19)
3295 #define BIT_FS_BCNDMA0_MB2_INT_8822B BIT(18)
3296 #define BIT_FS_BCNDMA0_MB1_INT_8822B BIT(17)
3297 #define BIT_FS_BCNDMA0_INT_8822B BIT(16)
3298 #define BIT_FS_MTI_BCNIVLEAR_INT_8822B BIT(15)
3299 #define BIT_FS_BCNERLY4_INT_8822B BIT(11)
3300 #define BIT_FS_BCNERLY3_INT_8822B BIT(10)
3301 #define BIT_FS_BCNERLY2_INT_8822B BIT(9)
3302 #define BIT_FS_BCNERLY1_INT_8822B BIT(8)
3303 #define BIT_FS_BCNERLY0_MB7INT_8822B BIT(7)
3304 #define BIT_FS_BCNERLY0_MB6INT_8822B BIT(6)
3305 #define BIT_FS_BCNERLY0_MB5INT_8822B BIT(5)
3306 #define BIT_FS_BCNERLY0_MB4INT_8822B BIT(4)
3307 #define BIT_FS_BCNERLY0_MB3INT_8822B BIT(3)
3308 #define BIT_FS_BCNERLY0_MB2INT_8822B BIT(2)
3309 #define BIT_FS_BCNERLY0_MB1INT_8822B BIT(1)
3310 #define BIT_FS_BCNERLY0_INT_8822B BIT(0)
3312 /* 2 REG_FE4IMR_8822B */
3313 #define BIT_FS_CLI3_TXPKTIN_INT_EN_8822B BIT(19)
3314 #define BIT_FS_CLI2_TXPKTIN_INT_EN_8822B BIT(18)
3315 #define BIT_FS_CLI1_TXPKTIN_INT_EN_8822B BIT(17)
3316 #define BIT_FS_CLI0_TXPKTIN_INT_EN_8822B BIT(16)
3317 #define BIT_FS_CLI3_RX_UMD0_INT_EN_8822B BIT(15)
3318 #define BIT_FS_CLI3_RX_UMD1_INT_EN_8822B BIT(14)
3319 #define BIT_FS_CLI3_RX_BMD0_INT_EN_8822B BIT(13)
3320 #define BIT_FS_CLI3_RX_BMD1_INT_EN_8822B BIT(12)
3321 #define BIT_FS_CLI2_RX_UMD0_INT_EN_8822B BIT(11)
3322 #define BIT_FS_CLI2_RX_UMD1_INT_EN_8822B BIT(10)
3323 #define BIT_FS_CLI2_RX_BMD0_INT_EN_8822B BIT(9)
3324 #define BIT_FS_CLI2_RX_BMD1_INT_EN_8822B BIT(8)
3325 #define BIT_FS_CLI1_RX_UMD0_INT_EN_8822B BIT(7)
3326 #define BIT_FS_CLI1_RX_UMD1_INT_EN_8822B BIT(6)
3327 #define BIT_FS_CLI1_RX_BMD0_INT_EN_8822B BIT(5)
3328 #define BIT_FS_CLI1_RX_BMD1_INT_EN_8822B BIT(4)
3329 #define BIT_FS_CLI0_RX_UMD0_INT_EN_8822B BIT(3)
3330 #define BIT_FS_CLI0_RX_UMD1_INT_EN_8822B BIT(2)
3331 #define BIT_FS_CLI0_RX_BMD0_INT_EN_8822B BIT(1)
3332 #define BIT_FS_CLI0_RX_BMD1_INT_EN_8822B BIT(0)
3334 /* 2 REG_FE4ISR_8822B */
3335 #define BIT_FS_CLI3_TXPKTIN_INT_8822B BIT(19)
3336 #define BIT_FS_CLI2_TXPKTIN_INT_8822B BIT(18)
3337 #define BIT_FS_CLI1_TXPKTIN_INT_8822B BIT(17)
3338 #define BIT_FS_CLI0_TXPKTIN_INT_8822B BIT(16)
3339 #define BIT_FS_CLI3_RX_UMD0_INT_8822B BIT(15)
3340 #define BIT_FS_CLI3_RX_UMD1_INT_8822B BIT(14)
3341 #define BIT_FS_CLI3_RX_BMD0_INT_8822B BIT(13)
3342 #define BIT_FS_CLI3_RX_BMD1_INT_8822B BIT(12)
3343 #define BIT_FS_CLI2_RX_UMD0_INT_8822B BIT(11)
3344 #define BIT_FS_CLI2_RX_UMD1_INT_8822B BIT(10)
3345 #define BIT_FS_CLI2_RX_BMD0_INT_8822B BIT(9)
3346 #define BIT_FS_CLI2_RX_BMD1_INT_8822B BIT(8)
3347 #define BIT_FS_CLI1_RX_UMD0_INT_8822B BIT(7)
3348 #define BIT_FS_CLI1_RX_UMD1_INT_8822B BIT(6)
3349 #define BIT_FS_CLI1_RX_BMD0_INT_8822B BIT(5)
3350 #define BIT_FS_CLI1_RX_BMD1_INT_8822B BIT(4)
3351 #define BIT_FS_CLI0_RX_UMD0_INT_8822B BIT(3)
3352 #define BIT_FS_CLI0_RX_UMD1_INT_8822B BIT(2)
3353 #define BIT_FS_CLI0_RX_BMD0_INT_8822B BIT(1)
3354 #define BIT_FS_CLI0_RX_BMD1_INT_8822B BIT(0)
3356 /* 2 REG_FT1IMR_8822B */
3357 #define BIT__FT2ISR__IND_MSK_8822B BIT(30)
3358 #define BIT_FTM_PTT_INT_EN_8822B BIT(29)
3359 #define BIT_RXFTMREQ_INT_EN_8822B BIT(28)
3360 #define BIT_RXFTM_INT_EN_8822B BIT(27)
3361 #define BIT_TXFTM_INT_EN_8822B BIT(26)
3362 #define BIT_FS_H2C_CMD_OK_INT_EN_8822B BIT(25)
3363 #define BIT_FS_H2C_CMD_FULL_INT_EN_8822B BIT(24)
3364 #define BIT_FS_MACID_PWRCHANGE5_INT_EN_8822B BIT(23)
3365 #define BIT_FS_MACID_PWRCHANGE4_INT_EN_8822B BIT(22)
3366 #define BIT_FS_MACID_PWRCHANGE3_INT_EN_8822B BIT(21)
3367 #define BIT_FS_MACID_PWRCHANGE2_INT_EN_8822B BIT(20)
3368 #define BIT_FS_MACID_PWRCHANGE1_INT_EN_8822B BIT(19)
3369 #define BIT_FS_MACID_PWRCHANGE0_INT_EN_8822B BIT(18)
3370 #define BIT_FS_CTWEND2_INT_EN_8822B BIT(17)
3371 #define BIT_FS_CTWEND1_INT_EN_8822B BIT(16)
3372 #define BIT_FS_CTWEND0_INT_EN_8822B BIT(15)
3373 #define BIT_FS_TX_NULL1_INT_EN_8822B BIT(14)
3374 #define BIT_FS_TX_NULL0_INT_EN_8822B BIT(13)
3375 #define BIT_FS_TSF_BIT32_TOGGLE_EN_8822B BIT(12)
3376 #define BIT_FS_P2P_RFON2_INT_EN_8822B BIT(11)
3377 #define BIT_FS_P2P_RFOFF2_INT_EN_8822B BIT(10)
3378 #define BIT_FS_P2P_RFON1_INT_EN_8822B BIT(9)
3379 #define BIT_FS_P2P_RFOFF1_INT_EN_8822B BIT(8)
3380 #define BIT_FS_P2P_RFON0_INT_EN_8822B BIT(7)
3381 #define BIT_FS_P2P_RFOFF0_INT_EN_8822B BIT(6)
3382 #define BIT_FS_RX_UAPSDMD1_EN_8822B BIT(5)
3383 #define BIT_FS_RX_UAPSDMD0_EN_8822B BIT(4)
3384 #define BIT_FS_TRIGGER_PKT_EN_8822B BIT(3)
3385 #define BIT_FS_EOSP_INT_EN_8822B BIT(2)
3386 #define BIT_FS_RPWM2_INT_EN_8822B BIT(1)
3387 #define BIT_FS_RPWM_INT_EN_8822B BIT(0)
3389 /* 2 REG_FT1ISR_8822B */
3390 #define BIT__FT2ISR__IND_INT_8822B BIT(30)
3391 #define BIT_FTM_PTT_INT_8822B BIT(29)
3392 #define BIT_RXFTMREQ_INT_8822B BIT(28)
3393 #define BIT_RXFTM_INT_8822B BIT(27)
3394 #define BIT_TXFTM_INT_8822B BIT(26)
3395 #define BIT_FS_H2C_CMD_OK_INT_8822B BIT(25)
3396 #define BIT_FS_H2C_CMD_FULL_INT_8822B BIT(24)
3397 #define BIT_FS_MACID_PWRCHANGE5_INT_8822B BIT(23)
3398 #define BIT_FS_MACID_PWRCHANGE4_INT_8822B BIT(22)
3399 #define BIT_FS_MACID_PWRCHANGE3_INT_8822B BIT(21)
3400 #define BIT_FS_MACID_PWRCHANGE2_INT_8822B BIT(20)
3401 #define BIT_FS_MACID_PWRCHANGE1_INT_8822B BIT(19)
3402 #define BIT_FS_MACID_PWRCHANGE0_INT_8822B BIT(18)
3403 #define BIT_FS_CTWEND2_INT_8822B BIT(17)
3404 #define BIT_FS_CTWEND1_INT_8822B BIT(16)
3405 #define BIT_FS_CTWEND0_INT_8822B BIT(15)
3406 #define BIT_FS_TX_NULL1_INT_8822B BIT(14)
3407 #define BIT_FS_TX_NULL0_INT_8822B BIT(13)
3408 #define BIT_FS_TSF_BIT32_TOGGLE_INT_8822B BIT(12)
3409 #define BIT_FS_P2P_RFON2_INT_8822B BIT(11)
3410 #define BIT_FS_P2P_RFOFF2_INT_8822B BIT(10)
3411 #define BIT_FS_P2P_RFON1_INT_8822B BIT(9)
3412 #define BIT_FS_P2P_RFOFF1_INT_8822B BIT(8)
3413 #define BIT_FS_P2P_RFON0_INT_8822B BIT(7)
3414 #define BIT_FS_P2P_RFOFF0_INT_8822B BIT(6)
3415 #define BIT_FS_RX_UAPSDMD1_INT_8822B BIT(5)
3416 #define BIT_FS_RX_UAPSDMD0_INT_8822B BIT(4)
3417 #define BIT_FS_TRIGGER_PKT_INT_8822B BIT(3)
3418 #define BIT_FS_EOSP_INT_8822B BIT(2)
3419 #define BIT_FS_RPWM2_INT_8822B BIT(1)
3420 #define BIT_FS_RPWM_INT_8822B BIT(0)
3422 /* 2 REG_SPWR0_8822B */
3424 #define BIT_SHIFT_MID_31TO0_8822B 0
3425 #define BIT_MASK_MID_31TO0_8822B 0xffffffffL
3426 #define BIT_MID_31TO0_8822B(x) \
3427 (((x) & BIT_MASK_MID_31TO0_8822B) << BIT_SHIFT_MID_31TO0_8822B)
3428 #define BIT_GET_MID_31TO0_8822B(x) \
3429 (((x) >> BIT_SHIFT_MID_31TO0_8822B) & BIT_MASK_MID_31TO0_8822B)
3431 /* 2 REG_SPWR1_8822B */
3433 #define BIT_SHIFT_MID_63TO32_8822B 0
3434 #define BIT_MASK_MID_63TO32_8822B 0xffffffffL
3435 #define BIT_MID_63TO32_8822B(x) \
3436 (((x) & BIT_MASK_MID_63TO32_8822B) << BIT_SHIFT_MID_63TO32_8822B)
3437 #define BIT_GET_MID_63TO32_8822B(x) \
3438 (((x) >> BIT_SHIFT_MID_63TO32_8822B) & BIT_MASK_MID_63TO32_8822B)
3440 /* 2 REG_SPWR2_8822B */
3442 #define BIT_SHIFT_MID_95O64_8822B 0
3443 #define BIT_MASK_MID_95O64_8822B 0xffffffffL
3444 #define BIT_MID_95O64_8822B(x) \
3445 (((x) & BIT_MASK_MID_95O64_8822B) << BIT_SHIFT_MID_95O64_8822B)
3446 #define BIT_GET_MID_95O64_8822B(x) \
3447 (((x) >> BIT_SHIFT_MID_95O64_8822B) & BIT_MASK_MID_95O64_8822B)
3449 /* 2 REG_SPWR3_8822B */
3451 #define BIT_SHIFT_MID_127TO96_8822B 0
3452 #define BIT_MASK_MID_127TO96_8822B 0xffffffffL
3453 #define BIT_MID_127TO96_8822B(x) \
3454 (((x) & BIT_MASK_MID_127TO96_8822B) << BIT_SHIFT_MID_127TO96_8822B)
3455 #define BIT_GET_MID_127TO96_8822B(x) \
3456 (((x) >> BIT_SHIFT_MID_127TO96_8822B) & BIT_MASK_MID_127TO96_8822B)
3458 /* 2 REG_POWSEQ_8822B */
3460 #define BIT_SHIFT_SEQNUM_MID_8822B 16
3461 #define BIT_MASK_SEQNUM_MID_8822B 0xffff
3462 #define BIT_SEQNUM_MID_8822B(x) \
3463 (((x) & BIT_MASK_SEQNUM_MID_8822B) << BIT_SHIFT_SEQNUM_MID_8822B)
3464 #define BIT_GET_SEQNUM_MID_8822B(x) \
3465 (((x) >> BIT_SHIFT_SEQNUM_MID_8822B) & BIT_MASK_SEQNUM_MID_8822B)
3467 #define BIT_SHIFT_REF_MID_8822B 0
3468 #define BIT_MASK_REF_MID_8822B 0x7f
3469 #define BIT_REF_MID_8822B(x) \
3470 (((x) & BIT_MASK_REF_MID_8822B) << BIT_SHIFT_REF_MID_8822B)
3471 #define BIT_GET_REF_MID_8822B(x) \
3472 (((x) >> BIT_SHIFT_REF_MID_8822B) & BIT_MASK_REF_MID_8822B)
3474 /* 2 REG_TC7_CTRL_V1_8822B */
3475 #define BIT_TC7INT_EN_8822B BIT(26)
3476 #define BIT_TC7MODE_8822B BIT(25)
3477 #define BIT_TC7EN_8822B BIT(24)
3479 #define BIT_SHIFT_TC7DATA_8822B 0
3480 #define BIT_MASK_TC7DATA_8822B 0xffffff
3481 #define BIT_TC7DATA_8822B(x) \
3482 (((x) & BIT_MASK_TC7DATA_8822B) << BIT_SHIFT_TC7DATA_8822B)
3483 #define BIT_GET_TC7DATA_8822B(x) \
3484 (((x) >> BIT_SHIFT_TC7DATA_8822B) & BIT_MASK_TC7DATA_8822B)
3486 /* 2 REG_TC8_CTRL_V1_8822B */
3487 #define BIT_TC8INT_EN_8822B BIT(26)
3488 #define BIT_TC8MODE_8822B BIT(25)
3489 #define BIT_TC8EN_8822B BIT(24)
3491 #define BIT_SHIFT_TC8DATA_8822B 0
3492 #define BIT_MASK_TC8DATA_8822B 0xffffff
3493 #define BIT_TC8DATA_8822B(x) \
3494 (((x) & BIT_MASK_TC8DATA_8822B) << BIT_SHIFT_TC8DATA_8822B)
3495 #define BIT_GET_TC8DATA_8822B(x) \
3496 (((x) >> BIT_SHIFT_TC8DATA_8822B) & BIT_MASK_TC8DATA_8822B)
3498 /* 2 REG_FT2IMR_8822B */
3499 #define BIT_FS_CLI3_RX_UAPSDMD1_EN_8822B BIT(31)
3500 #define BIT_FS_CLI3_RX_UAPSDMD0_EN_8822B BIT(30)
3501 #define BIT_FS_CLI3_TRIGGER_PKT_EN_8822B BIT(29)
3502 #define BIT_FS_CLI3_EOSP_INT_EN_8822B BIT(28)
3503 #define BIT_FS_CLI2_RX_UAPSDMD1_EN_8822B BIT(27)
3504 #define BIT_FS_CLI2_RX_UAPSDMD0_EN_8822B BIT(26)
3505 #define BIT_FS_CLI2_TRIGGER_PKT_EN_8822B BIT(25)
3506 #define BIT_FS_CLI2_EOSP_INT_EN_8822B BIT(24)
3507 #define BIT_FS_CLI1_RX_UAPSDMD1_EN_8822B BIT(23)
3508 #define BIT_FS_CLI1_RX_UAPSDMD0_EN_8822B BIT(22)
3509 #define BIT_FS_CLI1_TRIGGER_PKT_EN_8822B BIT(21)
3510 #define BIT_FS_CLI1_EOSP_INT_EN_8822B BIT(20)
3511 #define BIT_FS_CLI0_RX_UAPSDMD1_EN_8822B BIT(19)
3512 #define BIT_FS_CLI0_RX_UAPSDMD0_EN_8822B BIT(18)
3513 #define BIT_FS_CLI0_TRIGGER_PKT_EN_8822B BIT(17)
3514 #define BIT_FS_CLI0_EOSP_INT_EN_8822B BIT(16)
3515 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_EN_8822B BIT(9)
3516 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_EN_8822B BIT(8)
3517 #define BIT_FS_CLI3_TX_NULL1_INT_EN_8822B BIT(7)
3518 #define BIT_FS_CLI3_TX_NULL0_INT_EN_8822B BIT(6)
3519 #define BIT_FS_CLI2_TX_NULL1_INT_EN_8822B BIT(5)
3520 #define BIT_FS_CLI2_TX_NULL0_INT_EN_8822B BIT(4)
3521 #define BIT_FS_CLI1_TX_NULL1_INT_EN_8822B BIT(3)
3522 #define BIT_FS_CLI1_TX_NULL0_INT_EN_8822B BIT(2)
3523 #define BIT_FS_CLI0_TX_NULL1_INT_EN_8822B BIT(1)
3524 #define BIT_FS_CLI0_TX_NULL0_INT_EN_8822B BIT(0)
3526 /* 2 REG_FT2ISR_8822B */
3527 #define BIT_FS_CLI3_RX_UAPSDMD1_INT_8822B BIT(31)
3528 #define BIT_FS_CLI3_RX_UAPSDMD0_INT_8822B BIT(30)
3529 #define BIT_FS_CLI3_TRIGGER_PKT_INT_8822B BIT(29)
3530 #define BIT_FS_CLI3_EOSP_INT_8822B BIT(28)
3531 #define BIT_FS_CLI2_RX_UAPSDMD1_INT_8822B BIT(27)
3532 #define BIT_FS_CLI2_RX_UAPSDMD0_INT_8822B BIT(26)
3533 #define BIT_FS_CLI2_TRIGGER_PKT_INT_8822B BIT(25)
3534 #define BIT_FS_CLI2_EOSP_INT_8822B BIT(24)
3535 #define BIT_FS_CLI1_RX_UAPSDMD1_INT_8822B BIT(23)
3536 #define BIT_FS_CLI1_RX_UAPSDMD0_INT_8822B BIT(22)
3537 #define BIT_FS_CLI1_TRIGGER_PKT_INT_8822B BIT(21)
3538 #define BIT_FS_CLI1_EOSP_INT_8822B BIT(20)
3539 #define BIT_FS_CLI0_RX_UAPSDMD1_INT_8822B BIT(19)
3540 #define BIT_FS_CLI0_RX_UAPSDMD0_INT_8822B BIT(18)
3541 #define BIT_FS_CLI0_TRIGGER_PKT_INT_8822B BIT(17)
3542 #define BIT_FS_CLI0_EOSP_INT_8822B BIT(16)
3543 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_INT_8822B BIT(9)
3544 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_INT_8822B BIT(8)
3545 #define BIT_FS_CLI3_TX_NULL1_INT_8822B BIT(7)
3546 #define BIT_FS_CLI3_TX_NULL0_INT_8822B BIT(6)
3547 #define BIT_FS_CLI2_TX_NULL1_INT_8822B BIT(5)
3548 #define BIT_FS_CLI2_TX_NULL0_INT_8822B BIT(4)
3549 #define BIT_FS_CLI1_TX_NULL1_INT_8822B BIT(3)
3550 #define BIT_FS_CLI1_TX_NULL0_INT_8822B BIT(2)
3551 #define BIT_FS_CLI0_TX_NULL1_INT_8822B BIT(1)
3552 #define BIT_FS_CLI0_TX_NULL0_INT_8822B BIT(0)
3554 /* 2 REG_MSG2_8822B */
3556 #define BIT_SHIFT_FW_MSG2_8822B 0
3557 #define BIT_MASK_FW_MSG2_8822B 0xffffffffL
3558 #define BIT_FW_MSG2_8822B(x) \
3559 (((x) & BIT_MASK_FW_MSG2_8822B) << BIT_SHIFT_FW_MSG2_8822B)
3560 #define BIT_GET_FW_MSG2_8822B(x) \
3561 (((x) >> BIT_SHIFT_FW_MSG2_8822B) & BIT_MASK_FW_MSG2_8822B)
3563 /* 2 REG_MSG3_8822B */
3565 #define BIT_SHIFT_FW_MSG3_8822B 0
3566 #define BIT_MASK_FW_MSG3_8822B 0xffffffffL
3567 #define BIT_FW_MSG3_8822B(x) \
3568 (((x) & BIT_MASK_FW_MSG3_8822B) << BIT_SHIFT_FW_MSG3_8822B)
3569 #define BIT_GET_FW_MSG3_8822B(x) \
3570 (((x) >> BIT_SHIFT_FW_MSG3_8822B) & BIT_MASK_FW_MSG3_8822B)
3572 /* 2 REG_MSG4_8822B */
3574 #define BIT_SHIFT_FW_MSG4_8822B 0
3575 #define BIT_MASK_FW_MSG4_8822B 0xffffffffL
3576 #define BIT_FW_MSG4_8822B(x) \
3577 (((x) & BIT_MASK_FW_MSG4_8822B) << BIT_SHIFT_FW_MSG4_8822B)
3578 #define BIT_GET_FW_MSG4_8822B(x) \
3579 (((x) >> BIT_SHIFT_FW_MSG4_8822B) & BIT_MASK_FW_MSG4_8822B)
3581 /* 2 REG_MSG5_8822B */
3583 #define BIT_SHIFT_FW_MSG5_8822B 0
3584 #define BIT_MASK_FW_MSG5_8822B 0xffffffffL
3585 #define BIT_FW_MSG5_8822B(x) \
3586 (((x) & BIT_MASK_FW_MSG5_8822B) << BIT_SHIFT_FW_MSG5_8822B)
3587 #define BIT_GET_FW_MSG5_8822B(x) \
3588 (((x) >> BIT_SHIFT_FW_MSG5_8822B) & BIT_MASK_FW_MSG5_8822B)
3590 /* 2 REG_NOT_VALID_8822B */
3592 /* 2 REG_FIFOPAGE_CTRL_1_8822B */
3594 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B 16
3595 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B 0xff
3596 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8822B(x) \
3597 (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B) \
3598 << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B)
3599 #define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8822B(x) \
3600 (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B) & \
3601 BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B)
3603 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B 0
3604 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B 0xff
3605 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8822B(x) \
3606 (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B) \
3607 << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B)
3608 #define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8822B(x) \
3609 (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B) & \
3610 BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B)
3612 /* 2 REG_FIFOPAGE_CTRL_2_8822B */
3613 #define BIT_BCN_VALID_1_V1_8822B BIT(31)
3615 #define BIT_SHIFT_BCN_HEAD_1_V1_8822B 16
3616 #define BIT_MASK_BCN_HEAD_1_V1_8822B 0xfff
3617 #define BIT_BCN_HEAD_1_V1_8822B(x) \
3618 (((x) & BIT_MASK_BCN_HEAD_1_V1_8822B) << BIT_SHIFT_BCN_HEAD_1_V1_8822B)
3619 #define BIT_GET_BCN_HEAD_1_V1_8822B(x) \
3620 (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8822B) & BIT_MASK_BCN_HEAD_1_V1_8822B)
3622 #define BIT_BCN_VALID_V1_8822B BIT(15)
3624 #define BIT_SHIFT_BCN_HEAD_V1_8822B 0
3625 #define BIT_MASK_BCN_HEAD_V1_8822B 0xfff
3626 #define BIT_BCN_HEAD_V1_8822B(x) \
3627 (((x) & BIT_MASK_BCN_HEAD_V1_8822B) << BIT_SHIFT_BCN_HEAD_V1_8822B)
3628 #define BIT_GET_BCN_HEAD_V1_8822B(x) \
3629 (((x) >> BIT_SHIFT_BCN_HEAD_V1_8822B) & BIT_MASK_BCN_HEAD_V1_8822B)
3631 /* 2 REG_AUTO_LLT_V1_8822B */
3633 #define BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 24
3634 #define BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 0xff
3635 #define BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) \
3636 (((x) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) \
3637 << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
3638 #define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) \
3639 (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) & \
3640 BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
3642 #define BIT_SHIFT_LLT_FREE_PAGE_V1_8822B 8
3643 #define BIT_MASK_LLT_FREE_PAGE_V1_8822B 0xffff
3644 #define BIT_LLT_FREE_PAGE_V1_8822B(x) \
3645 (((x) & BIT_MASK_LLT_FREE_PAGE_V1_8822B) \
3646 << BIT_SHIFT_LLT_FREE_PAGE_V1_8822B)
3647 #define BIT_GET_LLT_FREE_PAGE_V1_8822B(x) \
3648 (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8822B) & \
3649 BIT_MASK_LLT_FREE_PAGE_V1_8822B)
3651 #define BIT_SHIFT_BLK_DESC_NUM_8822B 4
3652 #define BIT_MASK_BLK_DESC_NUM_8822B 0xf
3653 #define BIT_BLK_DESC_NUM_8822B(x) \
3654 (((x) & BIT_MASK_BLK_DESC_NUM_8822B) << BIT_SHIFT_BLK_DESC_NUM_8822B)
3655 #define BIT_GET_BLK_DESC_NUM_8822B(x) \
3656 (((x) >> BIT_SHIFT_BLK_DESC_NUM_8822B) & BIT_MASK_BLK_DESC_NUM_8822B)
3658 #define BIT_R_BCN_HEAD_SEL_8822B BIT(3)
3659 #define BIT_R_EN_BCN_SW_HEAD_SEL_8822B BIT(2)
3660 #define BIT_LLT_DBG_SEL_8822B BIT(1)
3661 #define BIT_AUTO_INIT_LLT_V1_8822B BIT(0)
3663 /* 2 REG_TXDMA_OFFSET_CHK_8822B */
3664 #define BIT_EM_CHKSUM_FIN_8822B BIT(31)
3665 #define BIT_EMN_PCIE_DMA_MOD_8822B BIT(30)
3666 #define BIT_EN_TXQUE_CLR_8822B BIT(29)
3667 #define BIT_EN_PCIE_FIFO_MODE_8822B BIT(28)
3669 #define BIT_SHIFT_PG_UNDER_TH_V1_8822B 16
3670 #define BIT_MASK_PG_UNDER_TH_V1_8822B 0xfff
3671 #define BIT_PG_UNDER_TH_V1_8822B(x) \
3672 (((x) & BIT_MASK_PG_UNDER_TH_V1_8822B) \
3673 << BIT_SHIFT_PG_UNDER_TH_V1_8822B)
3674 #define BIT_GET_PG_UNDER_TH_V1_8822B(x) \
3675 (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8822B) & \
3676 BIT_MASK_PG_UNDER_TH_V1_8822B)
3678 #define BIT_RESTORE_H2C_ADDRESS_8822B BIT(15)
3679 #define BIT_SDIO_TXDESC_CHKSUM_EN_8822B BIT(13)
3680 #define BIT_RST_RDPTR_8822B BIT(12)
3681 #define BIT_RST_WRPTR_8822B BIT(11)
3682 #define BIT_CHK_PG_TH_EN_8822B BIT(10)
3683 #define BIT_DROP_DATA_EN_8822B BIT(9)
3684 #define BIT_CHECK_OFFSET_EN_8822B BIT(8)
3686 #define BIT_SHIFT_CHECK_OFFSET_8822B 0
3687 #define BIT_MASK_CHECK_OFFSET_8822B 0xff
3688 #define BIT_CHECK_OFFSET_8822B(x) \
3689 (((x) & BIT_MASK_CHECK_OFFSET_8822B) << BIT_SHIFT_CHECK_OFFSET_8822B)
3690 #define BIT_GET_CHECK_OFFSET_8822B(x) \
3691 (((x) >> BIT_SHIFT_CHECK_OFFSET_8822B) & BIT_MASK_CHECK_OFFSET_8822B)
3693 /* 2 REG_TXDMA_STATUS_8822B */
3694 #define BIT_HI_OQT_UDN_8822B BIT(17)
3695 #define BIT_HI_OQT_OVF_8822B BIT(16)
3696 #define BIT_PAYLOAD_CHKSUM_ERR_8822B BIT(15)
3697 #define BIT_PAYLOAD_UDN_8822B BIT(14)
3698 #define BIT_PAYLOAD_OVF_8822B BIT(13)
3699 #define BIT_DSC_CHKSUM_FAIL_8822B BIT(12)
3700 #define BIT_UNKNOWN_QSEL_8822B BIT(11)
3701 #define BIT_EP_QSEL_DIFF_8822B BIT(10)
3702 #define BIT_TX_OFFS_UNMATCH_8822B BIT(9)
3703 #define BIT_TXOQT_UDN_8822B BIT(8)
3704 #define BIT_TXOQT_OVF_8822B BIT(7)
3705 #define BIT_TXDMA_SFF_UDN_8822B BIT(6)
3706 #define BIT_TXDMA_SFF_OVF_8822B BIT(5)
3707 #define BIT_LLT_NULL_PG_8822B BIT(4)
3708 #define BIT_PAGE_UDN_8822B BIT(3)
3709 #define BIT_PAGE_OVF_8822B BIT(2)
3710 #define BIT_TXFF_PG_UDN_8822B BIT(1)
3711 #define BIT_TXFF_PG_OVF_8822B BIT(0)
3713 /* 2 REG_TX_DMA_DBG_8822B */
3715 /* 2 REG_TQPNT1_8822B */
3717 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8822B 16
3718 #define BIT_MASK_HPQ_HIGH_TH_V1_8822B 0xfff
3719 #define BIT_HPQ_HIGH_TH_V1_8822B(x) \
3720 (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8822B) \
3721 << BIT_SHIFT_HPQ_HIGH_TH_V1_8822B)
3722 #define BIT_GET_HPQ_HIGH_TH_V1_8822B(x) \
3723 (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8822B) & \
3724 BIT_MASK_HPQ_HIGH_TH_V1_8822B)
3726 #define BIT_SHIFT_HPQ_LOW_TH_V1_8822B 0
3727 #define BIT_MASK_HPQ_LOW_TH_V1_8822B 0xfff
3728 #define BIT_HPQ_LOW_TH_V1_8822B(x) \
3729 (((x) & BIT_MASK_HPQ_LOW_TH_V1_8822B) << BIT_SHIFT_HPQ_LOW_TH_V1_8822B)
3730 #define BIT_GET_HPQ_LOW_TH_V1_8822B(x) \
3731 (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8822B) & BIT_MASK_HPQ_LOW_TH_V1_8822B)
3733 /* 2 REG_TQPNT2_8822B */
3735 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8822B 16
3736 #define BIT_MASK_NPQ_HIGH_TH_V1_8822B 0xfff
3737 #define BIT_NPQ_HIGH_TH_V1_8822B(x) \
3738 (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8822B) \
3739 << BIT_SHIFT_NPQ_HIGH_TH_V1_8822B)
3740 #define BIT_GET_NPQ_HIGH_TH_V1_8822B(x) \
3741 (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8822B) & \
3742 BIT_MASK_NPQ_HIGH_TH_V1_8822B)
3744 #define BIT_SHIFT_NPQ_LOW_TH_V1_8822B 0
3745 #define BIT_MASK_NPQ_LOW_TH_V1_8822B 0xfff
3746 #define BIT_NPQ_LOW_TH_V1_8822B(x) \
3747 (((x) & BIT_MASK_NPQ_LOW_TH_V1_8822B) << BIT_SHIFT_NPQ_LOW_TH_V1_8822B)
3748 #define BIT_GET_NPQ_LOW_TH_V1_8822B(x) \
3749 (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8822B) & BIT_MASK_NPQ_LOW_TH_V1_8822B)
3751 /* 2 REG_TQPNT3_8822B */
3753 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8822B 16
3754 #define BIT_MASK_LPQ_HIGH_TH_V1_8822B 0xfff
3755 #define BIT_LPQ_HIGH_TH_V1_8822B(x) \
3756 (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8822B) \
3757 << BIT_SHIFT_LPQ_HIGH_TH_V1_8822B)
3758 #define BIT_GET_LPQ_HIGH_TH_V1_8822B(x) \
3759 (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8822B) & \
3760 BIT_MASK_LPQ_HIGH_TH_V1_8822B)
3762 #define BIT_SHIFT_LPQ_LOW_TH_V1_8822B 0
3763 #define BIT_MASK_LPQ_LOW_TH_V1_8822B 0xfff
3764 #define BIT_LPQ_LOW_TH_V1_8822B(x) \
3765 (((x) & BIT_MASK_LPQ_LOW_TH_V1_8822B) << BIT_SHIFT_LPQ_LOW_TH_V1_8822B)
3766 #define BIT_GET_LPQ_LOW_TH_V1_8822B(x) \
3767 (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8822B) & BIT_MASK_LPQ_LOW_TH_V1_8822B)
3769 /* 2 REG_TQPNT4_8822B */
3771 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8822B 16
3772 #define BIT_MASK_EXQ_HIGH_TH_V1_8822B 0xfff
3773 #define BIT_EXQ_HIGH_TH_V1_8822B(x) \
3774 (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8822B) \
3775 << BIT_SHIFT_EXQ_HIGH_TH_V1_8822B)
3776 #define BIT_GET_EXQ_HIGH_TH_V1_8822B(x) \
3777 (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8822B) & \
3778 BIT_MASK_EXQ_HIGH_TH_V1_8822B)
3780 #define BIT_SHIFT_EXQ_LOW_TH_V1_8822B 0
3781 #define BIT_MASK_EXQ_LOW_TH_V1_8822B 0xfff
3782 #define BIT_EXQ_LOW_TH_V1_8822B(x) \
3783 (((x) & BIT_MASK_EXQ_LOW_TH_V1_8822B) << BIT_SHIFT_EXQ_LOW_TH_V1_8822B)
3784 #define BIT_GET_EXQ_LOW_TH_V1_8822B(x) \
3785 (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8822B) & BIT_MASK_EXQ_LOW_TH_V1_8822B)
3787 /* 2 REG_RQPN_CTRL_1_8822B */
3789 #define BIT_SHIFT_TXPKTNUM_H_8822B 16
3790 #define BIT_MASK_TXPKTNUM_H_8822B 0xffff
3791 #define BIT_TXPKTNUM_H_8822B(x) \
3792 (((x) & BIT_MASK_TXPKTNUM_H_8822B) << BIT_SHIFT_TXPKTNUM_H_8822B)
3793 #define BIT_GET_TXPKTNUM_H_8822B(x) \
3794 (((x) >> BIT_SHIFT_TXPKTNUM_H_8822B) & BIT_MASK_TXPKTNUM_H_8822B)
3796 #define BIT_SHIFT_TXPKTNUM_V2_8822B 0
3797 #define BIT_MASK_TXPKTNUM_V2_8822B 0xffff
3798 #define BIT_TXPKTNUM_V2_8822B(x) \
3799 (((x) & BIT_MASK_TXPKTNUM_V2_8822B) << BIT_SHIFT_TXPKTNUM_V2_8822B)
3800 #define BIT_GET_TXPKTNUM_V2_8822B(x) \
3801 (((x) >> BIT_SHIFT_TXPKTNUM_V2_8822B) & BIT_MASK_TXPKTNUM_V2_8822B)
3803 /* 2 REG_RQPN_CTRL_2_8822B */
3804 #define BIT_LD_RQPN_8822B BIT(31)
3805 #define BIT_EXQ_PUBLIC_DIS_V1_8822B BIT(19)
3806 #define BIT_NPQ_PUBLIC_DIS_V1_8822B BIT(18)
3807 #define BIT_LPQ_PUBLIC_DIS_V1_8822B BIT(17)
3808 #define BIT_HPQ_PUBLIC_DIS_V1_8822B BIT(16)
3810 /* 2 REG_FIFOPAGE_INFO_1_8822B */
3812 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8822B 16
3813 #define BIT_MASK_HPQ_AVAL_PG_V1_8822B 0xfff
3814 #define BIT_HPQ_AVAL_PG_V1_8822B(x) \
3815 (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8822B) \
3816 << BIT_SHIFT_HPQ_AVAL_PG_V1_8822B)
3817 #define BIT_GET_HPQ_AVAL_PG_V1_8822B(x) \
3818 (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8822B) & \
3819 BIT_MASK_HPQ_AVAL_PG_V1_8822B)
3821 #define BIT_SHIFT_HPQ_V1_8822B 0
3822 #define BIT_MASK_HPQ_V1_8822B 0xfff
3823 #define BIT_HPQ_V1_8822B(x) \
3824 (((x) & BIT_MASK_HPQ_V1_8822B) << BIT_SHIFT_HPQ_V1_8822B)
3825 #define BIT_GET_HPQ_V1_8822B(x) \
3826 (((x) >> BIT_SHIFT_HPQ_V1_8822B) & BIT_MASK_HPQ_V1_8822B)
3828 /* 2 REG_FIFOPAGE_INFO_2_8822B */
3830 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8822B 16
3831 #define BIT_MASK_LPQ_AVAL_PG_V1_8822B 0xfff
3832 #define BIT_LPQ_AVAL_PG_V1_8822B(x) \
3833 (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8822B) \
3834 << BIT_SHIFT_LPQ_AVAL_PG_V1_8822B)
3835 #define BIT_GET_LPQ_AVAL_PG_V1_8822B(x) \
3836 (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8822B) & \
3837 BIT_MASK_LPQ_AVAL_PG_V1_8822B)
3839 #define BIT_SHIFT_LPQ_V1_8822B 0
3840 #define BIT_MASK_LPQ_V1_8822B 0xfff
3841 #define BIT_LPQ_V1_8822B(x) \
3842 (((x) & BIT_MASK_LPQ_V1_8822B) << BIT_SHIFT_LPQ_V1_8822B)
3843 #define BIT_GET_LPQ_V1_8822B(x) \
3844 (((x) >> BIT_SHIFT_LPQ_V1_8822B) & BIT_MASK_LPQ_V1_8822B)
3846 /* 2 REG_FIFOPAGE_INFO_3_8822B */
3848 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8822B 16
3849 #define BIT_MASK_NPQ_AVAL_PG_V1_8822B 0xfff
3850 #define BIT_NPQ_AVAL_PG_V1_8822B(x) \
3851 (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8822B) \
3852 << BIT_SHIFT_NPQ_AVAL_PG_V1_8822B)
3853 #define BIT_GET_NPQ_AVAL_PG_V1_8822B(x) \
3854 (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8822B) & \
3855 BIT_MASK_NPQ_AVAL_PG_V1_8822B)
3857 #define BIT_SHIFT_NPQ_V1_8822B 0
3858 #define BIT_MASK_NPQ_V1_8822B 0xfff
3859 #define BIT_NPQ_V1_8822B(x) \
3860 (((x) & BIT_MASK_NPQ_V1_8822B) << BIT_SHIFT_NPQ_V1_8822B)
3861 #define BIT_GET_NPQ_V1_8822B(x) \
3862 (((x) >> BIT_SHIFT_NPQ_V1_8822B) & BIT_MASK_NPQ_V1_8822B)
3864 /* 2 REG_FIFOPAGE_INFO_4_8822B */
3866 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8822B 16
3867 #define BIT_MASK_EXQ_AVAL_PG_V1_8822B 0xfff
3868 #define BIT_EXQ_AVAL_PG_V1_8822B(x) \
3869 (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8822B) \
3870 << BIT_SHIFT_EXQ_AVAL_PG_V1_8822B)
3871 #define BIT_GET_EXQ_AVAL_PG_V1_8822B(x) \
3872 (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8822B) & \
3873 BIT_MASK_EXQ_AVAL_PG_V1_8822B)
3875 #define BIT_SHIFT_EXQ_V1_8822B 0
3876 #define BIT_MASK_EXQ_V1_8822B 0xfff
3877 #define BIT_EXQ_V1_8822B(x) \
3878 (((x) & BIT_MASK_EXQ_V1_8822B) << BIT_SHIFT_EXQ_V1_8822B)
3879 #define BIT_GET_EXQ_V1_8822B(x) \
3880 (((x) >> BIT_SHIFT_EXQ_V1_8822B) & BIT_MASK_EXQ_V1_8822B)
3882 /* 2 REG_FIFOPAGE_INFO_5_8822B */
3884 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B 16
3885 #define BIT_MASK_PUBQ_AVAL_PG_V1_8822B 0xfff
3886 #define BIT_PUBQ_AVAL_PG_V1_8822B(x) \
3887 (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8822B) \
3888 << BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B)
3889 #define BIT_GET_PUBQ_AVAL_PG_V1_8822B(x) \
3890 (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B) & \
3891 BIT_MASK_PUBQ_AVAL_PG_V1_8822B)
3893 #define BIT_SHIFT_PUBQ_V1_8822B 0
3894 #define BIT_MASK_PUBQ_V1_8822B 0xfff
3895 #define BIT_PUBQ_V1_8822B(x) \
3896 (((x) & BIT_MASK_PUBQ_V1_8822B) << BIT_SHIFT_PUBQ_V1_8822B)
3897 #define BIT_GET_PUBQ_V1_8822B(x) \
3898 (((x) >> BIT_SHIFT_PUBQ_V1_8822B) & BIT_MASK_PUBQ_V1_8822B)
3900 /* 2 REG_H2C_HEAD_8822B */
3902 #define BIT_SHIFT_H2C_HEAD_8822B 0
3903 #define BIT_MASK_H2C_HEAD_8822B 0x3ffff
3904 #define BIT_H2C_HEAD_8822B(x) \
3905 (((x) & BIT_MASK_H2C_HEAD_8822B) << BIT_SHIFT_H2C_HEAD_8822B)
3906 #define BIT_GET_H2C_HEAD_8822B(x) \
3907 (((x) >> BIT_SHIFT_H2C_HEAD_8822B) & BIT_MASK_H2C_HEAD_8822B)
3909 /* 2 REG_H2C_TAIL_8822B */
3911 #define BIT_SHIFT_H2C_TAIL_8822B 0
3912 #define BIT_MASK_H2C_TAIL_8822B 0x3ffff
3913 #define BIT_H2C_TAIL_8822B(x) \
3914 (((x) & BIT_MASK_H2C_TAIL_8822B) << BIT_SHIFT_H2C_TAIL_8822B)
3915 #define BIT_GET_H2C_TAIL_8822B(x) \
3916 (((x) >> BIT_SHIFT_H2C_TAIL_8822B) & BIT_MASK_H2C_TAIL_8822B)
3918 /* 2 REG_H2C_READ_ADDR_8822B */
3920 #define BIT_SHIFT_H2C_READ_ADDR_8822B 0
3921 #define BIT_MASK_H2C_READ_ADDR_8822B 0x3ffff
3922 #define BIT_H2C_READ_ADDR_8822B(x) \
3923 (((x) & BIT_MASK_H2C_READ_ADDR_8822B) << BIT_SHIFT_H2C_READ_ADDR_8822B)
3924 #define BIT_GET_H2C_READ_ADDR_8822B(x) \
3925 (((x) >> BIT_SHIFT_H2C_READ_ADDR_8822B) & BIT_MASK_H2C_READ_ADDR_8822B)
3927 /* 2 REG_H2C_WR_ADDR_8822B */
3929 #define BIT_SHIFT_H2C_WR_ADDR_8822B 0
3930 #define BIT_MASK_H2C_WR_ADDR_8822B 0x3ffff
3931 #define BIT_H2C_WR_ADDR_8822B(x) \
3932 (((x) & BIT_MASK_H2C_WR_ADDR_8822B) << BIT_SHIFT_H2C_WR_ADDR_8822B)
3933 #define BIT_GET_H2C_WR_ADDR_8822B(x) \
3934 (((x) >> BIT_SHIFT_H2C_WR_ADDR_8822B) & BIT_MASK_H2C_WR_ADDR_8822B)
3936 /* 2 REG_H2C_INFO_8822B */
3937 #define BIT_H2C_SPACE_VLD_8822B BIT(3)
3938 #define BIT_H2C_WR_ADDR_RST_8822B BIT(2)
3940 #define BIT_SHIFT_H2C_LEN_SEL_8822B 0
3941 #define BIT_MASK_H2C_LEN_SEL_8822B 0x3
3942 #define BIT_H2C_LEN_SEL_8822B(x) \
3943 (((x) & BIT_MASK_H2C_LEN_SEL_8822B) << BIT_SHIFT_H2C_LEN_SEL_8822B)
3944 #define BIT_GET_H2C_LEN_SEL_8822B(x) \
3945 (((x) >> BIT_SHIFT_H2C_LEN_SEL_8822B) & BIT_MASK_H2C_LEN_SEL_8822B)
3947 /* 2 REG_RXDMA_AGG_PG_TH_8822B */
3949 #define BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B 24
3950 #define BIT_MASK_RXDMA_AGG_OLD_MOD_8822B 0xff
3951 #define BIT_RXDMA_AGG_OLD_MOD_8822B(x) \
3952 (((x) & BIT_MASK_RXDMA_AGG_OLD_MOD_8822B) \
3953 << BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B)
3954 #define BIT_GET_RXDMA_AGG_OLD_MOD_8822B(x) \
3955 (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B) & \
3956 BIT_MASK_RXDMA_AGG_OLD_MOD_8822B)
3958 #define BIT_SHIFT_PKT_NUM_WOL_8822B 16
3959 #define BIT_MASK_PKT_NUM_WOL_8822B 0xff
3960 #define BIT_PKT_NUM_WOL_8822B(x) \
3961 (((x) & BIT_MASK_PKT_NUM_WOL_8822B) << BIT_SHIFT_PKT_NUM_WOL_8822B)
3962 #define BIT_GET_PKT_NUM_WOL_8822B(x) \
3963 (((x) >> BIT_SHIFT_PKT_NUM_WOL_8822B) & BIT_MASK_PKT_NUM_WOL_8822B)
3965 #define BIT_SHIFT_DMA_AGG_TO_8822B 8
3966 #define BIT_MASK_DMA_AGG_TO_8822B 0xf
3967 #define BIT_DMA_AGG_TO_8822B(x) \
3968 (((x) & BIT_MASK_DMA_AGG_TO_8822B) << BIT_SHIFT_DMA_AGG_TO_8822B)
3969 #define BIT_GET_DMA_AGG_TO_8822B(x) \
3970 (((x) >> BIT_SHIFT_DMA_AGG_TO_8822B) & BIT_MASK_DMA_AGG_TO_8822B)
3972 #define BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B 0
3973 #define BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B 0xf
3974 #define BIT_RXDMA_AGG_PG_TH_V1_8822B(x) \
3975 (((x) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B) \
3976 << BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B)
3977 #define BIT_GET_RXDMA_AGG_PG_TH_V1_8822B(x) \
3978 (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B) & \
3979 BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B)
3981 /* 2 REG_RXPKT_NUM_8822B */
3983 #define BIT_SHIFT_RXPKT_NUM_8822B 24
3984 #define BIT_MASK_RXPKT_NUM_8822B 0xff
3985 #define BIT_RXPKT_NUM_8822B(x) \
3986 (((x) & BIT_MASK_RXPKT_NUM_8822B) << BIT_SHIFT_RXPKT_NUM_8822B)
3987 #define BIT_GET_RXPKT_NUM_8822B(x) \
3988 (((x) >> BIT_SHIFT_RXPKT_NUM_8822B) & BIT_MASK_RXPKT_NUM_8822B)
3990 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B 20
3991 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B 0xf
3992 #define BIT_FW_UPD_RDPTR19_TO_16_8822B(x) \
3993 (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B) \
3994 << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B)
3995 #define BIT_GET_FW_UPD_RDPTR19_TO_16_8822B(x) \
3996 (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B) & \
3997 BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B)
3999 #define BIT_RXDMA_REQ_8822B BIT(19)
4000 #define BIT_RW_RELEASE_EN_8822B BIT(18)
4001 #define BIT_RXDMA_IDLE_8822B BIT(17)
4002 #define BIT_RXPKT_RELEASE_POLL_8822B BIT(16)
4004 #define BIT_SHIFT_FW_UPD_RDPTR_8822B 0
4005 #define BIT_MASK_FW_UPD_RDPTR_8822B 0xffff
4006 #define BIT_FW_UPD_RDPTR_8822B(x) \
4007 (((x) & BIT_MASK_FW_UPD_RDPTR_8822B) << BIT_SHIFT_FW_UPD_RDPTR_8822B)
4008 #define BIT_GET_FW_UPD_RDPTR_8822B(x) \
4009 (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8822B) & BIT_MASK_FW_UPD_RDPTR_8822B)
4011 /* 2 REG_RXDMA_STATUS_8822B */
4012 #define BIT_C2H_PKT_OVF_8822B BIT(7)
4013 #define BIT_AGG_CONFGI_ISSUE_8822B BIT(6)
4014 #define BIT_FW_POLL_ISSUE_8822B BIT(5)
4015 #define BIT_RX_DATA_UDN_8822B BIT(4)
4016 #define BIT_RX_SFF_UDN_8822B BIT(3)
4017 #define BIT_RX_SFF_OVF_8822B BIT(2)
4018 #define BIT_RXPKT_OVF_8822B BIT(0)
4020 /* 2 REG_RXDMA_DPR_8822B */
4022 #define BIT_SHIFT_RDE_DEBUG_8822B 0
4023 #define BIT_MASK_RDE_DEBUG_8822B 0xffffffffL
4024 #define BIT_RDE_DEBUG_8822B(x) \
4025 (((x) & BIT_MASK_RDE_DEBUG_8822B) << BIT_SHIFT_RDE_DEBUG_8822B)
4026 #define BIT_GET_RDE_DEBUG_8822B(x) \
4027 (((x) >> BIT_SHIFT_RDE_DEBUG_8822B) & BIT_MASK_RDE_DEBUG_8822B)
4029 /* 2 REG_RXDMA_MODE_8822B */
4031 #define BIT_SHIFT_PKTNUM_TH_V2_8822B 24
4032 #define BIT_MASK_PKTNUM_TH_V2_8822B 0x1f
4033 #define BIT_PKTNUM_TH_V2_8822B(x) \
4034 (((x) & BIT_MASK_PKTNUM_TH_V2_8822B) << BIT_SHIFT_PKTNUM_TH_V2_8822B)
4035 #define BIT_GET_PKTNUM_TH_V2_8822B(x) \
4036 (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8822B) & BIT_MASK_PKTNUM_TH_V2_8822B)
4038 #define BIT_TXBA_BREAK_USBAGG_8822B BIT(23)
4040 #define BIT_SHIFT_PKTLEN_PARA_8822B 16
4041 #define BIT_MASK_PKTLEN_PARA_8822B 0x7
4042 #define BIT_PKTLEN_PARA_8822B(x) \
4043 (((x) & BIT_MASK_PKTLEN_PARA_8822B) << BIT_SHIFT_PKTLEN_PARA_8822B)
4044 #define BIT_GET_PKTLEN_PARA_8822B(x) \
4045 (((x) >> BIT_SHIFT_PKTLEN_PARA_8822B) & BIT_MASK_PKTLEN_PARA_8822B)
4047 /* 2 REG_NOT_VALID_8822B */
4049 /* 2 REG_NOT_VALID_8822B */
4051 /* 2 REG_NOT_VALID_8822B */
4053 #define BIT_SHIFT_BURST_SIZE_8822B 4
4054 #define BIT_MASK_BURST_SIZE_8822B 0x3
4055 #define BIT_BURST_SIZE_8822B(x) \
4056 (((x) & BIT_MASK_BURST_SIZE_8822B) << BIT_SHIFT_BURST_SIZE_8822B)
4057 #define BIT_GET_BURST_SIZE_8822B(x) \
4058 (((x) >> BIT_SHIFT_BURST_SIZE_8822B) & BIT_MASK_BURST_SIZE_8822B)
4060 #define BIT_SHIFT_BURST_CNT_8822B 2
4061 #define BIT_MASK_BURST_CNT_8822B 0x3
4062 #define BIT_BURST_CNT_8822B(x) \
4063 (((x) & BIT_MASK_BURST_CNT_8822B) << BIT_SHIFT_BURST_CNT_8822B)
4064 #define BIT_GET_BURST_CNT_8822B(x) \
4065 (((x) >> BIT_SHIFT_BURST_CNT_8822B) & BIT_MASK_BURST_CNT_8822B)
4067 #define BIT_DMA_MODE_8822B BIT(1)
4069 /* 2 REG_C2H_PKT_8822B */
4071 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B 24
4072 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B 0xf
4073 #define BIT_R_C2H_STR_ADDR_16_TO_19_8822B(x) \
4074 (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B) \
4075 << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B)
4076 #define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8822B(x) \
4077 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B) & \
4078 BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B)
4080 #define BIT_R_C2H_PKT_REQ_8822B BIT(16)
4082 #define BIT_SHIFT_R_C2H_STR_ADDR_8822B 0
4083 #define BIT_MASK_R_C2H_STR_ADDR_8822B 0xffff
4084 #define BIT_R_C2H_STR_ADDR_8822B(x) \
4085 (((x) & BIT_MASK_R_C2H_STR_ADDR_8822B) \
4086 << BIT_SHIFT_R_C2H_STR_ADDR_8822B)
4087 #define BIT_GET_R_C2H_STR_ADDR_8822B(x) \
4088 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8822B) & \
4089 BIT_MASK_R_C2H_STR_ADDR_8822B)
4091 /* 2 REG_FWFF_C2H_8822B */
4093 #define BIT_SHIFT_C2H_DMA_ADDR_8822B 0
4094 #define BIT_MASK_C2H_DMA_ADDR_8822B 0x3ffff
4095 #define BIT_C2H_DMA_ADDR_8822B(x) \
4096 (((x) & BIT_MASK_C2H_DMA_ADDR_8822B) << BIT_SHIFT_C2H_DMA_ADDR_8822B)
4097 #define BIT_GET_C2H_DMA_ADDR_8822B(x) \
4098 (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8822B) & BIT_MASK_C2H_DMA_ADDR_8822B)
4100 /* 2 REG_FWFF_CTRL_8822B */
4101 #define BIT_FWFF_DMAPKT_REQ_8822B BIT(31)
4103 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B 16
4104 #define BIT_MASK_FWFF_DMA_PKT_NUM_8822B 0xff
4105 #define BIT_FWFF_DMA_PKT_NUM_8822B(x) \
4106 (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8822B) \
4107 << BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B)
4108 #define BIT_GET_FWFF_DMA_PKT_NUM_8822B(x) \
4109 (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B) & \
4110 BIT_MASK_FWFF_DMA_PKT_NUM_8822B)
4112 #define BIT_SHIFT_FWFF_STR_ADDR_8822B 0
4113 #define BIT_MASK_FWFF_STR_ADDR_8822B 0xffff
4114 #define BIT_FWFF_STR_ADDR_8822B(x) \
4115 (((x) & BIT_MASK_FWFF_STR_ADDR_8822B) << BIT_SHIFT_FWFF_STR_ADDR_8822B)
4116 #define BIT_GET_FWFF_STR_ADDR_8822B(x) \
4117 (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8822B) & BIT_MASK_FWFF_STR_ADDR_8822B)
4119 /* 2 REG_FWFF_PKT_INFO_8822B */
4121 #define BIT_SHIFT_FWFF_PKT_QUEUED_8822B 16
4122 #define BIT_MASK_FWFF_PKT_QUEUED_8822B 0xff
4123 #define BIT_FWFF_PKT_QUEUED_8822B(x) \
4124 (((x) & BIT_MASK_FWFF_PKT_QUEUED_8822B) \
4125 << BIT_SHIFT_FWFF_PKT_QUEUED_8822B)
4126 #define BIT_GET_FWFF_PKT_QUEUED_8822B(x) \
4127 (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8822B) & \
4128 BIT_MASK_FWFF_PKT_QUEUED_8822B)
4130 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B 0
4131 #define BIT_MASK_FWFF_PKT_STR_ADDR_8822B 0xffff
4132 #define BIT_FWFF_PKT_STR_ADDR_8822B(x) \
4133 (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_8822B) \
4134 << BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B)
4135 #define BIT_GET_FWFF_PKT_STR_ADDR_8822B(x) \
4136 (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B) & \
4137 BIT_MASK_FWFF_PKT_STR_ADDR_8822B)
4139 /* 2 REG_NOT_VALID_8822B */
4141 /* 2 REG_DDMA_CH0SA_8822B */
4143 #define BIT_SHIFT_DDMACH0_SA_8822B 0
4144 #define BIT_MASK_DDMACH0_SA_8822B 0xffffffffL
4145 #define BIT_DDMACH0_SA_8822B(x) \
4146 (((x) & BIT_MASK_DDMACH0_SA_8822B) << BIT_SHIFT_DDMACH0_SA_8822B)
4147 #define BIT_GET_DDMACH0_SA_8822B(x) \
4148 (((x) >> BIT_SHIFT_DDMACH0_SA_8822B) & BIT_MASK_DDMACH0_SA_8822B)
4150 /* 2 REG_DDMA_CH0DA_8822B */
4152 #define BIT_SHIFT_DDMACH0_DA_8822B 0
4153 #define BIT_MASK_DDMACH0_DA_8822B 0xffffffffL
4154 #define BIT_DDMACH0_DA_8822B(x) \
4155 (((x) & BIT_MASK_DDMACH0_DA_8822B) << BIT_SHIFT_DDMACH0_DA_8822B)
4156 #define BIT_GET_DDMACH0_DA_8822B(x) \
4157 (((x) >> BIT_SHIFT_DDMACH0_DA_8822B) & BIT_MASK_DDMACH0_DA_8822B)
4159 /* 2 REG_DDMA_CH0CTRL_8822B */
4160 #define BIT_DDMACH0_OWN_8822B BIT(31)
4161 #define BIT_DDMACH0_CHKSUM_EN_8822B BIT(29)
4162 #define BIT_DDMACH0_DA_W_DISABLE_8822B BIT(28)
4163 #define BIT_DDMACH0_CHKSUM_STS_8822B BIT(27)
4164 #define BIT_DDMACH0_DDMA_MODE_8822B BIT(26)
4165 #define BIT_DDMACH0_RESET_CHKSUM_STS_8822B BIT(25)
4166 #define BIT_DDMACH0_CHKSUM_CONT_8822B BIT(24)
4168 #define BIT_SHIFT_DDMACH0_DLEN_8822B 0
4169 #define BIT_MASK_DDMACH0_DLEN_8822B 0x3ffff
4170 #define BIT_DDMACH0_DLEN_8822B(x) \
4171 (((x) & BIT_MASK_DDMACH0_DLEN_8822B) << BIT_SHIFT_DDMACH0_DLEN_8822B)
4172 #define BIT_GET_DDMACH0_DLEN_8822B(x) \
4173 (((x) >> BIT_SHIFT_DDMACH0_DLEN_8822B) & BIT_MASK_DDMACH0_DLEN_8822B)
4175 /* 2 REG_DDMA_CH1SA_8822B */
4177 #define BIT_SHIFT_DDMACH1_SA_8822B 0
4178 #define BIT_MASK_DDMACH1_SA_8822B 0xffffffffL
4179 #define BIT_DDMACH1_SA_8822B(x) \
4180 (((x) & BIT_MASK_DDMACH1_SA_8822B) << BIT_SHIFT_DDMACH1_SA_8822B)
4181 #define BIT_GET_DDMACH1_SA_8822B(x) \
4182 (((x) >> BIT_SHIFT_DDMACH1_SA_8822B) & BIT_MASK_DDMACH1_SA_8822B)
4184 /* 2 REG_DDMA_CH1DA_8822B */
4186 #define BIT_SHIFT_DDMACH1_DA_8822B 0
4187 #define BIT_MASK_DDMACH1_DA_8822B 0xffffffffL
4188 #define BIT_DDMACH1_DA_8822B(x) \
4189 (((x) & BIT_MASK_DDMACH1_DA_8822B) << BIT_SHIFT_DDMACH1_DA_8822B)
4190 #define BIT_GET_DDMACH1_DA_8822B(x) \
4191 (((x) >> BIT_SHIFT_DDMACH1_DA_8822B) & BIT_MASK_DDMACH1_DA_8822B)
4193 /* 2 REG_DDMA_CH1CTRL_8822B */
4194 #define BIT_DDMACH1_OWN_8822B BIT(31)
4195 #define BIT_DDMACH1_CHKSUM_EN_8822B BIT(29)
4196 #define BIT_DDMACH1_DA_W_DISABLE_8822B BIT(28)
4197 #define BIT_DDMACH1_CHKSUM_STS_8822B BIT(27)
4198 #define BIT_DDMACH1_DDMA_MODE_8822B BIT(26)
4199 #define BIT_DDMACH1_RESET_CHKSUM_STS_8822B BIT(25)
4200 #define BIT_DDMACH1_CHKSUM_CONT_8822B BIT(24)
4202 #define BIT_SHIFT_DDMACH1_DLEN_8822B 0
4203 #define BIT_MASK_DDMACH1_DLEN_8822B 0x3ffff
4204 #define BIT_DDMACH1_DLEN_8822B(x) \
4205 (((x) & BIT_MASK_DDMACH1_DLEN_8822B) << BIT_SHIFT_DDMACH1_DLEN_8822B)
4206 #define BIT_GET_DDMACH1_DLEN_8822B(x) \
4207 (((x) >> BIT_SHIFT_DDMACH1_DLEN_8822B) & BIT_MASK_DDMACH1_DLEN_8822B)
4209 /* 2 REG_DDMA_CH2SA_8822B */
4211 #define BIT_SHIFT_DDMACH2_SA_8822B 0
4212 #define BIT_MASK_DDMACH2_SA_8822B 0xffffffffL
4213 #define BIT_DDMACH2_SA_8822B(x) \
4214 (((x) & BIT_MASK_DDMACH2_SA_8822B) << BIT_SHIFT_DDMACH2_SA_8822B)
4215 #define BIT_GET_DDMACH2_SA_8822B(x) \
4216 (((x) >> BIT_SHIFT_DDMACH2_SA_8822B) & BIT_MASK_DDMACH2_SA_8822B)
4218 /* 2 REG_DDMA_CH2DA_8822B */
4220 #define BIT_SHIFT_DDMACH2_DA_8822B 0
4221 #define BIT_MASK_DDMACH2_DA_8822B 0xffffffffL
4222 #define BIT_DDMACH2_DA_8822B(x) \
4223 (((x) & BIT_MASK_DDMACH2_DA_8822B) << BIT_SHIFT_DDMACH2_DA_8822B)
4224 #define BIT_GET_DDMACH2_DA_8822B(x) \
4225 (((x) >> BIT_SHIFT_DDMACH2_DA_8822B) & BIT_MASK_DDMACH2_DA_8822B)
4227 /* 2 REG_DDMA_CH2CTRL_8822B */
4228 #define BIT_DDMACH2_OWN_8822B BIT(31)
4229 #define BIT_DDMACH2_CHKSUM_EN_8822B BIT(29)
4230 #define BIT_DDMACH2_DA_W_DISABLE_8822B BIT(28)
4231 #define BIT_DDMACH2_CHKSUM_STS_8822B BIT(27)
4232 #define BIT_DDMACH2_DDMA_MODE_8822B BIT(26)
4233 #define BIT_DDMACH2_RESET_CHKSUM_STS_8822B BIT(25)
4234 #define BIT_DDMACH2_CHKSUM_CONT_8822B BIT(24)
4236 #define BIT_SHIFT_DDMACH2_DLEN_8822B 0
4237 #define BIT_MASK_DDMACH2_DLEN_8822B 0x3ffff
4238 #define BIT_DDMACH2_DLEN_8822B(x) \
4239 (((x) & BIT_MASK_DDMACH2_DLEN_8822B) << BIT_SHIFT_DDMACH2_DLEN_8822B)
4240 #define BIT_GET_DDMACH2_DLEN_8822B(x) \
4241 (((x) >> BIT_SHIFT_DDMACH2_DLEN_8822B) & BIT_MASK_DDMACH2_DLEN_8822B)
4243 /* 2 REG_DDMA_CH3SA_8822B */
4245 #define BIT_SHIFT_DDMACH3_SA_8822B 0
4246 #define BIT_MASK_DDMACH3_SA_8822B 0xffffffffL
4247 #define BIT_DDMACH3_SA_8822B(x) \
4248 (((x) & BIT_MASK_DDMACH3_SA_8822B) << BIT_SHIFT_DDMACH3_SA_8822B)
4249 #define BIT_GET_DDMACH3_SA_8822B(x) \
4250 (((x) >> BIT_SHIFT_DDMACH3_SA_8822B) & BIT_MASK_DDMACH3_SA_8822B)
4252 /* 2 REG_DDMA_CH3DA_8822B */
4254 #define BIT_SHIFT_DDMACH3_DA_8822B 0
4255 #define BIT_MASK_DDMACH3_DA_8822B 0xffffffffL
4256 #define BIT_DDMACH3_DA_8822B(x) \
4257 (((x) & BIT_MASK_DDMACH3_DA_8822B) << BIT_SHIFT_DDMACH3_DA_8822B)
4258 #define BIT_GET_DDMACH3_DA_8822B(x) \
4259 (((x) >> BIT_SHIFT_DDMACH3_DA_8822B) & BIT_MASK_DDMACH3_DA_8822B)
4261 /* 2 REG_DDMA_CH3CTRL_8822B */
4262 #define BIT_DDMACH3_OWN_8822B BIT(31)
4263 #define BIT_DDMACH3_CHKSUM_EN_8822B BIT(29)
4264 #define BIT_DDMACH3_DA_W_DISABLE_8822B BIT(28)
4265 #define BIT_DDMACH3_CHKSUM_STS_8822B BIT(27)
4266 #define BIT_DDMACH3_DDMA_MODE_8822B BIT(26)
4267 #define BIT_DDMACH3_RESET_CHKSUM_STS_8822B BIT(25)
4268 #define BIT_DDMACH3_CHKSUM_CONT_8822B BIT(24)
4270 #define BIT_SHIFT_DDMACH3_DLEN_8822B 0
4271 #define BIT_MASK_DDMACH3_DLEN_8822B 0x3ffff
4272 #define BIT_DDMACH3_DLEN_8822B(x) \
4273 (((x) & BIT_MASK_DDMACH3_DLEN_8822B) << BIT_SHIFT_DDMACH3_DLEN_8822B)
4274 #define BIT_GET_DDMACH3_DLEN_8822B(x) \
4275 (((x) >> BIT_SHIFT_DDMACH3_DLEN_8822B) & BIT_MASK_DDMACH3_DLEN_8822B)
4277 /* 2 REG_DDMA_CH4SA_8822B */
4279 #define BIT_SHIFT_DDMACH4_SA_8822B 0
4280 #define BIT_MASK_DDMACH4_SA_8822B 0xffffffffL
4281 #define BIT_DDMACH4_SA_8822B(x) \
4282 (((x) & BIT_MASK_DDMACH4_SA_8822B) << BIT_SHIFT_DDMACH4_SA_8822B)
4283 #define BIT_GET_DDMACH4_SA_8822B(x) \
4284 (((x) >> BIT_SHIFT_DDMACH4_SA_8822B) & BIT_MASK_DDMACH4_SA_8822B)
4286 /* 2 REG_DDMA_CH4DA_8822B */
4288 #define BIT_SHIFT_DDMACH4_DA_8822B 0
4289 #define BIT_MASK_DDMACH4_DA_8822B 0xffffffffL
4290 #define BIT_DDMACH4_DA_8822B(x) \
4291 (((x) & BIT_MASK_DDMACH4_DA_8822B) << BIT_SHIFT_DDMACH4_DA_8822B)
4292 #define BIT_GET_DDMACH4_DA_8822B(x) \
4293 (((x) >> BIT_SHIFT_DDMACH4_DA_8822B) & BIT_MASK_DDMACH4_DA_8822B)
4295 /* 2 REG_DDMA_CH4CTRL_8822B */
4296 #define BIT_DDMACH4_OWN_8822B BIT(31)
4297 #define BIT_DDMACH4_CHKSUM_EN_8822B BIT(29)
4298 #define BIT_DDMACH4_DA_W_DISABLE_8822B BIT(28)
4299 #define BIT_DDMACH4_CHKSUM_STS_8822B BIT(27)
4300 #define BIT_DDMACH4_DDMA_MODE_8822B BIT(26)
4301 #define BIT_DDMACH4_RESET_CHKSUM_STS_8822B BIT(25)
4302 #define BIT_DDMACH4_CHKSUM_CONT_8822B BIT(24)
4304 #define BIT_SHIFT_DDMACH4_DLEN_8822B 0
4305 #define BIT_MASK_DDMACH4_DLEN_8822B 0x3ffff
4306 #define BIT_DDMACH4_DLEN_8822B(x) \
4307 (((x) & BIT_MASK_DDMACH4_DLEN_8822B) << BIT_SHIFT_DDMACH4_DLEN_8822B)
4308 #define BIT_GET_DDMACH4_DLEN_8822B(x) \
4309 (((x) >> BIT_SHIFT_DDMACH4_DLEN_8822B) & BIT_MASK_DDMACH4_DLEN_8822B)
4311 /* 2 REG_DDMA_CH5SA_8822B */
4313 #define BIT_SHIFT_DDMACH5_SA_8822B 0
4314 #define BIT_MASK_DDMACH5_SA_8822B 0xffffffffL
4315 #define BIT_DDMACH5_SA_8822B(x) \
4316 (((x) & BIT_MASK_DDMACH5_SA_8822B) << BIT_SHIFT_DDMACH5_SA_8822B)
4317 #define BIT_GET_DDMACH5_SA_8822B(x) \
4318 (((x) >> BIT_SHIFT_DDMACH5_SA_8822B) & BIT_MASK_DDMACH5_SA_8822B)
4320 /* 2 REG_DDMA_CH5DA_8822B */
4322 #define BIT_SHIFT_DDMACH5_DA_8822B 0
4323 #define BIT_MASK_DDMACH5_DA_8822B 0xffffffffL
4324 #define BIT_DDMACH5_DA_8822B(x) \
4325 (((x) & BIT_MASK_DDMACH5_DA_8822B) << BIT_SHIFT_DDMACH5_DA_8822B)
4326 #define BIT_GET_DDMACH5_DA_8822B(x) \
4327 (((x) >> BIT_SHIFT_DDMACH5_DA_8822B) & BIT_MASK_DDMACH5_DA_8822B)
4329 /* 2 REG_REG_DDMA_CH5CTRL_8822B */
4330 #define BIT_DDMACH5_OWN_8822B BIT(31)
4331 #define BIT_DDMACH5_CHKSUM_EN_8822B BIT(29)
4332 #define BIT_DDMACH5_DA_W_DISABLE_8822B BIT(28)
4333 #define BIT_DDMACH5_CHKSUM_STS_8822B BIT(27)
4334 #define BIT_DDMACH5_DDMA_MODE_8822B BIT(26)
4335 #define BIT_DDMACH5_RESET_CHKSUM_STS_8822B BIT(25)
4336 #define BIT_DDMACH5_CHKSUM_CONT_8822B BIT(24)
4338 #define BIT_SHIFT_DDMACH5_DLEN_8822B 0
4339 #define BIT_MASK_DDMACH5_DLEN_8822B 0x3ffff
4340 #define BIT_DDMACH5_DLEN_8822B(x) \
4341 (((x) & BIT_MASK_DDMACH5_DLEN_8822B) << BIT_SHIFT_DDMACH5_DLEN_8822B)
4342 #define BIT_GET_DDMACH5_DLEN_8822B(x) \
4343 (((x) >> BIT_SHIFT_DDMACH5_DLEN_8822B) & BIT_MASK_DDMACH5_DLEN_8822B)
4345 /* 2 REG_DDMA_INT_MSK_8822B */
4346 #define BIT_DDMACH5_MSK_8822B BIT(5)
4347 #define BIT_DDMACH4_MSK_8822B BIT(4)
4348 #define BIT_DDMACH3_MSK_8822B BIT(3)
4349 #define BIT_DDMACH2_MSK_8822B BIT(2)
4350 #define BIT_DDMACH1_MSK_8822B BIT(1)
4351 #define BIT_DDMACH0_MSK_8822B BIT(0)
4353 /* 2 REG_DDMA_CHSTATUS_8822B */
4354 #define BIT_DDMACH5_BUSY_8822B BIT(5)
4355 #define BIT_DDMACH4_BUSY_8822B BIT(4)
4356 #define BIT_DDMACH3_BUSY_8822B BIT(3)
4357 #define BIT_DDMACH2_BUSY_8822B BIT(2)
4358 #define BIT_DDMACH1_BUSY_8822B BIT(1)
4359 #define BIT_DDMACH0_BUSY_8822B BIT(0)
4361 /* 2 REG_DDMA_CHKSUM_8822B */
4363 #define BIT_SHIFT_IDDMA0_CHKSUM_8822B 0
4364 #define BIT_MASK_IDDMA0_CHKSUM_8822B 0xffff
4365 #define BIT_IDDMA0_CHKSUM_8822B(x) \
4366 (((x) & BIT_MASK_IDDMA0_CHKSUM_8822B) << BIT_SHIFT_IDDMA0_CHKSUM_8822B)
4367 #define BIT_GET_IDDMA0_CHKSUM_8822B(x) \
4368 (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8822B) & BIT_MASK_IDDMA0_CHKSUM_8822B)
4370 /* 2 REG_DDMA_MONITOR_8822B */
4371 #define BIT_IDDMA0_PERMU_UNDERFLOW_8822B BIT(14)
4372 #define BIT_IDDMA0_FIFO_UNDERFLOW_8822B BIT(13)
4373 #define BIT_IDDMA0_FIFO_OVERFLOW_8822B BIT(12)
4374 #define BIT_CH5_ERR_8822B BIT(5)
4375 #define BIT_CH4_ERR_8822B BIT(4)
4376 #define BIT_CH3_ERR_8822B BIT(3)
4377 #define BIT_CH2_ERR_8822B BIT(2)
4378 #define BIT_CH1_ERR_8822B BIT(1)
4379 #define BIT_CH0_ERR_8822B BIT(0)
4381 /* 2 REG_NOT_VALID_8822B */
4383 /* 2 REG_PCIE_CTRL_8822B */
4384 #define BIT_PCIEIO_PERSTB_SEL_8822B BIT(31)
4386 #define BIT_SHIFT_PCIE_MAX_RXDMA_8822B 28
4387 #define BIT_MASK_PCIE_MAX_RXDMA_8822B 0x7
4388 #define BIT_PCIE_MAX_RXDMA_8822B(x) \
4389 (((x) & BIT_MASK_PCIE_MAX_RXDMA_8822B) \
4390 << BIT_SHIFT_PCIE_MAX_RXDMA_8822B)
4391 #define BIT_GET_PCIE_MAX_RXDMA_8822B(x) \
4392 (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8822B) & \
4393 BIT_MASK_PCIE_MAX_RXDMA_8822B)
4395 #define BIT_MULRW_8822B BIT(27)
4397 #define BIT_SHIFT_PCIE_MAX_TXDMA_8822B 24
4398 #define BIT_MASK_PCIE_MAX_TXDMA_8822B 0x7
4399 #define BIT_PCIE_MAX_TXDMA_8822B(x) \
4400 (((x) & BIT_MASK_PCIE_MAX_TXDMA_8822B) \
4401 << BIT_SHIFT_PCIE_MAX_TXDMA_8822B)
4402 #define BIT_GET_PCIE_MAX_TXDMA_8822B(x) \
4403 (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8822B) & \
4404 BIT_MASK_PCIE_MAX_TXDMA_8822B)
4406 #define BIT_EN_CPL_TIMEOUT_PS_8822B BIT(22)
4407 #define BIT_REG_TXDMA_FAIL_PS_8822B BIT(21)
4408 #define BIT_PCIE_RST_TRXDMA_INTF_8822B BIT(20)
4409 #define BIT_EN_HWENTR_L1_8822B BIT(19)
4410 #define BIT_EN_ADV_CLKGATE_8822B BIT(18)
4411 #define BIT_PCIE_EN_SWENT_L23_8822B BIT(17)
4412 #define BIT_PCIE_EN_HWEXT_L1_8822B BIT(16)
4413 #define BIT_RX_CLOSE_EN_8822B BIT(15)
4414 #define BIT_STOP_BCNQ_8822B BIT(14)
4415 #define BIT_STOP_MGQ_8822B BIT(13)
4416 #define BIT_STOP_VOQ_8822B BIT(12)
4417 #define BIT_STOP_VIQ_8822B BIT(11)
4418 #define BIT_STOP_BEQ_8822B BIT(10)
4419 #define BIT_STOP_BKQ_8822B BIT(9)
4420 #define BIT_STOP_RXQ_8822B BIT(8)
4421 #define BIT_STOP_HI7Q_8822B BIT(7)
4422 #define BIT_STOP_HI6Q_8822B BIT(6)
4423 #define BIT_STOP_HI5Q_8822B BIT(5)
4424 #define BIT_STOP_HI4Q_8822B BIT(4)
4425 #define BIT_STOP_HI3Q_8822B BIT(3)
4426 #define BIT_STOP_HI2Q_8822B BIT(2)
4427 #define BIT_STOP_HI1Q_8822B BIT(1)
4428 #define BIT_STOP_HI0Q_8822B BIT(0)
4430 /* 2 REG_INT_MIG_8822B */
4432 #define BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B 28
4433 #define BIT_MASK_TXTTIMER_MATCH_NUM_8822B 0xf
4434 #define BIT_TXTTIMER_MATCH_NUM_8822B(x) \
4435 (((x) & BIT_MASK_TXTTIMER_MATCH_NUM_8822B) \
4436 << BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B)
4437 #define BIT_GET_TXTTIMER_MATCH_NUM_8822B(x) \
4438 (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B) & \
4439 BIT_MASK_TXTTIMER_MATCH_NUM_8822B)
4441 #define BIT_SHIFT_TXPKT_NUM_MATCH_8822B 24
4442 #define BIT_MASK_TXPKT_NUM_MATCH_8822B 0xf
4443 #define BIT_TXPKT_NUM_MATCH_8822B(x) \
4444 (((x) & BIT_MASK_TXPKT_NUM_MATCH_8822B) \
4445 << BIT_SHIFT_TXPKT_NUM_MATCH_8822B)
4446 #define BIT_GET_TXPKT_NUM_MATCH_8822B(x) \
4447 (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8822B) & \
4448 BIT_MASK_TXPKT_NUM_MATCH_8822B)
4450 #define BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B 20
4451 #define BIT_MASK_RXTTIMER_MATCH_NUM_8822B 0xf
4452 #define BIT_RXTTIMER_MATCH_NUM_8822B(x) \
4453 (((x) & BIT_MASK_RXTTIMER_MATCH_NUM_8822B) \
4454 << BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B)
4455 #define BIT_GET_RXTTIMER_MATCH_NUM_8822B(x) \
4456 (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B) & \
4457 BIT_MASK_RXTTIMER_MATCH_NUM_8822B)
4459 #define BIT_SHIFT_RXPKT_NUM_MATCH_8822B 16
4460 #define BIT_MASK_RXPKT_NUM_MATCH_8822B 0xf
4461 #define BIT_RXPKT_NUM_MATCH_8822B(x) \
4462 (((x) & BIT_MASK_RXPKT_NUM_MATCH_8822B) \
4463 << BIT_SHIFT_RXPKT_NUM_MATCH_8822B)
4464 #define BIT_GET_RXPKT_NUM_MATCH_8822B(x) \
4465 (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8822B) & \
4466 BIT_MASK_RXPKT_NUM_MATCH_8822B)
4468 #define BIT_SHIFT_MIGRATE_TIMER_8822B 0
4469 #define BIT_MASK_MIGRATE_TIMER_8822B 0xffff
4470 #define BIT_MIGRATE_TIMER_8822B(x) \
4471 (((x) & BIT_MASK_MIGRATE_TIMER_8822B) << BIT_SHIFT_MIGRATE_TIMER_8822B)
4472 #define BIT_GET_MIGRATE_TIMER_8822B(x) \
4473 (((x) >> BIT_SHIFT_MIGRATE_TIMER_8822B) & BIT_MASK_MIGRATE_TIMER_8822B)
4475 /* 2 REG_BCNQ_TXBD_DESA_8822B */
4477 #define BIT_SHIFT_BCNQ_TXBD_DESA_8822B 0
4478 #define BIT_MASK_BCNQ_TXBD_DESA_8822B 0xffffffffffffffffL
4479 #define BIT_BCNQ_TXBD_DESA_8822B(x) \
4480 (((x) & BIT_MASK_BCNQ_TXBD_DESA_8822B) \
4481 << BIT_SHIFT_BCNQ_TXBD_DESA_8822B)
4482 #define BIT_GET_BCNQ_TXBD_DESA_8822B(x) \
4483 (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8822B) & \
4484 BIT_MASK_BCNQ_TXBD_DESA_8822B)
4486 /* 2 REG_MGQ_TXBD_DESA_8822B */
4488 #define BIT_SHIFT_MGQ_TXBD_DESA_8822B 0
4489 #define BIT_MASK_MGQ_TXBD_DESA_8822B 0xffffffffffffffffL
4490 #define BIT_MGQ_TXBD_DESA_8822B(x) \
4491 (((x) & BIT_MASK_MGQ_TXBD_DESA_8822B) << BIT_SHIFT_MGQ_TXBD_DESA_8822B)
4492 #define BIT_GET_MGQ_TXBD_DESA_8822B(x) \
4493 (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8822B) & BIT_MASK_MGQ_TXBD_DESA_8822B)
4495 /* 2 REG_VOQ_TXBD_DESA_8822B */
4497 #define BIT_SHIFT_VOQ_TXBD_DESA_8822B 0
4498 #define BIT_MASK_VOQ_TXBD_DESA_8822B 0xffffffffffffffffL
4499 #define BIT_VOQ_TXBD_DESA_8822B(x) \
4500 (((x) & BIT_MASK_VOQ_TXBD_DESA_8822B) << BIT_SHIFT_VOQ_TXBD_DESA_8822B)
4501 #define BIT_GET_VOQ_TXBD_DESA_8822B(x) \
4502 (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8822B) & BIT_MASK_VOQ_TXBD_DESA_8822B)
4504 /* 2 REG_VIQ_TXBD_DESA_8822B */
4506 #define BIT_SHIFT_VIQ_TXBD_DESA_8822B 0
4507 #define BIT_MASK_VIQ_TXBD_DESA_8822B 0xffffffffffffffffL
4508 #define BIT_VIQ_TXBD_DESA_8822B(x) \
4509 (((x) & BIT_MASK_VIQ_TXBD_DESA_8822B) << BIT_SHIFT_VIQ_TXBD_DESA_8822B)
4510 #define BIT_GET_VIQ_TXBD_DESA_8822B(x) \
4511 (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8822B) & BIT_MASK_VIQ_TXBD_DESA_8822B)
4513 /* 2 REG_BEQ_TXBD_DESA_8822B */
4515 #define BIT_SHIFT_BEQ_TXBD_DESA_8822B 0
4516 #define BIT_MASK_BEQ_TXBD_DESA_8822B 0xffffffffffffffffL
4517 #define BIT_BEQ_TXBD_DESA_8822B(x) \
4518 (((x) & BIT_MASK_BEQ_TXBD_DESA_8822B) << BIT_SHIFT_BEQ_TXBD_DESA_8822B)
4519 #define BIT_GET_BEQ_TXBD_DESA_8822B(x) \
4520 (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8822B) & BIT_MASK_BEQ_TXBD_DESA_8822B)
4522 /* 2 REG_BKQ_TXBD_DESA_8822B */
4524 #define BIT_SHIFT_BKQ_TXBD_DESA_8822B 0
4525 #define BIT_MASK_BKQ_TXBD_DESA_8822B 0xffffffffffffffffL
4526 #define BIT_BKQ_TXBD_DESA_8822B(x) \
4527 (((x) & BIT_MASK_BKQ_TXBD_DESA_8822B) << BIT_SHIFT_BKQ_TXBD_DESA_8822B)
4528 #define BIT_GET_BKQ_TXBD_DESA_8822B(x) \
4529 (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8822B) & BIT_MASK_BKQ_TXBD_DESA_8822B)
4531 /* 2 REG_RXQ_RXBD_DESA_8822B */
4533 #define BIT_SHIFT_RXQ_RXBD_DESA_8822B 0
4534 #define BIT_MASK_RXQ_RXBD_DESA_8822B 0xffffffffffffffffL
4535 #define BIT_RXQ_RXBD_DESA_8822B(x) \
4536 (((x) & BIT_MASK_RXQ_RXBD_DESA_8822B) << BIT_SHIFT_RXQ_RXBD_DESA_8822B)
4537 #define BIT_GET_RXQ_RXBD_DESA_8822B(x) \
4538 (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8822B) & BIT_MASK_RXQ_RXBD_DESA_8822B)
4540 /* 2 REG_HI0Q_TXBD_DESA_8822B */
4542 #define BIT_SHIFT_HI0Q_TXBD_DESA_8822B 0
4543 #define BIT_MASK_HI0Q_TXBD_DESA_8822B 0xffffffffffffffffL
4544 #define BIT_HI0Q_TXBD_DESA_8822B(x) \
4545 (((x) & BIT_MASK_HI0Q_TXBD_DESA_8822B) \
4546 << BIT_SHIFT_HI0Q_TXBD_DESA_8822B)
4547 #define BIT_GET_HI0Q_TXBD_DESA_8822B(x) \
4548 (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8822B) & \
4549 BIT_MASK_HI0Q_TXBD_DESA_8822B)
4551 /* 2 REG_HI1Q_TXBD_DESA_8822B */
4553 #define BIT_SHIFT_HI1Q_TXBD_DESA_8822B 0
4554 #define BIT_MASK_HI1Q_TXBD_DESA_8822B 0xffffffffffffffffL
4555 #define BIT_HI1Q_TXBD_DESA_8822B(x) \
4556 (((x) & BIT_MASK_HI1Q_TXBD_DESA_8822B) \
4557 << BIT_SHIFT_HI1Q_TXBD_DESA_8822B)
4558 #define BIT_GET_HI1Q_TXBD_DESA_8822B(x) \
4559 (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8822B) & \
4560 BIT_MASK_HI1Q_TXBD_DESA_8822B)
4562 /* 2 REG_HI2Q_TXBD_DESA_8822B */
4564 #define BIT_SHIFT_HI2Q_TXBD_DESA_8822B 0
4565 #define BIT_MASK_HI2Q_TXBD_DESA_8822B 0xffffffffffffffffL
4566 #define BIT_HI2Q_TXBD_DESA_8822B(x) \
4567 (((x) & BIT_MASK_HI2Q_TXBD_DESA_8822B) \
4568 << BIT_SHIFT_HI2Q_TXBD_DESA_8822B)
4569 #define BIT_GET_HI2Q_TXBD_DESA_8822B(x) \
4570 (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8822B) & \
4571 BIT_MASK_HI2Q_TXBD_DESA_8822B)
4573 /* 2 REG_HI3Q_TXBD_DESA_8822B */
4575 #define BIT_SHIFT_HI3Q_TXBD_DESA_8822B 0
4576 #define BIT_MASK_HI3Q_TXBD_DESA_8822B 0xffffffffffffffffL
4577 #define BIT_HI3Q_TXBD_DESA_8822B(x) \
4578 (((x) & BIT_MASK_HI3Q_TXBD_DESA_8822B) \
4579 << BIT_SHIFT_HI3Q_TXBD_DESA_8822B)
4580 #define BIT_GET_HI3Q_TXBD_DESA_8822B(x) \
4581 (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8822B) & \
4582 BIT_MASK_HI3Q_TXBD_DESA_8822B)
4584 /* 2 REG_HI4Q_TXBD_DESA_8822B */
4586 #define BIT_SHIFT_HI4Q_TXBD_DESA_8822B 0
4587 #define BIT_MASK_HI4Q_TXBD_DESA_8822B 0xffffffffffffffffL
4588 #define BIT_HI4Q_TXBD_DESA_8822B(x) \
4589 (((x) & BIT_MASK_HI4Q_TXBD_DESA_8822B) \
4590 << BIT_SHIFT_HI4Q_TXBD_DESA_8822B)
4591 #define BIT_GET_HI4Q_TXBD_DESA_8822B(x) \
4592 (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8822B) & \
4593 BIT_MASK_HI4Q_TXBD_DESA_8822B)
4595 /* 2 REG_HI5Q_TXBD_DESA_8822B */
4597 #define BIT_SHIFT_HI5Q_TXBD_DESA_8822B 0
4598 #define BIT_MASK_HI5Q_TXBD_DESA_8822B 0xffffffffffffffffL
4599 #define BIT_HI5Q_TXBD_DESA_8822B(x) \
4600 (((x) & BIT_MASK_HI5Q_TXBD_DESA_8822B) \
4601 << BIT_SHIFT_HI5Q_TXBD_DESA_8822B)
4602 #define BIT_GET_HI5Q_TXBD_DESA_8822B(x) \
4603 (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8822B) & \
4604 BIT_MASK_HI5Q_TXBD_DESA_8822B)
4606 /* 2 REG_HI6Q_TXBD_DESA_8822B */
4608 #define BIT_SHIFT_HI6Q_TXBD_DESA_8822B 0
4609 #define BIT_MASK_HI6Q_TXBD_DESA_8822B 0xffffffffffffffffL
4610 #define BIT_HI6Q_TXBD_DESA_8822B(x) \
4611 (((x) & BIT_MASK_HI6Q_TXBD_DESA_8822B) \
4612 << BIT_SHIFT_HI6Q_TXBD_DESA_8822B)
4613 #define BIT_GET_HI6Q_TXBD_DESA_8822B(x) \
4614 (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8822B) & \
4615 BIT_MASK_HI6Q_TXBD_DESA_8822B)
4617 /* 2 REG_HI7Q_TXBD_DESA_8822B */
4619 #define BIT_SHIFT_HI7Q_TXBD_DESA_8822B 0
4620 #define BIT_MASK_HI7Q_TXBD_DESA_8822B 0xffffffffffffffffL
4621 #define BIT_HI7Q_TXBD_DESA_8822B(x) \
4622 (((x) & BIT_MASK_HI7Q_TXBD_DESA_8822B) \
4623 << BIT_SHIFT_HI7Q_TXBD_DESA_8822B)
4624 #define BIT_GET_HI7Q_TXBD_DESA_8822B(x) \
4625 (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8822B) & \
4626 BIT_MASK_HI7Q_TXBD_DESA_8822B)
4628 /* 2 REG_MGQ_TXBD_NUM_8822B */
4629 #define BIT_PCIE_MGQ_FLAG_8822B BIT(14)
4631 #define BIT_SHIFT_MGQ_DESC_MODE_8822B 12
4632 #define BIT_MASK_MGQ_DESC_MODE_8822B 0x3
4633 #define BIT_MGQ_DESC_MODE_8822B(x) \
4634 (((x) & BIT_MASK_MGQ_DESC_MODE_8822B) << BIT_SHIFT_MGQ_DESC_MODE_8822B)
4635 #define BIT_GET_MGQ_DESC_MODE_8822B(x) \
4636 (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8822B) & BIT_MASK_MGQ_DESC_MODE_8822B)
4638 #define BIT_SHIFT_MGQ_DESC_NUM_8822B 0
4639 #define BIT_MASK_MGQ_DESC_NUM_8822B 0xfff
4640 #define BIT_MGQ_DESC_NUM_8822B(x) \
4641 (((x) & BIT_MASK_MGQ_DESC_NUM_8822B) << BIT_SHIFT_MGQ_DESC_NUM_8822B)
4642 #define BIT_GET_MGQ_DESC_NUM_8822B(x) \
4643 (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8822B) & BIT_MASK_MGQ_DESC_NUM_8822B)
4645 /* 2 REG_RX_RXBD_NUM_8822B */
4646 #define BIT_SYS_32_64_8822B BIT(15)
4648 #define BIT_SHIFT_BCNQ_DESC_MODE_8822B 13
4649 #define BIT_MASK_BCNQ_DESC_MODE_8822B 0x3
4650 #define BIT_BCNQ_DESC_MODE_8822B(x) \
4651 (((x) & BIT_MASK_BCNQ_DESC_MODE_8822B) \
4652 << BIT_SHIFT_BCNQ_DESC_MODE_8822B)
4653 #define BIT_GET_BCNQ_DESC_MODE_8822B(x) \
4654 (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8822B) & \
4655 BIT_MASK_BCNQ_DESC_MODE_8822B)
4657 #define BIT_PCIE_BCNQ_FLAG_8822B BIT(12)
4659 #define BIT_SHIFT_RXQ_DESC_NUM_8822B 0
4660 #define BIT_MASK_RXQ_DESC_NUM_8822B 0xfff
4661 #define BIT_RXQ_DESC_NUM_8822B(x) \
4662 (((x) & BIT_MASK_RXQ_DESC_NUM_8822B) << BIT_SHIFT_RXQ_DESC_NUM_8822B)
4663 #define BIT_GET_RXQ_DESC_NUM_8822B(x) \
4664 (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8822B) & BIT_MASK_RXQ_DESC_NUM_8822B)
4666 /* 2 REG_VOQ_TXBD_NUM_8822B */
4667 #define BIT_PCIE_VOQ_FLAG_8822B BIT(14)
4669 #define BIT_SHIFT_VOQ_DESC_MODE_8822B 12
4670 #define BIT_MASK_VOQ_DESC_MODE_8822B 0x3
4671 #define BIT_VOQ_DESC_MODE_8822B(x) \
4672 (((x) & BIT_MASK_VOQ_DESC_MODE_8822B) << BIT_SHIFT_VOQ_DESC_MODE_8822B)
4673 #define BIT_GET_VOQ_DESC_MODE_8822B(x) \
4674 (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8822B) & BIT_MASK_VOQ_DESC_MODE_8822B)
4676 #define BIT_SHIFT_VOQ_DESC_NUM_8822B 0
4677 #define BIT_MASK_VOQ_DESC_NUM_8822B 0xfff
4678 #define BIT_VOQ_DESC_NUM_8822B(x) \
4679 (((x) & BIT_MASK_VOQ_DESC_NUM_8822B) << BIT_SHIFT_VOQ_DESC_NUM_8822B)
4680 #define BIT_GET_VOQ_DESC_NUM_8822B(x) \
4681 (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8822B) & BIT_MASK_VOQ_DESC_NUM_8822B)
4683 /* 2 REG_VIQ_TXBD_NUM_8822B */
4684 #define BIT_PCIE_VIQ_FLAG_8822B BIT(14)
4686 #define BIT_SHIFT_VIQ_DESC_MODE_8822B 12
4687 #define BIT_MASK_VIQ_DESC_MODE_8822B 0x3
4688 #define BIT_VIQ_DESC_MODE_8822B(x) \
4689 (((x) & BIT_MASK_VIQ_DESC_MODE_8822B) << BIT_SHIFT_VIQ_DESC_MODE_8822B)
4690 #define BIT_GET_VIQ_DESC_MODE_8822B(x) \
4691 (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8822B) & BIT_MASK_VIQ_DESC_MODE_8822B)
4693 #define BIT_SHIFT_VIQ_DESC_NUM_8822B 0
4694 #define BIT_MASK_VIQ_DESC_NUM_8822B 0xfff
4695 #define BIT_VIQ_DESC_NUM_8822B(x) \
4696 (((x) & BIT_MASK_VIQ_DESC_NUM_8822B) << BIT_SHIFT_VIQ_DESC_NUM_8822B)
4697 #define BIT_GET_VIQ_DESC_NUM_8822B(x) \
4698 (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8822B) & BIT_MASK_VIQ_DESC_NUM_8822B)
4700 /* 2 REG_BEQ_TXBD_NUM_8822B */
4701 #define BIT_PCIE_BEQ_FLAG_8822B BIT(14)
4703 #define BIT_SHIFT_BEQ_DESC_MODE_8822B 12
4704 #define BIT_MASK_BEQ_DESC_MODE_8822B 0x3
4705 #define BIT_BEQ_DESC_MODE_8822B(x) \
4706 (((x) & BIT_MASK_BEQ_DESC_MODE_8822B) << BIT_SHIFT_BEQ_DESC_MODE_8822B)
4707 #define BIT_GET_BEQ_DESC_MODE_8822B(x) \
4708 (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8822B) & BIT_MASK_BEQ_DESC_MODE_8822B)
4710 #define BIT_SHIFT_BEQ_DESC_NUM_8822B 0
4711 #define BIT_MASK_BEQ_DESC_NUM_8822B 0xfff
4712 #define BIT_BEQ_DESC_NUM_8822B(x) \
4713 (((x) & BIT_MASK_BEQ_DESC_NUM_8822B) << BIT_SHIFT_BEQ_DESC_NUM_8822B)
4714 #define BIT_GET_BEQ_DESC_NUM_8822B(x) \
4715 (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8822B) & BIT_MASK_BEQ_DESC_NUM_8822B)
4717 /* 2 REG_BKQ_TXBD_NUM_8822B */
4718 #define BIT_PCIE_BKQ_FLAG_8822B BIT(14)
4720 #define BIT_SHIFT_BKQ_DESC_MODE_8822B 12
4721 #define BIT_MASK_BKQ_DESC_MODE_8822B 0x3
4722 #define BIT_BKQ_DESC_MODE_8822B(x) \
4723 (((x) & BIT_MASK_BKQ_DESC_MODE_8822B) << BIT_SHIFT_BKQ_DESC_MODE_8822B)
4724 #define BIT_GET_BKQ_DESC_MODE_8822B(x) \
4725 (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8822B) & BIT_MASK_BKQ_DESC_MODE_8822B)
4727 #define BIT_SHIFT_BKQ_DESC_NUM_8822B 0
4728 #define BIT_MASK_BKQ_DESC_NUM_8822B 0xfff
4729 #define BIT_BKQ_DESC_NUM_8822B(x) \
4730 (((x) & BIT_MASK_BKQ_DESC_NUM_8822B) << BIT_SHIFT_BKQ_DESC_NUM_8822B)
4731 #define BIT_GET_BKQ_DESC_NUM_8822B(x) \
4732 (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8822B) & BIT_MASK_BKQ_DESC_NUM_8822B)
4734 /* 2 REG_HI0Q_TXBD_NUM_8822B */
4735 #define BIT_HI0Q_FLAG_8822B BIT(14)
4737 #define BIT_SHIFT_HI0Q_DESC_MODE_8822B 12
4738 #define BIT_MASK_HI0Q_DESC_MODE_8822B 0x3
4739 #define BIT_HI0Q_DESC_MODE_8822B(x) \
4740 (((x) & BIT_MASK_HI0Q_DESC_MODE_8822B) \
4741 << BIT_SHIFT_HI0Q_DESC_MODE_8822B)
4742 #define BIT_GET_HI0Q_DESC_MODE_8822B(x) \
4743 (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8822B) & \
4744 BIT_MASK_HI0Q_DESC_MODE_8822B)
4746 #define BIT_SHIFT_HI0Q_DESC_NUM_8822B 0
4747 #define BIT_MASK_HI0Q_DESC_NUM_8822B 0xfff
4748 #define BIT_HI0Q_DESC_NUM_8822B(x) \
4749 (((x) & BIT_MASK_HI0Q_DESC_NUM_8822B) << BIT_SHIFT_HI0Q_DESC_NUM_8822B)
4750 #define BIT_GET_HI0Q_DESC_NUM_8822B(x) \
4751 (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8822B) & BIT_MASK_HI0Q_DESC_NUM_8822B)
4753 /* 2 REG_HI1Q_TXBD_NUM_8822B */
4754 #define BIT_HI1Q_FLAG_8822B BIT(14)
4756 #define BIT_SHIFT_HI1Q_DESC_MODE_8822B 12
4757 #define BIT_MASK_HI1Q_DESC_MODE_8822B 0x3
4758 #define BIT_HI1Q_DESC_MODE_8822B(x) \
4759 (((x) & BIT_MASK_HI1Q_DESC_MODE_8822B) \
4760 << BIT_SHIFT_HI1Q_DESC_MODE_8822B)
4761 #define BIT_GET_HI1Q_DESC_MODE_8822B(x) \
4762 (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8822B) & \
4763 BIT_MASK_HI1Q_DESC_MODE_8822B)
4765 #define BIT_SHIFT_HI1Q_DESC_NUM_8822B 0
4766 #define BIT_MASK_HI1Q_DESC_NUM_8822B 0xfff
4767 #define BIT_HI1Q_DESC_NUM_8822B(x) \
4768 (((x) & BIT_MASK_HI1Q_DESC_NUM_8822B) << BIT_SHIFT_HI1Q_DESC_NUM_8822B)
4769 #define BIT_GET_HI1Q_DESC_NUM_8822B(x) \
4770 (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8822B) & BIT_MASK_HI1Q_DESC_NUM_8822B)
4772 /* 2 REG_HI2Q_TXBD_NUM_8822B */
4773 #define BIT_HI2Q_FLAG_8822B BIT(14)
4775 #define BIT_SHIFT_HI2Q_DESC_MODE_8822B 12
4776 #define BIT_MASK_HI2Q_DESC_MODE_8822B 0x3
4777 #define BIT_HI2Q_DESC_MODE_8822B(x) \
4778 (((x) & BIT_MASK_HI2Q_DESC_MODE_8822B) \
4779 << BIT_SHIFT_HI2Q_DESC_MODE_8822B)
4780 #define BIT_GET_HI2Q_DESC_MODE_8822B(x) \
4781 (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8822B) & \
4782 BIT_MASK_HI2Q_DESC_MODE_8822B)
4784 #define BIT_SHIFT_HI2Q_DESC_NUM_8822B 0
4785 #define BIT_MASK_HI2Q_DESC_NUM_8822B 0xfff
4786 #define BIT_HI2Q_DESC_NUM_8822B(x) \
4787 (((x) & BIT_MASK_HI2Q_DESC_NUM_8822B) << BIT_SHIFT_HI2Q_DESC_NUM_8822B)
4788 #define BIT_GET_HI2Q_DESC_NUM_8822B(x) \
4789 (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8822B) & BIT_MASK_HI2Q_DESC_NUM_8822B)
4791 /* 2 REG_HI3Q_TXBD_NUM_8822B */
4792 #define BIT_HI3Q_FLAG_8822B BIT(14)
4794 #define BIT_SHIFT_HI3Q_DESC_MODE_8822B 12
4795 #define BIT_MASK_HI3Q_DESC_MODE_8822B 0x3
4796 #define BIT_HI3Q_DESC_MODE_8822B(x) \
4797 (((x) & BIT_MASK_HI3Q_DESC_MODE_8822B) \
4798 << BIT_SHIFT_HI3Q_DESC_MODE_8822B)
4799 #define BIT_GET_HI3Q_DESC_MODE_8822B(x) \
4800 (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8822B) & \
4801 BIT_MASK_HI3Q_DESC_MODE_8822B)
4803 #define BIT_SHIFT_HI3Q_DESC_NUM_8822B 0
4804 #define BIT_MASK_HI3Q_DESC_NUM_8822B 0xfff
4805 #define BIT_HI3Q_DESC_NUM_8822B(x) \
4806 (((x) & BIT_MASK_HI3Q_DESC_NUM_8822B) << BIT_SHIFT_HI3Q_DESC_NUM_8822B)
4807 #define BIT_GET_HI3Q_DESC_NUM_8822B(x) \
4808 (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8822B) & BIT_MASK_HI3Q_DESC_NUM_8822B)
4810 /* 2 REG_HI4Q_TXBD_NUM_8822B */
4811 #define BIT_HI4Q_FLAG_8822B BIT(14)
4813 #define BIT_SHIFT_HI4Q_DESC_MODE_8822B 12
4814 #define BIT_MASK_HI4Q_DESC_MODE_8822B 0x3
4815 #define BIT_HI4Q_DESC_MODE_8822B(x) \
4816 (((x) & BIT_MASK_HI4Q_DESC_MODE_8822B) \
4817 << BIT_SHIFT_HI4Q_DESC_MODE_8822B)
4818 #define BIT_GET_HI4Q_DESC_MODE_8822B(x) \
4819 (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8822B) & \
4820 BIT_MASK_HI4Q_DESC_MODE_8822B)
4822 #define BIT_SHIFT_HI4Q_DESC_NUM_8822B 0
4823 #define BIT_MASK_HI4Q_DESC_NUM_8822B 0xfff
4824 #define BIT_HI4Q_DESC_NUM_8822B(x) \
4825 (((x) & BIT_MASK_HI4Q_DESC_NUM_8822B) << BIT_SHIFT_HI4Q_DESC_NUM_8822B)
4826 #define BIT_GET_HI4Q_DESC_NUM_8822B(x) \
4827 (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8822B) & BIT_MASK_HI4Q_DESC_NUM_8822B)
4829 /* 2 REG_HI5Q_TXBD_NUM_8822B */
4830 #define BIT_HI5Q_FLAG_8822B BIT(14)
4832 #define BIT_SHIFT_HI5Q_DESC_MODE_8822B 12
4833 #define BIT_MASK_HI5Q_DESC_MODE_8822B 0x3
4834 #define BIT_HI5Q_DESC_MODE_8822B(x) \
4835 (((x) & BIT_MASK_HI5Q_DESC_MODE_8822B) \
4836 << BIT_SHIFT_HI5Q_DESC_MODE_8822B)
4837 #define BIT_GET_HI5Q_DESC_MODE_8822B(x) \
4838 (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8822B) & \
4839 BIT_MASK_HI5Q_DESC_MODE_8822B)
4841 #define BIT_SHIFT_HI5Q_DESC_NUM_8822B 0
4842 #define BIT_MASK_HI5Q_DESC_NUM_8822B 0xfff
4843 #define BIT_HI5Q_DESC_NUM_8822B(x) \
4844 (((x) & BIT_MASK_HI5Q_DESC_NUM_8822B) << BIT_SHIFT_HI5Q_DESC_NUM_8822B)
4845 #define BIT_GET_HI5Q_DESC_NUM_8822B(x) \
4846 (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8822B) & BIT_MASK_HI5Q_DESC_NUM_8822B)
4848 /* 2 REG_HI6Q_TXBD_NUM_8822B */
4849 #define BIT_HI6Q_FLAG_8822B BIT(14)
4851 #define BIT_SHIFT_HI6Q_DESC_MODE_8822B 12
4852 #define BIT_MASK_HI6Q_DESC_MODE_8822B 0x3
4853 #define BIT_HI6Q_DESC_MODE_8822B(x) \
4854 (((x) & BIT_MASK_HI6Q_DESC_MODE_8822B) \
4855 << BIT_SHIFT_HI6Q_DESC_MODE_8822B)
4856 #define BIT_GET_HI6Q_DESC_MODE_8822B(x) \
4857 (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8822B) & \
4858 BIT_MASK_HI6Q_DESC_MODE_8822B)
4860 #define BIT_SHIFT_HI6Q_DESC_NUM_8822B 0
4861 #define BIT_MASK_HI6Q_DESC_NUM_8822B 0xfff
4862 #define BIT_HI6Q_DESC_NUM_8822B(x) \
4863 (((x) & BIT_MASK_HI6Q_DESC_NUM_8822B) << BIT_SHIFT_HI6Q_DESC_NUM_8822B)
4864 #define BIT_GET_HI6Q_DESC_NUM_8822B(x) \
4865 (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8822B) & BIT_MASK_HI6Q_DESC_NUM_8822B)
4867 /* 2 REG_HI7Q_TXBD_NUM_8822B */
4868 #define BIT_HI7Q_FLAG_8822B BIT(14)
4870 #define BIT_SHIFT_HI7Q_DESC_MODE_8822B 12
4871 #define BIT_MASK_HI7Q_DESC_MODE_8822B 0x3
4872 #define BIT_HI7Q_DESC_MODE_8822B(x) \
4873 (((x) & BIT_MASK_HI7Q_DESC_MODE_8822B) \
4874 << BIT_SHIFT_HI7Q_DESC_MODE_8822B)
4875 #define BIT_GET_HI7Q_DESC_MODE_8822B(x) \
4876 (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8822B) & \
4877 BIT_MASK_HI7Q_DESC_MODE_8822B)
4879 #define BIT_SHIFT_HI7Q_DESC_NUM_8822B 0
4880 #define BIT_MASK_HI7Q_DESC_NUM_8822B 0xfff
4881 #define BIT_HI7Q_DESC_NUM_8822B(x) \
4882 (((x) & BIT_MASK_HI7Q_DESC_NUM_8822B) << BIT_SHIFT_HI7Q_DESC_NUM_8822B)
4883 #define BIT_GET_HI7Q_DESC_NUM_8822B(x) \
4884 (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8822B) & BIT_MASK_HI7Q_DESC_NUM_8822B)
4886 /* 2 REG_TSFTIMER_HCI_8822B */
4888 #define BIT_SHIFT_TSFT2_HCI_8822B 16
4889 #define BIT_MASK_TSFT2_HCI_8822B 0xffff
4890 #define BIT_TSFT2_HCI_8822B(x) \
4891 (((x) & BIT_MASK_TSFT2_HCI_8822B) << BIT_SHIFT_TSFT2_HCI_8822B)
4892 #define BIT_GET_TSFT2_HCI_8822B(x) \
4893 (((x) >> BIT_SHIFT_TSFT2_HCI_8822B) & BIT_MASK_TSFT2_HCI_8822B)
4895 #define BIT_SHIFT_TSFT1_HCI_8822B 0
4896 #define BIT_MASK_TSFT1_HCI_8822B 0xffff
4897 #define BIT_TSFT1_HCI_8822B(x) \
4898 (((x) & BIT_MASK_TSFT1_HCI_8822B) << BIT_SHIFT_TSFT1_HCI_8822B)
4899 #define BIT_GET_TSFT1_HCI_8822B(x) \
4900 (((x) >> BIT_SHIFT_TSFT1_HCI_8822B) & BIT_MASK_TSFT1_HCI_8822B)
4902 /* 2 REG_BD_RWPTR_CLR_8822B */
4903 #define BIT_CLR_HI7Q_HW_IDX_8822B BIT(29)
4904 #define BIT_CLR_HI6Q_HW_IDX_8822B BIT(28)
4905 #define BIT_CLR_HI5Q_HW_IDX_8822B BIT(27)
4906 #define BIT_CLR_HI4Q_HW_IDX_8822B BIT(26)
4907 #define BIT_CLR_HI3Q_HW_IDX_8822B BIT(25)
4908 #define BIT_CLR_HI2Q_HW_IDX_8822B BIT(24)
4909 #define BIT_CLR_HI1Q_HW_IDX_8822B BIT(23)
4910 #define BIT_CLR_HI0Q_HW_IDX_8822B BIT(22)
4911 #define BIT_CLR_BKQ_HW_IDX_8822B BIT(21)
4912 #define BIT_CLR_BEQ_HW_IDX_8822B BIT(20)
4913 #define BIT_CLR_VIQ_HW_IDX_8822B BIT(19)
4914 #define BIT_CLR_VOQ_HW_IDX_8822B BIT(18)
4915 #define BIT_CLR_MGQ_HW_IDX_8822B BIT(17)
4916 #define BIT_CLR_RXQ_HW_IDX_8822B BIT(16)
4917 #define BIT_CLR_HI7Q_HOST_IDX_8822B BIT(13)
4918 #define BIT_CLR_HI6Q_HOST_IDX_8822B BIT(12)
4919 #define BIT_CLR_HI5Q_HOST_IDX_8822B BIT(11)
4920 #define BIT_CLR_HI4Q_HOST_IDX_8822B BIT(10)
4921 #define BIT_CLR_HI3Q_HOST_IDX_8822B BIT(9)
4922 #define BIT_CLR_HI2Q_HOST_IDX_8822B BIT(8)
4923 #define BIT_CLR_HI1Q_HOST_IDX_8822B BIT(7)
4924 #define BIT_CLR_HI0Q_HOST_IDX_8822B BIT(6)
4925 #define BIT_CLR_BKQ_HOST_IDX_8822B BIT(5)
4926 #define BIT_CLR_BEQ_HOST_IDX_8822B BIT(4)
4927 #define BIT_CLR_VIQ_HOST_IDX_8822B BIT(3)
4928 #define BIT_CLR_VOQ_HOST_IDX_8822B BIT(2)
4929 #define BIT_CLR_MGQ_HOST_IDX_8822B BIT(1)
4930 #define BIT_CLR_RXQ_HOST_IDX_8822B BIT(0)
4932 /* 2 REG_VOQ_TXBD_IDX_8822B */
4934 #define BIT_SHIFT_VOQ_HW_IDX_8822B 16
4935 #define BIT_MASK_VOQ_HW_IDX_8822B 0xfff
4936 #define BIT_VOQ_HW_IDX_8822B(x) \
4937 (((x) & BIT_MASK_VOQ_HW_IDX_8822B) << BIT_SHIFT_VOQ_HW_IDX_8822B)
4938 #define BIT_GET_VOQ_HW_IDX_8822B(x) \
4939 (((x) >> BIT_SHIFT_VOQ_HW_IDX_8822B) & BIT_MASK_VOQ_HW_IDX_8822B)
4941 #define BIT_SHIFT_VOQ_HOST_IDX_8822B 0
4942 #define BIT_MASK_VOQ_HOST_IDX_8822B 0xfff
4943 #define BIT_VOQ_HOST_IDX_8822B(x) \
4944 (((x) & BIT_MASK_VOQ_HOST_IDX_8822B) << BIT_SHIFT_VOQ_HOST_IDX_8822B)
4945 #define BIT_GET_VOQ_HOST_IDX_8822B(x) \
4946 (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8822B) & BIT_MASK_VOQ_HOST_IDX_8822B)
4948 /* 2 REG_VIQ_TXBD_IDX_8822B */
4950 #define BIT_SHIFT_VIQ_HW_IDX_8822B 16
4951 #define BIT_MASK_VIQ_HW_IDX_8822B 0xfff
4952 #define BIT_VIQ_HW_IDX_8822B(x) \
4953 (((x) & BIT_MASK_VIQ_HW_IDX_8822B) << BIT_SHIFT_VIQ_HW_IDX_8822B)
4954 #define BIT_GET_VIQ_HW_IDX_8822B(x) \
4955 (((x) >> BIT_SHIFT_VIQ_HW_IDX_8822B) & BIT_MASK_VIQ_HW_IDX_8822B)
4957 #define BIT_SHIFT_VIQ_HOST_IDX_8822B 0
4958 #define BIT_MASK_VIQ_HOST_IDX_8822B 0xfff
4959 #define BIT_VIQ_HOST_IDX_8822B(x) \
4960 (((x) & BIT_MASK_VIQ_HOST_IDX_8822B) << BIT_SHIFT_VIQ_HOST_IDX_8822B)
4961 #define BIT_GET_VIQ_HOST_IDX_8822B(x) \
4962 (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8822B) & BIT_MASK_VIQ_HOST_IDX_8822B)
4964 /* 2 REG_BEQ_TXBD_IDX_8822B */
4966 #define BIT_SHIFT_BEQ_HW_IDX_8822B 16
4967 #define BIT_MASK_BEQ_HW_IDX_8822B 0xfff
4968 #define BIT_BEQ_HW_IDX_8822B(x) \
4969 (((x) & BIT_MASK_BEQ_HW_IDX_8822B) << BIT_SHIFT_BEQ_HW_IDX_8822B)
4970 #define BIT_GET_BEQ_HW_IDX_8822B(x) \
4971 (((x) >> BIT_SHIFT_BEQ_HW_IDX_8822B) & BIT_MASK_BEQ_HW_IDX_8822B)
4973 #define BIT_SHIFT_BEQ_HOST_IDX_8822B 0
4974 #define BIT_MASK_BEQ_HOST_IDX_8822B 0xfff
4975 #define BIT_BEQ_HOST_IDX_8822B(x) \
4976 (((x) & BIT_MASK_BEQ_HOST_IDX_8822B) << BIT_SHIFT_BEQ_HOST_IDX_8822B)
4977 #define BIT_GET_BEQ_HOST_IDX_8822B(x) \
4978 (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8822B) & BIT_MASK_BEQ_HOST_IDX_8822B)
4980 /* 2 REG_BKQ_TXBD_IDX_8822B */
4982 #define BIT_SHIFT_BKQ_HW_IDX_8822B 16
4983 #define BIT_MASK_BKQ_HW_IDX_8822B 0xfff
4984 #define BIT_BKQ_HW_IDX_8822B(x) \
4985 (((x) & BIT_MASK_BKQ_HW_IDX_8822B) << BIT_SHIFT_BKQ_HW_IDX_8822B)
4986 #define BIT_GET_BKQ_HW_IDX_8822B(x) \
4987 (((x) >> BIT_SHIFT_BKQ_HW_IDX_8822B) & BIT_MASK_BKQ_HW_IDX_8822B)
4989 #define BIT_SHIFT_BKQ_HOST_IDX_8822B 0
4990 #define BIT_MASK_BKQ_HOST_IDX_8822B 0xfff
4991 #define BIT_BKQ_HOST_IDX_8822B(x) \
4992 (((x) & BIT_MASK_BKQ_HOST_IDX_8822B) << BIT_SHIFT_BKQ_HOST_IDX_8822B)
4993 #define BIT_GET_BKQ_HOST_IDX_8822B(x) \
4994 (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8822B) & BIT_MASK_BKQ_HOST_IDX_8822B)
4996 /* 2 REG_MGQ_TXBD_IDX_8822B */
4998 #define BIT_SHIFT_MGQ_HW_IDX_8822B 16
4999 #define BIT_MASK_MGQ_HW_IDX_8822B 0xfff
5000 #define BIT_MGQ_HW_IDX_8822B(x) \
5001 (((x) & BIT_MASK_MGQ_HW_IDX_8822B) << BIT_SHIFT_MGQ_HW_IDX_8822B)
5002 #define BIT_GET_MGQ_HW_IDX_8822B(x) \
5003 (((x) >> BIT_SHIFT_MGQ_HW_IDX_8822B) & BIT_MASK_MGQ_HW_IDX_8822B)
5005 #define BIT_SHIFT_MGQ_HOST_IDX_8822B 0
5006 #define BIT_MASK_MGQ_HOST_IDX_8822B 0xfff
5007 #define BIT_MGQ_HOST_IDX_8822B(x) \
5008 (((x) & BIT_MASK_MGQ_HOST_IDX_8822B) << BIT_SHIFT_MGQ_HOST_IDX_8822B)
5009 #define BIT_GET_MGQ_HOST_IDX_8822B(x) \
5010 (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8822B) & BIT_MASK_MGQ_HOST_IDX_8822B)
5012 /* 2 REG_RXQ_RXBD_IDX_8822B */
5014 #define BIT_SHIFT_RXQ_HW_IDX_8822B 16
5015 #define BIT_MASK_RXQ_HW_IDX_8822B 0xfff
5016 #define BIT_RXQ_HW_IDX_8822B(x) \
5017 (((x) & BIT_MASK_RXQ_HW_IDX_8822B) << BIT_SHIFT_RXQ_HW_IDX_8822B)
5018 #define BIT_GET_RXQ_HW_IDX_8822B(x) \
5019 (((x) >> BIT_SHIFT_RXQ_HW_IDX_8822B) & BIT_MASK_RXQ_HW_IDX_8822B)
5021 #define BIT_SHIFT_RXQ_HOST_IDX_8822B 0
5022 #define BIT_MASK_RXQ_HOST_IDX_8822B 0xfff
5023 #define BIT_RXQ_HOST_IDX_8822B(x) \
5024 (((x) & BIT_MASK_RXQ_HOST_IDX_8822B) << BIT_SHIFT_RXQ_HOST_IDX_8822B)
5025 #define BIT_GET_RXQ_HOST_IDX_8822B(x) \
5026 (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8822B) & BIT_MASK_RXQ_HOST_IDX_8822B)
5028 /* 2 REG_HI0Q_TXBD_IDX_8822B */
5030 #define BIT_SHIFT_HI0Q_HW_IDX_8822B 16
5031 #define BIT_MASK_HI0Q_HW_IDX_8822B 0xfff
5032 #define BIT_HI0Q_HW_IDX_8822B(x) \
5033 (((x) & BIT_MASK_HI0Q_HW_IDX_8822B) << BIT_SHIFT_HI0Q_HW_IDX_8822B)
5034 #define BIT_GET_HI0Q_HW_IDX_8822B(x) \
5035 (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8822B) & BIT_MASK_HI0Q_HW_IDX_8822B)
5037 #define BIT_SHIFT_HI0Q_HOST_IDX_8822B 0
5038 #define BIT_MASK_HI0Q_HOST_IDX_8822B 0xfff
5039 #define BIT_HI0Q_HOST_IDX_8822B(x) \
5040 (((x) & BIT_MASK_HI0Q_HOST_IDX_8822B) << BIT_SHIFT_HI0Q_HOST_IDX_8822B)
5041 #define BIT_GET_HI0Q_HOST_IDX_8822B(x) \
5042 (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8822B) & BIT_MASK_HI0Q_HOST_IDX_8822B)
5044 /* 2 REG_HI1Q_TXBD_IDX_8822B */
5046 #define BIT_SHIFT_HI1Q_HW_IDX_8822B 16
5047 #define BIT_MASK_HI1Q_HW_IDX_8822B 0xfff
5048 #define BIT_HI1Q_HW_IDX_8822B(x) \
5049 (((x) & BIT_MASK_HI1Q_HW_IDX_8822B) << BIT_SHIFT_HI1Q_HW_IDX_8822B)
5050 #define BIT_GET_HI1Q_HW_IDX_8822B(x) \
5051 (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8822B) & BIT_MASK_HI1Q_HW_IDX_8822B)
5053 #define BIT_SHIFT_HI1Q_HOST_IDX_8822B 0
5054 #define BIT_MASK_HI1Q_HOST_IDX_8822B 0xfff
5055 #define BIT_HI1Q_HOST_IDX_8822B(x) \
5056 (((x) & BIT_MASK_HI1Q_HOST_IDX_8822B) << BIT_SHIFT_HI1Q_HOST_IDX_8822B)
5057 #define BIT_GET_HI1Q_HOST_IDX_8822B(x) \
5058 (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8822B) & BIT_MASK_HI1Q_HOST_IDX_8822B)
5060 /* 2 REG_HI2Q_TXBD_IDX_8822B */
5062 #define BIT_SHIFT_HI2Q_HW_IDX_8822B 16
5063 #define BIT_MASK_HI2Q_HW_IDX_8822B 0xfff
5064 #define BIT_HI2Q_HW_IDX_8822B(x) \
5065 (((x) & BIT_MASK_HI2Q_HW_IDX_8822B) << BIT_SHIFT_HI2Q_HW_IDX_8822B)
5066 #define BIT_GET_HI2Q_HW_IDX_8822B(x) \
5067 (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8822B) & BIT_MASK_HI2Q_HW_IDX_8822B)
5069 #define BIT_SHIFT_HI2Q_HOST_IDX_8822B 0
5070 #define BIT_MASK_HI2Q_HOST_IDX_8822B 0xfff
5071 #define BIT_HI2Q_HOST_IDX_8822B(x) \
5072 (((x) & BIT_MASK_HI2Q_HOST_IDX_8822B) << BIT_SHIFT_HI2Q_HOST_IDX_8822B)
5073 #define BIT_GET_HI2Q_HOST_IDX_8822B(x) \
5074 (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8822B) & BIT_MASK_HI2Q_HOST_IDX_8822B)
5076 /* 2 REG_HI3Q_TXBD_IDX_8822B */
5078 #define BIT_SHIFT_HI3Q_HW_IDX_8822B 16
5079 #define BIT_MASK_HI3Q_HW_IDX_8822B 0xfff
5080 #define BIT_HI3Q_HW_IDX_8822B(x) \
5081 (((x) & BIT_MASK_HI3Q_HW_IDX_8822B) << BIT_SHIFT_HI3Q_HW_IDX_8822B)
5082 #define BIT_GET_HI3Q_HW_IDX_8822B(x) \
5083 (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8822B) & BIT_MASK_HI3Q_HW_IDX_8822B)
5085 #define BIT_SHIFT_HI3Q_HOST_IDX_8822B 0
5086 #define BIT_MASK_HI3Q_HOST_IDX_8822B 0xfff
5087 #define BIT_HI3Q_HOST_IDX_8822B(x) \
5088 (((x) & BIT_MASK_HI3Q_HOST_IDX_8822B) << BIT_SHIFT_HI3Q_HOST_IDX_8822B)
5089 #define BIT_GET_HI3Q_HOST_IDX_8822B(x) \
5090 (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8822B) & BIT_MASK_HI3Q_HOST_IDX_8822B)
5092 /* 2 REG_HI4Q_TXBD_IDX_8822B */
5094 #define BIT_SHIFT_HI4Q_HW_IDX_8822B 16
5095 #define BIT_MASK_HI4Q_HW_IDX_8822B 0xfff
5096 #define BIT_HI4Q_HW_IDX_8822B(x) \
5097 (((x) & BIT_MASK_HI4Q_HW_IDX_8822B) << BIT_SHIFT_HI4Q_HW_IDX_8822B)
5098 #define BIT_GET_HI4Q_HW_IDX_8822B(x) \
5099 (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8822B) & BIT_MASK_HI4Q_HW_IDX_8822B)
5101 #define BIT_SHIFT_HI4Q_HOST_IDX_8822B 0
5102 #define BIT_MASK_HI4Q_HOST_IDX_8822B 0xfff
5103 #define BIT_HI4Q_HOST_IDX_8822B(x) \
5104 (((x) & BIT_MASK_HI4Q_HOST_IDX_8822B) << BIT_SHIFT_HI4Q_HOST_IDX_8822B)
5105 #define BIT_GET_HI4Q_HOST_IDX_8822B(x) \
5106 (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8822B) & BIT_MASK_HI4Q_HOST_IDX_8822B)
5108 /* 2 REG_HI5Q_TXBD_IDX_8822B */
5110 #define BIT_SHIFT_HI5Q_HW_IDX_8822B 16
5111 #define BIT_MASK_HI5Q_HW_IDX_8822B 0xfff
5112 #define BIT_HI5Q_HW_IDX_8822B(x) \
5113 (((x) & BIT_MASK_HI5Q_HW_IDX_8822B) << BIT_SHIFT_HI5Q_HW_IDX_8822B)
5114 #define BIT_GET_HI5Q_HW_IDX_8822B(x) \
5115 (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8822B) & BIT_MASK_HI5Q_HW_IDX_8822B)
5117 #define BIT_SHIFT_HI5Q_HOST_IDX_8822B 0
5118 #define BIT_MASK_HI5Q_HOST_IDX_8822B 0xfff
5119 #define BIT_HI5Q_HOST_IDX_8822B(x) \
5120 (((x) & BIT_MASK_HI5Q_HOST_IDX_8822B) << BIT_SHIFT_HI5Q_HOST_IDX_8822B)
5121 #define BIT_GET_HI5Q_HOST_IDX_8822B(x) \
5122 (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8822B) & BIT_MASK_HI5Q_HOST_IDX_8822B)
5124 /* 2 REG_HI6Q_TXBD_IDX_8822B */
5126 #define BIT_SHIFT_HI6Q_HW_IDX_8822B 16
5127 #define BIT_MASK_HI6Q_HW_IDX_8822B 0xfff
5128 #define BIT_HI6Q_HW_IDX_8822B(x) \
5129 (((x) & BIT_MASK_HI6Q_HW_IDX_8822B) << BIT_SHIFT_HI6Q_HW_IDX_8822B)
5130 #define BIT_GET_HI6Q_HW_IDX_8822B(x) \
5131 (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8822B) & BIT_MASK_HI6Q_HW_IDX_8822B)
5133 #define BIT_SHIFT_HI6Q_HOST_IDX_8822B 0
5134 #define BIT_MASK_HI6Q_HOST_IDX_8822B 0xfff
5135 #define BIT_HI6Q_HOST_IDX_8822B(x) \
5136 (((x) & BIT_MASK_HI6Q_HOST_IDX_8822B) << BIT_SHIFT_HI6Q_HOST_IDX_8822B)
5137 #define BIT_GET_HI6Q_HOST_IDX_8822B(x) \
5138 (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8822B) & BIT_MASK_HI6Q_HOST_IDX_8822B)
5140 /* 2 REG_HI7Q_TXBD_IDX_8822B */
5142 #define BIT_SHIFT_HI7Q_HW_IDX_8822B 16
5143 #define BIT_MASK_HI7Q_HW_IDX_8822B 0xfff
5144 #define BIT_HI7Q_HW_IDX_8822B(x) \
5145 (((x) & BIT_MASK_HI7Q_HW_IDX_8822B) << BIT_SHIFT_HI7Q_HW_IDX_8822B)
5146 #define BIT_GET_HI7Q_HW_IDX_8822B(x) \
5147 (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8822B) & BIT_MASK_HI7Q_HW_IDX_8822B)
5149 #define BIT_SHIFT_HI7Q_HOST_IDX_8822B 0
5150 #define BIT_MASK_HI7Q_HOST_IDX_8822B 0xfff
5151 #define BIT_HI7Q_HOST_IDX_8822B(x) \
5152 (((x) & BIT_MASK_HI7Q_HOST_IDX_8822B) << BIT_SHIFT_HI7Q_HOST_IDX_8822B)
5153 #define BIT_GET_HI7Q_HOST_IDX_8822B(x) \
5154 (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8822B) & BIT_MASK_HI7Q_HOST_IDX_8822B)
5156 /* 2 REG_DBG_SEL_V1_8822B */
5158 #define BIT_SHIFT_DBG_SEL_8822B 0
5159 #define BIT_MASK_DBG_SEL_8822B 0xff
5160 #define BIT_DBG_SEL_8822B(x) \
5161 (((x) & BIT_MASK_DBG_SEL_8822B) << BIT_SHIFT_DBG_SEL_8822B)
5162 #define BIT_GET_DBG_SEL_8822B(x) \
5163 (((x) >> BIT_SHIFT_DBG_SEL_8822B) & BIT_MASK_DBG_SEL_8822B)
5165 /* 2 REG_PCIE_HRPWM1_V1_8822B */
5167 #define BIT_SHIFT_PCIE_HRPWM_8822B 0
5168 #define BIT_MASK_PCIE_HRPWM_8822B 0xff
5169 #define BIT_PCIE_HRPWM_8822B(x) \
5170 (((x) & BIT_MASK_PCIE_HRPWM_8822B) << BIT_SHIFT_PCIE_HRPWM_8822B)
5171 #define BIT_GET_PCIE_HRPWM_8822B(x) \
5172 (((x) >> BIT_SHIFT_PCIE_HRPWM_8822B) & BIT_MASK_PCIE_HRPWM_8822B)
5174 /* 2 REG_PCIE_HCPWM1_V1_8822B */
5176 #define BIT_SHIFT_PCIE_HCPWM_8822B 0
5177 #define BIT_MASK_PCIE_HCPWM_8822B 0xff
5178 #define BIT_PCIE_HCPWM_8822B(x) \
5179 (((x) & BIT_MASK_PCIE_HCPWM_8822B) << BIT_SHIFT_PCIE_HCPWM_8822B)
5180 #define BIT_GET_PCIE_HCPWM_8822B(x) \
5181 (((x) >> BIT_SHIFT_PCIE_HCPWM_8822B) & BIT_MASK_PCIE_HCPWM_8822B)
5183 /* 2 REG_PCIE_CTRL2_8822B */
5184 #define BIT_DIS_TXDMA_PRE_8822B BIT(7)
5185 #define BIT_DIS_RXDMA_PRE_8822B BIT(6)
5187 #define BIT_SHIFT_HPS_CLKR_PCIE_8822B 4
5188 #define BIT_MASK_HPS_CLKR_PCIE_8822B 0x3
5189 #define BIT_HPS_CLKR_PCIE_8822B(x) \
5190 (((x) & BIT_MASK_HPS_CLKR_PCIE_8822B) << BIT_SHIFT_HPS_CLKR_PCIE_8822B)
5191 #define BIT_GET_HPS_CLKR_PCIE_8822B(x) \
5192 (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8822B) & BIT_MASK_HPS_CLKR_PCIE_8822B)
5194 #define BIT_PCIE_INT_8822B BIT(3)
5195 #define BIT_TXFLAG_EXIT_L1_EN_8822B BIT(2)
5196 #define BIT_EN_RXDMA_ALIGN_8822B BIT(1)
5197 #define BIT_EN_TXDMA_ALIGN_8822B BIT(0)
5199 /* 2 REG_PCIE_HRPWM2_V1_8822B */
5201 #define BIT_SHIFT_PCIE_HRPWM2_8822B 0
5202 #define BIT_MASK_PCIE_HRPWM2_8822B 0xffff
5203 #define BIT_PCIE_HRPWM2_8822B(x) \
5204 (((x) & BIT_MASK_PCIE_HRPWM2_8822B) << BIT_SHIFT_PCIE_HRPWM2_8822B)
5205 #define BIT_GET_PCIE_HRPWM2_8822B(x) \
5206 (((x) >> BIT_SHIFT_PCIE_HRPWM2_8822B) & BIT_MASK_PCIE_HRPWM2_8822B)
5208 /* 2 REG_PCIE_HCPWM2_V1_8822B */
5210 #define BIT_SHIFT_PCIE_HCPWM2_8822B 0
5211 #define BIT_MASK_PCIE_HCPWM2_8822B 0xffff
5212 #define BIT_PCIE_HCPWM2_8822B(x) \
5213 (((x) & BIT_MASK_PCIE_HCPWM2_8822B) << BIT_SHIFT_PCIE_HCPWM2_8822B)
5214 #define BIT_GET_PCIE_HCPWM2_8822B(x) \
5215 (((x) >> BIT_SHIFT_PCIE_HCPWM2_8822B) & BIT_MASK_PCIE_HCPWM2_8822B)
5217 /* 2 REG_PCIE_H2C_MSG_V1_8822B */
5219 #define BIT_SHIFT_DRV2FW_INFO_8822B 0
5220 #define BIT_MASK_DRV2FW_INFO_8822B 0xffffffffL
5221 #define BIT_DRV2FW_INFO_8822B(x) \
5222 (((x) & BIT_MASK_DRV2FW_INFO_8822B) << BIT_SHIFT_DRV2FW_INFO_8822B)
5223 #define BIT_GET_DRV2FW_INFO_8822B(x) \
5224 (((x) >> BIT_SHIFT_DRV2FW_INFO_8822B) & BIT_MASK_DRV2FW_INFO_8822B)
5226 /* 2 REG_PCIE_C2H_MSG_V1_8822B */
5228 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B 0
5229 #define BIT_MASK_HCI_PCIE_C2H_MSG_8822B 0xffffffffL
5230 #define BIT_HCI_PCIE_C2H_MSG_8822B(x) \
5231 (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8822B) \
5232 << BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B)
5233 #define BIT_GET_HCI_PCIE_C2H_MSG_8822B(x) \
5234 (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B) & \
5235 BIT_MASK_HCI_PCIE_C2H_MSG_8822B)
5237 /* 2 REG_DBI_WDATA_V1_8822B */
5239 #define BIT_SHIFT_DBI_WDATA_8822B 0
5240 #define BIT_MASK_DBI_WDATA_8822B 0xffffffffL
5241 #define BIT_DBI_WDATA_8822B(x) \
5242 (((x) & BIT_MASK_DBI_WDATA_8822B) << BIT_SHIFT_DBI_WDATA_8822B)
5243 #define BIT_GET_DBI_WDATA_8822B(x) \
5244 (((x) >> BIT_SHIFT_DBI_WDATA_8822B) & BIT_MASK_DBI_WDATA_8822B)
5246 /* 2 REG_DBI_RDATA_V1_8822B */
5248 #define BIT_SHIFT_DBI_RDATA_8822B 0
5249 #define BIT_MASK_DBI_RDATA_8822B 0xffffffffL
5250 #define BIT_DBI_RDATA_8822B(x) \
5251 (((x) & BIT_MASK_DBI_RDATA_8822B) << BIT_SHIFT_DBI_RDATA_8822B)
5252 #define BIT_GET_DBI_RDATA_8822B(x) \
5253 (((x) >> BIT_SHIFT_DBI_RDATA_8822B) & BIT_MASK_DBI_RDATA_8822B)
5255 /* 2 REG_DBI_FLAG_V1_8822B */
5256 #define BIT_EN_STUCK_DBG_8822B BIT(26)
5257 #define BIT_RX_STUCK_8822B BIT(25)
5258 #define BIT_TX_STUCK_8822B BIT(24)
5259 #define BIT_DBI_RFLAG_8822B BIT(17)
5260 #define BIT_DBI_WFLAG_8822B BIT(16)
5262 #define BIT_SHIFT_DBI_WREN_8822B 12
5263 #define BIT_MASK_DBI_WREN_8822B 0xf
5264 #define BIT_DBI_WREN_8822B(x) \
5265 (((x) & BIT_MASK_DBI_WREN_8822B) << BIT_SHIFT_DBI_WREN_8822B)
5266 #define BIT_GET_DBI_WREN_8822B(x) \
5267 (((x) >> BIT_SHIFT_DBI_WREN_8822B) & BIT_MASK_DBI_WREN_8822B)
5269 #define BIT_SHIFT_DBI_ADDR_8822B 0
5270 #define BIT_MASK_DBI_ADDR_8822B 0xfff
5271 #define BIT_DBI_ADDR_8822B(x) \
5272 (((x) & BIT_MASK_DBI_ADDR_8822B) << BIT_SHIFT_DBI_ADDR_8822B)
5273 #define BIT_GET_DBI_ADDR_8822B(x) \
5274 (((x) >> BIT_SHIFT_DBI_ADDR_8822B) & BIT_MASK_DBI_ADDR_8822B)
5276 /* 2 REG_MDIO_V1_8822B */
5278 #define BIT_SHIFT_MDIO_RDATA_8822B 16
5279 #define BIT_MASK_MDIO_RDATA_8822B 0xffff
5280 #define BIT_MDIO_RDATA_8822B(x) \
5281 (((x) & BIT_MASK_MDIO_RDATA_8822B) << BIT_SHIFT_MDIO_RDATA_8822B)
5282 #define BIT_GET_MDIO_RDATA_8822B(x) \
5283 (((x) >> BIT_SHIFT_MDIO_RDATA_8822B) & BIT_MASK_MDIO_RDATA_8822B)
5285 #define BIT_SHIFT_MDIO_WDATA_8822B 0
5286 #define BIT_MASK_MDIO_WDATA_8822B 0xffff
5287 #define BIT_MDIO_WDATA_8822B(x) \
5288 (((x) & BIT_MASK_MDIO_WDATA_8822B) << BIT_SHIFT_MDIO_WDATA_8822B)
5289 #define BIT_GET_MDIO_WDATA_8822B(x) \
5290 (((x) >> BIT_SHIFT_MDIO_WDATA_8822B) & BIT_MASK_MDIO_WDATA_8822B)
5292 /* 2 REG_PCIE_MIX_CFG_8822B */
5294 #define BIT_SHIFT_MDIO_PHY_ADDR_8822B 24
5295 #define BIT_MASK_MDIO_PHY_ADDR_8822B 0x1f
5296 #define BIT_MDIO_PHY_ADDR_8822B(x) \
5297 (((x) & BIT_MASK_MDIO_PHY_ADDR_8822B) << BIT_SHIFT_MDIO_PHY_ADDR_8822B)
5298 #define BIT_GET_MDIO_PHY_ADDR_8822B(x) \
5299 (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8822B) & BIT_MASK_MDIO_PHY_ADDR_8822B)
5301 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B 10
5302 #define BIT_MASK_WATCH_DOG_RECORD_V1_8822B 0x3fff
5303 #define BIT_WATCH_DOG_RECORD_V1_8822B(x) \
5304 (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8822B) \
5305 << BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B)
5306 #define BIT_GET_WATCH_DOG_RECORD_V1_8822B(x) \
5307 (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B) & \
5308 BIT_MASK_WATCH_DOG_RECORD_V1_8822B)
5310 #define BIT_R_IO_TIMEOUT_FLAG_V1_8822B BIT(9)
5311 #define BIT_EN_WATCH_DOG_8822B BIT(8)
5312 #define BIT_ECRC_EN_V1_8822B BIT(7)
5313 #define BIT_MDIO_RFLAG_V1_8822B BIT(6)
5314 #define BIT_MDIO_WFLAG_V1_8822B BIT(5)
5316 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8822B 0
5317 #define BIT_MASK_MDIO_REG_ADDR_V1_8822B 0x1f
5318 #define BIT_MDIO_REG_ADDR_V1_8822B(x) \
5319 (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8822B) \
5320 << BIT_SHIFT_MDIO_REG_ADDR_V1_8822B)
5321 #define BIT_GET_MDIO_REG_ADDR_V1_8822B(x) \
5322 (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8822B) & \
5323 BIT_MASK_MDIO_REG_ADDR_V1_8822B)
5325 /* 2 REG_HCI_MIX_CFG_8822B */
5326 #define BIT_HOST_GEN2_SUPPORT_8822B BIT(20)
5328 #define BIT_SHIFT_TXDMA_ERR_FLAG_8822B 16
5329 #define BIT_MASK_TXDMA_ERR_FLAG_8822B 0xf
5330 #define BIT_TXDMA_ERR_FLAG_8822B(x) \
5331 (((x) & BIT_MASK_TXDMA_ERR_FLAG_8822B) \
5332 << BIT_SHIFT_TXDMA_ERR_FLAG_8822B)
5333 #define BIT_GET_TXDMA_ERR_FLAG_8822B(x) \
5334 (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8822B) & \
5335 BIT_MASK_TXDMA_ERR_FLAG_8822B)
5337 #define BIT_SHIFT_EARLY_MODE_SEL_8822B 12
5338 #define BIT_MASK_EARLY_MODE_SEL_8822B 0xf
5339 #define BIT_EARLY_MODE_SEL_8822B(x) \
5340 (((x) & BIT_MASK_EARLY_MODE_SEL_8822B) \
5341 << BIT_SHIFT_EARLY_MODE_SEL_8822B)
5342 #define BIT_GET_EARLY_MODE_SEL_8822B(x) \
5343 (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8822B) & \
5344 BIT_MASK_EARLY_MODE_SEL_8822B)
5346 #define BIT_EPHY_RX50_EN_8822B BIT(11)
5348 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B 8
5349 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8822B 0x7
5350 #define BIT_MSI_TIMEOUT_ID_V1_8822B(x) \
5351 (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8822B) \
5352 << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B)
5353 #define BIT_GET_MSI_TIMEOUT_ID_V1_8822B(x) \
5354 (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B) & \
5355 BIT_MASK_MSI_TIMEOUT_ID_V1_8822B)
5357 #define BIT_RADDR_RD_8822B BIT(7)
5358 #define BIT_EN_MUL_TAG_8822B BIT(6)
5359 #define BIT_EN_EARLY_MODE_8822B BIT(5)
5360 #define BIT_L0S_LINK_OFF_8822B BIT(4)
5361 #define BIT_ACT_LINK_OFF_8822B BIT(3)
5362 #define BIT_EN_SLOW_MAC_TX_8822B BIT(2)
5363 #define BIT_EN_SLOW_MAC_RX_8822B BIT(1)
5365 /* 2 REG_STC_INT_CS_8822B(PCIE STATE CHANGE INTERRUPT CONTROL AND STATUS) */
5366 #define BIT_STC_INT_EN_8822B BIT(31)
5368 #define BIT_SHIFT_STC_INT_FLAG_8822B 16
5369 #define BIT_MASK_STC_INT_FLAG_8822B 0xff
5370 #define BIT_STC_INT_FLAG_8822B(x) \
5371 (((x) & BIT_MASK_STC_INT_FLAG_8822B) << BIT_SHIFT_STC_INT_FLAG_8822B)
5372 #define BIT_GET_STC_INT_FLAG_8822B(x) \
5373 (((x) >> BIT_SHIFT_STC_INT_FLAG_8822B) & BIT_MASK_STC_INT_FLAG_8822B)
5375 #define BIT_SHIFT_STC_INT_IDX_8822B 8
5376 #define BIT_MASK_STC_INT_IDX_8822B 0x7
5377 #define BIT_STC_INT_IDX_8822B(x) \
5378 (((x) & BIT_MASK_STC_INT_IDX_8822B) << BIT_SHIFT_STC_INT_IDX_8822B)
5379 #define BIT_GET_STC_INT_IDX_8822B(x) \
5380 (((x) >> BIT_SHIFT_STC_INT_IDX_8822B) & BIT_MASK_STC_INT_IDX_8822B)
5382 #define BIT_SHIFT_STC_INT_REALTIME_CS_8822B 0
5383 #define BIT_MASK_STC_INT_REALTIME_CS_8822B 0x3f
5384 #define BIT_STC_INT_REALTIME_CS_8822B(x) \
5385 (((x) & BIT_MASK_STC_INT_REALTIME_CS_8822B) \
5386 << BIT_SHIFT_STC_INT_REALTIME_CS_8822B)
5387 #define BIT_GET_STC_INT_REALTIME_CS_8822B(x) \
5388 (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8822B) & \
5389 BIT_MASK_STC_INT_REALTIME_CS_8822B)
5391 /* 2 REG_ST_INT_CFG_8822B(PCIE STATE CHANGE INTERRUPT CONFIGURATION) */
5392 #define BIT_STC_INT_GRP_EN_8822B BIT(31)
5394 #define BIT_SHIFT_STC_INT_EXPECT_LS_8822B 8
5395 #define BIT_MASK_STC_INT_EXPECT_LS_8822B 0x3f
5396 #define BIT_STC_INT_EXPECT_LS_8822B(x) \
5397 (((x) & BIT_MASK_STC_INT_EXPECT_LS_8822B) \
5398 << BIT_SHIFT_STC_INT_EXPECT_LS_8822B)
5399 #define BIT_GET_STC_INT_EXPECT_LS_8822B(x) \
5400 (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8822B) & \
5401 BIT_MASK_STC_INT_EXPECT_LS_8822B)
5403 #define BIT_SHIFT_STC_INT_EXPECT_CS_8822B 0
5404 #define BIT_MASK_STC_INT_EXPECT_CS_8822B 0x3f
5405 #define BIT_STC_INT_EXPECT_CS_8822B(x) \
5406 (((x) & BIT_MASK_STC_INT_EXPECT_CS_8822B) \
5407 << BIT_SHIFT_STC_INT_EXPECT_CS_8822B)
5408 #define BIT_GET_STC_INT_EXPECT_CS_8822B(x) \
5409 (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8822B) & \
5410 BIT_MASK_STC_INT_EXPECT_CS_8822B)
5412 /* 2 REG_CMU_DLY_CTRL_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONTROL ) */
5413 #define BIT_CMU_DLY_EN_8822B BIT(31)
5414 #define BIT_CMU_DLY_MODE_8822B BIT(30)
5416 #define BIT_SHIFT_CMU_DLY_PRE_DIV_8822B 0
5417 #define BIT_MASK_CMU_DLY_PRE_DIV_8822B 0xff
5418 #define BIT_CMU_DLY_PRE_DIV_8822B(x) \
5419 (((x) & BIT_MASK_CMU_DLY_PRE_DIV_8822B) \
5420 << BIT_SHIFT_CMU_DLY_PRE_DIV_8822B)
5421 #define BIT_GET_CMU_DLY_PRE_DIV_8822B(x) \
5422 (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8822B) & \
5423 BIT_MASK_CMU_DLY_PRE_DIV_8822B)
5425 /* 2 REG_CMU_DLY_CFG_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONFIGURATION ) */
5427 #define BIT_SHIFT_CMU_DLY_LTR_A2I_8822B 24
5428 #define BIT_MASK_CMU_DLY_LTR_A2I_8822B 0xff
5429 #define BIT_CMU_DLY_LTR_A2I_8822B(x) \
5430 (((x) & BIT_MASK_CMU_DLY_LTR_A2I_8822B) \
5431 << BIT_SHIFT_CMU_DLY_LTR_A2I_8822B)
5432 #define BIT_GET_CMU_DLY_LTR_A2I_8822B(x) \
5433 (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8822B) & \
5434 BIT_MASK_CMU_DLY_LTR_A2I_8822B)
5436 #define BIT_SHIFT_CMU_DLY_LTR_I2A_8822B 16
5437 #define BIT_MASK_CMU_DLY_LTR_I2A_8822B 0xff
5438 #define BIT_CMU_DLY_LTR_I2A_8822B(x) \
5439 (((x) & BIT_MASK_CMU_DLY_LTR_I2A_8822B) \
5440 << BIT_SHIFT_CMU_DLY_LTR_I2A_8822B)
5441 #define BIT_GET_CMU_DLY_LTR_I2A_8822B(x) \
5442 (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8822B) & \
5443 BIT_MASK_CMU_DLY_LTR_I2A_8822B)
5445 #define BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B 8
5446 #define BIT_MASK_CMU_DLY_LTR_IDLE_8822B 0xff
5447 #define BIT_CMU_DLY_LTR_IDLE_8822B(x) \
5448 (((x) & BIT_MASK_CMU_DLY_LTR_IDLE_8822B) \
5449 << BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B)
5450 #define BIT_GET_CMU_DLY_LTR_IDLE_8822B(x) \
5451 (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B) & \
5452 BIT_MASK_CMU_DLY_LTR_IDLE_8822B)
5454 #define BIT_SHIFT_CMU_DLY_LTR_ACT_8822B 0
5455 #define BIT_MASK_CMU_DLY_LTR_ACT_8822B 0xff
5456 #define BIT_CMU_DLY_LTR_ACT_8822B(x) \
5457 (((x) & BIT_MASK_CMU_DLY_LTR_ACT_8822B) \
5458 << BIT_SHIFT_CMU_DLY_LTR_ACT_8822B)
5459 #define BIT_GET_CMU_DLY_LTR_ACT_8822B(x) \
5460 (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8822B) & \
5461 BIT_MASK_CMU_DLY_LTR_ACT_8822B)
5463 /* 2 REG_H2CQ_TXBD_DESA_8822B */
5465 #define BIT_SHIFT_H2CQ_TXBD_DESA_8822B 0
5466 #define BIT_MASK_H2CQ_TXBD_DESA_8822B 0xffffffffffffffffL
5467 #define BIT_H2CQ_TXBD_DESA_8822B(x) \
5468 (((x) & BIT_MASK_H2CQ_TXBD_DESA_8822B) \
5469 << BIT_SHIFT_H2CQ_TXBD_DESA_8822B)
5470 #define BIT_GET_H2CQ_TXBD_DESA_8822B(x) \
5471 (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8822B) & \
5472 BIT_MASK_H2CQ_TXBD_DESA_8822B)
5474 /* 2 REG_H2CQ_TXBD_NUM_8822B */
5475 #define BIT_PCIE_H2CQ_FLAG_8822B BIT(14)
5477 #define BIT_SHIFT_H2CQ_DESC_MODE_8822B 12
5478 #define BIT_MASK_H2CQ_DESC_MODE_8822B 0x3
5479 #define BIT_H2CQ_DESC_MODE_8822B(x) \
5480 (((x) & BIT_MASK_H2CQ_DESC_MODE_8822B) \
5481 << BIT_SHIFT_H2CQ_DESC_MODE_8822B)
5482 #define BIT_GET_H2CQ_DESC_MODE_8822B(x) \
5483 (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8822B) & \
5484 BIT_MASK_H2CQ_DESC_MODE_8822B)
5486 #define BIT_SHIFT_H2CQ_DESC_NUM_8822B 0
5487 #define BIT_MASK_H2CQ_DESC_NUM_8822B 0xfff
5488 #define BIT_H2CQ_DESC_NUM_8822B(x) \
5489 (((x) & BIT_MASK_H2CQ_DESC_NUM_8822B) << BIT_SHIFT_H2CQ_DESC_NUM_8822B)
5490 #define BIT_GET_H2CQ_DESC_NUM_8822B(x) \
5491 (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8822B) & BIT_MASK_H2CQ_DESC_NUM_8822B)
5493 /* 2 REG_H2CQ_TXBD_IDX_8822B */
5495 #define BIT_SHIFT_H2CQ_HW_IDX_8822B 16
5496 #define BIT_MASK_H2CQ_HW_IDX_8822B 0xfff
5497 #define BIT_H2CQ_HW_IDX_8822B(x) \
5498 (((x) & BIT_MASK_H2CQ_HW_IDX_8822B) << BIT_SHIFT_H2CQ_HW_IDX_8822B)
5499 #define BIT_GET_H2CQ_HW_IDX_8822B(x) \
5500 (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8822B) & BIT_MASK_H2CQ_HW_IDX_8822B)
5502 #define BIT_SHIFT_H2CQ_HOST_IDX_8822B 0
5503 #define BIT_MASK_H2CQ_HOST_IDX_8822B 0xfff
5504 #define BIT_H2CQ_HOST_IDX_8822B(x) \
5505 (((x) & BIT_MASK_H2CQ_HOST_IDX_8822B) << BIT_SHIFT_H2CQ_HOST_IDX_8822B)
5506 #define BIT_GET_H2CQ_HOST_IDX_8822B(x) \
5507 (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8822B) & BIT_MASK_H2CQ_HOST_IDX_8822B)
5509 /* 2 REG_H2CQ_CSR_8822B[31:0] (H2CQ CONTROL AND STATUS) */
5510 #define BIT_H2CQ_FULL_8822B BIT(31)
5511 #define BIT_CLR_H2CQ_HOST_IDX_8822B BIT(16)
5512 #define BIT_CLR_H2CQ_HW_IDX_8822B BIT(8)
5514 /* 2 REG_CHANGE_PCIE_SPEED_8822B */
5515 #define BIT_CHANGE_PCIE_SPEED_8822B BIT(18)
5517 #define BIT_SHIFT_GEN1_GEN2_8822B 16
5518 #define BIT_MASK_GEN1_GEN2_8822B 0x3
5519 #define BIT_GEN1_GEN2_8822B(x) \
5520 (((x) & BIT_MASK_GEN1_GEN2_8822B) << BIT_SHIFT_GEN1_GEN2_8822B)
5521 #define BIT_GET_GEN1_GEN2_8822B(x) \
5522 (((x) >> BIT_SHIFT_GEN1_GEN2_8822B) & BIT_MASK_GEN1_GEN2_8822B)
5524 #define BIT_SHIFT_AUTO_HANG_RELEASE_8822B 0
5525 #define BIT_MASK_AUTO_HANG_RELEASE_8822B 0x7
5526 #define BIT_AUTO_HANG_RELEASE_8822B(x) \
5527 (((x) & BIT_MASK_AUTO_HANG_RELEASE_8822B) \
5528 << BIT_SHIFT_AUTO_HANG_RELEASE_8822B)
5529 #define BIT_GET_AUTO_HANG_RELEASE_8822B(x) \
5530 (((x) >> BIT_SHIFT_AUTO_HANG_RELEASE_8822B) & \
5531 BIT_MASK_AUTO_HANG_RELEASE_8822B)
5533 /* 2 REG_OLD_DEHANG_8822B */
5534 #define BIT_OLD_DEHANG_8822B BIT(1)
5536 /* 2 REG_Q0_INFO_8822B */
5538 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8822B 25
5539 #define BIT_MASK_QUEUEMACID_Q0_V1_8822B 0x7f
5540 #define BIT_QUEUEMACID_Q0_V1_8822B(x) \
5541 (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8822B) \
5542 << BIT_SHIFT_QUEUEMACID_Q0_V1_8822B)
5543 #define BIT_GET_QUEUEMACID_Q0_V1_8822B(x) \
5544 (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8822B) & \
5545 BIT_MASK_QUEUEMACID_Q0_V1_8822B)
5547 #define BIT_SHIFT_QUEUEAC_Q0_V1_8822B 23
5548 #define BIT_MASK_QUEUEAC_Q0_V1_8822B 0x3
5549 #define BIT_QUEUEAC_Q0_V1_8822B(x) \
5550 (((x) & BIT_MASK_QUEUEAC_Q0_V1_8822B) << BIT_SHIFT_QUEUEAC_Q0_V1_8822B)
5551 #define BIT_GET_QUEUEAC_Q0_V1_8822B(x) \
5552 (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8822B) & BIT_MASK_QUEUEAC_Q0_V1_8822B)
5554 #define BIT_TIDEMPTY_Q0_V1_8822B BIT(22)
5556 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8822B 11
5557 #define BIT_MASK_TAIL_PKT_Q0_V2_8822B 0x7ff
5558 #define BIT_TAIL_PKT_Q0_V2_8822B(x) \
5559 (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8822B) \
5560 << BIT_SHIFT_TAIL_PKT_Q0_V2_8822B)
5561 #define BIT_GET_TAIL_PKT_Q0_V2_8822B(x) \
5562 (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8822B) & \
5563 BIT_MASK_TAIL_PKT_Q0_V2_8822B)
5565 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8822B 0
5566 #define BIT_MASK_HEAD_PKT_Q0_V1_8822B 0x7ff
5567 #define BIT_HEAD_PKT_Q0_V1_8822B(x) \
5568 (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8822B) \
5569 << BIT_SHIFT_HEAD_PKT_Q0_V1_8822B)
5570 #define BIT_GET_HEAD_PKT_Q0_V1_8822B(x) \
5571 (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8822B) & \
5572 BIT_MASK_HEAD_PKT_Q0_V1_8822B)
5574 /* 2 REG_Q1_INFO_8822B */
5576 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8822B 25
5577 #define BIT_MASK_QUEUEMACID_Q1_V1_8822B 0x7f
5578 #define BIT_QUEUEMACID_Q1_V1_8822B(x) \
5579 (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8822B) \
5580 << BIT_SHIFT_QUEUEMACID_Q1_V1_8822B)
5581 #define BIT_GET_QUEUEMACID_Q1_V1_8822B(x) \
5582 (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8822B) & \
5583 BIT_MASK_QUEUEMACID_Q1_V1_8822B)
5585 #define BIT_SHIFT_QUEUEAC_Q1_V1_8822B 23
5586 #define BIT_MASK_QUEUEAC_Q1_V1_8822B 0x3
5587 #define BIT_QUEUEAC_Q1_V1_8822B(x) \
5588 (((x) & BIT_MASK_QUEUEAC_Q1_V1_8822B) << BIT_SHIFT_QUEUEAC_Q1_V1_8822B)
5589 #define BIT_GET_QUEUEAC_Q1_V1_8822B(x) \
5590 (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8822B) & BIT_MASK_QUEUEAC_Q1_V1_8822B)
5592 #define BIT_TIDEMPTY_Q1_V1_8822B BIT(22)
5594 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8822B 11
5595 #define BIT_MASK_TAIL_PKT_Q1_V2_8822B 0x7ff
5596 #define BIT_TAIL_PKT_Q1_V2_8822B(x) \
5597 (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8822B) \
5598 << BIT_SHIFT_TAIL_PKT_Q1_V2_8822B)
5599 #define BIT_GET_TAIL_PKT_Q1_V2_8822B(x) \
5600 (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8822B) & \
5601 BIT_MASK_TAIL_PKT_Q1_V2_8822B)
5603 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8822B 0
5604 #define BIT_MASK_HEAD_PKT_Q1_V1_8822B 0x7ff
5605 #define BIT_HEAD_PKT_Q1_V1_8822B(x) \
5606 (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8822B) \
5607 << BIT_SHIFT_HEAD_PKT_Q1_V1_8822B)
5608 #define BIT_GET_HEAD_PKT_Q1_V1_8822B(x) \
5609 (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8822B) & \
5610 BIT_MASK_HEAD_PKT_Q1_V1_8822B)
5612 /* 2 REG_Q2_INFO_8822B */
5614 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8822B 25
5615 #define BIT_MASK_QUEUEMACID_Q2_V1_8822B 0x7f
5616 #define BIT_QUEUEMACID_Q2_V1_8822B(x) \
5617 (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8822B) \
5618 << BIT_SHIFT_QUEUEMACID_Q2_V1_8822B)
5619 #define BIT_GET_QUEUEMACID_Q2_V1_8822B(x) \
5620 (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8822B) & \
5621 BIT_MASK_QUEUEMACID_Q2_V1_8822B)
5623 #define BIT_SHIFT_QUEUEAC_Q2_V1_8822B 23
5624 #define BIT_MASK_QUEUEAC_Q2_V1_8822B 0x3
5625 #define BIT_QUEUEAC_Q2_V1_8822B(x) \
5626 (((x) & BIT_MASK_QUEUEAC_Q2_V1_8822B) << BIT_SHIFT_QUEUEAC_Q2_V1_8822B)
5627 #define BIT_GET_QUEUEAC_Q2_V1_8822B(x) \
5628 (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8822B) & BIT_MASK_QUEUEAC_Q2_V1_8822B)
5630 #define BIT_TIDEMPTY_Q2_V1_8822B BIT(22)
5632 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8822B 11
5633 #define BIT_MASK_TAIL_PKT_Q2_V2_8822B 0x7ff
5634 #define BIT_TAIL_PKT_Q2_V2_8822B(x) \
5635 (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8822B) \
5636 << BIT_SHIFT_TAIL_PKT_Q2_V2_8822B)
5637 #define BIT_GET_TAIL_PKT_Q2_V2_8822B(x) \
5638 (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8822B) & \
5639 BIT_MASK_TAIL_PKT_Q2_V2_8822B)
5641 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8822B 0
5642 #define BIT_MASK_HEAD_PKT_Q2_V1_8822B 0x7ff
5643 #define BIT_HEAD_PKT_Q2_V1_8822B(x) \
5644 (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8822B) \
5645 << BIT_SHIFT_HEAD_PKT_Q2_V1_8822B)
5646 #define BIT_GET_HEAD_PKT_Q2_V1_8822B(x) \
5647 (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8822B) & \
5648 BIT_MASK_HEAD_PKT_Q2_V1_8822B)
5650 /* 2 REG_Q3_INFO_8822B */
5652 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8822B 25
5653 #define BIT_MASK_QUEUEMACID_Q3_V1_8822B 0x7f
5654 #define BIT_QUEUEMACID_Q3_V1_8822B(x) \
5655 (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8822B) \
5656 << BIT_SHIFT_QUEUEMACID_Q3_V1_8822B)
5657 #define BIT_GET_QUEUEMACID_Q3_V1_8822B(x) \
5658 (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8822B) & \
5659 BIT_MASK_QUEUEMACID_Q3_V1_8822B)
5661 #define BIT_SHIFT_QUEUEAC_Q3_V1_8822B 23
5662 #define BIT_MASK_QUEUEAC_Q3_V1_8822B 0x3
5663 #define BIT_QUEUEAC_Q3_V1_8822B(x) \
5664 (((x) & BIT_MASK_QUEUEAC_Q3_V1_8822B) << BIT_SHIFT_QUEUEAC_Q3_V1_8822B)
5665 #define BIT_GET_QUEUEAC_Q3_V1_8822B(x) \
5666 (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8822B) & BIT_MASK_QUEUEAC_Q3_V1_8822B)
5668 #define BIT_TIDEMPTY_Q3_V1_8822B BIT(22)
5670 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8822B 11
5671 #define BIT_MASK_TAIL_PKT_Q3_V2_8822B 0x7ff
5672 #define BIT_TAIL_PKT_Q3_V2_8822B(x) \
5673 (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8822B) \
5674 << BIT_SHIFT_TAIL_PKT_Q3_V2_8822B)
5675 #define BIT_GET_TAIL_PKT_Q3_V2_8822B(x) \
5676 (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8822B) & \
5677 BIT_MASK_TAIL_PKT_Q3_V2_8822B)
5679 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8822B 0
5680 #define BIT_MASK_HEAD_PKT_Q3_V1_8822B 0x7ff
5681 #define BIT_HEAD_PKT_Q3_V1_8822B(x) \
5682 (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8822B) \
5683 << BIT_SHIFT_HEAD_PKT_Q3_V1_8822B)
5684 #define BIT_GET_HEAD_PKT_Q3_V1_8822B(x) \
5685 (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8822B) & \
5686 BIT_MASK_HEAD_PKT_Q3_V1_8822B)
5688 /* 2 REG_MGQ_INFO_8822B */
5690 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B 25
5691 #define BIT_MASK_QUEUEMACID_MGQ_V1_8822B 0x7f
5692 #define BIT_QUEUEMACID_MGQ_V1_8822B(x) \
5693 (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8822B) \
5694 << BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B)
5695 #define BIT_GET_QUEUEMACID_MGQ_V1_8822B(x) \
5696 (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B) & \
5697 BIT_MASK_QUEUEMACID_MGQ_V1_8822B)
5699 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8822B 23
5700 #define BIT_MASK_QUEUEAC_MGQ_V1_8822B 0x3
5701 #define BIT_QUEUEAC_MGQ_V1_8822B(x) \
5702 (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8822B) \
5703 << BIT_SHIFT_QUEUEAC_MGQ_V1_8822B)
5704 #define BIT_GET_QUEUEAC_MGQ_V1_8822B(x) \
5705 (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8822B) & \
5706 BIT_MASK_QUEUEAC_MGQ_V1_8822B)
5708 #define BIT_TIDEMPTY_MGQ_V1_8822B BIT(22)
5710 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B 11
5711 #define BIT_MASK_TAIL_PKT_MGQ_V2_8822B 0x7ff
5712 #define BIT_TAIL_PKT_MGQ_V2_8822B(x) \
5713 (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8822B) \
5714 << BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B)
5715 #define BIT_GET_TAIL_PKT_MGQ_V2_8822B(x) \
5716 (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B) & \
5717 BIT_MASK_TAIL_PKT_MGQ_V2_8822B)
5719 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B 0
5720 #define BIT_MASK_HEAD_PKT_MGQ_V1_8822B 0x7ff
5721 #define BIT_HEAD_PKT_MGQ_V1_8822B(x) \
5722 (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8822B) \
5723 << BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B)
5724 #define BIT_GET_HEAD_PKT_MGQ_V1_8822B(x) \
5725 (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B) & \
5726 BIT_MASK_HEAD_PKT_MGQ_V1_8822B)
5728 /* 2 REG_HIQ_INFO_8822B */
5730 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B 25
5731 #define BIT_MASK_QUEUEMACID_HIQ_V1_8822B 0x7f
5732 #define BIT_QUEUEMACID_HIQ_V1_8822B(x) \
5733 (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8822B) \
5734 << BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B)
5735 #define BIT_GET_QUEUEMACID_HIQ_V1_8822B(x) \
5736 (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B) & \
5737 BIT_MASK_QUEUEMACID_HIQ_V1_8822B)
5739 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8822B 23
5740 #define BIT_MASK_QUEUEAC_HIQ_V1_8822B 0x3
5741 #define BIT_QUEUEAC_HIQ_V1_8822B(x) \
5742 (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8822B) \
5743 << BIT_SHIFT_QUEUEAC_HIQ_V1_8822B)
5744 #define BIT_GET_QUEUEAC_HIQ_V1_8822B(x) \
5745 (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8822B) & \
5746 BIT_MASK_QUEUEAC_HIQ_V1_8822B)
5748 #define BIT_TIDEMPTY_HIQ_V1_8822B BIT(22)
5750 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B 11
5751 #define BIT_MASK_TAIL_PKT_HIQ_V2_8822B 0x7ff
5752 #define BIT_TAIL_PKT_HIQ_V2_8822B(x) \
5753 (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8822B) \
5754 << BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B)
5755 #define BIT_GET_TAIL_PKT_HIQ_V2_8822B(x) \
5756 (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B) & \
5757 BIT_MASK_TAIL_PKT_HIQ_V2_8822B)
5759 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B 0
5760 #define BIT_MASK_HEAD_PKT_HIQ_V1_8822B 0x7ff
5761 #define BIT_HEAD_PKT_HIQ_V1_8822B(x) \
5762 (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8822B) \
5763 << BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B)
5764 #define BIT_GET_HEAD_PKT_HIQ_V1_8822B(x) \
5765 (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B) & \
5766 BIT_MASK_HEAD_PKT_HIQ_V1_8822B)
5768 /* 2 REG_BCNQ_INFO_8822B */
5770 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B 0
5771 #define BIT_MASK_BCNQ_HEAD_PG_V1_8822B 0xfff
5772 #define BIT_BCNQ_HEAD_PG_V1_8822B(x) \
5773 (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8822B) \
5774 << BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B)
5775 #define BIT_GET_BCNQ_HEAD_PG_V1_8822B(x) \
5776 (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B) & \
5777 BIT_MASK_BCNQ_HEAD_PG_V1_8822B)
5779 /* 2 REG_TXPKT_EMPTY_8822B */
5780 #define BIT_BCNQ_EMPTY_8822B BIT(11)
5781 #define BIT_HQQ_EMPTY_8822B BIT(10)
5782 #define BIT_MQQ_EMPTY_8822B BIT(9)
5783 #define BIT_MGQ_CPU_EMPTY_8822B BIT(8)
5784 #define BIT_AC7Q_EMPTY_8822B BIT(7)
5785 #define BIT_AC6Q_EMPTY_8822B BIT(6)
5786 #define BIT_AC5Q_EMPTY_8822B BIT(5)
5787 #define BIT_AC4Q_EMPTY_8822B BIT(4)
5788 #define BIT_AC3Q_EMPTY_8822B BIT(3)
5789 #define BIT_AC2Q_EMPTY_8822B BIT(2)
5790 #define BIT_AC1Q_EMPTY_8822B BIT(1)
5791 #define BIT_AC0Q_EMPTY_8822B BIT(0)
5793 /* 2 REG_CPU_MGQ_INFO_8822B */
5794 #define BIT_BCN1_POLL_8822B BIT(30)
5795 #define BIT_CPUMGT_POLL_8822B BIT(29)
5796 #define BIT_BCN_POLL_8822B BIT(28)
5797 #define BIT_CPUMGQ_FW_NUM_V1_8822B BIT(12)
5799 #define BIT_SHIFT_FW_FREE_TAIL_V1_8822B 0
5800 #define BIT_MASK_FW_FREE_TAIL_V1_8822B 0xfff
5801 #define BIT_FW_FREE_TAIL_V1_8822B(x) \
5802 (((x) & BIT_MASK_FW_FREE_TAIL_V1_8822B) \
5803 << BIT_SHIFT_FW_FREE_TAIL_V1_8822B)
5804 #define BIT_GET_FW_FREE_TAIL_V1_8822B(x) \
5805 (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8822B) & \
5806 BIT_MASK_FW_FREE_TAIL_V1_8822B)
5808 /* 2 REG_FWHW_TXQ_CTRL_8822B */
5809 #define BIT_RTS_LIMIT_IN_OFDM_8822B BIT(23)
5810 #define BIT_EN_BCNQ_DL_8822B BIT(22)
5811 #define BIT_EN_RD_RESP_NAV_BK_8822B BIT(21)
5812 #define BIT_EN_WR_FREE_TAIL_8822B BIT(20)
5814 #define BIT_SHIFT_EN_QUEUE_RPT_8822B 8
5815 #define BIT_MASK_EN_QUEUE_RPT_8822B 0xff
5816 #define BIT_EN_QUEUE_RPT_8822B(x) \
5817 (((x) & BIT_MASK_EN_QUEUE_RPT_8822B) << BIT_SHIFT_EN_QUEUE_RPT_8822B)
5818 #define BIT_GET_EN_QUEUE_RPT_8822B(x) \
5819 (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8822B) & BIT_MASK_EN_QUEUE_RPT_8822B)
5821 #define BIT_EN_RTY_BK_8822B BIT(7)
5822 #define BIT_EN_USE_INI_RAT_8822B BIT(6)
5823 #define BIT_EN_RTS_NAV_BK_8822B BIT(5)
5824 #define BIT_DIS_SSN_CHECK_8822B BIT(4)
5825 #define BIT_MACID_MATCH_RTS_8822B BIT(3)
5826 #define BIT_EN_BCN_TRXRPT_V1_8822B BIT(2)
5827 #define BIT_EN_FTMACKRPT_8822B BIT(1)
5828 #define BIT_EN_FTMRPT_8822B BIT(0)
5830 /* 2 REG_DATAFB_SEL_8822B */
5831 #define BIT__R_EN_RTY_BK_COD_8822B BIT(2)
5833 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B 0
5834 #define BIT_MASK__R_DATA_FALLBACK_SEL_8822B 0x3
5835 #define BIT__R_DATA_FALLBACK_SEL_8822B(x) \
5836 (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8822B) \
5837 << BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B)
5838 #define BIT_GET__R_DATA_FALLBACK_SEL_8822B(x) \
5839 (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B) & \
5840 BIT_MASK__R_DATA_FALLBACK_SEL_8822B)
5842 /* 2 REG_BCNQ_BDNY_V1_8822B */
5844 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8822B 0
5845 #define BIT_MASK_BCNQ_PGBNDY_V1_8822B 0xfff
5846 #define BIT_BCNQ_PGBNDY_V1_8822B(x) \
5847 (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8822B) \
5848 << BIT_SHIFT_BCNQ_PGBNDY_V1_8822B)
5849 #define BIT_GET_BCNQ_PGBNDY_V1_8822B(x) \
5850 (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8822B) & \
5851 BIT_MASK_BCNQ_PGBNDY_V1_8822B)
5853 /* 2 REG_LIFETIME_EN_8822B */
5854 #define BIT_BT_INT_CPU_8822B BIT(7)
5855 #define BIT_BT_INT_PTA_8822B BIT(6)
5856 #define BIT_EN_CTRL_RTYBIT_8822B BIT(4)
5857 #define BIT_LIFETIME_BK_EN_8822B BIT(3)
5858 #define BIT_LIFETIME_BE_EN_8822B BIT(2)
5859 #define BIT_LIFETIME_VI_EN_8822B BIT(1)
5860 #define BIT_LIFETIME_VO_EN_8822B BIT(0)
5862 /* 2 REG_SPEC_SIFS_8822B */
5864 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B 8
5865 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B 0xff
5866 #define BIT_SPEC_SIFS_OFDM_PTCL_8822B(x) \
5867 (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B) \
5868 << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B)
5869 #define BIT_GET_SPEC_SIFS_OFDM_PTCL_8822B(x) \
5870 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B) & \
5871 BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B)
5873 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B 0
5874 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B 0xff
5875 #define BIT_SPEC_SIFS_CCK_PTCL_8822B(x) \
5876 (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B) \
5877 << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B)
5878 #define BIT_GET_SPEC_SIFS_CCK_PTCL_8822B(x) \
5879 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B) & \
5880 BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B)
5882 /* 2 REG_RETRY_LIMIT_8822B */
5884 #define BIT_SHIFT_SRL_8822B 8
5885 #define BIT_MASK_SRL_8822B 0x3f
5886 #define BIT_SRL_8822B(x) (((x) & BIT_MASK_SRL_8822B) << BIT_SHIFT_SRL_8822B)
5887 #define BIT_GET_SRL_8822B(x) (((x) >> BIT_SHIFT_SRL_8822B) & BIT_MASK_SRL_8822B)
5889 #define BIT_SHIFT_LRL_8822B 0
5890 #define BIT_MASK_LRL_8822B 0x3f
5891 #define BIT_LRL_8822B(x) (((x) & BIT_MASK_LRL_8822B) << BIT_SHIFT_LRL_8822B)
5892 #define BIT_GET_LRL_8822B(x) (((x) >> BIT_SHIFT_LRL_8822B) & BIT_MASK_LRL_8822B)
5894 /* 2 REG_TXBF_CTRL_8822B */
5895 #define BIT_R_ENABLE_NDPA_8822B BIT(31)
5896 #define BIT_USE_NDPA_PARAMETER_8822B BIT(30)
5897 #define BIT_R_PROP_TXBF_8822B BIT(29)
5898 #define BIT_R_EN_NDPA_INT_8822B BIT(28)
5899 #define BIT_R_TXBF1_80M_8822B BIT(27)
5900 #define BIT_R_TXBF1_40M_8822B BIT(26)
5901 #define BIT_R_TXBF1_20M_8822B BIT(25)
5903 #define BIT_SHIFT_R_TXBF1_AID_8822B 16
5904 #define BIT_MASK_R_TXBF1_AID_8822B 0x1ff
5905 #define BIT_R_TXBF1_AID_8822B(x) \
5906 (((x) & BIT_MASK_R_TXBF1_AID_8822B) << BIT_SHIFT_R_TXBF1_AID_8822B)
5907 #define BIT_GET_R_TXBF1_AID_8822B(x) \
5908 (((x) >> BIT_SHIFT_R_TXBF1_AID_8822B) & BIT_MASK_R_TXBF1_AID_8822B)
5910 #define BIT_DIS_NDP_BFEN_8822B BIT(15)
5911 #define BIT_R_TXBCN_NOBLOCK_NDP_8822B BIT(14)
5912 #define BIT_R_TXBF0_80M_8822B BIT(11)
5913 #define BIT_R_TXBF0_40M_8822B BIT(10)
5914 #define BIT_R_TXBF0_20M_8822B BIT(9)
5916 #define BIT_SHIFT_R_TXBF0_AID_8822B 0
5917 #define BIT_MASK_R_TXBF0_AID_8822B 0x1ff
5918 #define BIT_R_TXBF0_AID_8822B(x) \
5919 (((x) & BIT_MASK_R_TXBF0_AID_8822B) << BIT_SHIFT_R_TXBF0_AID_8822B)
5920 #define BIT_GET_R_TXBF0_AID_8822B(x) \
5921 (((x) >> BIT_SHIFT_R_TXBF0_AID_8822B) & BIT_MASK_R_TXBF0_AID_8822B)
5923 /* 2 REG_DARFRC_8822B */
5925 #define BIT_SHIFT_DARF_RC8_8822B (56 & CPU_OPT_WIDTH)
5926 #define BIT_MASK_DARF_RC8_8822B 0x1f
5927 #define BIT_DARF_RC8_8822B(x) \
5928 (((x) & BIT_MASK_DARF_RC8_8822B) << BIT_SHIFT_DARF_RC8_8822B)
5929 #define BIT_GET_DARF_RC8_8822B(x) \
5930 (((x) >> BIT_SHIFT_DARF_RC8_8822B) & BIT_MASK_DARF_RC8_8822B)
5932 #define BIT_SHIFT_DARF_RC7_8822B (48 & CPU_OPT_WIDTH)
5933 #define BIT_MASK_DARF_RC7_8822B 0x1f
5934 #define BIT_DARF_RC7_8822B(x) \
5935 (((x) & BIT_MASK_DARF_RC7_8822B) << BIT_SHIFT_DARF_RC7_8822B)
5936 #define BIT_GET_DARF_RC7_8822B(x) \
5937 (((x) >> BIT_SHIFT_DARF_RC7_8822B) & BIT_MASK_DARF_RC7_8822B)
5939 #define BIT_SHIFT_DARF_RC6_8822B (40 & CPU_OPT_WIDTH)
5940 #define BIT_MASK_DARF_RC6_8822B 0x1f
5941 #define BIT_DARF_RC6_8822B(x) \
5942 (((x) & BIT_MASK_DARF_RC6_8822B) << BIT_SHIFT_DARF_RC6_8822B)
5943 #define BIT_GET_DARF_RC6_8822B(x) \
5944 (((x) >> BIT_SHIFT_DARF_RC6_8822B) & BIT_MASK_DARF_RC6_8822B)
5946 #define BIT_SHIFT_DARF_RC5_8822B (32 & CPU_OPT_WIDTH)
5947 #define BIT_MASK_DARF_RC5_8822B 0x1f
5948 #define BIT_DARF_RC5_8822B(x) \
5949 (((x) & BIT_MASK_DARF_RC5_8822B) << BIT_SHIFT_DARF_RC5_8822B)
5950 #define BIT_GET_DARF_RC5_8822B(x) \
5951 (((x) >> BIT_SHIFT_DARF_RC5_8822B) & BIT_MASK_DARF_RC5_8822B)
5953 #define BIT_SHIFT_DARF_RC4_8822B 24
5954 #define BIT_MASK_DARF_RC4_8822B 0x1f
5955 #define BIT_DARF_RC4_8822B(x) \
5956 (((x) & BIT_MASK_DARF_RC4_8822B) << BIT_SHIFT_DARF_RC4_8822B)
5957 #define BIT_GET_DARF_RC4_8822B(x) \
5958 (((x) >> BIT_SHIFT_DARF_RC4_8822B) & BIT_MASK_DARF_RC4_8822B)
5960 #define BIT_SHIFT_DARF_RC3_8822B 16
5961 #define BIT_MASK_DARF_RC3_8822B 0x1f
5962 #define BIT_DARF_RC3_8822B(x) \
5963 (((x) & BIT_MASK_DARF_RC3_8822B) << BIT_SHIFT_DARF_RC3_8822B)
5964 #define BIT_GET_DARF_RC3_8822B(x) \
5965 (((x) >> BIT_SHIFT_DARF_RC3_8822B) & BIT_MASK_DARF_RC3_8822B)
5967 #define BIT_SHIFT_DARF_RC2_8822B 8
5968 #define BIT_MASK_DARF_RC2_8822B 0x1f
5969 #define BIT_DARF_RC2_8822B(x) \
5970 (((x) & BIT_MASK_DARF_RC2_8822B) << BIT_SHIFT_DARF_RC2_8822B)
5971 #define BIT_GET_DARF_RC2_8822B(x) \
5972 (((x) >> BIT_SHIFT_DARF_RC2_8822B) & BIT_MASK_DARF_RC2_8822B)
5974 #define BIT_SHIFT_DARF_RC1_8822B 0
5975 #define BIT_MASK_DARF_RC1_8822B 0x1f
5976 #define BIT_DARF_RC1_8822B(x) \
5977 (((x) & BIT_MASK_DARF_RC1_8822B) << BIT_SHIFT_DARF_RC1_8822B)
5978 #define BIT_GET_DARF_RC1_8822B(x) \
5979 (((x) >> BIT_SHIFT_DARF_RC1_8822B) & BIT_MASK_DARF_RC1_8822B)
5981 /* 2 REG_RARFRC_8822B */
5983 #define BIT_SHIFT_RARF_RC8_8822B (56 & CPU_OPT_WIDTH)
5984 #define BIT_MASK_RARF_RC8_8822B 0x1f
5985 #define BIT_RARF_RC8_8822B(x) \
5986 (((x) & BIT_MASK_RARF_RC8_8822B) << BIT_SHIFT_RARF_RC8_8822B)
5987 #define BIT_GET_RARF_RC8_8822B(x) \
5988 (((x) >> BIT_SHIFT_RARF_RC8_8822B) & BIT_MASK_RARF_RC8_8822B)
5990 #define BIT_SHIFT_RARF_RC7_8822B (48 & CPU_OPT_WIDTH)
5991 #define BIT_MASK_RARF_RC7_8822B 0x1f
5992 #define BIT_RARF_RC7_8822B(x) \
5993 (((x) & BIT_MASK_RARF_RC7_8822B) << BIT_SHIFT_RARF_RC7_8822B)
5994 #define BIT_GET_RARF_RC7_8822B(x) \
5995 (((x) >> BIT_SHIFT_RARF_RC7_8822B) & BIT_MASK_RARF_RC7_8822B)
5997 #define BIT_SHIFT_RARF_RC6_8822B (40 & CPU_OPT_WIDTH)
5998 #define BIT_MASK_RARF_RC6_8822B 0x1f
5999 #define BIT_RARF_RC6_8822B(x) \
6000 (((x) & BIT_MASK_RARF_RC6_8822B) << BIT_SHIFT_RARF_RC6_8822B)
6001 #define BIT_GET_RARF_RC6_8822B(x) \
6002 (((x) >> BIT_SHIFT_RARF_RC6_8822B) & BIT_MASK_RARF_RC6_8822B)
6004 #define BIT_SHIFT_RARF_RC5_8822B (32 & CPU_OPT_WIDTH)
6005 #define BIT_MASK_RARF_RC5_8822B 0x1f
6006 #define BIT_RARF_RC5_8822B(x) \
6007 (((x) & BIT_MASK_RARF_RC5_8822B) << BIT_SHIFT_RARF_RC5_8822B)
6008 #define BIT_GET_RARF_RC5_8822B(x) \
6009 (((x) >> BIT_SHIFT_RARF_RC5_8822B) & BIT_MASK_RARF_RC5_8822B)
6011 #define BIT_SHIFT_RARF_RC4_8822B 24
6012 #define BIT_MASK_RARF_RC4_8822B 0x1f
6013 #define BIT_RARF_RC4_8822B(x) \
6014 (((x) & BIT_MASK_RARF_RC4_8822B) << BIT_SHIFT_RARF_RC4_8822B)
6015 #define BIT_GET_RARF_RC4_8822B(x) \
6016 (((x) >> BIT_SHIFT_RARF_RC4_8822B) & BIT_MASK_RARF_RC4_8822B)
6018 #define BIT_SHIFT_RARF_RC3_8822B 16
6019 #define BIT_MASK_RARF_RC3_8822B 0x1f
6020 #define BIT_RARF_RC3_8822B(x) \
6021 (((x) & BIT_MASK_RARF_RC3_8822B) << BIT_SHIFT_RARF_RC3_8822B)
6022 #define BIT_GET_RARF_RC3_8822B(x) \
6023 (((x) >> BIT_SHIFT_RARF_RC3_8822B) & BIT_MASK_RARF_RC3_8822B)
6025 #define BIT_SHIFT_RARF_RC2_8822B 8
6026 #define BIT_MASK_RARF_RC2_8822B 0x1f
6027 #define BIT_RARF_RC2_8822B(x) \
6028 (((x) & BIT_MASK_RARF_RC2_8822B) << BIT_SHIFT_RARF_RC2_8822B)
6029 #define BIT_GET_RARF_RC2_8822B(x) \
6030 (((x) >> BIT_SHIFT_RARF_RC2_8822B) & BIT_MASK_RARF_RC2_8822B)
6032 #define BIT_SHIFT_RARF_RC1_8822B 0
6033 #define BIT_MASK_RARF_RC1_8822B 0x1f
6034 #define BIT_RARF_RC1_8822B(x) \
6035 (((x) & BIT_MASK_RARF_RC1_8822B) << BIT_SHIFT_RARF_RC1_8822B)
6036 #define BIT_GET_RARF_RC1_8822B(x) \
6037 (((x) >> BIT_SHIFT_RARF_RC1_8822B) & BIT_MASK_RARF_RC1_8822B)
6039 /* 2 REG_RRSR_8822B */
6041 #define BIT_SHIFT_RRSR_RSC_8822B 21
6042 #define BIT_MASK_RRSR_RSC_8822B 0x3
6043 #define BIT_RRSR_RSC_8822B(x) \
6044 (((x) & BIT_MASK_RRSR_RSC_8822B) << BIT_SHIFT_RRSR_RSC_8822B)
6045 #define BIT_GET_RRSR_RSC_8822B(x) \
6046 (((x) >> BIT_SHIFT_RRSR_RSC_8822B) & BIT_MASK_RRSR_RSC_8822B)
6048 #define BIT_RRSR_BW_8822B BIT(20)
6050 #define BIT_SHIFT_RRSC_BITMAP_8822B 0
6051 #define BIT_MASK_RRSC_BITMAP_8822B 0xfffff
6052 #define BIT_RRSC_BITMAP_8822B(x) \
6053 (((x) & BIT_MASK_RRSC_BITMAP_8822B) << BIT_SHIFT_RRSC_BITMAP_8822B)
6054 #define BIT_GET_RRSC_BITMAP_8822B(x) \
6055 (((x) >> BIT_SHIFT_RRSC_BITMAP_8822B) & BIT_MASK_RRSC_BITMAP_8822B)
6057 /* 2 REG_ARFR0_8822B */
6059 #define BIT_SHIFT_ARFR0_V1_8822B 0
6060 #define BIT_MASK_ARFR0_V1_8822B 0xffffffffffffffffL
6061 #define BIT_ARFR0_V1_8822B(x) \
6062 (((x) & BIT_MASK_ARFR0_V1_8822B) << BIT_SHIFT_ARFR0_V1_8822B)
6063 #define BIT_GET_ARFR0_V1_8822B(x) \
6064 (((x) >> BIT_SHIFT_ARFR0_V1_8822B) & BIT_MASK_ARFR0_V1_8822B)
6066 /* 2 REG_ARFR1_V1_8822B */
6068 #define BIT_SHIFT_ARFR1_V1_8822B 0
6069 #define BIT_MASK_ARFR1_V1_8822B 0xffffffffffffffffL
6070 #define BIT_ARFR1_V1_8822B(x) \
6071 (((x) & BIT_MASK_ARFR1_V1_8822B) << BIT_SHIFT_ARFR1_V1_8822B)
6072 #define BIT_GET_ARFR1_V1_8822B(x) \
6073 (((x) >> BIT_SHIFT_ARFR1_V1_8822B) & BIT_MASK_ARFR1_V1_8822B)
6075 /* 2 REG_CCK_CHECK_8822B */
6076 #define BIT_CHECK_CCK_EN_8822B BIT(7)
6077 #define BIT_EN_BCN_PKT_REL_8822B BIT(6)
6078 #define BIT_BCN_PORT_SEL_8822B BIT(5)
6079 #define BIT_MOREDATA_BYPASS_8822B BIT(4)
6080 #define BIT_EN_CLR_CMD_REL_BCN_PKT_8822B BIT(3)
6081 #define BIT_R_EN_SET_MOREDATA_8822B BIT(2)
6082 #define BIT__R_DIS_CLEAR_MACID_RELEASE_8822B BIT(1)
6083 #define BIT__R_MACID_RELEASE_EN_8822B BIT(0)
6085 /* 2 REG_AMPDU_MAX_TIME_V1_8822B */
6087 #define BIT_SHIFT_AMPDU_MAX_TIME_8822B 0
6088 #define BIT_MASK_AMPDU_MAX_TIME_8822B 0xff
6089 #define BIT_AMPDU_MAX_TIME_8822B(x) \
6090 (((x) & BIT_MASK_AMPDU_MAX_TIME_8822B) \
6091 << BIT_SHIFT_AMPDU_MAX_TIME_8822B)
6092 #define BIT_GET_AMPDU_MAX_TIME_8822B(x) \
6093 (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8822B) & \
6094 BIT_MASK_AMPDU_MAX_TIME_8822B)
6096 /* 2 REG_BCNQ1_BDNY_V1_8822B */
6098 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B 0
6099 #define BIT_MASK_BCNQ1_PGBNDY_V1_8822B 0xfff
6100 #define BIT_BCNQ1_PGBNDY_V1_8822B(x) \
6101 (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8822B) \
6102 << BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B)
6103 #define BIT_GET_BCNQ1_PGBNDY_V1_8822B(x) \
6104 (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B) & \
6105 BIT_MASK_BCNQ1_PGBNDY_V1_8822B)
6107 /* 2 REG_AMPDU_MAX_LENGTH_8822B */
6109 #define BIT_SHIFT_AMPDU_MAX_LENGTH_8822B 0
6110 #define BIT_MASK_AMPDU_MAX_LENGTH_8822B 0xffffffffL
6111 #define BIT_AMPDU_MAX_LENGTH_8822B(x) \
6112 (((x) & BIT_MASK_AMPDU_MAX_LENGTH_8822B) \
6113 << BIT_SHIFT_AMPDU_MAX_LENGTH_8822B)
6114 #define BIT_GET_AMPDU_MAX_LENGTH_8822B(x) \
6115 (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8822B) & \
6116 BIT_MASK_AMPDU_MAX_LENGTH_8822B)
6118 /* 2 REG_ACQ_STOP_8822B */
6119 #define BIT_AC7Q_STOP_8822B BIT(7)
6120 #define BIT_AC6Q_STOP_8822B BIT(6)
6121 #define BIT_AC5Q_STOP_8822B BIT(5)
6122 #define BIT_AC4Q_STOP_8822B BIT(4)
6123 #define BIT_AC3Q_STOP_8822B BIT(3)
6124 #define BIT_AC2Q_STOP_8822B BIT(2)
6125 #define BIT_AC1Q_STOP_8822B BIT(1)
6126 #define BIT_AC0Q_STOP_8822B BIT(0)
6128 /* 2 REG_NDPA_RATE_8822B */
6130 #define BIT_SHIFT_R_NDPA_RATE_V1_8822B 0
6131 #define BIT_MASK_R_NDPA_RATE_V1_8822B 0xff
6132 #define BIT_R_NDPA_RATE_V1_8822B(x) \
6133 (((x) & BIT_MASK_R_NDPA_RATE_V1_8822B) \
6134 << BIT_SHIFT_R_NDPA_RATE_V1_8822B)
6135 #define BIT_GET_R_NDPA_RATE_V1_8822B(x) \
6136 (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8822B) & \
6137 BIT_MASK_R_NDPA_RATE_V1_8822B)
6139 /* 2 REG_TX_HANG_CTRL_8822B */
6140 #define BIT_R_EN_GNT_BT_AWAKE_8822B BIT(3)
6141 #define BIT_EN_EOF_V1_8822B BIT(2)
6142 #define BIT_DIS_OQT_BLOCK_8822B BIT(1)
6143 #define BIT_SEARCH_QUEUE_EN_8822B BIT(0)
6145 /* 2 REG_NDPA_OPT_CTRL_8822B */
6146 #define BIT_R_DIS_MACID_RELEASE_RTY_8822B BIT(5)
6148 #define BIT_SHIFT_BW_SIGTA_8822B 3
6149 #define BIT_MASK_BW_SIGTA_8822B 0x3
6150 #define BIT_BW_SIGTA_8822B(x) \
6151 (((x) & BIT_MASK_BW_SIGTA_8822B) << BIT_SHIFT_BW_SIGTA_8822B)
6152 #define BIT_GET_BW_SIGTA_8822B(x) \
6153 (((x) >> BIT_SHIFT_BW_SIGTA_8822B) & BIT_MASK_BW_SIGTA_8822B)
6155 #define BIT_EN_BAR_SIGTA_8822B BIT(2)
6157 #define BIT_SHIFT_R_NDPA_BW_8822B 0
6158 #define BIT_MASK_R_NDPA_BW_8822B 0x3
6159 #define BIT_R_NDPA_BW_8822B(x) \
6160 (((x) & BIT_MASK_R_NDPA_BW_8822B) << BIT_SHIFT_R_NDPA_BW_8822B)
6161 #define BIT_GET_R_NDPA_BW_8822B(x) \
6162 (((x) >> BIT_SHIFT_R_NDPA_BW_8822B) & BIT_MASK_R_NDPA_BW_8822B)
6164 /* 2 REG_RD_RESP_PKT_TH_8822B */
6166 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B 0
6167 #define BIT_MASK_RD_RESP_PKT_TH_V1_8822B 0x3f
6168 #define BIT_RD_RESP_PKT_TH_V1_8822B(x) \
6169 (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8822B) \
6170 << BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B)
6171 #define BIT_GET_RD_RESP_PKT_TH_V1_8822B(x) \
6172 (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B) & \
6173 BIT_MASK_RD_RESP_PKT_TH_V1_8822B)
6175 /* 2 REG_CMDQ_INFO_8822B */
6177 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B 25
6178 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8822B 0x7f
6179 #define BIT_QUEUEMACID_CMDQ_V1_8822B(x) \
6180 (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8822B) \
6181 << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B)
6182 #define BIT_GET_QUEUEMACID_CMDQ_V1_8822B(x) \
6183 (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B) & \
6184 BIT_MASK_QUEUEMACID_CMDQ_V1_8822B)
6186 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B 23
6187 #define BIT_MASK_QUEUEAC_CMDQ_V1_8822B 0x3
6188 #define BIT_QUEUEAC_CMDQ_V1_8822B(x) \
6189 (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8822B) \
6190 << BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B)
6191 #define BIT_GET_QUEUEAC_CMDQ_V1_8822B(x) \
6192 (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B) & \
6193 BIT_MASK_QUEUEAC_CMDQ_V1_8822B)
6195 #define BIT_TIDEMPTY_CMDQ_V1_8822B BIT(22)
6197 #define BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B 11
6198 #define BIT_MASK_TAIL_PKT_CMDQ_V2_8822B 0x7ff
6199 #define BIT_TAIL_PKT_CMDQ_V2_8822B(x) \
6200 (((x) & BIT_MASK_TAIL_PKT_CMDQ_V2_8822B) \
6201 << BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B)
6202 #define BIT_GET_TAIL_PKT_CMDQ_V2_8822B(x) \
6203 (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B) & \
6204 BIT_MASK_TAIL_PKT_CMDQ_V2_8822B)
6206 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B 0
6207 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8822B 0x7ff
6208 #define BIT_HEAD_PKT_CMDQ_V1_8822B(x) \
6209 (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8822B) \
6210 << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B)
6211 #define BIT_GET_HEAD_PKT_CMDQ_V1_8822B(x) \
6212 (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B) & \
6213 BIT_MASK_HEAD_PKT_CMDQ_V1_8822B)
6215 /* 2 REG_Q4_INFO_8822B */
6217 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8822B 25
6218 #define BIT_MASK_QUEUEMACID_Q4_V1_8822B 0x7f
6219 #define BIT_QUEUEMACID_Q4_V1_8822B(x) \
6220 (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8822B) \
6221 << BIT_SHIFT_QUEUEMACID_Q4_V1_8822B)
6222 #define BIT_GET_QUEUEMACID_Q4_V1_8822B(x) \
6223 (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8822B) & \
6224 BIT_MASK_QUEUEMACID_Q4_V1_8822B)
6226 #define BIT_SHIFT_QUEUEAC_Q4_V1_8822B 23
6227 #define BIT_MASK_QUEUEAC_Q4_V1_8822B 0x3
6228 #define BIT_QUEUEAC_Q4_V1_8822B(x) \
6229 (((x) & BIT_MASK_QUEUEAC_Q4_V1_8822B) << BIT_SHIFT_QUEUEAC_Q4_V1_8822B)
6230 #define BIT_GET_QUEUEAC_Q4_V1_8822B(x) \
6231 (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8822B) & BIT_MASK_QUEUEAC_Q4_V1_8822B)
6233 #define BIT_TIDEMPTY_Q4_V1_8822B BIT(22)
6235 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8822B 11
6236 #define BIT_MASK_TAIL_PKT_Q4_V2_8822B 0x7ff
6237 #define BIT_TAIL_PKT_Q4_V2_8822B(x) \
6238 (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8822B) \
6239 << BIT_SHIFT_TAIL_PKT_Q4_V2_8822B)
6240 #define BIT_GET_TAIL_PKT_Q4_V2_8822B(x) \
6241 (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8822B) & \
6242 BIT_MASK_TAIL_PKT_Q4_V2_8822B)
6244 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8822B 0
6245 #define BIT_MASK_HEAD_PKT_Q4_V1_8822B 0x7ff
6246 #define BIT_HEAD_PKT_Q4_V1_8822B(x) \
6247 (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8822B) \
6248 << BIT_SHIFT_HEAD_PKT_Q4_V1_8822B)
6249 #define BIT_GET_HEAD_PKT_Q4_V1_8822B(x) \
6250 (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8822B) & \
6251 BIT_MASK_HEAD_PKT_Q4_V1_8822B)
6253 /* 2 REG_Q5_INFO_8822B */
6255 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8822B 25
6256 #define BIT_MASK_QUEUEMACID_Q5_V1_8822B 0x7f
6257 #define BIT_QUEUEMACID_Q5_V1_8822B(x) \
6258 (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8822B) \
6259 << BIT_SHIFT_QUEUEMACID_Q5_V1_8822B)
6260 #define BIT_GET_QUEUEMACID_Q5_V1_8822B(x) \
6261 (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8822B) & \
6262 BIT_MASK_QUEUEMACID_Q5_V1_8822B)
6264 #define BIT_SHIFT_QUEUEAC_Q5_V1_8822B 23
6265 #define BIT_MASK_QUEUEAC_Q5_V1_8822B 0x3
6266 #define BIT_QUEUEAC_Q5_V1_8822B(x) \
6267 (((x) & BIT_MASK_QUEUEAC_Q5_V1_8822B) << BIT_SHIFT_QUEUEAC_Q5_V1_8822B)
6268 #define BIT_GET_QUEUEAC_Q5_V1_8822B(x) \
6269 (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8822B) & BIT_MASK_QUEUEAC_Q5_V1_8822B)
6271 #define BIT_TIDEMPTY_Q5_V1_8822B BIT(22)
6273 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8822B 11
6274 #define BIT_MASK_TAIL_PKT_Q5_V2_8822B 0x7ff
6275 #define BIT_TAIL_PKT_Q5_V2_8822B(x) \
6276 (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8822B) \
6277 << BIT_SHIFT_TAIL_PKT_Q5_V2_8822B)
6278 #define BIT_GET_TAIL_PKT_Q5_V2_8822B(x) \
6279 (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8822B) & \
6280 BIT_MASK_TAIL_PKT_Q5_V2_8822B)
6282 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8822B 0
6283 #define BIT_MASK_HEAD_PKT_Q5_V1_8822B 0x7ff
6284 #define BIT_HEAD_PKT_Q5_V1_8822B(x) \
6285 (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8822B) \
6286 << BIT_SHIFT_HEAD_PKT_Q5_V1_8822B)
6287 #define BIT_GET_HEAD_PKT_Q5_V1_8822B(x) \
6288 (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8822B) & \
6289 BIT_MASK_HEAD_PKT_Q5_V1_8822B)
6291 /* 2 REG_Q6_INFO_8822B */
6293 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8822B 25
6294 #define BIT_MASK_QUEUEMACID_Q6_V1_8822B 0x7f
6295 #define BIT_QUEUEMACID_Q6_V1_8822B(x) \
6296 (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8822B) \
6297 << BIT_SHIFT_QUEUEMACID_Q6_V1_8822B)
6298 #define BIT_GET_QUEUEMACID_Q6_V1_8822B(x) \
6299 (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8822B) & \
6300 BIT_MASK_QUEUEMACID_Q6_V1_8822B)
6302 #define BIT_SHIFT_QUEUEAC_Q6_V1_8822B 23
6303 #define BIT_MASK_QUEUEAC_Q6_V1_8822B 0x3
6304 #define BIT_QUEUEAC_Q6_V1_8822B(x) \
6305 (((x) & BIT_MASK_QUEUEAC_Q6_V1_8822B) << BIT_SHIFT_QUEUEAC_Q6_V1_8822B)
6306 #define BIT_GET_QUEUEAC_Q6_V1_8822B(x) \
6307 (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8822B) & BIT_MASK_QUEUEAC_Q6_V1_8822B)
6309 #define BIT_TIDEMPTY_Q6_V1_8822B BIT(22)
6311 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8822B 11
6312 #define BIT_MASK_TAIL_PKT_Q6_V2_8822B 0x7ff
6313 #define BIT_TAIL_PKT_Q6_V2_8822B(x) \
6314 (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8822B) \
6315 << BIT_SHIFT_TAIL_PKT_Q6_V2_8822B)
6316 #define BIT_GET_TAIL_PKT_Q6_V2_8822B(x) \
6317 (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8822B) & \
6318 BIT_MASK_TAIL_PKT_Q6_V2_8822B)
6320 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8822B 0
6321 #define BIT_MASK_HEAD_PKT_Q6_V1_8822B 0x7ff
6322 #define BIT_HEAD_PKT_Q6_V1_8822B(x) \
6323 (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8822B) \
6324 << BIT_SHIFT_HEAD_PKT_Q6_V1_8822B)
6325 #define BIT_GET_HEAD_PKT_Q6_V1_8822B(x) \
6326 (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8822B) & \
6327 BIT_MASK_HEAD_PKT_Q6_V1_8822B)
6329 /* 2 REG_Q7_INFO_8822B */
6331 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8822B 25
6332 #define BIT_MASK_QUEUEMACID_Q7_V1_8822B 0x7f
6333 #define BIT_QUEUEMACID_Q7_V1_8822B(x) \
6334 (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8822B) \
6335 << BIT_SHIFT_QUEUEMACID_Q7_V1_8822B)
6336 #define BIT_GET_QUEUEMACID_Q7_V1_8822B(x) \
6337 (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8822B) & \
6338 BIT_MASK_QUEUEMACID_Q7_V1_8822B)
6340 #define BIT_SHIFT_QUEUEAC_Q7_V1_8822B 23
6341 #define BIT_MASK_QUEUEAC_Q7_V1_8822B 0x3
6342 #define BIT_QUEUEAC_Q7_V1_8822B(x) \
6343 (((x) & BIT_MASK_QUEUEAC_Q7_V1_8822B) << BIT_SHIFT_QUEUEAC_Q7_V1_8822B)
6344 #define BIT_GET_QUEUEAC_Q7_V1_8822B(x) \
6345 (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8822B) & BIT_MASK_QUEUEAC_Q7_V1_8822B)
6347 #define BIT_TIDEMPTY_Q7_V1_8822B BIT(22)
6349 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8822B 11
6350 #define BIT_MASK_TAIL_PKT_Q7_V2_8822B 0x7ff
6351 #define BIT_TAIL_PKT_Q7_V2_8822B(x) \
6352 (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8822B) \
6353 << BIT_SHIFT_TAIL_PKT_Q7_V2_8822B)
6354 #define BIT_GET_TAIL_PKT_Q7_V2_8822B(x) \
6355 (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8822B) & \
6356 BIT_MASK_TAIL_PKT_Q7_V2_8822B)
6358 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8822B 0
6359 #define BIT_MASK_HEAD_PKT_Q7_V1_8822B 0x7ff
6360 #define BIT_HEAD_PKT_Q7_V1_8822B(x) \
6361 (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8822B) \
6362 << BIT_SHIFT_HEAD_PKT_Q7_V1_8822B)
6363 #define BIT_GET_HEAD_PKT_Q7_V1_8822B(x) \
6364 (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8822B) & \
6365 BIT_MASK_HEAD_PKT_Q7_V1_8822B)
6367 /* 2 REG_WMAC_LBK_BUF_HD_V1_8822B */
6369 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B 0
6370 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B 0xfff
6371 #define BIT_WMAC_LBK_BUF_HEAD_V1_8822B(x) \
6372 (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B) \
6373 << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B)
6374 #define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8822B(x) \
6375 (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B) & \
6376 BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B)
6378 /* 2 REG_MGQ_BDNY_V1_8822B */
6380 #define BIT_SHIFT_MGQ_PGBNDY_V1_8822B 0
6381 #define BIT_MASK_MGQ_PGBNDY_V1_8822B 0xfff
6382 #define BIT_MGQ_PGBNDY_V1_8822B(x) \
6383 (((x) & BIT_MASK_MGQ_PGBNDY_V1_8822B) << BIT_SHIFT_MGQ_PGBNDY_V1_8822B)
6384 #define BIT_GET_MGQ_PGBNDY_V1_8822B(x) \
6385 (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8822B) & BIT_MASK_MGQ_PGBNDY_V1_8822B)
6387 /* 2 REG_TXRPT_CTRL_8822B */
6389 #define BIT_SHIFT_TRXRPT_TIMER_TH_8822B 24
6390 #define BIT_MASK_TRXRPT_TIMER_TH_8822B 0xff
6391 #define BIT_TRXRPT_TIMER_TH_8822B(x) \
6392 (((x) & BIT_MASK_TRXRPT_TIMER_TH_8822B) \
6393 << BIT_SHIFT_TRXRPT_TIMER_TH_8822B)
6394 #define BIT_GET_TRXRPT_TIMER_TH_8822B(x) \
6395 (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8822B) & \
6396 BIT_MASK_TRXRPT_TIMER_TH_8822B)
6398 #define BIT_SHIFT_TRXRPT_LEN_TH_8822B 16
6399 #define BIT_MASK_TRXRPT_LEN_TH_8822B 0xff
6400 #define BIT_TRXRPT_LEN_TH_8822B(x) \
6401 (((x) & BIT_MASK_TRXRPT_LEN_TH_8822B) << BIT_SHIFT_TRXRPT_LEN_TH_8822B)
6402 #define BIT_GET_TRXRPT_LEN_TH_8822B(x) \
6403 (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8822B) & BIT_MASK_TRXRPT_LEN_TH_8822B)
6405 #define BIT_SHIFT_TRXRPT_READ_PTR_8822B 8
6406 #define BIT_MASK_TRXRPT_READ_PTR_8822B 0xff
6407 #define BIT_TRXRPT_READ_PTR_8822B(x) \
6408 (((x) & BIT_MASK_TRXRPT_READ_PTR_8822B) \
6409 << BIT_SHIFT_TRXRPT_READ_PTR_8822B)
6410 #define BIT_GET_TRXRPT_READ_PTR_8822B(x) \
6411 (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8822B) & \
6412 BIT_MASK_TRXRPT_READ_PTR_8822B)
6414 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8822B 0
6415 #define BIT_MASK_TRXRPT_WRITE_PTR_8822B 0xff
6416 #define BIT_TRXRPT_WRITE_PTR_8822B(x) \
6417 (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8822B) \
6418 << BIT_SHIFT_TRXRPT_WRITE_PTR_8822B)
6419 #define BIT_GET_TRXRPT_WRITE_PTR_8822B(x) \
6420 (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8822B) & \
6421 BIT_MASK_TRXRPT_WRITE_PTR_8822B)
6423 /* 2 REG_INIRTS_RATE_SEL_8822B */
6424 #define BIT_LEAG_RTS_BW_DUP_8822B BIT(5)
6426 /* 2 REG_BASIC_CFEND_RATE_8822B */
6428 #define BIT_SHIFT_BASIC_CFEND_RATE_8822B 0
6429 #define BIT_MASK_BASIC_CFEND_RATE_8822B 0x1f
6430 #define BIT_BASIC_CFEND_RATE_8822B(x) \
6431 (((x) & BIT_MASK_BASIC_CFEND_RATE_8822B) \
6432 << BIT_SHIFT_BASIC_CFEND_RATE_8822B)
6433 #define BIT_GET_BASIC_CFEND_RATE_8822B(x) \
6434 (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8822B) & \
6435 BIT_MASK_BASIC_CFEND_RATE_8822B)
6437 /* 2 REG_STBC_CFEND_RATE_8822B */
6439 #define BIT_SHIFT_STBC_CFEND_RATE_8822B 0
6440 #define BIT_MASK_STBC_CFEND_RATE_8822B 0x1f
6441 #define BIT_STBC_CFEND_RATE_8822B(x) \
6442 (((x) & BIT_MASK_STBC_CFEND_RATE_8822B) \
6443 << BIT_SHIFT_STBC_CFEND_RATE_8822B)
6444 #define BIT_GET_STBC_CFEND_RATE_8822B(x) \
6445 (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8822B) & \
6446 BIT_MASK_STBC_CFEND_RATE_8822B)
6448 /* 2 REG_DATA_SC_8822B */
6450 #define BIT_SHIFT_TXSC_40M_8822B 4
6451 #define BIT_MASK_TXSC_40M_8822B 0xf
6452 #define BIT_TXSC_40M_8822B(x) \
6453 (((x) & BIT_MASK_TXSC_40M_8822B) << BIT_SHIFT_TXSC_40M_8822B)
6454 #define BIT_GET_TXSC_40M_8822B(x) \
6455 (((x) >> BIT_SHIFT_TXSC_40M_8822B) & BIT_MASK_TXSC_40M_8822B)
6457 #define BIT_SHIFT_TXSC_20M_8822B 0
6458 #define BIT_MASK_TXSC_20M_8822B 0xf
6459 #define BIT_TXSC_20M_8822B(x) \
6460 (((x) & BIT_MASK_TXSC_20M_8822B) << BIT_SHIFT_TXSC_20M_8822B)
6461 #define BIT_GET_TXSC_20M_8822B(x) \
6462 (((x) >> BIT_SHIFT_TXSC_20M_8822B) & BIT_MASK_TXSC_20M_8822B)
6464 /* 2 REG_MACID_SLEEP3_8822B */
6466 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8822B 0
6467 #define BIT_MASK_MACID127_96_PKTSLEEP_8822B 0xffffffffL
6468 #define BIT_MACID127_96_PKTSLEEP_8822B(x) \
6469 (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8822B) \
6470 << BIT_SHIFT_MACID127_96_PKTSLEEP_8822B)
6471 #define BIT_GET_MACID127_96_PKTSLEEP_8822B(x) \
6472 (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8822B) & \
6473 BIT_MASK_MACID127_96_PKTSLEEP_8822B)
6475 /* 2 REG_MACID_SLEEP1_8822B */
6477 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8822B 0
6478 #define BIT_MASK_MACID63_32_PKTSLEEP_8822B 0xffffffffL
6479 #define BIT_MACID63_32_PKTSLEEP_8822B(x) \
6480 (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8822B) \
6481 << BIT_SHIFT_MACID63_32_PKTSLEEP_8822B)
6482 #define BIT_GET_MACID63_32_PKTSLEEP_8822B(x) \
6483 (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8822B) & \
6484 BIT_MASK_MACID63_32_PKTSLEEP_8822B)
6486 /* 2 REG_ARFR2_V1_8822B */
6488 #define BIT_SHIFT_ARFR2_V1_8822B 0
6489 #define BIT_MASK_ARFR2_V1_8822B 0xffffffffffffffffL
6490 #define BIT_ARFR2_V1_8822B(x) \
6491 (((x) & BIT_MASK_ARFR2_V1_8822B) << BIT_SHIFT_ARFR2_V1_8822B)
6492 #define BIT_GET_ARFR2_V1_8822B(x) \
6493 (((x) >> BIT_SHIFT_ARFR2_V1_8822B) & BIT_MASK_ARFR2_V1_8822B)
6495 /* 2 REG_ARFR3_V1_8822B */
6497 #define BIT_SHIFT_ARFR3_V1_8822B 0
6498 #define BIT_MASK_ARFR3_V1_8822B 0xffffffffffffffffL
6499 #define BIT_ARFR3_V1_8822B(x) \
6500 (((x) & BIT_MASK_ARFR3_V1_8822B) << BIT_SHIFT_ARFR3_V1_8822B)
6501 #define BIT_GET_ARFR3_V1_8822B(x) \
6502 (((x) >> BIT_SHIFT_ARFR3_V1_8822B) & BIT_MASK_ARFR3_V1_8822B)
6504 /* 2 REG_ARFR4_8822B */
6506 #define BIT_SHIFT_ARFR4_8822B 0
6507 #define BIT_MASK_ARFR4_8822B 0xffffffffffffffffL
6508 #define BIT_ARFR4_8822B(x) \
6509 (((x) & BIT_MASK_ARFR4_8822B) << BIT_SHIFT_ARFR4_8822B)
6510 #define BIT_GET_ARFR4_8822B(x) \
6511 (((x) >> BIT_SHIFT_ARFR4_8822B) & BIT_MASK_ARFR4_8822B)
6513 /* 2 REG_ARFR5_8822B */
6515 #define BIT_SHIFT_ARFR5_8822B 0
6516 #define BIT_MASK_ARFR5_8822B 0xffffffffffffffffL
6517 #define BIT_ARFR5_8822B(x) \
6518 (((x) & BIT_MASK_ARFR5_8822B) << BIT_SHIFT_ARFR5_8822B)
6519 #define BIT_GET_ARFR5_8822B(x) \
6520 (((x) >> BIT_SHIFT_ARFR5_8822B) & BIT_MASK_ARFR5_8822B)
6522 /* 2 REG_TXRPT_START_OFFSET_8822B */
6524 #define BIT_SHIFT_MACID_MURATE_OFFSET_8822B 24
6525 #define BIT_MASK_MACID_MURATE_OFFSET_8822B 0xff
6526 #define BIT_MACID_MURATE_OFFSET_8822B(x) \
6527 (((x) & BIT_MASK_MACID_MURATE_OFFSET_8822B) \
6528 << BIT_SHIFT_MACID_MURATE_OFFSET_8822B)
6529 #define BIT_GET_MACID_MURATE_OFFSET_8822B(x) \
6530 (((x) >> BIT_SHIFT_MACID_MURATE_OFFSET_8822B) & \
6531 BIT_MASK_MACID_MURATE_OFFSET_8822B)
6533 #define BIT_RPTFIFO_SIZE_OPT_8822B BIT(16)
6535 #define BIT_SHIFT_MACID_CTRL_OFFSET_8822B 8
6536 #define BIT_MASK_MACID_CTRL_OFFSET_8822B 0xff
6537 #define BIT_MACID_CTRL_OFFSET_8822B(x) \
6538 (((x) & BIT_MASK_MACID_CTRL_OFFSET_8822B) \
6539 << BIT_SHIFT_MACID_CTRL_OFFSET_8822B)
6540 #define BIT_GET_MACID_CTRL_OFFSET_8822B(x) \
6541 (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8822B) & \
6542 BIT_MASK_MACID_CTRL_OFFSET_8822B)
6544 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B 0
6545 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8822B 0xff
6546 #define BIT_AMPDU_TXRPT_OFFSET_8822B(x) \
6547 (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8822B) \
6548 << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B)
6549 #define BIT_GET_AMPDU_TXRPT_OFFSET_8822B(x) \
6550 (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B) & \
6551 BIT_MASK_AMPDU_TXRPT_OFFSET_8822B)
6553 /* 2 REG_POWER_STAGE1_8822B */
6554 #define BIT_PTA_WL_PRI_MASK_CPU_MGQ_8822B BIT(31)
6555 #define BIT_PTA_WL_PRI_MASK_BCNQ_8822B BIT(30)
6556 #define BIT_PTA_WL_PRI_MASK_HIQ_8822B BIT(29)
6557 #define BIT_PTA_WL_PRI_MASK_MGQ_8822B BIT(28)
6558 #define BIT_PTA_WL_PRI_MASK_BK_8822B BIT(27)
6559 #define BIT_PTA_WL_PRI_MASK_BE_8822B BIT(26)
6560 #define BIT_PTA_WL_PRI_MASK_VI_8822B BIT(25)
6561 #define BIT_PTA_WL_PRI_MASK_VO_8822B BIT(24)
6563 #define BIT_SHIFT_POWER_STAGE1_8822B 0
6564 #define BIT_MASK_POWER_STAGE1_8822B 0xffffff
6565 #define BIT_POWER_STAGE1_8822B(x) \
6566 (((x) & BIT_MASK_POWER_STAGE1_8822B) << BIT_SHIFT_POWER_STAGE1_8822B)
6567 #define BIT_GET_POWER_STAGE1_8822B(x) \
6568 (((x) >> BIT_SHIFT_POWER_STAGE1_8822B) & BIT_MASK_POWER_STAGE1_8822B)
6570 /* 2 REG_POWER_STAGE2_8822B */
6571 #define BIT__R_CTRL_PKT_POW_ADJ_8822B BIT(24)
6573 #define BIT_SHIFT_POWER_STAGE2_8822B 0
6574 #define BIT_MASK_POWER_STAGE2_8822B 0xffffff
6575 #define BIT_POWER_STAGE2_8822B(x) \
6576 (((x) & BIT_MASK_POWER_STAGE2_8822B) << BIT_SHIFT_POWER_STAGE2_8822B)
6577 #define BIT_GET_POWER_STAGE2_8822B(x) \
6578 (((x) >> BIT_SHIFT_POWER_STAGE2_8822B) & BIT_MASK_POWER_STAGE2_8822B)
6580 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8822B */
6582 #define BIT_SHIFT_PAD_NUM_THRES_8822B 24
6583 #define BIT_MASK_PAD_NUM_THRES_8822B 0x3f
6584 #define BIT_PAD_NUM_THRES_8822B(x) \
6585 (((x) & BIT_MASK_PAD_NUM_THRES_8822B) << BIT_SHIFT_PAD_NUM_THRES_8822B)
6586 #define BIT_GET_PAD_NUM_THRES_8822B(x) \
6587 (((x) >> BIT_SHIFT_PAD_NUM_THRES_8822B) & BIT_MASK_PAD_NUM_THRES_8822B)
6589 #define BIT_R_DMA_THIS_QUEUE_BK_8822B BIT(23)
6590 #define BIT_R_DMA_THIS_QUEUE_BE_8822B BIT(22)
6591 #define BIT_R_DMA_THIS_QUEUE_VI_8822B BIT(21)
6592 #define BIT_R_DMA_THIS_QUEUE_VO_8822B BIT(20)
6594 #define BIT_SHIFT_R_TOTAL_LEN_TH_8822B 8
6595 #define BIT_MASK_R_TOTAL_LEN_TH_8822B 0xfff
6596 #define BIT_R_TOTAL_LEN_TH_8822B(x) \
6597 (((x) & BIT_MASK_R_TOTAL_LEN_TH_8822B) \
6598 << BIT_SHIFT_R_TOTAL_LEN_TH_8822B)
6599 #define BIT_GET_R_TOTAL_LEN_TH_8822B(x) \
6600 (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8822B) & \
6601 BIT_MASK_R_TOTAL_LEN_TH_8822B)
6603 #define BIT_EN_NEW_EARLY_8822B BIT(7)
6604 #define BIT_PRE_TX_CMD_8822B BIT(6)
6606 #define BIT_SHIFT_NUM_SCL_EN_8822B 4
6607 #define BIT_MASK_NUM_SCL_EN_8822B 0x3
6608 #define BIT_NUM_SCL_EN_8822B(x) \
6609 (((x) & BIT_MASK_NUM_SCL_EN_8822B) << BIT_SHIFT_NUM_SCL_EN_8822B)
6610 #define BIT_GET_NUM_SCL_EN_8822B(x) \
6611 (((x) >> BIT_SHIFT_NUM_SCL_EN_8822B) & BIT_MASK_NUM_SCL_EN_8822B)
6613 #define BIT_BK_EN_8822B BIT(3)
6614 #define BIT_BE_EN_8822B BIT(2)
6615 #define BIT_VI_EN_8822B BIT(1)
6616 #define BIT_VO_EN_8822B BIT(0)
6618 /* 2 REG_PKT_LIFE_TIME_8822B */
6620 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8822B 16
6621 #define BIT_MASK_PKT_LIFTIME_BEBK_8822B 0xffff
6622 #define BIT_PKT_LIFTIME_BEBK_8822B(x) \
6623 (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8822B) \
6624 << BIT_SHIFT_PKT_LIFTIME_BEBK_8822B)
6625 #define BIT_GET_PKT_LIFTIME_BEBK_8822B(x) \
6626 (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8822B) & \
6627 BIT_MASK_PKT_LIFTIME_BEBK_8822B)
6629 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8822B 0
6630 #define BIT_MASK_PKT_LIFTIME_VOVI_8822B 0xffff
6631 #define BIT_PKT_LIFTIME_VOVI_8822B(x) \
6632 (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8822B) \
6633 << BIT_SHIFT_PKT_LIFTIME_VOVI_8822B)
6634 #define BIT_GET_PKT_LIFTIME_VOVI_8822B(x) \
6635 (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8822B) & \
6636 BIT_MASK_PKT_LIFTIME_VOVI_8822B)
6638 /* 2 REG_STBC_SETTING_8822B */
6640 #define BIT_SHIFT_CDEND_TXTIME_L_8822B 4
6641 #define BIT_MASK_CDEND_TXTIME_L_8822B 0xf
6642 #define BIT_CDEND_TXTIME_L_8822B(x) \
6643 (((x) & BIT_MASK_CDEND_TXTIME_L_8822B) \
6644 << BIT_SHIFT_CDEND_TXTIME_L_8822B)
6645 #define BIT_GET_CDEND_TXTIME_L_8822B(x) \
6646 (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8822B) & \
6647 BIT_MASK_CDEND_TXTIME_L_8822B)
6649 #define BIT_SHIFT_NESS_8822B 2
6650 #define BIT_MASK_NESS_8822B 0x3
6651 #define BIT_NESS_8822B(x) (((x) & BIT_MASK_NESS_8822B) << BIT_SHIFT_NESS_8822B)
6652 #define BIT_GET_NESS_8822B(x) \
6653 (((x) >> BIT_SHIFT_NESS_8822B) & BIT_MASK_NESS_8822B)
6655 #define BIT_SHIFT_STBC_CFEND_8822B 0
6656 #define BIT_MASK_STBC_CFEND_8822B 0x3
6657 #define BIT_STBC_CFEND_8822B(x) \
6658 (((x) & BIT_MASK_STBC_CFEND_8822B) << BIT_SHIFT_STBC_CFEND_8822B)
6659 #define BIT_GET_STBC_CFEND_8822B(x) \
6660 (((x) >> BIT_SHIFT_STBC_CFEND_8822B) & BIT_MASK_STBC_CFEND_8822B)
6662 /* 2 REG_STBC_SETTING2_8822B */
6664 #define BIT_SHIFT_CDEND_TXTIME_H_8822B 0
6665 #define BIT_MASK_CDEND_TXTIME_H_8822B 0x1f
6666 #define BIT_CDEND_TXTIME_H_8822B(x) \
6667 (((x) & BIT_MASK_CDEND_TXTIME_H_8822B) \
6668 << BIT_SHIFT_CDEND_TXTIME_H_8822B)
6669 #define BIT_GET_CDEND_TXTIME_H_8822B(x) \
6670 (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8822B) & \
6671 BIT_MASK_CDEND_TXTIME_H_8822B)
6673 /* 2 REG_QUEUE_CTRL_8822B */
6674 #define BIT_PTA_EDCCA_EN_8822B BIT(5)
6675 #define BIT_PTA_WL_TX_EN_8822B BIT(4)
6676 #define BIT_R_USE_DATA_BW_8822B BIT(3)
6677 #define BIT_TRI_PKT_INT_MODE1_8822B BIT(2)
6678 #define BIT_TRI_PKT_INT_MODE0_8822B BIT(1)
6679 #define BIT_ACQ_MODE_SEL_8822B BIT(0)
6681 /* 2 REG_SINGLE_AMPDU_CTRL_8822B */
6682 #define BIT_EN_SINGLE_APMDU_8822B BIT(7)
6684 /* 2 REG_PROT_MODE_CTRL_8822B */
6686 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8822B 24
6687 #define BIT_MASK_RTS_MAX_AGG_NUM_8822B 0x3f
6688 #define BIT_RTS_MAX_AGG_NUM_8822B(x) \
6689 (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8822B) \
6690 << BIT_SHIFT_RTS_MAX_AGG_NUM_8822B)
6691 #define BIT_GET_RTS_MAX_AGG_NUM_8822B(x) \
6692 (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8822B) & \
6693 BIT_MASK_RTS_MAX_AGG_NUM_8822B)
6695 #define BIT_SHIFT_MAX_AGG_NUM_8822B 16
6696 #define BIT_MASK_MAX_AGG_NUM_8822B 0x3f
6697 #define BIT_MAX_AGG_NUM_8822B(x) \
6698 (((x) & BIT_MASK_MAX_AGG_NUM_8822B) << BIT_SHIFT_MAX_AGG_NUM_8822B)
6699 #define BIT_GET_MAX_AGG_NUM_8822B(x) \
6700 (((x) >> BIT_SHIFT_MAX_AGG_NUM_8822B) & BIT_MASK_MAX_AGG_NUM_8822B)
6702 #define BIT_SHIFT_RTS_TXTIME_TH_8822B 8
6703 #define BIT_MASK_RTS_TXTIME_TH_8822B 0xff
6704 #define BIT_RTS_TXTIME_TH_8822B(x) \
6705 (((x) & BIT_MASK_RTS_TXTIME_TH_8822B) << BIT_SHIFT_RTS_TXTIME_TH_8822B)
6706 #define BIT_GET_RTS_TXTIME_TH_8822B(x) \
6707 (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8822B) & BIT_MASK_RTS_TXTIME_TH_8822B)
6709 #define BIT_SHIFT_RTS_LEN_TH_8822B 0
6710 #define BIT_MASK_RTS_LEN_TH_8822B 0xff
6711 #define BIT_RTS_LEN_TH_8822B(x) \
6712 (((x) & BIT_MASK_RTS_LEN_TH_8822B) << BIT_SHIFT_RTS_LEN_TH_8822B)
6713 #define BIT_GET_RTS_LEN_TH_8822B(x) \
6714 (((x) >> BIT_SHIFT_RTS_LEN_TH_8822B) & BIT_MASK_RTS_LEN_TH_8822B)
6716 /* 2 REG_BAR_MODE_CTRL_8822B */
6718 #define BIT_SHIFT_BAR_RTY_LMT_8822B 16
6719 #define BIT_MASK_BAR_RTY_LMT_8822B 0x3
6720 #define BIT_BAR_RTY_LMT_8822B(x) \
6721 (((x) & BIT_MASK_BAR_RTY_LMT_8822B) << BIT_SHIFT_BAR_RTY_LMT_8822B)
6722 #define BIT_GET_BAR_RTY_LMT_8822B(x) \
6723 (((x) >> BIT_SHIFT_BAR_RTY_LMT_8822B) & BIT_MASK_BAR_RTY_LMT_8822B)
6725 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B 8
6726 #define BIT_MASK_BAR_PKT_TXTIME_TH_8822B 0xff
6727 #define BIT_BAR_PKT_TXTIME_TH_8822B(x) \
6728 (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8822B) \
6729 << BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B)
6730 #define BIT_GET_BAR_PKT_TXTIME_TH_8822B(x) \
6731 (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B) & \
6732 BIT_MASK_BAR_PKT_TXTIME_TH_8822B)
6734 #define BIT_BAR_EN_V1_8822B BIT(6)
6736 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B 0
6737 #define BIT_MASK_BAR_PKTNUM_TH_V1_8822B 0x3f
6738 #define BIT_BAR_PKTNUM_TH_V1_8822B(x) \
6739 (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8822B) \
6740 << BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B)
6741 #define BIT_GET_BAR_PKTNUM_TH_V1_8822B(x) \
6742 (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B) & \
6743 BIT_MASK_BAR_PKTNUM_TH_V1_8822B)
6745 /* 2 REG_RA_TRY_RATE_AGG_LMT_8822B */
6747 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B 0
6748 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B 0x3f
6749 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8822B(x) \
6750 (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B) \
6751 << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B)
6752 #define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8822B(x) \
6753 (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B) & \
6754 BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B)
6756 /* 2 REG_MACID_SLEEP2_8822B */
6758 #define BIT_SHIFT_MACID95_64PKTSLEEP_8822B 0
6759 #define BIT_MASK_MACID95_64PKTSLEEP_8822B 0xffffffffL
6760 #define BIT_MACID95_64PKTSLEEP_8822B(x) \
6761 (((x) & BIT_MASK_MACID95_64PKTSLEEP_8822B) \
6762 << BIT_SHIFT_MACID95_64PKTSLEEP_8822B)
6763 #define BIT_GET_MACID95_64PKTSLEEP_8822B(x) \
6764 (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8822B) & \
6765 BIT_MASK_MACID95_64PKTSLEEP_8822B)
6767 /* 2 REG_MACID_SLEEP_8822B */
6769 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8822B 0
6770 #define BIT_MASK_MACID31_0_PKTSLEEP_8822B 0xffffffffL
6771 #define BIT_MACID31_0_PKTSLEEP_8822B(x) \
6772 (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8822B) \
6773 << BIT_SHIFT_MACID31_0_PKTSLEEP_8822B)
6774 #define BIT_GET_MACID31_0_PKTSLEEP_8822B(x) \
6775 (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8822B) & \
6776 BIT_MASK_MACID31_0_PKTSLEEP_8822B)
6778 /* 2 REG_HW_SEQ0_8822B */
6780 #define BIT_SHIFT_HW_SSN_SEQ0_8822B 0
6781 #define BIT_MASK_HW_SSN_SEQ0_8822B 0xfff
6782 #define BIT_HW_SSN_SEQ0_8822B(x) \
6783 (((x) & BIT_MASK_HW_SSN_SEQ0_8822B) << BIT_SHIFT_HW_SSN_SEQ0_8822B)
6784 #define BIT_GET_HW_SSN_SEQ0_8822B(x) \
6785 (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8822B) & BIT_MASK_HW_SSN_SEQ0_8822B)
6787 /* 2 REG_HW_SEQ1_8822B */
6789 #define BIT_SHIFT_HW_SSN_SEQ1_8822B 0
6790 #define BIT_MASK_HW_SSN_SEQ1_8822B 0xfff
6791 #define BIT_HW_SSN_SEQ1_8822B(x) \
6792 (((x) & BIT_MASK_HW_SSN_SEQ1_8822B) << BIT_SHIFT_HW_SSN_SEQ1_8822B)
6793 #define BIT_GET_HW_SSN_SEQ1_8822B(x) \
6794 (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8822B) & BIT_MASK_HW_SSN_SEQ1_8822B)
6796 /* 2 REG_HW_SEQ2_8822B */
6798 #define BIT_SHIFT_HW_SSN_SEQ2_8822B 0
6799 #define BIT_MASK_HW_SSN_SEQ2_8822B 0xfff
6800 #define BIT_HW_SSN_SEQ2_8822B(x) \
6801 (((x) & BIT_MASK_HW_SSN_SEQ2_8822B) << BIT_SHIFT_HW_SSN_SEQ2_8822B)
6802 #define BIT_GET_HW_SSN_SEQ2_8822B(x) \
6803 (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8822B) & BIT_MASK_HW_SSN_SEQ2_8822B)
6805 /* 2 REG_HW_SEQ3_8822B */
6807 #define BIT_SHIFT_HW_SSN_SEQ3_8822B 0
6808 #define BIT_MASK_HW_SSN_SEQ3_8822B 0xfff
6809 #define BIT_HW_SSN_SEQ3_8822B(x) \
6810 (((x) & BIT_MASK_HW_SSN_SEQ3_8822B) << BIT_SHIFT_HW_SSN_SEQ3_8822B)
6811 #define BIT_GET_HW_SSN_SEQ3_8822B(x) \
6812 (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8822B) & BIT_MASK_HW_SSN_SEQ3_8822B)
6814 /* 2 REG_NULL_PKT_STATUS_V1_8822B */
6816 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B 2
6817 #define BIT_MASK_PTCL_TOTAL_PG_V2_8822B 0x3fff
6818 #define BIT_PTCL_TOTAL_PG_V2_8822B(x) \
6819 (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8822B) \
6820 << BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B)
6821 #define BIT_GET_PTCL_TOTAL_PG_V2_8822B(x) \
6822 (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B) & \
6823 BIT_MASK_PTCL_TOTAL_PG_V2_8822B)
6825 #define BIT_TX_NULL_1_8822B BIT(1)
6826 #define BIT_TX_NULL_0_8822B BIT(0)
6828 /* 2 REG_PTCL_ERR_STATUS_8822B */
6829 #define BIT_PTCL_RATE_TABLE_INVALID_8822B BIT(7)
6830 #define BIT_FTM_T2R_ERROR_8822B BIT(6)
6831 #define BIT_PTCL_ERR0_8822B BIT(5)
6832 #define BIT_PTCL_ERR1_8822B BIT(4)
6833 #define BIT_PTCL_ERR2_8822B BIT(3)
6834 #define BIT_PTCL_ERR3_8822B BIT(2)
6835 #define BIT_PTCL_ERR4_8822B BIT(1)
6836 #define BIT_PTCL_ERR5_8822B BIT(0)
6838 /* 2 REG_NULL_PKT_STATUS_EXTEND_8822B */
6839 #define BIT_CLI3_TX_NULL_1_8822B BIT(7)
6840 #define BIT_CLI3_TX_NULL_0_8822B BIT(6)
6841 #define BIT_CLI2_TX_NULL_1_8822B BIT(5)
6842 #define BIT_CLI2_TX_NULL_0_8822B BIT(4)
6843 #define BIT_CLI1_TX_NULL_1_8822B BIT(3)
6844 #define BIT_CLI1_TX_NULL_0_8822B BIT(2)
6845 #define BIT_CLI0_TX_NULL_1_8822B BIT(1)
6846 #define BIT_CLI0_TX_NULL_0_8822B BIT(0)
6848 /* 2 REG_VIDEO_ENHANCEMENT_FUN_8822B */
6849 #define BIT_VIDEO_JUST_DROP_8822B BIT(1)
6850 #define BIT_VIDEO_ENHANCEMENT_FUN_EN_8822B BIT(0)
6852 /* 2 REG_BT_POLLUTE_PKT_CNT_8822B */
6854 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B 0
6855 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8822B 0xffff
6856 #define BIT_BT_POLLUTE_PKT_CNT_8822B(x) \
6857 (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8822B) \
6858 << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B)
6859 #define BIT_GET_BT_POLLUTE_PKT_CNT_8822B(x) \
6860 (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B) & \
6861 BIT_MASK_BT_POLLUTE_PKT_CNT_8822B)
6863 /* 2 REG_NOT_VALID_8822B */
6865 /* 2 REG_PTCL_DBG_8822B */
6867 #define BIT_SHIFT_PTCL_DBG_8822B 0
6868 #define BIT_MASK_PTCL_DBG_8822B 0xffffffffL
6869 #define BIT_PTCL_DBG_8822B(x) \
6870 (((x) & BIT_MASK_PTCL_DBG_8822B) << BIT_SHIFT_PTCL_DBG_8822B)
6871 #define BIT_GET_PTCL_DBG_8822B(x) \
6872 (((x) >> BIT_SHIFT_PTCL_DBG_8822B) & BIT_MASK_PTCL_DBG_8822B)
6874 /* 2 REG_NOT_VALID_8822B */
6876 /* 2 REG_CPUMGQ_TIMER_CTRL2_8822B */
6878 #define BIT_SHIFT_TRI_HEAD_ADDR_8822B 16
6879 #define BIT_MASK_TRI_HEAD_ADDR_8822B 0xfff
6880 #define BIT_TRI_HEAD_ADDR_8822B(x) \
6881 (((x) & BIT_MASK_TRI_HEAD_ADDR_8822B) << BIT_SHIFT_TRI_HEAD_ADDR_8822B)
6882 #define BIT_GET_TRI_HEAD_ADDR_8822B(x) \
6883 (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8822B) & BIT_MASK_TRI_HEAD_ADDR_8822B)
6885 #define BIT_DROP_TH_EN_8822B BIT(8)
6887 #define BIT_SHIFT_DROP_TH_8822B 0
6888 #define BIT_MASK_DROP_TH_8822B 0xff
6889 #define BIT_DROP_TH_8822B(x) \
6890 (((x) & BIT_MASK_DROP_TH_8822B) << BIT_SHIFT_DROP_TH_8822B)
6891 #define BIT_GET_DROP_TH_8822B(x) \
6892 (((x) >> BIT_SHIFT_DROP_TH_8822B) & BIT_MASK_DROP_TH_8822B)
6894 /* 2 REG_NOT_VALID_8822B */
6896 /* 2 REG_DUMMY_PAGE4_V1_8822B */
6897 #define BIT_BCN_EN_EXTHWSEQ_8822B BIT(1)
6898 #define BIT_BCN_EN_HWSEQ_8822B BIT(0)
6900 /* 2 REG_MOREDATA_8822B */
6901 #define BIT_MOREDATA_CTRL2_EN_V1_8822B BIT(3)
6902 #define BIT_MOREDATA_CTRL1_EN_V1_8822B BIT(2)
6903 #define BIT_PKTIN_MOREDATA_REPLACE_ENABLE_V1_8822B BIT(0)
6905 /* 2 REG_NOT_VALID_8822B */
6907 /* 2 REG_Q0_Q1_INFO_8822B */
6908 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
6910 #define BIT_SHIFT_GTAB_ID_8822B 28
6911 #define BIT_MASK_GTAB_ID_8822B 0x7
6912 #define BIT_GTAB_ID_8822B(x) \
6913 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
6914 #define BIT_GET_GTAB_ID_8822B(x) \
6915 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
6917 #define BIT_SHIFT_AC1_PKT_INFO_8822B 16
6918 #define BIT_MASK_AC1_PKT_INFO_8822B 0xfff
6919 #define BIT_AC1_PKT_INFO_8822B(x) \
6920 (((x) & BIT_MASK_AC1_PKT_INFO_8822B) << BIT_SHIFT_AC1_PKT_INFO_8822B)
6921 #define BIT_GET_AC1_PKT_INFO_8822B(x) \
6922 (((x) >> BIT_SHIFT_AC1_PKT_INFO_8822B) & BIT_MASK_AC1_PKT_INFO_8822B)
6924 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
6926 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
6927 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
6928 #define BIT_GTAB_ID_V1_8822B(x) \
6929 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
6930 #define BIT_GET_GTAB_ID_V1_8822B(x) \
6931 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
6933 #define BIT_SHIFT_AC0_PKT_INFO_8822B 0
6934 #define BIT_MASK_AC0_PKT_INFO_8822B 0xfff
6935 #define BIT_AC0_PKT_INFO_8822B(x) \
6936 (((x) & BIT_MASK_AC0_PKT_INFO_8822B) << BIT_SHIFT_AC0_PKT_INFO_8822B)
6937 #define BIT_GET_AC0_PKT_INFO_8822B(x) \
6938 (((x) >> BIT_SHIFT_AC0_PKT_INFO_8822B) & BIT_MASK_AC0_PKT_INFO_8822B)
6940 /* 2 REG_Q2_Q3_INFO_8822B */
6941 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
6943 #define BIT_SHIFT_GTAB_ID_8822B 28
6944 #define BIT_MASK_GTAB_ID_8822B 0x7
6945 #define BIT_GTAB_ID_8822B(x) \
6946 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
6947 #define BIT_GET_GTAB_ID_8822B(x) \
6948 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
6950 #define BIT_SHIFT_AC3_PKT_INFO_8822B 16
6951 #define BIT_MASK_AC3_PKT_INFO_8822B 0xfff
6952 #define BIT_AC3_PKT_INFO_8822B(x) \
6953 (((x) & BIT_MASK_AC3_PKT_INFO_8822B) << BIT_SHIFT_AC3_PKT_INFO_8822B)
6954 #define BIT_GET_AC3_PKT_INFO_8822B(x) \
6955 (((x) >> BIT_SHIFT_AC3_PKT_INFO_8822B) & BIT_MASK_AC3_PKT_INFO_8822B)
6957 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
6959 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
6960 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
6961 #define BIT_GTAB_ID_V1_8822B(x) \
6962 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
6963 #define BIT_GET_GTAB_ID_V1_8822B(x) \
6964 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
6966 #define BIT_SHIFT_AC2_PKT_INFO_8822B 0
6967 #define BIT_MASK_AC2_PKT_INFO_8822B 0xfff
6968 #define BIT_AC2_PKT_INFO_8822B(x) \
6969 (((x) & BIT_MASK_AC2_PKT_INFO_8822B) << BIT_SHIFT_AC2_PKT_INFO_8822B)
6970 #define BIT_GET_AC2_PKT_INFO_8822B(x) \
6971 (((x) >> BIT_SHIFT_AC2_PKT_INFO_8822B) & BIT_MASK_AC2_PKT_INFO_8822B)
6973 /* 2 REG_Q4_Q5_INFO_8822B */
6974 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
6976 #define BIT_SHIFT_GTAB_ID_8822B 28
6977 #define BIT_MASK_GTAB_ID_8822B 0x7
6978 #define BIT_GTAB_ID_8822B(x) \
6979 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
6980 #define BIT_GET_GTAB_ID_8822B(x) \
6981 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
6983 #define BIT_SHIFT_AC5_PKT_INFO_8822B 16
6984 #define BIT_MASK_AC5_PKT_INFO_8822B 0xfff
6985 #define BIT_AC5_PKT_INFO_8822B(x) \
6986 (((x) & BIT_MASK_AC5_PKT_INFO_8822B) << BIT_SHIFT_AC5_PKT_INFO_8822B)
6987 #define BIT_GET_AC5_PKT_INFO_8822B(x) \
6988 (((x) >> BIT_SHIFT_AC5_PKT_INFO_8822B) & BIT_MASK_AC5_PKT_INFO_8822B)
6990 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
6992 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
6993 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
6994 #define BIT_GTAB_ID_V1_8822B(x) \
6995 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
6996 #define BIT_GET_GTAB_ID_V1_8822B(x) \
6997 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
6999 #define BIT_SHIFT_AC4_PKT_INFO_8822B 0
7000 #define BIT_MASK_AC4_PKT_INFO_8822B 0xfff
7001 #define BIT_AC4_PKT_INFO_8822B(x) \
7002 (((x) & BIT_MASK_AC4_PKT_INFO_8822B) << BIT_SHIFT_AC4_PKT_INFO_8822B)
7003 #define BIT_GET_AC4_PKT_INFO_8822B(x) \
7004 (((x) >> BIT_SHIFT_AC4_PKT_INFO_8822B) & BIT_MASK_AC4_PKT_INFO_8822B)
7006 /* 2 REG_Q6_Q7_INFO_8822B */
7007 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8822B BIT(31)
7009 #define BIT_SHIFT_GTAB_ID_8822B 28
7010 #define BIT_MASK_GTAB_ID_8822B 0x7
7011 #define BIT_GTAB_ID_8822B(x) \
7012 (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
7013 #define BIT_GET_GTAB_ID_8822B(x) \
7014 (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
7016 #define BIT_SHIFT_AC7_PKT_INFO_8822B 16
7017 #define BIT_MASK_AC7_PKT_INFO_8822B 0xfff
7018 #define BIT_AC7_PKT_INFO_8822B(x) \
7019 (((x) & BIT_MASK_AC7_PKT_INFO_8822B) << BIT_SHIFT_AC7_PKT_INFO_8822B)
7020 #define BIT_GET_AC7_PKT_INFO_8822B(x) \
7021 (((x) >> BIT_SHIFT_AC7_PKT_INFO_8822B) & BIT_MASK_AC7_PKT_INFO_8822B)
7023 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
7025 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
7026 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
7027 #define BIT_GTAB_ID_V1_8822B(x) \
7028 (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
7029 #define BIT_GET_GTAB_ID_V1_8822B(x) \
7030 (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
7032 #define BIT_SHIFT_AC6_PKT_INFO_8822B 0
7033 #define BIT_MASK_AC6_PKT_INFO_8822B 0xfff
7034 #define BIT_AC6_PKT_INFO_8822B(x) \
7035 (((x) & BIT_MASK_AC6_PKT_INFO_8822B) << BIT_SHIFT_AC6_PKT_INFO_8822B)
7036 #define BIT_GET_AC6_PKT_INFO_8822B(x) \
7037 (((x) >> BIT_SHIFT_AC6_PKT_INFO_8822B) & BIT_MASK_AC6_PKT_INFO_8822B)
7039 /* 2 REG_MGQ_HIQ_INFO_8822B */
7041 #define BIT_SHIFT_HIQ_PKT_INFO_8822B 16
7042 #define BIT_MASK_HIQ_PKT_INFO_8822B 0xfff
7043 #define BIT_HIQ_PKT_INFO_8822B(x) \
7044 (((x) & BIT_MASK_HIQ_PKT_INFO_8822B) << BIT_SHIFT_HIQ_PKT_INFO_8822B)
7045 #define BIT_GET_HIQ_PKT_INFO_8822B(x) \
7046 (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8822B) & BIT_MASK_HIQ_PKT_INFO_8822B)
7048 #define BIT_SHIFT_MGQ_PKT_INFO_8822B 0
7049 #define BIT_MASK_MGQ_PKT_INFO_8822B 0xfff
7050 #define BIT_MGQ_PKT_INFO_8822B(x) \
7051 (((x) & BIT_MASK_MGQ_PKT_INFO_8822B) << BIT_SHIFT_MGQ_PKT_INFO_8822B)
7052 #define BIT_GET_MGQ_PKT_INFO_8822B(x) \
7053 (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8822B) & BIT_MASK_MGQ_PKT_INFO_8822B)
7055 /* 2 REG_CMDQ_BCNQ_INFO_8822B */
7057 #define BIT_SHIFT_CMDQ_PKT_INFO_8822B 16
7058 #define BIT_MASK_CMDQ_PKT_INFO_8822B 0xfff
7059 #define BIT_CMDQ_PKT_INFO_8822B(x) \
7060 (((x) & BIT_MASK_CMDQ_PKT_INFO_8822B) << BIT_SHIFT_CMDQ_PKT_INFO_8822B)
7061 #define BIT_GET_CMDQ_PKT_INFO_8822B(x) \
7062 (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8822B) & BIT_MASK_CMDQ_PKT_INFO_8822B)
7064 #define BIT_SHIFT_BCNQ_PKT_INFO_8822B 0
7065 #define BIT_MASK_BCNQ_PKT_INFO_8822B 0xfff
7066 #define BIT_BCNQ_PKT_INFO_8822B(x) \
7067 (((x) & BIT_MASK_BCNQ_PKT_INFO_8822B) << BIT_SHIFT_BCNQ_PKT_INFO_8822B)
7068 #define BIT_GET_BCNQ_PKT_INFO_8822B(x) \
7069 (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8822B) & BIT_MASK_BCNQ_PKT_INFO_8822B)
7071 /* 2 REG_USEREG_SETTING_8822B */
7072 #define BIT_NDPA_USEREG_8822B BIT(21)
7074 #define BIT_SHIFT_RETRY_USEREG_8822B 19
7075 #define BIT_MASK_RETRY_USEREG_8822B 0x3
7076 #define BIT_RETRY_USEREG_8822B(x) \
7077 (((x) & BIT_MASK_RETRY_USEREG_8822B) << BIT_SHIFT_RETRY_USEREG_8822B)
7078 #define BIT_GET_RETRY_USEREG_8822B(x) \
7079 (((x) >> BIT_SHIFT_RETRY_USEREG_8822B) & BIT_MASK_RETRY_USEREG_8822B)
7081 #define BIT_SHIFT_TRYPKT_USEREG_8822B 17
7082 #define BIT_MASK_TRYPKT_USEREG_8822B 0x3
7083 #define BIT_TRYPKT_USEREG_8822B(x) \
7084 (((x) & BIT_MASK_TRYPKT_USEREG_8822B) << BIT_SHIFT_TRYPKT_USEREG_8822B)
7085 #define BIT_GET_TRYPKT_USEREG_8822B(x) \
7086 (((x) >> BIT_SHIFT_TRYPKT_USEREG_8822B) & BIT_MASK_TRYPKT_USEREG_8822B)
7088 #define BIT_CTLPKT_USEREG_8822B BIT(16)
7090 /* 2 REG_AESIV_SETTING_8822B */
7092 #define BIT_SHIFT_AESIV_OFFSET_8822B 0
7093 #define BIT_MASK_AESIV_OFFSET_8822B 0xfff
7094 #define BIT_AESIV_OFFSET_8822B(x) \
7095 (((x) & BIT_MASK_AESIV_OFFSET_8822B) << BIT_SHIFT_AESIV_OFFSET_8822B)
7096 #define BIT_GET_AESIV_OFFSET_8822B(x) \
7097 (((x) >> BIT_SHIFT_AESIV_OFFSET_8822B) & BIT_MASK_AESIV_OFFSET_8822B)
7099 /* 2 REG_BF0_TIME_SETTING_8822B */
7100 #define BIT_BF0_TIMER_SET_8822B BIT(31)
7101 #define BIT_BF0_TIMER_CLR_8822B BIT(30)
7102 #define BIT_BF0_UPDATE_EN_8822B BIT(29)
7103 #define BIT_BF0_TIMER_EN_8822B BIT(28)
7105 #define BIT_SHIFT_BF0_PRETIME_OVER_8822B 16
7106 #define BIT_MASK_BF0_PRETIME_OVER_8822B 0xfff
7107 #define BIT_BF0_PRETIME_OVER_8822B(x) \
7108 (((x) & BIT_MASK_BF0_PRETIME_OVER_8822B) \
7109 << BIT_SHIFT_BF0_PRETIME_OVER_8822B)
7110 #define BIT_GET_BF0_PRETIME_OVER_8822B(x) \
7111 (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8822B) & \
7112 BIT_MASK_BF0_PRETIME_OVER_8822B)
7114 #define BIT_SHIFT_BF0_LIFETIME_8822B 0
7115 #define BIT_MASK_BF0_LIFETIME_8822B 0xffff
7116 #define BIT_BF0_LIFETIME_8822B(x) \
7117 (((x) & BIT_MASK_BF0_LIFETIME_8822B) << BIT_SHIFT_BF0_LIFETIME_8822B)
7118 #define BIT_GET_BF0_LIFETIME_8822B(x) \
7119 (((x) >> BIT_SHIFT_BF0_LIFETIME_8822B) & BIT_MASK_BF0_LIFETIME_8822B)
7121 /* 2 REG_BF1_TIME_SETTING_8822B */
7122 #define BIT_BF1_TIMER_SET_8822B BIT(31)
7123 #define BIT_BF1_TIMER_CLR_8822B BIT(30)
7124 #define BIT_BF1_UPDATE_EN_8822B BIT(29)
7125 #define BIT_BF1_TIMER_EN_8822B BIT(28)
7127 #define BIT_SHIFT_BF1_PRETIME_OVER_8822B 16
7128 #define BIT_MASK_BF1_PRETIME_OVER_8822B 0xfff
7129 #define BIT_BF1_PRETIME_OVER_8822B(x) \
7130 (((x) & BIT_MASK_BF1_PRETIME_OVER_8822B) \
7131 << BIT_SHIFT_BF1_PRETIME_OVER_8822B)
7132 #define BIT_GET_BF1_PRETIME_OVER_8822B(x) \
7133 (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8822B) & \
7134 BIT_MASK_BF1_PRETIME_OVER_8822B)
7136 #define BIT_SHIFT_BF1_LIFETIME_8822B 0
7137 #define BIT_MASK_BF1_LIFETIME_8822B 0xffff
7138 #define BIT_BF1_LIFETIME_8822B(x) \
7139 (((x) & BIT_MASK_BF1_LIFETIME_8822B) << BIT_SHIFT_BF1_LIFETIME_8822B)
7140 #define BIT_GET_BF1_LIFETIME_8822B(x) \
7141 (((x) >> BIT_SHIFT_BF1_LIFETIME_8822B) & BIT_MASK_BF1_LIFETIME_8822B)
7143 /* 2 REG_BF_TIMEOUT_EN_8822B */
7144 #define BIT_EN_VHT_LDPC_8822B BIT(9)
7145 #define BIT_EN_HT_LDPC_8822B BIT(8)
7146 #define BIT_BF1_TIMEOUT_EN_8822B BIT(1)
7147 #define BIT_BF0_TIMEOUT_EN_8822B BIT(0)
7149 /* 2 REG_MACID_RELEASE0_8822B */
7151 #define BIT_SHIFT_MACID31_0_RELEASE_8822B 0
7152 #define BIT_MASK_MACID31_0_RELEASE_8822B 0xffffffffL
7153 #define BIT_MACID31_0_RELEASE_8822B(x) \
7154 (((x) & BIT_MASK_MACID31_0_RELEASE_8822B) \
7155 << BIT_SHIFT_MACID31_0_RELEASE_8822B)
7156 #define BIT_GET_MACID31_0_RELEASE_8822B(x) \
7157 (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8822B) & \
7158 BIT_MASK_MACID31_0_RELEASE_8822B)
7160 /* 2 REG_MACID_RELEASE1_8822B */
7162 #define BIT_SHIFT_MACID63_32_RELEASE_8822B 0
7163 #define BIT_MASK_MACID63_32_RELEASE_8822B 0xffffffffL
7164 #define BIT_MACID63_32_RELEASE_8822B(x) \
7165 (((x) & BIT_MASK_MACID63_32_RELEASE_8822B) \
7166 << BIT_SHIFT_MACID63_32_RELEASE_8822B)
7167 #define BIT_GET_MACID63_32_RELEASE_8822B(x) \
7168 (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8822B) & \
7169 BIT_MASK_MACID63_32_RELEASE_8822B)
7171 /* 2 REG_MACID_RELEASE2_8822B */
7173 #define BIT_SHIFT_MACID95_64_RELEASE_8822B 0
7174 #define BIT_MASK_MACID95_64_RELEASE_8822B 0xffffffffL
7175 #define BIT_MACID95_64_RELEASE_8822B(x) \
7176 (((x) & BIT_MASK_MACID95_64_RELEASE_8822B) \
7177 << BIT_SHIFT_MACID95_64_RELEASE_8822B)
7178 #define BIT_GET_MACID95_64_RELEASE_8822B(x) \
7179 (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8822B) & \
7180 BIT_MASK_MACID95_64_RELEASE_8822B)
7182 /* 2 REG_MACID_RELEASE3_8822B */
7184 #define BIT_SHIFT_MACID127_96_RELEASE_8822B 0
7185 #define BIT_MASK_MACID127_96_RELEASE_8822B 0xffffffffL
7186 #define BIT_MACID127_96_RELEASE_8822B(x) \
7187 (((x) & BIT_MASK_MACID127_96_RELEASE_8822B) \
7188 << BIT_SHIFT_MACID127_96_RELEASE_8822B)
7189 #define BIT_GET_MACID127_96_RELEASE_8822B(x) \
7190 (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8822B) & \
7191 BIT_MASK_MACID127_96_RELEASE_8822B)
7193 /* 2 REG_MACID_RELEASE_SETTING_8822B */
7194 #define BIT_MACID_VALUE_8822B BIT(7)
7196 #define BIT_SHIFT_MACID_OFFSET_8822B 0
7197 #define BIT_MASK_MACID_OFFSET_8822B 0x7f
7198 #define BIT_MACID_OFFSET_8822B(x) \
7199 (((x) & BIT_MASK_MACID_OFFSET_8822B) << BIT_SHIFT_MACID_OFFSET_8822B)
7200 #define BIT_GET_MACID_OFFSET_8822B(x) \
7201 (((x) >> BIT_SHIFT_MACID_OFFSET_8822B) & BIT_MASK_MACID_OFFSET_8822B)
7203 /* 2 REG_FAST_EDCA_VOVI_SETTING_8822B */
7205 #define BIT_SHIFT_VI_FAST_EDCA_TO_8822B 24
7206 #define BIT_MASK_VI_FAST_EDCA_TO_8822B 0xff
7207 #define BIT_VI_FAST_EDCA_TO_8822B(x) \
7208 (((x) & BIT_MASK_VI_FAST_EDCA_TO_8822B) \
7209 << BIT_SHIFT_VI_FAST_EDCA_TO_8822B)
7210 #define BIT_GET_VI_FAST_EDCA_TO_8822B(x) \
7211 (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8822B) & \
7212 BIT_MASK_VI_FAST_EDCA_TO_8822B)
7214 #define BIT_VI_THRESHOLD_SEL_8822B BIT(23)
7216 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B 16
7217 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B 0x7f
7218 #define BIT_VI_FAST_EDCA_PKT_TH_8822B(x) \
7219 (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B) \
7220 << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B)
7221 #define BIT_GET_VI_FAST_EDCA_PKT_TH_8822B(x) \
7222 (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B) & \
7223 BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B)
7225 #define BIT_SHIFT_VO_FAST_EDCA_TO_8822B 8
7226 #define BIT_MASK_VO_FAST_EDCA_TO_8822B 0xff
7227 #define BIT_VO_FAST_EDCA_TO_8822B(x) \
7228 (((x) & BIT_MASK_VO_FAST_EDCA_TO_8822B) \
7229 << BIT_SHIFT_VO_FAST_EDCA_TO_8822B)
7230 #define BIT_GET_VO_FAST_EDCA_TO_8822B(x) \
7231 (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8822B) & \
7232 BIT_MASK_VO_FAST_EDCA_TO_8822B)
7234 #define BIT_VO_THRESHOLD_SEL_8822B BIT(7)
7236 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B 0
7237 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B 0x7f
7238 #define BIT_VO_FAST_EDCA_PKT_TH_8822B(x) \
7239 (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B) \
7240 << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B)
7241 #define BIT_GET_VO_FAST_EDCA_PKT_TH_8822B(x) \
7242 (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B) & \
7243 BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B)
7245 /* 2 REG_FAST_EDCA_BEBK_SETTING_8822B */
7247 #define BIT_SHIFT_BK_FAST_EDCA_TO_8822B 24
7248 #define BIT_MASK_BK_FAST_EDCA_TO_8822B 0xff
7249 #define BIT_BK_FAST_EDCA_TO_8822B(x) \
7250 (((x) & BIT_MASK_BK_FAST_EDCA_TO_8822B) \
7251 << BIT_SHIFT_BK_FAST_EDCA_TO_8822B)
7252 #define BIT_GET_BK_FAST_EDCA_TO_8822B(x) \
7253 (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8822B) & \
7254 BIT_MASK_BK_FAST_EDCA_TO_8822B)
7256 #define BIT_BK_THRESHOLD_SEL_8822B BIT(23)
7258 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B 16
7259 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B 0x7f
7260 #define BIT_BK_FAST_EDCA_PKT_TH_8822B(x) \
7261 (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B) \
7262 << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B)
7263 #define BIT_GET_BK_FAST_EDCA_PKT_TH_8822B(x) \
7264 (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B) & \
7265 BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B)
7267 #define BIT_SHIFT_BE_FAST_EDCA_TO_8822B 8
7268 #define BIT_MASK_BE_FAST_EDCA_TO_8822B 0xff
7269 #define BIT_BE_FAST_EDCA_TO_8822B(x) \
7270 (((x) & BIT_MASK_BE_FAST_EDCA_TO_8822B) \
7271 << BIT_SHIFT_BE_FAST_EDCA_TO_8822B)
7272 #define BIT_GET_BE_FAST_EDCA_TO_8822B(x) \
7273 (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8822B) & \
7274 BIT_MASK_BE_FAST_EDCA_TO_8822B)
7276 #define BIT_BE_THRESHOLD_SEL_8822B BIT(7)
7278 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B 0
7279 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B 0x7f
7280 #define BIT_BE_FAST_EDCA_PKT_TH_8822B(x) \
7281 (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B) \
7282 << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B)
7283 #define BIT_GET_BE_FAST_EDCA_PKT_TH_8822B(x) \
7284 (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B) & \
7285 BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B)
7287 /* 2 REG_MACID_DROP0_8822B */
7289 #define BIT_SHIFT_MACID31_0_DROP_8822B 0
7290 #define BIT_MASK_MACID31_0_DROP_8822B 0xffffffffL
7291 #define BIT_MACID31_0_DROP_8822B(x) \
7292 (((x) & BIT_MASK_MACID31_0_DROP_8822B) \
7293 << BIT_SHIFT_MACID31_0_DROP_8822B)
7294 #define BIT_GET_MACID31_0_DROP_8822B(x) \
7295 (((x) >> BIT_SHIFT_MACID31_0_DROP_8822B) & \
7296 BIT_MASK_MACID31_0_DROP_8822B)
7298 /* 2 REG_MACID_DROP1_8822B */
7300 #define BIT_SHIFT_MACID63_32_DROP_8822B 0
7301 #define BIT_MASK_MACID63_32_DROP_8822B 0xffffffffL
7302 #define BIT_MACID63_32_DROP_8822B(x) \
7303 (((x) & BIT_MASK_MACID63_32_DROP_8822B) \
7304 << BIT_SHIFT_MACID63_32_DROP_8822B)
7305 #define BIT_GET_MACID63_32_DROP_8822B(x) \
7306 (((x) >> BIT_SHIFT_MACID63_32_DROP_8822B) & \
7307 BIT_MASK_MACID63_32_DROP_8822B)
7309 /* 2 REG_MACID_DROP2_8822B */
7311 #define BIT_SHIFT_MACID95_64_DROP_8822B 0
7312 #define BIT_MASK_MACID95_64_DROP_8822B 0xffffffffL
7313 #define BIT_MACID95_64_DROP_8822B(x) \
7314 (((x) & BIT_MASK_MACID95_64_DROP_8822B) \
7315 << BIT_SHIFT_MACID95_64_DROP_8822B)
7316 #define BIT_GET_MACID95_64_DROP_8822B(x) \
7317 (((x) >> BIT_SHIFT_MACID95_64_DROP_8822B) & \
7318 BIT_MASK_MACID95_64_DROP_8822B)
7320 /* 2 REG_MACID_DROP3_8822B */
7322 #define BIT_SHIFT_MACID127_96_DROP_8822B 0
7323 #define BIT_MASK_MACID127_96_DROP_8822B 0xffffffffL
7324 #define BIT_MACID127_96_DROP_8822B(x) \
7325 (((x) & BIT_MASK_MACID127_96_DROP_8822B) \
7326 << BIT_SHIFT_MACID127_96_DROP_8822B)
7327 #define BIT_GET_MACID127_96_DROP_8822B(x) \
7328 (((x) >> BIT_SHIFT_MACID127_96_DROP_8822B) & \
7329 BIT_MASK_MACID127_96_DROP_8822B)
7331 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8822B */
7333 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B 0
7334 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B 0xffffffffL
7335 #define BIT_R_MACID_RELEASE_SUCCESS_0_8822B(x) \
7336 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B) \
7337 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B)
7338 #define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8822B(x) \
7339 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B) & \
7340 BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B)
7342 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8822B */
7344 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B 0
7345 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B 0xffffffffL
7346 #define BIT_R_MACID_RELEASE_SUCCESS_1_8822B(x) \
7347 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B) \
7348 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B)
7349 #define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8822B(x) \
7350 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B) & \
7351 BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B)
7353 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8822B */
7355 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B 0
7356 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B 0xffffffffL
7357 #define BIT_R_MACID_RELEASE_SUCCESS_2_8822B(x) \
7358 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B) \
7359 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B)
7360 #define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8822B(x) \
7361 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B) & \
7362 BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B)
7364 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8822B */
7366 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B 0
7367 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B 0xffffffffL
7368 #define BIT_R_MACID_RELEASE_SUCCESS_3_8822B(x) \
7369 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B) \
7370 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B)
7371 #define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8822B(x) \
7372 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B) & \
7373 BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B)
7375 /* 2 REG_MGG_FIFO_CRTL_8822B */
7376 #define BIT_R_MGG_FIFO_EN_8822B BIT(31)
7378 #define BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B 28
7379 #define BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B 0x7
7380 #define BIT_R_MGG_FIFO_PG_SIZE_8822B(x) \
7381 (((x) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B) \
7382 << BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B)
7383 #define BIT_GET_R_MGG_FIFO_PG_SIZE_8822B(x) \
7384 (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B) & \
7385 BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B)
7387 #define BIT_SHIFT_R_MGG_FIFO_START_PG_8822B 16
7388 #define BIT_MASK_R_MGG_FIFO_START_PG_8822B 0xfff
7389 #define BIT_R_MGG_FIFO_START_PG_8822B(x) \
7390 (((x) & BIT_MASK_R_MGG_FIFO_START_PG_8822B) \
7391 << BIT_SHIFT_R_MGG_FIFO_START_PG_8822B)
7392 #define BIT_GET_R_MGG_FIFO_START_PG_8822B(x) \
7393 (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8822B) & \
7394 BIT_MASK_R_MGG_FIFO_START_PG_8822B)
7396 #define BIT_SHIFT_R_MGG_FIFO_SIZE_8822B 14
7397 #define BIT_MASK_R_MGG_FIFO_SIZE_8822B 0x3
7398 #define BIT_R_MGG_FIFO_SIZE_8822B(x) \
7399 (((x) & BIT_MASK_R_MGG_FIFO_SIZE_8822B) \
7400 << BIT_SHIFT_R_MGG_FIFO_SIZE_8822B)
7401 #define BIT_GET_R_MGG_FIFO_SIZE_8822B(x) \
7402 (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8822B) & \
7403 BIT_MASK_R_MGG_FIFO_SIZE_8822B)
7405 #define BIT_R_MGG_FIFO_PAUSE_8822B BIT(13)
7407 #define BIT_SHIFT_R_MGG_FIFO_RPTR_8822B 8
7408 #define BIT_MASK_R_MGG_FIFO_RPTR_8822B 0x1f
7409 #define BIT_R_MGG_FIFO_RPTR_8822B(x) \
7410 (((x) & BIT_MASK_R_MGG_FIFO_RPTR_8822B) \
7411 << BIT_SHIFT_R_MGG_FIFO_RPTR_8822B)
7412 #define BIT_GET_R_MGG_FIFO_RPTR_8822B(x) \
7413 (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8822B) & \
7414 BIT_MASK_R_MGG_FIFO_RPTR_8822B)
7416 #define BIT_R_MGG_FIFO_OV_8822B BIT(7)
7417 #define BIT_R_MGG_FIFO_WPTR_ERROR_8822B BIT(6)
7418 #define BIT_R_EN_CPU_LIFETIME_8822B BIT(5)
7420 #define BIT_SHIFT_R_MGG_FIFO_WPTR_8822B 0
7421 #define BIT_MASK_R_MGG_FIFO_WPTR_8822B 0x1f
7422 #define BIT_R_MGG_FIFO_WPTR_8822B(x) \
7423 (((x) & BIT_MASK_R_MGG_FIFO_WPTR_8822B) \
7424 << BIT_SHIFT_R_MGG_FIFO_WPTR_8822B)
7425 #define BIT_GET_R_MGG_FIFO_WPTR_8822B(x) \
7426 (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8822B) & \
7427 BIT_MASK_R_MGG_FIFO_WPTR_8822B)
7429 /* 2 REG_MGG_FIFO_INT_8822B */
7431 #define BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B 16
7432 #define BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B 0xffff
7433 #define BIT_R_MGG_FIFO_INT_FLAG_8822B(x) \
7434 (((x) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B) \
7435 << BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B)
7436 #define BIT_GET_R_MGG_FIFO_INT_FLAG_8822B(x) \
7437 (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B) & \
7438 BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B)
7440 #define BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B 0
7441 #define BIT_MASK_R_MGG_FIFO_INT_MASK_8822B 0xffff
7442 #define BIT_R_MGG_FIFO_INT_MASK_8822B(x) \
7443 (((x) & BIT_MASK_R_MGG_FIFO_INT_MASK_8822B) \
7444 << BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B)
7445 #define BIT_GET_R_MGG_FIFO_INT_MASK_8822B(x) \
7446 (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B) & \
7447 BIT_MASK_R_MGG_FIFO_INT_MASK_8822B)
7449 /* 2 REG_MGG_FIFO_LIFETIME_8822B */
7451 #define BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B 16
7452 #define BIT_MASK_R_MGG_FIFO_LIFETIME_8822B 0xffff
7453 #define BIT_R_MGG_FIFO_LIFETIME_8822B(x) \
7454 (((x) & BIT_MASK_R_MGG_FIFO_LIFETIME_8822B) \
7455 << BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B)
7456 #define BIT_GET_R_MGG_FIFO_LIFETIME_8822B(x) \
7457 (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B) & \
7458 BIT_MASK_R_MGG_FIFO_LIFETIME_8822B)
7460 #define BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B 0
7461 #define BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B 0xffff
7462 #define BIT_R_MGG_FIFO_VALID_MAP_8822B(x) \
7463 (((x) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B) \
7464 << BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B)
7465 #define BIT_GET_R_MGG_FIFO_VALID_MAP_8822B(x) \
7466 (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B) & \
7467 BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B)
7469 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B */
7471 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0
7472 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0x7f
7473 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) \
7474 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) \
7475 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
7476 #define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) \
7477 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) & \
7478 BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
7480 /* 2 REG_MACID_SHCUT_OFFSET_8822B */
7482 #define BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B 0
7483 #define BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B 0xff
7484 #define BIT_MACID_SHCUT_OFFSET_V1_8822B(x) \
7485 (((x) & BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B) \
7486 << BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B)
7487 #define BIT_GET_MACID_SHCUT_OFFSET_V1_8822B(x) \
7488 (((x) >> BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B) & \
7489 BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B)
7491 /* 2 REG_MU_TX_CTL_8822B */
7492 #define BIT_R_EN_REVERS_GTAB_8822B BIT(6)
7494 #define BIT_SHIFT_R_MU_TABLE_VALID_8822B 0
7495 #define BIT_MASK_R_MU_TABLE_VALID_8822B 0x3f
7496 #define BIT_R_MU_TABLE_VALID_8822B(x) \
7497 (((x) & BIT_MASK_R_MU_TABLE_VALID_8822B) \
7498 << BIT_SHIFT_R_MU_TABLE_VALID_8822B)
7499 #define BIT_GET_R_MU_TABLE_VALID_8822B(x) \
7500 (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8822B) & \
7501 BIT_MASK_R_MU_TABLE_VALID_8822B)
7503 /* 2 REG_MU_STA_GID_VLD_8822B */
7505 /* 2 REG_NOT_VALID_8822B */
7507 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
7508 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
7509 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) \
7510 (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) \
7511 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
7512 #define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) \
7513 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & \
7514 BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
7516 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
7517 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
7518 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) \
7519 (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) \
7520 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
7521 #define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) \
7522 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & \
7523 BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
7525 /* 2 REG_MU_STA_USER_POS_INFO_8822B */
7527 /* 2 REG_NOT_VALID_8822B */
7529 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
7530 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
7531 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) \
7532 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) \
7533 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
7534 #define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) \
7535 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & \
7536 BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
7538 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
7539 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
7540 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) \
7541 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) \
7542 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
7543 #define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) \
7544 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & \
7545 BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
7547 /* 2 REG_MU_TRX_DBG_CNT_8822B */
7548 #define BIT_MU_DNGCNT_RST_8822B BIT(20)
7550 #define BIT_SHIFT_MU_DBGCNT_SEL_8822B 16
7551 #define BIT_MASK_MU_DBGCNT_SEL_8822B 0xf
7552 #define BIT_MU_DBGCNT_SEL_8822B(x) \
7553 (((x) & BIT_MASK_MU_DBGCNT_SEL_8822B) << BIT_SHIFT_MU_DBGCNT_SEL_8822B)
7554 #define BIT_GET_MU_DBGCNT_SEL_8822B(x) \
7555 (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8822B) & BIT_MASK_MU_DBGCNT_SEL_8822B)
7557 #define BIT_SHIFT_MU_DNGCNT_8822B 0
7558 #define BIT_MASK_MU_DNGCNT_8822B 0xffff
7559 #define BIT_MU_DNGCNT_8822B(x) \
7560 (((x) & BIT_MASK_MU_DNGCNT_8822B) << BIT_SHIFT_MU_DNGCNT_8822B)
7561 #define BIT_GET_MU_DNGCNT_8822B(x) \
7562 (((x) >> BIT_SHIFT_MU_DNGCNT_8822B) & BIT_MASK_MU_DNGCNT_8822B)
7564 /* 2 REG_NOT_VALID_8822B */
7566 /* 2 REG_EDCA_VO_PARAM_8822B */
7568 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7569 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7570 #define BIT_TXOPLIMIT_8822B(x) \
7571 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7572 #define BIT_GET_TXOPLIMIT_8822B(x) \
7573 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7575 #define BIT_SHIFT_CW_8822B 8
7576 #define BIT_MASK_CW_8822B 0xff
7577 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7578 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7580 #define BIT_SHIFT_AIFS_8822B 0
7581 #define BIT_MASK_AIFS_8822B 0xff
7582 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7583 #define BIT_GET_AIFS_8822B(x) \
7584 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7586 /* 2 REG_EDCA_VI_PARAM_8822B */
7588 /* 2 REG_NOT_VALID_8822B */
7590 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7591 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7592 #define BIT_TXOPLIMIT_8822B(x) \
7593 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7594 #define BIT_GET_TXOPLIMIT_8822B(x) \
7595 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7597 #define BIT_SHIFT_CW_8822B 8
7598 #define BIT_MASK_CW_8822B 0xff
7599 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7600 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7602 #define BIT_SHIFT_AIFS_8822B 0
7603 #define BIT_MASK_AIFS_8822B 0xff
7604 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7605 #define BIT_GET_AIFS_8822B(x) \
7606 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7608 /* 2 REG_EDCA_BE_PARAM_8822B */
7610 /* 2 REG_NOT_VALID_8822B */
7612 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7613 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7614 #define BIT_TXOPLIMIT_8822B(x) \
7615 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7616 #define BIT_GET_TXOPLIMIT_8822B(x) \
7617 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7619 #define BIT_SHIFT_CW_8822B 8
7620 #define BIT_MASK_CW_8822B 0xff
7621 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7622 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7624 #define BIT_SHIFT_AIFS_8822B 0
7625 #define BIT_MASK_AIFS_8822B 0xff
7626 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7627 #define BIT_GET_AIFS_8822B(x) \
7628 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7630 /* 2 REG_EDCA_BK_PARAM_8822B */
7632 /* 2 REG_NOT_VALID_8822B */
7634 #define BIT_SHIFT_TXOPLIMIT_8822B 16
7635 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
7636 #define BIT_TXOPLIMIT_8822B(x) \
7637 (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
7638 #define BIT_GET_TXOPLIMIT_8822B(x) \
7639 (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
7641 #define BIT_SHIFT_CW_8822B 8
7642 #define BIT_MASK_CW_8822B 0xff
7643 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
7644 #define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
7646 #define BIT_SHIFT_AIFS_8822B 0
7647 #define BIT_MASK_AIFS_8822B 0xff
7648 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
7649 #define BIT_GET_AIFS_8822B(x) \
7650 (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
7652 /* 2 REG_BCNTCFG_8822B */
7654 #define BIT_SHIFT_BCNCW_MAX_8822B 12
7655 #define BIT_MASK_BCNCW_MAX_8822B 0xf
7656 #define BIT_BCNCW_MAX_8822B(x) \
7657 (((x) & BIT_MASK_BCNCW_MAX_8822B) << BIT_SHIFT_BCNCW_MAX_8822B)
7658 #define BIT_GET_BCNCW_MAX_8822B(x) \
7659 (((x) >> BIT_SHIFT_BCNCW_MAX_8822B) & BIT_MASK_BCNCW_MAX_8822B)
7661 #define BIT_SHIFT_BCNCW_MIN_8822B 8
7662 #define BIT_MASK_BCNCW_MIN_8822B 0xf
7663 #define BIT_BCNCW_MIN_8822B(x) \
7664 (((x) & BIT_MASK_BCNCW_MIN_8822B) << BIT_SHIFT_BCNCW_MIN_8822B)
7665 #define BIT_GET_BCNCW_MIN_8822B(x) \
7666 (((x) >> BIT_SHIFT_BCNCW_MIN_8822B) & BIT_MASK_BCNCW_MIN_8822B)
7668 #define BIT_SHIFT_BCNIFS_8822B 0
7669 #define BIT_MASK_BCNIFS_8822B 0xff
7670 #define BIT_BCNIFS_8822B(x) \
7671 (((x) & BIT_MASK_BCNIFS_8822B) << BIT_SHIFT_BCNIFS_8822B)
7672 #define BIT_GET_BCNIFS_8822B(x) \
7673 (((x) >> BIT_SHIFT_BCNIFS_8822B) & BIT_MASK_BCNIFS_8822B)
7675 /* 2 REG_PIFS_8822B */
7677 #define BIT_SHIFT_PIFS_8822B 0
7678 #define BIT_MASK_PIFS_8822B 0xff
7679 #define BIT_PIFS_8822B(x) (((x) & BIT_MASK_PIFS_8822B) << BIT_SHIFT_PIFS_8822B)
7680 #define BIT_GET_PIFS_8822B(x) \
7681 (((x) >> BIT_SHIFT_PIFS_8822B) & BIT_MASK_PIFS_8822B)
7683 /* 2 REG_RDG_PIFS_8822B */
7685 #define BIT_SHIFT_RDG_PIFS_8822B 0
7686 #define BIT_MASK_RDG_PIFS_8822B 0xff
7687 #define BIT_RDG_PIFS_8822B(x) \
7688 (((x) & BIT_MASK_RDG_PIFS_8822B) << BIT_SHIFT_RDG_PIFS_8822B)
7689 #define BIT_GET_RDG_PIFS_8822B(x) \
7690 (((x) >> BIT_SHIFT_RDG_PIFS_8822B) & BIT_MASK_RDG_PIFS_8822B)
7692 /* 2 REG_SIFS_8822B */
7694 #define BIT_SHIFT_SIFS_OFDM_TRX_8822B 24
7695 #define BIT_MASK_SIFS_OFDM_TRX_8822B 0xff
7696 #define BIT_SIFS_OFDM_TRX_8822B(x) \
7697 (((x) & BIT_MASK_SIFS_OFDM_TRX_8822B) << BIT_SHIFT_SIFS_OFDM_TRX_8822B)
7698 #define BIT_GET_SIFS_OFDM_TRX_8822B(x) \
7699 (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8822B) & BIT_MASK_SIFS_OFDM_TRX_8822B)
7701 #define BIT_SHIFT_SIFS_CCK_TRX_8822B 16
7702 #define BIT_MASK_SIFS_CCK_TRX_8822B 0xff
7703 #define BIT_SIFS_CCK_TRX_8822B(x) \
7704 (((x) & BIT_MASK_SIFS_CCK_TRX_8822B) << BIT_SHIFT_SIFS_CCK_TRX_8822B)
7705 #define BIT_GET_SIFS_CCK_TRX_8822B(x) \
7706 (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8822B) & BIT_MASK_SIFS_CCK_TRX_8822B)
7708 #define BIT_SHIFT_SIFS_OFDM_CTX_8822B 8
7709 #define BIT_MASK_SIFS_OFDM_CTX_8822B 0xff
7710 #define BIT_SIFS_OFDM_CTX_8822B(x) \
7711 (((x) & BIT_MASK_SIFS_OFDM_CTX_8822B) << BIT_SHIFT_SIFS_OFDM_CTX_8822B)
7712 #define BIT_GET_SIFS_OFDM_CTX_8822B(x) \
7713 (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8822B) & BIT_MASK_SIFS_OFDM_CTX_8822B)
7715 #define BIT_SHIFT_SIFS_CCK_CTX_8822B 0
7716 #define BIT_MASK_SIFS_CCK_CTX_8822B 0xff
7717 #define BIT_SIFS_CCK_CTX_8822B(x) \
7718 (((x) & BIT_MASK_SIFS_CCK_CTX_8822B) << BIT_SHIFT_SIFS_CCK_CTX_8822B)
7719 #define BIT_GET_SIFS_CCK_CTX_8822B(x) \
7720 (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8822B) & BIT_MASK_SIFS_CCK_CTX_8822B)
7722 /* 2 REG_TSFTR_SYN_OFFSET_8822B */
7724 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8822B 0
7725 #define BIT_MASK_TSFTR_SNC_OFFSET_8822B 0xffff
7726 #define BIT_TSFTR_SNC_OFFSET_8822B(x) \
7727 (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8822B) \
7728 << BIT_SHIFT_TSFTR_SNC_OFFSET_8822B)
7729 #define BIT_GET_TSFTR_SNC_OFFSET_8822B(x) \
7730 (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8822B) & \
7731 BIT_MASK_TSFTR_SNC_OFFSET_8822B)
7733 /* 2 REG_AGGR_BREAK_TIME_8822B */
7735 #define BIT_SHIFT_AGGR_BK_TIME_8822B 0
7736 #define BIT_MASK_AGGR_BK_TIME_8822B 0xff
7737 #define BIT_AGGR_BK_TIME_8822B(x) \
7738 (((x) & BIT_MASK_AGGR_BK_TIME_8822B) << BIT_SHIFT_AGGR_BK_TIME_8822B)
7739 #define BIT_GET_AGGR_BK_TIME_8822B(x) \
7740 (((x) >> BIT_SHIFT_AGGR_BK_TIME_8822B) & BIT_MASK_AGGR_BK_TIME_8822B)
7742 /* 2 REG_SLOT_8822B */
7744 #define BIT_SHIFT_SLOT_8822B 0
7745 #define BIT_MASK_SLOT_8822B 0xff
7746 #define BIT_SLOT_8822B(x) (((x) & BIT_MASK_SLOT_8822B) << BIT_SHIFT_SLOT_8822B)
7747 #define BIT_GET_SLOT_8822B(x) \
7748 (((x) >> BIT_SHIFT_SLOT_8822B) & BIT_MASK_SLOT_8822B)
7750 /* 2 REG_TX_PTCL_CTRL_8822B */
7751 #define BIT_DIS_EDCCA_8822B BIT(15)
7752 #define BIT_DIS_CCA_8822B BIT(14)
7753 #define BIT_LSIG_TXOP_TXCMD_NAV_8822B BIT(13)
7754 #define BIT_SIFS_BK_EN_8822B BIT(12)
7756 #define BIT_SHIFT_TXQ_NAV_MSK_8822B 8
7757 #define BIT_MASK_TXQ_NAV_MSK_8822B 0xf
7758 #define BIT_TXQ_NAV_MSK_8822B(x) \
7759 (((x) & BIT_MASK_TXQ_NAV_MSK_8822B) << BIT_SHIFT_TXQ_NAV_MSK_8822B)
7760 #define BIT_GET_TXQ_NAV_MSK_8822B(x) \
7761 (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8822B) & BIT_MASK_TXQ_NAV_MSK_8822B)
7763 #define BIT_DIS_CW_8822B BIT(7)
7764 #define BIT_NAV_END_TXOP_8822B BIT(6)
7765 #define BIT_RDG_END_TXOP_8822B BIT(5)
7766 #define BIT_AC_INBCN_HOLD_8822B BIT(4)
7767 #define BIT_MGTQ_TXOP_EN_8822B BIT(3)
7768 #define BIT_MGTQ_RTSMF_EN_8822B BIT(2)
7769 #define BIT_HIQ_RTSMF_EN_8822B BIT(1)
7770 #define BIT_BCN_RTSMF_EN_8822B BIT(0)
7772 /* 2 REG_TXPAUSE_8822B */
7773 #define BIT_STOP_BCN_HI_MGT_8822B BIT(7)
7774 #define BIT_MAC_STOPBCNQ_8822B BIT(6)
7775 #define BIT_MAC_STOPHIQ_8822B BIT(5)
7776 #define BIT_MAC_STOPMGQ_8822B BIT(4)
7777 #define BIT_MAC_STOPBK_8822B BIT(3)
7778 #define BIT_MAC_STOPBE_8822B BIT(2)
7779 #define BIT_MAC_STOPVI_8822B BIT(1)
7780 #define BIT_MAC_STOPVO_8822B BIT(0)
7782 /* 2 REG_DIS_TXREQ_CLR_8822B */
7783 #define BIT_DIS_BT_CCA_8822B BIT(7)
7784 #define BIT_DIS_TXREQ_CLR_HI_8822B BIT(5)
7785 #define BIT_DIS_TXREQ_CLR_MGQ_8822B BIT(4)
7786 #define BIT_DIS_TXREQ_CLR_VO_8822B BIT(3)
7787 #define BIT_DIS_TXREQ_CLR_VI_8822B BIT(2)
7788 #define BIT_DIS_TXREQ_CLR_BE_8822B BIT(1)
7789 #define BIT_DIS_TXREQ_CLR_BK_8822B BIT(0)
7791 /* 2 REG_RD_CTRL_8822B */
7792 #define BIT_EN_CLR_TXREQ_INCCA_8822B BIT(15)
7793 #define BIT_DIS_TX_OVER_BCNQ_8822B BIT(14)
7794 #define BIT_EN_BCNERR_INCCCA_8822B BIT(13)
7795 #define BIT_EDCCA_MSK_CNTDOWN_EN_8822B BIT(11)
7796 #define BIT_DIS_TXOP_CFE_8822B BIT(10)
7797 #define BIT_DIS_LSIG_CFE_8822B BIT(9)
7798 #define BIT_DIS_STBC_CFE_8822B BIT(8)
7799 #define BIT_BKQ_RD_INIT_EN_8822B BIT(7)
7800 #define BIT_BEQ_RD_INIT_EN_8822B BIT(6)
7801 #define BIT_VIQ_RD_INIT_EN_8822B BIT(5)
7802 #define BIT_VOQ_RD_INIT_EN_8822B BIT(4)
7803 #define BIT_BKQ_RD_RESP_EN_8822B BIT(3)
7804 #define BIT_BEQ_RD_RESP_EN_8822B BIT(2)
7805 #define BIT_VIQ_RD_RESP_EN_8822B BIT(1)
7806 #define BIT_VOQ_RD_RESP_EN_8822B BIT(0)
7808 /* 2 REG_MBSSID_CTRL_8822B */
7809 #define BIT_MBID_BCNQ7_EN_8822B BIT(7)
7810 #define BIT_MBID_BCNQ6_EN_8822B BIT(6)
7811 #define BIT_MBID_BCNQ5_EN_8822B BIT(5)
7812 #define BIT_MBID_BCNQ4_EN_8822B BIT(4)
7813 #define BIT_MBID_BCNQ3_EN_8822B BIT(3)
7814 #define BIT_MBID_BCNQ2_EN_8822B BIT(2)
7815 #define BIT_MBID_BCNQ1_EN_8822B BIT(1)
7816 #define BIT_MBID_BCNQ0_EN_8822B BIT(0)
7818 /* 2 REG_P2PPS_CTRL_8822B */
7819 #define BIT_P2P_CTW_ALLSTASLEEP_8822B BIT(7)
7820 #define BIT_P2P_OFF_DISTX_EN_8822B BIT(6)
7821 #define BIT_PWR_MGT_EN_8822B BIT(5)
7822 #define BIT_P2P_NOA1_EN_8822B BIT(2)
7823 #define BIT_P2P_NOA0_EN_8822B BIT(1)
7825 /* 2 REG_PKT_LIFETIME_CTRL_8822B */
7826 #define BIT_EN_P2P_CTWND1_8822B BIT(23)
7827 #define BIT_EN_BKF_CLR_TXREQ_8822B BIT(22)
7828 #define BIT_EN_TSFBIT32_RST_P2P_8822B BIT(21)
7829 #define BIT_EN_BCN_TX_BTCCA_8822B BIT(20)
7830 #define BIT_DIS_PKT_TX_ATIM_8822B BIT(19)
7831 #define BIT_DIS_BCN_DIS_CTN_8822B BIT(18)
7832 #define BIT_EN_NAVEND_RST_TXOP_8822B BIT(17)
7833 #define BIT_EN_FILTER_CCA_8822B BIT(16)
7835 #define BIT_SHIFT_CCA_FILTER_THRS_8822B 8
7836 #define BIT_MASK_CCA_FILTER_THRS_8822B 0xff
7837 #define BIT_CCA_FILTER_THRS_8822B(x) \
7838 (((x) & BIT_MASK_CCA_FILTER_THRS_8822B) \
7839 << BIT_SHIFT_CCA_FILTER_THRS_8822B)
7840 #define BIT_GET_CCA_FILTER_THRS_8822B(x) \
7841 (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8822B) & \
7842 BIT_MASK_CCA_FILTER_THRS_8822B)
7844 #define BIT_SHIFT_EDCCA_THRS_8822B 0
7845 #define BIT_MASK_EDCCA_THRS_8822B 0xff
7846 #define BIT_EDCCA_THRS_8822B(x) \
7847 (((x) & BIT_MASK_EDCCA_THRS_8822B) << BIT_SHIFT_EDCCA_THRS_8822B)
7848 #define BIT_GET_EDCCA_THRS_8822B(x) \
7849 (((x) >> BIT_SHIFT_EDCCA_THRS_8822B) & BIT_MASK_EDCCA_THRS_8822B)
7851 /* 2 REG_P2PPS_SPEC_STATE_8822B */
7852 #define BIT_SPEC_POWER_STATE_8822B BIT(7)
7853 #define BIT_SPEC_CTWINDOW_ON_8822B BIT(6)
7854 #define BIT_SPEC_BEACON_AREA_ON_8822B BIT(5)
7855 #define BIT_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
7856 #define BIT_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
7857 #define BIT_SPEC_FORCE_DOZE1_8822B BIT(2)
7858 #define BIT_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
7859 #define BIT_SPEC_FORCE_DOZE0_8822B BIT(0)
7861 /* 2 REG_BAR_TX_CTRL_8822B */
7863 /* 2 REG_NOT_VALID_8822B */
7865 #define BIT_SHIFT_P2PON_DIS_TXTIME_8822B 0
7866 #define BIT_MASK_P2PON_DIS_TXTIME_8822B 0xff
7867 #define BIT_P2PON_DIS_TXTIME_8822B(x) \
7868 (((x) & BIT_MASK_P2PON_DIS_TXTIME_8822B) \
7869 << BIT_SHIFT_P2PON_DIS_TXTIME_8822B)
7870 #define BIT_GET_P2PON_DIS_TXTIME_8822B(x) \
7871 (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8822B) & \
7872 BIT_MASK_P2PON_DIS_TXTIME_8822B)
7874 /* 2 REG_QUEUE_INCOL_THR_8822B */
7876 #define BIT_SHIFT_BK_QUEUE_THR_8822B 24
7877 #define BIT_MASK_BK_QUEUE_THR_8822B 0xff
7878 #define BIT_BK_QUEUE_THR_8822B(x) \
7879 (((x) & BIT_MASK_BK_QUEUE_THR_8822B) << BIT_SHIFT_BK_QUEUE_THR_8822B)
7880 #define BIT_GET_BK_QUEUE_THR_8822B(x) \
7881 (((x) >> BIT_SHIFT_BK_QUEUE_THR_8822B) & BIT_MASK_BK_QUEUE_THR_8822B)
7883 #define BIT_SHIFT_BE_QUEUE_THR_8822B 16
7884 #define BIT_MASK_BE_QUEUE_THR_8822B 0xff
7885 #define BIT_BE_QUEUE_THR_8822B(x) \
7886 (((x) & BIT_MASK_BE_QUEUE_THR_8822B) << BIT_SHIFT_BE_QUEUE_THR_8822B)
7887 #define BIT_GET_BE_QUEUE_THR_8822B(x) \
7888 (((x) >> BIT_SHIFT_BE_QUEUE_THR_8822B) & BIT_MASK_BE_QUEUE_THR_8822B)
7890 #define BIT_SHIFT_VI_QUEUE_THR_8822B 8
7891 #define BIT_MASK_VI_QUEUE_THR_8822B 0xff
7892 #define BIT_VI_QUEUE_THR_8822B(x) \
7893 (((x) & BIT_MASK_VI_QUEUE_THR_8822B) << BIT_SHIFT_VI_QUEUE_THR_8822B)
7894 #define BIT_GET_VI_QUEUE_THR_8822B(x) \
7895 (((x) >> BIT_SHIFT_VI_QUEUE_THR_8822B) & BIT_MASK_VI_QUEUE_THR_8822B)
7897 #define BIT_SHIFT_VO_QUEUE_THR_8822B 0
7898 #define BIT_MASK_VO_QUEUE_THR_8822B 0xff
7899 #define BIT_VO_QUEUE_THR_8822B(x) \
7900 (((x) & BIT_MASK_VO_QUEUE_THR_8822B) << BIT_SHIFT_VO_QUEUE_THR_8822B)
7901 #define BIT_GET_VO_QUEUE_THR_8822B(x) \
7902 (((x) >> BIT_SHIFT_VO_QUEUE_THR_8822B) & BIT_MASK_VO_QUEUE_THR_8822B)
7904 /* 2 REG_QUEUE_INCOL_EN_8822B */
7905 #define BIT_QUEUE_INCOL_EN_8822B BIT(16)
7907 #define BIT_SHIFT_BE_TRIGGER_NUM_8822B 12
7908 #define BIT_MASK_BE_TRIGGER_NUM_8822B 0xf
7909 #define BIT_BE_TRIGGER_NUM_8822B(x) \
7910 (((x) & BIT_MASK_BE_TRIGGER_NUM_8822B) \
7911 << BIT_SHIFT_BE_TRIGGER_NUM_8822B)
7912 #define BIT_GET_BE_TRIGGER_NUM_8822B(x) \
7913 (((x) >> BIT_SHIFT_BE_TRIGGER_NUM_8822B) & \
7914 BIT_MASK_BE_TRIGGER_NUM_8822B)
7916 #define BIT_SHIFT_BK_TRIGGER_NUM_8822B 8
7917 #define BIT_MASK_BK_TRIGGER_NUM_8822B 0xf
7918 #define BIT_BK_TRIGGER_NUM_8822B(x) \
7919 (((x) & BIT_MASK_BK_TRIGGER_NUM_8822B) \
7920 << BIT_SHIFT_BK_TRIGGER_NUM_8822B)
7921 #define BIT_GET_BK_TRIGGER_NUM_8822B(x) \
7922 (((x) >> BIT_SHIFT_BK_TRIGGER_NUM_8822B) & \
7923 BIT_MASK_BK_TRIGGER_NUM_8822B)
7925 #define BIT_SHIFT_VI_TRIGGER_NUM_8822B 4
7926 #define BIT_MASK_VI_TRIGGER_NUM_8822B 0xf
7927 #define BIT_VI_TRIGGER_NUM_8822B(x) \
7928 (((x) & BIT_MASK_VI_TRIGGER_NUM_8822B) \
7929 << BIT_SHIFT_VI_TRIGGER_NUM_8822B)
7930 #define BIT_GET_VI_TRIGGER_NUM_8822B(x) \
7931 (((x) >> BIT_SHIFT_VI_TRIGGER_NUM_8822B) & \
7932 BIT_MASK_VI_TRIGGER_NUM_8822B)
7934 #define BIT_SHIFT_VO_TRIGGER_NUM_8822B 0
7935 #define BIT_MASK_VO_TRIGGER_NUM_8822B 0xf
7936 #define BIT_VO_TRIGGER_NUM_8822B(x) \
7937 (((x) & BIT_MASK_VO_TRIGGER_NUM_8822B) \
7938 << BIT_SHIFT_VO_TRIGGER_NUM_8822B)
7939 #define BIT_GET_VO_TRIGGER_NUM_8822B(x) \
7940 (((x) >> BIT_SHIFT_VO_TRIGGER_NUM_8822B) & \
7941 BIT_MASK_VO_TRIGGER_NUM_8822B)
7943 /* 2 REG_TBTT_PROHIBIT_8822B */
7945 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B 8
7946 #define BIT_MASK_TBTT_HOLD_TIME_AP_8822B 0xfff
7947 #define BIT_TBTT_HOLD_TIME_AP_8822B(x) \
7948 (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8822B) \
7949 << BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B)
7950 #define BIT_GET_TBTT_HOLD_TIME_AP_8822B(x) \
7951 (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B) & \
7952 BIT_MASK_TBTT_HOLD_TIME_AP_8822B)
7954 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B 0
7955 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8822B 0xf
7956 #define BIT_TBTT_PROHIBIT_SETUP_8822B(x) \
7957 (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8822B) \
7958 << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B)
7959 #define BIT_GET_TBTT_PROHIBIT_SETUP_8822B(x) \
7960 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B) & \
7961 BIT_MASK_TBTT_PROHIBIT_SETUP_8822B)
7963 /* 2 REG_P2PPS_STATE_8822B */
7964 #define BIT_POWER_STATE_8822B BIT(7)
7965 #define BIT_CTWINDOW_ON_8822B BIT(6)
7966 #define BIT_BEACON_AREA_ON_8822B BIT(5)
7967 #define BIT_CTWIN_EARLY_DISTX_8822B BIT(4)
7968 #define BIT_NOA1_OFF_PERIOD_8822B BIT(3)
7969 #define BIT_FORCE_DOZE1_8822B BIT(2)
7970 #define BIT_NOA0_OFF_PERIOD_8822B BIT(1)
7971 #define BIT_FORCE_DOZE0_8822B BIT(0)
7973 /* 2 REG_RD_NAV_NXT_8822B */
7975 #define BIT_SHIFT_RD_NAV_PROT_NXT_8822B 0
7976 #define BIT_MASK_RD_NAV_PROT_NXT_8822B 0xffff
7977 #define BIT_RD_NAV_PROT_NXT_8822B(x) \
7978 (((x) & BIT_MASK_RD_NAV_PROT_NXT_8822B) \
7979 << BIT_SHIFT_RD_NAV_PROT_NXT_8822B)
7980 #define BIT_GET_RD_NAV_PROT_NXT_8822B(x) \
7981 (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8822B) & \
7982 BIT_MASK_RD_NAV_PROT_NXT_8822B)
7984 /* 2 REG_NAV_PROT_LEN_8822B */
7986 #define BIT_SHIFT_NAV_PROT_LEN_8822B 0
7987 #define BIT_MASK_NAV_PROT_LEN_8822B 0xffff
7988 #define BIT_NAV_PROT_LEN_8822B(x) \
7989 (((x) & BIT_MASK_NAV_PROT_LEN_8822B) << BIT_SHIFT_NAV_PROT_LEN_8822B)
7990 #define BIT_GET_NAV_PROT_LEN_8822B(x) \
7991 (((x) >> BIT_SHIFT_NAV_PROT_LEN_8822B) & BIT_MASK_NAV_PROT_LEN_8822B)
7993 /* 2 REG_BCN_CTRL_8822B */
7994 #define BIT_DIS_RX_BSSID_FIT_8822B BIT(6)
7995 #define BIT_P0_EN_TXBCN_RPT_8822B BIT(5)
7996 #define BIT_DIS_TSF_UDT_8822B BIT(4)
7997 #define BIT_EN_BCN_FUNCTION_8822B BIT(3)
7998 #define BIT_P0_EN_RXBCN_RPT_8822B BIT(2)
7999 #define BIT_EN_P2P_CTWINDOW_8822B BIT(1)
8000 #define BIT_EN_P2P_BCNQ_AREA_8822B BIT(0)
8002 /* 2 REG_BCN_CTRL_CLINT0_8822B */
8003 #define BIT_CLI0_DIS_RX_BSSID_FIT_8822B BIT(6)
8004 #define BIT_CLI0_DIS_TSF_UDT_8822B BIT(4)
8005 #define BIT_CLI0_EN_BCN_FUNCTION_8822B BIT(3)
8006 #define BIT_CLI0_EN_RXBCN_RPT_8822B BIT(2)
8007 #define BIT_CLI0_ENP2P_CTWINDOW_8822B BIT(1)
8008 #define BIT_CLI0_ENP2P_BCNQ_AREA_8822B BIT(0)
8010 /* 2 REG_MBID_NUM_8822B */
8011 #define BIT_EN_PRE_DL_BEACON_8822B BIT(3)
8013 #define BIT_SHIFT_MBID_BCN_NUM_8822B 0
8014 #define BIT_MASK_MBID_BCN_NUM_8822B 0x7
8015 #define BIT_MBID_BCN_NUM_8822B(x) \
8016 (((x) & BIT_MASK_MBID_BCN_NUM_8822B) << BIT_SHIFT_MBID_BCN_NUM_8822B)
8017 #define BIT_GET_MBID_BCN_NUM_8822B(x) \
8018 (((x) >> BIT_SHIFT_MBID_BCN_NUM_8822B) & BIT_MASK_MBID_BCN_NUM_8822B)
8020 /* 2 REG_DUAL_TSF_RST_8822B */
8021 #define BIT_FREECNT_RST_8822B BIT(5)
8022 #define BIT_TSFTR_CLI3_RST_8822B BIT(4)
8023 #define BIT_TSFTR_CLI2_RST_8822B BIT(3)
8024 #define BIT_TSFTR_CLI1_RST_8822B BIT(2)
8025 #define BIT_TSFTR_CLI0_RST_8822B BIT(1)
8026 #define BIT_TSFTR_RST_8822B BIT(0)
8028 /* 2 REG_MBSSID_BCN_SPACE_8822B */
8030 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B 28
8031 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8822B 0x7
8032 #define BIT_BCN_TIMER_SEL_FWRD_8822B(x) \
8033 (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8822B) \
8034 << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B)
8035 #define BIT_GET_BCN_TIMER_SEL_FWRD_8822B(x) \
8036 (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B) & \
8037 BIT_MASK_BCN_TIMER_SEL_FWRD_8822B)
8039 #define BIT_SHIFT_BCN_SPACE_CLINT0_8822B 16
8040 #define BIT_MASK_BCN_SPACE_CLINT0_8822B 0xfff
8041 #define BIT_BCN_SPACE_CLINT0_8822B(x) \
8042 (((x) & BIT_MASK_BCN_SPACE_CLINT0_8822B) \
8043 << BIT_SHIFT_BCN_SPACE_CLINT0_8822B)
8044 #define BIT_GET_BCN_SPACE_CLINT0_8822B(x) \
8045 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8822B) & \
8046 BIT_MASK_BCN_SPACE_CLINT0_8822B)
8048 #define BIT_SHIFT_BCN_SPACE0_8822B 0
8049 #define BIT_MASK_BCN_SPACE0_8822B 0xffff
8050 #define BIT_BCN_SPACE0_8822B(x) \
8051 (((x) & BIT_MASK_BCN_SPACE0_8822B) << BIT_SHIFT_BCN_SPACE0_8822B)
8052 #define BIT_GET_BCN_SPACE0_8822B(x) \
8053 (((x) >> BIT_SHIFT_BCN_SPACE0_8822B) & BIT_MASK_BCN_SPACE0_8822B)
8055 /* 2 REG_DRVERLYINT_8822B */
8057 #define BIT_SHIFT_DRVERLYITV_8822B 0
8058 #define BIT_MASK_DRVERLYITV_8822B 0xff
8059 #define BIT_DRVERLYITV_8822B(x) \
8060 (((x) & BIT_MASK_DRVERLYITV_8822B) << BIT_SHIFT_DRVERLYITV_8822B)
8061 #define BIT_GET_DRVERLYITV_8822B(x) \
8062 (((x) >> BIT_SHIFT_DRVERLYITV_8822B) & BIT_MASK_DRVERLYITV_8822B)
8064 /* 2 REG_BCNDMATIM_8822B */
8066 #define BIT_SHIFT_BCNDMATIM_8822B 0
8067 #define BIT_MASK_BCNDMATIM_8822B 0xff
8068 #define BIT_BCNDMATIM_8822B(x) \
8069 (((x) & BIT_MASK_BCNDMATIM_8822B) << BIT_SHIFT_BCNDMATIM_8822B)
8070 #define BIT_GET_BCNDMATIM_8822B(x) \
8071 (((x) >> BIT_SHIFT_BCNDMATIM_8822B) & BIT_MASK_BCNDMATIM_8822B)
8073 /* 2 REG_ATIMWND_8822B */
8075 #define BIT_SHIFT_ATIMWND0_8822B 0
8076 #define BIT_MASK_ATIMWND0_8822B 0xffff
8077 #define BIT_ATIMWND0_8822B(x) \
8078 (((x) & BIT_MASK_ATIMWND0_8822B) << BIT_SHIFT_ATIMWND0_8822B)
8079 #define BIT_GET_ATIMWND0_8822B(x) \
8080 (((x) >> BIT_SHIFT_ATIMWND0_8822B) & BIT_MASK_ATIMWND0_8822B)
8082 /* 2 REG_USTIME_TSF_8822B */
8084 #define BIT_SHIFT_USTIME_TSF_V1_8822B 0
8085 #define BIT_MASK_USTIME_TSF_V1_8822B 0xff
8086 #define BIT_USTIME_TSF_V1_8822B(x) \
8087 (((x) & BIT_MASK_USTIME_TSF_V1_8822B) << BIT_SHIFT_USTIME_TSF_V1_8822B)
8088 #define BIT_GET_USTIME_TSF_V1_8822B(x) \
8089 (((x) >> BIT_SHIFT_USTIME_TSF_V1_8822B) & BIT_MASK_USTIME_TSF_V1_8822B)
8091 /* 2 REG_BCN_MAX_ERR_8822B */
8093 #define BIT_SHIFT_BCN_MAX_ERR_8822B 0
8094 #define BIT_MASK_BCN_MAX_ERR_8822B 0xff
8095 #define BIT_BCN_MAX_ERR_8822B(x) \
8096 (((x) & BIT_MASK_BCN_MAX_ERR_8822B) << BIT_SHIFT_BCN_MAX_ERR_8822B)
8097 #define BIT_GET_BCN_MAX_ERR_8822B(x) \
8098 (((x) >> BIT_SHIFT_BCN_MAX_ERR_8822B) & BIT_MASK_BCN_MAX_ERR_8822B)
8100 /* 2 REG_RXTSF_OFFSET_CCK_8822B */
8102 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8822B 0
8103 #define BIT_MASK_CCK_RXTSF_OFFSET_8822B 0xff
8104 #define BIT_CCK_RXTSF_OFFSET_8822B(x) \
8105 (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8822B) \
8106 << BIT_SHIFT_CCK_RXTSF_OFFSET_8822B)
8107 #define BIT_GET_CCK_RXTSF_OFFSET_8822B(x) \
8108 (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8822B) & \
8109 BIT_MASK_CCK_RXTSF_OFFSET_8822B)
8111 /* 2 REG_RXTSF_OFFSET_OFDM_8822B */
8113 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B 0
8114 #define BIT_MASK_OFDM_RXTSF_OFFSET_8822B 0xff
8115 #define BIT_OFDM_RXTSF_OFFSET_8822B(x) \
8116 (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8822B) \
8117 << BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B)
8118 #define BIT_GET_OFDM_RXTSF_OFFSET_8822B(x) \
8119 (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B) & \
8120 BIT_MASK_OFDM_RXTSF_OFFSET_8822B)
8122 /* 2 REG_TSFTR_8822B */
8124 #define BIT_SHIFT_TSF_TIMER_8822B 0
8125 #define BIT_MASK_TSF_TIMER_8822B 0xffffffffffffffffL
8126 #define BIT_TSF_TIMER_8822B(x) \
8127 (((x) & BIT_MASK_TSF_TIMER_8822B) << BIT_SHIFT_TSF_TIMER_8822B)
8128 #define BIT_GET_TSF_TIMER_8822B(x) \
8129 (((x) >> BIT_SHIFT_TSF_TIMER_8822B) & BIT_MASK_TSF_TIMER_8822B)
8131 /* 2 REG_FREERUN_CNT_8822B */
8133 #define BIT_SHIFT_FREERUN_CNT_8822B 0
8134 #define BIT_MASK_FREERUN_CNT_8822B 0xffffffffffffffffL
8135 #define BIT_FREERUN_CNT_8822B(x) \
8136 (((x) & BIT_MASK_FREERUN_CNT_8822B) << BIT_SHIFT_FREERUN_CNT_8822B)
8137 #define BIT_GET_FREERUN_CNT_8822B(x) \
8138 (((x) >> BIT_SHIFT_FREERUN_CNT_8822B) & BIT_MASK_FREERUN_CNT_8822B)
8140 /* 2 REG_ATIMWND1_V1_8822B */
8142 #define BIT_SHIFT_ATIMWND1_V1_8822B 0
8143 #define BIT_MASK_ATIMWND1_V1_8822B 0xff
8144 #define BIT_ATIMWND1_V1_8822B(x) \
8145 (((x) & BIT_MASK_ATIMWND1_V1_8822B) << BIT_SHIFT_ATIMWND1_V1_8822B)
8146 #define BIT_GET_ATIMWND1_V1_8822B(x) \
8147 (((x) >> BIT_SHIFT_ATIMWND1_V1_8822B) & BIT_MASK_ATIMWND1_V1_8822B)
8149 /* 2 REG_TBTT_PROHIBIT_INFRA_8822B */
8151 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B 0
8152 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8822B 0xff
8153 #define BIT_TBTT_PROHIBIT_INFRA_8822B(x) \
8154 (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8822B) \
8155 << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B)
8156 #define BIT_GET_TBTT_PROHIBIT_INFRA_8822B(x) \
8157 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B) & \
8158 BIT_MASK_TBTT_PROHIBIT_INFRA_8822B)
8160 /* 2 REG_CTWND_8822B */
8162 #define BIT_SHIFT_CTWND_8822B 0
8163 #define BIT_MASK_CTWND_8822B 0xff
8164 #define BIT_CTWND_8822B(x) \
8165 (((x) & BIT_MASK_CTWND_8822B) << BIT_SHIFT_CTWND_8822B)
8166 #define BIT_GET_CTWND_8822B(x) \
8167 (((x) >> BIT_SHIFT_CTWND_8822B) & BIT_MASK_CTWND_8822B)
8169 /* 2 REG_BCNIVLCUNT_8822B */
8171 #define BIT_SHIFT_BCNIVLCUNT_8822B 0
8172 #define BIT_MASK_BCNIVLCUNT_8822B 0x7f
8173 #define BIT_BCNIVLCUNT_8822B(x) \
8174 (((x) & BIT_MASK_BCNIVLCUNT_8822B) << BIT_SHIFT_BCNIVLCUNT_8822B)
8175 #define BIT_GET_BCNIVLCUNT_8822B(x) \
8176 (((x) >> BIT_SHIFT_BCNIVLCUNT_8822B) & BIT_MASK_BCNIVLCUNT_8822B)
8178 /* 2 REG_BCNDROPCTRL_8822B */
8179 #define BIT_BEACON_DROP_EN_8822B BIT(7)
8181 #define BIT_SHIFT_BEACON_DROP_IVL_8822B 0
8182 #define BIT_MASK_BEACON_DROP_IVL_8822B 0x7f
8183 #define BIT_BEACON_DROP_IVL_8822B(x) \
8184 (((x) & BIT_MASK_BEACON_DROP_IVL_8822B) \
8185 << BIT_SHIFT_BEACON_DROP_IVL_8822B)
8186 #define BIT_GET_BEACON_DROP_IVL_8822B(x) \
8187 (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8822B) & \
8188 BIT_MASK_BEACON_DROP_IVL_8822B)
8190 /* 2 REG_HGQ_TIMEOUT_PERIOD_8822B */
8192 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B 0
8193 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B 0xff
8194 #define BIT_HGQ_TIMEOUT_PERIOD_8822B(x) \
8195 (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B) \
8196 << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B)
8197 #define BIT_GET_HGQ_TIMEOUT_PERIOD_8822B(x) \
8198 (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B) & \
8199 BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B)
8201 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8822B */
8203 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B 0
8204 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B 0xff
8205 #define BIT_TXCMD_TIMEOUT_PERIOD_8822B(x) \
8206 (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B) \
8207 << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B)
8208 #define BIT_GET_TXCMD_TIMEOUT_PERIOD_8822B(x) \
8209 (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B) & \
8210 BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B)
8212 /* 2 REG_MISC_CTRL_8822B */
8213 #define BIT_DIS_TRX_CAL_BCN_8822B BIT(5)
8214 #define BIT_DIS_TX_CAL_TBTT_8822B BIT(4)
8215 #define BIT_EN_FREECNT_8822B BIT(3)
8216 #define BIT_BCN_AGGRESSION_8822B BIT(2)
8218 #define BIT_SHIFT_DIS_SECONDARY_CCA_8822B 0
8219 #define BIT_MASK_DIS_SECONDARY_CCA_8822B 0x3
8220 #define BIT_DIS_SECONDARY_CCA_8822B(x) \
8221 (((x) & BIT_MASK_DIS_SECONDARY_CCA_8822B) \
8222 << BIT_SHIFT_DIS_SECONDARY_CCA_8822B)
8223 #define BIT_GET_DIS_SECONDARY_CCA_8822B(x) \
8224 (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8822B) & \
8225 BIT_MASK_DIS_SECONDARY_CCA_8822B)
8227 /* 2 REG_BCN_CTRL_CLINT1_8822B */
8228 #define BIT_CLI1_DIS_RX_BSSID_FIT_8822B BIT(6)
8229 #define BIT_CLI1_DIS_TSF_UDT_8822B BIT(4)
8230 #define BIT_CLI1_EN_BCN_FUNCTION_8822B BIT(3)
8231 #define BIT_CLI1_EN_RXBCN_RPT_8822B BIT(2)
8232 #define BIT_CLI1_ENP2P_CTWINDOW_8822B BIT(1)
8233 #define BIT_CLI1_ENP2P_BCNQ_AREA_8822B BIT(0)
8235 /* 2 REG_BCN_CTRL_CLINT2_8822B */
8236 #define BIT_CLI2_DIS_RX_BSSID_FIT_8822B BIT(6)
8237 #define BIT_CLI2_DIS_TSF_UDT_8822B BIT(4)
8238 #define BIT_CLI2_EN_BCN_FUNCTION_8822B BIT(3)
8239 #define BIT_CLI2_EN_RXBCN_RPT_8822B BIT(2)
8240 #define BIT_CLI2_ENP2P_CTWINDOW_8822B BIT(1)
8241 #define BIT_CLI2_ENP2P_BCNQ_AREA_8822B BIT(0)
8243 /* 2 REG_BCN_CTRL_CLINT3_8822B */
8244 #define BIT_CLI3_DIS_RX_BSSID_FIT_8822B BIT(6)
8245 #define BIT_CLI3_DIS_TSF_UDT_8822B BIT(4)
8246 #define BIT_CLI3_EN_BCN_FUNCTION_8822B BIT(3)
8247 #define BIT_CLI3_EN_RXBCN_RPT_8822B BIT(2)
8248 #define BIT_CLI3_ENP2P_CTWINDOW_8822B BIT(1)
8249 #define BIT_CLI3_ENP2P_BCNQ_AREA_8822B BIT(0)
8251 /* 2 REG_EXTEND_CTRL_8822B */
8252 #define BIT_EN_TSFBIT32_RST_P2P2_8822B BIT(5)
8253 #define BIT_EN_TSFBIT32_RST_P2P1_8822B BIT(4)
8255 #define BIT_SHIFT_PORT_SEL_8822B 0
8256 #define BIT_MASK_PORT_SEL_8822B 0x7
8257 #define BIT_PORT_SEL_8822B(x) \
8258 (((x) & BIT_MASK_PORT_SEL_8822B) << BIT_SHIFT_PORT_SEL_8822B)
8259 #define BIT_GET_PORT_SEL_8822B(x) \
8260 (((x) >> BIT_SHIFT_PORT_SEL_8822B) & BIT_MASK_PORT_SEL_8822B)
8262 /* 2 REG_P2PPS1_SPEC_STATE_8822B */
8263 #define BIT_P2P1_SPEC_POWER_STATE_8822B BIT(7)
8264 #define BIT_P2P1_SPEC_CTWINDOW_ON_8822B BIT(6)
8265 #define BIT_P2P1_SPEC_BCN_AREA_ON_8822B BIT(5)
8266 #define BIT_P2P1_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
8267 #define BIT_P2P1_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
8268 #define BIT_P2P1_SPEC_FORCE_DOZE1_8822B BIT(2)
8269 #define BIT_P2P1_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
8270 #define BIT_P2P1_SPEC_FORCE_DOZE0_8822B BIT(0)
8272 /* 2 REG_P2PPS1_STATE_8822B */
8273 #define BIT_P2P1_POWER_STATE_8822B BIT(7)
8274 #define BIT_P2P1_CTWINDOW_ON_8822B BIT(6)
8275 #define BIT_P2P1_BEACON_AREA_ON_8822B BIT(5)
8276 #define BIT_P2P1_CTWIN_EARLY_DISTX_8822B BIT(4)
8277 #define BIT_P2P1_NOA1_OFF_PERIOD_8822B BIT(3)
8278 #define BIT_P2P1_FORCE_DOZE1_8822B BIT(2)
8279 #define BIT_P2P1_NOA0_OFF_PERIOD_8822B BIT(1)
8280 #define BIT_P2P1_FORCE_DOZE0_8822B BIT(0)
8282 /* 2 REG_P2PPS2_SPEC_STATE_8822B */
8283 #define BIT_P2P2_SPEC_POWER_STATE_8822B BIT(7)
8284 #define BIT_P2P2_SPEC_CTWINDOW_ON_8822B BIT(6)
8285 #define BIT_P2P2_SPEC_BCN_AREA_ON_8822B BIT(5)
8286 #define BIT_P2P2_SPEC_CTWIN_EARLY_DISTX_8822B BIT(4)
8287 #define BIT_P2P2_SPEC_NOA1_OFF_PERIOD_8822B BIT(3)
8288 #define BIT_P2P2_SPEC_FORCE_DOZE1_8822B BIT(2)
8289 #define BIT_P2P2_SPEC_NOA0_OFF_PERIOD_8822B BIT(1)
8290 #define BIT_P2P2_SPEC_FORCE_DOZE0_8822B BIT(0)
8292 /* 2 REG_P2PPS2_STATE_8822B */
8293 #define BIT_P2P2_POWER_STATE_8822B BIT(7)
8294 #define BIT_P2P2_CTWINDOW_ON_8822B BIT(6)
8295 #define BIT_P2P2_BEACON_AREA_ON_8822B BIT(5)
8296 #define BIT_P2P2_CTWIN_EARLY_DISTX_8822B BIT(4)
8297 #define BIT_P2P2_NOA1_OFF_PERIOD_8822B BIT(3)
8298 #define BIT_P2P2_FORCE_DOZE1_8822B BIT(2)
8299 #define BIT_P2P2_NOA0_OFF_PERIOD_8822B BIT(1)
8300 #define BIT_P2P2_FORCE_DOZE0_8822B BIT(0)
8302 /* 2 REG_PS_TIMER0_8822B */
8304 #define BIT_SHIFT_PSTIMER0_INT_8822B 5
8305 #define BIT_MASK_PSTIMER0_INT_8822B 0x7ffffff
8306 #define BIT_PSTIMER0_INT_8822B(x) \
8307 (((x) & BIT_MASK_PSTIMER0_INT_8822B) << BIT_SHIFT_PSTIMER0_INT_8822B)
8308 #define BIT_GET_PSTIMER0_INT_8822B(x) \
8309 (((x) >> BIT_SHIFT_PSTIMER0_INT_8822B) & BIT_MASK_PSTIMER0_INT_8822B)
8311 /* 2 REG_PS_TIMER1_8822B */
8313 #define BIT_SHIFT_PSTIMER1_INT_8822B 5
8314 #define BIT_MASK_PSTIMER1_INT_8822B 0x7ffffff
8315 #define BIT_PSTIMER1_INT_8822B(x) \
8316 (((x) & BIT_MASK_PSTIMER1_INT_8822B) << BIT_SHIFT_PSTIMER1_INT_8822B)
8317 #define BIT_GET_PSTIMER1_INT_8822B(x) \
8318 (((x) >> BIT_SHIFT_PSTIMER1_INT_8822B) & BIT_MASK_PSTIMER1_INT_8822B)
8320 /* 2 REG_PS_TIMER2_8822B */
8322 #define BIT_SHIFT_PSTIMER2_INT_8822B 5
8323 #define BIT_MASK_PSTIMER2_INT_8822B 0x7ffffff
8324 #define BIT_PSTIMER2_INT_8822B(x) \
8325 (((x) & BIT_MASK_PSTIMER2_INT_8822B) << BIT_SHIFT_PSTIMER2_INT_8822B)
8326 #define BIT_GET_PSTIMER2_INT_8822B(x) \
8327 (((x) >> BIT_SHIFT_PSTIMER2_INT_8822B) & BIT_MASK_PSTIMER2_INT_8822B)
8329 /* 2 REG_TBTT_CTN_AREA_8822B */
8331 #define BIT_SHIFT_TBTT_CTN_AREA_8822B 0
8332 #define BIT_MASK_TBTT_CTN_AREA_8822B 0xff
8333 #define BIT_TBTT_CTN_AREA_8822B(x) \
8334 (((x) & BIT_MASK_TBTT_CTN_AREA_8822B) << BIT_SHIFT_TBTT_CTN_AREA_8822B)
8335 #define BIT_GET_TBTT_CTN_AREA_8822B(x) \
8336 (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8822B) & BIT_MASK_TBTT_CTN_AREA_8822B)
8338 /* 2 REG_FORCE_BCN_IFS_8822B */
8340 #define BIT_SHIFT_FORCE_BCN_IFS_8822B 0
8341 #define BIT_MASK_FORCE_BCN_IFS_8822B 0xff
8342 #define BIT_FORCE_BCN_IFS_8822B(x) \
8343 (((x) & BIT_MASK_FORCE_BCN_IFS_8822B) << BIT_SHIFT_FORCE_BCN_IFS_8822B)
8344 #define BIT_GET_FORCE_BCN_IFS_8822B(x) \
8345 (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8822B) & BIT_MASK_FORCE_BCN_IFS_8822B)
8347 /* 2 REG_TXOP_MIN_8822B */
8349 #define BIT_SHIFT_TXOP_MIN_8822B 0
8350 #define BIT_MASK_TXOP_MIN_8822B 0x3fff
8351 #define BIT_TXOP_MIN_8822B(x) \
8352 (((x) & BIT_MASK_TXOP_MIN_8822B) << BIT_SHIFT_TXOP_MIN_8822B)
8353 #define BIT_GET_TXOP_MIN_8822B(x) \
8354 (((x) >> BIT_SHIFT_TXOP_MIN_8822B) & BIT_MASK_TXOP_MIN_8822B)
8356 /* 2 REG_PRE_BKF_TIME_8822B */
8358 #define BIT_SHIFT_PRE_BKF_TIME_8822B 0
8359 #define BIT_MASK_PRE_BKF_TIME_8822B 0xff
8360 #define BIT_PRE_BKF_TIME_8822B(x) \
8361 (((x) & BIT_MASK_PRE_BKF_TIME_8822B) << BIT_SHIFT_PRE_BKF_TIME_8822B)
8362 #define BIT_GET_PRE_BKF_TIME_8822B(x) \
8363 (((x) >> BIT_SHIFT_PRE_BKF_TIME_8822B) & BIT_MASK_PRE_BKF_TIME_8822B)
8365 /* 2 REG_CROSS_TXOP_CTRL_8822B */
8366 #define BIT_DTIM_BYPASS_8822B BIT(2)
8367 #define BIT_RTS_NAV_TXOP_8822B BIT(1)
8368 #define BIT_NOT_CROSS_TXOP_8822B BIT(0)
8370 /* 2 REG_ATIMWND2_8822B */
8372 #define BIT_SHIFT_ATIMWND2_8822B 0
8373 #define BIT_MASK_ATIMWND2_8822B 0xff
8374 #define BIT_ATIMWND2_8822B(x) \
8375 (((x) & BIT_MASK_ATIMWND2_8822B) << BIT_SHIFT_ATIMWND2_8822B)
8376 #define BIT_GET_ATIMWND2_8822B(x) \
8377 (((x) >> BIT_SHIFT_ATIMWND2_8822B) & BIT_MASK_ATIMWND2_8822B)
8379 /* 2 REG_ATIMWND3_8822B */
8381 #define BIT_SHIFT_ATIMWND3_8822B 0
8382 #define BIT_MASK_ATIMWND3_8822B 0xff
8383 #define BIT_ATIMWND3_8822B(x) \
8384 (((x) & BIT_MASK_ATIMWND3_8822B) << BIT_SHIFT_ATIMWND3_8822B)
8385 #define BIT_GET_ATIMWND3_8822B(x) \
8386 (((x) >> BIT_SHIFT_ATIMWND3_8822B) & BIT_MASK_ATIMWND3_8822B)
8388 /* 2 REG_ATIMWND4_8822B */
8390 #define BIT_SHIFT_ATIMWND4_8822B 0
8391 #define BIT_MASK_ATIMWND4_8822B 0xff
8392 #define BIT_ATIMWND4_8822B(x) \
8393 (((x) & BIT_MASK_ATIMWND4_8822B) << BIT_SHIFT_ATIMWND4_8822B)
8394 #define BIT_GET_ATIMWND4_8822B(x) \
8395 (((x) >> BIT_SHIFT_ATIMWND4_8822B) & BIT_MASK_ATIMWND4_8822B)
8397 /* 2 REG_ATIMWND5_8822B */
8399 #define BIT_SHIFT_ATIMWND5_8822B 0
8400 #define BIT_MASK_ATIMWND5_8822B 0xff
8401 #define BIT_ATIMWND5_8822B(x) \
8402 (((x) & BIT_MASK_ATIMWND5_8822B) << BIT_SHIFT_ATIMWND5_8822B)
8403 #define BIT_GET_ATIMWND5_8822B(x) \
8404 (((x) >> BIT_SHIFT_ATIMWND5_8822B) & BIT_MASK_ATIMWND5_8822B)
8406 /* 2 REG_ATIMWND6_8822B */
8408 #define BIT_SHIFT_ATIMWND6_8822B 0
8409 #define BIT_MASK_ATIMWND6_8822B 0xff
8410 #define BIT_ATIMWND6_8822B(x) \
8411 (((x) & BIT_MASK_ATIMWND6_8822B) << BIT_SHIFT_ATIMWND6_8822B)
8412 #define BIT_GET_ATIMWND6_8822B(x) \
8413 (((x) >> BIT_SHIFT_ATIMWND6_8822B) & BIT_MASK_ATIMWND6_8822B)
8415 /* 2 REG_ATIMWND7_8822B */
8417 #define BIT_SHIFT_ATIMWND7_8822B 0
8418 #define BIT_MASK_ATIMWND7_8822B 0xff
8419 #define BIT_ATIMWND7_8822B(x) \
8420 (((x) & BIT_MASK_ATIMWND7_8822B) << BIT_SHIFT_ATIMWND7_8822B)
8421 #define BIT_GET_ATIMWND7_8822B(x) \
8422 (((x) >> BIT_SHIFT_ATIMWND7_8822B) & BIT_MASK_ATIMWND7_8822B)
8424 /* 2 REG_ATIMUGT_8822B */
8426 #define BIT_SHIFT_ATIM_URGENT_8822B 0
8427 #define BIT_MASK_ATIM_URGENT_8822B 0xff
8428 #define BIT_ATIM_URGENT_8822B(x) \
8429 (((x) & BIT_MASK_ATIM_URGENT_8822B) << BIT_SHIFT_ATIM_URGENT_8822B)
8430 #define BIT_GET_ATIM_URGENT_8822B(x) \
8431 (((x) >> BIT_SHIFT_ATIM_URGENT_8822B) & BIT_MASK_ATIM_URGENT_8822B)
8433 /* 2 REG_HIQ_NO_LMT_EN_8822B */
8434 #define BIT_HIQ_NO_LMT_EN_VAP7_8822B BIT(7)
8435 #define BIT_HIQ_NO_LMT_EN_VAP6_8822B BIT(6)
8436 #define BIT_HIQ_NO_LMT_EN_VAP5_8822B BIT(5)
8437 #define BIT_HIQ_NO_LMT_EN_VAP4_8822B BIT(4)
8438 #define BIT_HIQ_NO_LMT_EN_VAP3_8822B BIT(3)
8439 #define BIT_HIQ_NO_LMT_EN_VAP2_8822B BIT(2)
8440 #define BIT_HIQ_NO_LMT_EN_VAP1_8822B BIT(1)
8441 #define BIT_HIQ_NO_LMT_EN_ROOT_8822B BIT(0)
8443 /* 2 REG_DTIM_COUNTER_ROOT_8822B */
8445 #define BIT_SHIFT_DTIM_COUNT_ROOT_8822B 0
8446 #define BIT_MASK_DTIM_COUNT_ROOT_8822B 0xff
8447 #define BIT_DTIM_COUNT_ROOT_8822B(x) \
8448 (((x) & BIT_MASK_DTIM_COUNT_ROOT_8822B) \
8449 << BIT_SHIFT_DTIM_COUNT_ROOT_8822B)
8450 #define BIT_GET_DTIM_COUNT_ROOT_8822B(x) \
8451 (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8822B) & \
8452 BIT_MASK_DTIM_COUNT_ROOT_8822B)
8454 /* 2 REG_DTIM_COUNTER_VAP1_8822B */
8456 #define BIT_SHIFT_DTIM_COUNT_VAP1_8822B 0
8457 #define BIT_MASK_DTIM_COUNT_VAP1_8822B 0xff
8458 #define BIT_DTIM_COUNT_VAP1_8822B(x) \
8459 (((x) & BIT_MASK_DTIM_COUNT_VAP1_8822B) \
8460 << BIT_SHIFT_DTIM_COUNT_VAP1_8822B)
8461 #define BIT_GET_DTIM_COUNT_VAP1_8822B(x) \
8462 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8822B) & \
8463 BIT_MASK_DTIM_COUNT_VAP1_8822B)
8465 /* 2 REG_DTIM_COUNTER_VAP2_8822B */
8467 #define BIT_SHIFT_DTIM_COUNT_VAP2_8822B 0
8468 #define BIT_MASK_DTIM_COUNT_VAP2_8822B 0xff
8469 #define BIT_DTIM_COUNT_VAP2_8822B(x) \
8470 (((x) & BIT_MASK_DTIM_COUNT_VAP2_8822B) \
8471 << BIT_SHIFT_DTIM_COUNT_VAP2_8822B)
8472 #define BIT_GET_DTIM_COUNT_VAP2_8822B(x) \
8473 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8822B) & \
8474 BIT_MASK_DTIM_COUNT_VAP2_8822B)
8476 /* 2 REG_DTIM_COUNTER_VAP3_8822B */
8478 #define BIT_SHIFT_DTIM_COUNT_VAP3_8822B 0
8479 #define BIT_MASK_DTIM_COUNT_VAP3_8822B 0xff
8480 #define BIT_DTIM_COUNT_VAP3_8822B(x) \
8481 (((x) & BIT_MASK_DTIM_COUNT_VAP3_8822B) \
8482 << BIT_SHIFT_DTIM_COUNT_VAP3_8822B)
8483 #define BIT_GET_DTIM_COUNT_VAP3_8822B(x) \
8484 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8822B) & \
8485 BIT_MASK_DTIM_COUNT_VAP3_8822B)
8487 /* 2 REG_DTIM_COUNTER_VAP4_8822B */
8489 #define BIT_SHIFT_DTIM_COUNT_VAP4_8822B 0
8490 #define BIT_MASK_DTIM_COUNT_VAP4_8822B 0xff
8491 #define BIT_DTIM_COUNT_VAP4_8822B(x) \
8492 (((x) & BIT_MASK_DTIM_COUNT_VAP4_8822B) \
8493 << BIT_SHIFT_DTIM_COUNT_VAP4_8822B)
8494 #define BIT_GET_DTIM_COUNT_VAP4_8822B(x) \
8495 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8822B) & \
8496 BIT_MASK_DTIM_COUNT_VAP4_8822B)
8498 /* 2 REG_DTIM_COUNTER_VAP5_8822B */
8500 #define BIT_SHIFT_DTIM_COUNT_VAP5_8822B 0
8501 #define BIT_MASK_DTIM_COUNT_VAP5_8822B 0xff
8502 #define BIT_DTIM_COUNT_VAP5_8822B(x) \
8503 (((x) & BIT_MASK_DTIM_COUNT_VAP5_8822B) \
8504 << BIT_SHIFT_DTIM_COUNT_VAP5_8822B)
8505 #define BIT_GET_DTIM_COUNT_VAP5_8822B(x) \
8506 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8822B) & \
8507 BIT_MASK_DTIM_COUNT_VAP5_8822B)
8509 /* 2 REG_DTIM_COUNTER_VAP6_8822B */
8511 #define BIT_SHIFT_DTIM_COUNT_VAP6_8822B 0
8512 #define BIT_MASK_DTIM_COUNT_VAP6_8822B 0xff
8513 #define BIT_DTIM_COUNT_VAP6_8822B(x) \
8514 (((x) & BIT_MASK_DTIM_COUNT_VAP6_8822B) \
8515 << BIT_SHIFT_DTIM_COUNT_VAP6_8822B)
8516 #define BIT_GET_DTIM_COUNT_VAP6_8822B(x) \
8517 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8822B) & \
8518 BIT_MASK_DTIM_COUNT_VAP6_8822B)
8520 /* 2 REG_DTIM_COUNTER_VAP7_8822B */
8522 #define BIT_SHIFT_DTIM_COUNT_VAP7_8822B 0
8523 #define BIT_MASK_DTIM_COUNT_VAP7_8822B 0xff
8524 #define BIT_DTIM_COUNT_VAP7_8822B(x) \
8525 (((x) & BIT_MASK_DTIM_COUNT_VAP7_8822B) \
8526 << BIT_SHIFT_DTIM_COUNT_VAP7_8822B)
8527 #define BIT_GET_DTIM_COUNT_VAP7_8822B(x) \
8528 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8822B) & \
8529 BIT_MASK_DTIM_COUNT_VAP7_8822B)
8531 /* 2 REG_DIS_ATIM_8822B */
8532 #define BIT_DIS_ATIM_VAP7_8822B BIT(7)
8533 #define BIT_DIS_ATIM_VAP6_8822B BIT(6)
8534 #define BIT_DIS_ATIM_VAP5_8822B BIT(5)
8535 #define BIT_DIS_ATIM_VAP4_8822B BIT(4)
8536 #define BIT_DIS_ATIM_VAP3_8822B BIT(3)
8537 #define BIT_DIS_ATIM_VAP2_8822B BIT(2)
8538 #define BIT_DIS_ATIM_VAP1_8822B BIT(1)
8539 #define BIT_DIS_ATIM_ROOT_8822B BIT(0)
8541 /* 2 REG_EARLY_128US_8822B */
8543 #define BIT_SHIFT_TSFT_SEL_TIMER1_8822B 3
8544 #define BIT_MASK_TSFT_SEL_TIMER1_8822B 0x7
8545 #define BIT_TSFT_SEL_TIMER1_8822B(x) \
8546 (((x) & BIT_MASK_TSFT_SEL_TIMER1_8822B) \
8547 << BIT_SHIFT_TSFT_SEL_TIMER1_8822B)
8548 #define BIT_GET_TSFT_SEL_TIMER1_8822B(x) \
8549 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8822B) & \
8550 BIT_MASK_TSFT_SEL_TIMER1_8822B)
8552 #define BIT_SHIFT_EARLY_128US_8822B 0
8553 #define BIT_MASK_EARLY_128US_8822B 0x7
8554 #define BIT_EARLY_128US_8822B(x) \
8555 (((x) & BIT_MASK_EARLY_128US_8822B) << BIT_SHIFT_EARLY_128US_8822B)
8556 #define BIT_GET_EARLY_128US_8822B(x) \
8557 (((x) >> BIT_SHIFT_EARLY_128US_8822B) & BIT_MASK_EARLY_128US_8822B)
8559 /* 2 REG_P2PPS1_CTRL_8822B */
8560 #define BIT_P2P1_CTW_ALLSTASLEEP_8822B BIT(7)
8561 #define BIT_P2P1_OFF_DISTX_EN_8822B BIT(6)
8562 #define BIT_P2P1_PWR_MGT_EN_8822B BIT(5)
8563 #define BIT_P2P1_NOA1_EN_8822B BIT(2)
8564 #define BIT_P2P1_NOA0_EN_8822B BIT(1)
8566 /* 2 REG_P2PPS2_CTRL_8822B */
8567 #define BIT_P2P2_CTW_ALLSTASLEEP_8822B BIT(7)
8568 #define BIT_P2P2_OFF_DISTX_EN_8822B BIT(6)
8569 #define BIT_P2P2_PWR_MGT_EN_8822B BIT(5)
8570 #define BIT_P2P2_NOA1_EN_8822B BIT(2)
8571 #define BIT_P2P2_NOA0_EN_8822B BIT(1)
8573 /* 2 REG_TIMER0_SRC_SEL_8822B */
8575 #define BIT_SHIFT_SYNC_CLI_SEL_8822B 4
8576 #define BIT_MASK_SYNC_CLI_SEL_8822B 0x7
8577 #define BIT_SYNC_CLI_SEL_8822B(x) \
8578 (((x) & BIT_MASK_SYNC_CLI_SEL_8822B) << BIT_SHIFT_SYNC_CLI_SEL_8822B)
8579 #define BIT_GET_SYNC_CLI_SEL_8822B(x) \
8580 (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8822B) & BIT_MASK_SYNC_CLI_SEL_8822B)
8582 #define BIT_SHIFT_TSFT_SEL_TIMER0_8822B 0
8583 #define BIT_MASK_TSFT_SEL_TIMER0_8822B 0x7
8584 #define BIT_TSFT_SEL_TIMER0_8822B(x) \
8585 (((x) & BIT_MASK_TSFT_SEL_TIMER0_8822B) \
8586 << BIT_SHIFT_TSFT_SEL_TIMER0_8822B)
8587 #define BIT_GET_TSFT_SEL_TIMER0_8822B(x) \
8588 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8822B) & \
8589 BIT_MASK_TSFT_SEL_TIMER0_8822B)
8591 /* 2 REG_NOA_UNIT_SEL_8822B */
8593 #define BIT_SHIFT_NOA_UNIT2_SEL_8822B 8
8594 #define BIT_MASK_NOA_UNIT2_SEL_8822B 0x7
8595 #define BIT_NOA_UNIT2_SEL_8822B(x) \
8596 (((x) & BIT_MASK_NOA_UNIT2_SEL_8822B) << BIT_SHIFT_NOA_UNIT2_SEL_8822B)
8597 #define BIT_GET_NOA_UNIT2_SEL_8822B(x) \
8598 (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8822B) & BIT_MASK_NOA_UNIT2_SEL_8822B)
8600 #define BIT_SHIFT_NOA_UNIT1_SEL_8822B 4
8601 #define BIT_MASK_NOA_UNIT1_SEL_8822B 0x7
8602 #define BIT_NOA_UNIT1_SEL_8822B(x) \
8603 (((x) & BIT_MASK_NOA_UNIT1_SEL_8822B) << BIT_SHIFT_NOA_UNIT1_SEL_8822B)
8604 #define BIT_GET_NOA_UNIT1_SEL_8822B(x) \
8605 (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8822B) & BIT_MASK_NOA_UNIT1_SEL_8822B)
8607 #define BIT_SHIFT_NOA_UNIT0_SEL_8822B 0
8608 #define BIT_MASK_NOA_UNIT0_SEL_8822B 0x7
8609 #define BIT_NOA_UNIT0_SEL_8822B(x) \
8610 (((x) & BIT_MASK_NOA_UNIT0_SEL_8822B) << BIT_SHIFT_NOA_UNIT0_SEL_8822B)
8611 #define BIT_GET_NOA_UNIT0_SEL_8822B(x) \
8612 (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8822B) & BIT_MASK_NOA_UNIT0_SEL_8822B)
8614 /* 2 REG_P2POFF_DIS_TXTIME_8822B */
8616 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8822B 0
8617 #define BIT_MASK_P2POFF_DIS_TXTIME_8822B 0xff
8618 #define BIT_P2POFF_DIS_TXTIME_8822B(x) \
8619 (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8822B) \
8620 << BIT_SHIFT_P2POFF_DIS_TXTIME_8822B)
8621 #define BIT_GET_P2POFF_DIS_TXTIME_8822B(x) \
8622 (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8822B) & \
8623 BIT_MASK_P2POFF_DIS_TXTIME_8822B)
8625 /* 2 REG_MBSSID_BCN_SPACE2_8822B */
8627 #define BIT_SHIFT_BCN_SPACE_CLINT2_8822B 16
8628 #define BIT_MASK_BCN_SPACE_CLINT2_8822B 0xfff
8629 #define BIT_BCN_SPACE_CLINT2_8822B(x) \
8630 (((x) & BIT_MASK_BCN_SPACE_CLINT2_8822B) \
8631 << BIT_SHIFT_BCN_SPACE_CLINT2_8822B)
8632 #define BIT_GET_BCN_SPACE_CLINT2_8822B(x) \
8633 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8822B) & \
8634 BIT_MASK_BCN_SPACE_CLINT2_8822B)
8636 #define BIT_SHIFT_BCN_SPACE_CLINT1_8822B 0
8637 #define BIT_MASK_BCN_SPACE_CLINT1_8822B 0xfff
8638 #define BIT_BCN_SPACE_CLINT1_8822B(x) \
8639 (((x) & BIT_MASK_BCN_SPACE_CLINT1_8822B) \
8640 << BIT_SHIFT_BCN_SPACE_CLINT1_8822B)
8641 #define BIT_GET_BCN_SPACE_CLINT1_8822B(x) \
8642 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8822B) & \
8643 BIT_MASK_BCN_SPACE_CLINT1_8822B)
8645 /* 2 REG_MBSSID_BCN_SPACE3_8822B */
8647 #define BIT_SHIFT_SUB_BCN_SPACE_8822B 16
8648 #define BIT_MASK_SUB_BCN_SPACE_8822B 0xff
8649 #define BIT_SUB_BCN_SPACE_8822B(x) \
8650 (((x) & BIT_MASK_SUB_BCN_SPACE_8822B) << BIT_SHIFT_SUB_BCN_SPACE_8822B)
8651 #define BIT_GET_SUB_BCN_SPACE_8822B(x) \
8652 (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8822B) & BIT_MASK_SUB_BCN_SPACE_8822B)
8654 #define BIT_SHIFT_BCN_SPACE_CLINT3_8822B 0
8655 #define BIT_MASK_BCN_SPACE_CLINT3_8822B 0xfff
8656 #define BIT_BCN_SPACE_CLINT3_8822B(x) \
8657 (((x) & BIT_MASK_BCN_SPACE_CLINT3_8822B) \
8658 << BIT_SHIFT_BCN_SPACE_CLINT3_8822B)
8659 #define BIT_GET_BCN_SPACE_CLINT3_8822B(x) \
8660 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8822B) & \
8661 BIT_MASK_BCN_SPACE_CLINT3_8822B)
8663 /* 2 REG_ACMHWCTRL_8822B */
8664 #define BIT_BEQ_ACM_STATUS_8822B BIT(7)
8665 #define BIT_VIQ_ACM_STATUS_8822B BIT(6)
8666 #define BIT_VOQ_ACM_STATUS_8822B BIT(5)
8667 #define BIT_BEQ_ACM_EN_8822B BIT(3)
8668 #define BIT_VIQ_ACM_EN_8822B BIT(2)
8669 #define BIT_VOQ_ACM_EN_8822B BIT(1)
8670 #define BIT_ACMHWEN_8822B BIT(0)
8672 /* 2 REG_ACMRSTCTRL_8822B */
8673 #define BIT_BE_ACM_RESET_USED_TIME_8822B BIT(2)
8674 #define BIT_VI_ACM_RESET_USED_TIME_8822B BIT(1)
8675 #define BIT_VO_ACM_RESET_USED_TIME_8822B BIT(0)
8677 /* 2 REG_ACMAVG_8822B */
8679 #define BIT_SHIFT_AVGPERIOD_8822B 0
8680 #define BIT_MASK_AVGPERIOD_8822B 0xffff
8681 #define BIT_AVGPERIOD_8822B(x) \
8682 (((x) & BIT_MASK_AVGPERIOD_8822B) << BIT_SHIFT_AVGPERIOD_8822B)
8683 #define BIT_GET_AVGPERIOD_8822B(x) \
8684 (((x) >> BIT_SHIFT_AVGPERIOD_8822B) & BIT_MASK_AVGPERIOD_8822B)
8686 /* 2 REG_VO_ADMTIME_8822B */
8688 #define BIT_SHIFT_VO_ADMITTED_TIME_8822B 0
8689 #define BIT_MASK_VO_ADMITTED_TIME_8822B 0xffff
8690 #define BIT_VO_ADMITTED_TIME_8822B(x) \
8691 (((x) & BIT_MASK_VO_ADMITTED_TIME_8822B) \
8692 << BIT_SHIFT_VO_ADMITTED_TIME_8822B)
8693 #define BIT_GET_VO_ADMITTED_TIME_8822B(x) \
8694 (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8822B) & \
8695 BIT_MASK_VO_ADMITTED_TIME_8822B)
8697 /* 2 REG_VI_ADMTIME_8822B */
8699 #define BIT_SHIFT_VI_ADMITTED_TIME_8822B 0
8700 #define BIT_MASK_VI_ADMITTED_TIME_8822B 0xffff
8701 #define BIT_VI_ADMITTED_TIME_8822B(x) \
8702 (((x) & BIT_MASK_VI_ADMITTED_TIME_8822B) \
8703 << BIT_SHIFT_VI_ADMITTED_TIME_8822B)
8704 #define BIT_GET_VI_ADMITTED_TIME_8822B(x) \
8705 (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8822B) & \
8706 BIT_MASK_VI_ADMITTED_TIME_8822B)
8708 /* 2 REG_BE_ADMTIME_8822B */
8710 #define BIT_SHIFT_BE_ADMITTED_TIME_8822B 0
8711 #define BIT_MASK_BE_ADMITTED_TIME_8822B 0xffff
8712 #define BIT_BE_ADMITTED_TIME_8822B(x) \
8713 (((x) & BIT_MASK_BE_ADMITTED_TIME_8822B) \
8714 << BIT_SHIFT_BE_ADMITTED_TIME_8822B)
8715 #define BIT_GET_BE_ADMITTED_TIME_8822B(x) \
8716 (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8822B) & \
8717 BIT_MASK_BE_ADMITTED_TIME_8822B)
8719 /* 2 REG_EDCA_RANDOM_GEN_8822B */
8721 #define BIT_SHIFT_RANDOM_GEN_8822B 0
8722 #define BIT_MASK_RANDOM_GEN_8822B 0xffffff
8723 #define BIT_RANDOM_GEN_8822B(x) \
8724 (((x) & BIT_MASK_RANDOM_GEN_8822B) << BIT_SHIFT_RANDOM_GEN_8822B)
8725 #define BIT_GET_RANDOM_GEN_8822B(x) \
8726 (((x) >> BIT_SHIFT_RANDOM_GEN_8822B) & BIT_MASK_RANDOM_GEN_8822B)
8728 /* 2 REG_TXCMD_NOA_SEL_8822B */
8730 #define BIT_SHIFT_NOA_SEL_8822B 4
8731 #define BIT_MASK_NOA_SEL_8822B 0x7
8732 #define BIT_NOA_SEL_8822B(x) \
8733 (((x) & BIT_MASK_NOA_SEL_8822B) << BIT_SHIFT_NOA_SEL_8822B)
8734 #define BIT_GET_NOA_SEL_8822B(x) \
8735 (((x) >> BIT_SHIFT_NOA_SEL_8822B) & BIT_MASK_NOA_SEL_8822B)
8737 #define BIT_SHIFT_TXCMD_SEG_SEL_8822B 0
8738 #define BIT_MASK_TXCMD_SEG_SEL_8822B 0xf
8739 #define BIT_TXCMD_SEG_SEL_8822B(x) \
8740 (((x) & BIT_MASK_TXCMD_SEG_SEL_8822B) << BIT_SHIFT_TXCMD_SEG_SEL_8822B)
8741 #define BIT_GET_TXCMD_SEG_SEL_8822B(x) \
8742 (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8822B) & BIT_MASK_TXCMD_SEG_SEL_8822B)
8744 /* 2 REG_NOA_PARAM_8822B */
8746 #define BIT_SHIFT_NOA_COUNT_8822B (96 & CPU_OPT_WIDTH)
8747 #define BIT_MASK_NOA_COUNT_8822B 0xff
8748 #define BIT_NOA_COUNT_8822B(x) \
8749 (((x) & BIT_MASK_NOA_COUNT_8822B) << BIT_SHIFT_NOA_COUNT_8822B)
8750 #define BIT_GET_NOA_COUNT_8822B(x) \
8751 (((x) >> BIT_SHIFT_NOA_COUNT_8822B) & BIT_MASK_NOA_COUNT_8822B)
8753 #define BIT_SHIFT_NOA_START_TIME_8822B (64 & CPU_OPT_WIDTH)
8754 #define BIT_MASK_NOA_START_TIME_8822B 0xffffffffL
8755 #define BIT_NOA_START_TIME_8822B(x) \
8756 (((x) & BIT_MASK_NOA_START_TIME_8822B) \
8757 << BIT_SHIFT_NOA_START_TIME_8822B)
8758 #define BIT_GET_NOA_START_TIME_8822B(x) \
8759 (((x) >> BIT_SHIFT_NOA_START_TIME_8822B) & \
8760 BIT_MASK_NOA_START_TIME_8822B)
8762 #define BIT_SHIFT_NOA_INTERVAL_8822B (32 & CPU_OPT_WIDTH)
8763 #define BIT_MASK_NOA_INTERVAL_8822B 0xffffffffL
8764 #define BIT_NOA_INTERVAL_8822B(x) \
8765 (((x) & BIT_MASK_NOA_INTERVAL_8822B) << BIT_SHIFT_NOA_INTERVAL_8822B)
8766 #define BIT_GET_NOA_INTERVAL_8822B(x) \
8767 (((x) >> BIT_SHIFT_NOA_INTERVAL_8822B) & BIT_MASK_NOA_INTERVAL_8822B)
8769 #define BIT_SHIFT_NOA_DURATION_8822B 0
8770 #define BIT_MASK_NOA_DURATION_8822B 0xffffffffL
8771 #define BIT_NOA_DURATION_8822B(x) \
8772 (((x) & BIT_MASK_NOA_DURATION_8822B) << BIT_SHIFT_NOA_DURATION_8822B)
8773 #define BIT_GET_NOA_DURATION_8822B(x) \
8774 (((x) >> BIT_SHIFT_NOA_DURATION_8822B) & BIT_MASK_NOA_DURATION_8822B)
8776 /* 2 REG_P2P_RST_8822B */
8777 #define BIT_P2P2_PWR_RST1_8822B BIT(5)
8778 #define BIT_P2P2_PWR_RST0_8822B BIT(4)
8779 #define BIT_P2P1_PWR_RST1_8822B BIT(3)
8780 #define BIT_P2P1_PWR_RST0_8822B BIT(2)
8781 #define BIT_P2P_PWR_RST1_V1_8822B BIT(1)
8782 #define BIT_P2P_PWR_RST0_V1_8822B BIT(0)
8784 /* 2 REG_SCHEDULER_RST_8822B */
8785 #define BIT_SYNC_CLI_8822B BIT(1)
8786 #define BIT_SCHEDULER_RST_V1_8822B BIT(0)
8788 /* 2 REG_SCH_TXCMD_8822B */
8790 #define BIT_SHIFT_SCH_TXCMD_8822B 0
8791 #define BIT_MASK_SCH_TXCMD_8822B 0xffffffffL
8792 #define BIT_SCH_TXCMD_8822B(x) \
8793 (((x) & BIT_MASK_SCH_TXCMD_8822B) << BIT_SHIFT_SCH_TXCMD_8822B)
8794 #define BIT_GET_SCH_TXCMD_8822B(x) \
8795 (((x) >> BIT_SHIFT_SCH_TXCMD_8822B) & BIT_MASK_SCH_TXCMD_8822B)
8797 /* 2 REG_PAGE5_DUMMY_8822B */
8799 /* 2 REG_CPUMGQ_TX_TIMER_8822B */
8801 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B 0
8802 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B 0xffffffffL
8803 #define BIT_CPUMGQ_TX_TIMER_V1_8822B(x) \
8804 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B) \
8805 << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B)
8806 #define BIT_GET_CPUMGQ_TX_TIMER_V1_8822B(x) \
8807 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B) & \
8808 BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B)
8810 /* 2 REG_PS_TIMER_A_8822B */
8812 #define BIT_SHIFT_PS_TIMER_A_V1_8822B 0
8813 #define BIT_MASK_PS_TIMER_A_V1_8822B 0xffffffffL
8814 #define BIT_PS_TIMER_A_V1_8822B(x) \
8815 (((x) & BIT_MASK_PS_TIMER_A_V1_8822B) << BIT_SHIFT_PS_TIMER_A_V1_8822B)
8816 #define BIT_GET_PS_TIMER_A_V1_8822B(x) \
8817 (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8822B) & BIT_MASK_PS_TIMER_A_V1_8822B)
8819 /* 2 REG_PS_TIMER_B_8822B */
8821 #define BIT_SHIFT_PS_TIMER_B_V1_8822B 0
8822 #define BIT_MASK_PS_TIMER_B_V1_8822B 0xffffffffL
8823 #define BIT_PS_TIMER_B_V1_8822B(x) \
8824 (((x) & BIT_MASK_PS_TIMER_B_V1_8822B) << BIT_SHIFT_PS_TIMER_B_V1_8822B)
8825 #define BIT_GET_PS_TIMER_B_V1_8822B(x) \
8826 (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8822B) & BIT_MASK_PS_TIMER_B_V1_8822B)
8828 /* 2 REG_PS_TIMER_C_8822B */
8830 #define BIT_SHIFT_PS_TIMER_C_V1_8822B 0
8831 #define BIT_MASK_PS_TIMER_C_V1_8822B 0xffffffffL
8832 #define BIT_PS_TIMER_C_V1_8822B(x) \
8833 (((x) & BIT_MASK_PS_TIMER_C_V1_8822B) << BIT_SHIFT_PS_TIMER_C_V1_8822B)
8834 #define BIT_GET_PS_TIMER_C_V1_8822B(x) \
8835 (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8822B) & BIT_MASK_PS_TIMER_C_V1_8822B)
8837 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8822B */
8838 #define BIT_CPUMGQ_TIMER_EN_8822B BIT(31)
8839 #define BIT_CPUMGQ_TX_EN_8822B BIT(28)
8841 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B 24
8842 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B 0x7
8843 #define BIT_CPUMGQ_TIMER_TSF_SEL_8822B(x) \
8844 (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B) \
8845 << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B)
8846 #define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8822B(x) \
8847 (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B) & \
8848 BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B)
8850 #define BIT_PS_TIMER_C_EN_8822B BIT(23)
8852 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B 16
8853 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8822B 0x7
8854 #define BIT_PS_TIMER_C_TSF_SEL_8822B(x) \
8855 (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8822B) \
8856 << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B)
8857 #define BIT_GET_PS_TIMER_C_TSF_SEL_8822B(x) \
8858 (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B) & \
8859 BIT_MASK_PS_TIMER_C_TSF_SEL_8822B)
8861 #define BIT_PS_TIMER_B_EN_8822B BIT(15)
8863 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B 8
8864 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8822B 0x7
8865 #define BIT_PS_TIMER_B_TSF_SEL_8822B(x) \
8866 (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8822B) \
8867 << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B)
8868 #define BIT_GET_PS_TIMER_B_TSF_SEL_8822B(x) \
8869 (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B) & \
8870 BIT_MASK_PS_TIMER_B_TSF_SEL_8822B)
8872 #define BIT_PS_TIMER_A_EN_8822B BIT(7)
8874 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B 0
8875 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8822B 0x7
8876 #define BIT_PS_TIMER_A_TSF_SEL_8822B(x) \
8877 (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8822B) \
8878 << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B)
8879 #define BIT_GET_PS_TIMER_A_TSF_SEL_8822B(x) \
8880 (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B) & \
8881 BIT_MASK_PS_TIMER_A_TSF_SEL_8822B)
8883 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8822B */
8885 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B 0
8886 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B 0xff
8887 #define BIT_CPUMGQ_TX_TIMER_EARLY_8822B(x) \
8888 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B) \
8889 << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B)
8890 #define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8822B(x) \
8891 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B) & \
8892 BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B)
8894 /* 2 REG_PS_TIMER_A_EARLY_8822B */
8896 #define BIT_SHIFT_PS_TIMER_A_EARLY_8822B 0
8897 #define BIT_MASK_PS_TIMER_A_EARLY_8822B 0xff
8898 #define BIT_PS_TIMER_A_EARLY_8822B(x) \
8899 (((x) & BIT_MASK_PS_TIMER_A_EARLY_8822B) \
8900 << BIT_SHIFT_PS_TIMER_A_EARLY_8822B)
8901 #define BIT_GET_PS_TIMER_A_EARLY_8822B(x) \
8902 (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8822B) & \
8903 BIT_MASK_PS_TIMER_A_EARLY_8822B)
8905 /* 2 REG_PS_TIMER_B_EARLY_8822B */
8907 #define BIT_SHIFT_PS_TIMER_B_EARLY_8822B 0
8908 #define BIT_MASK_PS_TIMER_B_EARLY_8822B 0xff
8909 #define BIT_PS_TIMER_B_EARLY_8822B(x) \
8910 (((x) & BIT_MASK_PS_TIMER_B_EARLY_8822B) \
8911 << BIT_SHIFT_PS_TIMER_B_EARLY_8822B)
8912 #define BIT_GET_PS_TIMER_B_EARLY_8822B(x) \
8913 (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8822B) & \
8914 BIT_MASK_PS_TIMER_B_EARLY_8822B)
8916 /* 2 REG_PS_TIMER_C_EARLY_8822B */
8918 #define BIT_SHIFT_PS_TIMER_C_EARLY_8822B 0
8919 #define BIT_MASK_PS_TIMER_C_EARLY_8822B 0xff
8920 #define BIT_PS_TIMER_C_EARLY_8822B(x) \
8921 (((x) & BIT_MASK_PS_TIMER_C_EARLY_8822B) \
8922 << BIT_SHIFT_PS_TIMER_C_EARLY_8822B)
8923 #define BIT_GET_PS_TIMER_C_EARLY_8822B(x) \
8924 (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8822B) & \
8925 BIT_MASK_PS_TIMER_C_EARLY_8822B)
8927 /* 2 REG_NOT_VALID_8822B */
8929 /* 2 REG_BWOPMODE_8822B (BW OPERATION MODE REGISTER) */
8931 /* 2 REG_WMAC_FWPKT_CR_8822B */
8932 #define BIT_FWEN_8822B BIT(7)
8933 #define BIT_PHYSTS_PKT_CTRL_8822B BIT(6)
8934 #define BIT_APPHDR_MIDSRCH_FAIL_8822B BIT(4)
8935 #define BIT_FWPARSING_EN_8822B BIT(3)
8937 #define BIT_SHIFT_APPEND_MHDR_LEN_8822B 0
8938 #define BIT_MASK_APPEND_MHDR_LEN_8822B 0x7
8939 #define BIT_APPEND_MHDR_LEN_8822B(x) \
8940 (((x) & BIT_MASK_APPEND_MHDR_LEN_8822B) \
8941 << BIT_SHIFT_APPEND_MHDR_LEN_8822B)
8942 #define BIT_GET_APPEND_MHDR_LEN_8822B(x) \
8943 (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8822B) & \
8944 BIT_MASK_APPEND_MHDR_LEN_8822B)
8946 /* 2 REG_WMAC_CR_8822B (WMAC CR AND APSD CONTROL REGISTER) */
8947 #define BIT_IC_MACPHY_M_8822B BIT(0)
8949 /* 2 REG_TCR_8822B (TRANSMISSION CONFIGURATION REGISTER) */
8950 #define BIT_WMAC_EN_RTS_ADDR_8822B BIT(31)
8951 #define BIT_WMAC_DISABLE_CCK_8822B BIT(30)
8952 #define BIT_WMAC_RAW_LEN_8822B BIT(29)
8953 #define BIT_WMAC_NOTX_IN_RXNDP_8822B BIT(28)
8954 #define BIT_WMAC_EN_EOF_8822B BIT(27)
8955 #define BIT_WMAC_BF_SEL_8822B BIT(26)
8956 #define BIT_WMAC_ANTMODE_SEL_8822B BIT(25)
8957 #define BIT_WMAC_TCRPWRMGT_HWCTL_8822B BIT(24)
8958 #define BIT_WMAC_SMOOTH_VAL_8822B BIT(23)
8959 #define BIT_FETCH_MPDU_AFTER_WSEC_RDY_8822B BIT(20)
8960 #define BIT_WMAC_TCR_EN_20MST_8822B BIT(19)
8961 #define BIT_WMAC_DIS_SIGTA_8822B BIT(18)
8962 #define BIT_WMAC_DIS_A2B0_8822B BIT(17)
8963 #define BIT_WMAC_MSK_SIGBCRC_8822B BIT(16)
8964 #define BIT_WMAC_TCR_ERRSTEN_3_8822B BIT(15)
8965 #define BIT_WMAC_TCR_ERRSTEN_2_8822B BIT(14)
8966 #define BIT_WMAC_TCR_ERRSTEN_1_8822B BIT(13)
8967 #define BIT_WMAC_TCR_ERRSTEN_0_8822B BIT(12)
8968 #define BIT_WMAC_TCR_TXSK_PERPKT_8822B BIT(11)
8969 #define BIT_ICV_8822B BIT(10)
8970 #define BIT_CFEND_FORMAT_8822B BIT(9)
8971 #define BIT_CRC_8822B BIT(8)
8972 #define BIT_PWRBIT_OW_EN_8822B BIT(7)
8973 #define BIT_PWR_ST_8822B BIT(6)
8974 #define BIT_WMAC_TCR_UPD_TIMIE_8822B BIT(5)
8975 #define BIT_WMAC_TCR_UPD_HGQMD_8822B BIT(4)
8976 #define BIT_VHTSIGA1_TXPS_8822B BIT(3)
8977 #define BIT_PAD_SEL_8822B BIT(2)
8978 #define BIT_DIS_GCLK_8822B BIT(1)
8980 /* 2 REG_RCR_8822B (RECEIVE CONFIGURATION REGISTER) */
8981 #define BIT_APP_FCS_8822B BIT(31)
8982 #define BIT_APP_MIC_8822B BIT(30)
8983 #define BIT_APP_ICV_8822B BIT(29)
8984 #define BIT_APP_PHYSTS_8822B BIT(28)
8985 #define BIT_APP_BASSN_8822B BIT(27)
8986 #define BIT_VHT_DACK_8822B BIT(26)
8987 #define BIT_TCPOFLD_EN_8822B BIT(25)
8988 #define BIT_ENMBID_8822B BIT(24)
8989 #define BIT_LSIGEN_8822B BIT(23)
8990 #define BIT_MFBEN_8822B BIT(22)
8991 #define BIT_DISCHKPPDLLEN_8822B BIT(21)
8992 #define BIT_PKTCTL_DLEN_8822B BIT(20)
8993 #define BIT_TIM_PARSER_EN_8822B BIT(18)
8994 #define BIT_BC_MD_EN_8822B BIT(17)
8995 #define BIT_UC_MD_EN_8822B BIT(16)
8996 #define BIT_RXSK_PERPKT_8822B BIT(15)
8997 #define BIT_HTC_LOC_CTRL_8822B BIT(14)
8998 #define BIT_RPFM_CAM_ENABLE_8822B BIT(12)
8999 #define BIT_TA_BCN_8822B BIT(11)
9000 #define BIT_DISDECMYPKT_8822B BIT(10)
9001 #define BIT_AICV_8822B BIT(9)
9002 #define BIT_ACRC32_8822B BIT(8)
9003 #define BIT_CBSSID_BCN_8822B BIT(7)
9004 #define BIT_CBSSID_DATA_8822B BIT(6)
9005 #define BIT_APWRMGT_8822B BIT(5)
9006 #define BIT_ADD3_8822B BIT(4)
9007 #define BIT_AB_8822B BIT(3)
9008 #define BIT_AM_8822B BIT(2)
9009 #define BIT_APM_8822B BIT(1)
9010 #define BIT_AAP_8822B BIT(0)
9012 /* 2 REG_RX_DRVINFO_SZ_8822B (RX DRIVER INFO SIZE REGISTER) */
9013 #define BIT_PHYSTS_PER_PKT_MODE_8822B BIT(7)
9015 #define BIT_SHIFT_DRVINFO_SZ_V1_8822B 0
9016 #define BIT_MASK_DRVINFO_SZ_V1_8822B 0xf
9017 #define BIT_DRVINFO_SZ_V1_8822B(x) \
9018 (((x) & BIT_MASK_DRVINFO_SZ_V1_8822B) << BIT_SHIFT_DRVINFO_SZ_V1_8822B)
9019 #define BIT_GET_DRVINFO_SZ_V1_8822B(x) \
9020 (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8822B) & BIT_MASK_DRVINFO_SZ_V1_8822B)
9022 /* 2 REG_RX_DLK_TIME_8822B (RX DEADLOCK TIME REGISTER) */
9024 #define BIT_SHIFT_RX_DLK_TIME_8822B 0
9025 #define BIT_MASK_RX_DLK_TIME_8822B 0xff
9026 #define BIT_RX_DLK_TIME_8822B(x) \
9027 (((x) & BIT_MASK_RX_DLK_TIME_8822B) << BIT_SHIFT_RX_DLK_TIME_8822B)
9028 #define BIT_GET_RX_DLK_TIME_8822B(x) \
9029 (((x) >> BIT_SHIFT_RX_DLK_TIME_8822B) & BIT_MASK_RX_DLK_TIME_8822B)
9031 /* 2 REG_RX_PKT_LIMIT_8822B (RX PACKET LENGTH LIMIT REGISTER) */
9033 #define BIT_SHIFT_RXPKTLMT_8822B 0
9034 #define BIT_MASK_RXPKTLMT_8822B 0x3f
9035 #define BIT_RXPKTLMT_8822B(x) \
9036 (((x) & BIT_MASK_RXPKTLMT_8822B) << BIT_SHIFT_RXPKTLMT_8822B)
9037 #define BIT_GET_RXPKTLMT_8822B(x) \
9038 (((x) >> BIT_SHIFT_RXPKTLMT_8822B) & BIT_MASK_RXPKTLMT_8822B)
9040 /* 2 REG_MACID_8822B (MAC ID REGISTER) */
9042 #define BIT_SHIFT_MACID_8822B 0
9043 #define BIT_MASK_MACID_8822B 0xffffffffffffL
9044 #define BIT_MACID_8822B(x) \
9045 (((x) & BIT_MASK_MACID_8822B) << BIT_SHIFT_MACID_8822B)
9046 #define BIT_GET_MACID_8822B(x) \
9047 (((x) >> BIT_SHIFT_MACID_8822B) & BIT_MASK_MACID_8822B)
9049 /* 2 REG_BSSID_8822B (BSSID REGISTER) */
9051 #define BIT_SHIFT_BSSID_8822B 0
9052 #define BIT_MASK_BSSID_8822B 0xffffffffffffL
9053 #define BIT_BSSID_8822B(x) \
9054 (((x) & BIT_MASK_BSSID_8822B) << BIT_SHIFT_BSSID_8822B)
9055 #define BIT_GET_BSSID_8822B(x) \
9056 (((x) >> BIT_SHIFT_BSSID_8822B) & BIT_MASK_BSSID_8822B)
9058 /* 2 REG_MAR_8822B (MULTICAST ADDRESS REGISTER) */
9060 #define BIT_SHIFT_MAR_8822B 0
9061 #define BIT_MASK_MAR_8822B 0xffffffffffffffffL
9062 #define BIT_MAR_8822B(x) (((x) & BIT_MASK_MAR_8822B) << BIT_SHIFT_MAR_8822B)
9063 #define BIT_GET_MAR_8822B(x) (((x) >> BIT_SHIFT_MAR_8822B) & BIT_MASK_MAR_8822B)
9065 /* 2 REG_MBIDCAMCFG_1_8822B (MBSSID CAM CONFIGURATION REGISTER) */
9067 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8822B 0
9068 #define BIT_MASK_MBIDCAM_RWDATA_L_8822B 0xffffffffL
9069 #define BIT_MBIDCAM_RWDATA_L_8822B(x) \
9070 (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8822B) \
9071 << BIT_SHIFT_MBIDCAM_RWDATA_L_8822B)
9072 #define BIT_GET_MBIDCAM_RWDATA_L_8822B(x) \
9073 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8822B) & \
9074 BIT_MASK_MBIDCAM_RWDATA_L_8822B)
9076 /* 2 REG_MBIDCAMCFG_2_8822B (MBSSID CAM CONFIGURATION REGISTER) */
9077 #define BIT_MBIDCAM_POLL_8822B BIT(31)
9078 #define BIT_MBIDCAM_WT_EN_8822B BIT(30)
9080 #define BIT_SHIFT_MBIDCAM_ADDR_8822B 24
9081 #define BIT_MASK_MBIDCAM_ADDR_8822B 0x1f
9082 #define BIT_MBIDCAM_ADDR_8822B(x) \
9083 (((x) & BIT_MASK_MBIDCAM_ADDR_8822B) << BIT_SHIFT_MBIDCAM_ADDR_8822B)
9084 #define BIT_GET_MBIDCAM_ADDR_8822B(x) \
9085 (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8822B) & BIT_MASK_MBIDCAM_ADDR_8822B)
9087 #define BIT_MBIDCAM_VALID_8822B BIT(23)
9088 #define BIT_LSIC_TXOP_EN_8822B BIT(17)
9089 #define BIT_CTS_EN_8822B BIT(16)
9091 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8822B 0
9092 #define BIT_MASK_MBIDCAM_RWDATA_H_8822B 0xffff
9093 #define BIT_MBIDCAM_RWDATA_H_8822B(x) \
9094 (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8822B) \
9095 << BIT_SHIFT_MBIDCAM_RWDATA_H_8822B)
9096 #define BIT_GET_MBIDCAM_RWDATA_H_8822B(x) \
9097 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8822B) & \
9098 BIT_MASK_MBIDCAM_RWDATA_H_8822B)
9100 /* 2 REG_ZLD_NUM_8822B */
9102 #define BIT_SHIFT_ZLD_NUM_8822B 0
9103 #define BIT_MASK_ZLD_NUM_8822B 0xff
9104 #define BIT_ZLD_NUM_8822B(x) \
9105 (((x) & BIT_MASK_ZLD_NUM_8822B) << BIT_SHIFT_ZLD_NUM_8822B)
9106 #define BIT_GET_ZLD_NUM_8822B(x) \
9107 (((x) >> BIT_SHIFT_ZLD_NUM_8822B) & BIT_MASK_ZLD_NUM_8822B)
9109 /* 2 REG_UDF_THSD_8822B */
9111 #define BIT_SHIFT_UDF_THSD_8822B 0
9112 #define BIT_MASK_UDF_THSD_8822B 0xff
9113 #define BIT_UDF_THSD_8822B(x) \
9114 (((x) & BIT_MASK_UDF_THSD_8822B) << BIT_SHIFT_UDF_THSD_8822B)
9115 #define BIT_GET_UDF_THSD_8822B(x) \
9116 (((x) >> BIT_SHIFT_UDF_THSD_8822B) & BIT_MASK_UDF_THSD_8822B)
9118 /* 2 REG_WMAC_TCR_TSFT_OFS_8822B */
9120 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B 0
9121 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8822B 0xffff
9122 #define BIT_WMAC_TCR_TSFT_OFS_8822B(x) \
9123 (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8822B) \
9124 << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B)
9125 #define BIT_GET_WMAC_TCR_TSFT_OFS_8822B(x) \
9126 (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B) & \
9127 BIT_MASK_WMAC_TCR_TSFT_OFS_8822B)
9129 /* 2 REG_MCU_TEST_2_V1_8822B */
9131 #define BIT_SHIFT_MCU_RSVD_2_V1_8822B 0
9132 #define BIT_MASK_MCU_RSVD_2_V1_8822B 0xffff
9133 #define BIT_MCU_RSVD_2_V1_8822B(x) \
9134 (((x) & BIT_MASK_MCU_RSVD_2_V1_8822B) << BIT_SHIFT_MCU_RSVD_2_V1_8822B)
9135 #define BIT_GET_MCU_RSVD_2_V1_8822B(x) \
9136 (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8822B) & BIT_MASK_MCU_RSVD_2_V1_8822B)
9138 /* 2 REG_WMAC_TXTIMEOUT_8822B */
9140 #define BIT_SHIFT_WMAC_TXTIMEOUT_8822B 0
9141 #define BIT_MASK_WMAC_TXTIMEOUT_8822B 0xff
9142 #define BIT_WMAC_TXTIMEOUT_8822B(x) \
9143 (((x) & BIT_MASK_WMAC_TXTIMEOUT_8822B) \
9144 << BIT_SHIFT_WMAC_TXTIMEOUT_8822B)
9145 #define BIT_GET_WMAC_TXTIMEOUT_8822B(x) \
9146 (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8822B) & \
9147 BIT_MASK_WMAC_TXTIMEOUT_8822B)
9149 /* 2 REG_STMP_THSD_8822B */
9151 #define BIT_SHIFT_STMP_THSD_8822B 0
9152 #define BIT_MASK_STMP_THSD_8822B 0xff
9153 #define BIT_STMP_THSD_8822B(x) \
9154 (((x) & BIT_MASK_STMP_THSD_8822B) << BIT_SHIFT_STMP_THSD_8822B)
9155 #define BIT_GET_STMP_THSD_8822B(x) \
9156 (((x) >> BIT_SHIFT_STMP_THSD_8822B) & BIT_MASK_STMP_THSD_8822B)
9158 /* 2 REG_MAC_SPEC_SIFS_8822B (SPECIFICATION SIFS REGISTER) */
9160 #define BIT_SHIFT_SPEC_SIFS_OFDM_8822B 8
9161 #define BIT_MASK_SPEC_SIFS_OFDM_8822B 0xff
9162 #define BIT_SPEC_SIFS_OFDM_8822B(x) \
9163 (((x) & BIT_MASK_SPEC_SIFS_OFDM_8822B) \
9164 << BIT_SHIFT_SPEC_SIFS_OFDM_8822B)
9165 #define BIT_GET_SPEC_SIFS_OFDM_8822B(x) \
9166 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8822B) & \
9167 BIT_MASK_SPEC_SIFS_OFDM_8822B)
9169 #define BIT_SHIFT_SPEC_SIFS_CCK_8822B 0
9170 #define BIT_MASK_SPEC_SIFS_CCK_8822B 0xff
9171 #define BIT_SPEC_SIFS_CCK_8822B(x) \
9172 (((x) & BIT_MASK_SPEC_SIFS_CCK_8822B) << BIT_SHIFT_SPEC_SIFS_CCK_8822B)
9173 #define BIT_GET_SPEC_SIFS_CCK_8822B(x) \
9174 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8822B) & BIT_MASK_SPEC_SIFS_CCK_8822B)
9176 /* 2 REG_USTIME_EDCA_8822B (US TIME TUNING FOR EDCA REGISTER) */
9178 #define BIT_SHIFT_USTIME_EDCA_V1_8822B 0
9179 #define BIT_MASK_USTIME_EDCA_V1_8822B 0x1ff
9180 #define BIT_USTIME_EDCA_V1_8822B(x) \
9181 (((x) & BIT_MASK_USTIME_EDCA_V1_8822B) \
9182 << BIT_SHIFT_USTIME_EDCA_V1_8822B)
9183 #define BIT_GET_USTIME_EDCA_V1_8822B(x) \
9184 (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8822B) & \
9185 BIT_MASK_USTIME_EDCA_V1_8822B)
9187 /* 2 REG_RESP_SIFS_OFDM_8822B (RESPONSE SIFS FOR OFDM REGISTER) */
9189 #define BIT_SHIFT_SIFS_R2T_OFDM_8822B 8
9190 #define BIT_MASK_SIFS_R2T_OFDM_8822B 0xff
9191 #define BIT_SIFS_R2T_OFDM_8822B(x) \
9192 (((x) & BIT_MASK_SIFS_R2T_OFDM_8822B) << BIT_SHIFT_SIFS_R2T_OFDM_8822B)
9193 #define BIT_GET_SIFS_R2T_OFDM_8822B(x) \
9194 (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8822B) & BIT_MASK_SIFS_R2T_OFDM_8822B)
9196 #define BIT_SHIFT_SIFS_T2T_OFDM_8822B 0
9197 #define BIT_MASK_SIFS_T2T_OFDM_8822B 0xff
9198 #define BIT_SIFS_T2T_OFDM_8822B(x) \
9199 (((x) & BIT_MASK_SIFS_T2T_OFDM_8822B) << BIT_SHIFT_SIFS_T2T_OFDM_8822B)
9200 #define BIT_GET_SIFS_T2T_OFDM_8822B(x) \
9201 (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8822B) & BIT_MASK_SIFS_T2T_OFDM_8822B)
9203 /* 2 REG_RESP_SIFS_CCK_8822B (RESPONSE SIFS FOR CCK REGISTER) */
9205 #define BIT_SHIFT_SIFS_R2T_CCK_8822B 8
9206 #define BIT_MASK_SIFS_R2T_CCK_8822B 0xff
9207 #define BIT_SIFS_R2T_CCK_8822B(x) \
9208 (((x) & BIT_MASK_SIFS_R2T_CCK_8822B) << BIT_SHIFT_SIFS_R2T_CCK_8822B)
9209 #define BIT_GET_SIFS_R2T_CCK_8822B(x) \
9210 (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8822B) & BIT_MASK_SIFS_R2T_CCK_8822B)
9212 #define BIT_SHIFT_SIFS_T2T_CCK_8822B 0
9213 #define BIT_MASK_SIFS_T2T_CCK_8822B 0xff
9214 #define BIT_SIFS_T2T_CCK_8822B(x) \
9215 (((x) & BIT_MASK_SIFS_T2T_CCK_8822B) << BIT_SHIFT_SIFS_T2T_CCK_8822B)
9216 #define BIT_GET_SIFS_T2T_CCK_8822B(x) \
9217 (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8822B) & BIT_MASK_SIFS_T2T_CCK_8822B)
9219 /* 2 REG_EIFS_8822B (EIFS REGISTER) */
9221 #define BIT_SHIFT_EIFS_8822B 0
9222 #define BIT_MASK_EIFS_8822B 0xffff
9223 #define BIT_EIFS_8822B(x) (((x) & BIT_MASK_EIFS_8822B) << BIT_SHIFT_EIFS_8822B)
9224 #define BIT_GET_EIFS_8822B(x) \
9225 (((x) >> BIT_SHIFT_EIFS_8822B) & BIT_MASK_EIFS_8822B)
9227 /* 2 REG_CTS2TO_8822B (CTS2 TIMEOUT REGISTER) */
9229 #define BIT_SHIFT_CTS2TO_8822B 0
9230 #define BIT_MASK_CTS2TO_8822B 0xff
9231 #define BIT_CTS2TO_8822B(x) \
9232 (((x) & BIT_MASK_CTS2TO_8822B) << BIT_SHIFT_CTS2TO_8822B)
9233 #define BIT_GET_CTS2TO_8822B(x) \
9234 (((x) >> BIT_SHIFT_CTS2TO_8822B) & BIT_MASK_CTS2TO_8822B)
9236 /* 2 REG_ACKTO_8822B (ACK TIMEOUT REGISTER) */
9238 #define BIT_SHIFT_ACKTO_8822B 0
9239 #define BIT_MASK_ACKTO_8822B 0xff
9240 #define BIT_ACKTO_8822B(x) \
9241 (((x) & BIT_MASK_ACKTO_8822B) << BIT_SHIFT_ACKTO_8822B)
9242 #define BIT_GET_ACKTO_8822B(x) \
9243 (((x) >> BIT_SHIFT_ACKTO_8822B) & BIT_MASK_ACKTO_8822B)
9245 /* 2 REG_NAV_CTRL_8822B (NAV CONTROL REGISTER) */
9247 #define BIT_SHIFT_NAV_UPPER_8822B 16
9248 #define BIT_MASK_NAV_UPPER_8822B 0xff
9249 #define BIT_NAV_UPPER_8822B(x) \
9250 (((x) & BIT_MASK_NAV_UPPER_8822B) << BIT_SHIFT_NAV_UPPER_8822B)
9251 #define BIT_GET_NAV_UPPER_8822B(x) \
9252 (((x) >> BIT_SHIFT_NAV_UPPER_8822B) & BIT_MASK_NAV_UPPER_8822B)
9254 #define BIT_SHIFT_RXMYRTS_NAV_8822B 8
9255 #define BIT_MASK_RXMYRTS_NAV_8822B 0xf
9256 #define BIT_RXMYRTS_NAV_8822B(x) \
9257 (((x) & BIT_MASK_RXMYRTS_NAV_8822B) << BIT_SHIFT_RXMYRTS_NAV_8822B)
9258 #define BIT_GET_RXMYRTS_NAV_8822B(x) \
9259 (((x) >> BIT_SHIFT_RXMYRTS_NAV_8822B) & BIT_MASK_RXMYRTS_NAV_8822B)
9261 #define BIT_SHIFT_RTSRST_8822B 0
9262 #define BIT_MASK_RTSRST_8822B 0xff
9263 #define BIT_RTSRST_8822B(x) \
9264 (((x) & BIT_MASK_RTSRST_8822B) << BIT_SHIFT_RTSRST_8822B)
9265 #define BIT_GET_RTSRST_8822B(x) \
9266 (((x) >> BIT_SHIFT_RTSRST_8822B) & BIT_MASK_RTSRST_8822B)
9268 /* 2 REG_BACAMCMD_8822B (BLOCK ACK CAM COMMAND REGISTER) */
9269 #define BIT_BACAM_POLL_8822B BIT(31)
9270 #define BIT_BACAM_RST_8822B BIT(17)
9271 #define BIT_BACAM_RW_8822B BIT(16)
9273 #define BIT_SHIFT_TXSBM_8822B 14
9274 #define BIT_MASK_TXSBM_8822B 0x3
9275 #define BIT_TXSBM_8822B(x) \
9276 (((x) & BIT_MASK_TXSBM_8822B) << BIT_SHIFT_TXSBM_8822B)
9277 #define BIT_GET_TXSBM_8822B(x) \
9278 (((x) >> BIT_SHIFT_TXSBM_8822B) & BIT_MASK_TXSBM_8822B)
9280 #define BIT_SHIFT_BACAM_ADDR_8822B 0
9281 #define BIT_MASK_BACAM_ADDR_8822B 0x3f
9282 #define BIT_BACAM_ADDR_8822B(x) \
9283 (((x) & BIT_MASK_BACAM_ADDR_8822B) << BIT_SHIFT_BACAM_ADDR_8822B)
9284 #define BIT_GET_BACAM_ADDR_8822B(x) \
9285 (((x) >> BIT_SHIFT_BACAM_ADDR_8822B) & BIT_MASK_BACAM_ADDR_8822B)
9287 /* 2 REG_BACAMCONTENT_8822B (BLOCK ACK CAM CONTENT REGISTER) */
9289 #define BIT_SHIFT_BA_CONTENT_H_8822B (32 & CPU_OPT_WIDTH)
9290 #define BIT_MASK_BA_CONTENT_H_8822B 0xffffffffL
9291 #define BIT_BA_CONTENT_H_8822B(x) \
9292 (((x) & BIT_MASK_BA_CONTENT_H_8822B) << BIT_SHIFT_BA_CONTENT_H_8822B)
9293 #define BIT_GET_BA_CONTENT_H_8822B(x) \
9294 (((x) >> BIT_SHIFT_BA_CONTENT_H_8822B) & BIT_MASK_BA_CONTENT_H_8822B)
9296 #define BIT_SHIFT_BA_CONTENT_L_8822B 0
9297 #define BIT_MASK_BA_CONTENT_L_8822B 0xffffffffL
9298 #define BIT_BA_CONTENT_L_8822B(x) \
9299 (((x) & BIT_MASK_BA_CONTENT_L_8822B) << BIT_SHIFT_BA_CONTENT_L_8822B)
9300 #define BIT_GET_BA_CONTENT_L_8822B(x) \
9301 (((x) >> BIT_SHIFT_BA_CONTENT_L_8822B) & BIT_MASK_BA_CONTENT_L_8822B)
9303 /* 2 REG_WMAC_BITMAP_CTL_8822B */
9304 #define BIT_BITMAP_VO_8822B BIT(7)
9305 #define BIT_BITMAP_VI_8822B BIT(6)
9306 #define BIT_BITMAP_BE_8822B BIT(5)
9307 #define BIT_BITMAP_BK_8822B BIT(4)
9309 #define BIT_SHIFT_BITMAP_CONDITION_8822B 2
9310 #define BIT_MASK_BITMAP_CONDITION_8822B 0x3
9311 #define BIT_BITMAP_CONDITION_8822B(x) \
9312 (((x) & BIT_MASK_BITMAP_CONDITION_8822B) \
9313 << BIT_SHIFT_BITMAP_CONDITION_8822B)
9314 #define BIT_GET_BITMAP_CONDITION_8822B(x) \
9315 (((x) >> BIT_SHIFT_BITMAP_CONDITION_8822B) & \
9316 BIT_MASK_BITMAP_CONDITION_8822B)
9318 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8822B BIT(1)
9319 #define BIT_BITMAP_FORCE_8822B BIT(0)
9321 /* 2 REG_TX_RX_8822B STATUS */
9323 #define BIT_SHIFT_RXPKT_TYPE_8822B 2
9324 #define BIT_MASK_RXPKT_TYPE_8822B 0x3f
9325 #define BIT_RXPKT_TYPE_8822B(x) \
9326 (((x) & BIT_MASK_RXPKT_TYPE_8822B) << BIT_SHIFT_RXPKT_TYPE_8822B)
9327 #define BIT_GET_RXPKT_TYPE_8822B(x) \
9328 (((x) >> BIT_SHIFT_RXPKT_TYPE_8822B) & BIT_MASK_RXPKT_TYPE_8822B)
9330 #define BIT_TXACT_IND_8822B BIT(1)
9331 #define BIT_RXACT_IND_8822B BIT(0)
9333 /* 2 REG_WMAC_BACAM_RPMEN_8822B */
9335 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B 2
9336 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8822B 0x3f
9337 #define BIT_BITMAP_SSNBK_COUNTER_8822B(x) \
9338 (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8822B) \
9339 << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B)
9340 #define BIT_GET_BITMAP_SSNBK_COUNTER_8822B(x) \
9341 (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B) & \
9342 BIT_MASK_BITMAP_SSNBK_COUNTER_8822B)
9344 #define BIT_BITMAP_EN_8822B BIT(1)
9345 #define BIT_WMAC_BACAM_RPMEN_8822B BIT(0)
9347 /* 2 REG_LBDLY_8822B (LOOPBACK DELAY REGISTER) */
9349 #define BIT_SHIFT_LBDLY_8822B 0
9350 #define BIT_MASK_LBDLY_8822B 0x1f
9351 #define BIT_LBDLY_8822B(x) \
9352 (((x) & BIT_MASK_LBDLY_8822B) << BIT_SHIFT_LBDLY_8822B)
9353 #define BIT_GET_LBDLY_8822B(x) \
9354 (((x) >> BIT_SHIFT_LBDLY_8822B) & BIT_MASK_LBDLY_8822B)
9356 /* 2 REG_RXERR_RPT_8822B (RX ERROR REPORT REGISTER) */
9358 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B 28
9359 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B 0xf
9360 #define BIT_RXERR_RPT_SEL_V1_3_0_8822B(x) \
9361 (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B) \
9362 << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B)
9363 #define BIT_GET_RXERR_RPT_SEL_V1_3_0_8822B(x) \
9364 (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B) & \
9365 BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B)
9367 #define BIT_RXERR_RPT_RST_8822B BIT(27)
9368 #define BIT_RXERR_RPT_SEL_V1_4_8822B BIT(26)
9369 #define BIT_W1S_8822B BIT(23)
9370 #define BIT_UD_SELECT_BSSID_8822B BIT(22)
9372 #define BIT_SHIFT_UD_SUB_TYPE_8822B 18
9373 #define BIT_MASK_UD_SUB_TYPE_8822B 0xf
9374 #define BIT_UD_SUB_TYPE_8822B(x) \
9375 (((x) & BIT_MASK_UD_SUB_TYPE_8822B) << BIT_SHIFT_UD_SUB_TYPE_8822B)
9376 #define BIT_GET_UD_SUB_TYPE_8822B(x) \
9377 (((x) >> BIT_SHIFT_UD_SUB_TYPE_8822B) & BIT_MASK_UD_SUB_TYPE_8822B)
9379 #define BIT_SHIFT_UD_TYPE_8822B 16
9380 #define BIT_MASK_UD_TYPE_8822B 0x3
9381 #define BIT_UD_TYPE_8822B(x) \
9382 (((x) & BIT_MASK_UD_TYPE_8822B) << BIT_SHIFT_UD_TYPE_8822B)
9383 #define BIT_GET_UD_TYPE_8822B(x) \
9384 (((x) >> BIT_SHIFT_UD_TYPE_8822B) & BIT_MASK_UD_TYPE_8822B)
9386 #define BIT_SHIFT_RPT_COUNTER_8822B 0
9387 #define BIT_MASK_RPT_COUNTER_8822B 0xffff
9388 #define BIT_RPT_COUNTER_8822B(x) \
9389 (((x) & BIT_MASK_RPT_COUNTER_8822B) << BIT_SHIFT_RPT_COUNTER_8822B)
9390 #define BIT_GET_RPT_COUNTER_8822B(x) \
9391 (((x) >> BIT_SHIFT_RPT_COUNTER_8822B) & BIT_MASK_RPT_COUNTER_8822B)
9393 /* 2 REG_WMAC_TRXPTCL_CTL_8822B (WMAC TX/RX PROTOCOL CONTROL REGISTER) */
9395 #define BIT_SHIFT_ACKBA_TYPSEL_8822B (60 & CPU_OPT_WIDTH)
9396 #define BIT_MASK_ACKBA_TYPSEL_8822B 0xf
9397 #define BIT_ACKBA_TYPSEL_8822B(x) \
9398 (((x) & BIT_MASK_ACKBA_TYPSEL_8822B) << BIT_SHIFT_ACKBA_TYPSEL_8822B)
9399 #define BIT_GET_ACKBA_TYPSEL_8822B(x) \
9400 (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8822B) & BIT_MASK_ACKBA_TYPSEL_8822B)
9402 #define BIT_SHIFT_ACKBA_ACKPCHK_8822B (56 & CPU_OPT_WIDTH)
9403 #define BIT_MASK_ACKBA_ACKPCHK_8822B 0xf
9404 #define BIT_ACKBA_ACKPCHK_8822B(x) \
9405 (((x) & BIT_MASK_ACKBA_ACKPCHK_8822B) << BIT_SHIFT_ACKBA_ACKPCHK_8822B)
9406 #define BIT_GET_ACKBA_ACKPCHK_8822B(x) \
9407 (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8822B) & BIT_MASK_ACKBA_ACKPCHK_8822B)
9409 #define BIT_SHIFT_ACKBAR_TYPESEL_8822B (48 & CPU_OPT_WIDTH)
9410 #define BIT_MASK_ACKBAR_TYPESEL_8822B 0xff
9411 #define BIT_ACKBAR_TYPESEL_8822B(x) \
9412 (((x) & BIT_MASK_ACKBAR_TYPESEL_8822B) \
9413 << BIT_SHIFT_ACKBAR_TYPESEL_8822B)
9414 #define BIT_GET_ACKBAR_TYPESEL_8822B(x) \
9415 (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8822B) & \
9416 BIT_MASK_ACKBAR_TYPESEL_8822B)
9418 #define BIT_SHIFT_ACKBAR_ACKPCHK_8822B (44 & CPU_OPT_WIDTH)
9419 #define BIT_MASK_ACKBAR_ACKPCHK_8822B 0xf
9420 #define BIT_ACKBAR_ACKPCHK_8822B(x) \
9421 (((x) & BIT_MASK_ACKBAR_ACKPCHK_8822B) \
9422 << BIT_SHIFT_ACKBAR_ACKPCHK_8822B)
9423 #define BIT_GET_ACKBAR_ACKPCHK_8822B(x) \
9424 (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8822B) & \
9425 BIT_MASK_ACKBAR_ACKPCHK_8822B)
9427 #define BIT_RXBA_IGNOREA2_8822B BIT(42)
9428 #define BIT_EN_SAVE_ALL_TXOPADDR_8822B BIT(41)
9429 #define BIT_EN_TXCTS_TO_TXOPOWNER_INRXNAV_8822B BIT(40)
9430 #define BIT_DIS_TXBA_AMPDUFCSERR_8822B BIT(39)
9431 #define BIT_DIS_TXBA_RXBARINFULL_8822B BIT(38)
9432 #define BIT_DIS_TXCFE_INFULL_8822B BIT(37)
9433 #define BIT_DIS_TXCTS_INFULL_8822B BIT(36)
9434 #define BIT_EN_TXACKBA_IN_TX_RDG_8822B BIT(35)
9435 #define BIT_EN_TXACKBA_IN_TXOP_8822B BIT(34)
9436 #define BIT_EN_TXCTS_IN_RXNAV_8822B BIT(33)
9437 #define BIT_EN_TXCTS_INTXOP_8822B BIT(32)
9438 #define BIT_BLK_EDCA_BBSLP_8822B BIT(31)
9439 #define BIT_BLK_EDCA_BBSBY_8822B BIT(30)
9440 #define BIT_ACKTO_BLOCK_SCH_EN_8822B BIT(27)
9441 #define BIT_EIFS_BLOCK_SCH_EN_8822B BIT(26)
9442 #define BIT_PLCPCHK_RST_EIFS_8822B BIT(25)
9443 #define BIT_CCA_RST_EIFS_8822B BIT(24)
9444 #define BIT_DIS_UPD_MYRXPKTNAV_8822B BIT(23)
9445 #define BIT_EARLY_TXBA_8822B BIT(22)
9447 #define BIT_SHIFT_RESP_CHNBUSY_8822B 20
9448 #define BIT_MASK_RESP_CHNBUSY_8822B 0x3
9449 #define BIT_RESP_CHNBUSY_8822B(x) \
9450 (((x) & BIT_MASK_RESP_CHNBUSY_8822B) << BIT_SHIFT_RESP_CHNBUSY_8822B)
9451 #define BIT_GET_RESP_CHNBUSY_8822B(x) \
9452 (((x) >> BIT_SHIFT_RESP_CHNBUSY_8822B) & BIT_MASK_RESP_CHNBUSY_8822B)
9454 #define BIT_RESP_DCTS_EN_8822B BIT(19)
9455 #define BIT_RESP_DCFE_EN_8822B BIT(18)
9456 #define BIT_RESP_SPLCPEN_8822B BIT(17)
9457 #define BIT_RESP_SGIEN_8822B BIT(16)
9458 #define BIT_RESP_LDPC_EN_8822B BIT(15)
9459 #define BIT_DIS_RESP_ACKINCCA_8822B BIT(14)
9460 #define BIT_DIS_RESP_CTSINCCA_8822B BIT(13)
9462 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B 10
9463 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B 0x7
9464 #define BIT_R_WMAC_SECOND_CCA_TIMER_8822B(x) \
9465 (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B) \
9466 << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B)
9467 #define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8822B(x) \
9468 (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B) & \
9469 BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B)
9471 #define BIT_SHIFT_RFMOD_8822B 7
9472 #define BIT_MASK_RFMOD_8822B 0x3
9473 #define BIT_RFMOD_8822B(x) \
9474 (((x) & BIT_MASK_RFMOD_8822B) << BIT_SHIFT_RFMOD_8822B)
9475 #define BIT_GET_RFMOD_8822B(x) \
9476 (((x) >> BIT_SHIFT_RFMOD_8822B) & BIT_MASK_RFMOD_8822B)
9478 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B 5
9479 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8822B 0x3
9480 #define BIT_RESP_CTS_DYNBW_SEL_8822B(x) \
9481 (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8822B) \
9482 << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B)
9483 #define BIT_GET_RESP_CTS_DYNBW_SEL_8822B(x) \
9484 (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B) & \
9485 BIT_MASK_RESP_CTS_DYNBW_SEL_8822B)
9487 #define BIT_DLY_TX_WAIT_RXANTSEL_8822B BIT(4)
9488 #define BIT_TXRESP_BY_RXANTSEL_8822B BIT(3)
9490 #define BIT_SHIFT_ORIG_DCTS_CHK_8822B 0
9491 #define BIT_MASK_ORIG_DCTS_CHK_8822B 0x3
9492 #define BIT_ORIG_DCTS_CHK_8822B(x) \
9493 (((x) & BIT_MASK_ORIG_DCTS_CHK_8822B) << BIT_SHIFT_ORIG_DCTS_CHK_8822B)
9494 #define BIT_GET_ORIG_DCTS_CHK_8822B(x) \
9495 (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8822B) & BIT_MASK_ORIG_DCTS_CHK_8822B)
9497 /* 2 REG_CAMCMD_8822B (CAM COMMAND REGISTER) */
9498 #define BIT_SECCAM_POLLING_8822B BIT(31)
9499 #define BIT_SECCAM_CLR_8822B BIT(30)
9500 #define BIT_MFBCAM_CLR_8822B BIT(29)
9501 #define BIT_SECCAM_WE_8822B BIT(16)
9503 #define BIT_SHIFT_SECCAM_ADDR_V2_8822B 0
9504 #define BIT_MASK_SECCAM_ADDR_V2_8822B 0x3ff
9505 #define BIT_SECCAM_ADDR_V2_8822B(x) \
9506 (((x) & BIT_MASK_SECCAM_ADDR_V2_8822B) \
9507 << BIT_SHIFT_SECCAM_ADDR_V2_8822B)
9508 #define BIT_GET_SECCAM_ADDR_V2_8822B(x) \
9509 (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8822B) & \
9510 BIT_MASK_SECCAM_ADDR_V2_8822B)
9512 /* 2 REG_CAMWRITE_8822B (CAM WRITE REGISTER) */
9514 #define BIT_SHIFT_CAMW_DATA_8822B 0
9515 #define BIT_MASK_CAMW_DATA_8822B 0xffffffffL
9516 #define BIT_CAMW_DATA_8822B(x) \
9517 (((x) & BIT_MASK_CAMW_DATA_8822B) << BIT_SHIFT_CAMW_DATA_8822B)
9518 #define BIT_GET_CAMW_DATA_8822B(x) \
9519 (((x) >> BIT_SHIFT_CAMW_DATA_8822B) & BIT_MASK_CAMW_DATA_8822B)
9521 /* 2 REG_CAMREAD_8822B (CAM READ REGISTER) */
9523 #define BIT_SHIFT_CAMR_DATA_8822B 0
9524 #define BIT_MASK_CAMR_DATA_8822B 0xffffffffL
9525 #define BIT_CAMR_DATA_8822B(x) \
9526 (((x) & BIT_MASK_CAMR_DATA_8822B) << BIT_SHIFT_CAMR_DATA_8822B)
9527 #define BIT_GET_CAMR_DATA_8822B(x) \
9528 (((x) >> BIT_SHIFT_CAMR_DATA_8822B) & BIT_MASK_CAMR_DATA_8822B)
9530 /* 2 REG_CAMDBG_8822B (CAM DEBUG REGISTER) */
9531 #define BIT_SECCAM_INFO_8822B BIT(31)
9532 #define BIT_SEC_KEYFOUND_8822B BIT(15)
9534 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8822B 12
9535 #define BIT_MASK_CAMDBG_SEC_TYPE_8822B 0x7
9536 #define BIT_CAMDBG_SEC_TYPE_8822B(x) \
9537 (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8822B) \
9538 << BIT_SHIFT_CAMDBG_SEC_TYPE_8822B)
9539 #define BIT_GET_CAMDBG_SEC_TYPE_8822B(x) \
9540 (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8822B) & \
9541 BIT_MASK_CAMDBG_SEC_TYPE_8822B)
9543 #define BIT_CAMDBG_EXT_SECTYPE_8822B BIT(11)
9545 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B 5
9546 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B 0x1f
9547 #define BIT_CAMDBG_MIC_KEY_IDX_8822B(x) \
9548 (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B) \
9549 << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B)
9550 #define BIT_GET_CAMDBG_MIC_KEY_IDX_8822B(x) \
9551 (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B) & \
9552 BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B)
9554 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B 0
9555 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B 0x1f
9556 #define BIT_CAMDBG_SEC_KEY_IDX_8822B(x) \
9557 (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B) \
9558 << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B)
9559 #define BIT_GET_CAMDBG_SEC_KEY_IDX_8822B(x) \
9560 (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B) & \
9561 BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B)
9563 /* 2 REG_RXFILTER_ACTION_1_8822B */
9565 #define BIT_SHIFT_RXFILTER_ACTION_1_8822B 0
9566 #define BIT_MASK_RXFILTER_ACTION_1_8822B 0xff
9567 #define BIT_RXFILTER_ACTION_1_8822B(x) \
9568 (((x) & BIT_MASK_RXFILTER_ACTION_1_8822B) \
9569 << BIT_SHIFT_RXFILTER_ACTION_1_8822B)
9570 #define BIT_GET_RXFILTER_ACTION_1_8822B(x) \
9571 (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8822B) & \
9572 BIT_MASK_RXFILTER_ACTION_1_8822B)
9574 /* 2 REG_RXFILTER_CATEGORY_1_8822B */
9576 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8822B 0
9577 #define BIT_MASK_RXFILTER_CATEGORY_1_8822B 0xff
9578 #define BIT_RXFILTER_CATEGORY_1_8822B(x) \
9579 (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8822B) \
9580 << BIT_SHIFT_RXFILTER_CATEGORY_1_8822B)
9581 #define BIT_GET_RXFILTER_CATEGORY_1_8822B(x) \
9582 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8822B) & \
9583 BIT_MASK_RXFILTER_CATEGORY_1_8822B)
9585 /* 2 REG_SECCFG_8822B (SECURITY CONFIGURATION REGISTER) */
9586 #define BIT_DIS_GCLK_WAPI_8822B BIT(15)
9587 #define BIT_DIS_GCLK_AES_8822B BIT(14)
9588 #define BIT_DIS_GCLK_TKIP_8822B BIT(13)
9589 #define BIT_AES_SEL_QC_1_8822B BIT(12)
9590 #define BIT_AES_SEL_QC_0_8822B BIT(11)
9591 #define BIT_CHK_BMC_8822B BIT(9)
9592 #define BIT_CHK_KEYID_8822B BIT(8)
9593 #define BIT_RXBCUSEDK_8822B BIT(7)
9594 #define BIT_TXBCUSEDK_8822B BIT(6)
9595 #define BIT_NOSKMC_8822B BIT(5)
9596 #define BIT_SKBYA2_8822B BIT(4)
9597 #define BIT_RXDEC_8822B BIT(3)
9598 #define BIT_TXENC_8822B BIT(2)
9599 #define BIT_RXUHUSEDK_8822B BIT(1)
9600 #define BIT_TXUHUSEDK_8822B BIT(0)
9602 /* 2 REG_RXFILTER_ACTION_3_8822B */
9604 #define BIT_SHIFT_RXFILTER_ACTION_3_8822B 0
9605 #define BIT_MASK_RXFILTER_ACTION_3_8822B 0xff
9606 #define BIT_RXFILTER_ACTION_3_8822B(x) \
9607 (((x) & BIT_MASK_RXFILTER_ACTION_3_8822B) \
9608 << BIT_SHIFT_RXFILTER_ACTION_3_8822B)
9609 #define BIT_GET_RXFILTER_ACTION_3_8822B(x) \
9610 (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8822B) & \
9611 BIT_MASK_RXFILTER_ACTION_3_8822B)
9613 /* 2 REG_RXFILTER_CATEGORY_3_8822B */
9615 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8822B 0
9616 #define BIT_MASK_RXFILTER_CATEGORY_3_8822B 0xff
9617 #define BIT_RXFILTER_CATEGORY_3_8822B(x) \
9618 (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8822B) \
9619 << BIT_SHIFT_RXFILTER_CATEGORY_3_8822B)
9620 #define BIT_GET_RXFILTER_CATEGORY_3_8822B(x) \
9621 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8822B) & \
9622 BIT_MASK_RXFILTER_CATEGORY_3_8822B)
9624 /* 2 REG_RXFILTER_ACTION_2_8822B */
9626 #define BIT_SHIFT_RXFILTER_ACTION_2_8822B 0
9627 #define BIT_MASK_RXFILTER_ACTION_2_8822B 0xff
9628 #define BIT_RXFILTER_ACTION_2_8822B(x) \
9629 (((x) & BIT_MASK_RXFILTER_ACTION_2_8822B) \
9630 << BIT_SHIFT_RXFILTER_ACTION_2_8822B)
9631 #define BIT_GET_RXFILTER_ACTION_2_8822B(x) \
9632 (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8822B) & \
9633 BIT_MASK_RXFILTER_ACTION_2_8822B)
9635 /* 2 REG_RXFILTER_CATEGORY_2_8822B */
9637 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8822B 0
9638 #define BIT_MASK_RXFILTER_CATEGORY_2_8822B 0xff
9639 #define BIT_RXFILTER_CATEGORY_2_8822B(x) \
9640 (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8822B) \
9641 << BIT_SHIFT_RXFILTER_CATEGORY_2_8822B)
9642 #define BIT_GET_RXFILTER_CATEGORY_2_8822B(x) \
9643 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8822B) & \
9644 BIT_MASK_RXFILTER_CATEGORY_2_8822B)
9646 /* 2 REG_RXFLTMAP4_8822B (RX FILTER MAP GROUP 4) */
9647 #define BIT_CTRLFLT15EN_FW_8822B BIT(15)
9648 #define BIT_CTRLFLT14EN_FW_8822B BIT(14)
9649 #define BIT_CTRLFLT13EN_FW_8822B BIT(13)
9650 #define BIT_CTRLFLT12EN_FW_8822B BIT(12)
9651 #define BIT_CTRLFLT11EN_FW_8822B BIT(11)
9652 #define BIT_CTRLFLT10EN_FW_8822B BIT(10)
9653 #define BIT_CTRLFLT9EN_FW_8822B BIT(9)
9654 #define BIT_CTRLFLT8EN_FW_8822B BIT(8)
9655 #define BIT_CTRLFLT7EN_FW_8822B BIT(7)
9656 #define BIT_CTRLFLT6EN_FW_8822B BIT(6)
9657 #define BIT_CTRLFLT5EN_FW_8822B BIT(5)
9658 #define BIT_CTRLFLT4EN_FW_8822B BIT(4)
9659 #define BIT_CTRLFLT3EN_FW_8822B BIT(3)
9660 #define BIT_CTRLFLT2EN_FW_8822B BIT(2)
9661 #define BIT_CTRLFLT1EN_FW_8822B BIT(1)
9662 #define BIT_CTRLFLT0EN_FW_8822B BIT(0)
9664 /* 2 REG_RXFLTMAP3_8822B (RX FILTER MAP GROUP 3) */
9665 #define BIT_MGTFLT15EN_FW_8822B BIT(15)
9666 #define BIT_MGTFLT14EN_FW_8822B BIT(14)
9667 #define BIT_MGTFLT13EN_FW_8822B BIT(13)
9668 #define BIT_MGTFLT12EN_FW_8822B BIT(12)
9669 #define BIT_MGTFLT11EN_FW_8822B BIT(11)
9670 #define BIT_MGTFLT10EN_FW_8822B BIT(10)
9671 #define BIT_MGTFLT9EN_FW_8822B BIT(9)
9672 #define BIT_MGTFLT8EN_FW_8822B BIT(8)
9673 #define BIT_MGTFLT7EN_FW_8822B BIT(7)
9674 #define BIT_MGTFLT6EN_FW_8822B BIT(6)
9675 #define BIT_MGTFLT5EN_FW_8822B BIT(5)
9676 #define BIT_MGTFLT4EN_FW_8822B BIT(4)
9677 #define BIT_MGTFLT3EN_FW_8822B BIT(3)
9678 #define BIT_MGTFLT2EN_FW_8822B BIT(2)
9679 #define BIT_MGTFLT1EN_FW_8822B BIT(1)
9680 #define BIT_MGTFLT0EN_FW_8822B BIT(0)
9682 /* 2 REG_RXFLTMAP6_8822B (RX FILTER MAP GROUP 3) */
9683 #define BIT_ACTIONFLT15EN_FW_8822B BIT(15)
9684 #define BIT_ACTIONFLT14EN_FW_8822B BIT(14)
9685 #define BIT_ACTIONFLT13EN_FW_8822B BIT(13)
9686 #define BIT_ACTIONFLT12EN_FW_8822B BIT(12)
9687 #define BIT_ACTIONFLT11EN_FW_8822B BIT(11)
9688 #define BIT_ACTIONFLT10EN_FW_8822B BIT(10)
9689 #define BIT_ACTIONFLT9EN_FW_8822B BIT(9)
9690 #define BIT_ACTIONFLT8EN_FW_8822B BIT(8)
9691 #define BIT_ACTIONFLT7EN_FW_8822B BIT(7)
9692 #define BIT_ACTIONFLT6EN_FW_8822B BIT(6)
9693 #define BIT_ACTIONFLT5EN_FW_8822B BIT(5)
9694 #define BIT_ACTIONFLT4EN_FW_8822B BIT(4)
9695 #define BIT_ACTIONFLT3EN_FW_8822B BIT(3)
9696 #define BIT_ACTIONFLT2EN_FW_8822B BIT(2)
9697 #define BIT_ACTIONFLT1EN_FW_8822B BIT(1)
9698 #define BIT_ACTIONFLT0EN_FW_8822B BIT(0)
9700 /* 2 REG_RXFLTMAP5_8822B (RX FILTER MAP GROUP 3) */
9701 #define BIT_DATAFLT15EN_FW_8822B BIT(15)
9702 #define BIT_DATAFLT14EN_FW_8822B BIT(14)
9703 #define BIT_DATAFLT13EN_FW_8822B BIT(13)
9704 #define BIT_DATAFLT12EN_FW_8822B BIT(12)
9705 #define BIT_DATAFLT11EN_FW_8822B BIT(11)
9706 #define BIT_DATAFLT10EN_FW_8822B BIT(10)
9707 #define BIT_DATAFLT9EN_FW_8822B BIT(9)
9708 #define BIT_DATAFLT8EN_FW_8822B BIT(8)
9709 #define BIT_DATAFLT7EN_FW_8822B BIT(7)
9710 #define BIT_DATAFLT6EN_FW_8822B BIT(6)
9711 #define BIT_DATAFLT5EN_FW_8822B BIT(5)
9712 #define BIT_DATAFLT4EN_FW_8822B BIT(4)
9713 #define BIT_DATAFLT3EN_FW_8822B BIT(3)
9714 #define BIT_DATAFLT2EN_FW_8822B BIT(2)
9715 #define BIT_DATAFLT1EN_FW_8822B BIT(1)
9716 #define BIT_DATAFLT0EN_FW_8822B BIT(0)
9718 /* 2 REG_WMMPS_UAPSD_TID_8822B (WMM POWER SAVE UAPSD TID REGISTER) */
9719 #define BIT_WMMPS_UAPSD_TID7_8822B BIT(7)
9720 #define BIT_WMMPS_UAPSD_TID6_8822B BIT(6)
9721 #define BIT_WMMPS_UAPSD_TID5_8822B BIT(5)
9722 #define BIT_WMMPS_UAPSD_TID4_8822B BIT(4)
9723 #define BIT_WMMPS_UAPSD_TID3_8822B BIT(3)
9724 #define BIT_WMMPS_UAPSD_TID2_8822B BIT(2)
9725 #define BIT_WMMPS_UAPSD_TID1_8822B BIT(1)
9726 #define BIT_WMMPS_UAPSD_TID0_8822B BIT(0)
9728 /* 2 REG_PS_RX_INFO_8822B (POWER SAVE RX INFORMATION REGISTER) */
9730 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B 5
9731 #define BIT_MASK_PORTSEL__PS_RX_INFO_8822B 0x7
9732 #define BIT_PORTSEL__PS_RX_INFO_8822B(x) \
9733 (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8822B) \
9734 << BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B)
9735 #define BIT_GET_PORTSEL__PS_RX_INFO_8822B(x) \
9736 (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B) & \
9737 BIT_MASK_PORTSEL__PS_RX_INFO_8822B)
9739 #define BIT_RXCTRLIN0_8822B BIT(4)
9740 #define BIT_RXMGTIN0_8822B BIT(3)
9741 #define BIT_RXDATAIN2_8822B BIT(2)
9742 #define BIT_RXDATAIN1_8822B BIT(1)
9743 #define BIT_RXDATAIN0_8822B BIT(0)
9745 /* 2 REG_NAN_RX_TSF_FILTER_8822B(NAN_RX_TSF_ADDRESS_FILTER) */
9746 #define BIT_CHK_TSF_TA_8822B BIT(2)
9747 #define BIT_CHK_TSF_CBSSID_8822B BIT(1)
9748 #define BIT_CHK_TSF_EN_8822B BIT(0)
9750 /* 2 REG_WOW_CTRL_8822B (WAKE ON WLAN CONTROL REGISTER) */
9752 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B 6
9753 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8822B 0x3
9754 #define BIT_PSF_BSSIDSEL_B2B1_8822B(x) \
9755 (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8822B) \
9756 << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B)
9757 #define BIT_GET_PSF_BSSIDSEL_B2B1_8822B(x) \
9758 (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B) & \
9759 BIT_MASK_PSF_BSSIDSEL_B2B1_8822B)
9761 #define BIT_WOWHCI_8822B BIT(5)
9762 #define BIT_PSF_BSSIDSEL_B0_8822B BIT(4)
9763 #define BIT_UWF_8822B BIT(3)
9764 #define BIT_MAGIC_8822B BIT(2)
9765 #define BIT_WOWEN_8822B BIT(1)
9766 #define BIT_FORCE_WAKEUP_8822B BIT(0)
9768 /* 2 REG_LPNAV_CTRL_8822B (LOW POWER NAV CONTROL REGISTER) */
9769 #define BIT_LPNAV_EN_8822B BIT(31)
9771 #define BIT_SHIFT_LPNAV_EARLY_8822B 16
9772 #define BIT_MASK_LPNAV_EARLY_8822B 0x7fff
9773 #define BIT_LPNAV_EARLY_8822B(x) \
9774 (((x) & BIT_MASK_LPNAV_EARLY_8822B) << BIT_SHIFT_LPNAV_EARLY_8822B)
9775 #define BIT_GET_LPNAV_EARLY_8822B(x) \
9776 (((x) >> BIT_SHIFT_LPNAV_EARLY_8822B) & BIT_MASK_LPNAV_EARLY_8822B)
9778 #define BIT_SHIFT_LPNAV_TH_8822B 0
9779 #define BIT_MASK_LPNAV_TH_8822B 0xffff
9780 #define BIT_LPNAV_TH_8822B(x) \
9781 (((x) & BIT_MASK_LPNAV_TH_8822B) << BIT_SHIFT_LPNAV_TH_8822B)
9782 #define BIT_GET_LPNAV_TH_8822B(x) \
9783 (((x) >> BIT_SHIFT_LPNAV_TH_8822B) & BIT_MASK_LPNAV_TH_8822B)
9785 /* 2 REG_WKFMCAM_CMD_8822B (WAKEUP FRAME CAM COMMAND REGISTER) */
9786 #define BIT_WKFCAM_POLLING_V1_8822B BIT(31)
9787 #define BIT_WKFCAM_CLR_V1_8822B BIT(30)
9788 #define BIT_WKFCAM_WE_8822B BIT(16)
9790 #define BIT_SHIFT_WKFCAM_ADDR_V2_8822B 8
9791 #define BIT_MASK_WKFCAM_ADDR_V2_8822B 0xff
9792 #define BIT_WKFCAM_ADDR_V2_8822B(x) \
9793 (((x) & BIT_MASK_WKFCAM_ADDR_V2_8822B) \
9794 << BIT_SHIFT_WKFCAM_ADDR_V2_8822B)
9795 #define BIT_GET_WKFCAM_ADDR_V2_8822B(x) \
9796 (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8822B) & \
9797 BIT_MASK_WKFCAM_ADDR_V2_8822B)
9799 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B 0
9800 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8822B 0xff
9801 #define BIT_WKFCAM_CAM_NUM_V1_8822B(x) \
9802 (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8822B) \
9803 << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B)
9804 #define BIT_GET_WKFCAM_CAM_NUM_V1_8822B(x) \
9805 (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B) & \
9806 BIT_MASK_WKFCAM_CAM_NUM_V1_8822B)
9808 /* 2 REG_WKFMCAM_RWD_8822B (WAKEUP FRAME READ/WRITE DATA) */
9810 #define BIT_SHIFT_WKFMCAM_RWD_8822B 0
9811 #define BIT_MASK_WKFMCAM_RWD_8822B 0xffffffffL
9812 #define BIT_WKFMCAM_RWD_8822B(x) \
9813 (((x) & BIT_MASK_WKFMCAM_RWD_8822B) << BIT_SHIFT_WKFMCAM_RWD_8822B)
9814 #define BIT_GET_WKFMCAM_RWD_8822B(x) \
9815 (((x) >> BIT_SHIFT_WKFMCAM_RWD_8822B) & BIT_MASK_WKFMCAM_RWD_8822B)
9817 /* 2 REG_RXFLTMAP1_8822B (RX FILTER MAP GROUP 1) */
9818 #define BIT_CTRLFLT15EN_8822B BIT(15)
9819 #define BIT_CTRLFLT14EN_8822B BIT(14)
9820 #define BIT_CTRLFLT13EN_8822B BIT(13)
9821 #define BIT_CTRLFLT12EN_8822B BIT(12)
9822 #define BIT_CTRLFLT11EN_8822B BIT(11)
9823 #define BIT_CTRLFLT10EN_8822B BIT(10)
9824 #define BIT_CTRLFLT9EN_8822B BIT(9)
9825 #define BIT_CTRLFLT8EN_8822B BIT(8)
9826 #define BIT_CTRLFLT7EN_8822B BIT(7)
9827 #define BIT_CTRLFLT6EN_8822B BIT(6)
9828 #define BIT_CTRLFLT5EN_8822B BIT(5)
9829 #define BIT_CTRLFLT4EN_8822B BIT(4)
9830 #define BIT_CTRLFLT3EN_8822B BIT(3)
9831 #define BIT_CTRLFLT2EN_8822B BIT(2)
9832 #define BIT_CTRLFLT1EN_8822B BIT(1)
9833 #define BIT_CTRLFLT0EN_8822B BIT(0)
9835 /* 2 REG_RXFLTMAP0_8822B (RX FILTER MAP GROUP 0) */
9836 #define BIT_MGTFLT15EN_8822B BIT(15)
9837 #define BIT_MGTFLT14EN_8822B BIT(14)
9838 #define BIT_MGTFLT13EN_8822B BIT(13)
9839 #define BIT_MGTFLT12EN_8822B BIT(12)
9840 #define BIT_MGTFLT11EN_8822B BIT(11)
9841 #define BIT_MGTFLT10EN_8822B BIT(10)
9842 #define BIT_MGTFLT9EN_8822B BIT(9)
9843 #define BIT_MGTFLT8EN_8822B BIT(8)
9844 #define BIT_MGTFLT7EN_8822B BIT(7)
9845 #define BIT_MGTFLT6EN_8822B BIT(6)
9846 #define BIT_MGTFLT5EN_8822B BIT(5)
9847 #define BIT_MGTFLT4EN_8822B BIT(4)
9848 #define BIT_MGTFLT3EN_8822B BIT(3)
9849 #define BIT_MGTFLT2EN_8822B BIT(2)
9850 #define BIT_MGTFLT1EN_8822B BIT(1)
9851 #define BIT_MGTFLT0EN_8822B BIT(0)
9853 /* 2 REG_NOT_VALID_8822B */
9855 /* 2 REG_RXFLTMAP_8822B (RX FILTER MAP GROUP 2) */
9856 #define BIT_DATAFLT15EN_8822B BIT(15)
9857 #define BIT_DATAFLT14EN_8822B BIT(14)
9858 #define BIT_DATAFLT13EN_8822B BIT(13)
9859 #define BIT_DATAFLT12EN_8822B BIT(12)
9860 #define BIT_DATAFLT11EN_8822B BIT(11)
9861 #define BIT_DATAFLT10EN_8822B BIT(10)
9862 #define BIT_DATAFLT9EN_8822B BIT(9)
9863 #define BIT_DATAFLT8EN_8822B BIT(8)
9864 #define BIT_DATAFLT7EN_8822B BIT(7)
9865 #define BIT_DATAFLT6EN_8822B BIT(6)
9866 #define BIT_DATAFLT5EN_8822B BIT(5)
9867 #define BIT_DATAFLT4EN_8822B BIT(4)
9868 #define BIT_DATAFLT3EN_8822B BIT(3)
9869 #define BIT_DATAFLT2EN_8822B BIT(2)
9870 #define BIT_DATAFLT1EN_8822B BIT(1)
9871 #define BIT_DATAFLT0EN_8822B BIT(0)
9873 /* 2 REG_BCN_PSR_RPT_8822B (BEACON PARSER REPORT REGISTER) */
9875 #define BIT_SHIFT_DTIM_CNT_8822B 24
9876 #define BIT_MASK_DTIM_CNT_8822B 0xff
9877 #define BIT_DTIM_CNT_8822B(x) \
9878 (((x) & BIT_MASK_DTIM_CNT_8822B) << BIT_SHIFT_DTIM_CNT_8822B)
9879 #define BIT_GET_DTIM_CNT_8822B(x) \
9880 (((x) >> BIT_SHIFT_DTIM_CNT_8822B) & BIT_MASK_DTIM_CNT_8822B)
9882 #define BIT_SHIFT_DTIM_PERIOD_8822B 16
9883 #define BIT_MASK_DTIM_PERIOD_8822B 0xff
9884 #define BIT_DTIM_PERIOD_8822B(x) \
9885 (((x) & BIT_MASK_DTIM_PERIOD_8822B) << BIT_SHIFT_DTIM_PERIOD_8822B)
9886 #define BIT_GET_DTIM_PERIOD_8822B(x) \
9887 (((x) >> BIT_SHIFT_DTIM_PERIOD_8822B) & BIT_MASK_DTIM_PERIOD_8822B)
9889 #define BIT_DTIM_8822B BIT(15)
9890 #define BIT_TIM_8822B BIT(14)
9892 #define BIT_SHIFT_PS_AID_0_8822B 0
9893 #define BIT_MASK_PS_AID_0_8822B 0x7ff
9894 #define BIT_PS_AID_0_8822B(x) \
9895 (((x) & BIT_MASK_PS_AID_0_8822B) << BIT_SHIFT_PS_AID_0_8822B)
9896 #define BIT_GET_PS_AID_0_8822B(x) \
9897 (((x) >> BIT_SHIFT_PS_AID_0_8822B) & BIT_MASK_PS_AID_0_8822B)
9899 /* 2 REG_FLC_TRPC_8822B (TIMER OF FLC_RPC) */
9900 #define BIT_FLC_RPCT_V1_8822B BIT(7)
9901 #define BIT_MODE_8822B BIT(6)
9903 #define BIT_SHIFT_TRPCD_8822B 0
9904 #define BIT_MASK_TRPCD_8822B 0x3f
9905 #define BIT_TRPCD_8822B(x) \
9906 (((x) & BIT_MASK_TRPCD_8822B) << BIT_SHIFT_TRPCD_8822B)
9907 #define BIT_GET_TRPCD_8822B(x) \
9908 (((x) >> BIT_SHIFT_TRPCD_8822B) & BIT_MASK_TRPCD_8822B)
9910 /* 2 REG_FLC_PTS_8822B (PKT TYPE SELECTION OF FLC_RPC T) */
9911 #define BIT_CMF_8822B BIT(2)
9912 #define BIT_CCF_8822B BIT(1)
9913 #define BIT_CDF_8822B BIT(0)
9915 /* 2 REG_FLC_RPCT_8822B (FLC_RPC THRESHOLD) */
9917 #define BIT_SHIFT_FLC_RPCT_8822B 0
9918 #define BIT_MASK_FLC_RPCT_8822B 0xff
9919 #define BIT_FLC_RPCT_8822B(x) \
9920 (((x) & BIT_MASK_FLC_RPCT_8822B) << BIT_SHIFT_FLC_RPCT_8822B)
9921 #define BIT_GET_FLC_RPCT_8822B(x) \
9922 (((x) >> BIT_SHIFT_FLC_RPCT_8822B) & BIT_MASK_FLC_RPCT_8822B)
9924 /* 2 REG_FLC_RPC_8822B (FW LPS CONDITION -- RX PKT COUNTER) */
9926 #define BIT_SHIFT_FLC_RPC_8822B 0
9927 #define BIT_MASK_FLC_RPC_8822B 0xff
9928 #define BIT_FLC_RPC_8822B(x) \
9929 (((x) & BIT_MASK_FLC_RPC_8822B) << BIT_SHIFT_FLC_RPC_8822B)
9930 #define BIT_GET_FLC_RPC_8822B(x) \
9931 (((x) >> BIT_SHIFT_FLC_RPC_8822B) & BIT_MASK_FLC_RPC_8822B)
9933 /* 2 REG_RXPKTMON_CTRL_8822B */
9935 #define BIT_SHIFT_RXBKQPKT_SEQ_8822B 20
9936 #define BIT_MASK_RXBKQPKT_SEQ_8822B 0xf
9937 #define BIT_RXBKQPKT_SEQ_8822B(x) \
9938 (((x) & BIT_MASK_RXBKQPKT_SEQ_8822B) << BIT_SHIFT_RXBKQPKT_SEQ_8822B)
9939 #define BIT_GET_RXBKQPKT_SEQ_8822B(x) \
9940 (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8822B) & BIT_MASK_RXBKQPKT_SEQ_8822B)
9942 #define BIT_SHIFT_RXBEQPKT_SEQ_8822B 16
9943 #define BIT_MASK_RXBEQPKT_SEQ_8822B 0xf
9944 #define BIT_RXBEQPKT_SEQ_8822B(x) \
9945 (((x) & BIT_MASK_RXBEQPKT_SEQ_8822B) << BIT_SHIFT_RXBEQPKT_SEQ_8822B)
9946 #define BIT_GET_RXBEQPKT_SEQ_8822B(x) \
9947 (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8822B) & BIT_MASK_RXBEQPKT_SEQ_8822B)
9949 #define BIT_SHIFT_RXVIQPKT_SEQ_8822B 12
9950 #define BIT_MASK_RXVIQPKT_SEQ_8822B 0xf
9951 #define BIT_RXVIQPKT_SEQ_8822B(x) \
9952 (((x) & BIT_MASK_RXVIQPKT_SEQ_8822B) << BIT_SHIFT_RXVIQPKT_SEQ_8822B)
9953 #define BIT_GET_RXVIQPKT_SEQ_8822B(x) \
9954 (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8822B) & BIT_MASK_RXVIQPKT_SEQ_8822B)
9956 #define BIT_SHIFT_RXVOQPKT_SEQ_8822B 8
9957 #define BIT_MASK_RXVOQPKT_SEQ_8822B 0xf
9958 #define BIT_RXVOQPKT_SEQ_8822B(x) \
9959 (((x) & BIT_MASK_RXVOQPKT_SEQ_8822B) << BIT_SHIFT_RXVOQPKT_SEQ_8822B)
9960 #define BIT_GET_RXVOQPKT_SEQ_8822B(x) \
9961 (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8822B) & BIT_MASK_RXVOQPKT_SEQ_8822B)
9963 #define BIT_RXBKQPKT_ERR_8822B BIT(7)
9964 #define BIT_RXBEQPKT_ERR_8822B BIT(6)
9965 #define BIT_RXVIQPKT_ERR_8822B BIT(5)
9966 #define BIT_RXVOQPKT_ERR_8822B BIT(4)
9967 #define BIT_RXDMA_MON_EN_8822B BIT(2)
9968 #define BIT_RXPKT_MON_RST_8822B BIT(1)
9969 #define BIT_RXPKT_MON_EN_8822B BIT(0)
9971 /* 2 REG_STATE_MON_8822B */
9973 #define BIT_SHIFT_STATE_SEL_8822B 24
9974 #define BIT_MASK_STATE_SEL_8822B 0x1f
9975 #define BIT_STATE_SEL_8822B(x) \
9976 (((x) & BIT_MASK_STATE_SEL_8822B) << BIT_SHIFT_STATE_SEL_8822B)
9977 #define BIT_GET_STATE_SEL_8822B(x) \
9978 (((x) >> BIT_SHIFT_STATE_SEL_8822B) & BIT_MASK_STATE_SEL_8822B)
9980 #define BIT_SHIFT_STATE_INFO_8822B 8
9981 #define BIT_MASK_STATE_INFO_8822B 0xff
9982 #define BIT_STATE_INFO_8822B(x) \
9983 (((x) & BIT_MASK_STATE_INFO_8822B) << BIT_SHIFT_STATE_INFO_8822B)
9984 #define BIT_GET_STATE_INFO_8822B(x) \
9985 (((x) >> BIT_SHIFT_STATE_INFO_8822B) & BIT_MASK_STATE_INFO_8822B)
9987 #define BIT_UPD_NXT_STATE_8822B BIT(7)
9989 #define BIT_SHIFT_CUR_STATE_8822B 0
9990 #define BIT_MASK_CUR_STATE_8822B 0x7f
9991 #define BIT_CUR_STATE_8822B(x) \
9992 (((x) & BIT_MASK_CUR_STATE_8822B) << BIT_SHIFT_CUR_STATE_8822B)
9993 #define BIT_GET_CUR_STATE_8822B(x) \
9994 (((x) >> BIT_SHIFT_CUR_STATE_8822B) & BIT_MASK_CUR_STATE_8822B)
9996 /* 2 REG_ERROR_MON_8822B */
9997 #define BIT_MACRX_ERR_1_8822B BIT(17)
9998 #define BIT_MACRX_ERR_0_8822B BIT(16)
9999 #define BIT_MACTX_ERR_3_8822B BIT(3)
10000 #define BIT_MACTX_ERR_2_8822B BIT(2)
10001 #define BIT_MACTX_ERR_1_8822B BIT(1)
10002 #define BIT_MACTX_ERR_0_8822B BIT(0)
10004 /* 2 REG_SEARCH_MACID_8822B */
10005 #define BIT_EN_TXRPTBUF_CLK_8822B BIT(31)
10007 #define BIT_SHIFT_INFO_INDEX_OFFSET_8822B 16
10008 #define BIT_MASK_INFO_INDEX_OFFSET_8822B 0x1fff
10009 #define BIT_INFO_INDEX_OFFSET_8822B(x) \
10010 (((x) & BIT_MASK_INFO_INDEX_OFFSET_8822B) \
10011 << BIT_SHIFT_INFO_INDEX_OFFSET_8822B)
10012 #define BIT_GET_INFO_INDEX_OFFSET_8822B(x) \
10013 (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8822B) & \
10014 BIT_MASK_INFO_INDEX_OFFSET_8822B)
10016 #define BIT_WMAC_SRCH_FIFOFULL_8822B BIT(15)
10017 #define BIT_DIS_INFOSRCH_8822B BIT(14)
10018 #define BIT_DISABLE_B0_8822B BIT(13)
10020 #define BIT_SHIFT_INFO_ADDR_OFFSET_8822B 0
10021 #define BIT_MASK_INFO_ADDR_OFFSET_8822B 0x1fff
10022 #define BIT_INFO_ADDR_OFFSET_8822B(x) \
10023 (((x) & BIT_MASK_INFO_ADDR_OFFSET_8822B) \
10024 << BIT_SHIFT_INFO_ADDR_OFFSET_8822B)
10025 #define BIT_GET_INFO_ADDR_OFFSET_8822B(x) \
10026 (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8822B) & \
10027 BIT_MASK_INFO_ADDR_OFFSET_8822B)
10029 /* 2 REG_BT_COEX_TABLE_8822B (BT-COEXISTENCE CONTROL REGISTER) */
10030 #define BIT_PRI_MASK_RX_RESP_8822B BIT(126)
10031 #define BIT_PRI_MASK_RXOFDM_8822B BIT(125)
10032 #define BIT_PRI_MASK_RXCCK_8822B BIT(124)
10034 #define BIT_SHIFT_PRI_MASK_TXAC_8822B (117 & CPU_OPT_WIDTH)
10035 #define BIT_MASK_PRI_MASK_TXAC_8822B 0x7f
10036 #define BIT_PRI_MASK_TXAC_8822B(x) \
10037 (((x) & BIT_MASK_PRI_MASK_TXAC_8822B) << BIT_SHIFT_PRI_MASK_TXAC_8822B)
10038 #define BIT_GET_PRI_MASK_TXAC_8822B(x) \
10039 (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8822B) & BIT_MASK_PRI_MASK_TXAC_8822B)
10041 #define BIT_SHIFT_PRI_MASK_NAV_8822B (109 & CPU_OPT_WIDTH)
10042 #define BIT_MASK_PRI_MASK_NAV_8822B 0xff
10043 #define BIT_PRI_MASK_NAV_8822B(x) \
10044 (((x) & BIT_MASK_PRI_MASK_NAV_8822B) << BIT_SHIFT_PRI_MASK_NAV_8822B)
10045 #define BIT_GET_PRI_MASK_NAV_8822B(x) \
10046 (((x) >> BIT_SHIFT_PRI_MASK_NAV_8822B) & BIT_MASK_PRI_MASK_NAV_8822B)
10048 #define BIT_PRI_MASK_CCK_8822B BIT(108)
10049 #define BIT_PRI_MASK_OFDM_8822B BIT(107)
10050 #define BIT_PRI_MASK_RTY_8822B BIT(106)
10052 #define BIT_SHIFT_PRI_MASK_NUM_8822B (102 & CPU_OPT_WIDTH)
10053 #define BIT_MASK_PRI_MASK_NUM_8822B 0xf
10054 #define BIT_PRI_MASK_NUM_8822B(x) \
10055 (((x) & BIT_MASK_PRI_MASK_NUM_8822B) << BIT_SHIFT_PRI_MASK_NUM_8822B)
10056 #define BIT_GET_PRI_MASK_NUM_8822B(x) \
10057 (((x) >> BIT_SHIFT_PRI_MASK_NUM_8822B) & BIT_MASK_PRI_MASK_NUM_8822B)
10059 #define BIT_SHIFT_PRI_MASK_TYPE_8822B (98 & CPU_OPT_WIDTH)
10060 #define BIT_MASK_PRI_MASK_TYPE_8822B 0xf
10061 #define BIT_PRI_MASK_TYPE_8822B(x) \
10062 (((x) & BIT_MASK_PRI_MASK_TYPE_8822B) << BIT_SHIFT_PRI_MASK_TYPE_8822B)
10063 #define BIT_GET_PRI_MASK_TYPE_8822B(x) \
10064 (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8822B) & BIT_MASK_PRI_MASK_TYPE_8822B)
10066 #define BIT_OOB_8822B BIT(97)
10067 #define BIT_ANT_SEL_8822B BIT(96)
10069 #define BIT_SHIFT_BREAK_TABLE_2_8822B (80 & CPU_OPT_WIDTH)
10070 #define BIT_MASK_BREAK_TABLE_2_8822B 0xffff
10071 #define BIT_BREAK_TABLE_2_8822B(x) \
10072 (((x) & BIT_MASK_BREAK_TABLE_2_8822B) << BIT_SHIFT_BREAK_TABLE_2_8822B)
10073 #define BIT_GET_BREAK_TABLE_2_8822B(x) \
10074 (((x) >> BIT_SHIFT_BREAK_TABLE_2_8822B) & BIT_MASK_BREAK_TABLE_2_8822B)
10076 #define BIT_SHIFT_BREAK_TABLE_1_8822B (64 & CPU_OPT_WIDTH)
10077 #define BIT_MASK_BREAK_TABLE_1_8822B 0xffff
10078 #define BIT_BREAK_TABLE_1_8822B(x) \
10079 (((x) & BIT_MASK_BREAK_TABLE_1_8822B) << BIT_SHIFT_BREAK_TABLE_1_8822B)
10080 #define BIT_GET_BREAK_TABLE_1_8822B(x) \
10081 (((x) >> BIT_SHIFT_BREAK_TABLE_1_8822B) & BIT_MASK_BREAK_TABLE_1_8822B)
10083 #define BIT_SHIFT_COEX_TABLE_2_8822B (32 & CPU_OPT_WIDTH)
10084 #define BIT_MASK_COEX_TABLE_2_8822B 0xffffffffL
10085 #define BIT_COEX_TABLE_2_8822B(x) \
10086 (((x) & BIT_MASK_COEX_TABLE_2_8822B) << BIT_SHIFT_COEX_TABLE_2_8822B)
10087 #define BIT_GET_COEX_TABLE_2_8822B(x) \
10088 (((x) >> BIT_SHIFT_COEX_TABLE_2_8822B) & BIT_MASK_COEX_TABLE_2_8822B)
10090 #define BIT_SHIFT_COEX_TABLE_1_8822B 0
10091 #define BIT_MASK_COEX_TABLE_1_8822B 0xffffffffL
10092 #define BIT_COEX_TABLE_1_8822B(x) \
10093 (((x) & BIT_MASK_COEX_TABLE_1_8822B) << BIT_SHIFT_COEX_TABLE_1_8822B)
10094 #define BIT_GET_COEX_TABLE_1_8822B(x) \
10095 (((x) >> BIT_SHIFT_COEX_TABLE_1_8822B) & BIT_MASK_COEX_TABLE_1_8822B)
10097 /* 2 REG_RXCMD_0_8822B */
10098 #define BIT_RXCMD_EN_8822B BIT(31)
10100 #define BIT_SHIFT_RXCMD_INFO_8822B 0
10101 #define BIT_MASK_RXCMD_INFO_8822B 0x7fffffffL
10102 #define BIT_RXCMD_INFO_8822B(x) \
10103 (((x) & BIT_MASK_RXCMD_INFO_8822B) << BIT_SHIFT_RXCMD_INFO_8822B)
10104 #define BIT_GET_RXCMD_INFO_8822B(x) \
10105 (((x) >> BIT_SHIFT_RXCMD_INFO_8822B) & BIT_MASK_RXCMD_INFO_8822B)
10107 /* 2 REG_RXCMD_1_8822B */
10109 #define BIT_SHIFT_RXCMD_PRD_8822B 0
10110 #define BIT_MASK_RXCMD_PRD_8822B 0xffff
10111 #define BIT_RXCMD_PRD_8822B(x) \
10112 (((x) & BIT_MASK_RXCMD_PRD_8822B) << BIT_SHIFT_RXCMD_PRD_8822B)
10113 #define BIT_GET_RXCMD_PRD_8822B(x) \
10114 (((x) >> BIT_SHIFT_RXCMD_PRD_8822B) & BIT_MASK_RXCMD_PRD_8822B)
10116 /* 2 REG_NOT_VALID_8822B */
10118 /* 2 REG_WMAC_RESP_TXINFO_8822B (RESPONSE TXINFO REGISTER) */
10120 #define BIT_SHIFT_WMAC_RESP_MFB_8822B 25
10121 #define BIT_MASK_WMAC_RESP_MFB_8822B 0x7f
10122 #define BIT_WMAC_RESP_MFB_8822B(x) \
10123 (((x) & BIT_MASK_WMAC_RESP_MFB_8822B) << BIT_SHIFT_WMAC_RESP_MFB_8822B)
10124 #define BIT_GET_WMAC_RESP_MFB_8822B(x) \
10125 (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8822B) & BIT_MASK_WMAC_RESP_MFB_8822B)
10127 #define BIT_SHIFT_WMAC_ANTINF_SEL_8822B 23
10128 #define BIT_MASK_WMAC_ANTINF_SEL_8822B 0x3
10129 #define BIT_WMAC_ANTINF_SEL_8822B(x) \
10130 (((x) & BIT_MASK_WMAC_ANTINF_SEL_8822B) \
10131 << BIT_SHIFT_WMAC_ANTINF_SEL_8822B)
10132 #define BIT_GET_WMAC_ANTINF_SEL_8822B(x) \
10133 (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8822B) & \
10134 BIT_MASK_WMAC_ANTINF_SEL_8822B)
10136 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8822B 21
10137 #define BIT_MASK_WMAC_ANTSEL_SEL_8822B 0x3
10138 #define BIT_WMAC_ANTSEL_SEL_8822B(x) \
10139 (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8822B) \
10140 << BIT_SHIFT_WMAC_ANTSEL_SEL_8822B)
10141 #define BIT_GET_WMAC_ANTSEL_SEL_8822B(x) \
10142 (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8822B) & \
10143 BIT_MASK_WMAC_ANTSEL_SEL_8822B)
10145 #define BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B 18
10146 #define BIT_MASK_R_WMAC_RESP_TXPOWER_8822B 0x7
10147 #define BIT_R_WMAC_RESP_TXPOWER_8822B(x) \
10148 (((x) & BIT_MASK_R_WMAC_RESP_TXPOWER_8822B) \
10149 << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B)
10150 #define BIT_GET_R_WMAC_RESP_TXPOWER_8822B(x) \
10151 (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B) & \
10152 BIT_MASK_R_WMAC_RESP_TXPOWER_8822B)
10154 #define BIT_SHIFT_WMAC_RESP_TXANT_8822B 0
10155 #define BIT_MASK_WMAC_RESP_TXANT_8822B 0x3ffff
10156 #define BIT_WMAC_RESP_TXANT_8822B(x) \
10157 (((x) & BIT_MASK_WMAC_RESP_TXANT_8822B) \
10158 << BIT_SHIFT_WMAC_RESP_TXANT_8822B)
10159 #define BIT_GET_WMAC_RESP_TXANT_8822B(x) \
10160 (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8822B) & \
10161 BIT_MASK_WMAC_RESP_TXANT_8822B)
10163 /* 2 REG_BBPSF_CTRL_8822B */
10164 #define BIT_CTL_IDLE_CLR_CSI_RPT_8822B BIT(31)
10165 #define BIT_WMAC_USE_NDPARATE_8822B BIT(30)
10167 #define BIT_SHIFT_WMAC_CSI_RATE_8822B 24
10168 #define BIT_MASK_WMAC_CSI_RATE_8822B 0x3f
10169 #define BIT_WMAC_CSI_RATE_8822B(x) \
10170 (((x) & BIT_MASK_WMAC_CSI_RATE_8822B) << BIT_SHIFT_WMAC_CSI_RATE_8822B)
10171 #define BIT_GET_WMAC_CSI_RATE_8822B(x) \
10172 (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8822B) & BIT_MASK_WMAC_CSI_RATE_8822B)
10174 #define BIT_SHIFT_WMAC_RESP_TXRATE_8822B 16
10175 #define BIT_MASK_WMAC_RESP_TXRATE_8822B 0xff
10176 #define BIT_WMAC_RESP_TXRATE_8822B(x) \
10177 (((x) & BIT_MASK_WMAC_RESP_TXRATE_8822B) \
10178 << BIT_SHIFT_WMAC_RESP_TXRATE_8822B)
10179 #define BIT_GET_WMAC_RESP_TXRATE_8822B(x) \
10180 (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8822B) & \
10181 BIT_MASK_WMAC_RESP_TXRATE_8822B)
10183 #define BIT_BBPSF_MPDUCHKEN_8822B BIT(5)
10184 #define BIT_BBPSF_MHCHKEN_8822B BIT(4)
10185 #define BIT_BBPSF_ERRCHKEN_8822B BIT(3)
10187 #define BIT_SHIFT_BBPSF_ERRTHR_8822B 0
10188 #define BIT_MASK_BBPSF_ERRTHR_8822B 0x7
10189 #define BIT_BBPSF_ERRTHR_8822B(x) \
10190 (((x) & BIT_MASK_BBPSF_ERRTHR_8822B) << BIT_SHIFT_BBPSF_ERRTHR_8822B)
10191 #define BIT_GET_BBPSF_ERRTHR_8822B(x) \
10192 (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8822B) & BIT_MASK_BBPSF_ERRTHR_8822B)
10194 /* 2 REG_NOT_VALID_8822B */
10196 /* 2 REG_P2P_RX_BCN_NOA_8822B (P2P RX BEACON NOA REGISTER) */
10197 #define BIT_NOA_PARSER_EN_8822B BIT(15)
10198 #define BIT_BSSID_SEL_8822B BIT(14)
10200 #define BIT_SHIFT_P2P_OUI_TYPE_8822B 0
10201 #define BIT_MASK_P2P_OUI_TYPE_8822B 0xff
10202 #define BIT_P2P_OUI_TYPE_8822B(x) \
10203 (((x) & BIT_MASK_P2P_OUI_TYPE_8822B) << BIT_SHIFT_P2P_OUI_TYPE_8822B)
10204 #define BIT_GET_P2P_OUI_TYPE_8822B(x) \
10205 (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8822B) & BIT_MASK_P2P_OUI_TYPE_8822B)
10207 /* 2 REG_ASSOCIATED_BFMER0_INFO_8822B (ASSOCIATED BEAMFORMER0 INFO REGISTER) */
10209 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B (48 & CPU_OPT_WIDTH)
10210 #define BIT_MASK_R_WMAC_TXCSI_AID0_8822B 0x1ff
10211 #define BIT_R_WMAC_TXCSI_AID0_8822B(x) \
10212 (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8822B) \
10213 << BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B)
10214 #define BIT_GET_R_WMAC_TXCSI_AID0_8822B(x) \
10215 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B) & \
10216 BIT_MASK_R_WMAC_TXCSI_AID0_8822B)
10218 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B 0
10219 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B 0xffffffffffffL
10220 #define BIT_R_WMAC_SOUNDING_RXADD_R0_8822B(x) \
10221 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B) \
10222 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B)
10223 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8822B(x) \
10224 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B) & \
10225 BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B)
10227 /* 2 REG_ASSOCIATED_BFMER1_INFO_8822B (ASSOCIATED BEAMFORMER1 INFO REGISTER) */
10229 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B (48 & CPU_OPT_WIDTH)
10230 #define BIT_MASK_R_WMAC_TXCSI_AID1_8822B 0x1ff
10231 #define BIT_R_WMAC_TXCSI_AID1_8822B(x) \
10232 (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8822B) \
10233 << BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B)
10234 #define BIT_GET_R_WMAC_TXCSI_AID1_8822B(x) \
10235 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B) & \
10236 BIT_MASK_R_WMAC_TXCSI_AID1_8822B)
10238 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B 0
10239 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B 0xffffffffffffL
10240 #define BIT_R_WMAC_SOUNDING_RXADD_R1_8822B(x) \
10241 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B) \
10242 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B)
10243 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8822B(x) \
10244 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B) & \
10245 BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B)
10247 /* 2 REG_TX_CSI_RPT_PARAM_BW20_8822B (TX CSI REPORT PARAMETER REGISTER) */
10249 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B 16
10250 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8822B 0xfff
10251 #define BIT_R_WMAC_BFINFO_20M_1_8822B(x) \
10252 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8822B) \
10253 << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B)
10254 #define BIT_GET_R_WMAC_BFINFO_20M_1_8822B(x) \
10255 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B) & \
10256 BIT_MASK_R_WMAC_BFINFO_20M_1_8822B)
10258 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B 0
10259 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8822B 0xfff
10260 #define BIT_R_WMAC_BFINFO_20M_0_8822B(x) \
10261 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8822B) \
10262 << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B)
10263 #define BIT_GET_R_WMAC_BFINFO_20M_0_8822B(x) \
10264 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B) & \
10265 BIT_MASK_R_WMAC_BFINFO_20M_0_8822B)
10267 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8822B (TX CSI REPORT PARAMETER_BW40 REGISTER) */
10269 #define BIT_SHIFT_WMAC_RESP_ANTCD_8822B 0
10270 #define BIT_MASK_WMAC_RESP_ANTCD_8822B 0xf
10271 #define BIT_WMAC_RESP_ANTCD_8822B(x) \
10272 (((x) & BIT_MASK_WMAC_RESP_ANTCD_8822B) \
10273 << BIT_SHIFT_WMAC_RESP_ANTCD_8822B)
10274 #define BIT_GET_WMAC_RESP_ANTCD_8822B(x) \
10275 (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8822B) & \
10276 BIT_MASK_WMAC_RESP_ANTCD_8822B)
10278 /* 2 REG_TX_CSI_RPT_PARAM_BW80_8822B (TX CSI REPORT PARAMETER_BW80 REGISTER) */
10280 /* 2 REG_BCN_PSR_RPT2_8822B (BEACON PARSER REPORT REGISTER2) */
10282 #define BIT_SHIFT_DTIM_CNT2_8822B 24
10283 #define BIT_MASK_DTIM_CNT2_8822B 0xff
10284 #define BIT_DTIM_CNT2_8822B(x) \
10285 (((x) & BIT_MASK_DTIM_CNT2_8822B) << BIT_SHIFT_DTIM_CNT2_8822B)
10286 #define BIT_GET_DTIM_CNT2_8822B(x) \
10287 (((x) >> BIT_SHIFT_DTIM_CNT2_8822B) & BIT_MASK_DTIM_CNT2_8822B)
10289 #define BIT_SHIFT_DTIM_PERIOD2_8822B 16
10290 #define BIT_MASK_DTIM_PERIOD2_8822B 0xff
10291 #define BIT_DTIM_PERIOD2_8822B(x) \
10292 (((x) & BIT_MASK_DTIM_PERIOD2_8822B) << BIT_SHIFT_DTIM_PERIOD2_8822B)
10293 #define BIT_GET_DTIM_PERIOD2_8822B(x) \
10294 (((x) >> BIT_SHIFT_DTIM_PERIOD2_8822B) & BIT_MASK_DTIM_PERIOD2_8822B)
10296 #define BIT_DTIM2_8822B BIT(15)
10297 #define BIT_TIM2_8822B BIT(14)
10299 #define BIT_SHIFT_PS_AID_2_8822B 0
10300 #define BIT_MASK_PS_AID_2_8822B 0x7ff
10301 #define BIT_PS_AID_2_8822B(x) \
10302 (((x) & BIT_MASK_PS_AID_2_8822B) << BIT_SHIFT_PS_AID_2_8822B)
10303 #define BIT_GET_PS_AID_2_8822B(x) \
10304 (((x) >> BIT_SHIFT_PS_AID_2_8822B) & BIT_MASK_PS_AID_2_8822B)
10306 /* 2 REG_BCN_PSR_RPT3_8822B (BEACON PARSER REPORT REGISTER3) */
10308 #define BIT_SHIFT_DTIM_CNT3_8822B 24
10309 #define BIT_MASK_DTIM_CNT3_8822B 0xff
10310 #define BIT_DTIM_CNT3_8822B(x) \
10311 (((x) & BIT_MASK_DTIM_CNT3_8822B) << BIT_SHIFT_DTIM_CNT3_8822B)
10312 #define BIT_GET_DTIM_CNT3_8822B(x) \
10313 (((x) >> BIT_SHIFT_DTIM_CNT3_8822B) & BIT_MASK_DTIM_CNT3_8822B)
10315 #define BIT_SHIFT_DTIM_PERIOD3_8822B 16
10316 #define BIT_MASK_DTIM_PERIOD3_8822B 0xff
10317 #define BIT_DTIM_PERIOD3_8822B(x) \
10318 (((x) & BIT_MASK_DTIM_PERIOD3_8822B) << BIT_SHIFT_DTIM_PERIOD3_8822B)
10319 #define BIT_GET_DTIM_PERIOD3_8822B(x) \
10320 (((x) >> BIT_SHIFT_DTIM_PERIOD3_8822B) & BIT_MASK_DTIM_PERIOD3_8822B)
10322 #define BIT_DTIM3_8822B BIT(15)
10323 #define BIT_TIM3_8822B BIT(14)
10325 #define BIT_SHIFT_PS_AID_3_8822B 0
10326 #define BIT_MASK_PS_AID_3_8822B 0x7ff
10327 #define BIT_PS_AID_3_8822B(x) \
10328 (((x) & BIT_MASK_PS_AID_3_8822B) << BIT_SHIFT_PS_AID_3_8822B)
10329 #define BIT_GET_PS_AID_3_8822B(x) \
10330 (((x) >> BIT_SHIFT_PS_AID_3_8822B) & BIT_MASK_PS_AID_3_8822B)
10332 /* 2 REG_BCN_PSR_RPT4_8822B (BEACON PARSER REPORT REGISTER4) */
10334 #define BIT_SHIFT_DTIM_CNT4_8822B 24
10335 #define BIT_MASK_DTIM_CNT4_8822B 0xff
10336 #define BIT_DTIM_CNT4_8822B(x) \
10337 (((x) & BIT_MASK_DTIM_CNT4_8822B) << BIT_SHIFT_DTIM_CNT4_8822B)
10338 #define BIT_GET_DTIM_CNT4_8822B(x) \
10339 (((x) >> BIT_SHIFT_DTIM_CNT4_8822B) & BIT_MASK_DTIM_CNT4_8822B)
10341 #define BIT_SHIFT_DTIM_PERIOD4_8822B 16
10342 #define BIT_MASK_DTIM_PERIOD4_8822B 0xff
10343 #define BIT_DTIM_PERIOD4_8822B(x) \
10344 (((x) & BIT_MASK_DTIM_PERIOD4_8822B) << BIT_SHIFT_DTIM_PERIOD4_8822B)
10345 #define BIT_GET_DTIM_PERIOD4_8822B(x) \
10346 (((x) >> BIT_SHIFT_DTIM_PERIOD4_8822B) & BIT_MASK_DTIM_PERIOD4_8822B)
10348 #define BIT_DTIM4_8822B BIT(15)
10349 #define BIT_TIM4_8822B BIT(14)
10351 #define BIT_SHIFT_PS_AID_4_8822B 0
10352 #define BIT_MASK_PS_AID_4_8822B 0x7ff
10353 #define BIT_PS_AID_4_8822B(x) \
10354 (((x) & BIT_MASK_PS_AID_4_8822B) << BIT_SHIFT_PS_AID_4_8822B)
10355 #define BIT_GET_PS_AID_4_8822B(x) \
10356 (((x) >> BIT_SHIFT_PS_AID_4_8822B) & BIT_MASK_PS_AID_4_8822B)
10358 /* 2 REG_A1_ADDR_MASK_8822B (A1 ADDR MASK REGISTER) */
10360 #define BIT_SHIFT_A1_ADDR_MASK_8822B 0
10361 #define BIT_MASK_A1_ADDR_MASK_8822B 0xffffffffL
10362 #define BIT_A1_ADDR_MASK_8822B(x) \
10363 (((x) & BIT_MASK_A1_ADDR_MASK_8822B) << BIT_SHIFT_A1_ADDR_MASK_8822B)
10364 #define BIT_GET_A1_ADDR_MASK_8822B(x) \
10365 (((x) >> BIT_SHIFT_A1_ADDR_MASK_8822B) & BIT_MASK_A1_ADDR_MASK_8822B)
10367 /* 2 REG_MACID2_8822B (MAC ID2 REGISTER) */
10369 #define BIT_SHIFT_MACID2_8822B 0
10370 #define BIT_MASK_MACID2_8822B 0xffffffffffffL
10371 #define BIT_MACID2_8822B(x) \
10372 (((x) & BIT_MASK_MACID2_8822B) << BIT_SHIFT_MACID2_8822B)
10373 #define BIT_GET_MACID2_8822B(x) \
10374 (((x) >> BIT_SHIFT_MACID2_8822B) & BIT_MASK_MACID2_8822B)
10376 /* 2 REG_BSSID2_8822B (BSSID2 REGISTER) */
10378 #define BIT_SHIFT_BSSID2_8822B 0
10379 #define BIT_MASK_BSSID2_8822B 0xffffffffffffL
10380 #define BIT_BSSID2_8822B(x) \
10381 (((x) & BIT_MASK_BSSID2_8822B) << BIT_SHIFT_BSSID2_8822B)
10382 #define BIT_GET_BSSID2_8822B(x) \
10383 (((x) >> BIT_SHIFT_BSSID2_8822B) & BIT_MASK_BSSID2_8822B)
10385 /* 2 REG_MACID3_8822B (MAC ID3 REGISTER) */
10387 #define BIT_SHIFT_MACID3_8822B 0
10388 #define BIT_MASK_MACID3_8822B 0xffffffffffffL
10389 #define BIT_MACID3_8822B(x) \
10390 (((x) & BIT_MASK_MACID3_8822B) << BIT_SHIFT_MACID3_8822B)
10391 #define BIT_GET_MACID3_8822B(x) \
10392 (((x) >> BIT_SHIFT_MACID3_8822B) & BIT_MASK_MACID3_8822B)
10394 /* 2 REG_BSSID3_8822B (BSSID3 REGISTER) */
10396 #define BIT_SHIFT_BSSID3_8822B 0
10397 #define BIT_MASK_BSSID3_8822B 0xffffffffffffL
10398 #define BIT_BSSID3_8822B(x) \
10399 (((x) & BIT_MASK_BSSID3_8822B) << BIT_SHIFT_BSSID3_8822B)
10400 #define BIT_GET_BSSID3_8822B(x) \
10401 (((x) >> BIT_SHIFT_BSSID3_8822B) & BIT_MASK_BSSID3_8822B)
10403 /* 2 REG_MACID4_8822B (MAC ID4 REGISTER) */
10405 #define BIT_SHIFT_MACID4_8822B 0
10406 #define BIT_MASK_MACID4_8822B 0xffffffffffffL
10407 #define BIT_MACID4_8822B(x) \
10408 (((x) & BIT_MASK_MACID4_8822B) << BIT_SHIFT_MACID4_8822B)
10409 #define BIT_GET_MACID4_8822B(x) \
10410 (((x) >> BIT_SHIFT_MACID4_8822B) & BIT_MASK_MACID4_8822B)
10412 /* 2 REG_BSSID4_8822B (BSSID4 REGISTER) */
10414 #define BIT_SHIFT_BSSID4_8822B 0
10415 #define BIT_MASK_BSSID4_8822B 0xffffffffffffL
10416 #define BIT_BSSID4_8822B(x) \
10417 (((x) & BIT_MASK_BSSID4_8822B) << BIT_SHIFT_BSSID4_8822B)
10418 #define BIT_GET_BSSID4_8822B(x) \
10419 (((x) >> BIT_SHIFT_BSSID4_8822B) & BIT_MASK_BSSID4_8822B)
10421 /* 2 REG_NOA_REPORT_8822B */
10423 /* 2 REG_PWRBIT_SETTING_8822B */
10424 #define BIT_CLI3_PWRBIT_OW_EN_8822B BIT(7)
10425 #define BIT_CLI3_PWR_ST_8822B BIT(6)
10426 #define BIT_CLI2_PWRBIT_OW_EN_8822B BIT(5)
10427 #define BIT_CLI2_PWR_ST_8822B BIT(4)
10428 #define BIT_CLI1_PWRBIT_OW_EN_8822B BIT(3)
10429 #define BIT_CLI1_PWR_ST_8822B BIT(2)
10430 #define BIT_CLI0_PWRBIT_OW_EN_8822B BIT(1)
10431 #define BIT_CLI0_PWR_ST_8822B BIT(0)
10433 /* 2 REG_WMAC_MU_BF_OPTION_8822B */
10434 #define BIT_WMAC_RESP_NONSTA1_DIS_8822B BIT(7)
10435 #define BIT_BIT_WMAC_TXMU_ACKPOLICY_EN_8822B BIT(6)
10437 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B 4
10438 #define BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B 0x3
10439 #define BIT_WMAC_TXMU_ACKPOLICY_8822B(x) \
10440 (((x) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B) \
10441 << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B)
10442 #define BIT_GET_WMAC_TXMU_ACKPOLICY_8822B(x) \
10443 (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B) & \
10444 BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B)
10446 #define BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B 1
10447 #define BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B 0x7
10448 #define BIT_WMAC_MU_BFEE_PORT_SEL_8822B(x) \
10449 (((x) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B) \
10450 << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B)
10451 #define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8822B(x) \
10452 (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B) & \
10453 BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B)
10455 #define BIT_WMAC_MU_BFEE_DIS_8822B BIT(0)
10457 /* 2 REG_NOT_VALID_8822B */
10459 #define BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B 0
10460 #define BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B 0xff
10461 #define BIT_WMAC_PAUSE_BB_CLR_TH_8822B(x) \
10462 (((x) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B) \
10463 << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B)
10464 #define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8822B(x) \
10465 (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B) & \
10466 BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B)
10468 /* 2 REG_WMAC_MU_ARB_8822B */
10469 #define BIT_WMAC_ARB_HW_ADAPT_EN_8822B BIT(7)
10470 #define BIT_WMAC_ARB_SW_EN_8822B BIT(6)
10472 #define BIT_SHIFT_WMAC_ARB_SW_STATE_8822B 0
10473 #define BIT_MASK_WMAC_ARB_SW_STATE_8822B 0x3f
10474 #define BIT_WMAC_ARB_SW_STATE_8822B(x) \
10475 (((x) & BIT_MASK_WMAC_ARB_SW_STATE_8822B) \
10476 << BIT_SHIFT_WMAC_ARB_SW_STATE_8822B)
10477 #define BIT_GET_WMAC_ARB_SW_STATE_8822B(x) \
10478 (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8822B) & \
10479 BIT_MASK_WMAC_ARB_SW_STATE_8822B)
10481 /* 2 REG_WMAC_MU_OPTION_8822B */
10483 #define BIT_SHIFT_WMAC_MU_DBGSEL_8822B 5
10484 #define BIT_MASK_WMAC_MU_DBGSEL_8822B 0x3
10485 #define BIT_WMAC_MU_DBGSEL_8822B(x) \
10486 (((x) & BIT_MASK_WMAC_MU_DBGSEL_8822B) \
10487 << BIT_SHIFT_WMAC_MU_DBGSEL_8822B)
10488 #define BIT_GET_WMAC_MU_DBGSEL_8822B(x) \
10489 (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8822B) & \
10490 BIT_MASK_WMAC_MU_DBGSEL_8822B)
10492 #define BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B 0
10493 #define BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B 0x1f
10494 #define BIT_WMAC_MU_CPRD_TIMEOUT_8822B(x) \
10495 (((x) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B) \
10496 << BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B)
10497 #define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8822B(x) \
10498 (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B) & \
10499 BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B)
10501 /* 2 REG_WMAC_MU_BF_CTL_8822B */
10502 #define BIT_WMAC_INVLD_BFPRT_CHK_8822B BIT(15)
10503 #define BIT_WMAC_RETXBFRPTSEQ_UPD_8822B BIT(14)
10505 #define BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B 12
10506 #define BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B 0x3
10507 #define BIT_WMAC_MU_BFRPTSEG_SEL_8822B(x) \
10508 (((x) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B) \
10509 << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B)
10510 #define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8822B(x) \
10511 (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B) & \
10512 BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B)
10514 #define BIT_SHIFT_WMAC_MU_BF_MYAID_8822B 0
10515 #define BIT_MASK_WMAC_MU_BF_MYAID_8822B 0xfff
10516 #define BIT_WMAC_MU_BF_MYAID_8822B(x) \
10517 (((x) & BIT_MASK_WMAC_MU_BF_MYAID_8822B) \
10518 << BIT_SHIFT_WMAC_MU_BF_MYAID_8822B)
10519 #define BIT_GET_WMAC_MU_BF_MYAID_8822B(x) \
10520 (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8822B) & \
10521 BIT_MASK_WMAC_MU_BF_MYAID_8822B)
10523 /* 2 REG_WMAC_MU_BFRPT_PARA_8822B */
10525 #define BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B 12
10526 #define BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B 0x7
10527 #define BIT_BIT_BFRPT_PARA_USERID_SEL_8822B(x) \
10528 (((x) & BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B) \
10529 << BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B)
10530 #define BIT_GET_BIT_BFRPT_PARA_USERID_SEL_8822B(x) \
10531 (((x) >> BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B) & \
10532 BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B)
10534 #define BIT_SHIFT_BFRPT_PARA_8822B 0
10535 #define BIT_MASK_BFRPT_PARA_8822B 0xfff
10536 #define BIT_BFRPT_PARA_8822B(x) \
10537 (((x) & BIT_MASK_BFRPT_PARA_8822B) << BIT_SHIFT_BFRPT_PARA_8822B)
10538 #define BIT_GET_BFRPT_PARA_8822B(x) \
10539 (((x) >> BIT_SHIFT_BFRPT_PARA_8822B) & BIT_MASK_BFRPT_PARA_8822B)
10541 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE2_8822B */
10542 #define BIT_STATUS_BFEE2_8822B BIT(10)
10543 #define BIT_WMAC_MU_BFEE2_EN_8822B BIT(9)
10545 #define BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B 0
10546 #define BIT_MASK_WMAC_MU_BFEE2_AID_8822B 0x1ff
10547 #define BIT_WMAC_MU_BFEE2_AID_8822B(x) \
10548 (((x) & BIT_MASK_WMAC_MU_BFEE2_AID_8822B) \
10549 << BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B)
10550 #define BIT_GET_WMAC_MU_BFEE2_AID_8822B(x) \
10551 (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B) & \
10552 BIT_MASK_WMAC_MU_BFEE2_AID_8822B)
10554 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE3_8822B */
10555 #define BIT_STATUS_BFEE3_8822B BIT(10)
10556 #define BIT_WMAC_MU_BFEE3_EN_8822B BIT(9)
10558 #define BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B 0
10559 #define BIT_MASK_WMAC_MU_BFEE3_AID_8822B 0x1ff
10560 #define BIT_WMAC_MU_BFEE3_AID_8822B(x) \
10561 (((x) & BIT_MASK_WMAC_MU_BFEE3_AID_8822B) \
10562 << BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B)
10563 #define BIT_GET_WMAC_MU_BFEE3_AID_8822B(x) \
10564 (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B) & \
10565 BIT_MASK_WMAC_MU_BFEE3_AID_8822B)
10567 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE4_8822B */
10568 #define BIT_STATUS_BFEE4_8822B BIT(10)
10569 #define BIT_WMAC_MU_BFEE4_EN_8822B BIT(9)
10571 #define BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B 0
10572 #define BIT_MASK_WMAC_MU_BFEE4_AID_8822B 0x1ff
10573 #define BIT_WMAC_MU_BFEE4_AID_8822B(x) \
10574 (((x) & BIT_MASK_WMAC_MU_BFEE4_AID_8822B) \
10575 << BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B)
10576 #define BIT_GET_WMAC_MU_BFEE4_AID_8822B(x) \
10577 (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B) & \
10578 BIT_MASK_WMAC_MU_BFEE4_AID_8822B)
10580 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE5_8822B */
10581 #define BIT_STATUS_BFEE5_8822B BIT(10)
10582 #define BIT_WMAC_MU_BFEE5_EN_8822B BIT(9)
10584 #define BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B 0
10585 #define BIT_MASK_WMAC_MU_BFEE5_AID_8822B 0x1ff
10586 #define BIT_WMAC_MU_BFEE5_AID_8822B(x) \
10587 (((x) & BIT_MASK_WMAC_MU_BFEE5_AID_8822B) \
10588 << BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B)
10589 #define BIT_GET_WMAC_MU_BFEE5_AID_8822B(x) \
10590 (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B) & \
10591 BIT_MASK_WMAC_MU_BFEE5_AID_8822B)
10593 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE6_8822B */
10594 #define BIT_STATUS_BFEE6_8822B BIT(10)
10595 #define BIT_WMAC_MU_BFEE6_EN_8822B BIT(9)
10597 #define BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B 0
10598 #define BIT_MASK_WMAC_MU_BFEE6_AID_8822B 0x1ff
10599 #define BIT_WMAC_MU_BFEE6_AID_8822B(x) \
10600 (((x) & BIT_MASK_WMAC_MU_BFEE6_AID_8822B) \
10601 << BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B)
10602 #define BIT_GET_WMAC_MU_BFEE6_AID_8822B(x) \
10603 (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B) & \
10604 BIT_MASK_WMAC_MU_BFEE6_AID_8822B)
10606 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE7_8822B */
10607 #define BIT_BIT_STATUS_BFEE4_8822B BIT(10)
10608 #define BIT_WMAC_MU_BFEE7_EN_8822B BIT(9)
10610 #define BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B 0
10611 #define BIT_MASK_WMAC_MU_BFEE7_AID_8822B 0x1ff
10612 #define BIT_WMAC_MU_BFEE7_AID_8822B(x) \
10613 (((x) & BIT_MASK_WMAC_MU_BFEE7_AID_8822B) \
10614 << BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B)
10615 #define BIT_GET_WMAC_MU_BFEE7_AID_8822B(x) \
10616 (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B) & \
10617 BIT_MASK_WMAC_MU_BFEE7_AID_8822B)
10619 /* 2 REG_NOT_VALID_8822B */
10620 #define BIT_RST_ALL_COUNTER_8822B BIT(31)
10622 #define BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B 16
10623 #define BIT_MASK_ABORT_RX_VBON_COUNTER_8822B 0xff
10624 #define BIT_ABORT_RX_VBON_COUNTER_8822B(x) \
10625 (((x) & BIT_MASK_ABORT_RX_VBON_COUNTER_8822B) \
10626 << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B)
10627 #define BIT_GET_ABORT_RX_VBON_COUNTER_8822B(x) \
10628 (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B) & \
10629 BIT_MASK_ABORT_RX_VBON_COUNTER_8822B)
10631 #define BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B 8
10632 #define BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B 0xff
10633 #define BIT_ABORT_RX_RDRDY_COUNTER_8822B(x) \
10634 (((x) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B) \
10635 << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B)
10636 #define BIT_GET_ABORT_RX_RDRDY_COUNTER_8822B(x) \
10637 (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B) & \
10638 BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B)
10640 #define BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B 0
10641 #define BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B 0xff
10642 #define BIT_VBON_EARLY_FALLING_COUNTER_8822B(x) \
10643 (((x) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B) \
10644 << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B)
10645 #define BIT_GET_VBON_EARLY_FALLING_COUNTER_8822B(x) \
10646 (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B) & \
10647 BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B)
10649 /* 2 REG_NOT_VALID_8822B */
10650 #define BIT_WMAC_PLCP_TRX_SEL_8822B BIT(31)
10652 #define BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B 28
10653 #define BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B 0x7
10654 #define BIT_WMAC_PLCP_RDSIG_SEL_8822B(x) \
10655 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B) \
10656 << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B)
10657 #define BIT_GET_WMAC_PLCP_RDSIG_SEL_8822B(x) \
10658 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B) & \
10659 BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B)
10661 #define BIT_SHIFT_WMAC_RATE_IDX_8822B 24
10662 #define BIT_MASK_WMAC_RATE_IDX_8822B 0xf
10663 #define BIT_WMAC_RATE_IDX_8822B(x) \
10664 (((x) & BIT_MASK_WMAC_RATE_IDX_8822B) << BIT_SHIFT_WMAC_RATE_IDX_8822B)
10665 #define BIT_GET_WMAC_RATE_IDX_8822B(x) \
10666 (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8822B) & BIT_MASK_WMAC_RATE_IDX_8822B)
10668 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8822B 0
10669 #define BIT_MASK_WMAC_PLCP_RDSIG_8822B 0xffffff
10670 #define BIT_WMAC_PLCP_RDSIG_8822B(x) \
10671 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8822B) \
10672 << BIT_SHIFT_WMAC_PLCP_RDSIG_8822B)
10673 #define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) \
10674 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & \
10675 BIT_MASK_WMAC_PLCP_RDSIG_8822B)
10677 /* 2 REG_NOT_VALID_8822B */
10678 #define BIT_WMAC_MUTX_IDX_8822B BIT(24)
10680 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8822B 0
10681 #define BIT_MASK_WMAC_PLCP_RDSIG_8822B 0xffffff
10682 #define BIT_WMAC_PLCP_RDSIG_8822B(x) \
10683 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8822B) \
10684 << BIT_SHIFT_WMAC_PLCP_RDSIG_8822B)
10685 #define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) \
10686 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & \
10687 BIT_MASK_WMAC_PLCP_RDSIG_8822B)
10689 /* 2 REG_TRANSMIT_ADDRSS_0_8822B (TA0 REGISTER) */
10691 #define BIT_SHIFT_TA0_8822B 0
10692 #define BIT_MASK_TA0_8822B 0xffffffffffffL
10693 #define BIT_TA0_8822B(x) (((x) & BIT_MASK_TA0_8822B) << BIT_SHIFT_TA0_8822B)
10694 #define BIT_GET_TA0_8822B(x) (((x) >> BIT_SHIFT_TA0_8822B) & BIT_MASK_TA0_8822B)
10696 /* 2 REG_TRANSMIT_ADDRSS_1_8822B (TA1 REGISTER) */
10698 #define BIT_SHIFT_TA1_8822B 0
10699 #define BIT_MASK_TA1_8822B 0xffffffffffffL
10700 #define BIT_TA1_8822B(x) (((x) & BIT_MASK_TA1_8822B) << BIT_SHIFT_TA1_8822B)
10701 #define BIT_GET_TA1_8822B(x) (((x) >> BIT_SHIFT_TA1_8822B) & BIT_MASK_TA1_8822B)
10703 /* 2 REG_TRANSMIT_ADDRSS_2_8822B (TA2 REGISTER) */
10705 #define BIT_SHIFT_TA2_8822B 0
10706 #define BIT_MASK_TA2_8822B 0xffffffffffffL
10707 #define BIT_TA2_8822B(x) (((x) & BIT_MASK_TA2_8822B) << BIT_SHIFT_TA2_8822B)
10708 #define BIT_GET_TA2_8822B(x) (((x) >> BIT_SHIFT_TA2_8822B) & BIT_MASK_TA2_8822B)
10710 /* 2 REG_TRANSMIT_ADDRSS_3_8822B (TA3 REGISTER) */
10712 #define BIT_SHIFT_TA3_8822B 0
10713 #define BIT_MASK_TA3_8822B 0xffffffffffffL
10714 #define BIT_TA3_8822B(x) (((x) & BIT_MASK_TA3_8822B) << BIT_SHIFT_TA3_8822B)
10715 #define BIT_GET_TA3_8822B(x) (((x) >> BIT_SHIFT_TA3_8822B) & BIT_MASK_TA3_8822B)
10717 /* 2 REG_TRANSMIT_ADDRSS_4_8822B (TA4 REGISTER) */
10719 #define BIT_SHIFT_TA4_8822B 0
10720 #define BIT_MASK_TA4_8822B 0xffffffffffffL
10721 #define BIT_TA4_8822B(x) (((x) & BIT_MASK_TA4_8822B) << BIT_SHIFT_TA4_8822B)
10722 #define BIT_GET_TA4_8822B(x) (((x) >> BIT_SHIFT_TA4_8822B) & BIT_MASK_TA4_8822B)
10724 /* 2 REG_NOT_VALID_8822B */
10726 /* 2 REG_MACID1_8822B */
10728 #define BIT_SHIFT_MACID1_8822B 0
10729 #define BIT_MASK_MACID1_8822B 0xffffffffffffL
10730 #define BIT_MACID1_8822B(x) \
10731 (((x) & BIT_MASK_MACID1_8822B) << BIT_SHIFT_MACID1_8822B)
10732 #define BIT_GET_MACID1_8822B(x) \
10733 (((x) >> BIT_SHIFT_MACID1_8822B) & BIT_MASK_MACID1_8822B)
10735 /* 2 REG_BSSID1_8822B */
10737 #define BIT_SHIFT_BSSID1_8822B 0
10738 #define BIT_MASK_BSSID1_8822B 0xffffffffffffL
10739 #define BIT_BSSID1_8822B(x) \
10740 (((x) & BIT_MASK_BSSID1_8822B) << BIT_SHIFT_BSSID1_8822B)
10741 #define BIT_GET_BSSID1_8822B(x) \
10742 (((x) >> BIT_SHIFT_BSSID1_8822B) & BIT_MASK_BSSID1_8822B)
10744 /* 2 REG_BCN_PSR_RPT1_8822B */
10746 #define BIT_SHIFT_DTIM_CNT1_8822B 24
10747 #define BIT_MASK_DTIM_CNT1_8822B 0xff
10748 #define BIT_DTIM_CNT1_8822B(x) \
10749 (((x) & BIT_MASK_DTIM_CNT1_8822B) << BIT_SHIFT_DTIM_CNT1_8822B)
10750 #define BIT_GET_DTIM_CNT1_8822B(x) \
10751 (((x) >> BIT_SHIFT_DTIM_CNT1_8822B) & BIT_MASK_DTIM_CNT1_8822B)
10753 #define BIT_SHIFT_DTIM_PERIOD1_8822B 16
10754 #define BIT_MASK_DTIM_PERIOD1_8822B 0xff
10755 #define BIT_DTIM_PERIOD1_8822B(x) \
10756 (((x) & BIT_MASK_DTIM_PERIOD1_8822B) << BIT_SHIFT_DTIM_PERIOD1_8822B)
10757 #define BIT_GET_DTIM_PERIOD1_8822B(x) \
10758 (((x) >> BIT_SHIFT_DTIM_PERIOD1_8822B) & BIT_MASK_DTIM_PERIOD1_8822B)
10760 #define BIT_DTIM1_8822B BIT(15)
10761 #define BIT_TIM1_8822B BIT(14)
10763 #define BIT_SHIFT_PS_AID_1_8822B 0
10764 #define BIT_MASK_PS_AID_1_8822B 0x7ff
10765 #define BIT_PS_AID_1_8822B(x) \
10766 (((x) & BIT_MASK_PS_AID_1_8822B) << BIT_SHIFT_PS_AID_1_8822B)
10767 #define BIT_GET_PS_AID_1_8822B(x) \
10768 (((x) >> BIT_SHIFT_PS_AID_1_8822B) & BIT_MASK_PS_AID_1_8822B)
10770 /* 2 REG_ASSOCIATED_BFMEE_SEL_8822B */
10771 #define BIT_TXUSER_ID1_8822B BIT(25)
10773 #define BIT_SHIFT_AID1_8822B 16
10774 #define BIT_MASK_AID1_8822B 0x1ff
10775 #define BIT_AID1_8822B(x) (((x) & BIT_MASK_AID1_8822B) << BIT_SHIFT_AID1_8822B)
10776 #define BIT_GET_AID1_8822B(x) \
10777 (((x) >> BIT_SHIFT_AID1_8822B) & BIT_MASK_AID1_8822B)
10779 #define BIT_TXUSER_ID0_8822B BIT(9)
10781 #define BIT_SHIFT_AID0_8822B 0
10782 #define BIT_MASK_AID0_8822B 0x1ff
10783 #define BIT_AID0_8822B(x) (((x) & BIT_MASK_AID0_8822B) << BIT_SHIFT_AID0_8822B)
10784 #define BIT_GET_AID0_8822B(x) \
10785 (((x) >> BIT_SHIFT_AID0_8822B) & BIT_MASK_AID0_8822B)
10787 /* 2 REG_SND_PTCL_CTRL_8822B */
10789 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B 24
10790 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8822B 0xff
10791 #define BIT_NDP_RX_STANDBY_TIMER_8822B(x) \
10792 (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8822B) \
10793 << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B)
10794 #define BIT_GET_NDP_RX_STANDBY_TIMER_8822B(x) \
10795 (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B) & \
10796 BIT_MASK_NDP_RX_STANDBY_TIMER_8822B)
10798 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B 16
10799 #define BIT_MASK_CSI_RPT_OFFSET_HT_8822B 0xff
10800 #define BIT_CSI_RPT_OFFSET_HT_8822B(x) \
10801 (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_8822B) \
10802 << BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B)
10803 #define BIT_GET_CSI_RPT_OFFSET_HT_8822B(x) \
10804 (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B) & \
10805 BIT_MASK_CSI_RPT_OFFSET_HT_8822B)
10807 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B 8
10808 #define BIT_MASK_R_WMAC_VHT_CATEGORY_8822B 0xff
10809 #define BIT_R_WMAC_VHT_CATEGORY_8822B(x) \
10810 (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_8822B) \
10811 << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B)
10812 #define BIT_GET_R_WMAC_VHT_CATEGORY_8822B(x) \
10813 (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B) & \
10814 BIT_MASK_R_WMAC_VHT_CATEGORY_8822B)
10816 #define BIT_R_WMAC_USE_NSTS_8822B BIT(7)
10817 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8822B BIT(6)
10818 #define BIT_R_DISABLE_CHECK_VHTSIGA_CRC_8822B BIT(5)
10819 #define BIT_R_WMAC_BFPARAM_SEL_8822B BIT(4)
10820 #define BIT_R_WMAC_CSISEQ_SEL_8822B BIT(3)
10821 #define BIT_R_WMAC_CSI_WITHHTC_EN_8822B BIT(2)
10822 #define BIT_R_WMAC_HT_NDPA_EN_8822B BIT(1)
10823 #define BIT_R_WMAC_VHT_NDPA_EN_8822B BIT(0)
10825 /* 2 REG_RX_CSI_RPT_INFO_8822B */
10827 /* 2 REG_NS_ARP_CTRL_8822B */
10828 #define BIT_R_WMAC_NSARP_RSPEN_8822B BIT(15)
10829 #define BIT_R_WMAC_NSARP_RARP_8822B BIT(9)
10830 #define BIT_R_WMAC_NSARP_RIPV6_8822B BIT(8)
10832 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B 6
10833 #define BIT_MASK_R_WMAC_NSARP_MODEN_8822B 0x3
10834 #define BIT_R_WMAC_NSARP_MODEN_8822B(x) \
10835 (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8822B) \
10836 << BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B)
10837 #define BIT_GET_R_WMAC_NSARP_MODEN_8822B(x) \
10838 (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B) & \
10839 BIT_MASK_R_WMAC_NSARP_MODEN_8822B)
10841 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B 4
10842 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B 0x3
10843 #define BIT_R_WMAC_NSARP_RSPFTP_8822B(x) \
10844 (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B) \
10845 << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B)
10846 #define BIT_GET_R_WMAC_NSARP_RSPFTP_8822B(x) \
10847 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B) & \
10848 BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B)
10850 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B 0
10851 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B 0xf
10852 #define BIT_R_WMAC_NSARP_RSPSEC_8822B(x) \
10853 (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B) \
10854 << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B)
10855 #define BIT_GET_R_WMAC_NSARP_RSPSEC_8822B(x) \
10856 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B) & \
10857 BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B)
10859 /* 2 REG_NS_ARP_INFO_8822B */
10860 #define BIT_REQ_IS_MCNS_8822B BIT(23)
10861 #define BIT_REQ_IS_UCNS_8822B BIT(22)
10862 #define BIT_REQ_IS_USNS_8822B BIT(21)
10863 #define BIT_REQ_IS_ARP_8822B BIT(20)
10864 #define BIT_EXPRSP_MH_WITHQC_8822B BIT(19)
10866 #define BIT_SHIFT_EXPRSP_SECTYPE_8822B 16
10867 #define BIT_MASK_EXPRSP_SECTYPE_8822B 0x7
10868 #define BIT_EXPRSP_SECTYPE_8822B(x) \
10869 (((x) & BIT_MASK_EXPRSP_SECTYPE_8822B) \
10870 << BIT_SHIFT_EXPRSP_SECTYPE_8822B)
10871 #define BIT_GET_EXPRSP_SECTYPE_8822B(x) \
10872 (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8822B) & \
10873 BIT_MASK_EXPRSP_SECTYPE_8822B)
10875 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B 8
10876 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B 0xff
10877 #define BIT_EXPRSP_CHKSM_7_TO_0_8822B(x) \
10878 (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B) \
10879 << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B)
10880 #define BIT_GET_EXPRSP_CHKSM_7_TO_0_8822B(x) \
10881 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B) & \
10882 BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B)
10884 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B 0
10885 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B 0xff
10886 #define BIT_EXPRSP_CHKSM_15_TO_8_8822B(x) \
10887 (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B) \
10888 << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B)
10889 #define BIT_GET_EXPRSP_CHKSM_15_TO_8_8822B(x) \
10890 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B) & \
10891 BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B)
10893 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8822B */
10895 #define BIT_SHIFT_WMAC_ARPIP_8822B 0
10896 #define BIT_MASK_WMAC_ARPIP_8822B 0xffffffffL
10897 #define BIT_WMAC_ARPIP_8822B(x) \
10898 (((x) & BIT_MASK_WMAC_ARPIP_8822B) << BIT_SHIFT_WMAC_ARPIP_8822B)
10899 #define BIT_GET_WMAC_ARPIP_8822B(x) \
10900 (((x) >> BIT_SHIFT_WMAC_ARPIP_8822B) & BIT_MASK_WMAC_ARPIP_8822B)
10902 /* 2 REG_BEAMFORMING_INFO_NSARP_8822B */
10904 #define BIT_SHIFT_BEAMFORMING_INFO_8822B 0
10905 #define BIT_MASK_BEAMFORMING_INFO_8822B 0xffffffffL
10906 #define BIT_BEAMFORMING_INFO_8822B(x) \
10907 (((x) & BIT_MASK_BEAMFORMING_INFO_8822B) \
10908 << BIT_SHIFT_BEAMFORMING_INFO_8822B)
10909 #define BIT_GET_BEAMFORMING_INFO_8822B(x) \
10910 (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8822B) & \
10911 BIT_MASK_BEAMFORMING_INFO_8822B)
10913 /* 2 REG_NOT_VALID_8822B */
10915 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B 0
10916 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B 0xffffffffffffffffffffffffffffffffL
10917 #define BIT_R_WMAC_IPV6_MYIPAD_8822B(x) \
10918 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B) \
10919 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B)
10920 #define BIT_GET_R_WMAC_IPV6_MYIPAD_8822B(x) \
10921 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B) & \
10922 BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B)
10924 /* 2 REG_RSVD_0X740_8822B */
10926 /* 2 REG_WMAC_RTX_CTX_SUBTYPE_CFG_8822B */
10928 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B 4
10929 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B 0xf
10930 #define BIT_R_WMAC_CTX_SUBTYPE_8822B(x) \
10931 (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B) \
10932 << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B)
10933 #define BIT_GET_R_WMAC_CTX_SUBTYPE_8822B(x) \
10934 (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B) & \
10935 BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B)
10937 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B 0
10938 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B 0xf
10939 #define BIT_R_WMAC_RTX_SUBTYPE_8822B(x) \
10940 (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B) \
10941 << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B)
10942 #define BIT_GET_R_WMAC_RTX_SUBTYPE_8822B(x) \
10943 (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B) & \
10944 BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B)
10946 /* 2 REG_WMAC_SWAES_CFG_8822B */
10948 /* 2 REG_BT_COEX_V2_8822B */
10949 #define BIT_GNT_BT_POLARITY_8822B BIT(12)
10950 #define BIT_GNT_BT_BYPASS_PRIORITY_8822B BIT(8)
10952 #define BIT_SHIFT_TIMER_8822B 0
10953 #define BIT_MASK_TIMER_8822B 0xff
10954 #define BIT_TIMER_8822B(x) \
10955 (((x) & BIT_MASK_TIMER_8822B) << BIT_SHIFT_TIMER_8822B)
10956 #define BIT_GET_TIMER_8822B(x) \
10957 (((x) >> BIT_SHIFT_TIMER_8822B) & BIT_MASK_TIMER_8822B)
10959 /* 2 REG_BT_COEX_8822B */
10960 #define BIT_R_GNT_BT_RFC_SW_8822B BIT(12)
10961 #define BIT_R_GNT_BT_RFC_SW_EN_8822B BIT(11)
10962 #define BIT_R_GNT_BT_BB_SW_8822B BIT(10)
10963 #define BIT_R_GNT_BT_BB_SW_EN_8822B BIT(9)
10964 #define BIT_R_BT_CNT_THREN_8822B BIT(8)
10966 #define BIT_SHIFT_R_BT_CNT_THR_8822B 0
10967 #define BIT_MASK_R_BT_CNT_THR_8822B 0xff
10968 #define BIT_R_BT_CNT_THR_8822B(x) \
10969 (((x) & BIT_MASK_R_BT_CNT_THR_8822B) << BIT_SHIFT_R_BT_CNT_THR_8822B)
10970 #define BIT_GET_R_BT_CNT_THR_8822B(x) \
10971 (((x) >> BIT_SHIFT_R_BT_CNT_THR_8822B) & BIT_MASK_R_BT_CNT_THR_8822B)
10973 /* 2 REG_WLAN_ACT_MASK_CTRL_8822B */
10974 #define BIT_WLRX_TER_BY_CTL_8822B BIT(43)
10975 #define BIT_WLRX_TER_BY_AD_8822B BIT(42)
10976 #define BIT_ANT_DIVERSITY_SEL_8822B BIT(41)
10977 #define BIT_ANTSEL_FOR_BT_CTRL_EN_8822B BIT(40)
10978 #define BIT_WLACT_LOW_GNTWL_EN_8822B BIT(34)
10979 #define BIT_WLACT_HIGH_GNTBT_EN_8822B BIT(33)
10980 #define BIT_NAV_UPPER_V1_8822B BIT(32)
10982 #define BIT_SHIFT_RXMYRTS_NAV_V1_8822B 8
10983 #define BIT_MASK_RXMYRTS_NAV_V1_8822B 0xff
10984 #define BIT_RXMYRTS_NAV_V1_8822B(x) \
10985 (((x) & BIT_MASK_RXMYRTS_NAV_V1_8822B) \
10986 << BIT_SHIFT_RXMYRTS_NAV_V1_8822B)
10987 #define BIT_GET_RXMYRTS_NAV_V1_8822B(x) \
10988 (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8822B) & \
10989 BIT_MASK_RXMYRTS_NAV_V1_8822B)
10991 #define BIT_SHIFT_RTSRST_V1_8822B 0
10992 #define BIT_MASK_RTSRST_V1_8822B 0xff
10993 #define BIT_RTSRST_V1_8822B(x) \
10994 (((x) & BIT_MASK_RTSRST_V1_8822B) << BIT_SHIFT_RTSRST_V1_8822B)
10995 #define BIT_GET_RTSRST_V1_8822B(x) \
10996 (((x) >> BIT_SHIFT_RTSRST_V1_8822B) & BIT_MASK_RTSRST_V1_8822B)
10998 /* 2 REG_BT_COEX_ENHANCED_INTR_CTRL_8822B */
11000 #define BIT_SHIFT_BT_STAT_DELAY_8822B 12
11001 #define BIT_MASK_BT_STAT_DELAY_8822B 0xf
11002 #define BIT_BT_STAT_DELAY_8822B(x) \
11003 (((x) & BIT_MASK_BT_STAT_DELAY_8822B) << BIT_SHIFT_BT_STAT_DELAY_8822B)
11004 #define BIT_GET_BT_STAT_DELAY_8822B(x) \
11005 (((x) >> BIT_SHIFT_BT_STAT_DELAY_8822B) & BIT_MASK_BT_STAT_DELAY_8822B)
11007 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8822B 8
11008 #define BIT_MASK_BT_TRX_INIT_DETECT_8822B 0xf
11009 #define BIT_BT_TRX_INIT_DETECT_8822B(x) \
11010 (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8822B) \
11011 << BIT_SHIFT_BT_TRX_INIT_DETECT_8822B)
11012 #define BIT_GET_BT_TRX_INIT_DETECT_8822B(x) \
11013 (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8822B) & \
11014 BIT_MASK_BT_TRX_INIT_DETECT_8822B)
11016 #define BIT_SHIFT_BT_PRI_DETECT_TO_8822B 4
11017 #define BIT_MASK_BT_PRI_DETECT_TO_8822B 0xf
11018 #define BIT_BT_PRI_DETECT_TO_8822B(x) \
11019 (((x) & BIT_MASK_BT_PRI_DETECT_TO_8822B) \
11020 << BIT_SHIFT_BT_PRI_DETECT_TO_8822B)
11021 #define BIT_GET_BT_PRI_DETECT_TO_8822B(x) \
11022 (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8822B) & \
11023 BIT_MASK_BT_PRI_DETECT_TO_8822B)
11025 #define BIT_R_GRANTALL_WLMASK_8822B BIT(3)
11026 #define BIT_STATIS_BT_EN_8822B BIT(2)
11027 #define BIT_WL_ACT_MASK_ENABLE_8822B BIT(1)
11028 #define BIT_ENHANCED_BT_8822B BIT(0)
11030 /* 2 REG_BT_ACT_STATISTICS_8822B */
11032 #define BIT_SHIFT_STATIS_BT_LO_RX_8822B (48 & CPU_OPT_WIDTH)
11033 #define BIT_MASK_STATIS_BT_LO_RX_8822B 0xffff
11034 #define BIT_STATIS_BT_LO_RX_8822B(x) \
11035 (((x) & BIT_MASK_STATIS_BT_LO_RX_8822B) \
11036 << BIT_SHIFT_STATIS_BT_LO_RX_8822B)
11037 #define BIT_GET_STATIS_BT_LO_RX_8822B(x) \
11038 (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_8822B) & \
11039 BIT_MASK_STATIS_BT_LO_RX_8822B)
11041 #define BIT_SHIFT_STATIS_BT_LO_TX_8822B (32 & CPU_OPT_WIDTH)
11042 #define BIT_MASK_STATIS_BT_LO_TX_8822B 0xffff
11043 #define BIT_STATIS_BT_LO_TX_8822B(x) \
11044 (((x) & BIT_MASK_STATIS_BT_LO_TX_8822B) \
11045 << BIT_SHIFT_STATIS_BT_LO_TX_8822B)
11046 #define BIT_GET_STATIS_BT_LO_TX_8822B(x) \
11047 (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_8822B) & \
11048 BIT_MASK_STATIS_BT_LO_TX_8822B)
11050 #define BIT_SHIFT_STATIS_BT_HI_RX_8822B 16
11051 #define BIT_MASK_STATIS_BT_HI_RX_8822B 0xffff
11052 #define BIT_STATIS_BT_HI_RX_8822B(x) \
11053 (((x) & BIT_MASK_STATIS_BT_HI_RX_8822B) \
11054 << BIT_SHIFT_STATIS_BT_HI_RX_8822B)
11055 #define BIT_GET_STATIS_BT_HI_RX_8822B(x) \
11056 (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8822B) & \
11057 BIT_MASK_STATIS_BT_HI_RX_8822B)
11059 #define BIT_SHIFT_STATIS_BT_HI_TX_8822B 0
11060 #define BIT_MASK_STATIS_BT_HI_TX_8822B 0xffff
11061 #define BIT_STATIS_BT_HI_TX_8822B(x) \
11062 (((x) & BIT_MASK_STATIS_BT_HI_TX_8822B) \
11063 << BIT_SHIFT_STATIS_BT_HI_TX_8822B)
11064 #define BIT_GET_STATIS_BT_HI_TX_8822B(x) \
11065 (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8822B) & \
11066 BIT_MASK_STATIS_BT_HI_TX_8822B)
11068 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8822B */
11070 #define BIT_SHIFT_R_BT_CMD_RPT_8822B 16
11071 #define BIT_MASK_R_BT_CMD_RPT_8822B 0xffff
11072 #define BIT_R_BT_CMD_RPT_8822B(x) \
11073 (((x) & BIT_MASK_R_BT_CMD_RPT_8822B) << BIT_SHIFT_R_BT_CMD_RPT_8822B)
11074 #define BIT_GET_R_BT_CMD_RPT_8822B(x) \
11075 (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8822B) & BIT_MASK_R_BT_CMD_RPT_8822B)
11077 #define BIT_SHIFT_R_RPT_FROM_BT_8822B 8
11078 #define BIT_MASK_R_RPT_FROM_BT_8822B 0xff
11079 #define BIT_R_RPT_FROM_BT_8822B(x) \
11080 (((x) & BIT_MASK_R_RPT_FROM_BT_8822B) << BIT_SHIFT_R_RPT_FROM_BT_8822B)
11081 #define BIT_GET_R_RPT_FROM_BT_8822B(x) \
11082 (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8822B) & BIT_MASK_R_RPT_FROM_BT_8822B)
11084 #define BIT_SHIFT_BT_HID_ISR_SET_8822B 6
11085 #define BIT_MASK_BT_HID_ISR_SET_8822B 0x3
11086 #define BIT_BT_HID_ISR_SET_8822B(x) \
11087 (((x) & BIT_MASK_BT_HID_ISR_SET_8822B) \
11088 << BIT_SHIFT_BT_HID_ISR_SET_8822B)
11089 #define BIT_GET_BT_HID_ISR_SET_8822B(x) \
11090 (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8822B) & \
11091 BIT_MASK_BT_HID_ISR_SET_8822B)
11093 #define BIT_TDMA_BT_START_NOTIFY_8822B BIT(5)
11094 #define BIT_ENABLE_TDMA_FW_MODE_8822B BIT(4)
11095 #define BIT_ENABLE_PTA_TDMA_MODE_8822B BIT(3)
11096 #define BIT_ENABLE_COEXIST_TAB_IN_TDMA_8822B BIT(2)
11097 #define BIT_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA_8822B BIT(1)
11098 #define BIT_RTK_BT_ENABLE_8822B BIT(0)
11100 /* 2 REG_BT_STATUS_REPORT_REGISTER_8822B */
11102 #define BIT_SHIFT_BT_PROFILE_8822B 24
11103 #define BIT_MASK_BT_PROFILE_8822B 0xff
11104 #define BIT_BT_PROFILE_8822B(x) \
11105 (((x) & BIT_MASK_BT_PROFILE_8822B) << BIT_SHIFT_BT_PROFILE_8822B)
11106 #define BIT_GET_BT_PROFILE_8822B(x) \
11107 (((x) >> BIT_SHIFT_BT_PROFILE_8822B) & BIT_MASK_BT_PROFILE_8822B)
11109 #define BIT_SHIFT_BT_POWER_8822B 16
11110 #define BIT_MASK_BT_POWER_8822B 0xff
11111 #define BIT_BT_POWER_8822B(x) \
11112 (((x) & BIT_MASK_BT_POWER_8822B) << BIT_SHIFT_BT_POWER_8822B)
11113 #define BIT_GET_BT_POWER_8822B(x) \
11114 (((x) >> BIT_SHIFT_BT_POWER_8822B) & BIT_MASK_BT_POWER_8822B)
11116 #define BIT_SHIFT_BT_PREDECT_STATUS_8822B 8
11117 #define BIT_MASK_BT_PREDECT_STATUS_8822B 0xff
11118 #define BIT_BT_PREDECT_STATUS_8822B(x) \
11119 (((x) & BIT_MASK_BT_PREDECT_STATUS_8822B) \
11120 << BIT_SHIFT_BT_PREDECT_STATUS_8822B)
11121 #define BIT_GET_BT_PREDECT_STATUS_8822B(x) \
11122 (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8822B) & \
11123 BIT_MASK_BT_PREDECT_STATUS_8822B)
11125 #define BIT_SHIFT_BT_CMD_INFO_8822B 0
11126 #define BIT_MASK_BT_CMD_INFO_8822B 0xff
11127 #define BIT_BT_CMD_INFO_8822B(x) \
11128 (((x) & BIT_MASK_BT_CMD_INFO_8822B) << BIT_SHIFT_BT_CMD_INFO_8822B)
11129 #define BIT_GET_BT_CMD_INFO_8822B(x) \
11130 (((x) >> BIT_SHIFT_BT_CMD_INFO_8822B) & BIT_MASK_BT_CMD_INFO_8822B)
11132 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8822B */
11133 #define BIT_EN_MAC_NULL_PKT_NOTIFY_8822B BIT(31)
11134 #define BIT_EN_WLAN_RPT_AND_BT_QUERY_8822B BIT(30)
11135 #define BIT_EN_BT_STSTUS_RPT_8822B BIT(29)
11136 #define BIT_EN_BT_POWER_8822B BIT(28)
11137 #define BIT_EN_BT_CHANNEL_8822B BIT(27)
11138 #define BIT_EN_BT_SLOT_CHANGE_8822B BIT(26)
11139 #define BIT_EN_BT_PROFILE_OR_HID_8822B BIT(25)
11140 #define BIT_WLAN_RPT_NOTIFY_8822B BIT(24)
11142 #define BIT_SHIFT_WLAN_RPT_DATA_8822B 16
11143 #define BIT_MASK_WLAN_RPT_DATA_8822B 0xff
11144 #define BIT_WLAN_RPT_DATA_8822B(x) \
11145 (((x) & BIT_MASK_WLAN_RPT_DATA_8822B) << BIT_SHIFT_WLAN_RPT_DATA_8822B)
11146 #define BIT_GET_WLAN_RPT_DATA_8822B(x) \
11147 (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8822B) & BIT_MASK_WLAN_RPT_DATA_8822B)
11149 #define BIT_SHIFT_CMD_ID_8822B 8
11150 #define BIT_MASK_CMD_ID_8822B 0xff
11151 #define BIT_CMD_ID_8822B(x) \
11152 (((x) & BIT_MASK_CMD_ID_8822B) << BIT_SHIFT_CMD_ID_8822B)
11153 #define BIT_GET_CMD_ID_8822B(x) \
11154 (((x) >> BIT_SHIFT_CMD_ID_8822B) & BIT_MASK_CMD_ID_8822B)
11156 #define BIT_SHIFT_BT_DATA_8822B 0
11157 #define BIT_MASK_BT_DATA_8822B 0xff
11158 #define BIT_BT_DATA_8822B(x) \
11159 (((x) & BIT_MASK_BT_DATA_8822B) << BIT_SHIFT_BT_DATA_8822B)
11160 #define BIT_GET_BT_DATA_8822B(x) \
11161 (((x) >> BIT_SHIFT_BT_DATA_8822B) & BIT_MASK_BT_DATA_8822B)
11163 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8822B */
11165 #define BIT_SHIFT_WLAN_RPT_TO_8822B 0
11166 #define BIT_MASK_WLAN_RPT_TO_8822B 0xff
11167 #define BIT_WLAN_RPT_TO_8822B(x) \
11168 (((x) & BIT_MASK_WLAN_RPT_TO_8822B) << BIT_SHIFT_WLAN_RPT_TO_8822B)
11169 #define BIT_GET_WLAN_RPT_TO_8822B(x) \
11170 (((x) >> BIT_SHIFT_WLAN_RPT_TO_8822B) & BIT_MASK_WLAN_RPT_TO_8822B)
11172 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8822B */
11174 #define BIT_SHIFT_ISOLATION_CHK_8822B 1
11175 #define BIT_MASK_ISOLATION_CHK_8822B 0x7fffffffffffffffffffL
11176 #define BIT_ISOLATION_CHK_8822B(x) \
11177 (((x) & BIT_MASK_ISOLATION_CHK_8822B) << BIT_SHIFT_ISOLATION_CHK_8822B)
11178 #define BIT_GET_ISOLATION_CHK_8822B(x) \
11179 (((x) >> BIT_SHIFT_ISOLATION_CHK_8822B) & BIT_MASK_ISOLATION_CHK_8822B)
11181 #define BIT_ISOLATION_EN_8822B BIT(0)
11183 /* 2 REG_BT_INTERRUPT_STATUS_REGISTER_8822B */
11184 #define BIT_BT_HID_ISR_8822B BIT(7)
11185 #define BIT_BT_QUERY_ISR_8822B BIT(6)
11186 #define BIT_MAC_NULL_PKT_NOTIFY_ISR_8822B BIT(5)
11187 #define BIT_WLAN_RPT_ISR_8822B BIT(4)
11188 #define BIT_BT_POWER_ISR_8822B BIT(3)
11189 #define BIT_BT_CHANNEL_ISR_8822B BIT(2)
11190 #define BIT_BT_SLOT_CHANGE_ISR_8822B BIT(1)
11191 #define BIT_BT_PROFILE_ISR_8822B BIT(0)
11193 /* 2 REG_BT_TDMA_TIME_REGISTER_8822B */
11195 #define BIT_SHIFT_BT_TIME_8822B 6
11196 #define BIT_MASK_BT_TIME_8822B 0x3ffffff
11197 #define BIT_BT_TIME_8822B(x) \
11198 (((x) & BIT_MASK_BT_TIME_8822B) << BIT_SHIFT_BT_TIME_8822B)
11199 #define BIT_GET_BT_TIME_8822B(x) \
11200 (((x) >> BIT_SHIFT_BT_TIME_8822B) & BIT_MASK_BT_TIME_8822B)
11202 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B 0
11203 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8822B 0x3f
11204 #define BIT_BT_RPT_SAMPLE_RATE_8822B(x) \
11205 (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8822B) \
11206 << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B)
11207 #define BIT_GET_BT_RPT_SAMPLE_RATE_8822B(x) \
11208 (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B) & \
11209 BIT_MASK_BT_RPT_SAMPLE_RATE_8822B)
11211 /* 2 REG_BT_ACT_REGISTER_8822B */
11213 #define BIT_SHIFT_BT_EISR_EN_8822B 16
11214 #define BIT_MASK_BT_EISR_EN_8822B 0xff
11215 #define BIT_BT_EISR_EN_8822B(x) \
11216 (((x) & BIT_MASK_BT_EISR_EN_8822B) << BIT_SHIFT_BT_EISR_EN_8822B)
11217 #define BIT_GET_BT_EISR_EN_8822B(x) \
11218 (((x) >> BIT_SHIFT_BT_EISR_EN_8822B) & BIT_MASK_BT_EISR_EN_8822B)
11220 #define BIT_BT_ACT_FALLING_ISR_8822B BIT(10)
11221 #define BIT_BT_ACT_RISING_ISR_8822B BIT(9)
11222 #define BIT_TDMA_TO_ISR_8822B BIT(8)
11224 #define BIT_SHIFT_BT_CH_8822B 0
11225 #define BIT_MASK_BT_CH_8822B 0xff
11226 #define BIT_BT_CH_8822B(x) \
11227 (((x) & BIT_MASK_BT_CH_8822B) << BIT_SHIFT_BT_CH_8822B)
11228 #define BIT_GET_BT_CH_8822B(x) \
11229 (((x) >> BIT_SHIFT_BT_CH_8822B) & BIT_MASK_BT_CH_8822B)
11231 /* 2 REG_OBFF_CTRL_BASIC_8822B */
11232 #define BIT_OBFF_EN_V1_8822B BIT(31)
11234 #define BIT_SHIFT_OBFF_STATE_V1_8822B 28
11235 #define BIT_MASK_OBFF_STATE_V1_8822B 0x3
11236 #define BIT_OBFF_STATE_V1_8822B(x) \
11237 (((x) & BIT_MASK_OBFF_STATE_V1_8822B) << BIT_SHIFT_OBFF_STATE_V1_8822B)
11238 #define BIT_GET_OBFF_STATE_V1_8822B(x) \
11239 (((x) >> BIT_SHIFT_OBFF_STATE_V1_8822B) & BIT_MASK_OBFF_STATE_V1_8822B)
11241 #define BIT_OBFF_ACT_RXDMA_EN_8822B BIT(27)
11242 #define BIT_OBFF_BLOCK_INT_EN_8822B BIT(26)
11243 #define BIT_OBFF_AUTOACT_EN_8822B BIT(25)
11244 #define BIT_OBFF_AUTOIDLE_EN_8822B BIT(24)
11246 #define BIT_SHIFT_WAKE_MAX_PLS_8822B 20
11247 #define BIT_MASK_WAKE_MAX_PLS_8822B 0x7
11248 #define BIT_WAKE_MAX_PLS_8822B(x) \
11249 (((x) & BIT_MASK_WAKE_MAX_PLS_8822B) << BIT_SHIFT_WAKE_MAX_PLS_8822B)
11250 #define BIT_GET_WAKE_MAX_PLS_8822B(x) \
11251 (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8822B) & BIT_MASK_WAKE_MAX_PLS_8822B)
11253 #define BIT_SHIFT_WAKE_MIN_PLS_8822B 16
11254 #define BIT_MASK_WAKE_MIN_PLS_8822B 0x7
11255 #define BIT_WAKE_MIN_PLS_8822B(x) \
11256 (((x) & BIT_MASK_WAKE_MIN_PLS_8822B) << BIT_SHIFT_WAKE_MIN_PLS_8822B)
11257 #define BIT_GET_WAKE_MIN_PLS_8822B(x) \
11258 (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8822B) & BIT_MASK_WAKE_MIN_PLS_8822B)
11260 #define BIT_SHIFT_WAKE_MAX_F2F_8822B 12
11261 #define BIT_MASK_WAKE_MAX_F2F_8822B 0x7
11262 #define BIT_WAKE_MAX_F2F_8822B(x) \
11263 (((x) & BIT_MASK_WAKE_MAX_F2F_8822B) << BIT_SHIFT_WAKE_MAX_F2F_8822B)
11264 #define BIT_GET_WAKE_MAX_F2F_8822B(x) \
11265 (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8822B) & BIT_MASK_WAKE_MAX_F2F_8822B)
11267 #define BIT_SHIFT_WAKE_MIN_F2F_8822B 8
11268 #define BIT_MASK_WAKE_MIN_F2F_8822B 0x7
11269 #define BIT_WAKE_MIN_F2F_8822B(x) \
11270 (((x) & BIT_MASK_WAKE_MIN_F2F_8822B) << BIT_SHIFT_WAKE_MIN_F2F_8822B)
11271 #define BIT_GET_WAKE_MIN_F2F_8822B(x) \
11272 (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8822B) & BIT_MASK_WAKE_MIN_F2F_8822B)
11274 #define BIT_APP_CPU_ACT_V1_8822B BIT(3)
11275 #define BIT_APP_OBFF_V1_8822B BIT(2)
11276 #define BIT_APP_IDLE_V1_8822B BIT(1)
11277 #define BIT_APP_INIT_V1_8822B BIT(0)
11279 /* 2 REG_OBFF_CTRL2_TIMER_8822B */
11281 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B 24
11282 #define BIT_MASK_RX_HIGH_TIMER_IDX_8822B 0x7
11283 #define BIT_RX_HIGH_TIMER_IDX_8822B(x) \
11284 (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8822B) \
11285 << BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B)
11286 #define BIT_GET_RX_HIGH_TIMER_IDX_8822B(x) \
11287 (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B) & \
11288 BIT_MASK_RX_HIGH_TIMER_IDX_8822B)
11290 #define BIT_SHIFT_RX_MED_TIMER_IDX_8822B 16
11291 #define BIT_MASK_RX_MED_TIMER_IDX_8822B 0x7
11292 #define BIT_RX_MED_TIMER_IDX_8822B(x) \
11293 (((x) & BIT_MASK_RX_MED_TIMER_IDX_8822B) \
11294 << BIT_SHIFT_RX_MED_TIMER_IDX_8822B)
11295 #define BIT_GET_RX_MED_TIMER_IDX_8822B(x) \
11296 (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8822B) & \
11297 BIT_MASK_RX_MED_TIMER_IDX_8822B)
11299 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8822B 8
11300 #define BIT_MASK_RX_LOW_TIMER_IDX_8822B 0x7
11301 #define BIT_RX_LOW_TIMER_IDX_8822B(x) \
11302 (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8822B) \
11303 << BIT_SHIFT_RX_LOW_TIMER_IDX_8822B)
11304 #define BIT_GET_RX_LOW_TIMER_IDX_8822B(x) \
11305 (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8822B) & \
11306 BIT_MASK_RX_LOW_TIMER_IDX_8822B)
11308 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B 0
11309 #define BIT_MASK_OBFF_INT_TIMER_IDX_8822B 0x7
11310 #define BIT_OBFF_INT_TIMER_IDX_8822B(x) \
11311 (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8822B) \
11312 << BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B)
11313 #define BIT_GET_OBFF_INT_TIMER_IDX_8822B(x) \
11314 (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B) & \
11315 BIT_MASK_OBFF_INT_TIMER_IDX_8822B)
11317 /* 2 REG_LTR_CTRL_BASIC_8822B */
11318 #define BIT_LTR_EN_V1_8822B BIT(31)
11319 #define BIT_LTR_HW_EN_V1_8822B BIT(30)
11320 #define BIT_LRT_ACT_CTS_EN_8822B BIT(29)
11321 #define BIT_LTR_ACT_RXPKT_EN_8822B BIT(28)
11322 #define BIT_LTR_ACT_RXDMA_EN_8822B BIT(27)
11323 #define BIT_LTR_IDLE_NO_SNOOP_8822B BIT(26)
11324 #define BIT_SPDUP_MGTPKT_8822B BIT(25)
11325 #define BIT_RX_AGG_EN_8822B BIT(24)
11326 #define BIT_APP_LTR_ACT_8822B BIT(23)
11327 #define BIT_APP_LTR_IDLE_8822B BIT(22)
11329 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B 20
11330 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8822B 0x3
11331 #define BIT_HIGH_RATE_TRIG_SEL_8822B(x) \
11332 (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8822B) \
11333 << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B)
11334 #define BIT_GET_HIGH_RATE_TRIG_SEL_8822B(x) \
11335 (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B) & \
11336 BIT_MASK_HIGH_RATE_TRIG_SEL_8822B)
11338 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8822B 18
11339 #define BIT_MASK_MED_RATE_TRIG_SEL_8822B 0x3
11340 #define BIT_MED_RATE_TRIG_SEL_8822B(x) \
11341 (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8822B) \
11342 << BIT_SHIFT_MED_RATE_TRIG_SEL_8822B)
11343 #define BIT_GET_MED_RATE_TRIG_SEL_8822B(x) \
11344 (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8822B) & \
11345 BIT_MASK_MED_RATE_TRIG_SEL_8822B)
11347 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B 16
11348 #define BIT_MASK_LOW_RATE_TRIG_SEL_8822B 0x3
11349 #define BIT_LOW_RATE_TRIG_SEL_8822B(x) \
11350 (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8822B) \
11351 << BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B)
11352 #define BIT_GET_LOW_RATE_TRIG_SEL_8822B(x) \
11353 (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B) & \
11354 BIT_MASK_LOW_RATE_TRIG_SEL_8822B)
11356 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8822B 8
11357 #define BIT_MASK_HIGH_RATE_BD_IDX_8822B 0x7f
11358 #define BIT_HIGH_RATE_BD_IDX_8822B(x) \
11359 (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8822B) \
11360 << BIT_SHIFT_HIGH_RATE_BD_IDX_8822B)
11361 #define BIT_GET_HIGH_RATE_BD_IDX_8822B(x) \
11362 (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8822B) & \
11363 BIT_MASK_HIGH_RATE_BD_IDX_8822B)
11365 #define BIT_SHIFT_LOW_RATE_BD_IDX_8822B 0
11366 #define BIT_MASK_LOW_RATE_BD_IDX_8822B 0x7f
11367 #define BIT_LOW_RATE_BD_IDX_8822B(x) \
11368 (((x) & BIT_MASK_LOW_RATE_BD_IDX_8822B) \
11369 << BIT_SHIFT_LOW_RATE_BD_IDX_8822B)
11370 #define BIT_GET_LOW_RATE_BD_IDX_8822B(x) \
11371 (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8822B) & \
11372 BIT_MASK_LOW_RATE_BD_IDX_8822B)
11374 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8822B */
11376 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B 24
11377 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8822B 0x7
11378 #define BIT_RX_EMPTY_TIMER_IDX_8822B(x) \
11379 (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8822B) \
11380 << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B)
11381 #define BIT_GET_RX_EMPTY_TIMER_IDX_8822B(x) \
11382 (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B) & \
11383 BIT_MASK_RX_EMPTY_TIMER_IDX_8822B)
11385 #define BIT_SHIFT_RX_AFULL_TH_IDX_8822B 20
11386 #define BIT_MASK_RX_AFULL_TH_IDX_8822B 0x7
11387 #define BIT_RX_AFULL_TH_IDX_8822B(x) \
11388 (((x) & BIT_MASK_RX_AFULL_TH_IDX_8822B) \
11389 << BIT_SHIFT_RX_AFULL_TH_IDX_8822B)
11390 #define BIT_GET_RX_AFULL_TH_IDX_8822B(x) \
11391 (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8822B) & \
11392 BIT_MASK_RX_AFULL_TH_IDX_8822B)
11394 #define BIT_SHIFT_RX_HIGH_TH_IDX_8822B 16
11395 #define BIT_MASK_RX_HIGH_TH_IDX_8822B 0x7
11396 #define BIT_RX_HIGH_TH_IDX_8822B(x) \
11397 (((x) & BIT_MASK_RX_HIGH_TH_IDX_8822B) \
11398 << BIT_SHIFT_RX_HIGH_TH_IDX_8822B)
11399 #define BIT_GET_RX_HIGH_TH_IDX_8822B(x) \
11400 (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8822B) & \
11401 BIT_MASK_RX_HIGH_TH_IDX_8822B)
11403 #define BIT_SHIFT_RX_MED_TH_IDX_8822B 12
11404 #define BIT_MASK_RX_MED_TH_IDX_8822B 0x7
11405 #define BIT_RX_MED_TH_IDX_8822B(x) \
11406 (((x) & BIT_MASK_RX_MED_TH_IDX_8822B) << BIT_SHIFT_RX_MED_TH_IDX_8822B)
11407 #define BIT_GET_RX_MED_TH_IDX_8822B(x) \
11408 (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8822B) & BIT_MASK_RX_MED_TH_IDX_8822B)
11410 #define BIT_SHIFT_RX_LOW_TH_IDX_8822B 8
11411 #define BIT_MASK_RX_LOW_TH_IDX_8822B 0x7
11412 #define BIT_RX_LOW_TH_IDX_8822B(x) \
11413 (((x) & BIT_MASK_RX_LOW_TH_IDX_8822B) << BIT_SHIFT_RX_LOW_TH_IDX_8822B)
11414 #define BIT_GET_RX_LOW_TH_IDX_8822B(x) \
11415 (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8822B) & BIT_MASK_RX_LOW_TH_IDX_8822B)
11417 #define BIT_SHIFT_LTR_SPACE_IDX_8822B 4
11418 #define BIT_MASK_LTR_SPACE_IDX_8822B 0x3
11419 #define BIT_LTR_SPACE_IDX_8822B(x) \
11420 (((x) & BIT_MASK_LTR_SPACE_IDX_8822B) << BIT_SHIFT_LTR_SPACE_IDX_8822B)
11421 #define BIT_GET_LTR_SPACE_IDX_8822B(x) \
11422 (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8822B) & BIT_MASK_LTR_SPACE_IDX_8822B)
11424 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B 0
11425 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8822B 0x7
11426 #define BIT_LTR_IDLE_TIMER_IDX_8822B(x) \
11427 (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8822B) \
11428 << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B)
11429 #define BIT_GET_LTR_IDLE_TIMER_IDX_8822B(x) \
11430 (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B) & \
11431 BIT_MASK_LTR_IDLE_TIMER_IDX_8822B)
11433 /* 2 REG_LTR_IDLE_LATENCY_V1_8822B */
11435 #define BIT_SHIFT_LTR_IDLE_L_8822B 0
11436 #define BIT_MASK_LTR_IDLE_L_8822B 0xffffffffL
11437 #define BIT_LTR_IDLE_L_8822B(x) \
11438 (((x) & BIT_MASK_LTR_IDLE_L_8822B) << BIT_SHIFT_LTR_IDLE_L_8822B)
11439 #define BIT_GET_LTR_IDLE_L_8822B(x) \
11440 (((x) >> BIT_SHIFT_LTR_IDLE_L_8822B) & BIT_MASK_LTR_IDLE_L_8822B)
11442 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8822B */
11444 #define BIT_SHIFT_LTR_ACT_L_8822B 0
11445 #define BIT_MASK_LTR_ACT_L_8822B 0xffffffffL
11446 #define BIT_LTR_ACT_L_8822B(x) \
11447 (((x) & BIT_MASK_LTR_ACT_L_8822B) << BIT_SHIFT_LTR_ACT_L_8822B)
11448 #define BIT_GET_LTR_ACT_L_8822B(x) \
11449 (((x) >> BIT_SHIFT_LTR_ACT_L_8822B) & BIT_MASK_LTR_ACT_L_8822B)
11451 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8822B */
11452 #define BIT_APPEND_MACID_IN_RESP_EN_8822B BIT(50)
11453 #define BIT_ADDR2_MATCH_EN_8822B BIT(49)
11454 #define BIT_ANTTRN_EN_8822B BIT(48)
11456 #define BIT_SHIFT_TRAIN_STA_ADDR_8822B 0
11457 #define BIT_MASK_TRAIN_STA_ADDR_8822B 0xffffffffffffL
11458 #define BIT_TRAIN_STA_ADDR_8822B(x) \
11459 (((x) & BIT_MASK_TRAIN_STA_ADDR_8822B) \
11460 << BIT_SHIFT_TRAIN_STA_ADDR_8822B)
11461 #define BIT_GET_TRAIN_STA_ADDR_8822B(x) \
11462 (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_8822B) & \
11463 BIT_MASK_TRAIN_STA_ADDR_8822B)
11465 /* 2 REG_RSVD_0X7B4_8822B */
11467 /* 2 REG_WMAC_PKTCNT_RWD_8822B */
11469 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8822B 4
11470 #define BIT_MASK_PKTCNT_BSSIDMAP_8822B 0xf
11471 #define BIT_PKTCNT_BSSIDMAP_8822B(x) \
11472 (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8822B) \
11473 << BIT_SHIFT_PKTCNT_BSSIDMAP_8822B)
11474 #define BIT_GET_PKTCNT_BSSIDMAP_8822B(x) \
11475 (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8822B) & \
11476 BIT_MASK_PKTCNT_BSSIDMAP_8822B)
11478 #define BIT_PKTCNT_CNTRST_8822B BIT(1)
11479 #define BIT_PKTCNT_CNTEN_8822B BIT(0)
11481 /* 2 REG_WMAC_PKTCNT_CTRL_8822B */
11482 #define BIT_WMAC_PKTCNT_TRST_8822B BIT(9)
11483 #define BIT_WMAC_PKTCNT_FEN_8822B BIT(8)
11485 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B 0
11486 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8822B 0xff
11487 #define BIT_WMAC_PKTCNT_CFGAD_8822B(x) \
11488 (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8822B) \
11489 << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B)
11490 #define BIT_GET_WMAC_PKTCNT_CFGAD_8822B(x) \
11491 (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B) & \
11492 BIT_MASK_WMAC_PKTCNT_CFGAD_8822B)
11494 /* 2 REG_IQ_DUMP_8822B */
11496 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B (64 & CPU_OPT_WIDTH)
11497 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B 0xffffffffL
11498 #define BIT_R_WMAC_MATCH_REF_MAC_8822B(x) \
11499 (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B) \
11500 << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B)
11501 #define BIT_GET_R_WMAC_MATCH_REF_MAC_8822B(x) \
11502 (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B) & \
11503 BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B)
11505 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B (32 & CPU_OPT_WIDTH)
11506 #define BIT_MASK_R_WMAC_MASK_LA_MAC_8822B 0xffffffffL
11507 #define BIT_R_WMAC_MASK_LA_MAC_8822B(x) \
11508 (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_8822B) \
11509 << BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B)
11510 #define BIT_GET_R_WMAC_MASK_LA_MAC_8822B(x) \
11511 (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B) & \
11512 BIT_MASK_R_WMAC_MASK_LA_MAC_8822B)
11514 #define BIT_SHIFT_DUMP_OK_ADDR_8822B 15
11515 #define BIT_MASK_DUMP_OK_ADDR_8822B 0x1ffff
11516 #define BIT_DUMP_OK_ADDR_8822B(x) \
11517 (((x) & BIT_MASK_DUMP_OK_ADDR_8822B) << BIT_SHIFT_DUMP_OK_ADDR_8822B)
11518 #define BIT_GET_DUMP_OK_ADDR_8822B(x) \
11519 (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8822B) & BIT_MASK_DUMP_OK_ADDR_8822B)
11521 #define BIT_SHIFT_R_TRIG_TIME_SEL_8822B 8
11522 #define BIT_MASK_R_TRIG_TIME_SEL_8822B 0x7f
11523 #define BIT_R_TRIG_TIME_SEL_8822B(x) \
11524 (((x) & BIT_MASK_R_TRIG_TIME_SEL_8822B) \
11525 << BIT_SHIFT_R_TRIG_TIME_SEL_8822B)
11526 #define BIT_GET_R_TRIG_TIME_SEL_8822B(x) \
11527 (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8822B) & \
11528 BIT_MASK_R_TRIG_TIME_SEL_8822B)
11530 #define BIT_SHIFT_R_MAC_TRIG_SEL_8822B 6
11531 #define BIT_MASK_R_MAC_TRIG_SEL_8822B 0x3
11532 #define BIT_R_MAC_TRIG_SEL_8822B(x) \
11533 (((x) & BIT_MASK_R_MAC_TRIG_SEL_8822B) \
11534 << BIT_SHIFT_R_MAC_TRIG_SEL_8822B)
11535 #define BIT_GET_R_MAC_TRIG_SEL_8822B(x) \
11536 (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8822B) & \
11537 BIT_MASK_R_MAC_TRIG_SEL_8822B)
11539 #define BIT_MAC_TRIG_REG_8822B BIT(5)
11541 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B 3
11542 #define BIT_MASK_R_LEVEL_PULSE_SEL_8822B 0x3
11543 #define BIT_R_LEVEL_PULSE_SEL_8822B(x) \
11544 (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8822B) \
11545 << BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B)
11546 #define BIT_GET_R_LEVEL_PULSE_SEL_8822B(x) \
11547 (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B) & \
11548 BIT_MASK_R_LEVEL_PULSE_SEL_8822B)
11550 #define BIT_EN_LA_MAC_8822B BIT(2)
11551 #define BIT_R_EN_IQDUMP_8822B BIT(1)
11552 #define BIT_R_IQDATA_DUMP_8822B BIT(0)
11554 /* 2 REG_WMAC_FTM_CTL_8822B */
11555 #define BIT_RXFTM_TXACK_SC_8822B BIT(6)
11556 #define BIT_RXFTM_TXACK_BW_8822B BIT(5)
11557 #define BIT_RXFTM_EN_8822B BIT(3)
11558 #define BIT_RXFTMREQ_BYDRV_8822B BIT(2)
11559 #define BIT_RXFTMREQ_EN_8822B BIT(1)
11560 #define BIT_FTM_EN_8822B BIT(0)
11562 /* 2 REG_WMAC_IQ_MDPK_FUNC_8822B */
11564 /* 2 REG_WMAC_OPTION_FUNCTION_8822B */
11566 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B (64 & CPU_OPT_WIDTH)
11567 #define BIT_MASK_R_WMAC_RX_FIL_LEN_8822B 0xffff
11568 #define BIT_R_WMAC_RX_FIL_LEN_8822B(x) \
11569 (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_8822B) \
11570 << BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B)
11571 #define BIT_GET_R_WMAC_RX_FIL_LEN_8822B(x) \
11572 (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B) & \
11573 BIT_MASK_R_WMAC_RX_FIL_LEN_8822B)
11575 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B (56 & CPU_OPT_WIDTH)
11576 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B 0xff
11577 #define BIT_R_WMAC_RXFIFO_FULL_TH_8822B(x) \
11578 (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B) \
11579 << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B)
11580 #define BIT_GET_R_WMAC_RXFIFO_FULL_TH_8822B(x) \
11581 (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B) & \
11582 BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B)
11584 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_8822B BIT(55)
11585 #define BIT_R_WMAC_RXRST_DLY_8822B BIT(54)
11586 #define BIT_R_WMAC_SRCH_TXRPT_REF_DROP_8822B BIT(53)
11587 #define BIT_R_WMAC_SRCH_TXRPT_UA1_8822B BIT(52)
11588 #define BIT_R_WMAC_SRCH_TXRPT_TYPE_8822B BIT(51)
11589 #define BIT_R_WMAC_NDP_RST_8822B BIT(50)
11590 #define BIT_R_WMAC_POWINT_EN_8822B BIT(49)
11591 #define BIT_R_WMAC_SRCH_TXRPT_PERPKT_8822B BIT(48)
11592 #define BIT_R_WMAC_SRCH_TXRPT_MID_8822B BIT(47)
11593 #define BIT_R_WMAC_PFIN_TOEN_8822B BIT(46)
11594 #define BIT_R_WMAC_FIL_SECERR_8822B BIT(45)
11595 #define BIT_R_WMAC_FIL_CTLPKTLEN_8822B BIT(44)
11596 #define BIT_R_WMAC_FIL_FCTYPE_8822B BIT(43)
11597 #define BIT_R_WMAC_FIL_FCPROVER_8822B BIT(42)
11598 #define BIT_R_WMAC_PHYSTS_SNIF_8822B BIT(41)
11599 #define BIT_R_WMAC_PHYSTS_PLCP_8822B BIT(40)
11600 #define BIT_R_MAC_TCR_VBONF_RD_8822B BIT(39)
11601 #define BIT_R_WMAC_TCR_MPAR_NDP_8822B BIT(38)
11602 #define BIT_R_WMAC_NDP_FILTER_8822B BIT(37)
11603 #define BIT_R_WMAC_RXLEN_SEL_8822B BIT(36)
11604 #define BIT_R_WMAC_RXLEN_SEL1_8822B BIT(35)
11605 #define BIT_R_OFDM_FILTER_8822B BIT(34)
11606 #define BIT_R_WMAC_CHK_OFDM_LEN_8822B BIT(33)
11607 #define BIT_R_WMAC_CHK_CCK_LEN_8822B BIT(32)
11609 #define BIT_SHIFT_R_OFDM_LEN_8822B 26
11610 #define BIT_MASK_R_OFDM_LEN_8822B 0x3f
11611 #define BIT_R_OFDM_LEN_8822B(x) \
11612 (((x) & BIT_MASK_R_OFDM_LEN_8822B) << BIT_SHIFT_R_OFDM_LEN_8822B)
11613 #define BIT_GET_R_OFDM_LEN_8822B(x) \
11614 (((x) >> BIT_SHIFT_R_OFDM_LEN_8822B) & BIT_MASK_R_OFDM_LEN_8822B)
11616 #define BIT_SHIFT_R_CCK_LEN_8822B 0
11617 #define BIT_MASK_R_CCK_LEN_8822B 0xffff
11618 #define BIT_R_CCK_LEN_8822B(x) \
11619 (((x) & BIT_MASK_R_CCK_LEN_8822B) << BIT_SHIFT_R_CCK_LEN_8822B)
11620 #define BIT_GET_R_CCK_LEN_8822B(x) \
11621 (((x) >> BIT_SHIFT_R_CCK_LEN_8822B) & BIT_MASK_R_CCK_LEN_8822B)
11623 /* 2 REG_RX_FILTER_FUNCTION_8822B */
11624 #define BIT_R_WMAC_MHRDDY_LATCH_8822B BIT(14)
11625 #define BIT_R_WMAC_MHRDDY_CLR_8822B BIT(13)
11626 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY1_8822B BIT(12)
11627 #define BIT_WMAC_DIS_VHT_PLCP_CHK_MU_8822B BIT(11)
11628 #define BIT_R_CHK_DELIMIT_LEN_8822B BIT(10)
11629 #define BIT_R_REAPTER_ADDR_MATCH_8822B BIT(9)
11630 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY_8822B BIT(8)
11631 #define BIT_R_LATCH_MACHRDY_8822B BIT(7)
11632 #define BIT_R_WMAC_RXFIL_REND_8822B BIT(6)
11633 #define BIT_R_WMAC_MPDURDY_CLR_8822B BIT(5)
11634 #define BIT_R_WMAC_CLRRXSEC_8822B BIT(4)
11635 #define BIT_R_WMAC_RXFIL_RDEL_8822B BIT(3)
11636 #define BIT_R_WMAC_RXFIL_FCSE_8822B BIT(2)
11637 #define BIT_R_WMAC_RXFIL_MESH_DEL_8822B BIT(1)
11638 #define BIT_R_WMAC_RXFIL_MASKM_8822B BIT(0)
11640 /* 2 REG_NDP_SIG_8822B */
11642 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B 0
11643 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8822B 0x1fffff
11644 #define BIT_R_WMAC_TXNDP_SIGB_8822B(x) \
11645 (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8822B) \
11646 << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B)
11647 #define BIT_GET_R_WMAC_TXNDP_SIGB_8822B(x) \
11648 (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B) & \
11649 BIT_MASK_R_WMAC_TXNDP_SIGB_8822B)
11651 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8822B */
11653 #define BIT_SHIFT_R_MAC_DEBUG_8822B (32 & CPU_OPT_WIDTH)
11654 #define BIT_MASK_R_MAC_DEBUG_8822B 0xffffffffL
11655 #define BIT_R_MAC_DEBUG_8822B(x) \
11656 (((x) & BIT_MASK_R_MAC_DEBUG_8822B) << BIT_SHIFT_R_MAC_DEBUG_8822B)
11657 #define BIT_GET_R_MAC_DEBUG_8822B(x) \
11658 (((x) >> BIT_SHIFT_R_MAC_DEBUG_8822B) & BIT_MASK_R_MAC_DEBUG_8822B)
11660 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8822B 8
11661 #define BIT_MASK_R_MAC_DBG_SHIFT_8822B 0x7
11662 #define BIT_R_MAC_DBG_SHIFT_8822B(x) \
11663 (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8822B) \
11664 << BIT_SHIFT_R_MAC_DBG_SHIFT_8822B)
11665 #define BIT_GET_R_MAC_DBG_SHIFT_8822B(x) \
11666 (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8822B) & \
11667 BIT_MASK_R_MAC_DBG_SHIFT_8822B)
11669 #define BIT_SHIFT_R_MAC_DBG_SEL_8822B 0
11670 #define BIT_MASK_R_MAC_DBG_SEL_8822B 0x3
11671 #define BIT_R_MAC_DBG_SEL_8822B(x) \
11672 (((x) & BIT_MASK_R_MAC_DBG_SEL_8822B) << BIT_SHIFT_R_MAC_DBG_SEL_8822B)
11673 #define BIT_GET_R_MAC_DBG_SEL_8822B(x) \
11674 (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8822B) & BIT_MASK_R_MAC_DBG_SEL_8822B)
11676 /* 2 REG_RTS_ADDRESS_0_8822B */
11678 /* 2 REG_RTS_ADDRESS_1_8822B */
11680 /* 2 REG__RPFM_MAP1_8822B
11681 * (RX PAYLOAD FILTER MAP FRAME TYPE CONTROL REGISTER GROUP 1
11683 #define BIT_DATA_RPFM15EN_8822B BIT(15)
11684 #define BIT_DATA_RPFM14EN_8822B BIT(14)
11685 #define BIT_DATA_RPFM13EN_8822B BIT(13)
11686 #define BIT_DATA_RPFM12EN_8822B BIT(12)
11687 #define BIT_DATA_RPFM11EN_8822B BIT(11)
11688 #define BIT_DATA_RPFM10EN_8822B BIT(10)
11689 #define BIT_DATA_RPFM9EN_8822B BIT(9)
11690 #define BIT_DATA_RPFM8EN_8822B BIT(8)
11691 #define BIT_DATA_RPFM7EN_8822B BIT(7)
11692 #define BIT_DATA_RPFM6EN_8822B BIT(6)
11693 #define BIT_DATA_RPFM5EN_8822B BIT(5)
11694 #define BIT_DATA_RPFM4EN_8822B BIT(4)
11695 #define BIT_DATA_RPFM3EN_8822B BIT(3)
11696 #define BIT_DATA_RPFM2EN_8822B BIT(2)
11697 #define BIT_DATA_RPFM1EN_8822B BIT(1)
11698 #define BIT_DATA_RPFM0EN_8822B BIT(0)
11700 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1_8822B */
11701 #define BIT_LTECOEX_ACCESS_START_V1_8822B BIT(31)
11702 #define BIT_LTECOEX_WRITE_MODE_V1_8822B BIT(30)
11703 #define BIT_LTECOEX_READY_BIT_V1_8822B BIT(29)
11705 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8822B 16
11706 #define BIT_MASK_WRITE_BYTE_EN_V1_8822B 0xf
11707 #define BIT_WRITE_BYTE_EN_V1_8822B(x) \
11708 (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8822B) \
11709 << BIT_SHIFT_WRITE_BYTE_EN_V1_8822B)
11710 #define BIT_GET_WRITE_BYTE_EN_V1_8822B(x) \
11711 (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8822B) & \
11712 BIT_MASK_WRITE_BYTE_EN_V1_8822B)
11714 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B 0
11715 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8822B 0xffff
11716 #define BIT_LTECOEX_REG_ADDR_V1_8822B(x) \
11717 (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8822B) \
11718 << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B)
11719 #define BIT_GET_LTECOEX_REG_ADDR_V1_8822B(x) \
11720 (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B) & \
11721 BIT_MASK_LTECOEX_REG_ADDR_V1_8822B)
11723 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8822B */
11725 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8822B 0
11726 #define BIT_MASK_LTECOEX_W_DATA_V1_8822B 0xffffffffL
11727 #define BIT_LTECOEX_W_DATA_V1_8822B(x) \
11728 (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8822B) \
11729 << BIT_SHIFT_LTECOEX_W_DATA_V1_8822B)
11730 #define BIT_GET_LTECOEX_W_DATA_V1_8822B(x) \
11731 (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8822B) & \
11732 BIT_MASK_LTECOEX_W_DATA_V1_8822B)
11734 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8822B */
11736 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8822B 0
11737 #define BIT_MASK_LTECOEX_R_DATA_V1_8822B 0xffffffffL
11738 #define BIT_LTECOEX_R_DATA_V1_8822B(x) \
11739 (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8822B) \
11740 << BIT_SHIFT_LTECOEX_R_DATA_V1_8822B)
11741 #define BIT_GET_LTECOEX_R_DATA_V1_8822B(x) \
11742 (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8822B) & \
11743 BIT_MASK_LTECOEX_R_DATA_V1_8822B)
11745 /* 2 REG_NOT_VALID_8822B */
11747 /* 2 REG_SDIO_TX_CTRL_8822B */
11749 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8822B 16
11750 #define BIT_MASK_SDIO_INT_TIMEOUT_8822B 0xffff
11751 #define BIT_SDIO_INT_TIMEOUT_8822B(x) \
11752 (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8822B) \
11753 << BIT_SHIFT_SDIO_INT_TIMEOUT_8822B)
11754 #define BIT_GET_SDIO_INT_TIMEOUT_8822B(x) \
11755 (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8822B) & \
11756 BIT_MASK_SDIO_INT_TIMEOUT_8822B)
11758 #define BIT_IO_ERR_STATUS_8822B BIT(15)
11759 #define BIT_REPLY_ERRCRC_IN_DATA_8822B BIT(9)
11760 #define BIT_EN_CMD53_OVERLAP_8822B BIT(8)
11761 #define BIT_REPLY_ERR_IN_R5_8822B BIT(7)
11762 #define BIT_R18A_EN_8822B BIT(6)
11763 #define BIT_INIT_CMD_EN_8822B BIT(5)
11764 #define BIT_EN_RXDMA_MASK_INT_8822B BIT(2)
11765 #define BIT_EN_MASK_TIMER_8822B BIT(1)
11766 #define BIT_CMD_ERR_STOP_INT_EN_8822B BIT(0)
11768 /* 2 REG_SDIO_HIMR_8822B */
11769 #define BIT_SDIO_CRCERR_MSK_8822B BIT(31)
11770 #define BIT_SDIO_HSISR3_IND_MSK_8822B BIT(30)
11771 #define BIT_SDIO_HSISR2_IND_MSK_8822B BIT(29)
11772 #define BIT_SDIO_HEISR_IND_MSK_8822B BIT(28)
11773 #define BIT_SDIO_CTWEND_MSK_8822B BIT(27)
11774 #define BIT_SDIO_ATIMEND_E_MSK_8822B BIT(26)
11775 #define BIT_SDIIO_ATIMEND_MSK_8822B BIT(25)
11776 #define BIT_SDIO_OCPINT_MSK_8822B BIT(24)
11777 #define BIT_SDIO_PSTIMEOUT_MSK_8822B BIT(23)
11778 #define BIT_SDIO_GTINT4_MSK_8822B BIT(22)
11779 #define BIT_SDIO_GTINT3_MSK_8822B BIT(21)
11780 #define BIT_SDIO_HSISR_IND_MSK_8822B BIT(20)
11781 #define BIT_SDIO_CPWM2_MSK_8822B BIT(19)
11782 #define BIT_SDIO_CPWM1_MSK_8822B BIT(18)
11783 #define BIT_SDIO_C2HCMD_INT_MSK_8822B BIT(17)
11784 #define BIT_SDIO_BCNERLY_INT_MSK_8822B BIT(16)
11785 #define BIT_SDIO_TXBCNERR_MSK_8822B BIT(7)
11786 #define BIT_SDIO_TXBCNOK_MSK_8822B BIT(6)
11787 #define BIT_SDIO_RXFOVW_MSK_8822B BIT(5)
11788 #define BIT_SDIO_TXFOVW_MSK_8822B BIT(4)
11789 #define BIT_SDIO_RXERR_MSK_8822B BIT(3)
11790 #define BIT_SDIO_TXERR_MSK_8822B BIT(2)
11791 #define BIT_SDIO_AVAL_MSK_8822B BIT(1)
11792 #define BIT_RX_REQUEST_MSK_8822B BIT(0)
11794 /* 2 REG_SDIO_HISR_8822B */
11795 #define BIT_SDIO_CRCERR_8822B BIT(31)
11796 #define BIT_SDIO_HSISR3_IND_8822B BIT(30)
11797 #define BIT_SDIO_HSISR2_IND_8822B BIT(29)
11798 #define BIT_SDIO_HEISR_IND_8822B BIT(28)
11799 #define BIT_SDIO_CTWEND_8822B BIT(27)
11800 #define BIT_SDIO_ATIMEND_E_8822B BIT(26)
11801 #define BIT_SDIO_ATIMEND_8822B BIT(25)
11802 #define BIT_SDIO_OCPINT_8822B BIT(24)
11803 #define BIT_SDIO_PSTIMEOUT_8822B BIT(23)
11804 #define BIT_SDIO_GTINT4_8822B BIT(22)
11805 #define BIT_SDIO_GTINT3_8822B BIT(21)
11806 #define BIT_SDIO_HSISR_IND_8822B BIT(20)
11807 #define BIT_SDIO_CPWM2_8822B BIT(19)
11808 #define BIT_SDIO_CPWM1_8822B BIT(18)
11809 #define BIT_SDIO_C2HCMD_INT_8822B BIT(17)
11810 #define BIT_SDIO_BCNERLY_INT_8822B BIT(16)
11811 #define BIT_SDIO_TXBCNERR_8822B BIT(7)
11812 #define BIT_SDIO_TXBCNOK_8822B BIT(6)
11813 #define BIT_SDIO_RXFOVW_8822B BIT(5)
11814 #define BIT_SDIO_TXFOVW_8822B BIT(4)
11815 #define BIT_SDIO_RXERR_8822B BIT(3)
11816 #define BIT_SDIO_TXERR_8822B BIT(2)
11817 #define BIT_SDIO_AVAL_8822B BIT(1)
11818 #define BIT_RX_REQUEST_8822B BIT(0)
11820 /* 2 REG_SDIO_RX_REQ_LEN_8822B */
11822 #define BIT_SHIFT_RX_REQ_LEN_V1_8822B 0
11823 #define BIT_MASK_RX_REQ_LEN_V1_8822B 0x3ffff
11824 #define BIT_RX_REQ_LEN_V1_8822B(x) \
11825 (((x) & BIT_MASK_RX_REQ_LEN_V1_8822B) << BIT_SHIFT_RX_REQ_LEN_V1_8822B)
11826 #define BIT_GET_RX_REQ_LEN_V1_8822B(x) \
11827 (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8822B) & BIT_MASK_RX_REQ_LEN_V1_8822B)
11829 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8822B */
11831 #define BIT_SHIFT_FREE_TXPG_SEQ_8822B 0
11832 #define BIT_MASK_FREE_TXPG_SEQ_8822B 0xff
11833 #define BIT_FREE_TXPG_SEQ_8822B(x) \
11834 (((x) & BIT_MASK_FREE_TXPG_SEQ_8822B) << BIT_SHIFT_FREE_TXPG_SEQ_8822B)
11835 #define BIT_GET_FREE_TXPG_SEQ_8822B(x) \
11836 (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8822B) & BIT_MASK_FREE_TXPG_SEQ_8822B)
11838 /* 2 REG_SDIO_FREE_TXPG_8822B */
11840 #define BIT_SHIFT_MID_FREEPG_V1_8822B 16
11841 #define BIT_MASK_MID_FREEPG_V1_8822B 0xfff
11842 #define BIT_MID_FREEPG_V1_8822B(x) \
11843 (((x) & BIT_MASK_MID_FREEPG_V1_8822B) << BIT_SHIFT_MID_FREEPG_V1_8822B)
11844 #define BIT_GET_MID_FREEPG_V1_8822B(x) \
11845 (((x) >> BIT_SHIFT_MID_FREEPG_V1_8822B) & BIT_MASK_MID_FREEPG_V1_8822B)
11847 #define BIT_SHIFT_HIQ_FREEPG_V1_8822B 0
11848 #define BIT_MASK_HIQ_FREEPG_V1_8822B 0xfff
11849 #define BIT_HIQ_FREEPG_V1_8822B(x) \
11850 (((x) & BIT_MASK_HIQ_FREEPG_V1_8822B) << BIT_SHIFT_HIQ_FREEPG_V1_8822B)
11851 #define BIT_GET_HIQ_FREEPG_V1_8822B(x) \
11852 (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8822B) & BIT_MASK_HIQ_FREEPG_V1_8822B)
11854 /* 2 REG_SDIO_FREE_TXPG2_8822B */
11856 #define BIT_SHIFT_PUB_FREEPG_V1_8822B 16
11857 #define BIT_MASK_PUB_FREEPG_V1_8822B 0xfff
11858 #define BIT_PUB_FREEPG_V1_8822B(x) \
11859 (((x) & BIT_MASK_PUB_FREEPG_V1_8822B) << BIT_SHIFT_PUB_FREEPG_V1_8822B)
11860 #define BIT_GET_PUB_FREEPG_V1_8822B(x) \
11861 (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8822B) & BIT_MASK_PUB_FREEPG_V1_8822B)
11863 #define BIT_SHIFT_LOW_FREEPG_V1_8822B 0
11864 #define BIT_MASK_LOW_FREEPG_V1_8822B 0xfff
11865 #define BIT_LOW_FREEPG_V1_8822B(x) \
11866 (((x) & BIT_MASK_LOW_FREEPG_V1_8822B) << BIT_SHIFT_LOW_FREEPG_V1_8822B)
11867 #define BIT_GET_LOW_FREEPG_V1_8822B(x) \
11868 (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8822B) & BIT_MASK_LOW_FREEPG_V1_8822B)
11870 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8822B */
11872 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B 24
11873 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8822B 0xff
11874 #define BIT_NOAC_OQT_FREEPG_V1_8822B(x) \
11875 (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8822B) \
11876 << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B)
11877 #define BIT_GET_NOAC_OQT_FREEPG_V1_8822B(x) \
11878 (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B) & \
11879 BIT_MASK_NOAC_OQT_FREEPG_V1_8822B)
11881 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8822B 16
11882 #define BIT_MASK_AC_OQT_FREEPG_V1_8822B 0xff
11883 #define BIT_AC_OQT_FREEPG_V1_8822B(x) \
11884 (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8822B) \
11885 << BIT_SHIFT_AC_OQT_FREEPG_V1_8822B)
11886 #define BIT_GET_AC_OQT_FREEPG_V1_8822B(x) \
11887 (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8822B) & \
11888 BIT_MASK_AC_OQT_FREEPG_V1_8822B)
11890 #define BIT_SHIFT_EXQ_FREEPG_V1_8822B 0
11891 #define BIT_MASK_EXQ_FREEPG_V1_8822B 0xfff
11892 #define BIT_EXQ_FREEPG_V1_8822B(x) \
11893 (((x) & BIT_MASK_EXQ_FREEPG_V1_8822B) << BIT_SHIFT_EXQ_FREEPG_V1_8822B)
11894 #define BIT_GET_EXQ_FREEPG_V1_8822B(x) \
11895 (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8822B) & BIT_MASK_EXQ_FREEPG_V1_8822B)
11897 /* 2 REG_SDIO_HTSFR_INFO_8822B */
11899 #define BIT_SHIFT_HTSFR1_8822B 16
11900 #define BIT_MASK_HTSFR1_8822B 0xffff
11901 #define BIT_HTSFR1_8822B(x) \
11902 (((x) & BIT_MASK_HTSFR1_8822B) << BIT_SHIFT_HTSFR1_8822B)
11903 #define BIT_GET_HTSFR1_8822B(x) \
11904 (((x) >> BIT_SHIFT_HTSFR1_8822B) & BIT_MASK_HTSFR1_8822B)
11906 #define BIT_SHIFT_HTSFR0_8822B 0
11907 #define BIT_MASK_HTSFR0_8822B 0xffff
11908 #define BIT_HTSFR0_8822B(x) \
11909 (((x) & BIT_MASK_HTSFR0_8822B) << BIT_SHIFT_HTSFR0_8822B)
11910 #define BIT_GET_HTSFR0_8822B(x) \
11911 (((x) >> BIT_SHIFT_HTSFR0_8822B) & BIT_MASK_HTSFR0_8822B)
11913 /* 2 REG_SDIO_HCPWM1_V2_8822B */
11914 #define BIT_TOGGLING_8822B BIT(7)
11915 #define BIT_ACK_8822B BIT(6)
11916 #define BIT_SYS_CLK_8822B BIT(0)
11918 /* 2 REG_SDIO_HCPWM2_V2_8822B */
11920 /* 2 REG_SDIO_INDIRECT_REG_CFG_8822B */
11921 #define BIT_INDIRECT_REG_RDY_8822B BIT(20)
11922 #define BIT_INDIRECT_REG_R_8822B BIT(19)
11923 #define BIT_INDIRECT_REG_W_8822B BIT(18)
11925 #define BIT_SHIFT_INDIRECT_REG_SIZE_8822B 16
11926 #define BIT_MASK_INDIRECT_REG_SIZE_8822B 0x3
11927 #define BIT_INDIRECT_REG_SIZE_8822B(x) \
11928 (((x) & BIT_MASK_INDIRECT_REG_SIZE_8822B) \
11929 << BIT_SHIFT_INDIRECT_REG_SIZE_8822B)
11930 #define BIT_GET_INDIRECT_REG_SIZE_8822B(x) \
11931 (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8822B) & \
11932 BIT_MASK_INDIRECT_REG_SIZE_8822B)
11934 #define BIT_SHIFT_INDIRECT_REG_ADDR_8822B 0
11935 #define BIT_MASK_INDIRECT_REG_ADDR_8822B 0xffff
11936 #define BIT_INDIRECT_REG_ADDR_8822B(x) \
11937 (((x) & BIT_MASK_INDIRECT_REG_ADDR_8822B) \
11938 << BIT_SHIFT_INDIRECT_REG_ADDR_8822B)
11939 #define BIT_GET_INDIRECT_REG_ADDR_8822B(x) \
11940 (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8822B) & \
11941 BIT_MASK_INDIRECT_REG_ADDR_8822B)
11943 /* 2 REG_SDIO_INDIRECT_REG_DATA_8822B */
11945 #define BIT_SHIFT_INDIRECT_REG_DATA_8822B 0
11946 #define BIT_MASK_INDIRECT_REG_DATA_8822B 0xffffffffL
11947 #define BIT_INDIRECT_REG_DATA_8822B(x) \
11948 (((x) & BIT_MASK_INDIRECT_REG_DATA_8822B) \
11949 << BIT_SHIFT_INDIRECT_REG_DATA_8822B)
11950 #define BIT_GET_INDIRECT_REG_DATA_8822B(x) \
11951 (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8822B) & \
11952 BIT_MASK_INDIRECT_REG_DATA_8822B)
11954 /* 2 REG_SDIO_H2C_8822B */
11956 #define BIT_SHIFT_SDIO_H2C_MSG_8822B 0
11957 #define BIT_MASK_SDIO_H2C_MSG_8822B 0xffffffffL
11958 #define BIT_SDIO_H2C_MSG_8822B(x) \
11959 (((x) & BIT_MASK_SDIO_H2C_MSG_8822B) << BIT_SHIFT_SDIO_H2C_MSG_8822B)
11960 #define BIT_GET_SDIO_H2C_MSG_8822B(x) \
11961 (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8822B) & BIT_MASK_SDIO_H2C_MSG_8822B)
11963 /* 2 REG_SDIO_C2H_8822B */
11965 #define BIT_SHIFT_SDIO_C2H_MSG_8822B 0
11966 #define BIT_MASK_SDIO_C2H_MSG_8822B 0xffffffffL
11967 #define BIT_SDIO_C2H_MSG_8822B(x) \
11968 (((x) & BIT_MASK_SDIO_C2H_MSG_8822B) << BIT_SHIFT_SDIO_C2H_MSG_8822B)
11969 #define BIT_GET_SDIO_C2H_MSG_8822B(x) \
11970 (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8822B) & BIT_MASK_SDIO_C2H_MSG_8822B)
11972 /* 2 REG_SDIO_HRPWM1_8822B */
11973 #define BIT_TOGGLING_8822B BIT(7)
11974 #define BIT_ACK_8822B BIT(6)
11975 #define BIT_32K_PERMISSION_8822B BIT(0)
11977 /* 2 REG_SDIO_HRPWM2_8822B */
11979 /* 2 REG_SDIO_HPS_CLKR_8822B */
11981 /* 2 REG_SDIO_BUS_CTRL_8822B */
11982 #define BIT_PAD_CLK_XHGE_EN_8822B BIT(3)
11983 #define BIT_INTER_CLK_EN_8822B BIT(2)
11984 #define BIT_EN_RPT_TXCRC_8822B BIT(1)
11985 #define BIT_DIS_RXDMA_STS_8822B BIT(0)
11987 /* 2 REG_SDIO_HSUS_CTRL_8822B */
11988 #define BIT_INTR_CTRL_8822B BIT(4)
11989 #define BIT_SDIO_VOLTAGE_8822B BIT(3)
11990 #define BIT_BYPASS_INIT_8822B BIT(2)
11991 #define BIT_HCI_RESUME_RDY_8822B BIT(1)
11992 #define BIT_HCI_SUS_REQ_8822B BIT(0)
11994 /* 2 REG_SDIO_RESPONSE_TIMER_8822B */
11996 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8822B 0
11997 #define BIT_MASK_CMDIN_2RESP_TIMER_8822B 0xffff
11998 #define BIT_CMDIN_2RESP_TIMER_8822B(x) \
11999 (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8822B) \
12000 << BIT_SHIFT_CMDIN_2RESP_TIMER_8822B)
12001 #define BIT_GET_CMDIN_2RESP_TIMER_8822B(x) \
12002 (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8822B) & \
12003 BIT_MASK_CMDIN_2RESP_TIMER_8822B)
12005 /* 2 REG_SDIO_CMD_CRC_8822B */
12007 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8822B 0
12008 #define BIT_MASK_SDIO_CMD_CRC_V1_8822B 0xff
12009 #define BIT_SDIO_CMD_CRC_V1_8822B(x) \
12010 (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8822B) \
12011 << BIT_SHIFT_SDIO_CMD_CRC_V1_8822B)
12012 #define BIT_GET_SDIO_CMD_CRC_V1_8822B(x) \
12013 (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8822B) & \
12014 BIT_MASK_SDIO_CMD_CRC_V1_8822B)
12016 /* 2 REG_SDIO_HSISR_8822B */
12017 #define BIT_DRV_WLAN_INT_CLR_8822B BIT(1)
12018 #define BIT_DRV_WLAN_INT_8822B BIT(0)
12020 /* 2 REG_SDIO_HSIMR_8822B */
12021 #define BIT_HISR_MASK_8822B BIT(0)
12023 /* 2 REG_SDIO_ERR_RPT_8822B */
12024 #define BIT_HR_FF_OVF_8822B BIT(6)
12025 #define BIT_HR_FF_UDN_8822B BIT(5)
12026 #define BIT_TXDMA_BUSY_ERR_8822B BIT(4)
12027 #define BIT_TXDMA_VLD_ERR_8822B BIT(3)
12028 #define BIT_QSEL_UNKNOWN_ERR_8822B BIT(2)
12029 #define BIT_QSEL_MIS_ERR_8822B BIT(1)
12030 #define BIT_SDIO_OVERRD_ERR_8822B BIT(0)
12032 /* 2 REG_SDIO_CMD_ERRCNT_8822B */
12034 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8822B 0
12035 #define BIT_MASK_CMD_CRC_ERR_CNT_8822B 0xff
12036 #define BIT_CMD_CRC_ERR_CNT_8822B(x) \
12037 (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8822B) \
12038 << BIT_SHIFT_CMD_CRC_ERR_CNT_8822B)
12039 #define BIT_GET_CMD_CRC_ERR_CNT_8822B(x) \
12040 (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8822B) & \
12041 BIT_MASK_CMD_CRC_ERR_CNT_8822B)
12043 /* 2 REG_SDIO_DATA_ERRCNT_8822B */
12045 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8822B 0
12046 #define BIT_MASK_DATA_CRC_ERR_CNT_8822B 0xff
12047 #define BIT_DATA_CRC_ERR_CNT_8822B(x) \
12048 (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8822B) \
12049 << BIT_SHIFT_DATA_CRC_ERR_CNT_8822B)
12050 #define BIT_GET_DATA_CRC_ERR_CNT_8822B(x) \
12051 (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8822B) & \
12052 BIT_MASK_DATA_CRC_ERR_CNT_8822B)
12054 /* 2 REG_SDIO_CMD_ERR_CONTENT_8822B */
12056 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B 0
12057 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B 0xffffffffffL
12058 #define BIT_SDIO_CMD_ERR_CONTENT_8822B(x) \
12059 (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B) \
12060 << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B)
12061 #define BIT_GET_SDIO_CMD_ERR_CONTENT_8822B(x) \
12062 (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B) & \
12063 BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B)
12065 /* 2 REG_SDIO_CRC_ERR_IDX_8822B */
12066 #define BIT_D3_CRC_ERR_8822B BIT(4)
12067 #define BIT_D2_CRC_ERR_8822B BIT(3)
12068 #define BIT_D1_CRC_ERR_8822B BIT(2)
12069 #define BIT_D0_CRC_ERR_8822B BIT(1)
12070 #define BIT_CMD_CRC_ERR_8822B BIT(0)
12072 /* 2 REG_SDIO_DATA_CRC_8822B */
12074 #define BIT_SHIFT_SDIO_DATA_CRC_8822B 0
12075 #define BIT_MASK_SDIO_DATA_CRC_8822B 0xff
12076 #define BIT_SDIO_DATA_CRC_8822B(x) \
12077 (((x) & BIT_MASK_SDIO_DATA_CRC_8822B) << BIT_SHIFT_SDIO_DATA_CRC_8822B)
12078 #define BIT_GET_SDIO_DATA_CRC_8822B(x) \
12079 (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8822B) & BIT_MASK_SDIO_DATA_CRC_8822B)
12081 /* 2 REG_SDIO_DATA_REPLY_TIME_8822B */
12083 #define BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B 0
12084 #define BIT_MASK_SDIO_DATA_REPLY_TIME_8822B 0x7
12085 #define BIT_SDIO_DATA_REPLY_TIME_8822B(x) \
12086 (((x) & BIT_MASK_SDIO_DATA_REPLY_TIME_8822B) \
12087 << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B)
12088 #define BIT_GET_SDIO_DATA_REPLY_TIME_8822B(x) \
12089 (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B) & \
12090 BIT_MASK_SDIO_DATA_REPLY_TIME_8822B)