1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 ******************************************************************************/
15 #ifndef __HAL_DATA_H__
16 #define __HAL_DATA_H__
18 #include "odm_precomp.h"
19 #include <hal_btcoex.h>
24 /* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. */
27 RT_MULTI_FUNC_NONE = 0x00,
28 RT_MULTI_FUNC_WIFI = 0x01,
29 RT_MULTI_FUNC_BT = 0x02,
30 RT_MULTI_FUNC_GPS = 0x04,
33 /* <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. */
35 enum RT_POLARITY_CTL {
36 RT_POLARITY_LOW_ACT = 0,
37 RT_POLARITY_HIGH_ACT = 1,
40 /* For RTL8723 regulator mode. by tynli. 2011.01.14. */
41 enum RT_REGULATOR_MODE {
42 RT_SWITCHING_REGULATOR = 0,
47 RT_AMPDU_BURST_NONE = 0,
48 RT_AMPDU_BURST_92D = 1,
49 RT_AMPDU_BURST_88E = 2,
50 RT_AMPDU_BURST_8812_4 = 3,
51 RT_AMPDU_BURST_8812_8 = 4,
52 RT_AMPDU_BURST_8812_12 = 5,
53 RT_AMPDU_BURST_8812_15 = 6,
54 RT_AMPDU_BURST_8723B = 7,
57 #define CHANNEL_MAX_NUMBER 14+24+21 /* 14 is the max channel number */
58 #define CHANNEL_MAX_NUMBER_2G 14
59 #define CHANNEL_MAX_NUMBER_5G 54 /* Please refer to "phy_GetChnlGroup8812A" and "Hal_ReadTxPowerInfo8812A" */
60 #define CHANNEL_MAX_NUMBER_5G_80M 7
61 #define CHANNEL_GROUP_MAX 3+9 /* ch1~3, ch4~9, ch10~14 total three groups */
62 #define MAX_PG_GROUP 13
64 /* Tx Power Limit Table Size */
65 #define MAX_REGULATION_NUM 4
66 #define MAX_RF_PATH_NUM_IN_POWER_LIMIT_TABLE 4
67 #define MAX_2_4G_BANDWITH_NUM 4
68 #define MAX_RATE_SECTION_NUM 10
69 #define MAX_5G_BANDWITH_NUM 4
71 #define MAX_BASE_NUM_IN_PHY_REG_PG_2_4G 10 /* CCK:1, OFDM:1, HT:4, VHT:4 */
72 #define MAX_BASE_NUM_IN_PHY_REG_PG_5G 9 /* OFDM:1, HT:4, VHT:4 */
75 /* duplicate code, will move to ODM ######### */
76 /* define IQK_MAC_REG_NUM 4 */
77 /* define IQK_ADDA_REG_NUM 16 */
79 /* define IQK_BB_REG_NUM 10 */
80 #define IQK_BB_REG_NUM_92C 9
81 #define IQK_BB_REG_NUM_92D 10
82 #define IQK_BB_REG_NUM_test 6
84 #define IQK_Matrix_Settings_NUM_92D 1+24+21
86 /* define HP_THERMAL_NUM 8 */
87 /* duplicate code, will move to ODM ######### */
90 SINGLEMAC_SINGLEPHY, /* SMSP */
91 DUALMAC_DUALPHY, /* DMDP */
92 DUALMAC_SINGLEPHY, /* DMSP */
95 #define PAGE_SIZE_128 128
96 #define PAGE_SIZE_256 256
97 #define PAGE_SIZE_512 512
102 #define DYNAMIC_FUNC_BT BIT0
109 /* Upper and Lower Signal threshold for Rate Adaptive */
110 int UndecoratedSmoothedPWDB;
111 int UndecoratedSmoothedCCK;
112 int EntryMinUndecoratedSmoothedPWDB;
113 int EntryMaxUndecoratedSmoothedPWDB;
114 int MinUndecoratedPWDBForDM;
115 int LastMinUndecoratedPWDBForDM;
117 s32 UndecoratedSmoothedBeacon;
119 /* duplicate code, will move to ODM ######### */
121 u8 bDynamicTxPowerEnable;
123 u8 DynamicTxHighPowerLvl;/* Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 */
125 /* for tx power tracking */
128 u8 bTXPowerTrackingInit;
129 u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
132 u8 ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
141 u32 APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */
143 u8 bAPKThermalMeterIgnore;
152 u32 ADDA_backup[IQK_ADDA_REG_NUM];
153 u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
154 u32 IQK_BB_backup_recover[9];
155 u32 IQK_BB_backup[IQK_BB_REG_NUM];
157 u8 PowerIndex_backup[6];
166 u8 ThermalValue_HP[HP_THERMAL_NUM];
167 u8 ThermalValue_HP_index;
170 /* for TxPwrTracking2 */
176 u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */
178 u32 prv_traffic_idx; /* edca turbo */
179 /* duplicate code, will move to ODM ######### */
181 /* Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas */
186 struct hal_com_data {
187 HAL_VERSION VersionID;
188 enum RT_MULTI_FUNC MultiFunc; /* For multi-function consideration. */
189 enum RT_POLARITY_CTL PolarityCtl; /* For Wifi PDn Polarity control. */
190 enum RT_REGULATOR_MODE RegulatorMode; /* switching regulator or LDO */
193 u16 FirmwareVersionRev;
194 u16 FirmwareSubVersion;
195 u16 FirmwareSignature;
197 /* current WIFI_PHY values */
198 enum WIRELESS_MODE CurrentWirelessMode;
199 enum CHANNEL_WIDTH CurrentChannelBW;
200 enum BAND_TYPE CurrentBandType; /* 0:2.4G, 1:5G */
201 enum BAND_TYPE BandSet;
203 u8 CurrentCenterFrequencyIndex1;
204 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
205 u8 nCur80MhzPrimeSC; /* used for primary 40MHz of 80MHz mode */
209 u16 ForcedDataRate;/* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. */
222 u8 DefaultInitialGain[4];
223 /* EEPROM setting. */
228 u8 EEPROMSubCustomerID;
231 u8 EEPROMThermalMeter;
232 u8 EEPROMBluetoothCoexist;
233 u8 EEPROMBluetoothType;
234 u8 EEPROMBluetoothAntNum;
235 u8 EEPROMBluetoothAntIsolation;
236 u8 EEPROMBluetoothRadioShared;
237 u8 bTXPowerDataReadFromEEPORM;
238 u8 bAPKThermalMeterIgnore;
239 u8 bDisableSWChannelPlan; /* flag of disable software change channel plan */
242 u8 EfuseUsedPercentage;
247 u8 Index24G_CCK_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
248 u8 Index24G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
249 /* If only one tx, only BW20 and OFDM are used. */
250 s8 CCK_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
251 s8 OFDM_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
252 s8 BW20_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
253 s8 BW40_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
255 u8 Index5G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
256 u8 Index5G_BW80_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER_5G_80M];
257 s8 OFDM_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
258 s8 BW20_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
259 s8 BW40_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
260 s8 BW80_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
265 u8 TxPwrInPercentage;
267 u8 TxPwrCalibrateRate;
268 /* TX power by rate table at most 4RF path. */
269 /* The register is */
270 /* VHT TX power by rate off setArray = */
271 /* Band:-2G&5G = 0 / 1 */
272 /* RF: at most 4*4 = ABCD = 0/1/2/3 */
273 /* CCK = 0 OFDM = 1/2 HT-MCS 0-15 =3/4/56 VHT =7/8/9/10/11 */
276 s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_BAND]
277 [TX_PWR_BY_RATE_NUM_RF]
278 [TX_PWR_BY_RATE_NUM_RF]
279 [TX_PWR_BY_RATE_NUM_RATE];
282 /* 2 Power Limit Table */
283 u8 TxPwrLevelCck[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
284 u8 TxPwrLevelHT40_1S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
285 u8 TxPwrLevelHT40_2S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
286 s8 TxPwrHt20Diff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];/* HT 20<->40 Pwr diff */
287 u8 TxPwrLegacyHtDiff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];/* For HT<->legacy pwr diff */
289 /* Power Limit Table for 2.4G */
290 s8 TxPwrLimit_2_4G[MAX_REGULATION_NUM]
291 [MAX_2_4G_BANDWITH_NUM]
292 [MAX_RATE_SECTION_NUM]
293 [CHANNEL_MAX_NUMBER_2G]
296 /* Power Limit Table for 5G */
297 s8 TxPwrLimit_5G[MAX_REGULATION_NUM]
298 [MAX_5G_BANDWITH_NUM]
299 [MAX_RATE_SECTION_NUM]
300 [CHANNEL_MAX_NUMBER_5G]
304 /* Store the original power by rate value of the base of each rate section of rf path A & B */
305 u8 TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF]
306 [TX_PWR_BY_RATE_NUM_RF]
307 [MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
308 u8 TxPwrByRateBase5G[TX_PWR_BY_RATE_NUM_RF]
309 [TX_PWR_BY_RATE_NUM_RF]
310 [MAX_BASE_NUM_IN_PHY_REG_PG_5G];
312 /* For power group */
313 u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
314 u8 PwrGroupHT40[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
320 u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */
321 /* The current Tx Power Level */
322 u8 CurrentCckTxPwrIdx;
323 u8 CurrentOfdm24GTxPwrIdx;
324 u8 CurrentBW2024GTxPwrIdx;
325 u8 CurrentBW4024GTxPwrIdx;
327 /* Read/write are allow for following hardware information variables */
329 u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
330 u32 CCKTxPowerLevelOriginalOffset;
333 u32 AntennaTxPath; /* Antenna path Tx */
334 u32 AntennaRxPath; /* Antenna path Rx */
356 bool bChnlBWInitialized;
359 u8 bLedOpenDrain; /* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */
360 u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
361 u8 b1x1RecvCombine; /* for 1T1R receive combining */
363 u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
365 struct bb_register_def PHYRegDef[4]; /* Radio A/B/C/D */
372 /* for host message to fw */
377 /* Beacon function related global variable. */
390 u8 ant_path; /* for 8723B s0/s1 selection */
392 u8 u1ForcedIgiLb; /* forced IGI lower bound */
394 u8 bDumpRxPkt;/* for debug */
395 u8 bDumpTxPkt;/* for debug */
396 u8 FwRsvdPageStartOffset; /* 2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. */
398 /* 2010/08/09 MH Add CU power down mode. */
401 /* Add for dual MAC 0--Mac0 1--Mac1 */
407 /* 2010/12/10 MH Add for USB aggreation mode dynamic shceme. */
408 bool UsbRxHighSpeedMode;
410 /* 2010/11/22 MH Add for slim combo debug mode selective. */
411 /* This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock. */
414 /* u8 AMPDUDensity; */
416 /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */
420 struct submit_ctx iqk_sctx;
422 enum RT_AMPDU_BURST AMPDUBurstMode; /* 92C maybe not use, but for compile successfully */
427 /* SDIO Tx FIFO related. */
428 /* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */
429 u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
430 _lock SdioTxFIFOFreePageLock;
431 u8 SdioTxOQTMaxFreeSpace;
432 u8 SdioTxOQTFreeSpace;
435 /* SDIO Rx FIFO related. */
439 u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */
441 struct dm_priv dmpriv;
444 /* For bluetooth co-existance */
445 BT_COEXIST bt_coexist;
447 /* Interrupt related register information. */
452 char para_file_buf[MAX_PARA_FILE_BUF_LEN];
460 u32 bb_phy_reg_pg_len;
462 u32 bb_phy_reg_mp_len;
467 char *rf_tx_pwr_track;
468 u32 rf_tx_pwr_track_len;
470 u32 rf_tx_pwr_lmt_len;
472 #ifdef CONFIG_BACKGROUND_NOISE_MONITOR
473 s16 noise[ODM_MAX_CHANNEL_NUM];
478 #define GET_HAL_DATA(__padapter) ((struct hal_com_data *)((__padapter)->HalData))
479 #define GET_HAL_RFPATH_NUM(__padapter) (((struct hal_com_data *)((__padapter)->HalData))->NumTotalRFPath)
480 #define RT_GetInterfaceSelection(_Adapter) (GET_HAL_DATA(_Adapter)->InterfaceSel)
481 #define GET_RF_TYPE(__padapter) (GET_HAL_DATA(__padapter)->rf_type)
483 #endif /* __HAL_DATA_H__ */