1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
6 ******************************************************************************/
7 #ifndef __HAL_COM_PHYCFG_H__
8 #define __HAL_COM_PHYCFG_H__
10 #define PathA 0x0 /* Useless */
21 #define MAX_POWER_INDEX 0x3F
28 TXPWR_LMT_MAX_REGULATION_NUM,
31 /*------------------------------Define structure----------------------------*/
32 struct bb_register_def {
33 u32 rfintfs; /* set software control: */
34 /* 0x870~0x877[8 bytes] */
36 u32 rfintfo; /* output data: */
37 /* 0x860~0x86f [16 bytes] */
39 u32 rfintfe; /* output enable: */
40 /* 0x860~0x86f [16 bytes] */
42 u32 rf3wireOffset; /* LSSI data: */
43 /* 0x840~0x84f [16 bytes] */
45 u32 rfHSSIPara2; /* wire parameter control2 : */
46 /* 0x824~0x827, 0x82c~0x82f,
47 * 0x834~0x837, 0x83c~0x83f
49 u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */
50 /* 0x8a0~0x8af [16 bytes] */
52 u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode
53 * 0x8b8-8bc for Path A and B */
57 u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
58 enum rate_section RateSection);
60 u8 PHY_GetRateSectionIndexOfTxPowerByRate(struct adapter *padapter, u32 RegAddr,
63 void PHY_GetRateValuesOfTxPowerByRate(struct adapter *padapter, u32 RegAddr,
64 u32 BitMask, u32 Value, u8 *RateIndex,
65 s8 *PwrByRateVal, u8 *RateNum);
67 u8 PHY_GetRateIndexOfTxPowerByRate(u8 Rate);
69 void PHY_SetTxPowerIndexByRateSection(struct adapter *padapter, u8 RFPath, u8 Channel,
72 s8 PHY_GetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 RateIndex);
74 void PHY_SetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 Rate,
77 void PHY_SetTxPowerLevelByPath(struct adapter *Adapter, u8 channel, u8 path);
79 void PHY_SetTxPowerIndexByRateArray(struct adapter *padapter, u8 RFPath,
80 enum channel_width BandWidth, u8 Channel,
81 u8 *Rates, u8 RateArraySize);
83 void PHY_InitTxPowerByRate(struct adapter *padapter);
85 void PHY_StoreTxPowerByRate(struct adapter *padapter, u32 RfPath,
86 u32 RegAddr, u32 BitMask, u32 Data);
88 void PHY_TxPowerByRateConfiguration(struct adapter *padapter);
90 u8 PHY_GetTxPowerIndexBase(struct adapter *padapter, u8 RFPath, u8 Rate,
91 enum channel_width BandWidth, u8 Channel);
93 s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 RegPwrTblSel,
94 enum channel_width Bandwidth, u8 RfPath, u8 DataRate,
97 void PHY_SetTxPowerLimit(struct adapter *Adapter, u8 *Regulation, u8 *Bandwidth,
98 u8 *RateSection, u8 *RfPath, u8 *Channel, u8 *PowerLimit);
100 void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter);
102 void PHY_InitTxPowerLimit(struct adapter *Adapter);
104 s8 PHY_GetTxPowerTrackingOffset(struct adapter *padapter, u8 Rate, u8 RFPath);
106 void Hal_ChannelPlanToRegulation(struct adapter *Adapter, u16 ChannelPlan);
108 #endif /* __HAL_COMMON_H__ */