1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
6 ******************************************************************************/
7 /******************************************************************************
10 * Module: rtl8192c_rf6052.c (Source C File)
12 * Note: Provide RF 6052 series relative API.
23 * 09/25/2008 MHC Create initial version.
24 * 11/05/2008 MHC Add API for tw power setting.
27 ******************************************************************************/
29 #include <rtl8723b_hal.h>
31 /*---------------------------Define Local Constant---------------------------*/
32 /*---------------------------Define Local Constant---------------------------*/
35 /*------------------------Define global variable-----------------------------*/
36 /*------------------------Define global variable-----------------------------*/
39 /*------------------------Define local variable------------------------------*/
40 /* 2008/11/20 MH For Debug only, RF */
41 /*------------------------Define local variable------------------------------*/
43 /*-----------------------------------------------------------------------------
44 * Function: PHY_RF6052SetBandwidth()
46 * Overview: This function is called by SetBWModeCallback8190Pci() only
48 * Input: struct adapter * Adapter
49 * WIRELESS_BANDWIDTH_E Bandwidth 20M or 40M
55 * Note: For RF type 0222D
56 *---------------------------------------------------------------------------*/
57 void PHY_RF6052SetBandwidth8723B(
58 struct adapter *Adapter, enum CHANNEL_WIDTH Bandwidth
61 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
64 case CHANNEL_WIDTH_20:
65 pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11);
66 PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
67 PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
70 case CHANNEL_WIDTH_40:
71 pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10);
72 PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
73 PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
77 /* RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n", Bandwidth)); */
83 static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
87 struct bb_register_def *pPhyReg;
89 int rtStatus = _SUCCESS;
90 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
92 static char sz8723RadioAFile[] = RTL8723B_PHY_RADIO_A;
93 static char sz8723RadioBFile[] = RTL8723B_PHY_RADIO_B;
94 static s8 sz8723BTxPwrTrackFile[] = RTL8723B_TXPWR_TRACK;
95 char *pszRadioAFile, *pszRadioBFile, *pszTxPwrTrackFile;
97 pszRadioAFile = sz8723RadioAFile;
98 pszRadioBFile = sz8723RadioBFile;
99 pszTxPwrTrackFile = sz8723BTxPwrTrackFile;
101 /* 3----------------------------------------------------------------- */
102 /* 3 <2> Initialize RF */
103 /* 3----------------------------------------------------------------- */
104 /* for (eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) */
105 for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
107 pPhyReg = &pHalData->PHYRegDef[eRFPath];
109 /*----Store original RFENV control type----*/
113 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
117 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);
121 /*----Set RF_ENV enable----*/
122 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
123 udelay(1);/* PlatformStallExecution(1); */
125 /*----Set RF_ENV output high----*/
126 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
127 udelay(1);/* PlatformStallExecution(1); */
129 /* Set bit number of Address and Data for RF register */
130 PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
131 udelay(1);/* PlatformStallExecution(1); */
133 PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
134 udelay(1);/* PlatformStallExecution(1); */
136 /*----Initialize RF fom connfiguration file----*/
139 if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile,
141 if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath))
146 if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile,
148 if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, CONFIG_RF_RADIO, (ODM_RF_RADIO_PATH_E)eRFPath))
158 /*----Restore RFENV control type----*/
162 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
166 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
170 if (rtStatus != _SUCCESS) {
171 /* RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); */
172 goto phy_RF6052_Config_ParaFile_Fail;
177 /* 3 ----------------------------------------------------------------- */
178 /* 3 Configuration of Tx Power Tracking */
179 /* 3 ----------------------------------------------------------------- */
181 if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrackFile) ==
183 ODM_ConfigRFWithTxPwrTrackHeaderFile(&pHalData->odmpriv);
186 /* RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); */
189 phy_RF6052_Config_ParaFile_Fail:
194 int PHY_RF6052_Config8723B(struct adapter *Adapter)
196 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
197 int rtStatus = _SUCCESS;
200 /* Initialize general global value */
202 /* TODO: Extend RF_PATH_C and RF_PATH_D in the future */
203 if (pHalData->rf_type == RF_1T1R)
204 pHalData->NumTotalRFPath = 1;
206 pHalData->NumTotalRFPath = 2;
209 /* Config BB and RF */
211 rtStatus = phy_RF6052_Config_ParaFile(Adapter);
216 /* End of HalRf6052.c */