GNU Linux-libre 5.10.215-gnu1
[releases.git] / drivers / staging / rtl8723bs / hal / hal_com_phycfg.c
1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5  *
6  ******************************************************************************/
7 #define _HAL_COM_PHYCFG_C_
8
9 #include <drv_types.h>
10 #include <rtw_debug.h>
11 #include <hal_data.h>
12 #include <linux/kernel.h>
13
14 u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 Band, u8 RfPath,
15                             u8 TxNum, enum RATE_SECTION RateSection)
16 {
17         struct hal_com_data     *pHalData = GET_HAL_DATA(Adapter);
18         u8      value = 0;
19
20         if (RfPath > ODM_RF_PATH_D) {
21                 DBG_871X("Invalid Rf Path %d in PHY_GetTxPowerByRateBase()\n", RfPath);
22                 return 0;
23         }
24
25         if (Band == BAND_ON_2_4G) {
26                 switch (RateSection) {
27                 case CCK:
28                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0];
29                         break;
30                 case OFDM:
31                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1];
32                         break;
33                 case HT_MCS0_MCS7:
34                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2];
35                         break;
36                 case HT_MCS8_MCS15:
37                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3];
38                         break;
39                 case HT_MCS16_MCS23:
40                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4];
41                         break;
42                 case HT_MCS24_MCS31:
43                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5];
44                         break;
45                 case VHT_1SSMCS0_1SSMCS9:
46                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6];
47                         break;
48                 case VHT_2SSMCS0_2SSMCS9:
49                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7];
50                         break;
51                 case VHT_3SSMCS0_3SSMCS9:
52                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8];
53                         break;
54                 case VHT_4SSMCS0_4SSMCS9:
55                         value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9];
56                         break;
57                 default:
58                         DBG_871X("Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in PHY_GetTxPowerByRateBase()\n",
59                                          RateSection, RfPath, TxNum);
60                         break;
61                 }
62         } else if (Band == BAND_ON_5G) {
63                 switch (RateSection) {
64                 case OFDM:
65                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][0];
66                         break;
67                 case HT_MCS0_MCS7:
68                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][1];
69                         break;
70                 case HT_MCS8_MCS15:
71                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][2];
72                         break;
73                 case HT_MCS16_MCS23:
74                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][3];
75                         break;
76                 case HT_MCS24_MCS31:
77                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][4];
78                         break;
79                 case VHT_1SSMCS0_1SSMCS9:
80                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][5];
81                         break;
82                 case VHT_2SSMCS0_2SSMCS9:
83                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][6];
84                         break;
85                 case VHT_3SSMCS0_3SSMCS9:
86                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][7];
87                         break;
88                 case VHT_4SSMCS0_4SSMCS9:
89                         value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][8];
90                         break;
91                 default:
92                         DBG_871X("Invalid RateSection %d in Band 5G, Rf Path %d, %dTx in PHY_GetTxPowerByRateBase()\n",
93                                          RateSection, RfPath, TxNum);
94                         break;
95                 }
96         } else
97                 DBG_871X("Invalid Band %d in PHY_GetTxPowerByRateBase()\n", Band);
98
99         return value;
100 }
101
102 static void
103 phy_SetTxPowerByRateBase(
104         struct adapter *Adapter,
105         u8 Band,
106         u8 RfPath,
107         enum RATE_SECTION       RateSection,
108         u8 TxNum,
109         u8 Value
110 )
111 {
112         struct hal_com_data     *pHalData = GET_HAL_DATA(Adapter);
113
114         if (RfPath > ODM_RF_PATH_D) {
115                 DBG_871X("Invalid Rf Path %d in phy_SetTxPowerByRatBase()\n", RfPath);
116                 return;
117         }
118
119         if (Band == BAND_ON_2_4G) {
120                 switch (RateSection) {
121                 case CCK:
122                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0] = Value;
123                         break;
124                 case OFDM:
125                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1] = Value;
126                         break;
127                 case HT_MCS0_MCS7:
128                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2] = Value;
129                         break;
130                 case HT_MCS8_MCS15:
131                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3] = Value;
132                         break;
133                 case HT_MCS16_MCS23:
134                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4] = Value;
135                         break;
136                 case HT_MCS24_MCS31:
137                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5] = Value;
138                         break;
139                 case VHT_1SSMCS0_1SSMCS9:
140                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][6] = Value;
141                         break;
142                 case VHT_2SSMCS0_2SSMCS9:
143                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][7] = Value;
144                         break;
145                 case VHT_3SSMCS0_3SSMCS9:
146                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][8] = Value;
147                         break;
148                 case VHT_4SSMCS0_4SSMCS9:
149                         pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][9] = Value;
150                         break;
151                 default:
152                         DBG_871X("Invalid RateSection %d in Band 2.4G, Rf Path %d, %dTx in phy_SetTxPowerByRateBase()\n",
153                                          RateSection, RfPath, TxNum);
154                         break;
155                 }
156         } else if (Band == BAND_ON_5G) {
157                 switch (RateSection) {
158                 case OFDM:
159                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][0] = Value;
160                         break;
161                 case HT_MCS0_MCS7:
162                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][1] = Value;
163                         break;
164                 case HT_MCS8_MCS15:
165                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][2] = Value;
166                         break;
167                 case HT_MCS16_MCS23:
168                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][3] = Value;
169                         break;
170                 case HT_MCS24_MCS31:
171                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][4] = Value;
172                         break;
173                 case VHT_1SSMCS0_1SSMCS9:
174                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][5] = Value;
175                         break;
176                 case VHT_2SSMCS0_2SSMCS9:
177                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][6] = Value;
178                         break;
179                 case VHT_3SSMCS0_3SSMCS9:
180                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][7] = Value;
181                         break;
182                 case VHT_4SSMCS0_4SSMCS9:
183                         pHalData->TxPwrByRateBase5G[RfPath][TxNum][8] = Value;
184                         break;
185                 default:
186                         DBG_871X("Invalid RateSection %d in Band 5G, Rf Path %d, %dTx in phy_SetTxPowerByRateBase()\n",
187                                          RateSection, RfPath, TxNum);
188                         break;
189                 }
190         } else
191                 DBG_871X("Invalid Band %d in phy_SetTxPowerByRateBase()\n", Band);
192 }
193
194 static void
195 phy_StoreTxPowerByRateBase(
196 struct adapter *padapter
197         )
198 {
199         u8 path, base;
200
201         /* DBG_871X("===>%s\n", __func__); */
202
203         for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_B; ++path) {
204                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_1TX, MGN_11M);
205                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, CCK, RF_1TX, base);
206                 /* DBG_871X("Power index base of 2.4G path %d 1Tx CCK = > 0x%x\n", path, base); */
207
208                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_1TX, MGN_54M);
209                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, OFDM, RF_1TX, base);
210                 /* DBG_871X("Power index base of 2.4G path %d 1Tx OFDM = > 0x%x\n", path, base); */
211
212                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_1TX, MGN_MCS7);
213                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, HT_MCS0_MCS7, RF_1TX, base);
214                 /* DBG_871X("Power index base of 2.4G path %d 1Tx MCS0-7 = > 0x%x\n", path, base); */
215
216                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_2TX, MGN_MCS15);
217                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, HT_MCS8_MCS15, RF_2TX, base);
218                 /* DBG_871X("Power index base of 2.4G path %d 2Tx MCS8-15 = > 0x%x\n", path, base); */
219
220                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_3TX, MGN_MCS23);
221                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, HT_MCS16_MCS23, RF_3TX, base);
222                 /* DBG_871X("Power index base of 2.4G path %d 3Tx MCS16-23 = > 0x%x\n", path, base); */
223
224                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_1TX, MGN_VHT1SS_MCS7);
225                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, VHT_1SSMCS0_1SSMCS9, RF_1TX, base);
226                 /* DBG_871X("Power index base of 2.4G path %d 1Tx VHT1SS = > 0x%x\n", path, base); */
227
228                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_2TX, MGN_VHT2SS_MCS7);
229                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, VHT_2SSMCS0_2SSMCS9, RF_2TX, base);
230                 /* DBG_871X("Power index base of 2.4G path %d 2Tx VHT2SS = > 0x%x\n", path, base); */
231
232                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, path, RF_3TX, MGN_VHT3SS_MCS7);
233                 phy_SetTxPowerByRateBase(padapter, BAND_ON_2_4G, path, VHT_3SSMCS0_3SSMCS9, RF_3TX, base);
234                 /* DBG_871X("Power index base of 2.4G path %d 3Tx VHT3SS = > 0x%x\n", path, base); */
235
236                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_5G, path, RF_1TX, MGN_54M);
237                 phy_SetTxPowerByRateBase(padapter, BAND_ON_5G, path, OFDM, RF_1TX, base);
238                 /* DBG_871X("Power index base of 5G path %d 1Tx OFDM = > 0x%x\n", path, base); */
239
240                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_5G, path, RF_1TX, MGN_MCS7);
241                 phy_SetTxPowerByRateBase(padapter, BAND_ON_5G, path, HT_MCS0_MCS7, RF_1TX, base);
242                 /* DBG_871X("Power index base of 5G path %d 1Tx MCS0~7 = > 0x%x\n", path, base); */
243
244                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_5G, path, RF_2TX, MGN_MCS15);
245                 phy_SetTxPowerByRateBase(padapter, BAND_ON_5G, path, HT_MCS8_MCS15, RF_2TX, base);
246                 /* DBG_871X("Power index base of 5G path %d 2Tx MCS8~15 = > 0x%x\n", path, base); */
247
248                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_5G, path, RF_3TX, MGN_MCS23);
249                 phy_SetTxPowerByRateBase(padapter, BAND_ON_5G, path, HT_MCS16_MCS23, RF_3TX, base);
250                 /* DBG_871X("Power index base of 5G path %d 3Tx MCS16~23 = > 0x%x\n", path, base); */
251
252                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_5G, path, RF_1TX, MGN_VHT1SS_MCS7);
253                 phy_SetTxPowerByRateBase(padapter, BAND_ON_5G, path, VHT_1SSMCS0_1SSMCS9, RF_1TX, base);
254                 /* DBG_871X("Power index base of 5G path %d 1Tx VHT1SS = > 0x%x\n", path, base); */
255
256                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_5G, path, RF_2TX, MGN_VHT2SS_MCS7);
257                 phy_SetTxPowerByRateBase(padapter, BAND_ON_5G, path, VHT_2SSMCS0_2SSMCS9, RF_2TX, base);
258                 /* DBG_871X("Power index base of 5G path %d 2Tx VHT2SS = > 0x%x\n", path, base); */
259
260                 base = PHY_GetTxPowerByRate(padapter, BAND_ON_5G, path, RF_3TX, MGN_VHT2SS_MCS7);
261                 phy_SetTxPowerByRateBase(padapter, BAND_ON_5G, path, VHT_3SSMCS0_3SSMCS9, RF_3TX, base);
262                 /* DBG_871X("Power index base of 5G path %d 3Tx VHT3SS = > 0x%x\n", path, base); */
263         }
264
265         /* DBG_871X("<===%s\n", __func__); */
266 }
267
268 u8 PHY_GetRateSectionIndexOfTxPowerByRate(
269         struct adapter *padapter, u32 RegAddr, u32 BitMask
270 )
271 {
272         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
273         PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
274         u8      index = 0;
275
276         if (pDM_Odm->PhyRegPgVersion == 0) {
277                 switch (RegAddr) {
278                 case rTxAGC_A_Rate18_06:
279                         index = 0;
280                         break;
281                 case rTxAGC_A_Rate54_24:
282                         index = 1;
283                         break;
284                 case rTxAGC_A_CCK1_Mcs32:
285                         index = 6;
286                         break;
287                 case rTxAGC_B_CCK11_A_CCK2_11:
288                         if (BitMask == bMaskH3Bytes)
289                                 index = 7;
290                         else if (BitMask == 0x000000ff)
291                                 index = 15;
292                         break;
293
294                 case rTxAGC_A_Mcs03_Mcs00:
295                         index = 2;
296                         break;
297                 case rTxAGC_A_Mcs07_Mcs04:
298                         index = 3;
299                         break;
300                 case rTxAGC_A_Mcs11_Mcs08:
301                         index = 4;
302                         break;
303                 case rTxAGC_A_Mcs15_Mcs12:
304                         index = 5;
305                         break;
306                 case rTxAGC_B_Rate18_06:
307                         index = 8;
308                         break;
309                 case rTxAGC_B_Rate54_24:
310                         index = 9;
311                         break;
312                 case rTxAGC_B_CCK1_55_Mcs32:
313                         index = 14;
314                         break;
315                 case rTxAGC_B_Mcs03_Mcs00:
316                         index = 10;
317                         break;
318                 case rTxAGC_B_Mcs07_Mcs04:
319                         index = 11;
320                         break;
321                 case rTxAGC_B_Mcs11_Mcs08:
322                         index = 12;
323                         break;
324                 case rTxAGC_B_Mcs15_Mcs12:
325                         index = 13;
326                         break;
327                 default:
328                         DBG_871X("Invalid RegAddr 0x3%x in PHY_GetRateSectionIndexOfTxPowerByRate()", RegAddr);
329                         break;
330                 }
331         }
332
333         return index;
334 }
335
336 void
337 PHY_GetRateValuesOfTxPowerByRate(
338         struct adapter *padapter,
339         u32     RegAddr,
340         u32     BitMask,
341         u32     Value,
342         u8 *RateIndex,
343         s8 *PwrByRateVal,
344         u8 *RateNum
345 )
346 {
347         u8 i = 0;
348
349         switch (RegAddr) {
350         case rTxAGC_A_Rate18_06:
351         case rTxAGC_B_Rate18_06:
352                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_6M);
353                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_9M);
354                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_12M);
355                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_18M);
356                 for (i = 0; i < 4; ++i) {
357                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
358                                                                                         ((Value >> (i * 8)) & 0xF));
359                 }
360                 *RateNum = 4;
361                 break;
362
363         case rTxAGC_A_Rate54_24:
364         case rTxAGC_B_Rate54_24:
365                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_24M);
366                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_36M);
367                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_48M);
368                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_54M);
369                 for (i = 0; i < 4; ++i) {
370                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
371                                                                                         ((Value >> (i * 8)) & 0xF));
372                 }
373                 *RateNum = 4;
374                 break;
375
376         case rTxAGC_A_CCK1_Mcs32:
377                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_1M);
378                 PwrByRateVal[0] = (s8) ((((Value >> (8 + 4)) & 0xF)) * 10 +
379                                                                                 ((Value >> 8) & 0xF));
380                 *RateNum = 1;
381                 break;
382
383         case rTxAGC_B_CCK11_A_CCK2_11:
384                 if (BitMask == 0xffffff00) {
385                         RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_2M);
386                         RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_5_5M);
387                         RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_11M);
388                         for (i = 1; i < 4; ++i) {
389                                 PwrByRateVal[i - 1] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
390                                                                                                 ((Value >> (i * 8)) & 0xF));
391                         }
392                         *RateNum = 3;
393                 } else if (BitMask == 0x000000ff) {
394                         RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_11M);
395                         PwrByRateVal[0] = (s8) ((((Value >> 4) & 0xF)) * 10 + (Value & 0xF));
396                         *RateNum = 1;
397                 }
398                 break;
399
400         case rTxAGC_A_Mcs03_Mcs00:
401         case rTxAGC_B_Mcs03_Mcs00:
402                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS0);
403                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS1);
404                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS2);
405                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS3);
406                 for (i = 0; i < 4; ++i) {
407                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
408                                                                                         ((Value >> (i * 8)) & 0xF));
409                 }
410                 *RateNum = 4;
411                 break;
412
413         case rTxAGC_A_Mcs07_Mcs04:
414         case rTxAGC_B_Mcs07_Mcs04:
415                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS4);
416                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS5);
417                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS6);
418                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS7);
419                 for (i = 0; i < 4; ++i) {
420                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
421                                                                                         ((Value >> (i * 8)) & 0xF));
422                 }
423                 *RateNum = 4;
424                 break;
425
426         case rTxAGC_A_Mcs11_Mcs08:
427         case rTxAGC_B_Mcs11_Mcs08:
428                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS8);
429                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS9);
430                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS10);
431                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS11);
432                 for (i = 0; i < 4; ++i) {
433                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
434                                                                                         ((Value >> (i * 8)) & 0xF));
435                 }
436                 *RateNum = 4;
437                 break;
438
439         case rTxAGC_A_Mcs15_Mcs12:
440         case rTxAGC_B_Mcs15_Mcs12:
441                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS12);
442                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS13);
443                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS14);
444                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS15);
445                 for (i = 0; i < 4; ++i) {
446                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
447                                                                                         ((Value >> (i * 8)) & 0xF));
448                 }
449                 *RateNum = 4;
450
451                 break;
452
453         case rTxAGC_B_CCK1_55_Mcs32:
454                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_1M);
455                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_2M);
456                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_5_5M);
457                 for (i = 1; i < 4; ++i) {
458                         PwrByRateVal[i - 1] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
459                                                                                         ((Value >> (i * 8)) & 0xF));
460                 }
461                 *RateNum = 3;
462                 break;
463
464         case 0xC20:
465         case 0xE20:
466         case 0x1820:
467         case 0x1a20:
468                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_1M);
469                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_2M);
470                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_5_5M);
471                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_11M);
472                 for (i = 0; i < 4; ++i) {
473                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
474                                                                                         ((Value >> (i * 8)) & 0xF));
475                 }
476                 *RateNum = 4;
477                 break;
478
479         case 0xC24:
480         case 0xE24:
481         case 0x1824:
482         case 0x1a24:
483                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_6M);
484                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_9M);
485                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_12M);
486                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_18M);
487                 for (i = 0; i < 4; ++i) {
488                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
489                                                                                         ((Value >> (i * 8)) & 0xF));
490                 }
491                 *RateNum = 4;
492                 break;
493
494         case 0xC28:
495         case 0xE28:
496         case 0x1828:
497         case 0x1a28:
498                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_24M);
499                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_36M);
500                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_48M);
501                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_54M);
502                 for (i = 0; i < 4; ++i) {
503                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
504                                                                                         ((Value >> (i * 8)) & 0xF));
505                 }
506                 *RateNum = 4;
507                 break;
508
509         case 0xC2C:
510         case 0xE2C:
511         case 0x182C:
512         case 0x1a2C:
513                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS0);
514                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS1);
515                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS2);
516                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS3);
517                 for (i = 0; i < 4; ++i) {
518                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
519                                                                                         ((Value >> (i * 8)) & 0xF));
520                 }
521                 *RateNum = 4;
522                 break;
523
524         case 0xC30:
525         case 0xE30:
526         case 0x1830:
527         case 0x1a30:
528                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS4);
529                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS5);
530                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS6);
531                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS7);
532                 for (i = 0; i < 4; ++i) {
533                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
534                                                                                         ((Value >> (i * 8)) & 0xF));
535                 }
536                 *RateNum = 4;
537                 break;
538
539         case 0xC34:
540         case 0xE34:
541         case 0x1834:
542         case 0x1a34:
543                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS8);
544                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS9);
545                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS10);
546                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS11);
547                 for (i = 0; i < 4; ++i) {
548                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
549                                                                                         ((Value >> (i * 8)) & 0xF));
550                 }
551                 *RateNum = 4;
552                 break;
553
554         case 0xC38:
555         case 0xE38:
556         case 0x1838:
557         case 0x1a38:
558                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS12);
559                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS13);
560                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS14);
561                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS15);
562                 for (i = 0; i < 4; ++i) {
563                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
564                                                                                         ((Value >> (i * 8)) & 0xF));
565                 }
566                 *RateNum = 4;
567                 break;
568
569         case 0xC3C:
570         case 0xE3C:
571         case 0x183C:
572         case 0x1a3C:
573                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS0);
574                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS1);
575                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS2);
576                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS3);
577                 for (i = 0; i < 4; ++i) {
578                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
579                                                                                         ((Value >> (i * 8)) & 0xF));
580                 }
581                 *RateNum = 4;
582                 break;
583
584         case 0xC40:
585         case 0xE40:
586         case 0x1840:
587         case 0x1a40:
588                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS4);
589                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS5);
590                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS6);
591                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS7);
592                 for (i = 0; i < 4; ++i) {
593                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
594                                                                                         ((Value >> (i * 8)) & 0xF));
595                 }
596                 *RateNum = 4;
597                 break;
598
599         case 0xC44:
600         case 0xE44:
601         case 0x1844:
602         case 0x1a44:
603                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS8);
604                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT1SS_MCS9);
605                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS0);
606                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS1);
607                 for (i = 0; i < 4; ++i) {
608                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
609                                                                                         ((Value >> (i * 8)) & 0xF));
610                 }
611                 *RateNum = 4;
612                 break;
613
614         case 0xC48:
615         case 0xE48:
616         case 0x1848:
617         case 0x1a48:
618                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS2);
619                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS3);
620                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS4);
621                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS5);
622                 for (i = 0; i < 4; ++i) {
623                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
624                                                                                         ((Value >> (i * 8)) & 0xF));
625                 }
626                 *RateNum = 4;
627                 break;
628
629         case 0xC4C:
630         case 0xE4C:
631         case 0x184C:
632         case 0x1a4C:
633                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS6);
634                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS7);
635                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS8);
636                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS9);
637                 for (i = 0; i < 4; ++i) {
638                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
639                                                                                         ((Value >> (i * 8)) & 0xF));
640                 }
641                 *RateNum = 4;
642                 break;
643
644         case 0xCD8:
645         case 0xED8:
646         case 0x18D8:
647         case 0x1aD8:
648                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS16);
649                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS17);
650                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS18);
651                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS19);
652                 for (i = 0; i < 4; ++i) {
653                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
654                                                                                         ((Value >> (i * 8)) & 0xF));
655                 }
656                 *RateNum = 4;
657                 break;
658
659         case 0xCDC:
660         case 0xEDC:
661         case 0x18DC:
662         case 0x1aDC:
663                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS20);
664                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS21);
665                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS22);
666                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS23);
667                 for (i = 0; i < 4; ++i) {
668                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
669                                                                                         ((Value >> (i * 8)) & 0xF));
670                 }
671                 *RateNum = 4;
672                 break;
673
674         case 0xCE0:
675         case 0xEE0:
676         case 0x18E0:
677         case 0x1aE0:
678                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS0);
679                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS1);
680                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS2);
681                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS3);
682                 for (i = 0; i < 4; ++i) {
683                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
684                                                                                         ((Value >> (i * 8)) & 0xF));
685                 }
686                 *RateNum = 4;
687                 break;
688
689         case 0xCE4:
690         case 0xEE4:
691         case 0x18E4:
692         case 0x1aE4:
693                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS4);
694                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS5);
695                 RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS6);
696                 RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS7);
697                 for (i = 0; i < 4; ++i) {
698                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
699                                                                                         ((Value >> (i * 8)) & 0xF));
700                 }
701                 *RateNum = 4;
702                 break;
703
704         case 0xCE8:
705         case 0xEE8:
706         case 0x18E8:
707         case 0x1aE8:
708                 RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS8);
709                 RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_VHT3SS_MCS9);
710                 for (i = 0; i < 2; ++i) {
711                         PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
712                                                                                         ((Value >> (i * 8)) & 0xF));
713                 }
714                 *RateNum = 4;
715                 break;
716
717         default:
718                 DBG_871X("Invalid RegAddr 0x%x in %s()\n", RegAddr, __func__);
719                 break;
720         }
721 }
722
723 static void PHY_StoreTxPowerByRateNew(
724         struct adapter *padapter,
725         u32     Band,
726         u32     RfPath,
727         u32     TxNum,
728         u32     RegAddr,
729         u32     BitMask,
730         u32     Data
731 )
732 {
733         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
734         u8 i = 0, rateIndex[4] = {0}, rateNum = 0;
735         s8      PwrByRateVal[4] = {0};
736
737         PHY_GetRateValuesOfTxPowerByRate(padapter, RegAddr, BitMask, Data, rateIndex, PwrByRateVal, &rateNum);
738
739         if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
740                 DBG_871X("Invalid Band %d\n", Band);
741                 return;
742         }
743
744         if (RfPath > ODM_RF_PATH_D) {
745                 DBG_871X("Invalid RfPath %d\n", RfPath);
746                 return;
747         }
748
749         if (TxNum > ODM_RF_PATH_D) {
750                 DBG_871X("Invalid TxNum %d\n", TxNum);
751                 return;
752         }
753
754         for (i = 0; i < rateNum; ++i) {
755                 if (rateIndex[i] == PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS0) ||
756                          rateIndex[i] == PHY_GetRateIndexOfTxPowerByRate(MGN_VHT2SS_MCS1))
757                         TxNum = RF_2TX;
758
759                 pHalData->TxPwrByRateOffset[Band][RfPath][TxNum][rateIndex[i]] = PwrByRateVal[i];
760         }
761 }
762
763 static void PHY_StoreTxPowerByRateOld(
764         struct adapter *padapter, u32   RegAddr, u32 BitMask, u32 Data
765 )
766 {
767         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
768         u8      index = PHY_GetRateSectionIndexOfTxPowerByRate(padapter, RegAddr, BitMask);
769
770         pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][index] = Data;
771         /* DBG_871X("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n", pHalData->pwrGroupCnt, */
772         /*      pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]); */
773 }
774
775 void PHY_InitTxPowerByRate(struct adapter *padapter)
776 {
777         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
778         u8 band, rfPath, TxNum, rate;
779
780         for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band)
781                         for (rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath)
782                                 for (TxNum = 0; TxNum < TX_PWR_BY_RATE_NUM_RF; ++TxNum)
783                                         for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate)
784                                                 pHalData->TxPwrByRateOffset[band][rfPath][TxNum][rate] = 0;
785 }
786
787 void PHY_StoreTxPowerByRate(
788         struct adapter *padapter,
789         u32     Band,
790         u32     RfPath,
791         u32     TxNum,
792         u32     RegAddr,
793         u32     BitMask,
794         u32     Data
795 )
796 {
797         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
798         PDM_ODM_T               pDM_Odm = &pHalData->odmpriv;
799
800         if (pDM_Odm->PhyRegPgVersion > 0)
801                 PHY_StoreTxPowerByRateNew(padapter, Band, RfPath, TxNum, RegAddr, BitMask, Data);
802         else if (pDM_Odm->PhyRegPgVersion == 0) {
803                 PHY_StoreTxPowerByRateOld(padapter, RegAddr, BitMask, Data);
804
805                 if (RegAddr == rTxAGC_A_Mcs15_Mcs12 && pHalData->rf_type == RF_1T1R)
806                         pHalData->pwrGroupCnt++;
807                 else if (RegAddr == rTxAGC_B_Mcs15_Mcs12 && pHalData->rf_type != RF_1T1R)
808                         pHalData->pwrGroupCnt++;
809         } else
810                 DBG_871X("Invalid PHY_REG_PG.txt version %d\n",  pDM_Odm->PhyRegPgVersion);
811
812 }
813
814 static void
815 phy_ConvertTxPowerByRateInDbmToRelativeValues(
816 struct adapter *padapter
817         )
818 {
819         u8      base = 0, i = 0, value = 0, band = 0, path = 0, txNum = 0;
820         u8      cckRates[4] = {
821                 MGN_1M, MGN_2M, MGN_5_5M, MGN_11M
822         };
823         u8      ofdmRates[8] = {
824                 MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M
825         };
826         u8 mcs0_7Rates[8] = {
827                 MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7
828         };
829         u8 mcs8_15Rates[8] = {
830                 MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15
831         };
832         u8 mcs16_23Rates[8] = {
833                 MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23
834         };
835         u8 vht1ssRates[10] = {
836                 MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4,
837                 MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9
838         };
839         u8 vht2ssRates[10] = {
840                 MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4,
841                 MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9
842         };
843         u8 vht3ssRates[10] = {
844                 MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4,
845                 MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9
846         };
847
848         /* DBG_871X("===>PHY_ConvertTxPowerByRateInDbmToRelativeValues()\n"); */
849
850         for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band) {
851                 for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_D; ++path) {
852                         for (txNum = RF_1TX; txNum < RF_MAX_TX_NUM; ++txNum) {
853                                 /*  CCK */
854                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_11M);
855                                 for (i = 0; i < ARRAY_SIZE(cckRates); ++i) {
856                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, cckRates[i]);
857                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, cckRates[i], value - base);
858                                 }
859
860                                 /*  OFDM */
861                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_54M);
862                                 for (i = 0; i < sizeof(ofdmRates); ++i) {
863                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, ofdmRates[i]);
864                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, ofdmRates[i], value - base);
865                                 }
866
867                                 /*  HT MCS0~7 */
868                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_MCS7);
869                                 for (i = 0; i < sizeof(mcs0_7Rates); ++i) {
870                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, mcs0_7Rates[i]);
871                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, mcs0_7Rates[i], value - base);
872                                 }
873
874                                 /*  HT MCS8~15 */
875                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_MCS15);
876                                 for (i = 0; i < sizeof(mcs8_15Rates); ++i) {
877                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, mcs8_15Rates[i]);
878                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, mcs8_15Rates[i], value - base);
879                                 }
880
881                                 /*  HT MCS16~23 */
882                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_MCS23);
883                                 for (i = 0; i < sizeof(mcs16_23Rates); ++i) {
884                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, mcs16_23Rates[i]);
885                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, mcs16_23Rates[i], value - base);
886                                 }
887
888                                 /*  VHT 1SS */
889                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_VHT1SS_MCS7);
890                                 for (i = 0; i < sizeof(vht1ssRates); ++i) {
891                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, vht1ssRates[i]);
892                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, vht1ssRates[i], value - base);
893                                 }
894
895                                 /*  VHT 2SS */
896                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_VHT2SS_MCS7);
897                                 for (i = 0; i < sizeof(vht2ssRates); ++i) {
898                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, vht2ssRates[i]);
899                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, vht2ssRates[i], value - base);
900                                 }
901
902                                 /*  VHT 3SS */
903                                 base = PHY_GetTxPowerByRate(padapter, band, path, txNum, MGN_VHT3SS_MCS7);
904                                 for (i = 0; i < sizeof(vht3ssRates); ++i) {
905                                         value = PHY_GetTxPowerByRate(padapter, band, path, txNum, vht3ssRates[i]);
906                                         PHY_SetTxPowerByRate(padapter, band, path, txNum, vht3ssRates[i], value - base);
907                                 }
908                         }
909                 }
910         }
911
912         /* DBG_871X("<===PHY_ConvertTxPowerByRateInDbmToRelativeValues()\n"); */
913 }
914
915 /*
916   * This function must be called if the value in the PHY_REG_PG.txt(or header)
917   * is exact dBm values
918   */
919 void PHY_TxPowerByRateConfiguration(struct adapter *padapter)
920 {
921         phy_StoreTxPowerByRateBase(padapter);
922         phy_ConvertTxPowerByRateInDbmToRelativeValues(padapter);
923 }
924
925 void PHY_SetTxPowerIndexByRateSection(
926         struct adapter *padapter, u8 RFPath, u8 Channel, u8 RateSection
927 )
928 {
929         struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
930
931         if (RateSection == CCK) {
932                 u8 cckRates[]   = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M};
933                 if (pHalData->CurrentBandType == BAND_ON_2_4G)
934                         PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
935                                                      pHalData->CurrentChannelBW,
936                                                      Channel, cckRates,
937                                                      ARRAY_SIZE(cckRates));
938
939         } else if (RateSection == OFDM) {
940                 u8 ofdmRates[]  = {MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M};
941                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
942                                                pHalData->CurrentChannelBW,
943                                                Channel, ofdmRates,
944                                                ARRAY_SIZE(ofdmRates));
945
946         } else if (RateSection == HT_MCS0_MCS7) {
947                 u8 htRates1T[]  = {MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7};
948                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
949                                                pHalData->CurrentChannelBW,
950                                                Channel, htRates1T,
951                                                ARRAY_SIZE(htRates1T));
952
953         } else if (RateSection == HT_MCS8_MCS15) {
954                 u8 htRates2T[]  = {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15};
955                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
956                                                pHalData->CurrentChannelBW,
957                                                Channel, htRates2T,
958                                                ARRAY_SIZE(htRates2T));
959
960         } else if (RateSection == HT_MCS16_MCS23) {
961                 u8 htRates3T[]  = {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23};
962                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
963                                                pHalData->CurrentChannelBW,
964                                                Channel, htRates3T,
965                                                ARRAY_SIZE(htRates3T));
966
967         } else if (RateSection == HT_MCS24_MCS31) {
968                 u8 htRates4T[]  = {MGN_MCS24, MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, MGN_MCS30, MGN_MCS31};
969                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
970                                                pHalData->CurrentChannelBW,
971                                                Channel, htRates4T,
972                                                ARRAY_SIZE(htRates4T));
973
974         } else if (RateSection == VHT_1SSMCS0_1SSMCS9) {
975                 u8 vhtRates1T[] = {MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4,
976                                 MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9};
977                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
978                                                pHalData->CurrentChannelBW,
979                                                Channel, vhtRates1T,
980                                                ARRAY_SIZE(vhtRates1T));
981
982         } else if (RateSection == VHT_2SSMCS0_2SSMCS9) {
983                 u8 vhtRates2T[] = {MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4,
984                                 MGN_VHT2SS_MCS5, MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9};
985
986                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
987                                                pHalData->CurrentChannelBW,
988                                                Channel, vhtRates2T,
989                                                ARRAY_SIZE(vhtRates2T));
990         } else if (RateSection == VHT_3SSMCS0_3SSMCS9) {
991                 u8 vhtRates3T[] = {MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3, MGN_VHT3SS_MCS4,
992                                 MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7, MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9};
993
994                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
995                                                pHalData->CurrentChannelBW,
996                                                Channel, vhtRates3T,
997                                                ARRAY_SIZE(vhtRates3T));
998         } else if (RateSection == VHT_4SSMCS0_4SSMCS9) {
999                 u8 vhtRates4T[] = {MGN_VHT4SS_MCS0, MGN_VHT4SS_MCS1, MGN_VHT4SS_MCS2, MGN_VHT4SS_MCS3, MGN_VHT4SS_MCS4,
1000                                 MGN_VHT4SS_MCS5, MGN_VHT4SS_MCS6, MGN_VHT4SS_MCS7, MGN_VHT4SS_MCS8, MGN_VHT4SS_MCS9};
1001
1002                 PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
1003                                                pHalData->CurrentChannelBW,
1004                                                Channel, vhtRates4T,
1005                                                ARRAY_SIZE(vhtRates4T));
1006         } else
1007                 DBG_871X("Invalid RateSection %d in %s", RateSection, __func__);
1008 }
1009
1010 static bool phy_GetChnlIndex(u8 Channel, u8 *ChannelIdx)
1011 {
1012         u8 channel5G[CHANNEL_MAX_NUMBER_5G] = {
1013                 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102,
1014                 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130,
1015                 132, 134, 136, 138, 140, 142, 144, 149, 151, 153, 155, 157, 159, 161,
1016                 163, 165, 167, 168, 169, 171, 173, 175, 177
1017         };
1018         u8  i = 0;
1019         bool bIn24G = true;
1020
1021         if (Channel <= 14) {
1022                 bIn24G = true;
1023                 *ChannelIdx = Channel-1;
1024         } else {
1025                 bIn24G = false;
1026
1027                 for (i = 0; i < ARRAY_SIZE(channel5G); ++i) {
1028                         if (channel5G[i] == Channel) {
1029                                 *ChannelIdx = i;
1030                                 return bIn24G;
1031                         }
1032                 }
1033         }
1034
1035         return bIn24G;
1036 }
1037
1038 u8 PHY_GetTxPowerIndexBase(
1039         struct adapter *padapter,
1040         u8 RFPath,
1041         u8 Rate,
1042         enum CHANNEL_WIDTH      BandWidth,
1043         u8 Channel,
1044         bool *bIn24G
1045 )
1046 {
1047         struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
1048         u8 i = 0;       /* default set to 1S */
1049         u8 txPower = 0;
1050         u8 chnlIdx = (Channel-1);
1051
1052         if (HAL_IsLegalChannel(padapter, Channel) == false) {
1053                 chnlIdx = 0;
1054                 DBG_871X("Illegal channel!!\n");
1055         }
1056
1057         *bIn24G = phy_GetChnlIndex(Channel, &chnlIdx);
1058
1059         /* DBG_871X("[%s] Channel Index: %d\n", (*bIn24G?"2.4G":"5G"), chnlIdx); */
1060
1061         if (*bIn24G) { /* 3 ============================== 2.4 G ============================== */
1062                 if (IS_CCK_RATE(Rate))
1063                         txPower = pHalData->Index24G_CCK_Base[RFPath][chnlIdx];
1064                 else if (MGN_6M <= Rate)
1065                         txPower = pHalData->Index24G_BW40_Base[RFPath][chnlIdx];
1066                 else
1067                         DBG_871X("PHY_GetTxPowerIndexBase: INVALID Rate.\n");
1068
1069                 /* DBG_871X("Base Tx power(RF-%c, Rate #%d, Channel Index %d) = 0x%X\n", */
1070                 /*              ((RFPath == 0)?'A':'B'), Rate, chnlIdx, txPower); */
1071
1072                 /*  OFDM-1T */
1073                 if ((MGN_6M <= Rate && Rate <= MGN_54M) && !IS_CCK_RATE(Rate)) {
1074                         txPower += pHalData->OFDM_24G_Diff[RFPath][TX_1S];
1075                         /* DBG_871X("+PowerDiff 2.4G (RF-%c): (OFDM-1T) = (%d)\n", ((RFPath == 0)?'A':'B'), pHalData->OFDM_24G_Diff[RFPath][TX_1S]); */
1076                 }
1077                 if (BandWidth == CHANNEL_WIDTH_20) { /*  BW20-1S, BW20-2S */
1078                         if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1079                                 txPower += pHalData->BW20_24G_Diff[RFPath][TX_1S];
1080                         if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1081                                 txPower += pHalData->BW20_24G_Diff[RFPath][TX_2S];
1082                         if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1083                                 txPower += pHalData->BW20_24G_Diff[RFPath][TX_3S];
1084                         if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1085                                 txPower += pHalData->BW20_24G_Diff[RFPath][TX_4S];
1086
1087                         /* DBG_871X("+PowerDiff 2.4G (RF-%c): (BW20-1S, BW20-2S, BW20-3S, BW20-4S) = (%d, %d, %d, %d)\n", ((RFPath == 0)?'A':(RFPath == 1)?'B':(RFPath ==2)?'C':'D'), */
1088                         /*      pHalData->BW20_24G_Diff[RFPath][TX_1S], pHalData->BW20_24G_Diff[RFPath][TX_2S], */
1089                         /*      pHalData->BW20_24G_Diff[RFPath][TX_3S], pHalData->BW20_24G_Diff[RFPath][TX_4S]); */
1090                 } else if (BandWidth == CHANNEL_WIDTH_40) { /*  BW40-1S, BW40-2S */
1091                         if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1092                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S];
1093                         if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1094                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_2S];
1095                         if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1096                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_3S];
1097                         if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1098                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_4S];
1099
1100                         /* DBG_871X("+PowerDiff 2.4G (RF-%c): (BW40-1S, BW40-2S, BW40-3S, BW40-4S) = (%d, %d, %d, %d)\n", ((RFPath == 0)?'A':(RFPath == 1)?'B':(RFPath ==2)?'C':'D'), */
1101                         /*      pHalData->BW40_24G_Diff[RFPath][TX_1S], pHalData->BW40_24G_Diff[RFPath][TX_2S], */
1102                         /*      pHalData->BW40_24G_Diff[RFPath][TX_3S], pHalData->BW40_24G_Diff[RFPath][TX_4S]); */
1103                 }
1104                 /*  Willis suggest adopt BW 40M power index while in BW 80 mode */
1105                 else if (BandWidth == CHANNEL_WIDTH_80) {
1106                         if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1107                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S];
1108                         if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1109                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_2S];
1110                         if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1111                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_3S];
1112                         if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1113                                 txPower += pHalData->BW40_24G_Diff[RFPath][TX_4S];
1114
1115                         /* DBG_871X("+PowerDiff 2.4G (RF-%c): (BW40-1S, BW40-2S, BW40-3S, BW40-4T) = (%d, %d, %d, %d) P.S. Current is in BW 80MHz\n", ((RFPath == 0)?'A':(RFPath == 1)?'B':(RFPath ==2)?'C':'D'), */
1116                         /*      pHalData->BW40_24G_Diff[RFPath][TX_1S], pHalData->BW40_24G_Diff[RFPath][TX_2S], */
1117                         /*      pHalData->BW40_24G_Diff[RFPath][TX_3S], pHalData->BW40_24G_Diff[RFPath][TX_4S]); */
1118                 }
1119         } else {/* 3 ============================== 5 G ============================== */
1120                 if (MGN_6M <= Rate)
1121                         txPower = pHalData->Index5G_BW40_Base[RFPath][chnlIdx];
1122                 else
1123                         DBG_871X("===> mpt_ProQueryCalTxPower_Jaguar: INVALID Rate.\n");
1124
1125                 /* DBG_871X("Base Tx power(RF-%c, Rate #%d, Channel Index %d) = 0x%X\n", */
1126                 /*      ((RFPath == 0)?'A':'B'), Rate, chnlIdx, txPower); */
1127
1128                 /*  OFDM-1T */
1129                 if ((MGN_6M <= Rate && Rate <= MGN_54M) && !IS_CCK_RATE(Rate)) {
1130                         txPower += pHalData->OFDM_5G_Diff[RFPath][TX_1S];
1131                         /* DBG_871X("+PowerDiff 5G (RF-%c): (OFDM-1T) = (%d)\n", ((RFPath == 0)?'A':'B'), pHalData->OFDM_5G_Diff[RFPath][TX_1S]); */
1132                 }
1133
1134                 /*  BW20-1S, BW20-2S */
1135                 if (BandWidth == CHANNEL_WIDTH_20) {
1136                         if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31)  || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1137                                 txPower += pHalData->BW20_5G_Diff[RFPath][TX_1S];
1138                         if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1139                                 txPower += pHalData->BW20_5G_Diff[RFPath][TX_2S];
1140                         if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1141                                 txPower += pHalData->BW20_5G_Diff[RFPath][TX_3S];
1142                         if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1143                                 txPower += pHalData->BW20_5G_Diff[RFPath][TX_4S];
1144
1145                         /* DBG_871X("+PowerDiff 5G (RF-%c): (BW20-1S, BW20-2S, BW20-3S, BW20-4S) = (%d, %d, %d, %d)\n", ((RFPath == 0)?'A':(RFPath == 1)?'B':(RFPath ==2)?'C':'D'), */
1146                         /*      pHalData->BW20_5G_Diff[RFPath][TX_1S], pHalData->BW20_5G_Diff[RFPath][TX_2S], */
1147                         /*      pHalData->BW20_5G_Diff[RFPath][TX_3S], pHalData->BW20_5G_Diff[RFPath][TX_4S]); */
1148                 } else if (BandWidth == CHANNEL_WIDTH_40) { /*  BW40-1S, BW40-2S */
1149                         if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31)  || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1150                                 txPower += pHalData->BW40_5G_Diff[RFPath][TX_1S];
1151                         if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1152                                 txPower += pHalData->BW40_5G_Diff[RFPath][TX_2S];
1153                         if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1154                                 txPower += pHalData->BW40_5G_Diff[RFPath][TX_3S];
1155                         if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1156                                 txPower += pHalData->BW40_5G_Diff[RFPath][TX_4S];
1157
1158                         /* DBG_871X("+PowerDiff 5G(RF-%c): (BW40-1S, BW40-2S) = (%d, %d, %d, %d)\n", ((RFPath == 0)?'A':(RFPath == 1)?'B':(RFPath ==2)?'C':'D'), */
1159                         /*      pHalData->BW40_5G_Diff[RFPath][TX_1S], pHalData->BW40_5G_Diff[RFPath][TX_2S], */
1160                         /*      pHalData->BW40_5G_Diff[RFPath][TX_3S], pHalData->BW40_5G_Diff[RFPath][TX_4S]); */
1161                 } else if (BandWidth == CHANNEL_WIDTH_80) { /*  BW80-1S, BW80-2S */
1162                         /*  <20121220, Kordan> Get the index of array "Index5G_BW80_Base". */
1163                         u8 channel5G_80M[CHANNEL_MAX_NUMBER_5G_80M] = {42, 58, 106, 122, 138, 155, 171};
1164                         for (i = 0; i < ARRAY_SIZE(channel5G_80M); ++i)
1165                                 if (channel5G_80M[i] == Channel)
1166                                         chnlIdx = i;
1167
1168                         txPower = pHalData->Index5G_BW80_Base[RFPath][chnlIdx];
1169
1170                         if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31)  || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1171                                 txPower += + pHalData->BW80_5G_Diff[RFPath][TX_1S];
1172                         if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1173                                 txPower += pHalData->BW80_5G_Diff[RFPath][TX_2S];
1174                         if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1175                                 txPower += pHalData->BW80_5G_Diff[RFPath][TX_3S];
1176                         if ((MGN_MCS23 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
1177                                 txPower += pHalData->BW80_5G_Diff[RFPath][TX_4S];
1178
1179                         /* DBG_871X("+PowerDiff 5G(RF-%c): (BW80-1S, BW80-2S, BW80-3S, BW80-4S) = (%d, %d, %d, %d)\n", ((RFPath == 0)?'A':(RFPath == 1)?'B':(RFPath ==2)?'C':'D'), */
1180                         /*      pHalData->BW80_5G_Diff[RFPath][TX_1S], pHalData->BW80_5G_Diff[RFPath][TX_2S], */
1181                         /*      pHalData->BW80_5G_Diff[RFPath][TX_3S], pHalData->BW80_5G_Diff[RFPath][TX_4S]); */
1182                 }
1183         }
1184
1185         return txPower;
1186 }
1187
1188 s8 PHY_GetTxPowerTrackingOffset(struct adapter *padapter, u8 RFPath, u8 Rate)
1189 {
1190         struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
1191         PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
1192         s8 offset = 0;
1193
1194         if (pDM_Odm->RFCalibrateInfo.TxPowerTrackControl  == false)
1195                 return offset;
1196
1197         if ((Rate == MGN_1M) || (Rate == MGN_2M) || (Rate == MGN_5_5M) || (Rate == MGN_11M)) {
1198                 offset = pDM_Odm->Remnant_CCKSwingIdx;
1199                 /* DBG_871X("+Remnant_CCKSwingIdx = 0x%x\n", RFPath, Rate, pDM_Odm->Remnant_CCKSwingIdx); */
1200         } else {
1201                 offset = pDM_Odm->Remnant_OFDMSwingIdx[RFPath];
1202                 /* DBG_871X("+Remanant_OFDMSwingIdx[RFPath %u][Rate 0x%x] = 0x%x\n", RFPath, Rate, pDM_Odm->Remnant_OFDMSwingIdx[RFPath]); */
1203
1204         }
1205
1206         return offset;
1207 }
1208
1209 u8 PHY_GetRateIndexOfTxPowerByRate(u8 Rate)
1210 {
1211         u8 index = 0;
1212         switch (Rate) {
1213         case MGN_1M:
1214                 index = 0;
1215                 break;
1216         case MGN_2M:
1217                 index = 1;
1218                 break;
1219         case MGN_5_5M:
1220                 index = 2;
1221                 break;
1222         case MGN_11M:
1223                 index = 3;
1224                 break;
1225         case MGN_6M:
1226                 index = 4;
1227                 break;
1228         case MGN_9M:
1229                 index = 5;
1230                 break;
1231         case MGN_12M:
1232                 index = 6;
1233                 break;
1234         case MGN_18M:
1235                 index = 7;
1236                 break;
1237         case MGN_24M:
1238                 index = 8;
1239                 break;
1240         case MGN_36M:
1241                 index = 9;
1242                 break;
1243         case MGN_48M:
1244                 index = 10;
1245                 break;
1246         case MGN_54M:
1247                 index = 11;
1248                 break;
1249         case MGN_MCS0:
1250                 index = 12;
1251                 break;
1252         case MGN_MCS1:
1253                 index = 13;
1254                 break;
1255         case MGN_MCS2:
1256                 index = 14;
1257                 break;
1258         case MGN_MCS3:
1259                 index = 15;
1260                 break;
1261         case MGN_MCS4:
1262                 index = 16;
1263                 break;
1264         case MGN_MCS5:
1265                 index = 17;
1266                 break;
1267         case MGN_MCS6:
1268                 index = 18;
1269                 break;
1270         case MGN_MCS7:
1271                 index = 19;
1272                 break;
1273         case MGN_MCS8:
1274                 index = 20;
1275                 break;
1276         case MGN_MCS9:
1277                 index = 21;
1278                 break;
1279         case MGN_MCS10:
1280                 index = 22;
1281                 break;
1282         case MGN_MCS11:
1283                 index = 23;
1284                 break;
1285         case MGN_MCS12:
1286                 index = 24;
1287                 break;
1288         case MGN_MCS13:
1289                 index = 25;
1290                 break;
1291         case MGN_MCS14:
1292                 index = 26;
1293                 break;
1294         case MGN_MCS15:
1295                 index = 27;
1296                 break;
1297         case MGN_MCS16:
1298                 index = 28;
1299                 break;
1300         case MGN_MCS17:
1301                 index = 29;
1302                 break;
1303         case MGN_MCS18:
1304                 index = 30;
1305                 break;
1306         case MGN_MCS19:
1307                 index = 31;
1308                 break;
1309         case MGN_MCS20:
1310                 index = 32;
1311                 break;
1312         case MGN_MCS21:
1313                 index = 33;
1314                 break;
1315         case MGN_MCS22:
1316                 index = 34;
1317                 break;
1318         case MGN_MCS23:
1319                 index = 35;
1320                 break;
1321         case MGN_MCS24:
1322                 index = 36;
1323                 break;
1324         case MGN_MCS25:
1325                 index = 37;
1326                 break;
1327         case MGN_MCS26:
1328                 index = 38;
1329                 break;
1330         case MGN_MCS27:
1331                 index = 39;
1332                 break;
1333         case MGN_MCS28:
1334                 index = 40;
1335                 break;
1336         case MGN_MCS29:
1337                 index = 41;
1338                 break;
1339         case MGN_MCS30:
1340                 index = 42;
1341                 break;
1342         case MGN_MCS31:
1343                 index = 43;
1344                 break;
1345         case MGN_VHT1SS_MCS0:
1346                 index = 44;
1347                 break;
1348         case MGN_VHT1SS_MCS1:
1349                 index = 45;
1350                 break;
1351         case MGN_VHT1SS_MCS2:
1352                 index = 46;
1353                 break;
1354         case MGN_VHT1SS_MCS3:
1355                 index = 47;
1356                 break;
1357         case MGN_VHT1SS_MCS4:
1358                 index = 48;
1359                 break;
1360         case MGN_VHT1SS_MCS5:
1361                 index = 49;
1362                 break;
1363         case MGN_VHT1SS_MCS6:
1364                 index = 50;
1365                 break;
1366         case MGN_VHT1SS_MCS7:
1367                 index = 51;
1368                 break;
1369         case MGN_VHT1SS_MCS8:
1370                 index = 52;
1371                 break;
1372         case MGN_VHT1SS_MCS9:
1373                 index = 53;
1374                 break;
1375         case MGN_VHT2SS_MCS0:
1376                 index = 54;
1377                 break;
1378         case MGN_VHT2SS_MCS1:
1379                 index = 55;
1380                 break;
1381         case MGN_VHT2SS_MCS2:
1382                 index = 56;
1383                 break;
1384         case MGN_VHT2SS_MCS3:
1385                 index = 57;
1386                 break;
1387         case MGN_VHT2SS_MCS4:
1388                 index = 58;
1389                 break;
1390         case MGN_VHT2SS_MCS5:
1391                 index = 59;
1392                 break;
1393         case MGN_VHT2SS_MCS6:
1394                 index = 60;
1395                 break;
1396         case MGN_VHT2SS_MCS7:
1397                 index = 61;
1398                 break;
1399         case MGN_VHT2SS_MCS8:
1400                 index = 62;
1401                 break;
1402         case MGN_VHT2SS_MCS9:
1403                 index = 63;
1404                 break;
1405         case MGN_VHT3SS_MCS0:
1406                 index = 64;
1407                 break;
1408         case MGN_VHT3SS_MCS1:
1409                 index = 65;
1410                 break;
1411         case MGN_VHT3SS_MCS2:
1412                 index = 66;
1413                 break;
1414         case MGN_VHT3SS_MCS3:
1415                 index = 67;
1416                 break;
1417         case MGN_VHT3SS_MCS4:
1418                 index = 68;
1419                 break;
1420         case MGN_VHT3SS_MCS5:
1421                 index = 69;
1422                 break;
1423         case MGN_VHT3SS_MCS6:
1424                 index = 70;
1425                 break;
1426         case MGN_VHT3SS_MCS7:
1427                 index = 71;
1428                 break;
1429         case MGN_VHT3SS_MCS8:
1430                 index = 72;
1431                 break;
1432         case MGN_VHT3SS_MCS9:
1433                 index = 73;
1434                 break;
1435         case MGN_VHT4SS_MCS0:
1436                 index = 74;
1437                 break;
1438         case MGN_VHT4SS_MCS1:
1439                 index = 75;
1440                 break;
1441         case MGN_VHT4SS_MCS2:
1442                 index = 76;
1443                 break;
1444         case MGN_VHT4SS_MCS3:
1445                 index = 77;
1446                 break;
1447         case MGN_VHT4SS_MCS4:
1448                 index = 78;
1449                 break;
1450         case MGN_VHT4SS_MCS5:
1451                 index = 79;
1452                 break;
1453         case MGN_VHT4SS_MCS6:
1454                 index = 80;
1455                 break;
1456         case MGN_VHT4SS_MCS7:
1457                 index = 81;
1458                 break;
1459         case MGN_VHT4SS_MCS8:
1460                 index = 82;
1461                 break;
1462         case MGN_VHT4SS_MCS9:
1463                 index = 83;
1464                 break;
1465         default:
1466                 DBG_871X("Invalid rate 0x%x in %s\n", Rate, __func__);
1467                 break;
1468         }
1469         return index;
1470 }
1471
1472 s8 PHY_GetTxPowerByRate(
1473         struct adapter *padapter, u8 Band, u8 RFPath, u8 TxNum, u8 Rate
1474 )
1475 {
1476         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
1477         s8 value = 0;
1478         u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate(Rate);
1479
1480         if ((padapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory == 2) ||
1481                    padapter->registrypriv.RegEnableTxPowerByRate == 0)
1482                 return 0;
1483
1484         if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
1485                 DBG_871X("Invalid band %d in %s\n", Band, __func__);
1486                 return value;
1487         }
1488         if (RFPath > ODM_RF_PATH_D) {
1489                 DBG_871X("Invalid RfPath %d in %s\n", RFPath, __func__);
1490                 return value;
1491         }
1492         if (TxNum >= RF_MAX_TX_NUM) {
1493                 DBG_871X("Invalid TxNum %d in %s\n", TxNum, __func__);
1494                 return value;
1495         }
1496         if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE) {
1497                 DBG_871X("Invalid RateIndex %d in %s\n", rateIndex, __func__);
1498                 return value;
1499         }
1500
1501         return pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex];
1502
1503 }
1504
1505 void PHY_SetTxPowerByRate(
1506         struct adapter *padapter,
1507         u8 Band,
1508         u8 RFPath,
1509         u8 TxNum,
1510         u8 Rate,
1511         s8 Value
1512 )
1513 {
1514         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
1515         u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate(Rate);
1516
1517         if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
1518                 DBG_871X("Invalid band %d in %s\n", Band, __func__);
1519                 return;
1520         }
1521         if (RFPath > ODM_RF_PATH_D) {
1522                 DBG_871X("Invalid RfPath %d in %s\n", RFPath, __func__);
1523                 return;
1524         }
1525         if (TxNum >= RF_MAX_TX_NUM) {
1526                 DBG_871X("Invalid TxNum %d in %s\n", TxNum, __func__);
1527                 return;
1528         }
1529         if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE) {
1530                 DBG_871X("Invalid RateIndex %d in %s\n", rateIndex, __func__);
1531                 return;
1532         }
1533
1534         pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex] = Value;
1535 }
1536
1537 void PHY_SetTxPowerLevelByPath(struct adapter *Adapter, u8 channel, u8 path)
1538 {
1539         struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
1540         bool bIsIn24G = (pHalData->CurrentBandType == BAND_ON_2_4G);
1541
1542         /* if (pMgntInfo->RegNByteAccess == 0) */
1543         {
1544                 if (bIsIn24G)
1545                         PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, CCK);
1546
1547                 PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, OFDM);
1548                 PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, HT_MCS0_MCS7);
1549
1550                 if (pHalData->NumTotalRFPath >= 2)
1551                         PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, HT_MCS8_MCS15);
1552
1553         }
1554 }
1555
1556 void PHY_SetTxPowerIndexByRateArray(
1557         struct adapter *padapter,
1558         u8 RFPath,
1559         enum CHANNEL_WIDTH BandWidth,
1560         u8 Channel,
1561         u8 *Rates,
1562         u8 RateArraySize
1563 )
1564 {
1565         u32 powerIndex = 0;
1566         int     i = 0;
1567
1568         for (i = 0; i < RateArraySize; ++i) {
1569                 powerIndex = PHY_GetTxPowerIndex(padapter, RFPath, Rates[i], BandWidth, Channel);
1570                 PHY_SetTxPowerIndex(padapter, powerIndex, RFPath, Rates[i]);
1571         }
1572 }
1573
1574 static s8 phy_GetWorldWideLimit(s8 *LimitTable)
1575 {
1576         s8      min = LimitTable[0];
1577         u8 i = 0;
1578
1579         for (i = 0; i < MAX_REGULATION_NUM; ++i) {
1580                 if (LimitTable[i] < min)
1581                         min = LimitTable[i];
1582         }
1583
1584         return min;
1585 }
1586
1587 static s8 phy_GetChannelIndexOfTxPowerLimit(u8 Band, u8 Channel)
1588 {
1589         s8      channelIndex = -1;
1590         u8 channel5G[CHANNEL_MAX_NUMBER_5G] = {
1591                 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102,
1592                 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130,
1593                 132, 134, 136, 138, 140, 142, 144, 149, 151, 153, 155, 157, 159, 161,
1594                 163, 165, 167, 168, 169, 171, 173, 175, 177
1595         };
1596         u8 i = 0;
1597         if (Band == BAND_ON_2_4G)
1598                 channelIndex = Channel - 1;
1599         else if (Band == BAND_ON_5G) {
1600                 for (i = 0; i < ARRAY_SIZE(channel5G); ++i) {
1601                         if (channel5G[i] == Channel)
1602                                 channelIndex = i;
1603                 }
1604         } else
1605                 DBG_871X("Invalid Band %d in %s", Band, __func__);
1606
1607         if (channelIndex == -1)
1608                 DBG_871X("Invalid Channel %d of Band %d in %s", Channel, Band, __func__);
1609
1610         return channelIndex;
1611 }
1612
1613 static s16 get_bandwidth_idx(const enum CHANNEL_WIDTH bandwidth)
1614 {
1615         switch (bandwidth) {
1616         case CHANNEL_WIDTH_20:
1617                 return 0;
1618         case CHANNEL_WIDTH_40:
1619                 return 1;
1620         case CHANNEL_WIDTH_80:
1621                 return 2;
1622         case CHANNEL_WIDTH_160:
1623                 return 3;
1624         default:
1625                 return -1;
1626         }
1627 }
1628
1629 static s16 get_rate_sctn_idx(const u8 rate)
1630 {
1631         switch (rate) {
1632         case MGN_1M: case MGN_2M: case MGN_5_5M: case MGN_11M:
1633                 return 0;
1634         case MGN_6M: case MGN_9M: case MGN_12M: case MGN_18M:
1635         case MGN_24M: case MGN_36M: case MGN_48M: case MGN_54M:
1636                 return 1;
1637         case MGN_MCS0: case MGN_MCS1: case MGN_MCS2: case MGN_MCS3:
1638         case MGN_MCS4: case MGN_MCS5: case MGN_MCS6: case MGN_MCS7:
1639                 return 2;
1640         case MGN_MCS8: case MGN_MCS9: case MGN_MCS10: case MGN_MCS11:
1641         case MGN_MCS12: case MGN_MCS13: case MGN_MCS14: case MGN_MCS15:
1642                 return 3;
1643         case MGN_MCS16: case MGN_MCS17: case MGN_MCS18: case MGN_MCS19:
1644         case MGN_MCS20: case MGN_MCS21: case MGN_MCS22: case MGN_MCS23:
1645                 return 4;
1646         case MGN_MCS24: case MGN_MCS25: case MGN_MCS26: case MGN_MCS27:
1647         case MGN_MCS28: case MGN_MCS29: case MGN_MCS30: case MGN_MCS31:
1648                 return 5;
1649         case MGN_VHT1SS_MCS0: case MGN_VHT1SS_MCS1: case MGN_VHT1SS_MCS2:
1650         case MGN_VHT1SS_MCS3: case MGN_VHT1SS_MCS4: case MGN_VHT1SS_MCS5:
1651         case MGN_VHT1SS_MCS6: case MGN_VHT1SS_MCS7: case MGN_VHT1SS_MCS8:
1652         case MGN_VHT1SS_MCS9:
1653                 return 6;
1654         case MGN_VHT2SS_MCS0: case MGN_VHT2SS_MCS1: case MGN_VHT2SS_MCS2:
1655         case MGN_VHT2SS_MCS3: case MGN_VHT2SS_MCS4: case MGN_VHT2SS_MCS5:
1656         case MGN_VHT2SS_MCS6: case MGN_VHT2SS_MCS7: case MGN_VHT2SS_MCS8:
1657         case MGN_VHT2SS_MCS9:
1658                 return 7;
1659         case MGN_VHT3SS_MCS0: case MGN_VHT3SS_MCS1: case MGN_VHT3SS_MCS2:
1660         case MGN_VHT3SS_MCS3: case MGN_VHT3SS_MCS4: case MGN_VHT3SS_MCS5:
1661         case MGN_VHT3SS_MCS6: case MGN_VHT3SS_MCS7: case MGN_VHT3SS_MCS8:
1662         case MGN_VHT3SS_MCS9:
1663                 return 8;
1664         case MGN_VHT4SS_MCS0: case MGN_VHT4SS_MCS1: case MGN_VHT4SS_MCS2:
1665         case MGN_VHT4SS_MCS3: case MGN_VHT4SS_MCS4: case MGN_VHT4SS_MCS5:
1666         case MGN_VHT4SS_MCS6: case MGN_VHT4SS_MCS7: case MGN_VHT4SS_MCS8:
1667         case MGN_VHT4SS_MCS9:
1668                 return 9;
1669         default:
1670                 DBG_871X("Wrong rate 0x%x\n", rate);
1671                 return -1;
1672         }
1673 }
1674
1675 s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 reg_pwr_tbl_sel,
1676                       enum BAND_TYPE band_type, enum CHANNEL_WIDTH bandwidth,
1677                       u8 rf_path, u8 data_rate, u8 channel)
1678 {
1679         s16 idx_band       = -1;
1680         s16 idx_regulation = -1;
1681         s16 idx_bandwidth  = -1;
1682         s16 idx_rate_sctn  = -1;
1683         s16 idx_channel    = -1;
1684         s8 pwr_lmt = MAX_POWER_INDEX;
1685         struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
1686
1687         if (((adapter->registrypriv.RegEnableTxPowerLimit == 2) &&
1688              (hal_data->EEPROMRegulatory != 1)) ||
1689             (adapter->registrypriv.RegEnableTxPowerLimit == 0))
1690                 return MAX_POWER_INDEX;
1691
1692         switch (adapter->registrypriv.RegPwrTblSel) {
1693         case 1:
1694                 idx_regulation = TXPWR_LMT_ETSI;
1695                 break;
1696         case 2:
1697                 idx_regulation = TXPWR_LMT_MKK;
1698                 break;
1699         case 3:
1700                 idx_regulation = TXPWR_LMT_FCC;
1701                 break;
1702         case 4:
1703                 idx_regulation = TXPWR_LMT_WW;
1704                 break;
1705         default:
1706                 idx_regulation = (band_type == BAND_ON_2_4G) ?
1707                         hal_data->Regulation2_4G :
1708                         hal_data->Regulation5G;
1709                 break;
1710         }
1711
1712         /* DBG_871X("pMgntInfo->RegPwrTblSel %d, final regulation %d\n", */
1713         /*         adapter->registrypriv.RegPwrTblSel, idx_regulation); */
1714
1715         if (band_type == BAND_ON_2_4G)
1716                 idx_band = 0;
1717         else if (band_type == BAND_ON_5G)
1718                 idx_band = 1;
1719
1720         idx_bandwidth = get_bandwidth_idx(bandwidth);
1721         idx_rate_sctn = get_rate_sctn_idx(data_rate);
1722
1723         if (band_type == BAND_ON_5G && idx_rate_sctn == 0)
1724                 DBG_871X("Wrong rate 0x%x: No CCK in 5G Band\n", DataRate);
1725
1726         /*  workaround for wrong index combination to obtain tx power limit, */
1727         /*  OFDM only exists in BW 20M */
1728         /*  CCK table will only be given in BW 20M */
1729         /*  HT on 80M will reference to HT on 40M */
1730         if (idx_rate_sctn == 0 || idx_rate_sctn == 1)
1731                 idx_bandwidth = 0;
1732         else if ((idx_rate_sctn == 2 || idx_rate_sctn == 3) &&
1733                  (band_type == BAND_ON_5G) && (idx_bandwidth == 2))
1734                 idx_bandwidth = 1;
1735
1736         if (band_type == BAND_ON_2_4G || band_type == BAND_ON_5G)
1737                 channel = phy_GetChannelIndexOfTxPowerLimit(band_type, channel);
1738
1739         if (idx_band == -1 || idx_regulation == -1 || idx_bandwidth == -1 ||
1740             idx_rate_sctn == -1 || idx_channel == -1) {
1741                 /* DBG_871X("Wrong index value to access power limit table [band %d][regulation %d][bandwidth %d][rf_path %d][rate_section %d][chnlGroup %d]\n", */
1742                 /*         idx_band, idx_regulation, idx_bandwidth, rf_path, */
1743                 /*         idx_rate_sctn, channel); */
1744
1745                 return MAX_POWER_INDEX;
1746         }
1747
1748         if (band_type == BAND_ON_2_4G) {
1749                 s8 limits[10] = {0}; u8 i = 0;
1750
1751                 for (i = 0; i < MAX_REGULATION_NUM; i++)
1752                         limits[i] = hal_data->TxPwrLimit_2_4G[i]
1753                                                              [idx_bandwidth]
1754                                                              [idx_rate_sctn]
1755                                                              [idx_channel]
1756                                                              [rf_path];
1757
1758                 pwr_lmt = (idx_regulation == TXPWR_LMT_WW) ?
1759                         phy_GetWorldWideLimit(limits) :
1760                         hal_data->TxPwrLimit_2_4G[idx_regulation]
1761                                                  [idx_bandwidth]
1762                                                  [idx_rate_sctn]
1763                                                  [idx_channel]
1764                                                  [rf_path];
1765
1766         } else if (band_type == BAND_ON_5G) {
1767                 s8 limits[10] = {0}; u8 i = 0;
1768
1769                 for (i = 0; i < MAX_REGULATION_NUM; ++i)
1770                         limits[i] = hal_data->TxPwrLimit_5G[i]
1771                                                            [idx_bandwidth]
1772                                                            [idx_rate_sctn]
1773                                                            [idx_channel]
1774                                                            [rf_path];
1775
1776                 pwr_lmt = (idx_regulation == TXPWR_LMT_WW) ?
1777                         phy_GetWorldWideLimit(limits) :
1778                         hal_data->TxPwrLimit_5G[idx_regulation]
1779                                                [idx_bandwidth]
1780                                                [idx_rate_sctn]
1781                                                [idx_channel]
1782                                                [rf_path];
1783         } else {
1784                 DBG_871X("No power limit table of the specified band\n");
1785         }
1786
1787         /*  combine 5G VHT & HT rate */
1788         /*  5G 20M and 40M HT and VHT can cross reference */
1789         /*
1790         if (band_type == BAND_ON_5G && pwr_lmt == MAX_POWER_INDEX) {
1791                 if (idx_bandwidth == 0 || idx_bandwidth == 1) {
1792                         RT_TRACE(COMP_INIT, DBG_LOUD, ("No power limit table of the specified band %d, bandwidth %d, ratesection %d, rf path %d\n",
1793                                  idx_band, idx_bandwidth,
1794                                  idx_rate_sctn, rf_path));
1795                         if (idx_rate_sctn == 2)
1796                                 pwr_lmt = hal_data->TxPwrLimit_5G[idx_regulation][idx_bandwidth][4][idx_channel][rf_path];
1797                         else if (idx_rate_sctn == 4)
1798                                 pwr_lmt = hal_data->TxPwrLimit_5G[idx_regulation][idx_bandwidth][2][idx_channel][rf_path];
1799                         else if (idx_rate_sctn == 3)
1800                                 pwr_lmt = hal_data->TxPwrLimit_5G[idx_regulation][idx_bandwidth][5][idx_channel][rf_path];
1801                         else if (idx_rate_sctn == 5)
1802                                 pwr_lmt = hal_data->TxPwrLimit_5G[idx_regulation][idx_bandwidth][3][idx_channel][rf_path];
1803                 }
1804         }
1805         */
1806
1807         /* DBG_871X("TxPwrLmt[Regulation %d][Band %d][BW %d][RFPath %d][Rate 0x%x][Chnl %d] = %d\n", */
1808         /*              idx_regulation, hal_data->CurrentBandType, bandwidth, rf_path, data_rate, channel, pwr_lmt); */
1809         return pwr_lmt;
1810 }
1811
1812 static void phy_CrossReferenceHTAndVHTTxPowerLimit(struct adapter *padapter)
1813 {
1814         struct hal_com_data     *pHalData = GET_HAL_DATA(padapter);
1815         u8 regulation, bw, channel, rateSection;
1816         s8 tempPwrLmt = 0;
1817
1818         for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
1819                 for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) {
1820                         for (channel = 0; channel < CHANNEL_MAX_NUMBER_5G; ++channel) {
1821                                 for (rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection) {
1822                                         tempPwrLmt = pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][ODM_RF_PATH_A];
1823                                         if (tempPwrLmt == MAX_POWER_INDEX) {
1824                                                 u8 baseSection = 2, refSection = 6;
1825                                                 if (bw == 0 || bw == 1) { /*  5G 20M 40M VHT and HT can cross reference */
1826                                                         /* DBG_871X("No power limit table of the specified band %d, bandwidth %d, ratesection %d, channel %d, rf path %d\n", */
1827                                                         /*                      1, bw, rateSection, channel, ODM_RF_PATH_A); */
1828                                                         if (rateSection >= 2 && rateSection <= 9) {
1829                                                                 if (rateSection == 2) {
1830                                                                         baseSection = 2;
1831                                                                         refSection = 6;
1832                                                                 } else if (rateSection == 3) {
1833                                                                         baseSection = 3;
1834                                                                         refSection = 7;
1835                                                                 } else if (rateSection == 4) {
1836                                                                         baseSection = 4;
1837                                                                         refSection = 8;
1838                                                                 } else if (rateSection == 5) {
1839                                                                         baseSection = 5;
1840                                                                         refSection = 9;
1841                                                                 } else if (rateSection == 6) {
1842                                                                         baseSection = 6;
1843                                                                         refSection = 2;
1844                                                                 } else if (rateSection == 7) {
1845                                                                         baseSection = 7;
1846                                                                         refSection = 3;
1847                                                                 } else if (rateSection == 8) {
1848                                                                         baseSection = 8;
1849                                                                         refSection = 4;
1850                                                                 } else if (rateSection == 9) {
1851                                                                         baseSection = 9;
1852                                                                         refSection = 5;
1853                                                                 }
1854                                                                 pHalData->TxPwrLimit_5G[regulation][bw][baseSection][channel][ODM_RF_PATH_A] =
1855                                                                         pHalData->TxPwrLimit_5G[regulation][bw][refSection][channel][ODM_RF_PATH_A];
1856                                                         }
1857
1858                                                         /* DBG_871X("use other value %d", tempPwrLmt); */
1859                                                 }
1860                                         }
1861                                 }
1862                         }
1863                 }
1864         }
1865 }
1866
1867 void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter)
1868 {
1869         struct hal_com_data     *pHalData = GET_HAL_DATA(Adapter);
1870         u8 BW40PwrBasedBm2_4G = 0x2E;
1871         u8 regulation, bw, channel, rateSection;
1872         s8 tempValue = 0, tempPwrLmt = 0;
1873         u8 rfPath = 0;
1874
1875         /* DBG_871X("=====> PHY_ConvertTxPowerLimitToPowerIndex()\n"); */
1876
1877         phy_CrossReferenceHTAndVHTTxPowerLimit(Adapter);
1878
1879         for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
1880                 for (bw = 0; bw < MAX_2_4G_BANDWIDTH_NUM; ++bw) {
1881                         for (channel = 0; channel < CHANNEL_MAX_NUMBER_2G; ++channel) {
1882                                 for (rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection) {
1883                                         tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][ODM_RF_PATH_A];
1884
1885                                         for (rfPath = ODM_RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath) {
1886                                                 if (pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE) {
1887                                                         if (rateSection == 5) /*  HT 4T */
1888                                                                 BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_2_4G, rfPath, RF_4TX, HT_MCS24_MCS31);
1889                                                         else if (rateSection == 4) /*  HT 3T */
1890                                                                 BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_2_4G, rfPath, RF_3TX, HT_MCS16_MCS23);
1891                                                         else if (rateSection == 3) /*  HT 2T */
1892                                                                 BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_2_4G, rfPath, RF_2TX, HT_MCS8_MCS15);
1893                                                         else if (rateSection == 2) /*  HT 1T */
1894                                                                 BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_2_4G, rfPath, RF_1TX, HT_MCS0_MCS7);
1895                                                         else if (rateSection == 1) /*  OFDM */
1896                                                                 BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_2_4G, rfPath, RF_1TX, OFDM);
1897                                                         else if (rateSection == 0) /*  CCK */
1898                                                                 BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_2_4G, rfPath, RF_1TX, CCK);
1899                                                 } else
1900                                                         BW40PwrBasedBm2_4G = Adapter->registrypriv.RegPowerBase * 2;
1901
1902                                                 if (tempPwrLmt != MAX_POWER_INDEX) {
1903                                                         tempValue = tempPwrLmt - BW40PwrBasedBm2_4G;
1904                                                         pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][rfPath] = tempValue;
1905                                                 }
1906                                         }
1907                                 }
1908                         }
1909                 }
1910         }
1911
1912         /* DBG_871X("<===== PHY_ConvertTxPowerLimitToPowerIndex()\n"); */
1913 }
1914
1915 void PHY_InitTxPowerLimit(struct adapter *Adapter)
1916 {
1917         struct hal_com_data     *pHalData = GET_HAL_DATA(Adapter);
1918         u8 i, j, k, l, m;
1919
1920         /* DBG_871X("=====> PHY_InitTxPowerLimit()!\n"); */
1921
1922         for (i = 0; i < MAX_REGULATION_NUM; ++i) {
1923                 for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j)
1924                         for (k = 0; k < MAX_RATE_SECTION_NUM; ++k)
1925                                 for (m = 0; m < CHANNEL_MAX_NUMBER_2G; ++m)
1926                                         for (l = 0; l < MAX_RF_PATH_NUM; ++l)
1927                                                 pHalData->TxPwrLimit_2_4G[i][j][k][m][l] = MAX_POWER_INDEX;
1928         }
1929
1930         for (i = 0; i < MAX_REGULATION_NUM; ++i) {
1931                 for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
1932                         for (k = 0; k < MAX_RATE_SECTION_NUM; ++k)
1933                                 for (m = 0; m < CHANNEL_MAX_NUMBER_5G; ++m)
1934                                         for (l = 0; l < MAX_RF_PATH_NUM; ++l)
1935                                                 pHalData->TxPwrLimit_5G[i][j][k][m][l] = MAX_POWER_INDEX;
1936         }
1937
1938         /* DBG_871X("<===== PHY_InitTxPowerLimit()!\n"); */
1939 }
1940
1941 void PHY_SetTxPowerLimit(
1942         struct adapter *Adapter,
1943         u8 *Regulation,
1944         u8 *Band,
1945         u8 *Bandwidth,
1946         u8 *RateSection,
1947         u8 *RfPath,
1948         u8 *Channel,
1949         u8 *PowerLimit
1950 )
1951 {
1952         struct hal_com_data     *pHalData = GET_HAL_DATA(Adapter);
1953         u8 regulation = 0, bandwidth = 0, rateSection = 0, channel;
1954         s8 powerLimit = 0, prevPowerLimit, channelIndex;
1955
1956         /* DBG_871X("Index of power limit table [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s][val %s]\n", */
1957         /*        Band, Regulation, Bandwidth, RateSection, RfPath, Channel, PowerLimit); */
1958
1959         if (!GetU1ByteIntegerFromStringInDecimal((s8 *)Channel, &channel) ||
1960                  !GetU1ByteIntegerFromStringInDecimal((s8 *)PowerLimit, &powerLimit))
1961                 DBG_871X("Illegal index of power limit table [chnl %s][val %s]\n", Channel, PowerLimit);
1962
1963         powerLimit = powerLimit > MAX_POWER_INDEX ? MAX_POWER_INDEX : powerLimit;
1964
1965         if (eqNByte(Regulation, (u8 *)("FCC"), 3))
1966                 regulation = 0;
1967         else if (eqNByte(Regulation, (u8 *)("MKK"), 3))
1968                 regulation = 1;
1969         else if (eqNByte(Regulation, (u8 *)("ETSI"), 4))
1970                 regulation = 2;
1971         else if (eqNByte(Regulation, (u8 *)("WW13"), 4))
1972                 regulation = 3;
1973
1974         if (eqNByte(RateSection, (u8 *)("CCK"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2))
1975                 rateSection = 0;
1976         else if (eqNByte(RateSection, (u8 *)("OFDM"), 4) && eqNByte(RfPath, (u8 *)("1T"), 2))
1977                 rateSection = 1;
1978         else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("1T"), 2))
1979                 rateSection = 2;
1980         else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("2T"), 2))
1981                 rateSection = 3;
1982         else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("3T"), 2))
1983                 rateSection = 4;
1984         else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("4T"), 2))
1985                 rateSection = 5;
1986         else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2))
1987                 rateSection = 6;
1988         else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("2T"), 2))
1989                 rateSection = 7;
1990         else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("3T"), 2))
1991                 rateSection = 8;
1992         else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("4T"), 2))
1993                 rateSection = 9;
1994         else {
1995                 DBG_871X("Wrong rate section!\n");
1996                 return;
1997         }
1998
1999
2000         if (eqNByte(Bandwidth, (u8 *)("20M"), 3))
2001                 bandwidth = 0;
2002         else if (eqNByte(Bandwidth, (u8 *)("40M"), 3))
2003                 bandwidth = 1;
2004         else if (eqNByte(Bandwidth, (u8 *)("80M"), 3))
2005                 bandwidth = 2;
2006         else if (eqNByte(Bandwidth, (u8 *)("160M"), 4))
2007                 bandwidth = 3;
2008
2009         if (eqNByte(Band, (u8 *)("2.4G"), 4)) {
2010                 channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_2_4G, channel);
2011
2012                 if (channelIndex == -1)
2013                         return;
2014
2015                 prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A];
2016
2017                 if (powerLimit < prevPowerLimit)
2018                         pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] = powerLimit;
2019
2020                 /* DBG_871X("2.4G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n", */
2021                 /*        regulation, bandwidth, rateSection, channelIndex, pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]); */
2022         } else if (eqNByte(Band, (u8 *)("5G"), 2)) {
2023                 channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_5G, channel);
2024
2025                 if (channelIndex == -1)
2026                         return;
2027
2028                 prevPowerLimit = pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A];
2029
2030                 if (powerLimit < prevPowerLimit)
2031                         pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] = powerLimit;
2032
2033                 /* DBG_871X("5G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n", */
2034                 /*        regulation, bandwidth, rateSection, channel, pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]); */
2035         } else {
2036                 DBG_871X("Cannot recognize the band info in %s\n", Band);
2037                 return;
2038         }
2039 }
2040
2041 void Hal_ChannelPlanToRegulation(struct adapter *Adapter, u16 ChannelPlan)
2042 {
2043         struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
2044         pHalData->Regulation2_4G = TXPWR_LMT_WW;
2045         pHalData->Regulation5G = TXPWR_LMT_WW;
2046
2047         switch (ChannelPlan) {
2048         case RT_CHANNEL_DOMAIN_WORLD_NULL:
2049                 pHalData->Regulation2_4G = TXPWR_LMT_WW;
2050                 break;
2051         case RT_CHANNEL_DOMAIN_ETSI1_NULL:
2052                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2053                 break;
2054         case RT_CHANNEL_DOMAIN_FCC1_NULL:
2055                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2056                 break;
2057         case RT_CHANNEL_DOMAIN_MKK1_NULL:
2058                 pHalData->Regulation2_4G = TXPWR_LMT_MKK;
2059                 break;
2060         case RT_CHANNEL_DOMAIN_ETSI2_NULL:
2061                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2062                 break;
2063         case RT_CHANNEL_DOMAIN_FCC1_FCC1:
2064                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2065                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2066                 break;
2067         case RT_CHANNEL_DOMAIN_WORLD_ETSI1:
2068                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2069                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2070                 break;
2071         case RT_CHANNEL_DOMAIN_MKK1_MKK1:
2072                 pHalData->Regulation2_4G = TXPWR_LMT_MKK;
2073                 pHalData->Regulation5G = TXPWR_LMT_MKK;
2074                 break;
2075         case RT_CHANNEL_DOMAIN_WORLD_KCC1:
2076                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2077                 pHalData->Regulation5G = TXPWR_LMT_MKK;
2078                 break;
2079         case RT_CHANNEL_DOMAIN_WORLD_FCC2:
2080                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2081                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2082                 break;
2083         case RT_CHANNEL_DOMAIN_WORLD_FCC3:
2084                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2085                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2086                 break;
2087         case RT_CHANNEL_DOMAIN_WORLD_FCC4:
2088                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2089                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2090                 break;
2091         case RT_CHANNEL_DOMAIN_WORLD_FCC5:
2092                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2093                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2094                 break;
2095         case RT_CHANNEL_DOMAIN_WORLD_FCC6:
2096                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2097                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2098                 break;
2099         case RT_CHANNEL_DOMAIN_FCC1_FCC7:
2100                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2101                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2102                 break;
2103         case RT_CHANNEL_DOMAIN_WORLD_ETSI2:
2104                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2105                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2106                 break;
2107         case RT_CHANNEL_DOMAIN_WORLD_ETSI3:
2108                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2109                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2110                 break;
2111         case RT_CHANNEL_DOMAIN_MKK1_MKK2:
2112                 pHalData->Regulation2_4G = TXPWR_LMT_MKK;
2113                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2114                 break;
2115         case RT_CHANNEL_DOMAIN_MKK1_MKK3:
2116                 pHalData->Regulation2_4G = TXPWR_LMT_MKK;
2117                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2118                 break;
2119         case RT_CHANNEL_DOMAIN_FCC1_NCC1:
2120                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2121                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2122                 break;
2123         case RT_CHANNEL_DOMAIN_FCC1_NCC2:
2124                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2125                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2126                 break;
2127         case RT_CHANNEL_DOMAIN_GLOBAL_NULL:
2128                 pHalData->Regulation2_4G = TXPWR_LMT_WW;
2129                 pHalData->Regulation5G = TXPWR_LMT_WW;
2130                 break;
2131         case RT_CHANNEL_DOMAIN_ETSI1_ETSI4:
2132                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2133                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2134                 break;
2135         case RT_CHANNEL_DOMAIN_FCC1_FCC2:
2136                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2137                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2138                 break;
2139         case RT_CHANNEL_DOMAIN_FCC1_NCC3:
2140                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2141                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2142                 break;
2143         case RT_CHANNEL_DOMAIN_WORLD_ETSI5:
2144                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2145                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2146                 break;
2147         case RT_CHANNEL_DOMAIN_FCC1_FCC8:
2148                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2149                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2150                 break;
2151         case RT_CHANNEL_DOMAIN_WORLD_ETSI6:
2152                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2153                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2154                 break;
2155         case RT_CHANNEL_DOMAIN_WORLD_ETSI7:
2156                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2157                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2158                 break;
2159         case RT_CHANNEL_DOMAIN_WORLD_ETSI8:
2160                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2161                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2162                 break;
2163         case RT_CHANNEL_DOMAIN_WORLD_ETSI9:
2164                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2165                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2166                 break;
2167         case RT_CHANNEL_DOMAIN_WORLD_ETSI10:
2168                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2169                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2170                 break;
2171         case RT_CHANNEL_DOMAIN_WORLD_ETSI11:
2172                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2173                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2174                 break;
2175         case RT_CHANNEL_DOMAIN_FCC1_NCC4:
2176                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2177                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2178                 break;
2179         case RT_CHANNEL_DOMAIN_WORLD_ETSI12:
2180                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2181                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2182                 break;
2183         case RT_CHANNEL_DOMAIN_FCC1_FCC9:
2184                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2185                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2186                 break;
2187         case RT_CHANNEL_DOMAIN_WORLD_ETSI13:
2188                 pHalData->Regulation2_4G = TXPWR_LMT_ETSI;
2189                 pHalData->Regulation5G = TXPWR_LMT_ETSI;
2190                 break;
2191         case RT_CHANNEL_DOMAIN_FCC1_FCC10:
2192                 pHalData->Regulation2_4G = TXPWR_LMT_FCC;
2193                 pHalData->Regulation5G = TXPWR_LMT_FCC;
2194                 break;
2195         case RT_CHANNEL_DOMAIN_REALTEK_DEFINE: /* Realtek Reserve */
2196                 pHalData->Regulation2_4G = TXPWR_LMT_WW;
2197                 pHalData->Regulation5G = TXPWR_LMT_WW;
2198                 break;
2199         default:
2200                 break;
2201         }
2202 }