drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /******************************************************************************
   3  *
   4  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   5  *
   6  ******************************************************************************/
   7
   8 #include "Mp_Precomp.h"
   9
  10 /* defines */
  11 #define HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(val)                             \
  12 do {                                                                          \
  13         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, val);           \
  14         pCoexDm->psTdmaDuAdjType = val;                                       \
  15 } while (0)
  16
  17 /*  Global variables, these are static variables */
  18 static COEX_DM_8723B_2ANT GLCoexDm8723b2Ant;
  19 static PCOEX_DM_8723B_2ANT pCoexDm = &GLCoexDm8723b2Ant;
  20 static COEX_STA_8723B_2ANT GLCoexSta8723b2Ant;
  21 static PCOEX_STA_8723B_2ANT pCoexSta = &GLCoexSta8723b2Ant;
  22
  23 static const char *const GLBtInfoSrc8723b2Ant[] = {
  24         "BT Info[wifi fw]",
  25         "BT Info[bt rsp]",
  26         "BT Info[bt auto report]",
  27 };
  28
  29 static u32 GLCoexVerDate8723b2Ant = 20131211;
  30 static u32 GLCoexVer8723b2Ant = 0x40;
  31
  32 /*  local function start with halbtc8723b2ant_ */
  33 static u8 halbtc8723b2ant_BtRssiState(
  34         u8 levelNum, u8 rssiThresh, u8 rssiThresh1
  35 )
  36 {
  37         s32 btRssi = 0;
  38         u8 btRssiState = pCoexSta->preBtRssiState;
  39
  40         btRssi = pCoexSta->btRssi;
  41
  42         if (levelNum == 2) {
  43                 if (
  44                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
  45                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
  46                 ) {
  47                         if (btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
  48                                 btRssiState = BTC_RSSI_STATE_HIGH;
  49                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
  50                         } else {
  51                                 btRssiState = BTC_RSSI_STATE_STAY_LOW;
  52                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
  53                         }
  54                 } else {
  55                         if (btRssi < rssiThresh) {
  56                                 btRssiState = BTC_RSSI_STATE_LOW;
  57                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
  58                         } else {
  59                                 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
  60                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
  61                         }
  62                 }
  63         } else if (levelNum == 3) {
  64                 if (rssiThresh > rssiThresh1) {
  65                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi thresh error!!\n"));
  66                         return pCoexSta->preBtRssiState;
  67                 }
  68
  69                 if (
  70                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
  71                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
  72                 ) {
  73                         if (btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
  74                                 btRssiState = BTC_RSSI_STATE_MEDIUM;
  75                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
  76                         } else {
  77                                 btRssiState = BTC_RSSI_STATE_STAY_LOW;
  78                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
  79                         }
  80                 } else if (
  81                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
  82                         (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)
  83                 ) {
  84                         if (btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
  85                                 btRssiState = BTC_RSSI_STATE_HIGH;
  86                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
  87                         } else if (btRssi < rssiThresh) {
  88                                 btRssiState = BTC_RSSI_STATE_LOW;
  89                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
  90                         } else {
  91                                 btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
  92                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Medium\n"));
  93                         }
  94                 } else {
  95                         if (btRssi < rssiThresh1) {
  96                                 btRssiState = BTC_RSSI_STATE_MEDIUM;
  97                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
  98                         } else {
  99                                 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
 100                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
 101                         }
 102                 }
 103         }
 104
 105         pCoexSta->preBtRssiState = btRssiState;
 106
 107         return btRssiState;
 108 }
 109
 110 static u8 halbtc8723b2ant_WifiRssiState(
 111         PBTC_COEXIST pBtCoexist,
 112         u8 index,
 113         u8 levelNum,
 114         u8 rssiThresh,
 115         u8 rssiThresh1
 116 )
 117 {
 118         s32 wifiRssi = 0;
 119         u8 wifiRssiState = pCoexSta->preWifiRssiState[index];
 120
 121         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
 122
 123         if (levelNum == 2) {
 124                 if (
 125                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
 126                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)
 127                 ) {
 128                         if (wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
 129                                 wifiRssiState = BTC_RSSI_STATE_HIGH;
 130                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
 131                         } else {
 132                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
 133                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
 134                         }
 135                 } else {
 136                         if (wifiRssi < rssiThresh) {
 137                                 wifiRssiState = BTC_RSSI_STATE_LOW;
 138                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
 139                         } else {
 140                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
 141                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
 142                         }
 143                 }
 144         } else if (levelNum == 3) {
 145                 if (rssiThresh > rssiThresh1) {
 146                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI thresh error!!\n"));
 147                         return pCoexSta->preWifiRssiState[index];
 148                 }
 149
 150                 if (
 151                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
 152                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)
 153                 ) {
 154                         if (wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
 155                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
 156                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
 157                         } else {
 158                                 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
 159                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
 160                         }
 161                 } else if (
 162                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
 163                         (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)
 164                 ) {
 165                         if (wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
 166                                 wifiRssiState = BTC_RSSI_STATE_HIGH;
 167                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
 168                         } else if (wifiRssi < rssiThresh) {
 169                                 wifiRssiState = BTC_RSSI_STATE_LOW;
 170                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
 171                         } else {
 172                                 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
 173                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Medium\n"));
 174                         }
 175                 } else {
 176                         if (wifiRssi < rssiThresh1) {
 177                                 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
 178                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
 179                         } else {
 180                                 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
 181                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
 182                         }
 183                 }
 184         }
 185
 186         pCoexSta->preWifiRssiState[index] = wifiRssiState;
 187
 188         return wifiRssiState;
 189 }
 190
 191 static void halbtc8723b2ant_LimitedRx(
 192         PBTC_COEXIST pBtCoexist,
 193         bool bForceExec,
 194         bool bRejApAggPkt,
 195         bool bBtCtrlAggBufSize,
 196         u8 aggBufSize
 197 )
 198 {
 199         bool bRejectRxAgg = bRejApAggPkt;
 200         bool bBtCtrlRxAggSize = bBtCtrlAggBufSize;
 201         u8 rxAggSize = aggBufSize;
 202
 203         /*  */
 204         /*      Rx Aggregation related setting */
 205         /*  */
 206         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
 207         /*  decide BT control aggregation buf size or not */
 208         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
 209         /*  aggregation buf size, only work when BT control Rx aggregation size. */
 210         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
 211         /*  real update aggregation setting */
 212         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 213 }
 214
 215 static void halbtc8723b2ant_MonitorBtCtr(PBTC_COEXIST pBtCoexist)
 216 {
 217         u32 regHPTxRx, regLPTxRx, u4Tmp;
 218         u32 regHPTx = 0, regHPRx = 0, regLPTx = 0, regLPRx = 0;
 219
 220         regHPTxRx = 0x770;
 221         regLPTxRx = 0x774;
 222
 223         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx);
 224         regHPTx = u4Tmp & bMaskLWord;
 225         regHPRx = (u4Tmp & bMaskHWord)>>16;
 226
 227         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx);
 228         regLPTx = u4Tmp & bMaskLWord;
 229         regLPRx = (u4Tmp & bMaskHWord)>>16;
 230
 231         pCoexSta->highPriorityTx = regHPTx;
 232         pCoexSta->highPriorityRx = regHPRx;
 233         pCoexSta->lowPriorityTx = regLPTx;
 234         pCoexSta->lowPriorityRx = regLPRx;
 235
 236         BTC_PRINT(
 237                 BTC_MSG_ALGORITHM,
 238                 ALGO_BT_MONITOR,
 239                 (
 240                         "[BTCoex], High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
 241                         regHPTxRx,
 242                         regHPTx,
 243                         regHPTx,
 244                         regHPRx,
 245                         regHPRx
 246                 )
 247         );
 248         BTC_PRINT(
 249                 BTC_MSG_ALGORITHM,
 250                 ALGO_BT_MONITOR,
 251                 (
 252                         "[BTCoex], Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
 253                         regLPTxRx,
 254                         regLPTx,
 255                         regLPTx,
 256                         regLPRx,
 257                         regLPRx
 258                 )
 259         );
 260
 261         /*  reset counter */
 262         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
 263 }
 264
 265 static void halbtc8723b2ant_QueryBtInfo(PBTC_COEXIST pBtCoexist)
 266 {
 267         u8      H2C_Parameter[1] = {0};
 268
 269         pCoexSta->bC2hBtInfoReqSent = true;
 270
 271         H2C_Parameter[0] |= BIT0;       /*  trigger */
 272
 273         BTC_PRINT(
 274                 BTC_MSG_ALGORITHM,
 275                 ALGO_TRACE_FW_EXEC,
 276                 ("[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n", H2C_Parameter[0])
 277         );
 278
 279         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
 280 }
 281
 282 static bool halbtc8723b2ant_IsWifiStatusChanged(PBTC_COEXIST pBtCoexist)
 283 {
 284         static bool     bPreWifiBusy, bPreUnder4way, bPreBtHsOn;
 285         bool bWifiBusy = false, bUnder4way = false, bBtHsOn = false;
 286         bool bWifiConnected = false;
 287
 288         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
 289         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
 290         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
 291         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way);
 292
 293         if (bWifiConnected) {
 294                 if (bWifiBusy != bPreWifiBusy) {
 295                         bPreWifiBusy = bWifiBusy;
 296                         return true;
 297                 }
 298
 299                 if (bUnder4way != bPreUnder4way) {
 300                         bPreUnder4way = bUnder4way;
 301                         return true;
 302                 }
 303
 304                 if (bBtHsOn != bPreBtHsOn) {
 305                         bPreBtHsOn = bBtHsOn;
 306                         return true;
 307                 }
 308         }
 309
 310         return false;
 311 }
 312
 313 static void halbtc8723b2ant_UpdateBtLinkInfo(PBTC_COEXIST pBtCoexist)
 314 {
 315         PBTC_BT_LINK_INFO pBtLinkInfo = &pBtCoexist->btLinkInfo;
 316         bool bBtHsOn = false;
 317
 318         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
 319
 320         pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
 321         pBtLinkInfo->bScoExist = pCoexSta->bScoExist;
 322         pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist;
 323         pBtLinkInfo->bPanExist = pCoexSta->bPanExist;
 324         pBtLinkInfo->bHidExist = pCoexSta->bHidExist;
 325
 326         /*  work around for HS mode. */
 327         if (bBtHsOn) {
 328                 pBtLinkInfo->bPanExist = true;
 329                 pBtLinkInfo->bBtLinkExist = true;
 330         }
 331
 332         /*  check if Sco only */
 333         if (
 334                 pBtLinkInfo->bScoExist &&
 335                 !pBtLinkInfo->bA2dpExist &&
 336                 !pBtLinkInfo->bPanExist &&
 337                 !pBtLinkInfo->bHidExist
 338         )
 339                 pBtLinkInfo->bScoOnly = true;
 340         else
 341                 pBtLinkInfo->bScoOnly = false;
 342
 343         /*  check if A2dp only */
 344         if (
 345                 !pBtLinkInfo->bScoExist &&
 346                 pBtLinkInfo->bA2dpExist &&
 347                 !pBtLinkInfo->bPanExist &&
 348                 !pBtLinkInfo->bHidExist
 349         )
 350                 pBtLinkInfo->bA2dpOnly = true;
 351         else
 352                 pBtLinkInfo->bA2dpOnly = false;
 353
 354         /*  check if Pan only */
 355         if (
 356                 !pBtLinkInfo->bScoExist &&
 357                 !pBtLinkInfo->bA2dpExist &&
 358                 pBtLinkInfo->bPanExist &&
 359                 !pBtLinkInfo->bHidExist
 360         )
 361                 pBtLinkInfo->bPanOnly = true;
 362         else
 363                 pBtLinkInfo->bPanOnly = false;
 364
 365         /*  check if Hid only */
 366         if (
 367                 !pBtLinkInfo->bScoExist &&
 368                 !pBtLinkInfo->bA2dpExist &&
 369                 !pBtLinkInfo->bPanExist &&
 370                 pBtLinkInfo->bHidExist
 371         )
 372                 pBtLinkInfo->bHidOnly = true;
 373         else
 374                 pBtLinkInfo->bHidOnly = false;
 375 }
 376
 377 static u8 halbtc8723b2ant_ActionAlgorithm(PBTC_COEXIST pBtCoexist)
 378 {
 379         PBTC_BT_LINK_INFO pBtLinkInfo = &pBtCoexist->btLinkInfo;
 380         bool bBtHsOn = false;
 381         u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
 382         u8 numOfDiffProfile = 0;
 383
 384         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
 385
 386         if (!pBtLinkInfo->bBtLinkExist) {
 387                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No BT link exists!!!\n"));
 388                 return algorithm;
 389         }
 390
 391         if (pBtLinkInfo->bScoExist)
 392                 numOfDiffProfile++;
 393
 394         if (pBtLinkInfo->bHidExist)
 395                 numOfDiffProfile++;
 396
 397         if (pBtLinkInfo->bPanExist)
 398                 numOfDiffProfile++;
 399
 400         if (pBtLinkInfo->bA2dpExist)
 401                 numOfDiffProfile++;
 402
 403         if (numOfDiffProfile == 1) {
 404                 if (pBtLinkInfo->bScoExist) {
 405                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO only\n"));
 406                         algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
 407                 } else {
 408                         if (pBtLinkInfo->bHidExist) {
 409                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID only\n"));
 410                                 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
 411                         } else if (pBtLinkInfo->bA2dpExist) {
 412                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP only\n"));
 413                                 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
 414                         } else if (pBtLinkInfo->bPanExist) {
 415                                 if (bBtHsOn) {
 416                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(HS) only\n"));
 417                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANHS;
 418                                 } else {
 419                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(EDR) only\n"));
 420                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR;
 421                                 }
 422                         }
 423                 }
 424         } else if (numOfDiffProfile == 2) {
 425                 if (pBtLinkInfo->bScoExist) {
 426                         if (pBtLinkInfo->bHidExist) {
 427                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID\n"));
 428                                 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 429                         } else if (pBtLinkInfo->bA2dpExist) {
 430                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP ==> SCO\n"));
 431                                 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 432                         } else if (pBtLinkInfo->bPanExist) {
 433                                 if (bBtHsOn) {
 434                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(HS)\n"));
 435                                         algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
 436                                 } else {
 437                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(EDR)\n"));
 438                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 439                                 }
 440                         }
 441                 } else {
 442                         if (
 443                                 pBtLinkInfo->bHidExist &&
 444                                 pBtLinkInfo->bA2dpExist
 445                         ) {
 446                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP\n"));
 447                                 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
 448                         } else if (
 449                                 pBtLinkInfo->bHidExist &&
 450                                 pBtLinkInfo->bPanExist
 451                         ) {
 452                                 if (bBtHsOn) {
 453                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(HS)\n"));
 454                                         algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
 455                                 } else {
 456                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(EDR)\n"));
 457                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 458                                 }
 459                         } else if (
 460                                 pBtLinkInfo->bPanExist &&
 461                                 pBtLinkInfo->bA2dpExist
 462                         ) {
 463                                 if (bBtHsOn) {
 464                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(HS)\n"));
 465                                         algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
 466                                 } else {
 467                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n"));
 468                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
 469                                 }
 470                         }
 471                 }
 472         } else if (numOfDiffProfile == 3) {
 473                 if (pBtLinkInfo->bScoExist) {
 474                         if (
 475                                 pBtLinkInfo->bHidExist &&
 476                                 pBtLinkInfo->bA2dpExist
 477                         ) {
 478                                 BTC_PRINT(
 479                                         BTC_MSG_ALGORITHM,
 480                                         ALGO_TRACE,
 481                                         ("[BTCoex], SCO + HID + A2DP ==> HID\n")
 482                                 );
 483                                 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 484                         } else if (
 485                                 pBtLinkInfo->bHidExist &&
 486                                 pBtLinkInfo->bPanExist
 487                         ) {
 488                                 if (bBtHsOn) {
 489                                         BTC_PRINT(
 490                                                 BTC_MSG_ALGORITHM,
 491                                                 ALGO_TRACE,
 492                                                 ("[BTCoex], SCO + HID + PAN(HS)\n")
 493                                         );
 494                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 495                                 } else {
 496                                         BTC_PRINT(
 497                                                 BTC_MSG_ALGORITHM,
 498                                                 ALGO_TRACE,
 499                                                 ("[BTCoex], SCO + HID + PAN(EDR)\n")
 500                                         );
 501                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 502                                 }
 503                         } else if (
 504                                 pBtLinkInfo->bPanExist &&
 505                                 pBtLinkInfo->bA2dpExist
 506                         ) {
 507                                 if (bBtHsOn) {
 508                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(HS)\n"));
 509                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 510                                 } else {
 511                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"));
 512                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 513                                 }
 514                         }
 515                 } else {
 516                         if (
 517                                 pBtLinkInfo->bHidExist &&
 518                                 pBtLinkInfo->bPanExist &&
 519                                 pBtLinkInfo->bA2dpExist
 520                         ) {
 521                                 if (bBtHsOn) {
 522                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n"));
 523                                         algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
 524                                 } else {
 525                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n"));
 526                                         algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 527                                 }
 528                         }
 529                 }
 530         } else if (numOfDiffProfile >= 3) {
 531                 if (pBtLinkInfo->bScoExist) {
 532                         if (
 533                                 pBtLinkInfo->bHidExist &&
 534                                 pBtLinkInfo->bPanExist &&
 535                                 pBtLinkInfo->bA2dpExist
 536                         ) {
 537                                 if (bBtHsOn) {
 538                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"));
 539
 540                                 } else {
 541                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP + PAN(EDR) ==>PAN(EDR)+HID\n"));
 542                                         algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548         return algorithm;
 549 }
 550
 551 static void halbtc8723b2ant_SetFwDacSwingLevel(
 552         PBTC_COEXIST pBtCoexist, u8 dacSwingLvl
 553 )
 554 {
 555         u8      H2C_Parameter[1] = {0};
 556
 557         /*  There are several type of dacswing */
 558         /*  0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
 559         H2C_Parameter[0] = dacSwingLvl;
 560
 561         BTC_PRINT(
 562                 BTC_MSG_ALGORITHM,
 563                 ALGO_TRACE_FW_EXEC,
 564                 ("[BTCoex], Set Dac Swing Level = 0x%x\n", dacSwingLvl)
 565         );
 566         BTC_PRINT(
 567                 BTC_MSG_ALGORITHM,
 568                 ALGO_TRACE_FW_EXEC,
 569                 ("[BTCoex], FW write 0x64 = 0x%x\n", H2C_Parameter[0])
 570         );
 571
 572         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
 573 }
 574
 575 static void halbtc8723b2ant_SetFwDecBtPwr(
 576         PBTC_COEXIST pBtCoexist, u8 decBtPwrLvl
 577 )
 578 {
 579         u8      H2C_Parameter[1] = {0};
 580
 581         H2C_Parameter[0] = decBtPwrLvl;
 582
 583         BTC_PRINT(
 584                 BTC_MSG_ALGORITHM,
 585                 ALGO_TRACE_FW_EXEC,
 586                 (
 587                         "[BTCoex], decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
 588                         decBtPwrLvl,
 589                         H2C_Parameter[0]
 590                 )
 591         );
 592
 593         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
 594 }
 595
 596 static void halbtc8723b2ant_DecBtPwr(
 597         PBTC_COEXIST pBtCoexist, bool bForceExec, u8 decBtPwrLvl
 598 )
 599 {
 600         BTC_PRINT(
 601                 BTC_MSG_ALGORITHM,
 602                 ALGO_TRACE_FW,
 603                 (
 604                         "[BTCoex], %s Dec BT power level = %d\n",
 605                         (bForceExec ? "force to" : ""),
 606                         decBtPwrLvl
 607                 )
 608         );
 609         pCoexDm->curBtDecPwrLvl = decBtPwrLvl;
 610
 611         if (!bForceExec) {
 612                 BTC_PRINT(
 613                         BTC_MSG_ALGORITHM,
 614                         ALGO_TRACE_FW_DETAIL,
 615                         (
 616                                 "[BTCoex], preBtDecPwrLvl =%d, curBtDecPwrLvl =%d\n",
 617                                 pCoexDm->preBtDecPwrLvl,
 618                                 pCoexDm->curBtDecPwrLvl
 619                         )
 620                 );
 621
 622                 if (pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl)
 623                         return;
 624         }
 625         halbtc8723b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl);
 626
 627         pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl;
 628 }
 629
 630 static void halbtc8723b2ant_FwDacSwingLvl(
 631         PBTC_COEXIST pBtCoexist, bool bForceExec, u8 fwDacSwingLvl
 632 )
 633 {
 634         BTC_PRINT(
 635                 BTC_MSG_ALGORITHM,
 636                 ALGO_TRACE_FW,
 637                 (
 638                         "[BTCoex], %s set FW Dac Swing level = %d\n",
 639                         (bForceExec ? "force to" : ""),
 640                         fwDacSwingLvl
 641                 )
 642         );
 643         pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
 644
 645         if (!bForceExec) {
 646                 BTC_PRINT(
 647                         BTC_MSG_ALGORITHM,
 648                         ALGO_TRACE_FW_DETAIL,
 649                         (
 650                                 "[BTCoex], preFwDacSwingLvl =%d, curFwDacSwingLvl =%d\n",
 651                                 pCoexDm->preFwDacSwingLvl,
 652                                 pCoexDm->curFwDacSwingLvl
 653                         )
 654                 );
 655
 656                 if (pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
 657                         return;
 658         }
 659
 660         halbtc8723b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
 661
 662         pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
 663 }
 664
 665 static void halbtc8723b2ant_SetSwRfRxLpfCorner(
 666         PBTC_COEXIST pBtCoexist,
 667         bool bRxRfShrinkOn
 668 )
 669 {
 670         if (bRxRfShrinkOn) {
 671                 /* Shrink RF Rx LPF corner */
 672                 BTC_PRINT(
 673                         BTC_MSG_ALGORITHM,
 674                         ALGO_TRACE_SW_EXEC,
 675                         ("[BTCoex], Shrink RF Rx LPF corner!!\n")
 676                 );
 677                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
 678         } else {
 679                 /* Resume RF Rx LPF corner */
 680                 /*  After initialized, we can use pCoexDm->btRf0x1eBackup */
 681                 if (pBtCoexist->bInitilized) {
 682                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
 683                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
 684                 }
 685         }
 686 }
 687
 688 static void halbtc8723b2ant_RfShrink(
 689         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bRxRfShrinkOn
 690 )
 691 {
 692         BTC_PRINT(
 693                 BTC_MSG_ALGORITHM,
 694                 ALGO_TRACE_SW,
 695                 (
 696                         "[BTCoex], %s turn Rx RF Shrink = %s\n",
 697                         (bForceExec ? "force to" : ""),
 698                         (bRxRfShrinkOn ? "ON" : "OFF")
 699                 )
 700         );
 701         pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
 702
 703         if (!bForceExec) {
 704                 BTC_PRINT(
 705                         BTC_MSG_ALGORITHM,
 706                         ALGO_TRACE_SW_DETAIL,
 707                         (
 708                                 "[BTCoex], bPreRfRxLpfShrink =%d, bCurRfRxLpfShrink =%d\n",
 709                                 pCoexDm->bPreRfRxLpfShrink,
 710                                 pCoexDm->bCurRfRxLpfShrink
 711                         )
 712                 );
 713
 714                 if (pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
 715                         return;
 716         }
 717         halbtc8723b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
 718
 719         pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
 720 }
 721
 722 static void halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(
 723         PBTC_COEXIST pBtCoexist, bool bLowPenaltyRa
 724 )
 725 {
 726         u8      H2C_Parameter[6] = {0};
 727
 728         H2C_Parameter[0] = 0x6; /*  opCode, 0x6 = Retry_Penalty */
 729
 730         if (bLowPenaltyRa) {
 731                 H2C_Parameter[1] |= BIT0;
 732                 H2C_Parameter[2] = 0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
 733                 H2C_Parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
 734                 H2C_Parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
 735                 H2C_Parameter[5] = 0xf9;        /* MCS5 or OFDM36 */
 736         }
 737
 738         BTC_PRINT(
 739                 BTC_MSG_ALGORITHM,
 740                 ALGO_TRACE_FW_EXEC,
 741                 (
 742                         "[BTCoex], set WiFi Low-Penalty Retry: %s",
 743                         (bLowPenaltyRa ? "ON!!" : "OFF!!")
 744                 )
 745         );
 746
 747         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
 748 }
 749
 750 static void halbtc8723b2ant_LowPenaltyRa(
 751         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bLowPenaltyRa
 752 )
 753 {
 754         /* return; */
 755         BTC_PRINT(
 756                 BTC_MSG_ALGORITHM,
 757                 ALGO_TRACE_SW,
 758                 (
 759                         "[BTCoex], %s turn LowPenaltyRA = %s\n",
 760                         (bForceExec ? "force to" : ""),
 761                         (bLowPenaltyRa ? "ON" : "OFF")
 762                 )
 763         );
 764         pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
 765
 766         if (!bForceExec) {
 767                 BTC_PRINT(
 768                         BTC_MSG_ALGORITHM,
 769                         ALGO_TRACE_SW_DETAIL,
 770                         (
 771                                 "[BTCoex], bPreLowPenaltyRa =%d, bCurLowPenaltyRa =%d\n",
 772                                 pCoexDm->bPreLowPenaltyRa,
 773                                 pCoexDm->bCurLowPenaltyRa
 774                         )
 775                 );
 776
 777                 if (pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
 778                         return;
 779         }
 780         halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
 781
 782         pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
 783 }
 784
 785 static void halbtc8723b2ant_SetDacSwingReg(PBTC_COEXIST pBtCoexist, u32 level)
 786 {
 787         u8 val = (u8)level;
 788
 789         BTC_PRINT(
 790                 BTC_MSG_ALGORITHM,
 791                 ALGO_TRACE_SW_EXEC,
 792                 ("[BTCoex], Write SwDacSwing = 0x%x\n", level)
 793         );
 794         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val);
 795 }
 796
 797 static void halbtc8723b2ant_SetSwFullTimeDacSwing(
 798         PBTC_COEXIST pBtCoexist, bool bSwDacSwingOn, u32 swDacSwingLvl
 799 )
 800 {
 801         if (bSwDacSwingOn)
 802                 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
 803         else
 804                 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18);
 805 }
 806
 807
 808 static void halbtc8723b2ant_DacSwing(
 809         PBTC_COEXIST pBtCoexist,
 810         bool bForceExec,
 811         bool bDacSwingOn,
 812         u32 dacSwingLvl
 813 )
 814 {
 815         BTC_PRINT(
 816                 BTC_MSG_ALGORITHM,
 817                 ALGO_TRACE_SW,
 818                 (
 819                         "[BTCoex], %s turn DacSwing =%s, dacSwingLvl = 0x%x\n",
 820                         (bForceExec ? "force to" : ""),
 821                         (bDacSwingOn ? "ON" : "OFF"),
 822                         dacSwingLvl
 823                 )
 824         );
 825         pCoexDm->bCurDacSwingOn = bDacSwingOn;
 826         pCoexDm->curDacSwingLvl = dacSwingLvl;
 827
 828         if (!bForceExec) {
 829                 BTC_PRINT(
 830                         BTC_MSG_ALGORITHM,
 831                         ALGO_TRACE_SW_DETAIL,
 832                         (
 833                                 "[BTCoex], bPreDacSwingOn =%d, preDacSwingLvl = 0x%x, bCurDacSwingOn =%d, curDacSwingLvl = 0x%x\n",
 834                                 pCoexDm->bPreDacSwingOn,
 835                                 pCoexDm->preDacSwingLvl,
 836                                 pCoexDm->bCurDacSwingOn,
 837                                 pCoexDm->curDacSwingLvl
 838                         )
 839                 );
 840
 841                 if ((pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
 842                         (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl))
 843                         return;
 844         }
 845         mdelay(30);
 846         halbtc8723b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
 847
 848         pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
 849         pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
 850 }
 851
 852 static void halbtc8723b2ant_SetAgcTable(
 853         PBTC_COEXIST pBtCoexist, bool bAgcTableEn
 854 )
 855 {
 856         u8 rssiAdjustVal = 0;
 857
 858         /* BB AGC Gain Table */
 859         if (bAgcTableEn) {
 860                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table On!\n"));
 861                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001);
 862                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001);
 863                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001);
 864                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001);
 865                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001);
 866                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001);
 867                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001);
 868         } else {
 869                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table Off!\n"));
 870                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001);
 871                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001);
 872                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001);
 873                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001);
 874                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001);
 875                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001);
 876                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
 877         }
 878
 879
 880         /* RF Gain */
 881         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
 882         if (bAgcTableEn) {
 883                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
 884                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff);
 885                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe);
 886         } else {
 887                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
 888                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3);
 889                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6);
 890         }
 891         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
 892
 893         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
 894         if (bAgcTableEn) {
 895                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
 896                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff);
 897                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe);
 898         } else {
 899                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
 900                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3);
 901                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6);
 902         }
 903         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
 904
 905         /*  set rssiAdjustVal for wifi module. */
 906         if (bAgcTableEn)
 907                 rssiAdjustVal = 8;
 908
 909         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
 910 }
 911
 912 static void halbtc8723b2ant_AgcTable(
 913         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bAgcTableEn
 914 )
 915 {
 916         BTC_PRINT(
 917                 BTC_MSG_ALGORITHM,
 918                 ALGO_TRACE_SW,
 919                 (
 920                         "[BTCoex], %s %s Agc Table\n",
 921                         (bForceExec ? "force to" : ""),
 922                         (bAgcTableEn ? "Enable" : "Disable")
 923                 )
 924         );
 925         pCoexDm->bCurAgcTableEn = bAgcTableEn;
 926
 927         if (!bForceExec) {
 928                 BTC_PRINT(
 929                         BTC_MSG_ALGORITHM,
 930                         ALGO_TRACE_SW_DETAIL,
 931                         (
 932                                 "[BTCoex], bPreAgcTableEn =%d, bCurAgcTableEn =%d\n",
 933                                 pCoexDm->bPreAgcTableEn,
 934                                 pCoexDm->bCurAgcTableEn
 935                         )
 936                 );
 937
 938                 if (pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
 939                         return;
 940         }
 941         halbtc8723b2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
 942
 943         pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
 944 }
 945
 946 static void halbtc8723b2ant_SetCoexTable(
 947         PBTC_COEXIST pBtCoexist,
 948         u32 val0x6c0,
 949         u32 val0x6c4,
 950         u32 val0x6c8,
 951         u8 val0x6cc
 952 )
 953 {
 954         BTC_PRINT(
 955                 BTC_MSG_ALGORITHM,
 956                 ALGO_TRACE_SW_EXEC,
 957                 ("[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0)
 958         );
 959         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
 960
 961         BTC_PRINT(
 962                 BTC_MSG_ALGORITHM,
 963                 ALGO_TRACE_SW_EXEC,
 964                 ("[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4)
 965         );
 966         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
 967
 968         BTC_PRINT(
 969                 BTC_MSG_ALGORITHM,
 970                 ALGO_TRACE_SW_EXEC,
 971                 ("[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8)
 972         );
 973         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
 974
 975         BTC_PRINT(
 976                 BTC_MSG_ALGORITHM,
 977                 ALGO_TRACE_SW_EXEC,
 978                 ("[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc)
 979         );
 980         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
 981 }
 982
 983 static void halbtc8723b2ant_CoexTable(
 984         PBTC_COEXIST pBtCoexist,
 985         bool bForceExec,
 986         u32 val0x6c0,
 987         u32 val0x6c4,
 988         u32 val0x6c8,
 989         u8 val0x6cc
 990 )
 991 {
 992         BTC_PRINT(
 993                 BTC_MSG_ALGORITHM,
 994                 ALGO_TRACE_SW,
 995                 (
 996                         "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, 0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
 997                         (bForceExec ? "force to" : ""),
 998                         val0x6c0,
 999                         val0x6c4,
1000                         val0x6c8,
1001                         val0x6cc
1002                 )
1003         );
1004         pCoexDm->curVal0x6c0 = val0x6c0;
1005         pCoexDm->curVal0x6c4 = val0x6c4;
1006         pCoexDm->curVal0x6c8 = val0x6c8;
1007         pCoexDm->curVal0x6cc = val0x6cc;
1008
1009         if (!bForceExec) {
1010                 BTC_PRINT(
1011                         BTC_MSG_ALGORITHM,
1012                         ALGO_TRACE_SW_DETAIL,
1013                         (
1014                                 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n",
1015                                 pCoexDm->preVal0x6c0,
1016                                 pCoexDm->preVal0x6c4,
1017                                 pCoexDm->preVal0x6c8,
1018                                 pCoexDm->preVal0x6cc
1019                         )
1020                 );
1021                 BTC_PRINT(
1022                         BTC_MSG_ALGORITHM,
1023                         ALGO_TRACE_SW_DETAIL,
1024                         (
1025                                 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x, curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n",
1026                                 pCoexDm->curVal0x6c0,
1027                                 pCoexDm->curVal0x6c4,
1028                                 pCoexDm->curVal0x6c8,
1029                                 pCoexDm->curVal0x6cc
1030                         )
1031                 );
1032
1033                 if (
1034                         (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
1035                         (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
1036                         (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
1037                         (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc)
1038                 )
1039                         return;
1040         }
1041         halbtc8723b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
1042
1043         pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
1044         pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
1045         pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
1046         pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
1047 }
1048
1049 static void halbtc8723b2ant_CoexTableWithType(
1050         PBTC_COEXIST pBtCoexist, bool bForceExec, u8 type
1051 )
1052 {
1053         switch (type) {
1054         case 0:
1055                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffff, 0x3);
1056                 break;
1057         case 1:
1058                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffff, 0x3);
1059                 break;
1060         case 2:
1061                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
1062                 break;
1063         case 3:
1064                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffff, 0x3);
1065                 break;
1066         case 4:
1067                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffff, 0x3);
1068                 break;
1069         case 5:
1070                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffff, 0x3);
1071                 break;
1072         case 6:
1073                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
1074                 break;
1075         case 7:
1076                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0xfafafafa, 0xffff, 0x3);
1077                 break;
1078         case 8:
1079                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
1080                 break;
1081         case 9:
1082                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3);
1083                 break;
1084         case 10:
1085                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3);
1086                 break;
1087         case 11:
1088                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3);
1089                 break;
1090         case 12:
1091                 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5f5f5f5f, 0xffff, 0x3);
1092                 break;
1093         default:
1094                 break;
1095         }
1096 }
1097
1098 static void halbtc8723b2ant_SetFwIgnoreWlanAct(
1099         PBTC_COEXIST pBtCoexist, bool bEnable
1100 )
1101 {
1102         u8      H2C_Parameter[1] = {0};
1103
1104         if (bEnable)
1105                 H2C_Parameter[0] |= BIT0;               /*  function enable */
1106
1107         BTC_PRINT(
1108                 BTC_MSG_ALGORITHM,
1109                 ALGO_TRACE_FW_EXEC,
1110                 (
1111                         "[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
1112                         H2C_Parameter[0]
1113                 )
1114         );
1115
1116         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
1117 }
1118
1119 static void halbtc8723b2ant_IgnoreWlanAct(
1120         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bEnable
1121 )
1122 {
1123         BTC_PRINT(
1124                 BTC_MSG_ALGORITHM,
1125                 ALGO_TRACE_FW,
1126                 (
1127                         "[BTCoex], %s turn Ignore WlanAct %s\n",
1128                         (bForceExec ? "force to" : ""),
1129                         (bEnable ? "ON" : "OFF")
1130                 )
1131         );
1132
1133         pCoexDm->bCurIgnoreWlanAct = bEnable;
1134
1135         if (!bForceExec) {
1136                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n",
1137                         pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct));
1138
1139                 if (pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
1140                         return;
1141         }
1142         halbtc8723b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
1143
1144         pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
1145 }
1146
1147 static void halbtc8723b2ant_SetFwPstdma(
1148         PBTC_COEXIST pBtCoexist,
1149         u8 byte1,
1150         u8 byte2,
1151         u8 byte3,
1152         u8 byte4,
1153         u8 byte5
1154 )
1155 {
1156         u8      H2C_Parameter[5] = {0};
1157
1158         H2C_Parameter[0] = byte1;
1159         H2C_Parameter[1] = byte2;
1160         H2C_Parameter[2] = byte3;
1161         H2C_Parameter[3] = byte4;
1162         H2C_Parameter[4] = byte5;
1163
1164         pCoexDm->psTdmaPara[0] = byte1;
1165         pCoexDm->psTdmaPara[1] = byte2;
1166         pCoexDm->psTdmaPara[2] = byte3;
1167         pCoexDm->psTdmaPara[3] = byte4;
1168         pCoexDm->psTdmaPara[4] = byte5;
1169
1170         BTC_PRINT(
1171                 BTC_MSG_ALGORITHM,
1172                 ALGO_TRACE_FW_EXEC,
1173                 (
1174                         "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
1175                         H2C_Parameter[0],
1176                         H2C_Parameter[1]<<24|
1177                         H2C_Parameter[2]<<16|
1178                         H2C_Parameter[3]<<8|
1179                         H2C_Parameter[4]
1180                 )
1181         );
1182
1183         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
1184 }
1185
1186 static void halbtc8723b2ant_SwMechanism1(
1187         PBTC_COEXIST pBtCoexist,
1188         bool bShrinkRxLPF,
1189         bool bLowPenaltyRA,
1190         bool bLimitedDIG,
1191         bool bBTLNAConstrain
1192 )
1193 {
1194         halbtc8723b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
1195         halbtc8723b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
1196 }
1197
1198 static void halbtc8723b2ant_SwMechanism2(
1199         PBTC_COEXIST pBtCoexist,
1200         bool bAGCTableShift,
1201         bool bADCBackOff,
1202         bool bSWDACSwing,
1203         u32 dacSwingLvl
1204 )
1205 {
1206         halbtc8723b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
1207         halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
1208 }
1209
1210 static void halbtc8723b2ant_SetAntPath(
1211         PBTC_COEXIST pBtCoexist, u8 antPosType, bool bInitHwCfg, bool bWifiOff
1212 )
1213 {
1214         PBTC_BOARD_INFO pBoardInfo = &pBtCoexist->boardInfo;
1215         u32 fwVer = 0, u4Tmp = 0;
1216         bool bPgExtSwitch = false;
1217         bool bUseExtSwitch = false;
1218         u8      H2C_Parameter[2] = {0};
1219
1220         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch);
1221         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);        /*  [31:16]=fw ver, [15:0]=fw sub ver */
1222
1223         if ((fwVer > 0 && fwVer < 0xc0000) || bPgExtSwitch)
1224                 bUseExtSwitch = true;
1225
1226         if (bInitHwCfg) {
1227                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1);
1228                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff);
1229                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3);
1230                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77);
1231                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
1232
1233                 if (fwVer >= 0x180000) {
1234                         /* Use H2C to set GNT_BT to LOW */
1235                         H2C_Parameter[0] = 0;
1236                         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
1237                 } else {
1238                         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0);
1239                 }
1240
1241                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
1242
1243                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); /* WiFi TRx Mask off */
1244                 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); /* BT TRx Mask off */
1245
1246                 if (pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) {
1247                         /* tell firmware "no antenna inverse" */
1248                         H2C_Parameter[0] = 0;
1249                 } else {
1250                         /* tell firmware "antenna inverse" */
1251                         H2C_Parameter[0] = 1;
1252                 }
1253
1254                 if (bUseExtSwitch) {
1255                         /* ext switch type */
1256                         H2C_Parameter[1] = 1;
1257                 } else {
1258                         /* int switch type */
1259                         H2C_Parameter[1] = 0;
1260                 }
1261                 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
1262         }
1263
1264         /*  ext switch setting */
1265         if (bUseExtSwitch) {
1266                 if (bInitHwCfg) {
1267                         /*  0x4c[23]= 0, 0x4c[24]= 1  Antenna control by WL/BT */
1268                         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1269                         u4Tmp &= ~BIT23;
1270                         u4Tmp |= BIT24;
1271                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1272                 }
1273
1274                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); /*  fixed internal switch S1->WiFi, S0->BT */
1275                 switch (antPosType) {
1276                 case BTC_ANT_WIFI_AT_MAIN:
1277                         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); /*  ext switch main at wifi */
1278                         break;
1279                 case BTC_ANT_WIFI_AT_AUX:
1280                         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); /*  ext switch aux at wifi */
1281                         break;
1282                 }
1283         } else { /*  internal switch */
1284                 if (bInitHwCfg) {
1285                         /*  0x4c[23]= 0, 0x4c[24]= 1  Antenna control by WL/BT */
1286                         u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
1287                         u4Tmp |= BIT23;
1288                         u4Tmp &= ~BIT24;
1289                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
1290                 }
1291
1292                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); /* fixed external switch S1->Main, S0->Aux */
1293                 switch (antPosType) {
1294                 case BTC_ANT_WIFI_AT_MAIN:
1295                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); /*  fixed internal switch S1->WiFi, S0->BT */
1296                         break;
1297                 case BTC_ANT_WIFI_AT_AUX:
1298                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); /*  fixed internal switch S0->WiFi, S1->BT */
1299                         break;
1300                 }
1301         }
1302 }
1303
1304 static void halbtc8723b2ant_PsTdma(
1305         PBTC_COEXIST pBtCoexist, bool bForceExec, bool bTurnOn, u8 type
1306 )
1307 {
1308         BTC_PRINT(
1309                 BTC_MSG_ALGORITHM,
1310                 ALGO_TRACE_FW,
1311                 (
1312                         "[BTCoex], %s turn %s PS TDMA, type =%d\n",
1313                         (bForceExec ? "force to" : ""),
1314                         (bTurnOn ? "ON" : "OFF"),
1315                         type
1316                 )
1317         );
1318         pCoexDm->bCurPsTdmaOn = bTurnOn;
1319         pCoexDm->curPsTdma = type;
1320
1321         if (!bForceExec) {
1322                 BTC_PRINT(
1323                         BTC_MSG_ALGORITHM,
1324                         ALGO_TRACE_FW_DETAIL,
1325                         (
1326                                 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1327                                 pCoexDm->bPrePsTdmaOn,
1328                                 pCoexDm->bCurPsTdmaOn
1329                         )
1330                 );
1331                 BTC_PRINT(
1332                         BTC_MSG_ALGORITHM,
1333                         ALGO_TRACE_FW_DETAIL,
1334                         (
1335                                 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1336                                 pCoexDm->prePsTdma, pCoexDm->curPsTdma
1337                         )
1338                 );
1339
1340                 if (
1341                         (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
1342                         (pCoexDm->prePsTdma == pCoexDm->curPsTdma)
1343                 )
1344                         return;
1345         }
1346
1347         if (bTurnOn) {
1348                 switch (type) {
1349                 case 1:
1350                 default:
1351                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1352                         break;
1353                 case 2:
1354                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1355                         break;
1356                 case 3:
1357                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
1358                         break;
1359                 case 4:
1360                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90);
1361                         break;
1362                 case 5:
1363                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1364                         break;
1365                 case 6:
1366                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1367                         break;
1368                 case 7:
1369                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
1370                         break;
1371                 case 8:
1372                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90);
1373                         break;
1374                 case 9:
1375                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1376                         break;
1377                 case 10:
1378                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
1379                         break;
1380                 case 11:
1381                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90);
1382                         break;
1383                 case 12:
1384                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1385                         break;
1386                 case 13:
1387                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
1388                         break;
1389                 case 14:
1390                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
1391                         break;
1392                 case 15:
1393                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90);
1394                         break;
1395                 case 16:
1396                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90);
1397                         break;
1398                 case 17:
1399                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90);
1400                         break;
1401                 case 18:
1402                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
1403                         break;
1404                 case 19:
1405                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
1406                         break;
1407                 case 20:
1408                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
1409                         break;
1410                 case 21:
1411                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
1412                         break;
1413                 case 71:
1414                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
1415                         break;
1416                 }
1417         } else {
1418                 /*  disable PS tdma */
1419                 switch (type) {
1420                 case 0:
1421                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1422                         break;
1423                 case 1:
1424                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0);
1425                         break;
1426                 default:
1427                         halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1428                         break;
1429                 }
1430         }
1431
1432         /*  update pre state */
1433         pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
1434         pCoexDm->prePsTdma = pCoexDm->curPsTdma;
1435 }
1436
1437 static void halbtc8723b2ant_CoexAllOff(PBTC_COEXIST pBtCoexist)
1438 {
1439         /*  fw all off */
1440         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1441         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1442         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1443
1444         /*  sw all off */
1445         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1446         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1447
1448         /*  hw all off */
1449         /* pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
1450         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1451 }
1452
1453 static void halbtc8723b2ant_InitCoexDm(PBTC_COEXIST pBtCoexist)
1454 {
1455         /*  force to reset coex mechanism */
1456
1457         halbtc8723b2ant_PsTdma(pBtCoexist, FORCE_EXEC, false, 1);
1458         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1459         halbtc8723b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0);
1460
1461         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1462         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1463 }
1464
1465 static void halbtc8723b2ant_ActionBtInquiry(PBTC_COEXIST pBtCoexist)
1466 {
1467         bool bWifiConnected = false;
1468         bool bLowPwrDisable = true;
1469
1470         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1471         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1472
1473         if (bWifiConnected) {
1474                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1475                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 3);
1476         } else {
1477                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1478                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1479         }
1480
1481         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1482         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1483
1484         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1485         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1486
1487         pCoexDm->bNeedRecover0x948 = true;
1488         pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
1489
1490         halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, false, false);
1491 }
1492
1493 static bool halbtc8723b2ant_IsCommonAction(PBTC_COEXIST pBtCoexist)
1494 {
1495         u8 btRssiState = BTC_RSSI_STATE_HIGH;
1496         bool bCommon = false, bWifiConnected = false, bWifiBusy = false;
1497         bool bBtHsOn = false, bLowPwrDisable = false;
1498
1499         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1500         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1501         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1502
1503         if (!bWifiConnected) {
1504                 bLowPwrDisable = false;
1505                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1506                 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1507
1508                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non-connected idle!!\n"));
1509
1510                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1511                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1512                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1513                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1514                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1515
1516                 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1517                 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1518
1519                 bCommon = true;
1520         } else {
1521                 if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) {
1522                         bLowPwrDisable = false;
1523                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1524                         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1525
1526                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT non connected-idle!!\n"));
1527
1528                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1529                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1530                         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1531                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1532                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1533
1534                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1535                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1536
1537                         bCommon = true;
1538                 } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) {
1539                         bLowPwrDisable = true;
1540                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1541
1542                         if (bBtHsOn)
1543                                 return false;
1544
1545                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT connected-idle!!\n"));
1546                         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1547
1548                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1549                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1550                         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1551                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1552                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1553
1554                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1555                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1556
1557                         bCommon = true;
1558                 } else {
1559                         bLowPwrDisable = true;
1560                         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1561
1562                         if (bWifiBusy) {
1563                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n"));
1564                                 bCommon = false;
1565                         } else {
1566                                 if (bBtHsOn)
1567                                         return false;
1568
1569                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n"));
1570                                 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1571                                 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1572
1573                                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1574                                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1575                                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 21);
1576                                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1577
1578                                 if (BTC_RSSI_HIGH(btRssiState))
1579                                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1580                                 else
1581                                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1582
1583                                 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1584                                 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1585                                 bCommon = true;
1586                         }
1587                 }
1588         }
1589
1590         return bCommon;
1591 }
1592
1593 static void halbtc8723b2ant_TdmaDurationAdjust(
1594         PBTC_COEXIST pBtCoexist, bool bScoHid, bool bTxPause, u8 maxInterval
1595 )
1596 {
1597         static s32 up, dn, m, n, WaitCount;
1598         s32 result;   /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
1599         u8 retryCount = 0;
1600
1601         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], TdmaDurationAdjust()\n"));
1602
1603         if (!pCoexDm->bAutoTdmaAdjust) {
1604                 pCoexDm->bAutoTdmaAdjust = true;
1605                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], first run TdmaDurationAdjust()!!\n"));
1606                 {
1607                         if (bScoHid) {
1608                                 if (bTxPause) {
1609                                         if (maxInterval == 1)
1610                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1611                                         else if (maxInterval == 2)
1612                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1613                                         else
1614                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1615                                 } else {
1616                                         if (maxInterval == 1)
1617                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1618                                         else if (maxInterval == 2)
1619                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1620                                         else
1621                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1622                                 }
1623                         } else {
1624                                 if (bTxPause) {
1625                                         if (maxInterval == 1)
1626                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1627                                         else if (maxInterval == 2)
1628                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1629                                         else
1630                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1631                                 } else {
1632                                         if (maxInterval == 1)
1633                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1634                                         else if (maxInterval == 2)
1635                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1636                                         else
1637                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1638                                 }
1639                         }
1640                 }
1641                 /*  */
1642                 up = 0;
1643                 dn = 0;
1644                 m = 1;
1645                 n = 3;
1646                 result = 0;
1647                 WaitCount = 0;
1648         } else {
1649                 /* acquire the BT TRx retry count from BT_Info byte2 */
1650                 retryCount = pCoexSta->btRetryCnt;
1651                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], retryCount = %d\n", retryCount));
1652                 BTC_PRINT(
1653                         BTC_MSG_ALGORITHM,
1654                         ALGO_TRACE_FW_DETAIL,
1655                         (
1656                                 "[BTCoex], up =%d, dn =%d, m =%d, n =%d, WaitCount =%d\n",
1657                                 up, dn, m, n, WaitCount
1658                         )
1659                 );
1660                 result = 0;
1661                 WaitCount++;
1662
1663                 if (retryCount == 0) { /*  no retry in the last 2-second duration */
1664                         up++;
1665                         dn--;
1666
1667                         if (dn <= 0)
1668                                 dn = 0;
1669
1670                         if (up >= n) { /*  if 連續 n 個2秒 retry count為0, 則調寬WiFi duration */
1671                                 WaitCount = 0;
1672                                 n = 3;
1673                                 up = 0;
1674                                 dn = 0;
1675                                 result = 1;
1676                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Increase wifi duration!!\n"));
1677                         }
1678                 } else if (retryCount <= 3) { /*  <=3 retry in the last 2-second duration */
1679                         up--;
1680                         dn++;
1681
1682                         if (up <= 0)
1683                                 up = 0;
1684
1685                         if (dn == 2) { /*  if 連續 2 個2秒 retry count< 3, 則調窄WiFi duration */
1686                                 if (WaitCount <= 2)
1687                                         m++; /*  避免一直在兩個level中來回 */
1688                                 else
1689                                         m = 1;
1690
1691                                 if (m >= 20) /* m 最大值 = 20 ' 最大120秒 recheck是否調整 WiFi duration. */
1692                                         m = 20;
1693
1694                                 n = 3*m;
1695                                 up = 0;
1696                                 dn = 0;
1697                                 WaitCount = 0;
1698                                 result = -1;
1699                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
1700                         }
1701                 } else { /* retry count > 3, 只要1次 retry count > 3, 則調窄WiFi duration */
1702                         if (WaitCount == 1)
1703                                 m++; /*  避免一直在兩個level中來回 */
1704                         else
1705                                 m = 1;
1706
1707                         if (m >= 20) /* m 最大值 = 20 ' 最大120秒 recheck是否調整 WiFi duration. */
1708                                 m = 20;
1709
1710                         n = 3*m;
1711                         up = 0;
1712                         dn = 0;
1713                         WaitCount = 0;
1714                         result = -1;
1715                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n"));
1716                 }
1717
1718                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], max Interval = %d\n", maxInterval));
1719                 if (maxInterval == 1) {
1720                         if (bTxPause) {
1721                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
1722
1723                                 if (pCoexDm->curPsTdma == 71)
1724                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1725                                 else if (pCoexDm->curPsTdma == 1)
1726                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1727                                 else if (pCoexDm->curPsTdma == 2)
1728                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1729                                 else if (pCoexDm->curPsTdma == 3)
1730                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1731                                 else if (pCoexDm->curPsTdma == 4)
1732                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1733
1734                                 if (pCoexDm->curPsTdma == 9)
1735                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1736                                 else if (pCoexDm->curPsTdma == 10)
1737                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1738                                 else if (pCoexDm->curPsTdma == 11)
1739                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1740                                 else if (pCoexDm->curPsTdma == 12)
1741                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1742
1743                                 if (result == -1) {
1744                                         if (pCoexDm->curPsTdma == 5)
1745                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1746                                         else if (pCoexDm->curPsTdma == 6)
1747                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1748                                         else if (pCoexDm->curPsTdma == 7)
1749                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1750                                         else if (pCoexDm->curPsTdma == 13)
1751                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1752                                         else if (pCoexDm->curPsTdma == 14)
1753                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1754                                         else if (pCoexDm->curPsTdma == 15)
1755                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1756                                 } else if (result == 1) {
1757                                         if (pCoexDm->curPsTdma == 8)
1758                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1759                                         else if (pCoexDm->curPsTdma == 7)
1760                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1761                                         else if (pCoexDm->curPsTdma == 6)
1762                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1763                                         else if (pCoexDm->curPsTdma == 16)
1764                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1765                                         else if (pCoexDm->curPsTdma == 15)
1766                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1767                                         else if (pCoexDm->curPsTdma == 14)
1768                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1769                                 }
1770                         } else {
1771                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
1772                                 if (pCoexDm->curPsTdma == 5)
1773                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(71);
1774                                 else if (pCoexDm->curPsTdma == 6)
1775                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1776                                 else if (pCoexDm->curPsTdma == 7)
1777                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1778                                 else if (pCoexDm->curPsTdma == 8)
1779                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1780
1781                                 if (pCoexDm->curPsTdma == 13)
1782                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1783                                 else if (pCoexDm->curPsTdma == 14)
1784                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1785                                 else if (pCoexDm->curPsTdma == 15)
1786                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1787                                 else if (pCoexDm->curPsTdma == 16)
1788                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1789
1790                                 if (result == -1) {
1791                                         if (pCoexDm->curPsTdma == 71)
1792                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1793                                         else if (pCoexDm->curPsTdma == 1)
1794                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1795                                         else if (pCoexDm->curPsTdma == 2)
1796                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1797                                         else if (pCoexDm->curPsTdma == 3)
1798                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1799                                         else if (pCoexDm->curPsTdma == 9)
1800                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1801                                         else if (pCoexDm->curPsTdma == 10)
1802                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1803                                         else if (pCoexDm->curPsTdma == 11)
1804                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1805                                 } else if (result == 1) {
1806                                         if (pCoexDm->curPsTdma == 4)
1807                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1808                                         else if (pCoexDm->curPsTdma == 3)
1809                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1810                                         else if (pCoexDm->curPsTdma == 2)
1811                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1812                                         else if (pCoexDm->curPsTdma == 1)
1813                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(71);
1814                                         else if (pCoexDm->curPsTdma == 12)
1815                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1816                                         else if (pCoexDm->curPsTdma == 11)
1817                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1818                                         else if (pCoexDm->curPsTdma == 10)
1819                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1820                                 }
1821                         }
1822                 } else if (maxInterval == 2) {
1823                         if (bTxPause) {
1824                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
1825                                 if (pCoexDm->curPsTdma == 1)
1826                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1827                                 else if (pCoexDm->curPsTdma == 2)
1828                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1829                                 else if (pCoexDm->curPsTdma == 3)
1830                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1831                                 else if (pCoexDm->curPsTdma == 4)
1832                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1833
1834                                 if (pCoexDm->curPsTdma == 9)
1835                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1836                                 else if (pCoexDm->curPsTdma == 10)
1837                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1838                                 else if (pCoexDm->curPsTdma == 11)
1839                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1840                                 else if (pCoexDm->curPsTdma == 12)
1841                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1842
1843                                 if (result == -1) {
1844                                         if (pCoexDm->curPsTdma == 5)
1845                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1846                                         else if (pCoexDm->curPsTdma == 6)
1847                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1848                                         else if (pCoexDm->curPsTdma == 7)
1849                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1850                                         else if (pCoexDm->curPsTdma == 13)
1851                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1852                                         else if (pCoexDm->curPsTdma == 14)
1853                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1854                                         else if (pCoexDm->curPsTdma == 15)
1855                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1856                                 } else if (result == 1) {
1857                                         if (pCoexDm->curPsTdma == 8)
1858                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1859                                         else if (pCoexDm->curPsTdma == 7)
1860                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1861                                         else if (pCoexDm->curPsTdma == 6)
1862                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1863                                         else if (pCoexDm->curPsTdma == 16)
1864                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1865                                         else if (pCoexDm->curPsTdma == 15)
1866                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1867                                         else if (pCoexDm->curPsTdma == 14)
1868                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1869                                 }
1870                         } else {
1871                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
1872                                 if (pCoexDm->curPsTdma == 5)
1873                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1874                                 else if (pCoexDm->curPsTdma == 6)
1875                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1876                                 else if (pCoexDm->curPsTdma == 7)
1877                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1878                                 else if (pCoexDm->curPsTdma == 8)
1879                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1880
1881                                 if (pCoexDm->curPsTdma == 13)
1882                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1883                                 else if (pCoexDm->curPsTdma == 14)
1884                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1885                                 else if (pCoexDm->curPsTdma == 15)
1886                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1887                                 else if (pCoexDm->curPsTdma == 16)
1888                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1889
1890                                 if (result == -1) {
1891                                         if (pCoexDm->curPsTdma == 1)
1892                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1893                                         else if (pCoexDm->curPsTdma == 2)
1894                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1895                                         else if (pCoexDm->curPsTdma == 3)
1896                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1897                                         else if (pCoexDm->curPsTdma == 9)
1898                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1899                                         else if (pCoexDm->curPsTdma == 10)
1900                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1901                                         else if (pCoexDm->curPsTdma == 11)
1902                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1903                                 } else if (result == 1) {
1904                                         if (pCoexDm->curPsTdma == 4)
1905                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1906                                         else if (pCoexDm->curPsTdma == 3)
1907                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1908                                         else if (pCoexDm->curPsTdma == 2)
1909                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1910                                         else if (pCoexDm->curPsTdma == 12)
1911                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1912                                         else if (pCoexDm->curPsTdma == 11)
1913                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1914                                         else if (pCoexDm->curPsTdma == 10)
1915                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1916                                 }
1917                         }
1918                 } else if (maxInterval == 3) {
1919                         if (bTxPause) {
1920                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
1921                                 if (pCoexDm->curPsTdma == 1)
1922                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1923                                 else if (pCoexDm->curPsTdma == 2)
1924                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1925                                 else if (pCoexDm->curPsTdma == 3)
1926                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1927                                 else if (pCoexDm->curPsTdma == 4)
1928                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1929
1930                                 if (pCoexDm->curPsTdma == 9)
1931                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1932                                 else if (pCoexDm->curPsTdma == 10)
1933                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1934                                 else if (pCoexDm->curPsTdma == 11)
1935                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1936                                 else if (pCoexDm->curPsTdma == 12)
1937                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1938
1939                                 if (result == -1) {
1940                                         if (pCoexDm->curPsTdma == 5)
1941                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1942                                         else if (pCoexDm->curPsTdma == 6)
1943                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1944                                         else if (pCoexDm->curPsTdma == 7)
1945                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1946                                         else if (pCoexDm->curPsTdma == 13)
1947                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1948                                         else if (pCoexDm->curPsTdma == 14)
1949                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1950                                         else if (pCoexDm->curPsTdma == 15)
1951                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1952                                 } else if (result == 1) {
1953                                         if (pCoexDm->curPsTdma == 8)
1954                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1955                                         else if (pCoexDm->curPsTdma == 7)
1956                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1957                                         else if (pCoexDm->curPsTdma == 6)
1958                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1959                                         else if (pCoexDm->curPsTdma == 16)
1960                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1961                                         else if (pCoexDm->curPsTdma == 15)
1962                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1963                                         else if (pCoexDm->curPsTdma == 14)
1964                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1965                                 }
1966                         } else {
1967                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
1968                                 if (pCoexDm->curPsTdma == 5)
1969                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1970                                 else if (pCoexDm->curPsTdma == 6)
1971                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1972                                 else if (pCoexDm->curPsTdma == 7)
1973                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1974                                 else if (pCoexDm->curPsTdma == 8)
1975                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1976
1977                                 if (pCoexDm->curPsTdma == 13)
1978                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1979                                 else if (pCoexDm->curPsTdma == 14)
1980                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1981                                 else if (pCoexDm->curPsTdma == 15)
1982                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1983                                 else if (pCoexDm->curPsTdma == 16)
1984                                         HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1985
1986                                 if (result == -1) {
1987                                         if (pCoexDm->curPsTdma == 1)
1988                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1989                                         else if (pCoexDm->curPsTdma == 2)
1990                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1991                                         else if (pCoexDm->curPsTdma == 3)
1992                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1993                                         else if (pCoexDm->curPsTdma == 9)
1994                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1995                                         else if (pCoexDm->curPsTdma == 10)
1996                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1997                                         else if (pCoexDm->curPsTdma == 11)
1998                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1999                                 } else if (result == 1) {
2000                                         if (pCoexDm->curPsTdma == 4)
2001                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
2002                                         else if (pCoexDm->curPsTdma == 3)
2003                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
2004                                         else if (pCoexDm->curPsTdma == 2)
2005                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
2006                                         else if (pCoexDm->curPsTdma == 12)
2007                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2008                                         else if (pCoexDm->curPsTdma == 11)
2009                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2010                                         else if (pCoexDm->curPsTdma == 10)
2011                                                 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
2012                                 }
2013                         }
2014                 }
2015         }
2016
2017         /*  if current PsTdma not match with the recorded one (when scan, dhcp...), */
2018         /*  then we have to adjust it back to the previous record one. */
2019         if (pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) {
2020                 bool bScan = false, bLink = false, bRoam = false;
2021                 BTC_PRINT(
2022                         BTC_MSG_ALGORITHM,
2023                         ALGO_TRACE_FW_DETAIL,
2024                         (
2025                                 "[BTCoex], PsTdma type mismatch!!!, curPsTdma =%d, recordPsTdma =%d\n",
2026                                 pCoexDm->curPsTdma,
2027                                 pCoexDm->psTdmaDuAdjType
2028                         )
2029                 );
2030
2031                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
2032                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
2033                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
2034
2035                 if (!bScan && !bLink && !bRoam)
2036                         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, pCoexDm->psTdmaDuAdjType);
2037                 else {
2038                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"));
2039                 }
2040         }
2041 }
2042
2043 /*  SCO only or SCO+PAN(HS) */
2044 static void halbtc8723b2ant_ActionSco(PBTC_COEXIST pBtCoexist)
2045 {
2046         u8 wifiRssiState, btRssiState;
2047         u32 wifiBw;
2048
2049         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2050         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2051
2052         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2053
2054         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2055
2056         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4);
2057
2058         if (BTC_RSSI_HIGH(btRssiState))
2059                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2060         else
2061                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2062
2063         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2064
2065         if (BTC_WIFI_BW_LEGACY == wifiBw) /* for SCO quality at 11b/g mode */
2066                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
2067         else  /* for SCO quality & wifi performance balance at 11n mode */
2068                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8);
2069
2070         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 0); /* for voice quality */
2071
2072         /*  sw mechanism */
2073         if (BTC_WIFI_BW_HT40 == wifiBw) {
2074                 if (
2075                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2076                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2077                 ) {
2078                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2079                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x4);
2080                 } else {
2081                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2082                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, true, 0x4);
2083                 }
2084         } else {
2085                 if (
2086                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2087                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2088                 ) {
2089                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2090                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x4);
2091                 } else {
2092                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2093                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, true, 0x4);
2094                 }
2095         }
2096 }
2097
2098
2099 static void halbtc8723b2ant_ActionHid(PBTC_COEXIST pBtCoexist)
2100 {
2101         u8 wifiRssiState, btRssiState;
2102         u32 wifiBw;
2103
2104         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2105         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2106
2107         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2108
2109         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2110
2111         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2112
2113         if (BTC_RSSI_HIGH(btRssiState))
2114                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2115         else
2116                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2117
2118         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2119
2120         if (BTC_WIFI_BW_LEGACY == wifiBw) /* for HID at 11b/g mode */
2121                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2122         else  /* for HID quality & wifi performance balance at 11n mode */
2123                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9);
2124
2125         if (
2126                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2127                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2128         )
2129                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9);
2130         else
2131                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 13);
2132
2133         /*  sw mechanism */
2134         if (BTC_WIFI_BW_HT40 == wifiBw) {
2135                 if (
2136                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2137                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2138                 ) {
2139                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2140                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2141                 } else {
2142                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2143                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2144                 }
2145         } else {
2146                 if (
2147                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2148                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2149                 ) {
2150                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2151                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2152                 } else {
2153                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2154                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2155                 }
2156         }
2157 }
2158
2159 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2160 static void halbtc8723b2ant_ActionA2dp(PBTC_COEXIST pBtCoexist)
2161 {
2162         u8 wifiRssiState, wifiRssiState1, btRssiState;
2163         u32 wifiBw;
2164         u8 apNum = 0;
2165
2166         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2167         wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0);
2168         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2169
2170         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2171
2172         /*  define the office environment */
2173         if (apNum >= 10 && BTC_RSSI_HIGH(wifiRssiState1)) {
2174                 /* DbgPrint(" AP#>10(%d)\n", apNum); */
2175                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2176                 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2177                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2178                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2179                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
2180                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
2181
2182                 /*  sw mechanism */
2183                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2184                 if (BTC_WIFI_BW_HT40 == wifiBw) {
2185                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2186                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x18);
2187                 } else {
2188                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2189                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x18);
2190                 }
2191                 return;
2192         }
2193
2194         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2195         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2196
2197         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2198
2199         if (BTC_RSSI_HIGH(btRssiState))
2200                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2201         else
2202                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2203
2204         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2205
2206         if (
2207                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2208                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2209         )
2210                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, false, 1);
2211         else
2212                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 1);
2213
2214         /*  sw mechanism */
2215         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2216         if (BTC_WIFI_BW_HT40 == wifiBw) {
2217                 if (
2218                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2219                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2220                 ) {
2221                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2222                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2223                 } else {
2224                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2225                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2226                 }
2227         } else {
2228                 if (
2229                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2230                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2231                 ) {
2232                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2233                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2234                 } else {
2235                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2236                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2237                 }
2238         }
2239 }
2240
2241 static void halbtc8723b2ant_ActionA2dpPanHs(PBTC_COEXIST pBtCoexist)
2242 {
2243         u8 wifiRssiState, btRssiState;
2244         u32 wifiBw;
2245
2246         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2247         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2248
2249         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2250
2251         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2252
2253         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2254
2255         if (BTC_RSSI_HIGH(btRssiState))
2256                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2257         else
2258                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2259
2260         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2261
2262         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 2);
2263
2264         /*  sw mechanism */
2265         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2266         if (BTC_WIFI_BW_HT40 == wifiBw) {
2267                 if (
2268                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2269                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2270                 ) {
2271                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2272                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2273                 } else {
2274                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2275                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2276                 }
2277         } else {
2278                 if (
2279                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2280                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2281                 ) {
2282                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2283                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2284                 } else {
2285                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2286                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2287                 }
2288         }
2289 }
2290
2291 static void halbtc8723b2ant_ActionPanEdr(PBTC_COEXIST pBtCoexist)
2292 {
2293         u8 wifiRssiState, btRssiState;
2294         u32 wifiBw;
2295
2296         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2297         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2298
2299         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2300
2301         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2302
2303         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2304
2305         if (BTC_RSSI_HIGH(btRssiState))
2306                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2307         else
2308                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2309
2310         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10);
2311
2312         if (
2313                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2314                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2315         )
2316                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 1);
2317         else
2318                 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 5);
2319
2320         /*  sw mechanism */
2321         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2322         if (BTC_WIFI_BW_HT40 == wifiBw) {
2323                 if (
2324                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2325                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2326                 ) {
2327                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2328                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2329                 } else {
2330                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2331                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2332                 }
2333         } else {
2334                 if (
2335                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2336                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2337                 ) {
2338                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2339                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2340                 } else {
2341                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2342                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2343                 }
2344         }
2345 }
2346
2347
2348 /* PAN(HS) only */
2349 static void halbtc8723b2ant_ActionPanHs(PBTC_COEXIST pBtCoexist)
2350 {
2351         u8 wifiRssiState, btRssiState;
2352         u32 wifiBw;
2353
2354         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2355         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2356
2357         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2358
2359         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2360
2361         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2362
2363         if (BTC_RSSI_HIGH(btRssiState))
2364                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2365         else
2366                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2367
2368         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2369
2370         halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
2371
2372         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2373         if (BTC_WIFI_BW_HT40 == wifiBw) {
2374                 if (
2375                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2376                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2377                 ) {
2378                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2379                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2380                 } else {
2381                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2382                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2383                 }
2384         } else {
2385                 if (
2386                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2387                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2388                 ) {
2389                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2390                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2391                 } else {
2392                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2393                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2394                 }
2395         }
2396 }
2397
2398 /* PAN(EDR)+A2DP */
2399 static void halbtc8723b2ant_ActionPanEdrA2dp(PBTC_COEXIST pBtCoexist)
2400 {
2401         u8 wifiRssiState, btRssiState;
2402         u32 wifiBw;
2403
2404         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2405         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2406
2407         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2408
2409         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2410
2411         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2412
2413         if (BTC_RSSI_HIGH(btRssiState))
2414                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2415         else
2416                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2417
2418         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2419
2420         if (
2421                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2422                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2423         ) {
2424                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12);
2425                 if (BTC_WIFI_BW_HT40 == wifiBw)
2426                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 3);
2427                 else
2428                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, false, 3);
2429         } else {
2430                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2431                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 3);
2432         }
2433
2434         /*  sw mechanism */
2435         if (BTC_WIFI_BW_HT40 == wifiBw) {
2436                 if (
2437                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2438                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2439                 ) {
2440                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2441                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2442                 } else {
2443                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
2444                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2445                 }
2446         } else {
2447                 if (
2448                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2449                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2450                 ) {
2451                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2452                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2453                 } else {
2454                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
2455                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2456                 }
2457         }
2458 }
2459
2460 static void halbtc8723b2ant_ActionPanEdrHid(PBTC_COEXIST pBtCoexist)
2461 {
2462         u8 wifiRssiState, btRssiState;
2463         u32 wifiBw;
2464
2465         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2466         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2467         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2468
2469         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2470
2471         if (BTC_RSSI_HIGH(btRssiState))
2472                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2473         else
2474                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2475
2476         if (
2477                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2478                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2479         ) {
2480                 if (BTC_WIFI_BW_HT40 == wifiBw) {
2481                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3);
2482                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
2483                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
2484                 } else {
2485                         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2486                         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2487                         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2488                 }
2489                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 2);
2490         } else {
2491                 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2492                 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
2493                 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2494                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2495         }
2496
2497         /*  sw mechanism */
2498         if (BTC_WIFI_BW_HT40 == wifiBw) {
2499                 if (
2500                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2501                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2502                 ) {
2503                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2504                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2505                 } else {
2506                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2507                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2508                 }
2509         } else {
2510                 if (
2511                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2512                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2513                 ) {
2514                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2515                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2516                 } else {
2517                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2518                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2519                 }
2520         }
2521 }
2522
2523 /*  HID+A2DP+PAN(EDR) */
2524 static void halbtc8723b2ant_ActionHidA2dpPanEdr(PBTC_COEXIST pBtCoexist)
2525 {
2526         u8 wifiRssiState, btRssiState;
2527         u32 wifiBw;
2528
2529         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2530         btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2531
2532         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2533
2534         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2535
2536         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2537
2538         if (BTC_RSSI_HIGH(btRssiState))
2539                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2540         else
2541                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2542
2543         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2544
2545         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2546
2547         if (
2548                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2549                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2550         ) {
2551                 if (BTC_WIFI_BW_HT40 == wifiBw)
2552                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2553                 else
2554                         halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 3);
2555         } else
2556                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 3);
2557
2558         /*  sw mechanism */
2559         if (BTC_WIFI_BW_HT40 == wifiBw) {
2560                 if (
2561                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2562                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2563                 ) {
2564                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2565                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2566                 } else {
2567                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2568                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2569                 }
2570         } else {
2571                 if (
2572                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2573                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2574                 ) {
2575                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2576                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2577                 } else {
2578                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2579                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2580                 }
2581         }
2582 }
2583
2584 static void halbtc8723b2ant_ActionHidA2dp(PBTC_COEXIST pBtCoexist)
2585 {
2586         u8 wifiRssiState, btRssiState;
2587         u32 wifiBw;
2588         u8 apNum = 0;
2589
2590         wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2591         /* btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0); */
2592         btRssiState = halbtc8723b2ant_BtRssiState(3, 29, 37);
2593
2594         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2595
2596         halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, true, 0x5);
2597
2598         halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2599
2600         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2601         if (BTC_WIFI_BW_LEGACY == wifiBw) {
2602                 if (BTC_RSSI_HIGH(btRssiState))
2603                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2604                 else if (BTC_RSSI_MEDIUM(btRssiState))
2605                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2606                 else
2607                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2608         } else {
2609                 /*  only 802.11N mode we have to dec bt power to 4 degree */
2610                 if (BTC_RSSI_HIGH(btRssiState)) {
2611                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2612                         /*  need to check ap Number of Not */
2613                         if (apNum < 10)
2614                                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
2615                         else
2616                                 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2617                 } else if (BTC_RSSI_MEDIUM(btRssiState))
2618                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2619                 else
2620                         halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2621         }
2622
2623         halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2624
2625         if (
2626                 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2627                 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2628         )
2629                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 2);
2630         else
2631                 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2632
2633         /*  sw mechanism */
2634         if (BTC_WIFI_BW_HT40 == wifiBw) {
2635                 if (
2636                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2637                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2638                 ) {
2639                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2640                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2641                 } else {
2642                         halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2643                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2644                 }
2645         } else {
2646                 if (
2647                         (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2648                         (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2649                 ) {
2650                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2651                         halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2652                 } else {
2653                         halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2654                         halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2655                 }
2656         }
2657 }
2658
2659 static void halbtc8723b2ant_RunCoexistMechanism(PBTC_COEXIST pBtCoexist)
2660 {
2661         u8 algorithm = 0;
2662
2663         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism() ===>\n"));
2664
2665         if (pBtCoexist->bManualControl) {
2666                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"));
2667                 return;
2668         }
2669
2670         if (pCoexSta->bUnderIps) {
2671                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], wifi is under IPS !!!\n"));
2672                 return;
2673         }
2674
2675         algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist);
2676         if (pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
2677                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT is under inquiry/page scan !!\n"));
2678                 halbtc8723b2ant_ActionBtInquiry(pBtCoexist);
2679                 return;
2680         } else {
2681                 if (pCoexDm->bNeedRecover0x948) {
2682                         pCoexDm->bNeedRecover0x948 = false;
2683                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948);
2684                 }
2685         }
2686
2687         pCoexDm->curAlgorithm = algorithm;
2688         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Algorithm = %d\n", pCoexDm->curAlgorithm));
2689
2690         if (halbtc8723b2ant_IsCommonAction(pBtCoexist)) {
2691                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant common.\n"));
2692                 pCoexDm->bAutoTdmaAdjust = false;
2693         } else {
2694                 if (pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) {
2695                         BTC_PRINT(
2696                                 BTC_MSG_ALGORITHM,
2697                                 ALGO_TRACE,
2698                                 (
2699                                         "[BTCoex], preAlgorithm =%d, curAlgorithm =%d\n",
2700                                         pCoexDm->preAlgorithm,
2701                                         pCoexDm->curAlgorithm
2702                                 )
2703                         );
2704                         pCoexDm->bAutoTdmaAdjust = false;
2705                 }
2706
2707
2708                 switch (pCoexDm->curAlgorithm) {
2709                 case BT_8723B_2ANT_COEX_ALGO_SCO:
2710                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n"));
2711                         halbtc8723b2ant_ActionSco(pBtCoexist);
2712                         break;
2713                 case BT_8723B_2ANT_COEX_ALGO_HID:
2714                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID.\n"));
2715                         halbtc8723b2ant_ActionHid(pBtCoexist);
2716                         break;
2717                 case BT_8723B_2ANT_COEX_ALGO_A2DP:
2718                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n"));
2719                         halbtc8723b2ant_ActionA2dp(pBtCoexist);
2720                         break;
2721                 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
2722                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"));
2723                         halbtc8723b2ant_ActionA2dpPanHs(pBtCoexist);
2724                         break;
2725                 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
2726                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"));
2727                         halbtc8723b2ant_ActionPanEdr(pBtCoexist);
2728                         break;
2729                 case BT_8723B_2ANT_COEX_ALGO_PANHS:
2730                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n"));
2731                         halbtc8723b2ant_ActionPanHs(pBtCoexist);
2732                         break;
2733                 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
2734                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"));
2735                         halbtc8723b2ant_ActionPanEdrA2dp(pBtCoexist);
2736                         break;
2737                 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
2738                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"));
2739                         halbtc8723b2ant_ActionPanEdrHid(pBtCoexist);
2740                         break;
2741                 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
2742                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"));
2743                         halbtc8723b2ant_ActionHidA2dpPanEdr(pBtCoexist);
2744                         break;
2745                 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
2746                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"));
2747                         halbtc8723b2ant_ActionHidA2dp(pBtCoexist);
2748                         break;
2749                 default:
2750                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"));
2751                         halbtc8723b2ant_CoexAllOff(pBtCoexist);
2752                         break;
2753                 }
2754                 pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
2755         }
2756 }
2757
2758 static void halbtc8723b2ant_WifiOffHwCfg(PBTC_COEXIST pBtCoexist)
2759 {
2760         bool bIsInMpMode = false;
2761         u8 H2C_Parameter[2] = {0};
2762         u32 fwVer = 0;
2763
2764         /*  set wlan_act to low */
2765         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
2766
2767         pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); /* WiFi goto standby while GNT_BT 0-->1 */
2768         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
2769         if (fwVer >= 0x180000) {
2770                 /* Use H2C to set GNT_BT to HIGH */
2771                 H2C_Parameter[0] = 1;
2772                 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
2773         } else
2774                 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
2775
2776         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode);
2777         if (!bIsInMpMode)
2778                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); /* BT select s0/s1 is controlled by BT */
2779         else
2780                 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); /* BT select s0/s1 is controlled by WiFi */
2781 }
2782
2783 static void halbtc8723b2ant_InitHwConfig(PBTC_COEXIST pBtCoexist, bool bBackUp)
2784 {
2785         u8 u1Tmp = 0;
2786
2787         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 2Ant Init HW Config!!\n"));
2788
2789         /*  backup rf 0x1e value */
2790         pCoexDm->btRf0x1eBackup =
2791                 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
2792
2793         /*  0x790[5:0]= 0x5 */
2794         u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
2795         u1Tmp &= 0xc0;
2796         u1Tmp |= 0x5;
2797         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
2798
2799         /* Antenna config */
2800         halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, true, false);
2801
2802         /*  PTA parameter */
2803         halbtc8723b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
2804
2805         /*  Enable counter statistics */
2806         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); /* 0x76e[3] = 1, WLAN_Act control by PTA */
2807         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
2808         pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
2809 }
2810
2811 /*  */
2812 /*  work around function start with wa_halbtc8723b2ant_ */
2813 /*  */
2814 /*  */
2815 /*  extern function start with EXhalbtc8723b2ant_ */
2816 /*  */
2817 void EXhalbtc8723b2ant_PowerOnSetting(PBTC_COEXIST pBtCoexist)
2818 {
2819         PBTC_BOARD_INFO pBoardInfo = &pBtCoexist->boardInfo;
2820         u8 u1Tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
2821         u16 u2Tmp = 0x0;
2822
2823         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20);
2824
2825         /*  enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
2826         u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
2827         pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1);
2828
2829         /*  set GRAN_BT = 1 */
2830         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
2831         /*  set WLAN_ACT = 0 */
2832         pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
2833
2834         /*  */
2835         /*  S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
2836         /*  Local setting bit define */
2837         /*      BIT0: "0" for no antenna inverse; "1" for antenna inverse */
2838         /*      BIT1: "0" for internal switch; "1" for external switch */
2839         /*      BIT2: "0" for one antenna; "1" for two antenna */
2840         /*  NOTE: here default all internal switch and 1-antenna ==> BIT1 = 0 and BIT2 = 0 */
2841         if (pBtCoexist->chipInterface == BTC_INTF_USB) {
2842                 /*  fixed at S0 for USB interface */
2843                 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
2844
2845                 u1Tmp |= 0x1;   /*  antenna inverse */
2846                 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
2847
2848                 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
2849         } else {
2850                 /*  for PCIE and SDIO interface, we check efuse 0xc3[6] */
2851                 if (pBoardInfo->singleAntPath == 0) {
2852                         /*  set to S1 */
2853                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280);
2854                         pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT;
2855                 } else if (pBoardInfo->singleAntPath == 1) {
2856                         /*  set to S0 */
2857                         pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
2858                         u1Tmp |= 0x1;   /*  antenna inverse */
2859                         pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
2860                 }
2861
2862                 if (pBtCoexist->chipInterface == BTC_INTF_PCI)
2863                         pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp);
2864                 else if (pBtCoexist->chipInterface == BTC_INTF_SDIO)
2865                         pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp);
2866         }
2867 }
2868
2869 void EXhalbtc8723b2ant_InitHwConfig(PBTC_COEXIST pBtCoexist, bool bWifiOnly)
2870 {
2871         halbtc8723b2ant_InitHwConfig(pBtCoexist, true);
2872 }
2873
2874 void EXhalbtc8723b2ant_InitCoexDm(PBTC_COEXIST pBtCoexist)
2875 {
2876         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Coex Mechanism Init!!\n"));
2877
2878         halbtc8723b2ant_InitCoexDm(pBtCoexist);
2879 }
2880
2881 void EXhalbtc8723b2ant_DisplayCoexInfo(PBTC_COEXIST pBtCoexist)
2882 {
2883         PBTC_BOARD_INFO pBoardInfo = &pBtCoexist->boardInfo;
2884         PBTC_STACK_INFO pStackInfo = &pBtCoexist->stackInfo;
2885         PBTC_BT_LINK_INFO pBtLinkInfo = &pBtCoexist->btLinkInfo;
2886         u8 *cliBuf = pBtCoexist->cliBuf;
2887         u8 u1Tmp[4], i, btInfoExt, psTdmaCase = 0;
2888         u32 u4Tmp[4];
2889         bool bRoam = false, bScan = false, bLink = false, bWifiUnder5G = false;
2890         bool bBtHsOn = false, bWifiBusy = false;
2891         s32 wifiRssi = 0, btHsRssi = 0;
2892         u32 wifiBw, wifiTrafficDir, faOfdm, faCck;
2893         u8 wifiDot11Chnl, wifiHsChnl;
2894         u32 fwVer = 0, btPatchVer = 0;
2895         u8 apNum = 0;
2896
2897         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
2898         CL_PRINTF(cliBuf);
2899
2900         if (pBtCoexist->bManualControl) {
2901                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============");
2902                 CL_PRINTF(cliBuf);
2903                 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ==========================================");
2904                 CL_PRINTF(cliBuf);
2905         }
2906
2907         CL_SPRINTF(
2908                 cliBuf,
2909                 BT_TMP_BUF_SIZE,
2910                 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
2911                 pBoardInfo->pgAntNum,
2912                 pBoardInfo->btdmAntNum
2913         );
2914         CL_PRINTF(cliBuf);
2915
2916         CL_SPRINTF(
2917                 cliBuf,
2918                 BT_TMP_BUF_SIZE,
2919                 "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
2920                 (pStackInfo->bProfileNotified ? "Yes" : "No"),
2921                 pStackInfo->hciVersion
2922         );
2923         CL_PRINTF(cliBuf);
2924
2925         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
2926         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
2927         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \
2928                 GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer);
2929         CL_PRINTF(cliBuf);
2930
2931         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
2932         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
2933         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
2934         CL_SPRINTF(
2935                 cliBuf,
2936                 BT_TMP_BUF_SIZE,
2937                 "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
2938                 wifiDot11Chnl,
2939                 wifiHsChnl,
2940                 bBtHsOn
2941         );
2942         CL_PRINTF(cliBuf);
2943
2944         CL_SPRINTF(
2945                 cliBuf,
2946                 BT_TMP_BUF_SIZE,
2947                 "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
2948                 pCoexDm->wifiChnlInfo[0],
2949                 pCoexDm->wifiChnlInfo[1],
2950                 pCoexDm->wifiChnlInfo[2]
2951         );
2952         CL_PRINTF(cliBuf);
2953
2954         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
2955         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
2956         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2957         CL_SPRINTF(
2958                 cliBuf,
2959                 BT_TMP_BUF_SIZE,
2960                 "\r\n %-35s = %d/ %d/ %d", "Wifi rssi/ HS rssi/ AP#", \
2961                 wifiRssi,
2962                 btHsRssi,
2963                 apNum
2964         );
2965         CL_PRINTF(cliBuf);
2966
2967         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
2968         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
2969         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
2970         CL_SPRINTF(
2971                 cliBuf,
2972                 BT_TMP_BUF_SIZE,
2973                 "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
2974                 bLink,
2975                 bRoam,
2976                 bScan
2977         );
2978         CL_PRINTF(cliBuf);
2979
2980         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
2981         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2982         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
2983         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
2984         CL_SPRINTF(
2985                 cliBuf,
2986                 BT_TMP_BUF_SIZE,
2987                 "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
2988                 (bWifiUnder5G ? "5G" : "2.4G"),
2989                 ((BTC_WIFI_BW_LEGACY == wifiBw) ? "Legacy" : (((BTC_WIFI_BW_HT40 == wifiBw) ? "HT40" : "HT20"))),
2990                 ((!bWifiBusy) ? "idle" : ((BTC_WIFI_TRAFFIC_TX == wifiTrafficDir) ? "uplink" : "downlink"))
2991         );
2992         CL_PRINTF(cliBuf);
2993
2994         CL_SPRINTF(
2995                 cliBuf,
2996                 BT_TMP_BUF_SIZE,
2997                 "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
2998                 ((pBtCoexist->btInfo.bBtDisabled) ? ("disabled") : ((pCoexSta->bC2hBtInquiryPage) ? ("inquiry/page scan") : ((BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ? "non-connected idle" :
2999                 ((BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ? "connected-idle" : "busy")))),
3000                 pCoexSta->btRssi,
3001                 pCoexSta->btRetryCnt
3002         );
3003         CL_PRINTF(cliBuf);
3004
3005         CL_SPRINTF(
3006                 cliBuf,
3007                 BT_TMP_BUF_SIZE,
3008                 "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
3009                 pBtLinkInfo->bScoExist,
3010                 pBtLinkInfo->bHidExist,
3011                 pBtLinkInfo->bPanExist,
3012                 pBtLinkInfo->bA2dpExist
3013         );
3014         CL_PRINTF(cliBuf);
3015         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
3016
3017         btInfoExt = pCoexSta->btInfoExt;
3018         CL_SPRINTF(
3019                 cliBuf,
3020                 BT_TMP_BUF_SIZE,
3021                 "\r\n %-35s = %s", "BT Info A2DP rate", \
3022                 (btInfoExt&BIT0) ? "Basic rate" : "EDR rate"
3023         );
3024         CL_PRINTF(cliBuf);
3025
3026         for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) {
3027                 if (pCoexSta->btInfoC2hCnt[i]) {
3028                         CL_SPRINTF(
3029                                 cliBuf,
3030                                 BT_TMP_BUF_SIZE,
3031                                 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b2Ant[i], \
3032                                 pCoexSta->btInfoC2h[i][0],
3033                                 pCoexSta->btInfoC2h[i][1],
3034                                 pCoexSta->btInfoC2h[i][2],
3035                                 pCoexSta->btInfoC2h[i][3],
3036                                 pCoexSta->btInfoC2h[i][4],
3037                                 pCoexSta->btInfoC2h[i][5],
3038                                 pCoexSta->btInfoC2h[i][6],
3039                                 pCoexSta->btInfoC2hCnt[i]
3040                         );
3041                         CL_PRINTF(cliBuf);
3042                 }
3043         }
3044
3045         CL_SPRINTF(
3046                 cliBuf,
3047                 BT_TMP_BUF_SIZE,
3048                 "\r\n %-35s = %s/%s", "PS state, IPS/LPS", \
3049                 ((pCoexSta->bUnderIps ? "IPS ON" : "IPS OFF")),
3050                 ((pCoexSta->bUnderLps ? "LPS ON" : "LPS OFF"))
3051         );
3052         CL_PRINTF(cliBuf);
3053         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3054
3055         /*  Sw mechanism */
3056         CL_SPRINTF(
3057                 cliBuf,
3058                 BT_TMP_BUF_SIZE,
3059                 "\r\n %-35s", "============[Sw mechanism]============"
3060         );
3061         CL_PRINTF(cliBuf);
3062         CL_SPRINTF(
3063                 cliBuf,
3064                 BT_TMP_BUF_SIZE,
3065                 "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \
3066                 pCoexDm->bCurRfRxLpfShrink,
3067                 pCoexDm->bCurLowPenaltyRa,
3068                 pCoexDm->bLimitedDig
3069         );
3070         CL_PRINTF(cliBuf);
3071         CL_SPRINTF(
3072                 cliBuf,
3073                 BT_TMP_BUF_SIZE,
3074                 "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3075                 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
3076                 pCoexDm->bCurAgcTableEn,
3077                 pCoexDm->bCurAdcBackOff,
3078                 pCoexDm->bCurDacSwingOn,
3079                 pCoexDm->curDacSwingLvl
3080         );
3081         CL_PRINTF(cliBuf);
3082
3083         /*  Fw mechanism */
3084         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
3085         CL_PRINTF(cliBuf);
3086
3087         psTdmaCase = pCoexDm->curPsTdma;
3088         CL_SPRINTF(
3089                 cliBuf,
3090                 BT_TMP_BUF_SIZE,
3091                 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \
3092                 pCoexDm->psTdmaPara[0],
3093                 pCoexDm->psTdmaPara[1],
3094                 pCoexDm->psTdmaPara[2],
3095                 pCoexDm->psTdmaPara[3],
3096                 pCoexDm->psTdmaPara[4],
3097                 psTdmaCase, pCoexDm->bAutoTdmaAdjust
3098         );
3099         CL_PRINTF(cliBuf);
3100
3101         CL_SPRINTF(
3102                 cliBuf,
3103                 BT_TMP_BUF_SIZE,
3104                 "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \
3105                 pCoexDm->curBtDecPwrLvl,
3106                 pCoexDm->bCurIgnoreWlanAct
3107         );
3108         CL_PRINTF(cliBuf);
3109
3110         /*  Hw setting */
3111         CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
3112         CL_PRINTF(cliBuf);
3113
3114         CL_SPRINTF(
3115                 cliBuf,
3116                 BT_TMP_BUF_SIZE,
3117                 "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
3118                 pCoexDm->btRf0x1eBackup
3119         );
3120         CL_PRINTF(cliBuf);
3121
3122         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778);
3123         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880);
3124         CL_SPRINTF(
3125                 cliBuf,
3126                 BT_TMP_BUF_SIZE,
3127                 "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \
3128                 u1Tmp[0],
3129                 (u4Tmp[0]&0x3e000000) >> 25
3130         );
3131         CL_PRINTF(cliBuf);
3132
3133
3134         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
3135         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67);
3136         u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
3137         CL_SPRINTF(
3138                 cliBuf,
3139                 BT_TMP_BUF_SIZE,
3140                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \
3141                 u4Tmp[0],
3142                 ((u1Tmp[0]&0x20)>>5),
3143                 u1Tmp[1]
3144         );
3145         CL_PRINTF(cliBuf);
3146
3147         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c);
3148         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930);
3149         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944);
3150         CL_SPRINTF(
3151                 cliBuf,
3152                 BT_TMP_BUF_SIZE,
3153                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \
3154                 u4Tmp[0]&0x3,
3155                 u4Tmp[1]&0xff,
3156                 u4Tmp[2]&0x3
3157         );
3158         CL_PRINTF(cliBuf);
3159
3160
3161         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39);
3162         u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
3163         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
3164         u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64);
3165         CL_SPRINTF(
3166                 cliBuf,
3167                 BT_TMP_BUF_SIZE,
3168                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \
3169                 ((u1Tmp[0] & 0x8)>>3),
3170                 u1Tmp[1],
3171                 ((u4Tmp[0]&0x01800000)>>23),
3172                 u1Tmp[2]&0x1
3173         );
3174         CL_PRINTF(cliBuf);
3175
3176         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550);
3177         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522);
3178         CL_SPRINTF(
3179                 cliBuf,
3180                 BT_TMP_BUF_SIZE,
3181                 "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \
3182                 u4Tmp[0],
3183                 u1Tmp[0]
3184         );
3185         CL_PRINTF(cliBuf);
3186
3187         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
3188         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c);
3189         CL_SPRINTF(
3190                 cliBuf,
3191                 BT_TMP_BUF_SIZE,
3192                 "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \
3193                 u4Tmp[0]&0xff,
3194                 u1Tmp[0]
3195         );
3196         CL_PRINTF(cliBuf);
3197
3198         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0);
3199         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4);
3200         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8);
3201         u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0);
3202
3203         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b);
3204         u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c);
3205
3206         faOfdm =
3207                 ((u4Tmp[0]&0xffff0000) >> 16) +
3208                 ((u4Tmp[1]&0xffff0000) >> 16) +
3209                 (u4Tmp[1] & 0xffff) +  (u4Tmp[2] & 0xffff) + \
3210                 ((u4Tmp[3]&0xffff0000) >> 16) +
3211                 (u4Tmp[3] & 0xffff);
3212
3213         faCck = (u1Tmp[0] << 8) + u1Tmp[1];
3214
3215         CL_SPRINTF(
3216                 cliBuf,
3217                 BT_TMP_BUF_SIZE,
3218                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \
3219                 u4Tmp[0]&0xffff,
3220                 faOfdm,
3221                 faCck
3222         );
3223         CL_PRINTF(cliBuf);
3224
3225         u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0);
3226         u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
3227         u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
3228         u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc);
3229         CL_SPRINTF(
3230                 cliBuf,
3231                 BT_TMP_BUF_SIZE,
3232                 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
3233                 u4Tmp[0],
3234                 u4Tmp[1],
3235                 u4Tmp[2],
3236                 u1Tmp[0]
3237         );
3238         CL_PRINTF(cliBuf);
3239
3240         CL_SPRINTF(
3241                 cliBuf,
3242                 BT_TMP_BUF_SIZE,
3243                 "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \
3244                 pCoexSta->highPriorityRx,
3245                 pCoexSta->highPriorityTx
3246         );
3247         CL_PRINTF(cliBuf);
3248         CL_SPRINTF(
3249                 cliBuf,
3250                 BT_TMP_BUF_SIZE,
3251                 "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \
3252                 pCoexSta->lowPriorityRx,
3253                 pCoexSta->lowPriorityTx
3254         );
3255         CL_PRINTF(cliBuf);
3256
3257         halbtc8723b2ant_MonitorBtCtr(pBtCoexist);
3258         pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
3259 }
3260
3261
3262 void EXhalbtc8723b2ant_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type)
3263 {
3264         if (BTC_IPS_ENTER == type) {
3265                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n"));
3266                 pCoexSta->bUnderIps = true;
3267                 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
3268                 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true);
3269                 halbtc8723b2ant_CoexAllOff(pBtCoexist);
3270         } else if (BTC_IPS_LEAVE == type) {
3271                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n"));
3272                 pCoexSta->bUnderIps = false;
3273                 halbtc8723b2ant_InitHwConfig(pBtCoexist, false);
3274                 halbtc8723b2ant_InitCoexDm(pBtCoexist);
3275                 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
3276         }
3277 }
3278
3279 void EXhalbtc8723b2ant_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type)
3280 {
3281         if (BTC_LPS_ENABLE == type) {
3282                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS ENABLE notify\n"));
3283                 pCoexSta->bUnderLps = true;
3284         } else if (BTC_LPS_DISABLE == type) {
3285                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS DISABLE notify\n"));
3286                 pCoexSta->bUnderLps = false;
3287         }
3288 }
3289
3290 void EXhalbtc8723b2ant_ScanNotify(PBTC_COEXIST pBtCoexist, u8 type)
3291 {
3292         if (BTC_SCAN_START == type) {
3293                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n"));
3294         } else if (BTC_SCAN_FINISH == type) {
3295                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n"));
3296         }
3297 }
3298
3299 void EXhalbtc8723b2ant_ConnectNotify(PBTC_COEXIST pBtCoexist, u8 type)
3300 {
3301         if (BTC_ASSOCIATE_START == type) {
3302                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n"));
3303         } else if (BTC_ASSOCIATE_FINISH == type) {
3304                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n"));
3305         }
3306 }
3307
3308 void EXhalbtc8723b2ant_MediaStatusNotify(PBTC_COEXIST pBtCoexist, u8 type)
3309 {
3310         u8 H2C_Parameter[3] = {0};
3311         u32 wifiBw;
3312         u8 wifiCentralChnl;
3313         u8 apNum = 0;
3314
3315         if (BTC_MEDIA_CONNECT == type) {
3316                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n"));
3317         } else {
3318                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n"));
3319         }
3320
3321         /*  only 2.4G we need to inform bt the chnl mask */
3322         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
3323         if ((BTC_MEDIA_CONNECT == type) && (wifiCentralChnl <= 14)) {
3324                 H2C_Parameter[0] = 0x1;
3325                 H2C_Parameter[1] = wifiCentralChnl;
3326                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
3327                 if (BTC_WIFI_BW_HT40 == wifiBw)
3328                         H2C_Parameter[2] = 0x30;
3329                 else {
3330                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
3331                         if (apNum < 10)
3332                                 H2C_Parameter[2] = 0x30;
3333                         else
3334                                 H2C_Parameter[2] = 0x20;
3335                 }
3336         }
3337
3338         pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
3339         pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
3340         pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
3341
3342         BTC_PRINT(
3343                 BTC_MSG_ALGORITHM,
3344                 ALGO_TRACE_FW_EXEC,
3345                 (
3346                         "[BTCoex], FW write 0x66 = 0x%x\n",
3347                         H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]
3348                 )
3349         );
3350
3351         pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
3352 }
3353
3354 void EXhalbtc8723b2ant_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 type)
3355 {
3356         if (type == BTC_PACKET_DHCP) {
3357                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], DHCP Packet notify\n"));
3358         }
3359 }
3360
3361 void EXhalbtc8723b2ant_BtInfoNotify(
3362         PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length
3363 )
3364 {
3365         u8      btInfo = 0;
3366         u8      i, rspSource = 0;
3367         bool bBtBusy = false, bLimitedDig = false;
3368         bool bWifiConnected = false;
3369
3370         pCoexSta->bC2hBtInfoReqSent = false;
3371
3372         rspSource = tmpBuf[0]&0xf;
3373         if (rspSource >= BT_INFO_SRC_8723B_2ANT_MAX)
3374                 rspSource = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
3375
3376         pCoexSta->btInfoC2hCnt[rspSource]++;
3377
3378         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Bt info[%d], length =%d, hex data =[", rspSource, length));
3379         for (i = 0; i < length; i++) {
3380                 pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
3381                 if (i == 1)
3382                         btInfo = tmpBuf[i];
3383
3384                 if (i == length-1) {
3385                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x]\n", tmpBuf[i]));
3386                 } else {
3387                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x, ", tmpBuf[i]));
3388                 }
3389         }
3390
3391         if (pBtCoexist->bManualControl) {
3392                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n"));
3393                 return;
3394         }
3395
3396         if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource) {
3397                 pCoexSta->btRetryCnt = pCoexSta->btInfoC2h[rspSource][2]&0xf; /* [3:0] */
3398
3399                 pCoexSta->btRssi = pCoexSta->btInfoC2h[rspSource][3]*2+10;
3400
3401                 pCoexSta->btInfoExt = pCoexSta->btInfoC2h[rspSource][4];
3402
3403                 pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40);
3404                 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask);
3405                 if (pCoexSta->bBtTxRxMask) {
3406                         /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
3407                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n"));
3408                         pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01);
3409                 }
3410
3411                 /*  Here we need to resend some wifi info to BT */
3412                 /*  because bt is reset and loss of the info. */
3413                 if ((pCoexSta->btInfoExt & BIT1)) {
3414                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"));
3415                         pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
3416
3417                         if (bWifiConnected)
3418                                 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
3419                         else
3420                                 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
3421                 }
3422
3423                 if ((pCoexSta->btInfoExt & BIT3)) {
3424                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"));
3425                         halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, false);
3426                 } else {
3427                         /*  BT already NOT ignore Wlan active, do nothing here. */
3428                 }
3429         }
3430
3431         /*  check BIT2 first ==> check if bt is under inquiry or page scan */
3432         if (btInfo & BT_INFO_8723B_2ANT_B_INQ_PAGE)
3433                 pCoexSta->bC2hBtInquiryPage = true;
3434         else
3435                 pCoexSta->bC2hBtInquiryPage = false;
3436
3437         /*  set link exist status */
3438         if (!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) {
3439                 pCoexSta->bBtLinkExist = false;
3440                 pCoexSta->bPanExist = false;
3441                 pCoexSta->bA2dpExist = false;
3442                 pCoexSta->bHidExist = false;
3443                 pCoexSta->bScoExist = false;
3444         } else { /*  connection exists */
3445                 pCoexSta->bBtLinkExist = true;
3446                 if (btInfo & BT_INFO_8723B_2ANT_B_FTP)
3447                         pCoexSta->bPanExist = true;
3448                 else
3449                         pCoexSta->bPanExist = false;
3450                 if (btInfo & BT_INFO_8723B_2ANT_B_A2DP)
3451                         pCoexSta->bA2dpExist = true;
3452                 else
3453                         pCoexSta->bA2dpExist = false;
3454                 if (btInfo & BT_INFO_8723B_2ANT_B_HID)
3455                         pCoexSta->bHidExist = true;
3456                 else
3457                         pCoexSta->bHidExist = false;
3458                 if (btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO)
3459                         pCoexSta->bScoExist = true;
3460                 else
3461                         pCoexSta->bScoExist = false;
3462         }
3463
3464         halbtc8723b2ant_UpdateBtLinkInfo(pBtCoexist);
3465
3466         if (!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION)) {
3467                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3468                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"));
3469         } else if (btInfo == BT_INFO_8723B_2ANT_B_CONNECTION)   { /*  connection exists but no busy */
3470                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
3471                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"));
3472         } else if (
3473                 (btInfo&BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
3474                 (btInfo&BT_INFO_8723B_2ANT_B_SCO_BUSY)
3475         ) {
3476                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
3477                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"));
3478         } else if (btInfo&BT_INFO_8723B_2ANT_B_ACL_BUSY) {
3479                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
3480                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"));
3481         } else {
3482                 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_MAX;
3483                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"));
3484         }
3485
3486         if (
3487                 (BT_8723B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
3488                 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) ||
3489                 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus)
3490         ) {
3491                 bBtBusy = true;
3492                 bLimitedDig = true;
3493         } else {
3494                 bBtBusy = false;
3495                 bLimitedDig = false;
3496         }
3497
3498         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
3499
3500         pCoexDm->bLimitedDig = bLimitedDig;
3501         pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
3502
3503         halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
3504 }
3505
3506 void EXhalbtc8723b2ant_HaltNotify(PBTC_COEXIST pBtCoexist)
3507 {
3508         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n"));
3509
3510         halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
3511         pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); /* BT goto standby while GNT_BT 1-->0 */
3512         halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true);
3513
3514         EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
3515 }
3516
3517 void EXhalbtc8723b2ant_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState)
3518 {
3519         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify\n"));
3520
3521         if (BTC_WIFI_PNP_SLEEP == pnpState) {
3522                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to SLEEP\n"));
3523         } else if (BTC_WIFI_PNP_WAKE_UP == pnpState) {
3524                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to WAKE UP\n"));
3525                 halbtc8723b2ant_InitHwConfig(pBtCoexist, false);
3526                 halbtc8723b2ant_InitCoexDm(pBtCoexist);
3527                 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
3528         }
3529 }
3530
3531 void EXhalbtc8723b2ant_Periodical(PBTC_COEXIST pBtCoexist)
3532 {
3533         static u8 disVerInfoCnt;
3534         u32 fwVer = 0, btPatchVer = 0;
3535
3536         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ==========================Periodical ===========================\n"));
3537
3538         if (disVerInfoCnt <= 5) {
3539                 disVerInfoCnt += 1;
3540                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
3541                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
3542                 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
3543                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", \
3544                         GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer));
3545                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
3546         }
3547
3548         if (
3549                 halbtc8723b2ant_IsWifiStatusChanged(pBtCoexist) ||
3550                 pCoexDm->bAutoTdmaAdjust
3551         )
3552                 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
3553 }