1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
8 * Contact Information: wlanfae <wlanfae@realtek.com>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/ioport.h>
16 #include <linux/sched.h>
17 #include <linux/types.h>
18 #include <linux/interrupt.h>
19 #include <linux/slab.h>
20 #include <linux/netdevice.h>
21 #include <linux/pci.h>
22 #include <linux/etherdevice.h>
23 #include <linux/delay.h>
24 #include <linux/rtnetlink.h>
25 #include <linux/wireless.h>
26 #include <linux/timer.h>
27 #include <linux/proc_fs.h>
28 #include <linux/if_arp.h>
29 #include <linux/random.h>
32 /* Need this defined before including local include files */
33 #define DRV_NAME "rtl819xE"
35 #include "../rtllib.h"
37 #include "r8192E_firmware.h"
38 #include "r8192E_hw.h"
40 #include "r8190P_def.h"
41 #include "r8192E_dev.h"
43 #include "rtl_eeprom.h"
48 #define DRV_COPYRIGHT \
49 "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
50 #define DRV_AUTHOR "<wlanfae@realtek.com>"
51 #define DRV_VERSION "0014.0401.2010"
53 #define TOTAL_CAM_ENTRY 32
54 #define CAM_CONTENT_COUNT 8
56 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
57 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10
59 #define RTLLIB_WATCH_DOG_TIME 2000
61 #define MAX_DEV_ADDR_SIZE 8 /*support till 64 bit bus width OS*/
62 #define MAX_FIRMWARE_INFORMATION_SIZE 32
63 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
64 #define ENCRYPTION_MAX_OVERHEAD 128
65 #define MAX_FRAGMENT_COUNT 8
66 #define MAX_TRANSMIT_BUFFER_SIZE \
67 (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) * \
70 #define CMDPACKET_FRAG_SIZE (4 * (MAX_TRANSMIT_BUFFER_SIZE / 4) - 8)
72 #define DEFAULT_FRAG_THRESHOLD 2342U
73 #define MIN_FRAG_THRESHOLD 256U
74 #define DEFAULT_BEACONINTERVAL 0x64U
76 #define DEFAULT_RETRY_RTS 7
77 #define DEFAULT_RETRY_DATA 7
79 #define PHY_RSSI_SLID_WIN_MAX 100
81 #define TX_BB_GAIN_TABLE_LEN 37
82 #define CCK_TX_BB_GAIN_TABLE_LEN 23
84 #define CHANNEL_PLAN_LEN 10
87 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4
88 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
90 #define MAX_TX_QUEUE 9
92 #define MAX_RX_COUNT 64
93 #define MAX_TX_QUEUE_COUNT 9
108 enum rt_eeprom_type {
114 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
115 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
116 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
117 TXCMD_SET_TX_DURATION = 0xFF900003,
118 TXCMD_SET_RX_RSSI = 0xFF900004,
119 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
123 enum rt_customer_id {
126 RT_CID_819X_NETCORE = 10,
130 RESET_TYPE_NORESET = 0x00,
131 RESET_TYPE_SILENT = 0x02
135 unsigned long received_rate_histogram[4][32];
136 unsigned long txbytesunicast;
137 unsigned long rxbytesunicast;
138 unsigned long txretrycount;
140 unsigned long slide_signal_strength[100];
141 unsigned long slide_evm[100];
142 unsigned long slide_rssi_total;
143 unsigned long slide_evm_total;
144 long signal_strength;
145 long last_signal_strength_inpercent;
146 long recv_signal_power;
147 u8 rx_rssi_percentage[4];
148 u8 rx_evm_percentage[2];
149 u32 slide_beacon_pwdb[100];
150 u32 slide_beacon_total;
151 u32 CurrentShowTxate;
166 struct tx_ring *next;
169 struct rtl8192_tx_ring {
170 struct tx_desc *desc;
173 unsigned int entries;
174 struct sk_buff_head queue;
178 struct pci_dev *pdev;
179 struct pci_dev *bridge_pdev;
181 bool bfirst_after_down;
182 bool being_init_adapter;
189 struct delayed_work update_beacon_wq;
190 struct delayed_work watch_dog_wq;
191 struct delayed_work txpower_tracking_wq;
192 struct delayed_work rfpath_check_wq;
193 struct delayed_work gpio_change_rf_wq;
194 struct rtllib_device *rtllib;
196 struct work_struct reset_wq;
198 enum rt_customer_id customer_id;
200 enum ht_channel_width current_chnl_bw;
201 struct bb_reg_definition phy_reg_def[4];
202 struct rate_adaptive rate_adaptive;
204 struct rt_firmware *fw_info;
205 enum rtl819x_loopback loopback_mode;
207 struct timer_list watch_dog_timer;
208 struct timer_list fsync_timer;
209 struct timer_list gpio_polling_timer;
211 spinlock_t irq_th_lock;
213 spinlock_t rf_ps_lock;
216 struct sk_buff_head skb_queue;
218 struct tasklet_struct irq_rx_tasklet;
219 struct tasklet_struct irq_tx_tasklet;
221 struct mutex wx_mutex;
222 struct mutex rf_mutex;
225 struct rt_stats stats;
226 struct iw_statistics wstats;
228 struct rx_desc *rx_ring;
229 struct sk_buff *rx_buf[MAX_RX_COUNT];
230 dma_addr_t rx_ring_dma;
240 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
242 atomic_t tx_pending[0x10];
244 u16 short_retry_limit;
245 u16 long_retry_limit;
251 /**********************************************************/
252 struct work_struct qos_activate;
261 enum nic_t card_8192;
262 u8 card_8192_version;
265 char nick[IW_ESSID_MAX_SIZE + 1];
266 u8 check_roaming_cnt;
268 u32 silent_reset_rx_slot_index;
269 u32 silent_reset_rx_stuck_event[MAX_SILENT_RESET_RX_SLOT_NUM];
273 u8 dot11_current_preamble_mode;
276 bool autoload_fail_flag;
281 u8 eeprom_customer_id;
283 u8 eeprom_tx_pwr_level_cck[14];
284 u8 eeprom_tx_pwr_level_ofdm24g[14];
285 u16 eeprom_ant_pwr_diff;
286 u8 eeprom_thermal_meter;
287 u8 eeprom_crystal_cap;
289 u8 eeprom_legacy_ht_tx_pwr_diff;
294 u8 sw_chnl_in_progress;
297 u8 set_bw_mode_in_progress;
299 u8 n_cur_40mhz_prime_sc;
301 u32 rf_reg_0value[4];
302 u8 num_total_rf_path;
303 bool brfpath_rxenable[4];
305 bool tx_pwr_data_read_from_eeprom;
309 bool rf_change_in_progress;
310 bool set_rf_pwr_state_in_progress;
315 u8 cck_present_attn_20m_def;
316 u8 cck_present_attn_40m_def;
317 s8 cck_present_attn_diff;
319 long undecorated_smoothed_pwdb;
321 u32 mcs_tx_pwr_level_org_offset[6];
322 u8 tx_pwr_level_cck[14];
323 u8 tx_pwr_level_ofdm_24g[14];
324 u8 legacy_ht_tx_pwr_diff;
325 u8 antenna_tx_pwr_diff[3];
327 bool dynamic_tx_high_pwr;
328 bool dynamic_tx_low_pwr;
329 bool last_dtp_flag_high;
330 bool last_dtp_flag_low;
332 u8 rfa_txpowertrackingindex;
333 u8 rfa_txpowertrackingindex_real;
334 u8 rfa_txpowertracking_default;
335 bool btxpower_tracking;
339 bool tx_pwr_tracking_init;
347 struct init_gain initgain_backup;
348 u8 def_initial_gain[4];
349 bool bis_any_nonbepkts;
350 bool bcurrent_turbo_EDCA;
351 bool bis_cur_rdlstate;
354 u32 rate_count_diff_rec;
355 u32 continue_diff_count;
363 extern const struct ethtool_ops rtl819x_ethtool_ops;
365 u8 rtl92e_readb(struct net_device *dev, int x);
366 u32 rtl92e_readl(struct net_device *dev, int x);
367 u16 rtl92e_readw(struct net_device *dev, int x);
368 void rtl92e_writeb(struct net_device *dev, int x, u8 y);
369 void rtl92e_writew(struct net_device *dev, int x, u16 y);
370 void rtl92e_writel(struct net_device *dev, int x, u32 y);
372 void force_pci_posting(struct net_device *dev);
374 void rtl92e_rx_enable(struct net_device *dev);
375 void rtl92e_tx_enable(struct net_device *dev);
377 void rtl92e_hw_sleep_wq(void *data);
378 void rtl92e_commit(struct net_device *dev);
380 void rtl92e_check_rfctrl_gpio_timer(struct timer_list *t);
382 void rtl92e_hw_wakeup_wq(void *data);
384 void rtl92e_reset_desc_ring(struct net_device *dev);
385 void rtl92e_set_wireless_mode(struct net_device *dev, u8 wireless_mode);
386 void rtl92e_irq_enable(struct net_device *dev);
387 void rtl92e_config_rate(struct net_device *dev, u16 *rate_config);
388 void rtl92e_irq_disable(struct net_device *dev);
390 long rtl92e_translate_to_dbm(struct r8192_priv *priv, u8 signal_strength_index);
391 void rtl92e_update_rx_statistics(struct r8192_priv *priv,
392 struct rtllib_rx_stats *pprevious_stats);
393 u8 rtl92e_evm_db_to_percent(s8 value);
394 u8 rtl92e_rx_db_to_percent(s8 antpower);
395 void rtl92e_copy_mpdu_stats(struct rtllib_rx_stats *psrc_stats,
396 struct rtllib_rx_stats *ptarget_stats);
397 bool rtl92e_enable_nic(struct net_device *dev);
399 bool rtl92e_set_rf_state(struct net_device *dev,
400 enum rt_rf_power_state state_to_set,
401 RT_RF_CHANGE_SOURCE change_source);