1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
9 * The full GNU General Public License is included in this distribution in the
10 * file called LICENSE.
12 * Contact Information:
13 * wlanfae <wlanfae@realtek.com>
14 ******************************************************************************/
18 #define MAX_DOZE_WAITING_TIMES_9x 64
20 #define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
21 #define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
22 #define RadioA_ArrayLength RadioA_ArrayLengthPciE
23 #define RadioB_ArrayLength RadioB_ArrayLengthPciE
24 #define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
25 #define RadioC_ArrayLength RadioC_ArrayLengthPciE
26 #define RadioD_ArrayLength RadioD_ArrayLengthPciE
27 #define PHY_REGArrayLength PHY_REGArrayLengthPciE
28 #define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
30 #define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG
31 #define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array
32 #define Rtl819XRadioA_Array Rtl8192PciERadioA_Array
33 #define Rtl819XRadioB_Array Rtl8192PciERadioB_Array
34 #define Rtl819XRadioC_Array Rtl8192PciERadioC_Array
35 #define Rtl819XRadioD_Array Rtl8192PciERadioD_Array
36 #define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array
37 #define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray
38 #define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray
40 extern u32 rtl819XAGCTAB_Array[];
47 HW90_BLOCK_MAXIMUM = 4,
50 enum rf90_radio_path {
58 #define bMaskByte0 0xff
59 #define bMaskByte1 0xff00
60 #define bMaskByte2 0xff0000
61 #define bMaskByte3 0xff000000
62 #define bMaskHWord 0xffff0000
63 #define bMaskLWord 0x0000ffff
64 #define bMaskDWord 0xffffffff
66 u8 rtl92e_is_legal_rf_path(struct net_device *dev, u32 eRFPath);
67 void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr,
68 u32 dwBitMask, u32 dwData);
69 u32 rtl92e_get_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask);
70 void rtl92e_set_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath,
71 u32 RegAddr, u32 BitMask, u32 Data);
72 u32 rtl92e_get_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath,
73 u32 RegAddr, u32 BitMask);
74 void rtl92e_config_mac(struct net_device *dev);
75 bool rtl92e_check_bb_and_rf(struct net_device *dev,
76 enum hw90_block CheckBlock,
77 enum rf90_radio_path eRFPath);
78 bool rtl92e_config_bb(struct net_device *dev);
79 void rtl92e_get_tx_power(struct net_device *dev);
80 void rtl92e_set_tx_power(struct net_device *dev, u8 channel);
81 bool rtl92e_config_phy(struct net_device *dev);
82 u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath);
84 u8 rtl92e_set_channel(struct net_device *dev, u8 channel);
85 void rtl92e_set_bw_mode(struct net_device *dev,
86 enum ht_channel_width Bandwidth,
87 enum ht_extchnl_offset Offset);
88 void rtl92e_init_gain(struct net_device *dev, u8 Operation);
90 void rtl92e_set_rf_off(struct net_device *dev);
92 bool rtl92e_set_rf_power_state(struct net_device *dev,
93 enum rt_rf_power_state eRFPowerState);
94 #define PHY_SetRFPowerState rtl92e_set_rf_power_state
96 void rtl92e_scan_op_backup(struct net_device *dev, u8 Operation);