drivers/staging/rtl8188eu/hal/usb_halinit.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  ******************************************************************************/
  15 #define _HCI_HAL_INIT_C_
  16
  17 #include <osdep_service.h>
  18 #include <drv_types.h>
  19 #include <rtw_efuse.h>
  20 #include <fw.h>
  21 #include <rtl8188e_hal.h>
  22 #include <rtl8188e_led.h>
  23 #include <rtw_iol.h>
  24 #include <phy.h>
  25
  26 #define         HAL_BB_ENABLE           1
  27
  28 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
  29 {
  30         struct hal_data_8188e *haldata = adapt->HalData;
  31
  32         switch (NumOutPipe) {
  33         case    3:
  34                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
  35                 haldata->OutEpNumber = 3;
  36                 break;
  37         case    2:
  38                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
  39                 haldata->OutEpNumber = 2;
  40                 break;
  41         case    1:
  42                 haldata->OutEpQueueSel = TX_SELE_HQ;
  43                 haldata->OutEpNumber = 1;
  44                 break;
  45         default:
  46                 break;
  47         }
  48         DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
  49 }
  50
  51 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
  52 {
  53         bool                    result          = false;
  54
  55         _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
  56
  57         /*  Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
  58         if (adapt->HalData->OutEpNumber == 1) {
  59                 if (NumInPipe != 1)
  60                         return result;
  61         }
  62
  63         /*  All config other than above support one Bulk IN and one Interrupt IN. */
  64
  65         result = Hal_MappingOutPipe(adapt, NumOutPipe);
  66
  67         return result;
  68 }
  69
  70 void rtw_hal_chip_configure(struct adapter *adapt)
  71 {
  72         struct hal_data_8188e *haldata = adapt->HalData;
  73         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(adapt);
  74
  75         if (pdvobjpriv->ishighspeed)
  76                 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
  77         else
  78                 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
  79
  80         haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
  81
  82         haldata->UsbTxAggMode           = 1;
  83         haldata->UsbTxAggDescNum        = 0x6;  /*  only 4 bits */
  84
  85         haldata->UsbRxAggMode           = USB_RX_AGG_DMA;/*  USB_RX_AGG_DMA; */
  86         haldata->UsbRxAggBlockCount     = 8; /* unit : 512b */
  87         haldata->UsbRxAggBlockTimeout   = 0x6;
  88         haldata->UsbRxAggPageCount      = 48; /* uint :128 b 0x0A;      10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
  89         haldata->UsbRxAggPageTimeout    = 0x4; /* 6, absolute time = 34ms/(2^6) */
  90
  91         HalUsbSetQueuePipeMapping8188EUsb(adapt,
  92                                 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
  93 }
  94
  95 u32 rtw_hal_power_on(struct adapter *adapt)
  96 {
  97         u16 value16;
  98         /*  HW Power on sequence */
  99         if (adapt->HalData->bMacPwrCtrlOn)
 100                 return _SUCCESS;
 101
 102         if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
 103                                       Rtl8188E_NIC_PWR_ON_FLOW)) {
 104                 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
 105                 return _FAIL;
 106         }
 107
 108         /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 109         /*  Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 110         usb_write16(adapt, REG_CR, 0x00);  /* suggseted by zhouzhou, by page, 20111230 */
 111
 112                 /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 113         value16 = usb_read16(adapt, REG_CR);
 114         value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 115                                 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 116         /*  for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 117
 118         usb_write16(adapt, REG_CR, value16);
 119         adapt->HalData->bMacPwrCtrlOn = true;
 120
 121         return _SUCCESS;
 122 }
 123
 124 /*  Shall USB interface init this? */
 125 static void _InitInterrupt(struct adapter *Adapter)
 126 {
 127         u32 imr, imr_ex;
 128         u8  usb_opt;
 129
 130         /* HISR write one to clear */
 131         usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
 132         /*  HIMR - */
 133         imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
 134         usb_write32(Adapter, REG_HIMR_88E, imr);
 135         Adapter->HalData->IntrMask[0] = imr;
 136
 137         imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
 138         usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
 139         Adapter->HalData->IntrMask[1] = imr_ex;
 140
 141         /*  REG_USB_SPECIAL_OPTION - BIT(4) */
 142         /*  0; Use interrupt endpoint to upload interrupt pkt */
 143         /*  1; Use bulk endpoint to upload interrupt pkt, */
 144         usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 145
 146         if (!adapter_to_dvobj(Adapter)->ishighspeed)
 147                 usb_opt = usb_opt & (~INT_BULK_SEL);
 148         else
 149                 usb_opt = usb_opt | (INT_BULK_SEL);
 150
 151         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
 152 }
 153
 154 static void _InitQueueReservedPage(struct adapter *Adapter)
 155 {
 156         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 157         u32 numHQ       = 0;
 158         u32 numLQ       = 0;
 159         u32 numNQ       = 0;
 160         u32 numPubQ;
 161         u32 value32;
 162         u8 value8;
 163         bool bWiFiConfig = pregistrypriv->wifi_spec;
 164
 165         if (bWiFiConfig) {
 166                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_HQ)
 167                         numHQ =  0x29;
 168
 169                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_LQ)
 170                         numLQ = 0x1C;
 171
 172                 /*  NOTE: This step shall be proceed before writing REG_RQPN. */
 173                 if (Adapter->HalData->OutEpQueueSel & TX_SELE_NQ)
 174                         numNQ = 0x1C;
 175                 value8 = (u8)_NPQ(numNQ);
 176                 usb_write8(Adapter, REG_RQPN_NPQ, value8);
 177
 178                 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
 179
 180                 /*  TX DMA */
 181                 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 182                 usb_write32(Adapter, REG_RQPN, value32);
 183         } else {
 184                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
 185                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
 186                 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
 187         }
 188 }
 189
 190 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
 191 {
 192         usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 193         usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 194         usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 195         usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 196         usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
 197 }
 198
 199 static void _InitPageBoundary(struct adapter *Adapter)
 200 {
 201         /*  RX Page Boundary */
 202         /*  */
 203         u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
 204
 205         usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 206 }
 207
 208 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
 209                                        u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
 210                                        u16 hiQ)
 211 {
 212         u16 value16     = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 213
 214         value16 |= _TXDMA_BEQ_MAP(beQ)  | _TXDMA_BKQ_MAP(bkQ) |
 215                    _TXDMA_VIQ_MAP(viQ)  | _TXDMA_VOQ_MAP(voQ) |
 216                    _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
 217
 218         usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
 219 }
 220
 221 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
 222 {
 223         u16 value = 0;
 224
 225         switch (Adapter->HalData->OutEpQueueSel) {
 226         case TX_SELE_HQ:
 227                 value = QUEUE_HIGH;
 228                 break;
 229         case TX_SELE_LQ:
 230                 value = QUEUE_LOW;
 231                 break;
 232         case TX_SELE_NQ:
 233                 value = QUEUE_NORMAL;
 234                 break;
 235         default:
 236                 break;
 237         }
 238         _InitNormalChipRegPriority(Adapter, value, value, value, value,
 239                                    value, value);
 240 }
 241
 242 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
 243 {
 244         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 245         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 246         u16 valueHi = 0;
 247         u16 valueLow = 0;
 248
 249         switch (Adapter->HalData->OutEpQueueSel) {
 250         case (TX_SELE_HQ | TX_SELE_LQ):
 251                 valueHi = QUEUE_HIGH;
 252                 valueLow = QUEUE_LOW;
 253                 break;
 254         case (TX_SELE_NQ | TX_SELE_LQ):
 255                 valueHi = QUEUE_NORMAL;
 256                 valueLow = QUEUE_LOW;
 257                 break;
 258         case (TX_SELE_HQ | TX_SELE_NQ):
 259                 valueHi = QUEUE_HIGH;
 260                 valueLow = QUEUE_NORMAL;
 261                 break;
 262         default:
 263                 break;
 264         }
 265
 266         if (!pregistrypriv->wifi_spec) {
 267                 beQ     = valueLow;
 268                 bkQ     = valueLow;
 269                 viQ     = valueHi;
 270                 voQ     = valueHi;
 271                 mgtQ    = valueHi;
 272                 hiQ     = valueHi;
 273         } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
 274                 beQ     = valueLow;
 275                 bkQ     = valueHi;
 276                 viQ     = valueHi;
 277                 voQ     = valueLow;
 278                 mgtQ    = valueHi;
 279                 hiQ     = valueHi;
 280         }
 281         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 282 }
 283
 284 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
 285 {
 286         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 287         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 288
 289         if (!pregistrypriv->wifi_spec) {/*  typical setting */
 290                 beQ     = QUEUE_LOW;
 291                 bkQ     = QUEUE_LOW;
 292                 viQ     = QUEUE_NORMAL;
 293                 voQ     = QUEUE_HIGH;
 294                 mgtQ    = QUEUE_HIGH;
 295                 hiQ     = QUEUE_HIGH;
 296         } else {/*  for WMM */
 297                 beQ     = QUEUE_LOW;
 298                 bkQ     = QUEUE_NORMAL;
 299                 viQ     = QUEUE_NORMAL;
 300                 voQ     = QUEUE_HIGH;
 301                 mgtQ    = QUEUE_HIGH;
 302                 hiQ     = QUEUE_HIGH;
 303         }
 304         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 305 }
 306
 307 static void _InitQueuePriority(struct adapter *Adapter)
 308 {
 309         switch (Adapter->HalData->OutEpNumber) {
 310         case 1:
 311                 _InitNormalChipOneOutEpPriority(Adapter);
 312                 break;
 313         case 2:
 314                 _InitNormalChipTwoOutEpPriority(Adapter);
 315                 break;
 316         case 3:
 317                 _InitNormalChipThreeOutEpPriority(Adapter);
 318                 break;
 319         default:
 320                 break;
 321         }
 322 }
 323
 324 static void _InitNetworkType(struct adapter *Adapter)
 325 {
 326         u32 value32;
 327
 328         value32 = usb_read32(Adapter, REG_CR);
 329         /*  TODO: use the other function to set network type */
 330         value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 331
 332         usb_write32(Adapter, REG_CR, value32);
 333 }
 334
 335 static void _InitTransferPageSize(struct adapter *Adapter)
 336 {
 337         /*  Tx page size is always 128. */
 338
 339         u8 value8;
 340
 341         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 342         usb_write8(Adapter, REG_PBP, value8);
 343 }
 344
 345 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
 346 {
 347         usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 348 }
 349
 350 static void _InitWMACSetting(struct adapter *Adapter)
 351 {
 352         struct hal_data_8188e *haldata = Adapter->HalData;
 353
 354         haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
 355                                   RCR_CBSSID_DATA | RCR_CBSSID_BCN |
 356                                   RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
 357                                   RCR_APP_MIC | RCR_APP_PHYSTS;
 358
 359         /*  some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
 360         usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
 361
 362         /*  Accept all multicast address */
 363         usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
 364         usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
 365 }
 366
 367 static void _InitAdaptiveCtrl(struct adapter *Adapter)
 368 {
 369         u16 value16;
 370         u32 value32;
 371
 372         /*  Response Rate Set */
 373         value32 = usb_read32(Adapter, REG_RRSR);
 374         value32 &= ~RATE_BITMAP_ALL;
 375         value32 |= RATE_RRSR_CCK_ONLY_1M;
 376         usb_write32(Adapter, REG_RRSR, value32);
 377
 378         /*  CF-END Threshold */
 379
 380         /*  SIFS (used in NAV) */
 381         value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 382         usb_write16(Adapter, REG_SPEC_SIFS, value16);
 383
 384         /*  Retry Limit */
 385         value16 = _LRL(0x30) | _SRL(0x30);
 386         usb_write16(Adapter, REG_RL, value16);
 387 }
 388
 389 static void _InitEDCA(struct adapter *Adapter)
 390 {
 391         /*  Set Spec SIFS (used in NAV) */
 392         usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
 393         usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
 394
 395         /*  Set SIFS for CCK */
 396         usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
 397
 398         /*  Set SIFS for OFDM */
 399         usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
 400
 401         /*  TXOP */
 402         usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 403         usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 404         usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
 405         usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
 406 }
 407
 408 static void _InitRDGSetting(struct adapter *Adapter)
 409 {
 410         usb_write8(Adapter, REG_RD_CTRL, 0xFF);
 411         usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
 412         usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
 413 }
 414
 415 static void _InitRxSetting(struct adapter *Adapter)
 416 {
 417         usb_write32(Adapter, REG_MACID, 0x87654321);
 418         usb_write32(Adapter, 0x0700, 0x87654321);
 419 }
 420
 421 static void _InitRetryFunction(struct adapter *Adapter)
 422 {
 423         u8 value8;
 424
 425         value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
 426         value8 |= EN_AMPDU_RTY_NEW;
 427         usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
 428
 429         /*  Set ACK timeout */
 430         usb_write8(Adapter, REG_ACKTO, 0x40);
 431 }
 432
 433 /*-----------------------------------------------------------------------------
 434  * Function:    usb_AggSettingTxUpdate()
 435  *
 436  * Overview:    Separate TX/RX parameters update independent for TP detection and
 437  *                      dynamic TX/RX aggreagtion parameters update.
 438  *
 439  * Input:                       struct adapter *
 440  *
 441  * Output/Return:       NONE
 442  *
 443  * Revised History:
 444  *      When            Who             Remark
 445  *      12/10/2010      MHC             Separate to smaller function.
 446  *
 447  *---------------------------------------------------------------------------
 448  */
 449 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
 450 {
 451         struct hal_data_8188e *haldata = Adapter->HalData;
 452         u32 value32;
 453
 454         if (Adapter->registrypriv.wifi_spec)
 455                 haldata->UsbTxAggMode = false;
 456
 457         if (haldata->UsbTxAggMode) {
 458                 value32 = usb_read32(Adapter, REG_TDECTRL);
 459                 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
 460                 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
 461
 462                 usb_write32(Adapter, REG_TDECTRL, value32);
 463         }
 464 }       /*  usb_AggSettingTxUpdate */
 465
 466 /*-----------------------------------------------------------------------------
 467  * Function:    usb_AggSettingRxUpdate()
 468  *
 469  * Overview:    Separate TX/RX parameters update independent for TP detection and
 470  *                      dynamic TX/RX aggreagtion parameters update.
 471  *
 472  * Input:                       struct adapter *
 473  *
 474  * Output/Return:       NONE
 475  *
 476  * Revised History:
 477  *      When            Who             Remark
 478  *      12/10/2010      MHC             Separate to smaller function.
 479  *
 480  *---------------------------------------------------------------------------
 481  */
 482 static void
 483 usb_AggSettingRxUpdate(
 484                 struct adapter *Adapter
 485         )
 486 {
 487         struct hal_data_8188e *haldata = Adapter->HalData;
 488         u8 valueDMA;
 489         u8 valueUSB;
 490
 491         valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
 492         valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 493
 494         switch (haldata->UsbRxAggMode) {
 495         case USB_RX_AGG_DMA:
 496                 valueDMA |= RXDMA_AGG_EN;
 497                 valueUSB &= ~USB_AGG_EN;
 498                 break;
 499         case USB_RX_AGG_USB:
 500                 valueDMA &= ~RXDMA_AGG_EN;
 501                 valueUSB |= USB_AGG_EN;
 502                 break;
 503         case USB_RX_AGG_MIX:
 504                 valueDMA |= RXDMA_AGG_EN;
 505                 valueUSB |= USB_AGG_EN;
 506                 break;
 507         case USB_RX_AGG_DISABLE:
 508         default:
 509                 valueDMA &= ~RXDMA_AGG_EN;
 510                 valueUSB &= ~USB_AGG_EN;
 511                 break;
 512         }
 513
 514         usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
 515         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
 516
 517         switch (haldata->UsbRxAggMode) {
 518         case USB_RX_AGG_DMA:
 519                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 520                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
 521                 break;
 522         case USB_RX_AGG_USB:
 523                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 524                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 525                 break;
 526         case USB_RX_AGG_MIX:
 527                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 528                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
 529                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 530                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 531                 break;
 532         case USB_RX_AGG_DISABLE:
 533         default:
 534                 /*  TODO: */
 535                 break;
 536         }
 537
 538         switch (PBP_128) {
 539         case PBP_128:
 540                 haldata->HwRxPageSize = 128;
 541                 break;
 542         case PBP_64:
 543                 haldata->HwRxPageSize = 64;
 544                 break;
 545         case PBP_256:
 546                 haldata->HwRxPageSize = 256;
 547                 break;
 548         case PBP_512:
 549                 haldata->HwRxPageSize = 512;
 550                 break;
 551         case PBP_1024:
 552                 haldata->HwRxPageSize = 1024;
 553                 break;
 554         default:
 555                 break;
 556         }
 557 }       /*  usb_AggSettingRxUpdate */
 558
 559 static void InitUsbAggregationSetting(struct adapter *Adapter)
 560 {
 561         /*  Tx aggregation setting */
 562         usb_AggSettingTxUpdate(Adapter);
 563
 564         /*  Rx aggregation setting */
 565         usb_AggSettingRxUpdate(Adapter);
 566 }
 567
 568 static void _InitBeaconParameters(struct adapter *Adapter)
 569 {
 570         struct hal_data_8188e *haldata = Adapter->HalData;
 571
 572         usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
 573
 574         /*  TODO: Remove these magic number */
 575         usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
 576         usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*  5ms */
 577         usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /*  2ms */
 578
 579         /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
 580         /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
 581         usb_write16(Adapter, REG_BCNTCFG, 0x660F);
 582
 583         haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
 584         haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
 585         haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
 586         haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
 587         haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
 588 }
 589
 590 static void _BeaconFunctionEnable(struct adapter *Adapter,
 591                                   bool Enable, bool Linked)
 592 {
 593         usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
 594
 595         usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
 596 }
 597
 598 /*  Set CCK and OFDM Block "ON" */
 599 static void _BBTurnOnBlock(struct adapter *Adapter)
 600 {
 601         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 602         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 603 }
 604
 605 static void _InitAntenna_Selection(struct adapter *Adapter)
 606 {
 607         struct hal_data_8188e *haldata = Adapter->HalData;
 608
 609         if (haldata->AntDivCfg == 0)
 610                 return;
 611         DBG_88E("==>  %s ....\n", __func__);
 612
 613         usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23));
 614         phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
 615
 616         if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
 617                 haldata->CurAntenna = Antenna_A;
 618         else
 619                 haldata->CurAntenna = Antenna_B;
 620         DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
 621 }
 622
 623 /*-----------------------------------------------------------------------------
 624  * Function:    HwSuspendModeEnable92Cu()
 625  *
 626  * Overview:    HW suspend mode switch.
 627  *
 628  * Input:               NONE
 629  *
 630  * Output:      NONE
 631  *
 632  * Return:      NONE
 633  *
 634  * Revised History:
 635  *      When            Who             Remark
 636  *      08/23/2010      MHC             HW suspend mode switch test..
 637  *---------------------------------------------------------------------------
 638  */
 639 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
 640 {
 641         u8 val8;
 642         enum rt_rf_power_state rfpowerstate = rf_off;
 643
 644         if (adapt->pwrctrlpriv.bHWPowerdown) {
 645                 val8 = usb_read8(adapt, REG_HSISR);
 646                 DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8);
 647                 rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
 648         } else { /*  rf on/off */
 649                 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT(3)));
 650                 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
 651                 DBG_88E("GPIO_IN=%02x\n", val8);
 652                 rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
 653         }
 654         return rfpowerstate;
 655 }       /*  HalDetectPwrDownMode */
 656
 657 u32 rtl8188eu_hal_init(struct adapter *Adapter)
 658 {
 659         u8 value8 = 0;
 660         u16  value16;
 661         u8 txpktbuf_bndy;
 662         u32 status = _SUCCESS;
 663         struct hal_data_8188e *haldata = Adapter->HalData;
 664         struct pwrctrl_priv             *pwrctrlpriv = &Adapter->pwrctrlpriv;
 665         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 666         unsigned long init_start_time = jiffies;
 667
 668         #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
 669
 670         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
 671
 672         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 673                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 674                         rtl88eu_phy_iq_calibrate(Adapter, true);
 675                 } else {
 676                         rtl88eu_phy_iq_calibrate(Adapter, false);
 677                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 678                 }
 679
 680                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 681                 rtl88eu_phy_lc_calibrate(Adapter);
 682
 683                 goto exit;
 684         }
 685
 686         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
 687         status = rtw_hal_power_on(Adapter);
 688         if (status == _FAIL) {
 689                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
 690                 goto exit;
 691         }
 692
 693         /*  Save target channel */
 694         haldata->CurrentChannel = 6;/* default set to 6 */
 695
 696         if (pwrctrlpriv->reg_rfoff)
 697                 pwrctrlpriv->rf_pwrstate = rf_off;
 698
 699         /*  2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
 700         /*  HW GPIO pin. Before PHY_RFConfig8192C. */
 701         /*  2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
 702
 703         if (!pregistrypriv->wifi_spec) {
 704                 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
 705         } else {
 706                 /*  for WMM */
 707                 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
 708         }
 709
 710         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
 711         _InitQueueReservedPage(Adapter);
 712         _InitQueuePriority(Adapter);
 713         _InitPageBoundary(Adapter);
 714         _InitTransferPageSize(Adapter);
 715
 716         _InitTxBufferBoundary(Adapter, 0);
 717
 718         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
 719         if (Adapter->registrypriv.mp_mode == 1) {
 720                 _InitRxSetting(Adapter);
 721                 Adapter->bFWReady = false;
 722         } else {
 723                 status = rtl88eu_download_fw(Adapter);
 724
 725                 if (status) {
 726                         DBG_88E("%s: Download Firmware failed!!\n", __func__);
 727                         Adapter->bFWReady = false;
 728                         return status;
 729                 }
 730                 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
 731                 Adapter->bFWReady = true;
 732         }
 733         rtl8188e_InitializeFirmwareVars(Adapter);
 734
 735         rtl88eu_phy_mac_config(Adapter);
 736
 737         rtl88eu_phy_bb_config(Adapter);
 738
 739         rtl88eu_phy_rf_config(Adapter);
 740
 741         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
 742         status = rtl8188e_iol_efuse_patch(Adapter);
 743         if (status == _FAIL) {
 744                 DBG_88E("%s  rtl8188e_iol_efuse_patch failed\n", __func__);
 745                 goto exit;
 746         }
 747
 748         _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
 749
 750         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
 751         status =  InitLLTTable(Adapter, txpktbuf_bndy);
 752         if (status == _FAIL) {
 753                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
 754                 goto exit;
 755         }
 756
 757         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
 758         /*  Get Rx PHY status in order to report RSSI and others. */
 759         _InitDriverInfoSize(Adapter, DRVINFO_SZ);
 760
 761         _InitInterrupt(Adapter);
 762         hal_init_macaddr(Adapter);/* set mac_address */
 763         _InitNetworkType(Adapter);/* set msr */
 764         _InitWMACSetting(Adapter);
 765         _InitAdaptiveCtrl(Adapter);
 766         _InitEDCA(Adapter);
 767         _InitRetryFunction(Adapter);
 768         InitUsbAggregationSetting(Adapter);
 769         _InitBeaconParameters(Adapter);
 770         /*  Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
 771         /*  Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
 772         /*  Enable MACTXEN/MACRXEN block */
 773         value16 = usb_read16(Adapter, REG_CR);
 774         value16 |= (MACTXEN | MACRXEN);
 775         usb_write8(Adapter, REG_CR, value16);
 776
 777         if (haldata->bRDGEnable)
 778                 _InitRDGSetting(Adapter);
 779
 780         /* Enable TX Report */
 781         /* Enable Tx Report Timer */
 782         value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 783         usb_write8(Adapter,  REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
 784         /* Set MAX RPT MACID */
 785         usb_write8(Adapter,  REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
 786         /* Tx RPT Timer. Unit: 32us */
 787         usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
 788
 789         usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
 790
 791         usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 792         usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 793
 794         /* Keep RfRegChnlVal for later use. */
 795         haldata->RfRegChnlVal[0] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
 796         haldata->RfRegChnlVal[1] = rtw_hal_read_rfreg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
 797
 798 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
 799         _BBTurnOnBlock(Adapter);
 800
 801 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 802         invalidate_cam_all(Adapter);
 803
 804 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
 805         /*  2010/12/17 MH We need to set TX power according to EFUSE content at first. */
 806         phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
 807
 808 /*  Move by Neo for USB SS to below setp */
 809 /* _RfPowerSave(Adapter); */
 810
 811         _InitAntenna_Selection(Adapter);
 812
 813         /*  */
 814         /*  Disable BAR, suggested by Scott */
 815         /*  2010.04.09 add by hpfan */
 816         /*  */
 817         usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
 818
 819         /*  HW SEQ CTRL */
 820         /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
 821         usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
 822
 823         if (pregistrypriv->wifi_spec)
 824                 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
 825
 826         /* Nav limit , suggest by scott */
 827         usb_write8(Adapter, 0x652, 0x0);
 828
 829 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
 830         rtl8188e_InitHalDm(Adapter);
 831
 832         /*  2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
 833         /*  and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
 834         /*  call initstruct adapter. May cause some problem?? */
 835         /*  Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
 836         /*  in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
 837         /*  is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
 838         /*  Added by tynli. 2010.03.30. */
 839         pwrctrlpriv->rf_pwrstate = rf_on;
 840
 841         /*  enable Tx report. */
 842         usb_write8(Adapter,  REG_FWHW_TXQ_CTRL+1, 0x0F);
 843
 844         /*  Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
 845         usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
 846
 847         /* tynli_test_tx_report. */
 848         usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
 849
 850         /* enable tx DMA to drop the redundate data of packet */
 851         usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
 852
 853 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
 854                 /*  2010/08/26 MH Merge from 8192CE. */
 855         if (pwrctrlpriv->rf_pwrstate == rf_on) {
 856                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 857                         rtl88eu_phy_iq_calibrate(Adapter, true);
 858                 } else {
 859                         rtl88eu_phy_iq_calibrate(Adapter, false);
 860                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 861                 }
 862
 863 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
 864
 865                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 866
 867 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
 868                         rtl88eu_phy_lc_calibrate(Adapter);
 869         }
 870
 871 /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
 872 /*      _InitPABias(Adapter); */
 873         usb_write8(Adapter, REG_USB_HRPWM, 0);
 874
 875         /* ack for xmit mgmt frames. */
 876         usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
 877
 878 exit:
 879 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
 880
 881         DBG_88E("%s in %dms\n", __func__,
 882                 jiffies_to_msecs(jiffies - init_start_time));
 883
 884         return status;
 885 }
 886
 887 static void CardDisableRTL8188EU(struct adapter *Adapter)
 888 {
 889         u8 val8;
 890
 891         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
 892
 893         /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
 894         val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 895         usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT(1)));
 896
 897         /*  stop rx */
 898         usb_write8(Adapter, REG_CR, 0x0);
 899
 900         /*  Run LPS WL RFOFF flow */
 901         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 902                                  Rtl8188E_NIC_LPS_ENTER_FLOW);
 903
 904         /*  2. 0x1F[7:0] = 0            turn off RF */
 905
 906         val8 = usb_read8(Adapter, REG_MCUFWDL);
 907         if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
 908                 /*  Reset MCU 0x2[10]=0. */
 909                 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
 910                 val8 &= ~BIT(2);        /*  0x2[10], FEN_CPUEN */
 911                 usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
 912         }
 913
 914         /*  reset MCU ready status */
 915         usb_write8(Adapter, REG_MCUFWDL, 0);
 916
 917         /* YJ,add,111212 */
 918         /* Disable 32k */
 919         val8 = usb_read8(Adapter, REG_32K_CTRL);
 920         usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0)));
 921
 922         /*  Card disable power action flow */
 923         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 924                                  Rtl8188E_NIC_DISABLE_FLOW);
 925
 926         /*  Reset MCU IO Wrapper */
 927         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 928         usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT(3))));
 929         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 930         usb_write8(Adapter, REG_RSV_CTRL+1, val8 | BIT(3));
 931
 932         /* YJ,test add, 111207. For Power Consumption. */
 933         val8 = usb_read8(Adapter, GPIO_IN);
 934         usb_write8(Adapter, GPIO_OUT, val8);
 935         usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
 936
 937         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
 938         usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
 939         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
 940         usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
 941         usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
 942         Adapter->HalData->bMacPwrCtrlOn = false;
 943         Adapter->bFWReady = false;
 944 }
 945
 946 static void rtl8192cu_hw_power_down(struct adapter *adapt)
 947 {
 948         /*  2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
 949         /*  Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
 950
 951         /*  Enable register area 0x0-0xc. */
 952         usb_write8(adapt, REG_RSV_CTRL, 0x0);
 953         usb_write16(adapt, REG_APS_FSMCO, 0x8812);
 954 }
 955
 956 u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
 957 {
 958         DBG_88E("==> %s\n", __func__);
 959
 960         usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
 961         usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
 962
 963         DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
 964         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 965                 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 966                         rtl8192cu_hw_power_down(Adapter);
 967         } else {
 968                 if (Adapter->hw_init_completed) {
 969                         CardDisableRTL8188EU(Adapter);
 970
 971                         if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 972                                 rtl8192cu_hw_power_down(Adapter);
 973                 }
 974         }
 975         return _SUCCESS;
 976 }
 977
 978 u32 rtw_hal_inirp_init(struct adapter *Adapter)
 979 {
 980         u8 i;
 981         struct recv_buf *precvbuf;
 982         uint    status;
 983         struct recv_priv *precvpriv = &Adapter->recvpriv;
 984
 985         status = _SUCCESS;
 986
 987         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
 988                  ("===> usb_inirp_init\n"));
 989
 990         /* issue Rx irp to receive data */
 991         precvbuf = precvpriv->precv_buf;
 992         for (i = 0; i < NR_RECVBUFF; i++) {
 993                 if (usb_read_port(Adapter, RECV_BULK_IN_ADDR, precvbuf) == false) {
 994                         RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
 995                         status = _FAIL;
 996                         goto exit;
 997                 }
 998
 999                 precvbuf++;
1000         }
1001
1002 exit:
1003
1004         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
1005
1006
1007         return status;
1008 }
1009
1010 /*  */
1011 /*  */
1012 /*      EEPROM/EFUSE Content Parsing */
1013 /*  */
1014 /*  */
1015 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1016 {
1017         struct hal_data_8188e *haldata = adapt->HalData;
1018
1019         if (!AutoLoadFail) {
1020                 /*  VID, PID */
1021                 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1022                 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1023
1024                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1025                 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1026                 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1027         } else {
1028                 haldata->EEPROMVID                      = EEPROM_Default_VID;
1029                 haldata->EEPROMPID                      = EEPROM_Default_PID;
1030
1031                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1032                 haldata->EEPROMCustomerID               = EEPROM_Default_CustomerID;
1033                 haldata->EEPROMSubCustomerID    = EEPROM_Default_SubCustomerID;
1034         }
1035
1036         DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1037         DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1038 }
1039
1040 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1041 {
1042         u16 i;
1043         u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1044         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1045
1046         if (AutoLoadFail) {
1047                 for (i = 0; i < 6; i++)
1048                         eeprom->mac_addr[i] = sMacAddr[i];
1049         } else {
1050                 /* Read Permanent MAC address */
1051                 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1052         }
1053         RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1054                  ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
1055                  eeprom->mac_addr));
1056 }
1057
1058 static void
1059 readAdapterInfo_8188EU(
1060                 struct adapter *adapt
1061         )
1062 {
1063         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1064
1065         /* parse the eeprom/efuse content */
1066         Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1067         Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1068         Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1069
1070         Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1071         Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1072         Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1073         rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1074         Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1075         Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1076         Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1077         Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1078         Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1079 }
1080
1081 static void _ReadPROMContent(
1082         struct adapter *Adapter
1083         )
1084 {
1085         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1086         u8 eeValue;
1087
1088         /* check system boot selection */
1089         eeValue = usb_read8(Adapter, REG_9346CR);
1090         eeprom->EepromOrEfuse           = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1091         eeprom->bautoload_fail_flag     = (eeValue & EEPROM_EN) ? false : true;
1092
1093         DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1094                 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1095
1096         Hal_InitPGData88E(Adapter);
1097         readAdapterInfo_8188EU(Adapter);
1098 }
1099
1100 void rtw_hal_read_chip_info(struct adapter *Adapter)
1101 {
1102         unsigned long start = jiffies;
1103
1104         MSG_88E("====> %s\n", __func__);
1105
1106         _ReadPROMContent(Adapter);
1107
1108         MSG_88E("<==== %s in %d ms\n", __func__,
1109                 jiffies_to_msecs(jiffies - start));
1110 }
1111
1112 #define GPIO_DEBUG_PORT_NUM 0
1113 static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1114 {
1115 }
1116
1117 static void ResumeTxBeacon(struct adapter *adapt)
1118 {
1119         struct hal_data_8188e *haldata = adapt->HalData;
1120
1121         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1122         /*  which should be read from register to a global variable. */
1123
1124         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT(6));
1125         haldata->RegFwHwTxQCtrl |= BIT(6);
1126         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1127         haldata->RegReg542 |= BIT(0);
1128         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1129 }
1130
1131 static void StopTxBeacon(struct adapter *adapt)
1132 {
1133         struct hal_data_8188e *haldata = adapt->HalData;
1134
1135         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1136         /*  which should be read from register to a global variable. */
1137
1138         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
1139         haldata->RegFwHwTxQCtrl &= (~BIT(6));
1140         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1141         haldata->RegReg542 &= ~(BIT(0));
1142         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1143
1144          /* todo: CheckFwRsvdPageContent(Adapter);  2010.06.23. Added by tynli. */
1145 }
1146
1147 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1148 {
1149         u8 val8;
1150         u8 mode = *((u8 *)val);
1151
1152         /*  disable Port0 TSF update */
1153         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1154
1155         /*  set net_type */
1156         val8 = usb_read8(Adapter, MSR)&0x0c;
1157         val8 |= mode;
1158         usb_write8(Adapter, MSR, val8);
1159
1160         DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1161
1162         if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1163                 StopTxBeacon(Adapter);
1164
1165                 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1166         } else if (mode == _HW_STATE_ADHOC_) {
1167                 ResumeTxBeacon(Adapter);
1168                 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1169         } else if (mode == _HW_STATE_AP_) {
1170                 ResumeTxBeacon(Adapter);
1171
1172                 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1173
1174                 /* Set RCR */
1175                 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1176                 /* enable to rx data frame */
1177                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1178                 /* enable to rx ps-poll */
1179                 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1180
1181                 /* Beacon Control related register for first time */
1182                 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /*  2ms */
1183
1184                 usb_write8(Adapter, REG_ATIMWND, 0x0a); /*  10ms */
1185                 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1186                 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1187                 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/*  +32767 (~32ms) */
1188
1189                 /* reset TSF */
1190                 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1191
1192                 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1193                 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1194
1195                 /* enable BCN0 Function for if1 */
1196                 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1197                 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1198
1199                 /* dis BCN1 ATIM  WND if if2 is station */
1200                 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1201         }
1202 }
1203
1204 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1205 {
1206         u8 idx = 0;
1207         u32 reg_macid;
1208
1209         reg_macid = REG_MACID;
1210
1211         for (idx = 0; idx < 6; idx++)
1212                 usb_write8(Adapter, (reg_macid+idx), val[idx]);
1213 }
1214
1215 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1216 {
1217         u8 idx = 0;
1218         u32 reg_bssid;
1219
1220         reg_bssid = REG_BSSID;
1221
1222         for (idx = 0; idx < 6; idx++)
1223                 usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1224 }
1225
1226 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1227 {
1228         u32 bcn_ctrl_reg;
1229
1230         bcn_ctrl_reg = REG_BCN_CTRL;
1231
1232         if (*((u8 *)val))
1233                 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1234         else
1235                 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1236 }
1237
1238 void rtw_hal_set_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1239 {
1240         struct hal_data_8188e *haldata = Adapter->HalData;
1241         struct dm_priv  *pdmpriv = &haldata->dmpriv;
1242         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1243
1244         switch (variable) {
1245         case HW_VAR_MEDIA_STATUS:
1246                 {
1247                         u8 val8;
1248
1249                         val8 = usb_read8(Adapter, MSR)&0x0c;
1250                         val8 |= *((u8 *)val);
1251                         usb_write8(Adapter, MSR, val8);
1252                 }
1253                 break;
1254         case HW_VAR_MEDIA_STATUS1:
1255                 {
1256                         u8 val8;
1257
1258                         val8 = usb_read8(Adapter, MSR) & 0x03;
1259                         val8 |= *((u8 *)val) << 2;
1260                         usb_write8(Adapter, MSR, val8);
1261                 }
1262                 break;
1263         case HW_VAR_SET_OPMODE:
1264                 hw_var_set_opmode(Adapter, variable, val);
1265                 break;
1266         case HW_VAR_MAC_ADDR:
1267                 hw_var_set_macaddr(Adapter, variable, val);
1268                 break;
1269         case HW_VAR_BSSID:
1270                 hw_var_set_bssid(Adapter, variable, val);
1271                 break;
1272         case HW_VAR_BASIC_RATE:
1273                 {
1274                         u16 BrateCfg = 0;
1275                         u8 RateIndex = 0;
1276
1277                         /*  2007.01.16, by Emily */
1278                         /*  Select RRSR (in Legacy-OFDM and CCK) */
1279                         /*  For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1280                         /*  We do not use other rates. */
1281                         HalSetBrateCfg(Adapter, val, &BrateCfg);
1282                         DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1283
1284                         /* 2011.03.30 add by Luke Lee */
1285                         /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1286                         /* because CCK 2M has poor TXEVM */
1287                         /* CCK 5.5M & 11M ACK should be enabled for better performance */
1288
1289                         BrateCfg = (BrateCfg | 0xd) & 0x15d;
1290                         haldata->BasicRateSet = BrateCfg;
1291
1292                         BrateCfg |= 0x01; /*  default enable 1M ACK rate */
1293                         /*  Set RRSR rate table. */
1294                         usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1295                         usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1296                         usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1297
1298                         /*  Set RTS initial rate */
1299                         while (BrateCfg > 0x1) {
1300                                 BrateCfg >>= 1;
1301                                 RateIndex++;
1302                         }
1303                         /*  Ziv - Check */
1304                         usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1305                 }
1306                 break;
1307         case HW_VAR_TXPAUSE:
1308                 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1309                 break;
1310         case HW_VAR_BCN_FUNC:
1311                 hw_var_set_bcn_func(Adapter, variable, val);
1312                 break;
1313         case HW_VAR_CORRECT_TSF:
1314                 {
1315                         u64     tsf;
1316                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1317                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1318
1319                         tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */
1320
1321                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1322                                 StopTxBeacon(Adapter);
1323
1324                         /* disable related TSF function */
1325                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1326
1327                         usb_write32(Adapter, REG_TSFTR, tsf);
1328                         usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1329
1330                         /* enable related TSF function */
1331                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3));
1332
1333                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1334                                 ResumeTxBeacon(Adapter);
1335                 }
1336                 break;
1337         case HW_VAR_CHECK_BSSID:
1338                 if (*((u8 *)val)) {
1339                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1340                 } else {
1341                         u32 val32;
1342
1343                         val32 = usb_read32(Adapter, REG_RCR);
1344
1345                         val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1346
1347                         usb_write32(Adapter, REG_RCR, val32);
1348                 }
1349                 break;
1350         case HW_VAR_MLME_DISCONNECT:
1351                 /* Set RCR to not to receive data frame when NO LINK state */
1352                 /* reject all data frames */
1353                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1354
1355                 /* reset TSF */
1356                 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
1357
1358                 /* disable update TSF */
1359                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1360                 break;
1361         case HW_VAR_MLME_SITESURVEY:
1362                 if (*((u8 *)val)) { /* under sitesurvey */
1363                         /* config RCR to receive different BSSID & not to receive data frame */
1364                         u32 v = usb_read32(Adapter, REG_RCR);
1365
1366                         v &= ~(RCR_CBSSID_BCN);
1367                         usb_write32(Adapter, REG_RCR, v);
1368                         /* reject all data frame */
1369                         usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1370
1371                         /* disable update TSF */
1372                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1373                 } else { /* sitesurvey done */
1374                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1375                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1376
1377                         if ((is_client_associated_to_ap(Adapter)) ||
1378                             ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1379                                 /* enable to rx data frame */
1380                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1381
1382                                 /* enable update TSF */
1383                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1384                         } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1385                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1386                                 /* enable update TSF */
1387                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1388                         }
1389
1390                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1391                 }
1392                 break;
1393         case HW_VAR_MLME_JOIN:
1394                 {
1395                         u8 RetryLimit = 0x30;
1396                         u8 type = *((u8 *)val);
1397                         struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
1398
1399                         if (type == 0) { /*  prepare to join */
1400                                 /* enable to rx data frame.Accept all data frame */
1401                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1402
1403                                 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1404
1405                                 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1406                                         RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1407                                 else /*  Ad-hoc Mode */
1408                                         RetryLimit = 0x7;
1409                         } else if (type == 1) {
1410                                 /* joinbss_event call back when join res < 0 */
1411                                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1412                         } else if (type == 2) {
1413                                 /* sta add event call back */
1414                                 /* enable update TSF */
1415                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1416
1417                                 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1418                                         RetryLimit = 0x7;
1419                         }
1420                         usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1421                 }
1422                 break;
1423         case HW_VAR_BEACON_INTERVAL:
1424                 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1425                 break;
1426         case HW_VAR_SLOT_TIME:
1427                 {
1428                         u8 u1bAIFS, aSifsTime;
1429                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1430                         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1431
1432                         usb_write8(Adapter, REG_SLOT, val[0]);
1433
1434                         if (pmlmeinfo->WMM_enable == 0) {
1435                                 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1436                                         aSifsTime = 10;
1437                                 else
1438                                         aSifsTime = 16;
1439
1440                                 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1441
1442                                 /*  <Roger_EXP> Temporary removed, 2008.06.20. */
1443                                 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1444                                 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1445                                 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1446                                 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1447                         }
1448                 }
1449                 break;
1450         case HW_VAR_RESP_SIFS:
1451                 /* RESP_SIFS for CCK */
1452                 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /*  SIFS_T2T_CCK (0x08) */
1453                 usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
1454                 /* RESP_SIFS for OFDM */
1455                 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1456                 usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1457                 break;
1458         case HW_VAR_ACK_PREAMBLE:
1459                 {
1460                         u8 regTmp;
1461                         u8 bShortPreamble = *((bool *)val);
1462                         /*  Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1463                         regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1464                         if (bShortPreamble)
1465                                 regTmp |= 0x80;
1466
1467                         usb_write8(Adapter, REG_RRSR+2, regTmp);
1468                 }
1469                 break;
1470         case HW_VAR_SEC_CFG:
1471                 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1472                 break;
1473         case HW_VAR_DM_FUNC_OP:
1474                 if (val[0])
1475                         podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1476                 else
1477                         podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1478                 break;
1479         case HW_VAR_DM_FUNC_SET:
1480                 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1481                         pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1482                         podmpriv->SupportAbility =      pdmpriv->InitODMFlag;
1483                 } else {
1484                         podmpriv->SupportAbility |= *((u32 *)val);
1485                 }
1486                 break;
1487         case HW_VAR_DM_FUNC_CLR:
1488                 podmpriv->SupportAbility &= *((u32 *)val);
1489                 break;
1490         case HW_VAR_CAM_EMPTY_ENTRY:
1491                 {
1492                         u8 ucIndex = *((u8 *)val);
1493                         u8 i;
1494                         u32 ulCommand = 0;
1495                         u32 ulContent = 0;
1496                         u32 ulEncAlgo = CAM_AES;
1497
1498                         for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1499                                 /*  filled id in CAM config 2 byte */
1500                                 if (i == 0)
1501                                         ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1502                                 else
1503                                         ulContent = 0;
1504                                 /*  polling bit, and No Write enable, and address */
1505                                 ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1506                                 ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1507                                 /*  write content 0 is equall to mark invalid */
1508                                 usb_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
1509                                 usb_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
1510                         }
1511                 }
1512                 break;
1513         case HW_VAR_CAM_INVALID_ALL:
1514                 usb_write32(Adapter, RWCAM, BIT(31) | BIT(30));
1515                 break;
1516         case HW_VAR_CAM_WRITE:
1517                 {
1518                         u32 cmd;
1519
1520                         u32 *cam_val = (u32 *)val;
1521                         usb_write32(Adapter, WCAMI, cam_val[0]);
1522
1523                         cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1524                         usb_write32(Adapter, RWCAM, cmd);
1525                 }
1526                 break;
1527         case HW_VAR_AC_PARAM_VO:
1528                 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1529                 break;
1530         case HW_VAR_AC_PARAM_VI:
1531                 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1532                 break;
1533         case HW_VAR_AC_PARAM_BE:
1534                 haldata->AcParam_BE = ((u32 *)(val))[0];
1535                 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1536                 break;
1537         case HW_VAR_AC_PARAM_BK:
1538                 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1539                 break;
1540         case HW_VAR_ACM_CTRL:
1541                 {
1542                         u8 acm_ctrl = *((u8 *)val);
1543                         u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1544
1545                         if (acm_ctrl > 1)
1546                                 AcmCtrl = AcmCtrl | 0x1;
1547
1548                         if (acm_ctrl & BIT(3))
1549                                 AcmCtrl |= AcmHw_VoqEn;
1550                         else
1551                                 AcmCtrl &= (~AcmHw_VoqEn);
1552
1553                         if (acm_ctrl & BIT(2))
1554                                 AcmCtrl |= AcmHw_ViqEn;
1555                         else
1556                                 AcmCtrl &= (~AcmHw_ViqEn);
1557
1558                         if (acm_ctrl & BIT(1))
1559                                 AcmCtrl |= AcmHw_BeqEn;
1560                         else
1561                                 AcmCtrl &= (~AcmHw_BeqEn);
1562
1563                         DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1564                         usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1565                 }
1566                 break;
1567         case HW_VAR_AMPDU_MIN_SPACE:
1568                 {
1569                         u8 MinSpacingToSet;
1570                         u8 SecMinSpace;
1571
1572                         MinSpacingToSet = *((u8 *)val);
1573                         if (MinSpacingToSet <= 7) {
1574                                 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1575                                 case _NO_PRIVACY_:
1576                                 case _AES_:
1577                                         SecMinSpace = 0;
1578                                         break;
1579                                 case _WEP40_:
1580                                 case _WEP104_:
1581                                 case _TKIP_:
1582                                 case _TKIP_WTMIC_:
1583                                         SecMinSpace = 6;
1584                                         break;
1585                                 default:
1586                                         SecMinSpace = 7;
1587                                         break;
1588                                 }
1589                                 if (MinSpacingToSet < SecMinSpace)
1590                                         MinSpacingToSet = SecMinSpace;
1591                                 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1592                         }
1593                 }
1594                 break;
1595         case HW_VAR_AMPDU_FACTOR:
1596                 {
1597                         u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1598                         u8 FactorToSet;
1599                         u8 *pRegToSet;
1600                         u8 index = 0;
1601
1602                         pRegToSet = RegToSet_Normal; /*  0xb972a841; */
1603                         FactorToSet = *((u8 *)val);
1604                         if (FactorToSet <= 3) {
1605                                 FactorToSet = 1 << (FactorToSet + 2);
1606                                 if (FactorToSet > 0xf)
1607                                         FactorToSet = 0xf;
1608
1609                                 for (index = 0; index < 4; index++) {
1610                                         if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1611                                                 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1612
1613                                         if ((pRegToSet[index] & 0x0f) > FactorToSet)
1614                                                 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1615
1616                                         usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1617                                 }
1618                         }
1619                 }
1620                 break;
1621         case HW_VAR_RXDMA_AGG_PG_TH:
1622                 {
1623                         u8 threshold = *((u8 *)val);
1624
1625                         if (threshold == 0)
1626                                 threshold = haldata->UsbRxAggPageCount;
1627                         usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1628                 }
1629                 break;
1630         case HW_VAR_SET_RPWM:
1631                 break;
1632         case HW_VAR_H2C_FW_PWRMODE:
1633                 {
1634                         u8 psmode = (*(u8 *)val);
1635
1636                         /*  Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1637                         /*  saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1638                         if (psmode != PS_MODE_ACTIVE)
1639                                 ODM_RF_Saving(podmpriv, true);
1640                         rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1641                 }
1642                 break;
1643         case HW_VAR_H2C_FW_JOINBSSRPT:
1644                 {
1645                         u8 mstatus = (*(u8 *)val);
1646
1647                         rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1648                 }
1649                 break;
1650         case HW_VAR_INITIAL_GAIN:
1651                 {
1652                         struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1653                         u32 rx_gain = ((u32 *)(val))[0];
1654
1655                         if (rx_gain == 0xff) {/* restore rx gain */
1656                                 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1657                         } else {
1658                                 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1659                                 ODM_Write_DIG(podmpriv, rx_gain);
1660                         }
1661                 }
1662                 break;
1663         case HW_VAR_TRIGGER_GPIO_0:
1664                 rtl8192cu_trigger_gpio_0(Adapter);
1665                 break;
1666         case HW_VAR_RPT_TIMER_SETTING:
1667                 {
1668                         u16 min_rpt_time = (*(u16 *)val);
1669
1670                         ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1671                 }
1672                 break;
1673         case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1674                 {
1675                         u8 Optimum_antenna = (*(u8 *)val);
1676                         u8 Ant;
1677                         /* switch antenna to Optimum_antenna */
1678                         if (haldata->CurAntenna !=  Optimum_antenna) {
1679                                 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1680                                 rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1681
1682                                 haldata->CurAntenna = Optimum_antenna;
1683                         }
1684                 }
1685                 break;
1686         case HW_VAR_EFUSE_BYTES: /*  To set EFUE total used bytes, added by Roger, 2008.12.22. */
1687                 haldata->EfuseUsedBytes = *((u16 *)val);
1688                 break;
1689         case HW_VAR_FIFO_CLEARN_UP:
1690                 {
1691                         struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1692                         u8 trycnt = 100;
1693
1694                         /* pause tx */
1695                         usb_write8(Adapter, REG_TXPAUSE, 0xff);
1696
1697                         /* keep sn */
1698                         Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1699
1700                         if (!pwrpriv->bkeepfwalive) {
1701                                 /* RX DMA stop */
1702                                 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1703                                 do {
1704                                         if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1705                                                 break;
1706                                 } while (trycnt--);
1707                                 if (trycnt == 0)
1708                                         DBG_88E("Stop RX DMA failed......\n");
1709
1710                                 /* RQPN Load 0 */
1711                                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1712                                 usb_write32(Adapter, REG_RQPN, 0x80000000);
1713                                 mdelay(10);
1714                         }
1715                 }
1716                 break;
1717         case HW_VAR_CHECK_TXBUF:
1718                 break;
1719         case HW_VAR_APFM_ON_MAC:
1720                 haldata->bMacPwrCtrlOn = *val;
1721                 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1722                 break;
1723         case HW_VAR_TX_RPT_MAX_MACID:
1724                 {
1725                         u8 maxMacid = *val;
1726
1727                         DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1728                         usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1729                 }
1730                 break;
1731         case HW_VAR_H2C_MEDIA_STATUS_RPT:
1732                 rtl8188e_set_FwMediaStatus_cmd(Adapter, (*(__le16 *)val));
1733                 break;
1734         case HW_VAR_BCN_VALID:
1735                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1736                 usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT(0));
1737                 break;
1738         default:
1739                 break;
1740         }
1741 }
1742
1743 void rtw_hal_get_hwreg(struct adapter *Adapter, u8 variable, u8 *val)
1744 {
1745         switch (variable) {
1746         case HW_VAR_BASIC_RATE:
1747                 *((u16 *)(val)) = Adapter->HalData->BasicRateSet;
1748         case HW_VAR_TXPAUSE:
1749                 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1750                 break;
1751         case HW_VAR_BCN_VALID:
1752                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1753                 val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1754                 break;
1755         case HW_VAR_FWLPS_RF_ON:
1756                 {
1757                         /* When we halt NIC, we should check if FW LPS is leave. */
1758                         if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1759                                 /*  If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1760                                 /*  because Fw is unload. */
1761                                 val[0] = true;
1762                         } else {
1763                                 u32 valRCR;
1764
1765                                 valRCR = usb_read32(Adapter, REG_RCR);
1766                                 valRCR &= 0x00070000;
1767                                 if (valRCR)
1768                                         val[0] = false;
1769                                 else
1770                                         val[0] = true;
1771                         }
1772                 }
1773                 break;
1774         case HW_VAR_CURRENT_ANTENNA:
1775                 val[0] = Adapter->HalData->CurAntenna;
1776                 break;
1777         case HW_VAR_EFUSE_BYTES: /*  To get EFUE total used bytes, added by Roger, 2008.12.22. */
1778                 *((u16 *)(val)) = Adapter->HalData->EfuseUsedBytes;
1779                 break;
1780         case HW_VAR_APFM_ON_MAC:
1781                 *val = Adapter->HalData->bMacPwrCtrlOn;
1782                 break;
1783         case HW_VAR_CHK_HI_QUEUE_EMPTY:
1784                 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1785                 break;
1786         default:
1787                 break;
1788         }
1789 }
1790
1791 /*  */
1792 /*      Description: */
1793 /*              Query setting of specified variable. */
1794 /*  */
1795 u8 rtw_hal_get_def_var(
1796                 struct adapter *Adapter,
1797                 enum hal_def_variable eVariable,
1798                 void *pValue
1799         )
1800 {
1801         struct hal_data_8188e *haldata = Adapter->HalData;
1802         u8 bResult = _SUCCESS;
1803
1804         switch (eVariable) {
1805         case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1806                 {
1807                         struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1808                         struct sta_priv *pstapriv = &Adapter->stapriv;
1809                         struct sta_info *psta;
1810
1811                         psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1812                         if (psta)
1813                                 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1814                 }
1815                 break;
1816         case HAL_DEF_IS_SUPPORT_ANT_DIV:
1817                 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1818                 break;
1819         case HAL_DEF_CURRENT_ANTENNA:
1820                 *((u8 *)pValue) = haldata->CurAntenna;
1821                 break;
1822         case HAL_DEF_DRVINFO_SZ:
1823                 *((u32 *)pValue) = DRVINFO_SZ;
1824                 break;
1825         case HAL_DEF_MAX_RECVBUF_SZ:
1826                 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1827                 break;
1828         case HAL_DEF_RX_PACKET_OFFSET:
1829                 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1830                 break;
1831         case HAL_DEF_DBG_DM_FUNC:
1832                 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1833                 break;
1834         case HAL_DEF_RA_DECISION_RATE:
1835                 {
1836                         u8 MacID = *((u8 *)pValue);
1837
1838                         *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, MacID);
1839                 }
1840                 break;
1841         case HAL_DEF_RA_SGI:
1842                 {
1843                         u8 MacID = *((u8 *)pValue);
1844
1845                         *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&haldata->odmpriv, MacID);
1846                 }
1847                 break;
1848         case HAL_DEF_PT_PWR_STATUS:
1849                 {
1850                         u8 MacID = *((u8 *)pValue);
1851
1852                         *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, MacID);
1853                 }
1854                 break;
1855         case HW_VAR_MAX_RX_AMPDU_FACTOR:
1856                 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1857                 break;
1858         case HW_DEF_RA_INFO_DUMP:
1859                 {
1860                         u8 entry_id = *((u8 *)pValue);
1861
1862                         if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1863                                 DBG_88E("============ RA status check ===================\n");
1864                                 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1865                                         entry_id,
1866                                         haldata->odmpriv.RAInfo[entry_id].RateID,
1867                                         haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1868                                         haldata->odmpriv.RAInfo[entry_id].RateSGI,
1869                                         haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1870                                         haldata->odmpriv.RAInfo[entry_id].PTStage);
1871                         }
1872                 }
1873                 break;
1874         case HW_DEF_ODM_DBG_FLAG:
1875                 {
1876                         struct odm_dm_struct *dm_ocm = &haldata->odmpriv;
1877
1878                         pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1879                 }
1880                 break;
1881         case HAL_DEF_DBG_DUMP_RXPKT:
1882                 *((u8 *)pValue) = haldata->bDumpRxPkt;
1883                 break;
1884         case HAL_DEF_DBG_DUMP_TXPKT:
1885                 *((u8 *)pValue) = haldata->bDumpTxPkt;
1886                 break;
1887         default:
1888                 bResult = _FAIL;
1889                 break;
1890         }
1891
1892         return bResult;
1893 }
1894
1895 void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1896 {
1897         u8 init_rate = 0;
1898         u8 networkType, raid;
1899         u32 mask, rate_bitmap;
1900         u8 shortGIrate = false;
1901         int     supportRateNum = 0;
1902         struct sta_info *psta;
1903         struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv;
1904         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1905         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1906         struct wlan_bssid_ex    *cur_network = &pmlmeinfo->network;
1907
1908         if (mac_id >= NUM_STA) /* CAM_SIZE */
1909                 return;
1910         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1911         if (psta == NULL)
1912                 return;
1913         switch (mac_id) {
1914         case 0:/*  for infra mode */
1915                 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1916                 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
1917                 raid = networktype_to_raid(networkType);
1918                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1919                 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&pmlmeinfo->HT_caps) : 0;
1920                 if (support_short_GI(adapt, &pmlmeinfo->HT_caps))
1921                         shortGIrate = true;
1922                 break;
1923         case 1:/* for broadcast/multicast */
1924                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1925                 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1926                         networkType = WIRELESS_11B;
1927                 else
1928                         networkType = WIRELESS_11G;
1929                 raid = networktype_to_raid(networkType);
1930                 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1931                 break;
1932         default: /* for each sta in IBSS */
1933                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1934                 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
1935                 raid = networktype_to_raid(networkType);
1936                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1937
1938                 /* todo: support HT in IBSS */
1939                 break;
1940         }
1941
1942         rate_bitmap = ODM_Get_Rate_Bitmap(odmpriv, mac_id, mask, rssi_level);
1943         DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
1944                 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
1945
1946         mask &= rate_bitmap;
1947
1948         init_rate = get_highest_rate_idx(mask)&0x3f;
1949
1950         ODM_RA_UpdateRateInfo_8188E(odmpriv, mac_id, raid, mask, shortGIrate);
1951
1952         /* set ra_id */
1953         psta->raid = raid;
1954         psta->init_rate = init_rate;
1955 }
1956
1957 void rtw_hal_bcn_related_reg_setting(struct adapter *adapt)
1958 {
1959         u32 value32;
1960         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1961         struct mlme_ext_info    *pmlmeinfo = &pmlmeext->mlmext_info;
1962         u32 bcn_ctrl_reg                        = REG_BCN_CTRL;
1963         /* reset TSF, enable update TSF, correcting TSF On Beacon */
1964
1965         /* BCN interval */
1966         usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
1967         usb_write8(adapt, REG_ATIMWND, 0x02);/*  2ms */
1968
1969         _InitBeaconParameters(adapt);
1970
1971         usb_write8(adapt, REG_SLOT, 0x09);
1972
1973         value32 = usb_read32(adapt, REG_TCR);
1974         value32 &= ~TSFRST;
1975         usb_write32(adapt,  REG_TCR, value32);
1976
1977         value32 |= TSFRST;
1978         usb_write32(adapt, REG_TCR, value32);
1979
1980         /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
1981         usb_write8(adapt,  REG_RXTSF_OFFSET_CCK, 0x50);
1982         usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
1983
1984         _BeaconFunctionEnable(adapt, true, true);
1985
1986         ResumeTxBeacon(adapt);
1987
1988         usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1));
1989 }
1990
1991 void rtw_hal_def_value_init(struct adapter *adapt)
1992 {
1993         struct hal_data_8188e *haldata = adapt->HalData;
1994         struct pwrctrl_priv *pwrctrlpriv;
1995         u8 i;
1996
1997         pwrctrlpriv = &adapt->pwrctrlpriv;
1998
1999         /* init default value */
2000         if (!pwrctrlpriv->bkeepfwalive)
2001                 haldata->LastHMEBoxNum = 0;
2002
2003         /* init dm default value */
2004         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
2005         haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
2006         haldata->pwrGroupCnt = 0;
2007         haldata->PGMaxGroup = 13;
2008         haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
2009         for (i = 0; i < HP_THERMAL_NUM; i++)
2010                 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2011 }