3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2015 Intel Corporation.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
21 * Copyright(c) 2015 Intel Corporation.
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53 #include <rdma/ib_pma.h>
54 #define USE_PI_LED_ENABLE 1 /* use led enabled bit in struct
55 * opa_port_states, if available */
56 #include <rdma/opa_smi.h>
57 #include <rdma/opa_port_info.h>
58 #ifndef PI_LED_ENABLE_SUP
59 #define PI_LED_ENABLE_SUP 0
61 #include "opa_compat.h"
65 #define IB_VLARB_LOWPRI_0_31 1
66 #define IB_VLARB_LOWPRI_32_63 2
67 #define IB_VLARB_HIGHPRI_0_31 3
68 #define IB_VLARB_HIGHPRI_32_63 4
70 #define OPA_MAX_PREEMPT_CAP 32
71 #define OPA_VLARB_LOW_ELEMENTS 0
72 #define OPA_VLARB_HIGH_ELEMENTS 1
73 #define OPA_VLARB_PREEMPT_ELEMENTS 2
74 #define OPA_VLARB_PREEMPT_MATRIX 3
76 #define IB_PMA_PORT_COUNTERS_CONG cpu_to_be16(0xFF00)
78 struct ib_pma_portcounters_cong {
81 __be16 port_check_rate;
82 __be16 symbol_error_counter;
83 u8 link_error_recovery_counter;
84 u8 link_downed_counter;
85 __be16 port_rcv_errors;
86 __be16 port_rcv_remphys_errors;
87 __be16 port_rcv_switch_relay_errors;
88 __be16 port_xmit_discards;
89 u8 port_xmit_constraint_errors;
90 u8 port_rcv_constraint_errors;
92 u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
95 __be64 port_xmit_data;
97 __be64 port_xmit_packets;
98 __be64 port_rcv_packets;
99 __be64 port_xmit_wait;
100 __be64 port_adr_events;
103 #define IB_SMP_UNSUP_VERSION cpu_to_be16(0x0004)
104 #define IB_SMP_UNSUP_METHOD cpu_to_be16(0x0008)
105 #define IB_SMP_UNSUP_METH_ATTR cpu_to_be16(0x000C)
106 #define IB_SMP_INVALID_FIELD cpu_to_be16(0x001C)
108 #define OPA_MAX_PREEMPT_CAP 32
109 #define OPA_VLARB_LOW_ELEMENTS 0
110 #define OPA_VLARB_HIGH_ELEMENTS 1
111 #define OPA_VLARB_PREEMPT_ELEMENTS 2
112 #define OPA_VLARB_PREEMPT_MATRIX 3
114 #define HFI1_XMIT_RATE_UNSUPPORTED 0x0
115 #define HFI1_XMIT_RATE_PICO 0x7
116 /* number of 4nsec cycles equaling 2secs */
117 #define HFI1_CONG_TIMER_PSINTERVAL 0x1DCD64EC
119 #define IB_CC_SVCTYPE_RC 0x0
120 #define IB_CC_SVCTYPE_UC 0x1
121 #define IB_CC_SVCTYPE_RD 0x2
122 #define IB_CC_SVCTYPE_UD 0x3
126 * There should be an equivalent IB #define for the following, but
129 #define OPA_CC_LOG_TYPE_HFI 2
131 struct opa_hfi1_cong_log_event_internal {
137 s64 timestamp; /* wider than 32 bits to detect 32 bit rollover */
140 struct opa_hfi1_cong_log_event {
141 u8 local_qp_cn_entry[3];
142 u8 remote_qp_number_cn_entry[3];
143 u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */
145 __be32 remote_lid_cn_entry;
146 __be32 timestamp_cn_entry;
149 #define OPA_CONG_LOG_ELEMS 96
151 struct opa_hfi1_cong_log {
154 __be16 threshold_event_counter;
155 __be32 current_time_stamp;
156 u8 threshold_cong_event_map[OPA_MAX_SLS/8];
157 struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS];
160 #define IB_CC_TABLE_CAP_DEFAULT 31
162 /* Port control flags */
163 #define IB_CC_CCS_PC_SL_BASED 0x01
165 struct opa_congestion_setting_entry {
169 u8 trigger_threshold;
170 u8 ccti_min; /* min CCTI for cc table */
173 struct opa_congestion_setting_entry_shadow {
177 u8 trigger_threshold;
178 u8 ccti_min; /* min CCTI for cc table */
181 struct opa_congestion_setting_attr {
184 struct opa_congestion_setting_entry entries[OPA_MAX_SLS];
187 struct opa_congestion_setting_attr_shadow {
190 struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS];
193 #define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
194 #define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
196 /* 64 Congestion Control table entries in a single MAD */
197 #define IB_CCT_ENTRIES 64
198 #define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
200 struct ib_cc_table_entry {
201 __be16 entry; /* shift:2, multiplier:14 */
204 struct ib_cc_table_entry_shadow {
205 u16 entry; /* shift:2, multiplier:14 */
208 struct ib_cc_table_attr {
209 __be16 ccti_limit; /* max CCTI for cc table */
210 struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
213 struct ib_cc_table_attr_shadow {
214 u16 ccti_limit; /* max CCTI for cc table */
215 struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
218 #define CC_TABLE_SHADOW_MAX \
219 (IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
221 struct cc_table_shadow {
222 u16 ccti_limit; /* max CCTI for cc table */
223 struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
227 * struct cc_state combines the (active) per-port congestion control
228 * table, and the (active) per-SL congestion settings. cc_state data
229 * may need to be read in code paths that we want to be fast, so it
230 * is an RCU protected structure.
234 struct cc_table_shadow cct;
235 struct opa_congestion_setting_attr_shadow cong_setting;
239 * OPA BufferControl MAD
242 /* attribute modifier macros */
243 #define OPA_AM_NPORT_SHIFT 24
244 #define OPA_AM_NPORT_MASK 0xff
245 #define OPA_AM_NPORT_SMASK (OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT)
246 #define OPA_AM_NPORT(am) (((am) >> OPA_AM_NPORT_SHIFT) & \
249 #define OPA_AM_NBLK_SHIFT 24
250 #define OPA_AM_NBLK_MASK 0xff
251 #define OPA_AM_NBLK_SMASK (OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT)
252 #define OPA_AM_NBLK(am) (((am) >> OPA_AM_NBLK_SHIFT) & \
255 #define OPA_AM_START_BLK_SHIFT 0
256 #define OPA_AM_START_BLK_MASK 0xff
257 #define OPA_AM_START_BLK_SMASK (OPA_AM_START_BLK_MASK << \
258 OPA_AM_START_BLK_SHIFT)
259 #define OPA_AM_START_BLK(am) (((am) >> OPA_AM_START_BLK_SHIFT) & \
260 OPA_AM_START_BLK_MASK)
262 #define OPA_AM_PORTNUM_SHIFT 0
263 #define OPA_AM_PORTNUM_MASK 0xff
264 #define OPA_AM_PORTNUM_SMASK (OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT)
265 #define OPA_AM_PORTNUM(am) (((am) >> OPA_AM_PORTNUM_SHIFT) & \
268 #define OPA_AM_ASYNC_SHIFT 12
269 #define OPA_AM_ASYNC_MASK 0x1
270 #define OPA_AM_ASYNC_SMASK (OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT)
271 #define OPA_AM_ASYNC(am) (((am) >> OPA_AM_ASYNC_SHIFT) & \
274 #define OPA_AM_START_SM_CFG_SHIFT 9
275 #define OPA_AM_START_SM_CFG_MASK 0x1
276 #define OPA_AM_START_SM_CFG_SMASK (OPA_AM_START_SM_CFG_MASK << \
277 OPA_AM_START_SM_CFG_SHIFT)
278 #define OPA_AM_START_SM_CFG(am) (((am) >> OPA_AM_START_SM_CFG_SHIFT) \
279 & OPA_AM_START_SM_CFG_MASK)
281 #define OPA_AM_CI_ADDR_SHIFT 19
282 #define OPA_AM_CI_ADDR_MASK 0xfff
283 #define OPA_AM_CI_ADDR_SMASK (OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT)
284 #define OPA_AM_CI_ADDR(am) (((am) >> OPA_AM_CI_ADDR_SHIFT) & \
287 #define OPA_AM_CI_LEN_SHIFT 13
288 #define OPA_AM_CI_LEN_MASK 0x3f
289 #define OPA_AM_CI_LEN_SMASK (OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT)
290 #define OPA_AM_CI_LEN(am) (((am) >> OPA_AM_CI_LEN_SHIFT) & \
293 /* error info macros */
294 #define OPA_EI_STATUS_SMASK 0x80
295 #define OPA_EI_CODE_SMASK 0x0f
302 struct buffer_control {
304 __be16 overall_shared_limit;
305 struct vl_limit vl[OPA_MAX_VLS];
309 u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */
313 * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
314 * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
315 * We support 5 counters which only count the mandatory quantities.
317 #define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
318 #define COUNTER_MASK0_9 \
319 cpu_to_be32(COUNTER_MASK(1, 0) | \
320 COUNTER_MASK(1, 1) | \
321 COUNTER_MASK(1, 2) | \
322 COUNTER_MASK(1, 3) | \
325 #endif /* _HFI1_MAD_H */