drivers/staging/mt7621-dts/gbpc1.dts

   1 /dts-v1/;
   2
   3 #include "mt7621.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "gnubee,gb-pc1", "mediatek,mt7621-soc";
  10         model = "GB-PC1";
  11
  12         memory@0 {
  13                 device_type = "memory";
  14                 reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
  15         };
  16
  17         chosen {
  18                 bootargs = "console=ttyS0,57600";
  19         };
  20
  21         palmbus: palmbus@1E000000 {
  22                 i2c@900 {
  23                         status = "okay";
  24                 };
  25         };
  26
  27         gpio-keys {
  28                 compatible = "gpio-keys";
  29
  30                 reset {
  31                         label = "reset";
  32                         gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
  33                         linux,code = <KEY_RESTART>;
  34                 };
  35         };
  36
  37         gpio-leds {
  38                 compatible = "gpio-leds";
  39
  40                 system {
  41                         label = "gb-pc1:green:system";
  42                         gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
  43                 };
  44
  45                 status {
  46                         label = "gb-pc1:green:status";
  47                         gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
  48                 };
  49
  50                 lan1 {
  51                         label = "gb-pc1:green:lan1";
  52                         gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
  53                 };
  54
  55                 lan2 {
  56                         label = "gb-pc1:green:lan2";
  57                         gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
  58                 };
  59         };
  60 };
  61
  62 &sdhci {
  63         status = "okay";
  64 };
  65
  66 &spi0 {
  67         status = "okay";
  68
  69         m25p80@0 {
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72                 compatible = "jedec,spi-nor";
  73                 reg = <0>;
  74                 spi-max-frequency = <50000000>;
  75
  76                 partition@0 {
  77                         label = "u-boot";
  78                         reg = <0x0 0x30000>;
  79                         read-only;
  80                 };
  81
  82                 partition@30000 {
  83                         label = "u-boot-env";
  84                         reg = <0x30000 0x10000>;
  85                         read-only;
  86                 };
  87
  88                 factory: partition@40000 {
  89                         label = "factory";
  90                         reg = <0x40000 0x10000>;
  91                         read-only;
  92                 };
  93
  94                 partition@50000 {
  95                         label = "firmware";
  96                         reg = <0x50000 0x1FB0000>;
  97                 };
  98
  99         };
 100 };
 101
 102 &sysclock {
 103                         compatible = "fixed-clock";
 104                         /* This is normally 1/4 of cpuclock */
 105                         clock-frequency = <225000000>;
 106 };
 107
 108 &cpuclock {
 109                         compatible = "fixed-clock";
 110                         clock-frequency = <900000000>;
 111 };
 112
 113 &pcie {
 114         pinctrl-names = "default";
 115         pinctrl-0 = <&pcie_pins>;
 116         status = "okay";
 117 };
 118
 119 &ethernet {
 120         //mtd-mac-address = <&factory 0xe000>;
 121         gmac1: mac@0 {
 122                 compatible = "mediatek,eth-mac";
 123                 reg = <0>;
 124                 phy-handle = <&phy1>;
 125         };
 126
 127         mdio-bus {
 128                 phy1: ethernet-phy@1 {
 129                         reg = <1>;
 130                         phy-mode = "rgmii";
 131                 };
 132         };
 133 };
 134
 135 &pinctrl {
 136         state_default: pinctrl0 {
 137                 gpio {
 138                         ralink,group = "wdt", "rgmii2", "uart3";
 139                         ralink,function = "gpio";
 140                 };
 141         };
 142 };