1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* rkvcodec registers */
7 #define RKVDEC_REG_INTERRUPT 0x004
8 #define RKVDEC_INTERRUPT_DEC_E BIT(0)
9 #define RKVDEC_CONFIG_DEC_CLK_GATE_E BIT(1)
10 #define RKVDEC_E_STRMD_CLKGATE_DIS BIT(2)
11 #define RKVDEC_TIMEOUT_MODE BIT(3)
12 #define RKVDEC_IRQ_DIS BIT(4)
13 #define RKVDEC_TIMEOUT_E BIT(5)
14 #define RKVDEC_BUF_EMPTY_E BIT(6)
15 #define RKVDEC_STRM_E_WAITDECFIFO_EMPTY BIT(7)
16 #define RKVDEC_IRQ BIT(8)
17 #define RKVDEC_IRQ_RAW BIT(9)
18 #define RKVDEC_E_REWRITE_VALID BIT(10)
19 #define RKVDEC_COMMONIRQ_MODE BIT(11)
20 #define RKVDEC_RDY_STA BIT(12)
21 #define RKVDEC_BUS_STA BIT(13)
22 #define RKVDEC_ERR_STA BIT(14)
23 #define RKVDEC_TIMEOUT_STA BIT(15)
24 #define RKVDEC_BUF_EMPTY_STA BIT(16)
25 #define RKVDEC_COLMV_REF_ERR_STA BIT(17)
26 #define RKVDEC_CABU_END_STA BIT(18)
27 #define RKVDEC_H264ORVP9_ERR_MODE BIT(19)
28 #define RKVDEC_SOFTRST_EN_P BIT(20)
29 #define RKVDEC_FORCE_SOFTRESET_VALID BIT(21)
30 #define RKVDEC_SOFTRESET_RDY BIT(22)
32 #define RKVDEC_REG_SYSCTRL 0x008
33 #define RKVDEC_IN_ENDIAN BIT(0)
34 #define RKVDEC_IN_SWAP32_E BIT(1)
35 #define RKVDEC_IN_SWAP64_E BIT(2)
36 #define RKVDEC_STR_ENDIAN BIT(3)
37 #define RKVDEC_STR_SWAP32_E BIT(4)
38 #define RKVDEC_STR_SWAP64_E BIT(5)
39 #define RKVDEC_OUT_ENDIAN BIT(6)
40 #define RKVDEC_OUT_SWAP32_E BIT(7)
41 #define RKVDEC_OUT_CBCR_SWAP BIT(8)
42 #define RKVDEC_RLC_MODE_DIRECT_WRITE BIT(10)
43 #define RKVDEC_RLC_MODE BIT(11)
44 #define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12)
45 #define RKVDEC_MODE(x) (((x) & 0x03) << 20)
46 #define RKVDEC_MODE_H264 1
47 #define RKVDEC_MODE_VP9 2
48 #define RKVDEC_RPS_MODE BIT(24)
49 #define RKVDEC_STRM_MODE BIT(25)
50 #define RKVDEC_H264_STRM_LASTPKT BIT(26)
51 #define RKVDEC_H264_FIRSTSLICE_FLAG BIT(27)
52 #define RKVDEC_H264_FRAME_ORSLICE BIT(28)
53 #define RKVDEC_BUSPR_SLOT_DIS BIT(29)
55 #define RKVDEC_REG_PICPAR 0x00C
56 #define RKVDEC_Y_HOR_VIRSTRIDE(x) ((x) & 0x1ff)
57 #define RKVDEC_SLICE_NUM_HIGHBIT BIT(11)
58 #define RKVDEC_UV_HOR_VIRSTRIDE(x) (((x) & 0x1ff) << 12)
59 #define RKVDEC_SLICE_NUM_LOWBITS(x) (((x) & 0x7ff) << 21)
61 #define RKVDEC_REG_STRM_RLC_BASE 0x010
63 #define RKVDEC_REG_STRM_LEN 0x014
64 #define RKVDEC_STRM_LEN(x) ((x) & 0x7ffffff)
66 #define RKVDEC_REG_CABACTBL_PROB_BASE 0x018
67 #define RKVDEC_REG_DECOUT_BASE 0x01C
69 #define RKVDEC_REG_Y_VIRSTRIDE 0x020
70 #define RKVDEC_Y_VIRSTRIDE(x) ((x) & 0xfffff)
72 #define RKVDEC_REG_YUV_VIRSTRIDE 0x024
73 #define RKVDEC_YUV_VIRSTRIDE(x) ((x) & 0x1fffff)
74 #define RKVDEC_REG_H264_BASE_REFER(i) (((i) * 0x04) + 0x028)
76 #define RKVDEC_REG_H264_BASE_REFER15 0x0C0
77 #define RKVDEC_FIELD_REF BIT(0)
78 #define RKVDEC_TOPFIELD_USED_REF BIT(1)
79 #define RKVDEC_BOTFIELD_USED_REF BIT(2)
80 #define RKVDEC_COLMV_USED_FLAG_REF BIT(3)
82 #define RKVDEC_REG_VP9_LAST_FRAME_BASE 0x02c
83 #define RKVDEC_REG_VP9_GOLDEN_FRAME_BASE 0x030
84 #define RKVDEC_REG_VP9_ALTREF_FRAME_BASE 0x034
86 #define RKVDEC_REG_VP9_CPRHEADER_OFFSET 0x028
87 #define RKVDEC_VP9_CPRHEADER_OFFSET(x) ((x) & 0xffff)
89 #define RKVDEC_REG_VP9_REFERLAST_BASE 0x02C
90 #define RKVDEC_REG_VP9_REFERGOLDEN_BASE 0x030
91 #define RKVDEC_REG_VP9_REFERALFTER_BASE 0x034
93 #define RKVDEC_REG_VP9COUNT_BASE 0x038
94 #define RKVDEC_VP9COUNT_UPDATE_EN BIT(0)
96 #define RKVDEC_REG_VP9_SEGIDLAST_BASE 0x03C
97 #define RKVDEC_REG_VP9_SEGIDCUR_BASE 0x040
98 #define RKVDEC_REG_VP9_FRAME_SIZE(i) ((i) * 0x04 + 0x044)
99 #define RKVDEC_VP9_FRAMEWIDTH(x) (((x) & 0xffff) << 0)
100 #define RKVDEC_VP9_FRAMEHEIGHT(x) (((x) & 0xffff) << 16)
102 #define RKVDEC_VP9_SEGID_GRP(i) ((i) * 0x04 + 0x050)
103 #define RKVDEC_SEGID_ABS_DELTA(x) ((x) & 0x1)
104 #define RKVDEC_SEGID_FRAME_QP_DELTA_EN(x) (((x) & 0x1) << 1)
105 #define RKVDEC_SEGID_FRAME_QP_DELTA(x) (((x) & 0x1ff) << 2)
106 #define RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE_EN(x) (((x) & 0x1) << 11)
107 #define RKVDEC_SEGID_FRAME_LOOPFILTER_VALUE(x) (((x) & 0x7f) << 12)
108 #define RKVDEC_SEGID_REFERINFO_EN(x) (((x) & 0x1) << 19)
109 #define RKVDEC_SEGID_REFERINFO(x) (((x) & 0x03) << 20)
110 #define RKVDEC_SEGID_FRAME_SKIP_EN(x) (((x) & 0x1) << 22)
112 #define RKVDEC_VP9_CPRHEADER_CONFIG 0x070
113 #define RKVDEC_VP9_TX_MODE(x) ((x) & 0x07)
114 #define RKVDEC_VP9_FRAME_REF_MODE(x) (((x) & 0x03) << 3)
116 #define RKVDEC_VP9_REF_SCALE(i) ((i) * 0x04 + 0x074)
117 #define RKVDEC_VP9_REF_HOR_SCALE(x) ((x) & 0xffff)
118 #define RKVDEC_VP9_REF_VER_SCALE(x) (((x) & 0xffff) << 16)
120 #define RKVDEC_VP9_REF_DELTAS_LASTFRAME 0x080
121 #define RKVDEC_REF_DELTAS_LASTFRAME(pos, val) (((val) & 0x7f) << ((pos) * 7))
123 #define RKVDEC_VP9_INFO_LASTFRAME 0x084
124 #define RKVDEC_MODE_DELTAS_LASTFRAME(pos, val) (((val) & 0x7f) << ((pos) * 7))
125 #define RKVDEC_SEG_EN_LASTFRAME BIT(16)
126 #define RKVDEC_LAST_SHOW_FRAME BIT(17)
127 #define RKVDEC_LAST_INTRA_ONLY BIT(18)
128 #define RKVDEC_LAST_WIDHHEIGHT_EQCUR BIT(19)
129 #define RKVDEC_COLOR_SPACE_LASTKEYFRAME(x) (((x) & 0x07) << 20)
131 #define RKVDEC_VP9_INTERCMD_BASE 0x088
133 #define RKVDEC_VP9_INTERCMD_NUM 0x08C
134 #define RKVDEC_INTERCMD_NUM(x) ((x) & 0xffffff)
136 #define RKVDEC_VP9_LASTTILE_SIZE 0x090
137 #define RKVDEC_LASTTILE_SIZE(x) ((x) & 0xffffff)
139 #define RKVDEC_VP9_HOR_VIRSTRIDE(i) ((i) * 0x04 + 0x094)
140 #define RKVDEC_HOR_Y_VIRSTRIDE(x) ((x) & 0x1ff)
141 #define RKVDEC_HOR_UV_VIRSTRIDE(x) (((x) & 0x1ff) << 16)
143 #define RKVDEC_REG_H264_POC_REFER0(i) (((i) * 0x04) + 0x064)
144 #define RKVDEC_REG_H264_POC_REFER1(i) (((i) * 0x04) + 0x0C4)
145 #define RKVDEC_REG_H264_POC_REFER2(i) (((i) * 0x04) + 0x120)
146 #define RKVDEC_POC_REFER(x) ((x) & 0xffffffff)
148 #define RKVDEC_REG_CUR_POC0 0x0A0
149 #define RKVDEC_REG_CUR_POC1 0x128
150 #define RKVDEC_CUR_POC(x) ((x) & 0xffffffff)
152 #define RKVDEC_REG_RLCWRITE_BASE 0x0A4
153 #define RKVDEC_REG_PPS_BASE 0x0A8
154 #define RKVDEC_REG_RPS_BASE 0x0AC
156 #define RKVDEC_REG_STRMD_ERR_EN 0x0B0
157 #define RKVDEC_STRMD_ERR_EN(x) ((x) & 0xffffffff)
159 #define RKVDEC_REG_STRMD_ERR_STA 0x0B4
160 #define RKVDEC_STRMD_ERR_STA(x) ((x) & 0xfffffff)
161 #define RKVDEC_COLMV_ERR_REF_PICIDX(x) (((x) & 0x0f) << 28)
163 #define RKVDEC_REG_STRMD_ERR_CTU 0x0B8
164 #define RKVDEC_STRMD_ERR_CTU(x) ((x) & 0xff)
165 #define RKVDEC_STRMD_ERR_CTU_YOFFSET(x) (((x) & 0xff) << 8)
166 #define RKVDEC_STRMFIFO_SPACE2FULL(x) (((x) & 0x7f) << 16)
167 #define RKVDEC_VP9_ERR_EN_CTU0 BIT(24)
169 #define RKVDEC_REG_SAO_CTU_POS 0x0BC
170 #define RKVDEC_SAOWR_XOFFSET(x) ((x) & 0x1ff)
171 #define RKVDEC_SAOWR_YOFFSET(x) (((x) & 0x3ff) << 16)
173 #define RKVDEC_VP9_LAST_FRAME_YSTRIDE 0x0C0
174 #define RKVDEC_VP9_GOLDEN_FRAME_YSTRIDE 0x0C4
175 #define RKVDEC_VP9_ALTREF_FRAME_YSTRIDE 0x0C8
176 #define RKVDEC_VP9_REF_YSTRIDE(x) (((x) & 0xfffff) << 0)
178 #define RKVDEC_VP9_LAST_FRAME_YUVSTRIDE 0x0CC
179 #define RKVDEC_VP9_REF_YUVSTRIDE(x) (((x) & 0x1fffff) << 0)
181 #define RKVDEC_VP9_REF_COLMV_BASE 0x0D0
183 #define RKVDEC_REG_PERFORMANCE_CYCLE 0x100
184 #define RKVDEC_PERFORMANCE_CYCLE(x) ((x) & 0xffffffff)
186 #define RKVDEC_REG_AXI_DDR_RDATA 0x104
187 #define RKVDEC_AXI_DDR_RDATA(x) ((x) & 0xffffffff)
189 #define RKVDEC_REG_AXI_DDR_WDATA 0x108
190 #define RKVDEC_AXI_DDR_WDATA(x) ((x) & 0xffffffff)
192 #define RKVDEC_REG_FPGADEBUG_RESET 0x10C
193 #define RKVDEC_BUSIFD_RESETN BIT(0)
194 #define RKVDEC_CABAC_RESETN BIT(1)
195 #define RKVDEC_DEC_CTRL_RESETN BIT(2)
196 #define RKVDEC_TRANSD_RESETN BIT(3)
197 #define RKVDEC_INTRA_RESETN BIT(4)
198 #define RKVDEC_INTER_RESETN BIT(5)
199 #define RKVDEC_RECON_RESETN BIT(6)
200 #define RKVDEC_FILER_RESETN BIT(7)
202 #define RKVDEC_REG_PERFORMANCE_SEL 0x110
203 #define RKVDEC_PERF_SEL_CNT0(x) ((x) & 0x3f)
204 #define RKVDEC_PERF_SEL_CNT1(x) (((x) & 0x3f) << 8)
205 #define RKVDEC_PERF_SEL_CNT2(x) (((x) & 0x3f) << 16)
207 #define RKVDEC_REG_PERFORMANCE_CNT(i) ((i) * 0x04 + 0x114)
208 #define RKVDEC_PERF_CNT(x) ((x) & 0xffffffff)
210 #define RKVDEC_REG_H264_ERRINFO_BASE 0x12C
212 #define RKVDEC_REG_H264_ERRINFO_NUM 0x130
213 #define RKVDEC_SLICEDEC_NUM(x) ((x) & 0x3fff)
214 #define RKVDEC_STRMD_DECT_ERR_FLAG BIT(15)
215 #define RKVDEC_ERR_PKT_NUM(x) (((x) & 0x3fff) << 16)
217 #define RKVDEC_REG_H264_ERR_E 0x134
218 #define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff)
220 #define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410
221 #define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450
223 #endif /* RKVDEC_REGS_H_ */