2 * V4L2 Capture IC Preprocess Subdev for Freescale i.MX5/6 SOC
4 * This subdevice handles capture of video frames from the CSI or VDIC,
5 * which are routed directly to the Image Converter preprocess tasks,
6 * for resizing, colorspace conversion, and rotation.
8 * Copyright (c) 2012-2017 Mentor Graphics Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/sched.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
21 #include <linux/timer.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-ioctl.h>
25 #include <media/v4l2-mc.h>
26 #include <media/v4l2-subdev.h>
27 #include <media/imx.h>
28 #include "imx-media.h"
32 * Min/Max supported width and heights.
34 * We allow planar output, so we have to align width at the source pad
35 * by 16 pixels to meet IDMAC alignment requirements for possible planar
38 * TODO: move this into pad format negotiation, if capture device
39 * has not requested a planar format, we should allow 8 pixel
40 * alignment at the source pad.
42 #define MIN_W_SINK 176
43 #define MIN_H_SINK 144
44 #define MAX_W_SINK 4096
45 #define MAX_H_SINK 4096
46 #define W_ALIGN_SINK 3 /* multiple of 8 pixels */
47 #define H_ALIGN_SINK 1 /* multiple of 2 lines */
49 #define MAX_W_SRC 1024
50 #define MAX_H_SRC 1024
51 #define W_ALIGN_SRC 4 /* multiple of 16 pixels */
52 #define H_ALIGN_SRC 1 /* multiple of 2 lines */
54 #define S_ALIGN 1 /* multiple of 2 */
57 struct imx_media_dev *md;
58 struct imx_ic_priv *ic_priv;
59 struct media_pad pad[PRPENCVF_NUM_PADS];
60 /* the video device at output pad */
61 struct imx_media_video_dev *vdev;
63 /* lock to protect all members below */
66 /* IPU units we require */
69 struct ipuv3_channel *out_ch;
70 struct ipuv3_channel *rot_in_ch;
71 struct ipuv3_channel *rot_out_ch;
73 /* active vb2 buffers to send to video dev sink */
74 struct imx_media_buffer *active_vb2_buf[2];
75 struct imx_media_dma_buf underrun_buf;
77 int ipu_buf_num; /* ipu double buffer index: 0-1 */
79 /* the sink for the captured frames */
80 struct media_entity *sink;
81 /* the source subdev */
82 struct v4l2_subdev *src_sd;
84 struct v4l2_mbus_framefmt format_mbus[PRPENCVF_NUM_PADS];
85 const struct imx_media_pixfmt *cc[PRPENCVF_NUM_PADS];
86 struct v4l2_fract frame_interval;
88 struct imx_media_dma_buf rot_buf[2];
91 struct v4l2_ctrl_handler ctrl_hdlr;
92 int rotation; /* degrees */
96 /* derived from rotation, hflip, vflip controls */
97 enum ipu_rotate_mode rot_mode;
99 spinlock_t irqlock; /* protect eof_irq handler */
101 struct timer_list eof_timeout_timer;
106 u32 frame_sequence; /* frame sequence counter */
107 bool last_eof; /* waiting for last EOF at stream off */
108 bool nfb4eof; /* NFB4EOF encountered during streaming */
109 struct completion last_eof_comp;
112 static const struct prp_channels {
117 [IC_TASK_ENCODER] = {
118 .out_ch = IPUV3_CHANNEL_IC_PRP_ENC_MEM,
119 .rot_in_ch = IPUV3_CHANNEL_MEM_ROT_ENC,
120 .rot_out_ch = IPUV3_CHANNEL_ROT_ENC_MEM,
122 [IC_TASK_VIEWFINDER] = {
123 .out_ch = IPUV3_CHANNEL_IC_PRP_VF_MEM,
124 .rot_in_ch = IPUV3_CHANNEL_MEM_ROT_VF,
125 .rot_out_ch = IPUV3_CHANNEL_ROT_VF_MEM,
129 static inline struct prp_priv *sd_to_priv(struct v4l2_subdev *sd)
131 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
133 return ic_priv->task_priv;
136 static void prp_put_ipu_resources(struct prp_priv *priv)
139 ipu_ic_put(priv->ic);
143 ipu_idmac_put(priv->out_ch);
147 ipu_idmac_put(priv->rot_in_ch);
148 priv->rot_in_ch = NULL;
150 if (priv->rot_out_ch)
151 ipu_idmac_put(priv->rot_out_ch);
152 priv->rot_out_ch = NULL;
155 static int prp_get_ipu_resources(struct prp_priv *priv)
157 struct imx_ic_priv *ic_priv = priv->ic_priv;
159 struct ipuv3_channel *out_ch, *rot_in_ch, *rot_out_ch;
160 int ret, task = ic_priv->task_id;
162 priv->ipu = priv->md->ipu[ic_priv->ipu_id];
164 ic = ipu_ic_get(priv->ipu, task);
166 v4l2_err(&ic_priv->sd, "failed to get IC\n");
172 out_ch = ipu_idmac_get(priv->ipu, prp_channel[task].out_ch);
173 if (IS_ERR(out_ch)) {
174 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
175 prp_channel[task].out_ch);
176 ret = PTR_ERR(out_ch);
179 priv->out_ch = out_ch;
181 rot_in_ch = ipu_idmac_get(priv->ipu, prp_channel[task].rot_in_ch);
182 if (IS_ERR(rot_in_ch)) {
183 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
184 prp_channel[task].rot_in_ch);
185 ret = PTR_ERR(rot_in_ch);
188 priv->rot_in_ch = rot_in_ch;
190 rot_out_ch = ipu_idmac_get(priv->ipu, prp_channel[task].rot_out_ch);
191 if (IS_ERR(rot_out_ch)) {
192 v4l2_err(&ic_priv->sd, "could not get IDMAC channel %u\n",
193 prp_channel[task].rot_out_ch);
194 ret = PTR_ERR(rot_out_ch);
197 priv->rot_out_ch = rot_out_ch;
201 prp_put_ipu_resources(priv);
205 static void prp_vb2_buf_done(struct prp_priv *priv, struct ipuv3_channel *ch)
207 struct imx_media_video_dev *vdev = priv->vdev;
208 struct imx_media_buffer *done, *next;
209 struct vb2_buffer *vb;
212 done = priv->active_vb2_buf[priv->ipu_buf_num];
214 done->vbuf.field = vdev->fmt.fmt.pix.field;
215 done->vbuf.sequence = priv->frame_sequence;
216 vb = &done->vbuf.vb2_buf;
217 vb->timestamp = ktime_get_ns();
218 vb2_buffer_done(vb, priv->nfb4eof ?
219 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
222 priv->frame_sequence++;
223 priv->nfb4eof = false;
225 /* get next queued buffer */
226 next = imx_media_capture_device_next_buf(vdev);
228 phys = vb2_dma_contig_plane_dma_addr(&next->vbuf.vb2_buf, 0);
229 priv->active_vb2_buf[priv->ipu_buf_num] = next;
231 phys = priv->underrun_buf.phys;
232 priv->active_vb2_buf[priv->ipu_buf_num] = NULL;
235 if (ipu_idmac_buffer_is_ready(ch, priv->ipu_buf_num))
236 ipu_idmac_clear_buffer(ch, priv->ipu_buf_num);
238 ipu_cpmem_set_buffer(ch, priv->ipu_buf_num, phys);
241 static irqreturn_t prp_eof_interrupt(int irq, void *dev_id)
243 struct prp_priv *priv = dev_id;
244 struct ipuv3_channel *channel;
246 spin_lock(&priv->irqlock);
248 if (priv->last_eof) {
249 complete(&priv->last_eof_comp);
250 priv->last_eof = false;
254 channel = (ipu_rot_mode_is_irt(priv->rot_mode)) ?
255 priv->rot_out_ch : priv->out_ch;
257 prp_vb2_buf_done(priv, channel);
259 /* select new IPU buf */
260 ipu_idmac_select_buffer(channel, priv->ipu_buf_num);
261 /* toggle IPU double-buffer index */
262 priv->ipu_buf_num ^= 1;
264 /* bump the EOF timeout timer */
265 mod_timer(&priv->eof_timeout_timer,
266 jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
269 spin_unlock(&priv->irqlock);
273 static irqreturn_t prp_nfb4eof_interrupt(int irq, void *dev_id)
275 struct prp_priv *priv = dev_id;
276 struct imx_ic_priv *ic_priv = priv->ic_priv;
278 spin_lock(&priv->irqlock);
281 * this is not an unrecoverable error, just mark
282 * the next captured frame with vb2 error flag.
284 priv->nfb4eof = true;
286 v4l2_err(&ic_priv->sd, "NFB4EOF\n");
288 spin_unlock(&priv->irqlock);
294 * EOF timeout timer function.
297 * EOF timeout timer function. This is an unrecoverable condition
298 * without a stream restart.
300 static void prp_eof_timeout(struct timer_list *t)
302 struct prp_priv *priv = from_timer(priv, t, eof_timeout_timer);
303 struct imx_media_video_dev *vdev = priv->vdev;
304 struct imx_ic_priv *ic_priv = priv->ic_priv;
306 v4l2_err(&ic_priv->sd, "EOF timeout\n");
308 /* signal a fatal error to capture device */
309 imx_media_capture_device_error(vdev);
312 static void prp_setup_vb2_buf(struct prp_priv *priv, dma_addr_t *phys)
314 struct imx_media_video_dev *vdev = priv->vdev;
315 struct imx_media_buffer *buf;
318 for (i = 0; i < 2; i++) {
319 buf = imx_media_capture_device_next_buf(vdev);
321 priv->active_vb2_buf[i] = buf;
322 phys[i] = vb2_dma_contig_plane_dma_addr(
323 &buf->vbuf.vb2_buf, 0);
325 priv->active_vb2_buf[i] = NULL;
326 phys[i] = priv->underrun_buf.phys;
331 static void prp_unsetup_vb2_buf(struct prp_priv *priv,
332 enum vb2_buffer_state return_status)
334 struct imx_media_buffer *buf;
337 /* return any remaining active frames with return_status */
338 for (i = 0; i < 2; i++) {
339 buf = priv->active_vb2_buf[i];
341 struct vb2_buffer *vb = &buf->vbuf.vb2_buf;
343 vb->timestamp = ktime_get_ns();
344 vb2_buffer_done(vb, return_status);
349 static int prp_setup_channel(struct prp_priv *priv,
350 struct ipuv3_channel *channel,
351 enum ipu_rotate_mode rot_mode,
352 dma_addr_t addr0, dma_addr_t addr1,
353 bool rot_swap_width_height)
355 struct imx_media_video_dev *vdev = priv->vdev;
356 const struct imx_media_pixfmt *outcc;
357 struct v4l2_mbus_framefmt *infmt;
358 unsigned int burst_size;
359 struct ipu_image image;
362 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
365 ipu_cpmem_zero(channel);
367 memset(&image, 0, sizeof(image));
368 image.pix = vdev->fmt.fmt.pix;
369 image.rect.width = image.pix.width;
370 image.rect.height = image.pix.height;
372 if (rot_swap_width_height) {
373 swap(image.pix.width, image.pix.height);
374 swap(image.rect.width, image.rect.height);
375 /* recalc stride using swapped width */
376 image.pix.bytesperline = outcc->planar ?
378 (image.pix.width * outcc->bpp) >> 3;
384 if (channel == priv->out_ch || channel == priv->rot_out_ch) {
385 switch (image.pix.pixelformat) {
386 case V4L2_PIX_FMT_YUV420:
387 case V4L2_PIX_FMT_YVU420:
388 case V4L2_PIX_FMT_NV12:
389 /* Skip writing U and V components to odd rows */
390 ipu_cpmem_skip_odd_chroma_rows(channel);
395 ret = ipu_cpmem_set_image(channel, &image);
399 if (channel == priv->rot_in_ch ||
400 channel == priv->rot_out_ch) {
402 ipu_cpmem_set_block_mode(channel);
404 burst_size = (image.pix.width & 0xf) ? 8 : 16;
407 ipu_cpmem_set_burstsize(channel, burst_size);
410 ipu_cpmem_set_rotation(channel, rot_mode);
412 if (image.pix.field == V4L2_FIELD_NONE &&
413 V4L2_FIELD_HAS_BOTH(infmt->field) &&
414 channel == priv->out_ch)
415 ipu_cpmem_interlaced_scan(channel, image.pix.bytesperline);
417 ret = ipu_ic_task_idma_init(priv->ic, channel,
418 image.pix.width, image.pix.height,
419 burst_size, rot_mode);
423 ipu_cpmem_set_axi_id(channel, 1);
425 ipu_idmac_set_double_buffer(channel, true);
430 static int prp_setup_rotation(struct prp_priv *priv)
432 struct imx_media_video_dev *vdev = priv->vdev;
433 struct imx_ic_priv *ic_priv = priv->ic_priv;
434 const struct imx_media_pixfmt *outcc, *incc;
435 struct v4l2_mbus_framefmt *infmt;
436 struct v4l2_pix_format *outfmt;
440 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
441 outfmt = &vdev->fmt.fmt.pix;
442 incc = priv->cc[PRPENCVF_SINK_PAD];
445 ret = imx_media_alloc_dma_buf(priv->md, &priv->rot_buf[0],
448 v4l2_err(&ic_priv->sd, "failed to alloc rot_buf[0], %d\n", ret);
451 ret = imx_media_alloc_dma_buf(priv->md, &priv->rot_buf[1],
454 v4l2_err(&ic_priv->sd, "failed to alloc rot_buf[1], %d\n", ret);
458 ret = ipu_ic_task_init(priv->ic,
459 infmt->width, infmt->height,
460 outfmt->height, outfmt->width,
461 incc->cs, outcc->cs);
463 v4l2_err(&ic_priv->sd, "ipu_ic_task_init failed, %d\n", ret);
467 /* init the IC-PRP-->MEM IDMAC channel */
468 ret = prp_setup_channel(priv, priv->out_ch, IPU_ROTATE_NONE,
469 priv->rot_buf[0].phys, priv->rot_buf[1].phys,
472 v4l2_err(&ic_priv->sd,
473 "prp_setup_channel(out_ch) failed, %d\n", ret);
477 /* init the MEM-->IC-PRP ROT IDMAC channel */
478 ret = prp_setup_channel(priv, priv->rot_in_ch, priv->rot_mode,
479 priv->rot_buf[0].phys, priv->rot_buf[1].phys,
482 v4l2_err(&ic_priv->sd,
483 "prp_setup_channel(rot_in_ch) failed, %d\n", ret);
487 prp_setup_vb2_buf(priv, phys);
489 /* init the destination IC-PRP ROT-->MEM IDMAC channel */
490 ret = prp_setup_channel(priv, priv->rot_out_ch, IPU_ROTATE_NONE,
494 v4l2_err(&ic_priv->sd,
495 "prp_setup_channel(rot_out_ch) failed, %d\n", ret);
499 /* now link IC-PRP-->MEM to MEM-->IC-PRP ROT */
500 ipu_idmac_link(priv->out_ch, priv->rot_in_ch);
503 ipu_ic_enable(priv->ic);
505 /* set buffers ready */
506 ipu_idmac_select_buffer(priv->out_ch, 0);
507 ipu_idmac_select_buffer(priv->out_ch, 1);
508 ipu_idmac_select_buffer(priv->rot_out_ch, 0);
509 ipu_idmac_select_buffer(priv->rot_out_ch, 1);
511 /* enable the channels */
512 ipu_idmac_enable_channel(priv->out_ch);
513 ipu_idmac_enable_channel(priv->rot_in_ch);
514 ipu_idmac_enable_channel(priv->rot_out_ch);
516 /* and finally enable the IC PRP task */
517 ipu_ic_task_enable(priv->ic);
522 prp_unsetup_vb2_buf(priv, VB2_BUF_STATE_QUEUED);
524 imx_media_free_dma_buf(priv->md, &priv->rot_buf[1]);
526 imx_media_free_dma_buf(priv->md, &priv->rot_buf[0]);
530 static void prp_unsetup_rotation(struct prp_priv *priv)
532 ipu_ic_task_disable(priv->ic);
534 ipu_idmac_disable_channel(priv->out_ch);
535 ipu_idmac_disable_channel(priv->rot_in_ch);
536 ipu_idmac_disable_channel(priv->rot_out_ch);
538 ipu_idmac_unlink(priv->out_ch, priv->rot_in_ch);
540 ipu_ic_disable(priv->ic);
542 imx_media_free_dma_buf(priv->md, &priv->rot_buf[0]);
543 imx_media_free_dma_buf(priv->md, &priv->rot_buf[1]);
546 static int prp_setup_norotation(struct prp_priv *priv)
548 struct imx_media_video_dev *vdev = priv->vdev;
549 struct imx_ic_priv *ic_priv = priv->ic_priv;
550 const struct imx_media_pixfmt *outcc, *incc;
551 struct v4l2_mbus_framefmt *infmt;
552 struct v4l2_pix_format *outfmt;
556 infmt = &priv->format_mbus[PRPENCVF_SINK_PAD];
557 outfmt = &vdev->fmt.fmt.pix;
558 incc = priv->cc[PRPENCVF_SINK_PAD];
561 ret = ipu_ic_task_init(priv->ic,
562 infmt->width, infmt->height,
563 outfmt->width, outfmt->height,
564 incc->cs, outcc->cs);
566 v4l2_err(&ic_priv->sd, "ipu_ic_task_init failed, %d\n", ret);
570 prp_setup_vb2_buf(priv, phys);
572 /* init the IC PRP-->MEM IDMAC channel */
573 ret = prp_setup_channel(priv, priv->out_ch, priv->rot_mode,
574 phys[0], phys[1], false);
576 v4l2_err(&ic_priv->sd,
577 "prp_setup_channel(out_ch) failed, %d\n", ret);
581 ipu_cpmem_dump(priv->out_ch);
582 ipu_ic_dump(priv->ic);
585 ipu_ic_enable(priv->ic);
587 /* set buffers ready */
588 ipu_idmac_select_buffer(priv->out_ch, 0);
589 ipu_idmac_select_buffer(priv->out_ch, 1);
591 /* enable the channels */
592 ipu_idmac_enable_channel(priv->out_ch);
594 /* enable the IC task */
595 ipu_ic_task_enable(priv->ic);
600 prp_unsetup_vb2_buf(priv, VB2_BUF_STATE_QUEUED);
604 static void prp_unsetup_norotation(struct prp_priv *priv)
606 ipu_ic_task_disable(priv->ic);
607 ipu_idmac_disable_channel(priv->out_ch);
608 ipu_ic_disable(priv->ic);
611 static void prp_unsetup(struct prp_priv *priv,
612 enum vb2_buffer_state state)
614 if (ipu_rot_mode_is_irt(priv->rot_mode))
615 prp_unsetup_rotation(priv);
617 prp_unsetup_norotation(priv);
619 prp_unsetup_vb2_buf(priv, state);
622 static int prp_start(struct prp_priv *priv)
624 struct imx_ic_priv *ic_priv = priv->ic_priv;
625 struct imx_media_video_dev *vdev = priv->vdev;
626 struct v4l2_pix_format *outfmt;
629 ret = prp_get_ipu_resources(priv);
633 outfmt = &vdev->fmt.fmt.pix;
635 ret = imx_media_alloc_dma_buf(priv->md, &priv->underrun_buf,
640 priv->ipu_buf_num = 0;
642 /* init EOF completion waitq */
643 init_completion(&priv->last_eof_comp);
644 priv->frame_sequence = 0;
645 priv->last_eof = false;
646 priv->nfb4eof = false;
648 if (ipu_rot_mode_is_irt(priv->rot_mode))
649 ret = prp_setup_rotation(priv);
651 ret = prp_setup_norotation(priv);
653 goto out_free_underrun;
655 priv->nfb4eof_irq = ipu_idmac_channel_irq(priv->ipu,
658 ret = devm_request_irq(ic_priv->dev, priv->nfb4eof_irq,
659 prp_nfb4eof_interrupt, 0,
660 "imx-ic-prp-nfb4eof", priv);
662 v4l2_err(&ic_priv->sd,
663 "Error registering NFB4EOF irq: %d\n", ret);
667 if (ipu_rot_mode_is_irt(priv->rot_mode))
668 priv->eof_irq = ipu_idmac_channel_irq(
669 priv->ipu, priv->rot_out_ch, IPU_IRQ_EOF);
671 priv->eof_irq = ipu_idmac_channel_irq(
672 priv->ipu, priv->out_ch, IPU_IRQ_EOF);
674 ret = devm_request_irq(ic_priv->dev, priv->eof_irq,
675 prp_eof_interrupt, 0,
676 "imx-ic-prp-eof", priv);
678 v4l2_err(&ic_priv->sd,
679 "Error registering eof irq: %d\n", ret);
680 goto out_free_nfb4eof_irq;
684 ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 1);
685 ret = (ret && ret != -ENOIOCTLCMD) ? ret : 0;
687 v4l2_err(&ic_priv->sd,
688 "upstream stream on failed: %d\n", ret);
689 goto out_free_eof_irq;
692 /* start the EOF timeout timer */
693 mod_timer(&priv->eof_timeout_timer,
694 jiffies + msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
699 devm_free_irq(ic_priv->dev, priv->eof_irq, priv);
700 out_free_nfb4eof_irq:
701 devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv);
703 prp_unsetup(priv, VB2_BUF_STATE_QUEUED);
705 imx_media_free_dma_buf(priv->md, &priv->underrun_buf);
707 prp_put_ipu_resources(priv);
711 static void prp_stop(struct prp_priv *priv)
713 struct imx_ic_priv *ic_priv = priv->ic_priv;
717 /* mark next EOF interrupt as the last before stream off */
718 spin_lock_irqsave(&priv->irqlock, flags);
719 priv->last_eof = true;
720 spin_unlock_irqrestore(&priv->irqlock, flags);
723 * and then wait for interrupt handler to mark completion.
725 ret = wait_for_completion_timeout(
726 &priv->last_eof_comp,
727 msecs_to_jiffies(IMX_MEDIA_EOF_TIMEOUT));
729 v4l2_warn(&ic_priv->sd, "wait last EOF timeout\n");
732 ret = v4l2_subdev_call(priv->src_sd, video, s_stream, 0);
733 if (ret && ret != -ENOIOCTLCMD)
734 v4l2_warn(&ic_priv->sd,
735 "upstream stream off failed: %d\n", ret);
737 devm_free_irq(ic_priv->dev, priv->eof_irq, priv);
738 devm_free_irq(ic_priv->dev, priv->nfb4eof_irq, priv);
740 prp_unsetup(priv, VB2_BUF_STATE_ERROR);
742 imx_media_free_dma_buf(priv->md, &priv->underrun_buf);
744 /* cancel the EOF timeout timer */
745 del_timer_sync(&priv->eof_timeout_timer);
747 prp_put_ipu_resources(priv);
750 static struct v4l2_mbus_framefmt *
751 __prp_get_fmt(struct prp_priv *priv, struct v4l2_subdev_pad_config *cfg,
752 unsigned int pad, enum v4l2_subdev_format_whence which)
754 struct imx_ic_priv *ic_priv = priv->ic_priv;
756 if (which == V4L2_SUBDEV_FORMAT_TRY)
757 return v4l2_subdev_get_try_format(&ic_priv->sd, cfg, pad);
759 return &priv->format_mbus[pad];
763 * Applies IC resizer and IDMAC alignment restrictions to output
764 * rectangle given the input rectangle, and depending on given
767 * The IC resizer cannot downsize more than 4:1. Note also that
768 * for 90 or 270 rotation, _both_ output width and height must
769 * be aligned by W_ALIGN_SRC, because the intermediate rotation
770 * buffer swaps output width/height, and the final output buffer
773 * Returns true if the output rectangle was modified.
775 static bool prp_bound_align_output(struct v4l2_mbus_framefmt *outfmt,
776 struct v4l2_mbus_framefmt *infmt,
777 enum ipu_rotate_mode rot_mode)
779 u32 orig_width = outfmt->width;
780 u32 orig_height = outfmt->height;
782 if (ipu_rot_mode_is_irt(rot_mode))
783 v4l_bound_align_image(&outfmt->width,
784 infmt->height / 4, MAX_H_SRC,
787 infmt->width / 4, MAX_W_SRC,
788 W_ALIGN_SRC, S_ALIGN);
790 v4l_bound_align_image(&outfmt->width,
791 infmt->width / 4, MAX_W_SRC,
794 infmt->height / 4, MAX_H_SRC,
795 H_ALIGN_SRC, S_ALIGN);
797 return outfmt->width != orig_width || outfmt->height != orig_height;
801 * V4L2 subdev operations.
804 static int prp_enum_mbus_code(struct v4l2_subdev *sd,
805 struct v4l2_subdev_pad_config *cfg,
806 struct v4l2_subdev_mbus_code_enum *code)
808 if (code->pad >= PRPENCVF_NUM_PADS)
811 return imx_media_enum_ipu_format(&code->code, code->index, CS_SEL_ANY);
814 static int prp_get_fmt(struct v4l2_subdev *sd,
815 struct v4l2_subdev_pad_config *cfg,
816 struct v4l2_subdev_format *sdformat)
818 struct prp_priv *priv = sd_to_priv(sd);
819 struct v4l2_mbus_framefmt *fmt;
822 if (sdformat->pad >= PRPENCVF_NUM_PADS)
825 mutex_lock(&priv->lock);
827 fmt = __prp_get_fmt(priv, cfg, sdformat->pad, sdformat->which);
833 sdformat->format = *fmt;
835 mutex_unlock(&priv->lock);
839 static void prp_try_fmt(struct prp_priv *priv,
840 struct v4l2_subdev_pad_config *cfg,
841 struct v4l2_subdev_format *sdformat,
842 const struct imx_media_pixfmt **cc)
844 struct v4l2_mbus_framefmt *infmt;
846 *cc = imx_media_find_ipu_format(sdformat->format.code, CS_SEL_ANY);
850 imx_media_enum_ipu_format(&code, 0, CS_SEL_ANY);
851 *cc = imx_media_find_ipu_format(code, CS_SEL_ANY);
852 sdformat->format.code = (*cc)->codes[0];
855 infmt = __prp_get_fmt(priv, cfg, PRPENCVF_SINK_PAD, sdformat->which);
857 if (sdformat->pad == PRPENCVF_SRC_PAD) {
858 if (sdformat->format.field != V4L2_FIELD_NONE)
859 sdformat->format.field = infmt->field;
861 prp_bound_align_output(&sdformat->format, infmt,
864 /* propagate colorimetry from sink */
865 sdformat->format.colorspace = infmt->colorspace;
866 sdformat->format.xfer_func = infmt->xfer_func;
867 sdformat->format.quantization = infmt->quantization;
868 sdformat->format.ycbcr_enc = infmt->ycbcr_enc;
870 v4l_bound_align_image(&sdformat->format.width,
871 MIN_W_SINK, MAX_W_SINK, W_ALIGN_SINK,
872 &sdformat->format.height,
873 MIN_H_SINK, MAX_H_SINK, H_ALIGN_SINK,
876 imx_media_fill_default_mbus_fields(&sdformat->format, infmt,
881 static int prp_set_fmt(struct v4l2_subdev *sd,
882 struct v4l2_subdev_pad_config *cfg,
883 struct v4l2_subdev_format *sdformat)
885 struct prp_priv *priv = sd_to_priv(sd);
886 struct imx_media_video_dev *vdev = priv->vdev;
887 const struct imx_media_pixfmt *cc;
888 struct v4l2_pix_format vdev_fmt;
889 struct v4l2_mbus_framefmt *fmt;
892 if (sdformat->pad >= PRPENCVF_NUM_PADS)
895 mutex_lock(&priv->lock);
897 if (priv->stream_count > 0) {
902 prp_try_fmt(priv, cfg, sdformat, &cc);
904 fmt = __prp_get_fmt(priv, cfg, sdformat->pad, sdformat->which);
905 *fmt = sdformat->format;
907 /* propagate a default format to source pad */
908 if (sdformat->pad == PRPENCVF_SINK_PAD) {
909 const struct imx_media_pixfmt *outcc;
910 struct v4l2_mbus_framefmt *outfmt;
911 struct v4l2_subdev_format format;
913 format.pad = PRPENCVF_SRC_PAD;
914 format.which = sdformat->which;
915 format.format = sdformat->format;
916 prp_try_fmt(priv, cfg, &format, &outcc);
918 outfmt = __prp_get_fmt(priv, cfg, PRPENCVF_SRC_PAD,
920 *outfmt = format.format;
921 if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE)
922 priv->cc[PRPENCVF_SRC_PAD] = outcc;
925 if (sdformat->which == V4L2_SUBDEV_FORMAT_TRY)
928 priv->cc[sdformat->pad] = cc;
930 /* propagate output pad format to capture device */
931 imx_media_mbus_fmt_to_pix_fmt(&vdev_fmt,
932 &priv->format_mbus[PRPENCVF_SRC_PAD],
933 priv->cc[PRPENCVF_SRC_PAD]);
934 mutex_unlock(&priv->lock);
935 imx_media_capture_device_set_format(vdev, &vdev_fmt);
939 mutex_unlock(&priv->lock);
943 static int prp_enum_frame_size(struct v4l2_subdev *sd,
944 struct v4l2_subdev_pad_config *cfg,
945 struct v4l2_subdev_frame_size_enum *fse)
947 struct prp_priv *priv = sd_to_priv(sd);
948 struct v4l2_subdev_format format = {};
949 const struct imx_media_pixfmt *cc;
952 if (fse->pad >= PRPENCVF_NUM_PADS || fse->index != 0)
955 mutex_lock(&priv->lock);
957 format.pad = fse->pad;
958 format.which = fse->which;
959 format.format.code = fse->code;
960 format.format.width = 1;
961 format.format.height = 1;
962 prp_try_fmt(priv, cfg, &format, &cc);
963 fse->min_width = format.format.width;
964 fse->min_height = format.format.height;
966 if (format.format.code != fse->code) {
971 format.format.code = fse->code;
972 format.format.width = -1;
973 format.format.height = -1;
974 prp_try_fmt(priv, cfg, &format, &cc);
975 fse->max_width = format.format.width;
976 fse->max_height = format.format.height;
978 mutex_unlock(&priv->lock);
982 static int prp_link_setup(struct media_entity *entity,
983 const struct media_pad *local,
984 const struct media_pad *remote, u32 flags)
986 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
987 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
988 struct prp_priv *priv = ic_priv->task_priv;
989 struct v4l2_subdev *remote_sd;
992 dev_dbg(ic_priv->dev, "link setup %s -> %s", remote->entity->name,
993 local->entity->name);
995 mutex_lock(&priv->lock);
997 if (local->flags & MEDIA_PAD_FL_SINK) {
998 if (!is_media_entity_v4l2_subdev(remote->entity)) {
1003 remote_sd = media_entity_to_v4l2_subdev(remote->entity);
1005 if (flags & MEDIA_LNK_FL_ENABLED) {
1010 priv->src_sd = remote_sd;
1012 priv->src_sd = NULL;
1018 /* this is the source pad */
1020 /* the remote must be the device node */
1021 if (!is_media_entity_v4l2_video_device(remote->entity)) {
1026 if (flags & MEDIA_LNK_FL_ENABLED) {
1036 priv->sink = remote->entity;
1038 mutex_unlock(&priv->lock);
1042 static int prp_s_ctrl(struct v4l2_ctrl *ctrl)
1044 struct prp_priv *priv = container_of(ctrl->handler,
1045 struct prp_priv, ctrl_hdlr);
1046 struct imx_ic_priv *ic_priv = priv->ic_priv;
1047 enum ipu_rotate_mode rot_mode;
1048 int rotation, ret = 0;
1051 mutex_lock(&priv->lock);
1053 rotation = priv->rotation;
1054 hflip = priv->hflip;
1055 vflip = priv->vflip;
1058 case V4L2_CID_HFLIP:
1059 hflip = (ctrl->val == 1);
1061 case V4L2_CID_VFLIP:
1062 vflip = (ctrl->val == 1);
1064 case V4L2_CID_ROTATE:
1065 rotation = ctrl->val;
1068 v4l2_err(&ic_priv->sd, "Invalid control\n");
1073 ret = ipu_degrees_to_rot_mode(&rot_mode, rotation, hflip, vflip);
1077 if (rot_mode != priv->rot_mode) {
1078 struct v4l2_mbus_framefmt outfmt, infmt;
1080 /* can't change rotation mid-streaming */
1081 if (priv->stream_count > 0) {
1086 outfmt = priv->format_mbus[PRPENCVF_SRC_PAD];
1087 infmt = priv->format_mbus[PRPENCVF_SINK_PAD];
1089 if (prp_bound_align_output(&outfmt, &infmt, rot_mode)) {
1094 priv->rot_mode = rot_mode;
1095 priv->rotation = rotation;
1096 priv->hflip = hflip;
1097 priv->vflip = vflip;
1101 mutex_unlock(&priv->lock);
1105 static const struct v4l2_ctrl_ops prp_ctrl_ops = {
1106 .s_ctrl = prp_s_ctrl,
1109 static int prp_init_controls(struct prp_priv *priv)
1111 struct imx_ic_priv *ic_priv = priv->ic_priv;
1112 struct v4l2_ctrl_handler *hdlr = &priv->ctrl_hdlr;
1115 v4l2_ctrl_handler_init(hdlr, 3);
1117 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_HFLIP,
1119 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_VFLIP,
1121 v4l2_ctrl_new_std(hdlr, &prp_ctrl_ops, V4L2_CID_ROTATE,
1124 ic_priv->sd.ctrl_handler = hdlr;
1131 v4l2_ctrl_handler_setup(hdlr);
1135 v4l2_ctrl_handler_free(hdlr);
1139 static int prp_s_stream(struct v4l2_subdev *sd, int enable)
1141 struct imx_ic_priv *ic_priv = v4l2_get_subdevdata(sd);
1142 struct prp_priv *priv = ic_priv->task_priv;
1145 mutex_lock(&priv->lock);
1147 if (!priv->src_sd || !priv->sink) {
1153 * enable/disable streaming only if stream_count is
1154 * going from 0 to 1 / 1 to 0.
1156 if (priv->stream_count != !enable)
1159 dev_dbg(ic_priv->dev, "stream %s\n", enable ? "ON" : "OFF");
1162 ret = prp_start(priv);
1169 priv->stream_count += enable ? 1 : -1;
1170 if (priv->stream_count < 0)
1171 priv->stream_count = 0;
1173 mutex_unlock(&priv->lock);
1177 static int prp_g_frame_interval(struct v4l2_subdev *sd,
1178 struct v4l2_subdev_frame_interval *fi)
1180 struct prp_priv *priv = sd_to_priv(sd);
1182 if (fi->pad >= PRPENCVF_NUM_PADS)
1185 mutex_lock(&priv->lock);
1186 fi->interval = priv->frame_interval;
1187 mutex_unlock(&priv->lock);
1192 static int prp_s_frame_interval(struct v4l2_subdev *sd,
1193 struct v4l2_subdev_frame_interval *fi)
1195 struct prp_priv *priv = sd_to_priv(sd);
1197 if (fi->pad >= PRPENCVF_NUM_PADS)
1200 /* No limits on frame interval */
1201 mutex_lock(&priv->lock);
1202 priv->frame_interval = fi->interval;
1203 mutex_unlock(&priv->lock);
1209 * retrieve our pads parsed from the OF graph by the media device
1211 static int prp_registered(struct v4l2_subdev *sd)
1213 struct prp_priv *priv = sd_to_priv(sd);
1217 /* get media device */
1218 priv->md = dev_get_drvdata(sd->v4l2_dev->dev);
1220 for (i = 0; i < PRPENCVF_NUM_PADS; i++) {
1221 priv->pad[i].flags = (i == PRPENCVF_SINK_PAD) ?
1222 MEDIA_PAD_FL_SINK : MEDIA_PAD_FL_SOURCE;
1224 /* set a default mbus format */
1225 imx_media_enum_ipu_format(&code, 0, CS_SEL_YUV);
1226 ret = imx_media_init_mbus_fmt(&priv->format_mbus[i],
1227 640, 480, code, V4L2_FIELD_NONE,
1233 /* init default frame interval */
1234 priv->frame_interval.numerator = 1;
1235 priv->frame_interval.denominator = 30;
1237 ret = media_entity_pads_init(&sd->entity, PRPENCVF_NUM_PADS,
1242 ret = imx_media_capture_device_register(priv->vdev);
1246 ret = imx_media_add_video_device(priv->md, priv->vdev);
1250 ret = prp_init_controls(priv);
1256 imx_media_capture_device_unregister(priv->vdev);
1260 static void prp_unregistered(struct v4l2_subdev *sd)
1262 struct prp_priv *priv = sd_to_priv(sd);
1264 imx_media_capture_device_unregister(priv->vdev);
1265 v4l2_ctrl_handler_free(&priv->ctrl_hdlr);
1268 static const struct v4l2_subdev_pad_ops prp_pad_ops = {
1269 .init_cfg = imx_media_init_cfg,
1270 .enum_mbus_code = prp_enum_mbus_code,
1271 .enum_frame_size = prp_enum_frame_size,
1272 .get_fmt = prp_get_fmt,
1273 .set_fmt = prp_set_fmt,
1276 static const struct v4l2_subdev_video_ops prp_video_ops = {
1277 .g_frame_interval = prp_g_frame_interval,
1278 .s_frame_interval = prp_s_frame_interval,
1279 .s_stream = prp_s_stream,
1282 static const struct media_entity_operations prp_entity_ops = {
1283 .link_setup = prp_link_setup,
1284 .link_validate = v4l2_subdev_link_validate,
1287 static const struct v4l2_subdev_ops prp_subdev_ops = {
1288 .video = &prp_video_ops,
1289 .pad = &prp_pad_ops,
1292 static const struct v4l2_subdev_internal_ops prp_internal_ops = {
1293 .registered = prp_registered,
1294 .unregistered = prp_unregistered,
1297 static int prp_init(struct imx_ic_priv *ic_priv)
1299 struct prp_priv *priv;
1301 priv = devm_kzalloc(ic_priv->dev, sizeof(*priv), GFP_KERNEL);
1305 ic_priv->task_priv = priv;
1306 priv->ic_priv = ic_priv;
1308 spin_lock_init(&priv->irqlock);
1309 timer_setup(&priv->eof_timeout_timer, prp_eof_timeout, 0);
1311 priv->vdev = imx_media_capture_device_init(&ic_priv->sd,
1313 if (IS_ERR(priv->vdev))
1314 return PTR_ERR(priv->vdev);
1316 mutex_init(&priv->lock);
1321 static void prp_remove(struct imx_ic_priv *ic_priv)
1323 struct prp_priv *priv = ic_priv->task_priv;
1325 mutex_destroy(&priv->lock);
1326 imx_media_capture_device_remove(priv->vdev);
1329 struct imx_ic_ops imx_ic_prpencvf_ops = {
1330 .subdev_ops = &prp_subdev_ops,
1331 .internal_ops = &prp_internal_ops,
1332 .entity_ops = &prp_entity_ops,
1334 .remove = prp_remove,