drivers/staging/media/atomisp/pci/sh_css_internal.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Support for Intel Camera Imaging ISP subsystem.
   4  * Copyright (c) 2015, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  */
  15
  16 #ifndef _SH_CSS_INTERNAL_H_
  17 #define _SH_CSS_INTERNAL_H_
  18
  19 #include <system_global.h>
  20 #include <math_support.h>
  21 #include <type_support.h>
  22 #include <platform_support.h>
  23 #include <linux/stdarg.h>
  24
  25 #if !defined(ISP2401)
  26 #include "input_formatter.h"
  27 #endif
  28 #include "input_system.h"
  29
  30 #include "ia_css_types.h"
  31 #include "ia_css_acc_types.h"
  32 #include "ia_css_buffer.h"
  33
  34 #include "ia_css_binary.h"
  35 #include "sh_css_firmware.h" /* not needed/desired on SP/ISP */
  36 #include "sh_css_legacy.h"
  37 #include "sh_css_defs.h"
  38 #include "sh_css_uds.h"
  39 #include "dma.h"        /* N_DMA_CHANNEL_ID */
  40 #include "ia_css_circbuf_comm.h" /* Circular buffer */
  41 #include "ia_css_frame_comm.h"
  42 #include "ia_css_3a.h"
  43 #include "ia_css_dvs.h"
  44 #include "ia_css_metadata.h"
  45 #include "runtime/bufq/interface/ia_css_bufq.h"
  46 #include "ia_css_timer.h"
  47
  48 /* TODO: Move to a more suitable place when sp pipeline design is done. */
  49 #define IA_CSS_NUM_CB_SEM_READ_RESOURCE 2
  50 #define IA_CSS_NUM_CB_SEM_WRITE_RESOURCE        1
  51 #define IA_CSS_NUM_CBS                                          2
  52 #define IA_CSS_CB_MAX_ELEMS                                     2
  53
  54 /* Use case specific. index limited to IA_CSS_NUM_CB_SEM_READ_RESOURCE or
  55  * IA_CSS_NUM_CB_SEM_WRITE_RESOURCE for read and write respectively.
  56  * TODO: Enforce the limitation above.
  57 */
  58 #define IA_CSS_COPYSINK_SEM_INDEX       0
  59 #define IA_CSS_TAGGER_SEM_INDEX 1
  60
  61 /* Force generation of output event. Used by acceleration pipe. */
  62 #define IA_CSS_POST_OUT_EVENT_FORCE             2
  63
  64 #define SH_CSS_MAX_BINARY_NAME  64
  65
  66 #define SP_DEBUG_NONE   (0)
  67 #define SP_DEBUG_DUMP   (1)
  68 #define SP_DEBUG_COPY   (2)
  69 #define SP_DEBUG_TRACE  (3)
  70 #define SP_DEBUG_MINIMAL (4)
  71
  72 #define SP_DEBUG SP_DEBUG_NONE
  73 #define SP_DEBUG_MINIMAL_OVERWRITE 1
  74
  75 #define SH_CSS_TNR_BIT_DEPTH 8
  76 #define SH_CSS_REF_BIT_DEPTH 8
  77
  78 /* keep next up to date with the definition for MAX_CB_ELEMS_FOR_TAGGER in tagger.sp.c */
  79 #define NUM_CONTINUOUS_FRAMES   15
  80 #define NUM_MIPI_FRAMES_PER_STREAM              2
  81
  82 #define NUM_ONLINE_INIT_CONTINUOUS_FRAMES      2
  83
  84 #define NR_OF_PIPELINES                 IA_CSS_PIPE_ID_NUM /* Must match with IA_CSS_PIPE_ID_NUM */
  85
  86 #define SH_CSS_MAX_IF_CONFIGS   3 /* Must match with IA_CSS_NR_OF_CONFIGS (not defined yet).*/
  87 #define SH_CSS_IF_CONFIG_NOT_NEEDED     0xFF
  88
  89 /*
  90  * SH_CSS_MAX_SP_THREADS:
  91  *       sp threads visible to host with connected communication queues
  92  *       these threads are capable of running an image pipe
  93  * SH_CSS_MAX_SP_INTERNAL_THREADS:
  94  *       internal sp service threads, no communication queues to host
  95  *       these threads can't be used as image pipe
  96  */
  97
  98 #if !defined(ISP2401)
  99 #define SH_CSS_SP_INTERNAL_METADATA_THREAD      1
 100 #else
 101 #define SH_CSS_SP_INTERNAL_METADATA_THREAD      0
 102 #endif
 103
 104 #define SH_CSS_SP_INTERNAL_SERVICE_THREAD               1
 105
 106 #define SH_CSS_MAX_SP_THREADS           5
 107
 108 #define SH_CSS_MAX_SP_INTERNAL_THREADS  (\
 109          SH_CSS_SP_INTERNAL_SERVICE_THREAD +\
 110          SH_CSS_SP_INTERNAL_METADATA_THREAD)
 111
 112 #define SH_CSS_MAX_PIPELINES    SH_CSS_MAX_SP_THREADS
 113
 114 /**
 115  * The C99 standard does not specify the exact object representation of structs;
 116  * the representation is compiler dependent.
 117  *
 118  * The structs that are communicated between host and SP/ISP should have the
 119  * exact same object representation. The compiler that is used to compile the
 120  * firmware is hivecc.
 121  *
 122  * To check if a different compiler, used to compile a host application, uses
 123  * another object representation, macros are defined specifying the size of
 124  * the structs as expected by the firmware.
 125  *
 126  * A host application shall verify that a sizeof( ) of the struct is equal to
 127  * the SIZE_OF_XXX macro of the corresponding struct. If they are not
 128  * equal, functionality will break.
 129  */
 130 #define CALC_ALIGNMENT_MEMBER(x, y)     (CEIL_MUL(x, y) - x)
 131 #define SIZE_OF_HRT_VADDRESS            sizeof(hive_uint32)
 132 #define SIZE_OF_IA_CSS_PTR              sizeof(uint32_t)
 133
 134 /* Number of SP's */
 135 #define NUM_OF_SPS 1
 136
 137 #define NUM_OF_BLS 0
 138
 139 /* Enum for order of Binaries */
 140 enum sh_css_order_binaries {
 141         SP_FIRMWARE = 0,
 142         ISP_FIRMWARE
 143 };
 144
 145 /*
 146 * JB: keep next enum in sync with thread id's
 147 * and pipe id's
 148 */
 149 enum sh_css_pipe_config_override {
 150         SH_CSS_PIPE_CONFIG_OVRD_NONE     = 0,
 151         SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD  = 0xffff
 152 };
 153
 154 enum host2sp_commands {
 155         host2sp_cmd_error = 0,
 156         /*
 157          * The host2sp_cmd_ready command is the only command written by the SP
 158          * It acknowledges that is previous command has been received.
 159          * (this does not mean that the command has been executed)
 160          * It also indicates that a new command can be send (it is a queue
 161          * with depth 1).
 162          */
 163         host2sp_cmd_ready = 1,
 164         /* Command written by the Host */
 165         host2sp_cmd_dummy,              /* No action, can be used as watchdog */
 166         host2sp_cmd_start_flash,        /* Request SP to start the flash */
 167         host2sp_cmd_terminate,          /* SP should terminate itself */
 168         N_host2sp_cmd
 169 };
 170
 171 /* Enumeration used to indicate the events that are produced by
 172  *  the SP and consumed by the Host.
 173  *
 174  * !!!IMPORTANT!!! KEEP THE FOLLOWING IN SYNC:
 175  * 1) "enum ia_css_event_type"                                  (ia_css_event_public.h)
 176  * 2) "enum sh_css_sp_event_type"                               (sh_css_internal.h)
 177  * 3) "enum ia_css_event_type event_id_2_event_mask"            (event_handler.sp.c)
 178  * 4) "enum ia_css_event_type convert_event_sp_to_host_domain"  (sh_css.c)
 179  */
 180 enum sh_css_sp_event_type {
 181         SH_CSS_SP_EVENT_OUTPUT_FRAME_DONE,
 182         SH_CSS_SP_EVENT_SECOND_OUTPUT_FRAME_DONE,
 183         SH_CSS_SP_EVENT_VF_OUTPUT_FRAME_DONE,
 184         SH_CSS_SP_EVENT_SECOND_VF_OUTPUT_FRAME_DONE,
 185         SH_CSS_SP_EVENT_3A_STATISTICS_DONE,
 186         SH_CSS_SP_EVENT_DIS_STATISTICS_DONE,
 187         SH_CSS_SP_EVENT_PIPELINE_DONE,
 188         SH_CSS_SP_EVENT_FRAME_TAGGED,
 189         SH_CSS_SP_EVENT_INPUT_FRAME_DONE,
 190         SH_CSS_SP_EVENT_METADATA_DONE,
 191         SH_CSS_SP_EVENT_LACE_STATISTICS_DONE,
 192         SH_CSS_SP_EVENT_ACC_STAGE_COMPLETE,
 193         SH_CSS_SP_EVENT_TIMER,
 194         SH_CSS_SP_EVENT_PORT_EOF,
 195         SH_CSS_SP_EVENT_FW_WARNING,
 196         SH_CSS_SP_EVENT_FW_ASSERT,
 197         SH_CSS_SP_EVENT_NR_OF_TYPES             /* must be last */
 198 };
 199
 200 /* xmem address map allocation per pipeline, css pointers */
 201 /* Note that the struct below should only consist of ia_css_ptr-es
 202    Otherwise this will cause a fail in the function ref_sh_css_ddr_address_map
 203  */
 204 struct sh_css_ddr_address_map {
 205         ia_css_ptr isp_param;
 206         ia_css_ptr isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES];
 207         ia_css_ptr macc_tbl;
 208         ia_css_ptr fpn_tbl;
 209         ia_css_ptr sc_tbl;
 210         ia_css_ptr tetra_r_x;
 211         ia_css_ptr tetra_r_y;
 212         ia_css_ptr tetra_gr_x;
 213         ia_css_ptr tetra_gr_y;
 214         ia_css_ptr tetra_gb_x;
 215         ia_css_ptr tetra_gb_y;
 216         ia_css_ptr tetra_b_x;
 217         ia_css_ptr tetra_b_y;
 218         ia_css_ptr tetra_ratb_x;
 219         ia_css_ptr tetra_ratb_y;
 220         ia_css_ptr tetra_batr_x;
 221         ia_css_ptr tetra_batr_y;
 222         ia_css_ptr dvs_6axis_params_y;
 223 };
 224
 225 #define SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT                                   \
 226         (SIZE_OF_HRT_VADDRESS +                                                 \
 227         (SH_CSS_MAX_STAGES * IA_CSS_NUM_MEMORIES * SIZE_OF_HRT_VADDRESS) +      \
 228         (16 * SIZE_OF_HRT_VADDRESS))
 229
 230 /* xmem address map allocation per pipeline */
 231 struct sh_css_ddr_address_map_size {
 232         size_t isp_param;
 233         size_t isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES];
 234         size_t macc_tbl;
 235         size_t fpn_tbl;
 236         size_t sc_tbl;
 237         size_t tetra_r_x;
 238         size_t tetra_r_y;
 239         size_t tetra_gr_x;
 240         size_t tetra_gr_y;
 241         size_t tetra_gb_x;
 242         size_t tetra_gb_y;
 243         size_t tetra_b_x;
 244         size_t tetra_b_y;
 245         size_t tetra_ratb_x;
 246         size_t tetra_ratb_y;
 247         size_t tetra_batr_x;
 248         size_t tetra_batr_y;
 249         size_t dvs_6axis_params_y;
 250 };
 251
 252 struct sh_css_ddr_address_map_compound {
 253         struct sh_css_ddr_address_map           map;
 254         struct sh_css_ddr_address_map_size      size;
 255 };
 256
 257 struct ia_css_isp_parameter_set_info {
 258         struct sh_css_ddr_address_map
 259                 mem_map;/** pointers to Parameters in ISP format IMPT:
 260                                                     This should be first member of this struct */
 261         u32
 262         isp_parameters_id;/** Unique ID to track which config was actually applied to a particular frame */
 263         ia_css_ptr
 264         output_frame_ptr;/** Output frame to which this config has to be applied (optional) */
 265 };
 266
 267 /* this struct contains all arguments that can be passed to
 268    a binary. It depends on the binary which ones are used. */
 269 struct sh_css_binary_args {
 270         struct ia_css_frame *in_frame;       /* input frame */
 271         const struct ia_css_frame
 272                 *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES];   /* reference input frame */
 273         const struct ia_css_frame *tnr_frames[NUM_VIDEO_TNR_FRAMES];   /* tnr frames */
 274         struct ia_css_frame
 275                 *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS];      /* output frame */
 276         struct ia_css_frame *out_vf_frame;   /* viewfinder output frame */
 277         bool                 copy_vf;
 278         bool                 copy_output;
 279         unsigned int vf_downscale_log2;
 280 };
 281
 282 #if SP_DEBUG == SP_DEBUG_DUMP
 283
 284 #define SH_CSS_NUM_SP_DEBUG 48
 285
 286 struct sh_css_sp_debug_state {
 287         unsigned int error;
 288         unsigned int debug[SH_CSS_NUM_SP_DEBUG];
 289 };
 290
 291 #elif SP_DEBUG == SP_DEBUG_COPY
 292
 293 #define SH_CSS_SP_DBG_TRACE_DEPTH       (40)
 294
 295 struct sh_css_sp_debug_trace {
 296         u16 frame;
 297         u16 line;
 298         u16 pixel_distance;
 299         u16 mipi_used_dword;
 300         u16 sp_index;
 301 };
 302
 303 struct sh_css_sp_debug_state {
 304         u16 if_start_line;
 305         u16 if_start_column;
 306         u16 if_cropped_height;
 307         u16 if_cropped_width;
 308         unsigned int index;
 309         struct sh_css_sp_debug_trace
 310                 trace[SH_CSS_SP_DBG_TRACE_DEPTH];
 311 };
 312
 313 #elif SP_DEBUG == SP_DEBUG_TRACE
 314
 315 /* Example of just one global trace */
 316 #define SH_CSS_SP_DBG_NR_OF_TRACES      (1)
 317 #define SH_CSS_SP_DBG_TRACE_DEPTH       (40)
 318
 319 #define SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS (13)
 320
 321 struct sh_css_sp_debug_trace {
 322         u16 time_stamp;
 323         u16 location;   /* bit 15..13 = file_id, 12..0 = line nr. */
 324         u32 data;
 325 };
 326
 327 struct sh_css_sp_debug_state {
 328         struct sh_css_sp_debug_trace
 329                 trace[SH_CSS_SP_DBG_NR_OF_TRACES][SH_CSS_SP_DBG_TRACE_DEPTH];
 330         u16 index_last[SH_CSS_SP_DBG_NR_OF_TRACES];
 331         u8 index[SH_CSS_SP_DBG_NR_OF_TRACES];
 332 };
 333
 334 #elif SP_DEBUG == SP_DEBUG_MINIMAL
 335
 336 #define SH_CSS_NUM_SP_DEBUG 128
 337
 338 struct sh_css_sp_debug_state {
 339         unsigned int error;
 340         unsigned int debug[SH_CSS_NUM_SP_DEBUG];
 341 };
 342
 343 #endif
 344
 345 struct sh_css_sp_debug_command {
 346         /*
 347          * The DMA software-mask,
 348          *      Bit 31...24: unused.
 349          *      Bit 23...16: unused.
 350          *      Bit 15...08: reading-request enabling bits for DMA channel 7..0
 351          *      Bit 07...00: writing-request enabling bits for DMA channel 7..0
 352          *
 353          * For example, "0...0 0...0 11111011 11111101" indicates that the
 354          * writing request through DMA Channel 1 and the reading request
 355          * through DMA channel 2 are both disabled. The others are enabled.
 356          */
 357         u32 dma_sw_reg;
 358 };
 359
 360 #if !defined(ISP2401)
 361 /* SP input formatter configuration.*/
 362 struct sh_css_sp_input_formatter_set {
 363         u32                             stream_format;
 364         input_formatter_cfg_t   config_a;
 365         input_formatter_cfg_t   config_b;
 366 };
 367 #endif
 368
 369 #define IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT (3)
 370
 371 /* SP configuration information */
 372 struct sh_css_sp_config {
 373         u8                      no_isp_sync; /* Signal host immediately after start */
 374         u8                      enable_raw_pool_locking; /** Enable Raw Buffer Locking for HALv3 Support */
 375         u8                      lock_all;
 376         /** If raw buffer locking is enabled, this flag indicates whether raw
 377              frames are locked when their EOF event is successfully sent to the
 378              host (true) or when they are passed to the preview/video pipe
 379              (false). */
 380 #if !defined(ISP2401)
 381         struct {
 382                 u8                                      a_changed;
 383                 u8                                      b_changed;
 384                 u8                                      isp_2ppc;
 385                 struct sh_css_sp_input_formatter_set
 386                         set[SH_CSS_MAX_IF_CONFIGS]; /* CSI-2 port is used as index. */
 387         } input_formatter;
 388 #endif
 389 #if !defined(ISP2401)
 390         sync_generator_cfg_t    sync_gen;
 391         tpg_cfg_t               tpg;
 392         prbs_cfg_t              prbs;
 393         input_system_cfg_t      input_circuit;
 394         u8                      input_circuit_cfg_changed;
 395         u32             mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT];
 396 #endif
 397         u8                 enable_isys_event_queue;
 398         u8                      disable_cont_vf;
 399 };
 400
 401 enum sh_css_stage_type {
 402         SH_CSS_SP_STAGE_TYPE  = 0,
 403         SH_CSS_ISP_STAGE_TYPE = 1
 404 };
 405
 406 #define SH_CSS_NUM_STAGE_TYPES 2
 407
 408 #define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS        BIT(0)
 409 #define SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS_MASK \
 410         ((SH_CSS_PIPE_CONFIG_SAMPLE_PARAMS << SH_CSS_MAX_SP_THREADS) - 1)
 411
 412 #if defined(ISP2401)
 413 struct sh_css_sp_pipeline_terminal {
 414         union {
 415                 /* Input System 2401 */
 416                 virtual_input_system_stream_t
 417                 virtual_input_system_stream[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH];
 418         } context;
 419         /*
 420          * TODO
 421          * - Remove "virtual_input_system_cfg" when the ISYS2401 DLI is ready.
 422          */
 423         union {
 424                 /* Input System 2401 */
 425                 virtual_input_system_stream_cfg_t
 426                 virtual_input_system_stream_cfg[IA_CSS_STREAM_MAX_ISYS_STREAM_PER_CH];
 427         } ctrl;
 428 };
 429
 430 struct sh_css_sp_pipeline_io {
 431         struct sh_css_sp_pipeline_terminal      input;
 432         /* pqiao: comment out temporarily to save dmem */
 433         /*struct sh_css_sp_pipeline_terminal    output;*/
 434 };
 435
 436 /* This struct tracks how many streams are registered per CSI port.
 437  * This is used to track which streams have already been configured.
 438  * Only when all streams are configured, the CSI RX is started for that port.
 439  */
 440 struct sh_css_sp_pipeline_io_status {
 441         u32     active[N_INPUT_SYSTEM_CSI_PORT];        /** registered streams */
 442         u32     running[N_INPUT_SYSTEM_CSI_PORT];       /** configured streams */
 443 };
 444
 445 #endif
 446 enum sh_css_port_dir {
 447         SH_CSS_PORT_INPUT  = 0,
 448         SH_CSS_PORT_OUTPUT  = 1
 449 };
 450
 451 enum sh_css_port_type {
 452         SH_CSS_HOST_TYPE  = 0,
 453         SH_CSS_COPYSINK_TYPE  = 1,
 454         SH_CSS_TAGGERSINK_TYPE  = 2
 455 };
 456
 457 /* Pipe inout settings: output port on 7-4bits, input port on 3-0bits */
 458 #define SH_CSS_PORT_FLD_WIDTH_IN_BITS (4)
 459 #define SH_CSS_PORT_TYPE_BIT_FLD(pt) (0x1 << (pt))
 460 #define SH_CSS_PORT_FLD(pd) ((pd) ? SH_CSS_PORT_FLD_WIDTH_IN_BITS : 0)
 461 #define SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) ((p) |= (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
 462 #define SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt) ((p) &= ~(SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
 463 #define SH_CSS_PIPE_PORT_CONFIG_SET(p, pd, pt, val) ((val) ? \
 464                 SH_CSS_PIPE_PORT_CONFIG_ON(p, pd, pt) : SH_CSS_PIPE_PORT_CONFIG_OFF(p, pd, pt))
 465 #define SH_CSS_PIPE_PORT_CONFIG_GET(p, pd, pt) ((p) & (SH_CSS_PORT_TYPE_BIT_FLD(pt) << SH_CSS_PORT_FLD(pd)))
 466 #define SH_CSS_PIPE_PORT_CONFIG_IS_CONTINUOUS(p) \
 467         (!(SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_INPUT, SH_CSS_HOST_TYPE) && \
 468            SH_CSS_PIPE_PORT_CONFIG_GET(p, SH_CSS_PORT_OUTPUT, SH_CSS_HOST_TYPE)))
 469
 470 #define IA_CSS_ACQUIRE_ISP_POS  31
 471
 472 /* Flags for metadata processing */
 473 #define SH_CSS_METADATA_ENABLED        0x01
 474 #define SH_CSS_METADATA_PROCESSED      0x02
 475 #define SH_CSS_METADATA_OFFLINE_MODE   0x04
 476 #define SH_CSS_METADATA_WAIT_INPUT     0x08
 477
 478 /* @brief Free an array of metadata buffers.
 479  *
 480  * @param[in]   num_bufs        Number of metadata buffers to be freed.
 481  * @param[in]   bufs            Pointer of array of metadata buffers.
 482  *
 483  * This function frees an array of metadata buffers.
 484  */
 485 void
 486 ia_css_metadata_free_multiple(unsigned int num_bufs,
 487                               struct ia_css_metadata **bufs);
 488
 489 /* Macro for handling pipe_qos_config */
 490 #define QOS_INVALID                  (~0U)
 491 #define QOS_ALL_STAGES_DISABLED      (0U)
 492 #define QOS_STAGE_MASK(num)          (0x00000001 << num)
 493 #define SH_CSS_IS_QOS_PIPE(pipe)               ((pipe)->pipe_qos_config != QOS_INVALID)
 494 #define SH_CSS_QOS_STAGE_ENABLE(pipe, num)     ((pipe)->pipe_qos_config |= QOS_STAGE_MASK(num))
 495 #define SH_CSS_QOS_STAGE_DISABLE(pipe, num)    ((pipe)->pipe_qos_config &= ~QOS_STAGE_MASK(num))
 496 #define SH_CSS_QOS_STAGE_IS_ENABLED(pipe, num) ((pipe)->pipe_qos_config & QOS_STAGE_MASK(num))
 497 #define SH_CSS_QOS_STAGE_IS_ALL_DISABLED(pipe) ((pipe)->pipe_qos_config == QOS_ALL_STAGES_DISABLED)
 498 #define SH_CSS_QOS_MODE_PIPE_ADD(mode, pipe)    ((mode) |= (0x1 << (pipe)->pipe_id))
 499 #define SH_CSS_QOS_MODE_PIPE_REMOVE(mode, pipe) ((mode) &= ~(0x1 << (pipe)->pipe_id))
 500 #define SH_CSS_IS_QOS_ONLY_MODE(mode)           ((mode) == (0x1 << IA_CSS_PIPE_ID_ACC))
 501
 502 /* Information for a pipeline */
 503 struct sh_css_sp_pipeline {
 504         u32     pipe_id;        /* the pipe ID */
 505         u32     pipe_num;       /* the dynamic pipe number */
 506         u32     thread_id;      /* the sp thread ID */
 507         u32     pipe_config;    /* the pipe config */
 508         u32     pipe_qos_config;        /* Bitmap of multiple QOS extension fw state.
 509                                                 (0xFFFFFFFF) indicates non QOS pipe.*/
 510         u32     inout_port_config;
 511         u32     required_bds_factor;
 512         u32     dvs_frame_delay;
 513         u32     input_system_mode;      /* enum ia_css_input_mode */
 514         u32     port_id;        /* port_id for input system */
 515         u32     num_stages;             /* the pipe config */
 516         u32     running;        /* needed for pipe termination */
 517         ia_css_ptr      sp_stage_addr[SH_CSS_MAX_STAGES];
 518         ia_css_ptr      scaler_pp_lut; /* Early bound LUT */
 519         u32     dummy; /* stage ptr is only used on sp but lives in
 520                                   this struct; needs cleanup */
 521         s32 num_execs; /* number of times to run if this is
 522                               an acceleration pipe. */
 523         struct {
 524                 u32        format;   /* Metadata format in hrt format */
 525                 u32        width;    /* Width of a line */
 526                 u32        height;   /* Number of lines */
 527                 u32        stride;   /* Stride (in bytes) per line */
 528                 u32        size;     /* Total size (in bytes) */
 529                 ia_css_ptr    cont_buf; /* Address of continuous buffer */
 530         } metadata;
 531         u32     output_frame_queue_id;
 532         union {
 533                 struct {
 534                         u32     bytes_available;
 535                 } bin;
 536                 struct {
 537                         u32     height;
 538                         u32     width;
 539                         u32     padded_width;
 540                         u32     max_input_width;
 541                         u32     raw_bit_depth;
 542                 } raw;
 543         } copy;
 544 };
 545
 546 /*
 547  * The first frames (with comment Dynamic) can be dynamic or static
 548  * The other frames (ref_in and below) can only be static
 549  * Static means that the data address will not change during the life time
 550  * of the associated pipe. Dynamic means that the data address can
 551  * change with every (frame) iteration of the associated pipe
 552  *
 553  * s3a and dis are now also dynamic but (stil) handled separately
 554  */
 555 #define SH_CSS_NUM_DYNAMIC_FRAME_IDS (3)
 556
 557 struct ia_css_frames_sp {
 558         struct ia_css_frame_sp  in;
 559         struct ia_css_frame_sp  out[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
 560         struct ia_css_resolution effective_in_res;
 561         struct ia_css_frame_sp  out_vf;
 562         struct ia_css_frame_sp_info internal_frame_info;
 563         struct ia_css_buffer_sp s3a_buf;
 564         struct ia_css_buffer_sp dvs_buf;
 565         struct ia_css_buffer_sp metadata_buf;
 566 };
 567
 568 /* Information for a single pipeline stage for an ISP */
 569 struct sh_css_isp_stage {
 570         /*
 571          * For compatibility and portabilty, only types
 572          * from "stdint.h" are allowed
 573          *
 574          * Use of "enum" and "bool" is prohibited
 575          * Multiple boolean flags can be stored in an
 576          * integer
 577          */
 578         struct ia_css_blob_info   blob_info;
 579         struct ia_css_binary_info binary_info;
 580         char                      binary_name[SH_CSS_MAX_BINARY_NAME];
 581         struct ia_css_isp_param_css_segments mem_initializers;
 582 };
 583
 584 /* Information for a single pipeline stage */
 585 struct sh_css_sp_stage {
 586         /*
 587          * For compatibility and portabilty, only types
 588          * from "stdint.h" are allowed
 589          *
 590          * Use of "enum" and "bool" is prohibited
 591          * Multiple boolean flags can be stored in an
 592          * integer
 593          */
 594         u8                      num; /* Stage number */
 595         u8                      isp_online;
 596         u8                      isp_copy_vf;
 597         u8                      isp_copy_output;
 598         u8                      sp_enable_xnr;
 599         u8                      isp_deci_log_factor;
 600         u8                      isp_vf_downscale_bits;
 601         u8                      deinterleaved;
 602         /*
 603          * NOTE: Programming the input circuit can only be done at the
 604          * start of a session. It is illegal to program it during execution
 605          * The input circuit defines the connectivity
 606          */
 607         u8                      program_input_circuit;
 608         /* enum ia_css_pipeline_stage_sp_func   func; */
 609         u8                      func;
 610         /* The type of the pipe-stage */
 611         /* enum sh_css_stage_type       stage_type; */
 612         u8                      stage_type;
 613         u8                      num_stripes;
 614         u8                      isp_pipe_version;
 615         struct {
 616                 u8              vf_output;
 617                 u8              s3a;
 618                 u8              sdis;
 619                 u8              dvs_stats;
 620                 u8              lace_stats;
 621         } enable;
 622         /* Add padding to come to a word boundary */
 623         /* unsigned char                        padding[0]; */
 624
 625         struct sh_css_crop_pos          sp_out_crop_pos;
 626         struct ia_css_frames_sp         frames;
 627         struct ia_css_resolution        dvs_envelope;
 628         struct sh_css_uds_info          uds;
 629         ia_css_ptr                      isp_stage_addr;
 630         ia_css_ptr                      xmem_bin_addr;
 631         ia_css_ptr                      xmem_map_addr;
 632
 633         u16             top_cropping;
 634         u16             row_stripes_height;
 635         u16             row_stripes_overlap_lines;
 636         u8                      if_config_index; /* Which should be applied by this stage. */
 637 };
 638
 639 /*
 640  * Time: 2012-07-19, 17:40.
 641  * Note: Add a new data memeber "debug" in "sh_css_sp_group". This
 642  * data member is used to pass the debugging command from the
 643  * Host to the SP.
 644  *
 645  * Time: Before 2012-07-19.
 646  * Note:
 647  * Group all host initialized SP variables into this struct.
 648  * This is initialized every stage through dma.
 649  * The stage part itself is transferred through sh_css_sp_stage.
 650 */
 651 struct sh_css_sp_group {
 652         struct sh_css_sp_config         config;
 653         struct sh_css_sp_pipeline       pipe[SH_CSS_MAX_SP_THREADS];
 654 #if defined(ISP2401)
 655         struct sh_css_sp_pipeline_io    pipe_io[SH_CSS_MAX_SP_THREADS];
 656         struct sh_css_sp_pipeline_io_status     pipe_io_status;
 657 #endif
 658         struct sh_css_sp_debug_command  debug;
 659 };
 660
 661 /* Data in SP dmem that is set from the host every stage. */
 662 struct sh_css_sp_per_frame_data {
 663         /* ddr address of sp_group and sp_stage */
 664         ia_css_ptr                      sp_group_addr;
 665 };
 666
 667 #define SH_CSS_NUM_SDW_IRQS 3
 668
 669 /* Output data from SP to css */
 670 struct sh_css_sp_output {
 671         unsigned int                    bin_copy_bytes_copied;
 672 #if SP_DEBUG != SP_DEBUG_NONE
 673         struct sh_css_sp_debug_state    debug;
 674 #endif
 675         unsigned int            sw_interrupt_value[SH_CSS_NUM_SDW_IRQS];
 676 };
 677
 678 /**
 679  * @brief Data structure for the circular buffer.
 680  * The circular buffer is empty if "start == end". The
 681  * circular buffer is full if "(end + 1) % size == start".
 682  */
 683 /* Variable Sized Buffer Queue Elements */
 684
 685 #define  IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE    6
 686 #define  IA_CSS_NUM_ELEMS_HOST2SP_PARAM_QUEUE    3
 687 #define  IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE  6
 688
 689 /* sp-to-host queue is expected to be emptied in ISR since
 690  * it is used instead of HW interrupts (due to HW design issue).
 691  * We need one queue element per CSI port. */
 692 #define  IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS)
 693 /* The host-to-sp queue needs to allow for some delay
 694  * in the emptying of this queue in the SP since there is no
 695  * separate SP thread for this. */
 696 #define  IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS)
 697
 698 #define  IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE    13
 699 #define  IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE        19
 700 #define  IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE    26 /* holds events for all type of buffers, hence deeper */
 701
 702 struct sh_css_hmm_buffer {
 703         union {
 704                 struct ia_css_isp_3a_statistics  s3a;
 705                 struct ia_css_isp_dvs_statistics dis;
 706                 ia_css_ptr skc_dvs_statistics;
 707                 ia_css_ptr lace_stat;
 708                 struct ia_css_metadata  metadata;
 709                 struct frame_data_wrapper {
 710                         ia_css_ptr      frame_data;
 711                         u32     flashed;
 712                         u32     exp_id;
 713                         u32     isp_parameters_id; /** Unique ID to track which config was
 714                                                                 actually applied to a particular frame */
 715                 } frame;
 716                 ia_css_ptr ddr_ptrs;
 717         } payload;
 718         /*
 719          * kernel_ptr is present for host administration purposes only.
 720          * type is uint64_t in order to be 64-bit host compatible.
 721          * uint64_t does not exist on SP/ISP.
 722          * Size of the struct is checked by sp.hive.c.
 723          */
 724         CSS_ALIGN(u64 cookie_ptr, 8); /* TODO: check if this alignment is needed */
 725         u64 kernel_ptr;
 726         struct ia_css_time_meas timing_data;
 727         clock_value_t isys_eof_clock_tick;
 728 };
 729
 730 #define SIZE_OF_FRAME_STRUCT                                            \
 731         (SIZE_OF_HRT_VADDRESS +                                         \
 732         (3 * sizeof(uint32_t)))
 733
 734 #define SIZE_OF_PAYLOAD_UNION                                           \
 735         (MAX(MAX(MAX(MAX(                                               \
 736         SIZE_OF_IA_CSS_ISP_3A_STATISTICS_STRUCT,                        \
 737         SIZE_OF_IA_CSS_ISP_DVS_STATISTICS_STRUCT),                      \
 738         SIZE_OF_IA_CSS_METADATA_STRUCT),                                \
 739         SIZE_OF_FRAME_STRUCT),                                          \
 740         SIZE_OF_HRT_VADDRESS))
 741
 742 /* Do not use sizeof(uint64_t) since that does not exist of SP */
 743 #define SIZE_OF_SH_CSS_HMM_BUFFER_STRUCT                                \
 744         (SIZE_OF_PAYLOAD_UNION +                                        \
 745         CALC_ALIGNMENT_MEMBER(SIZE_OF_PAYLOAD_UNION, 8) +               \
 746         8 +                                             \
 747         8 +                                             \
 748         SIZE_OF_IA_CSS_TIME_MEAS_STRUCT +                               \
 749         SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT +                      \
 750         CALC_ALIGNMENT_MEMBER(SIZE_OF_IA_CSS_CLOCK_TICK_STRUCT, 8))
 751
 752 enum sh_css_queue_type {
 753         sh_css_invalid_queue_type = -1,
 754         sh_css_host2sp_buffer_queue,
 755         sh_css_sp2host_buffer_queue,
 756         sh_css_host2sp_psys_event_queue,
 757         sh_css_sp2host_psys_event_queue,
 758         sh_css_sp2host_isys_event_queue,
 759         sh_css_host2sp_isys_event_queue,
 760         sh_css_host2sp_tag_cmd_queue,
 761 };
 762
 763 struct sh_css_event_irq_mask {
 764         u16 or_mask;
 765         u16 and_mask;
 766 };
 767
 768 #define SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT                            \
 769         (2 * sizeof(uint16_t))
 770
 771 struct host_sp_communication {
 772         /*
 773          * Don't use enum host2sp_commands, because the sizeof an enum is
 774          * compiler dependent and thus non-portable
 775          */
 776         u32 host2sp_command;
 777
 778         /*
 779          * The frame buffers that are reused by the
 780          * copy pipe in the offline preview mode.
 781          *
 782          * host2sp_offline_frames[0]: the input frame of the preview pipe.
 783          * host2sp_offline_frames[1]: the output frame of the copy pipe.
 784          *
 785          * TODO:
 786          *   Remove it when the Host and the SP is decoupled.
 787          */
 788         ia_css_ptr host2sp_offline_frames[NUM_CONTINUOUS_FRAMES];
 789         ia_css_ptr host2sp_offline_metadata[NUM_CONTINUOUS_FRAMES];
 790
 791         ia_css_ptr host2sp_mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM];
 792         ia_css_ptr host2sp_mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM];
 793         u32 host2sp_num_mipi_frames[N_CSI_PORTS];
 794         u32 host2sp_cont_avail_num_raw_frames;
 795         u32 host2sp_cont_extra_num_raw_frames;
 796         u32 host2sp_cont_target_num_raw_frames;
 797         struct sh_css_event_irq_mask host2sp_event_irq_mask[NR_OF_PIPELINES];
 798
 799 };
 800
 801 #define SIZE_OF_HOST_SP_COMMUNICATION_STRUCT                            \
 802         (sizeof(uint32_t) +                                             \
 803         (NUM_CONTINUOUS_FRAMES * SIZE_OF_HRT_VADDRESS * 2) +            \
 804         (N_CSI_PORTS * NUM_MIPI_FRAMES_PER_STREAM * SIZE_OF_HRT_VADDRESS * 2) +                 \
 805         ((3 + N_CSI_PORTS) * sizeof(uint32_t)) +                                                \
 806         (NR_OF_PIPELINES * SIZE_OF_SH_CSS_EVENT_IRQ_MASK_STRUCT))
 807
 808 struct host_sp_queues {
 809         /*
 810          * Queues for the dynamic frame information,
 811          * i.e. the "in_frame" buffer, the "out_frame"
 812          * buffer and the "vf_out_frame" buffer.
 813          */
 814         ia_css_circbuf_desc_t host2sp_buffer_queues_desc
 815         [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES];
 816         ia_css_circbuf_elem_t host2sp_buffer_queues_elems
 817         [SH_CSS_MAX_SP_THREADS][SH_CSS_MAX_NUM_QUEUES]
 818         [IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE];
 819         ia_css_circbuf_desc_t sp2host_buffer_queues_desc
 820         [SH_CSS_MAX_NUM_QUEUES];
 821         ia_css_circbuf_elem_t sp2host_buffer_queues_elems
 822         [SH_CSS_MAX_NUM_QUEUES][IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE];
 823
 824         /*
 825          * The queues for the events.
 826          */
 827         ia_css_circbuf_desc_t host2sp_psys_event_queue_desc;
 828
 829         ia_css_circbuf_elem_t host2sp_psys_event_queue_elems
 830         [IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE];
 831         ia_css_circbuf_desc_t sp2host_psys_event_queue_desc;
 832
 833         ia_css_circbuf_elem_t sp2host_psys_event_queue_elems
 834         [IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE];
 835
 836         /*
 837          * The queues for the ISYS events.
 838          */
 839         ia_css_circbuf_desc_t host2sp_isys_event_queue_desc;
 840
 841         ia_css_circbuf_elem_t host2sp_isys_event_queue_elems
 842         [IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE];
 843         ia_css_circbuf_desc_t sp2host_isys_event_queue_desc;
 844
 845         ia_css_circbuf_elem_t sp2host_isys_event_queue_elems
 846         [IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE];
 847         /*
 848          * The queue for the tagger commands.
 849          * CHECK: are these last two present on the 2401 ?
 850          */
 851         ia_css_circbuf_desc_t host2sp_tag_cmd_queue_desc;
 852
 853         ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems
 854         [IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE];
 855 };
 856
 857 #define SIZE_OF_QUEUES_ELEMS                                                    \
 858         (SIZE_OF_IA_CSS_CIRCBUF_ELEM_S_STRUCT *                         \
 859         ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_HOST2SP_BUFFER_QUEUE) + \
 860         (SH_CSS_MAX_NUM_QUEUES * IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE) +       \
 861         (IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE) +                           \
 862         (IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE) +                           \
 863         (IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE) +                           \
 864         (IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE) +                           \
 865         (IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE)))
 866
 867 #define IA_CSS_NUM_CIRCBUF_DESCS 5
 868
 869 #define SIZE_OF_QUEUES_DESC \
 870         ((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * \
 871           SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \
 872          (SH_CSS_MAX_NUM_QUEUES * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT) + \
 873          (IA_CSS_NUM_CIRCBUF_DESCS * SIZE_OF_IA_CSS_CIRCBUF_DESC_S_STRUCT))
 874
 875 #define SIZE_OF_HOST_SP_QUEUES_STRUCT           \
 876         (SIZE_OF_QUEUES_ELEMS + SIZE_OF_QUEUES_DESC)
 877
 878 extern int  __printf(1, 0) (*sh_css_printf)(const char *fmt, va_list args);
 879
 880 static inline void  __printf(1, 2) sh_css_print(const char *fmt, ...)
 881 {
 882         va_list ap;
 883
 884         if (sh_css_printf) {
 885                 va_start(ap, fmt);
 886                 sh_css_printf(fmt, ap);
 887                 va_end(ap);
 888         }
 889 }
 890
 891 static inline void  __printf(1, 0) sh_css_vprint(const char *fmt, va_list args)
 892 {
 893         if (sh_css_printf)
 894                 sh_css_printf(fmt, args);
 895 }
 896
 897 /* The following #if is there because this header file is also included
 898    by SP and ISP code but they do not need this data and HIVECC has alignment
 899    issue with the firmware struct/union's.
 900    More permanent solution will be to refactor this include.
 901 */
 902 ia_css_ptr sh_css_params_ddr_address_map(void);
 903
 904 int
 905 sh_css_params_init(void);
 906
 907 void
 908 sh_css_params_uninit(void);
 909
 910 /* For Acceleration API: Flush FW (shared buffer pointer) arguments */
 911 void sh_css_flush(struct ia_css_acc_fw *fw);
 912
 913 void
 914 sh_css_binary_args_reset(struct sh_css_binary_args *args);
 915
 916 /* Check two frames for equality (format, resolution, bits per element) */
 917 bool
 918 sh_css_frame_equal_types(const struct ia_css_frame *frame_a,
 919                          const struct ia_css_frame *frame_b);
 920
 921 bool
 922 sh_css_frame_info_equal_resolution(const struct ia_css_frame_info *info_a,
 923                                    const struct ia_css_frame_info *info_b);
 924
 925 void
 926 sh_css_capture_enable_bayer_downscaling(bool enable);
 927
 928 void
 929 sh_css_binary_print(const struct ia_css_binary *binary);
 930
 931 /* aligned argument of sh_css_frame_info_set_width can be used for an extra alignment requirement.
 932   When 0, no extra alignment is done. */
 933 void
 934 sh_css_frame_info_set_width(struct ia_css_frame_info *info,
 935                             unsigned int width,
 936                             unsigned int aligned);
 937
 938 #if !defined(ISP2401)
 939
 940 unsigned int
 941 sh_css_get_mipi_sizes_for_check(const unsigned int port,
 942                                 const unsigned int idx);
 943
 944 #endif
 945
 946 ia_css_ptr
 947 sh_css_store_sp_group_to_ddr(void);
 948
 949 ia_css_ptr
 950 sh_css_store_sp_stage_to_ddr(unsigned int pipe, unsigned int stage);
 951
 952 ia_css_ptr
 953 sh_css_store_isp_stage_to_ddr(unsigned int pipe, unsigned int stage);
 954
 955 void
 956 sh_css_update_uds_and_crop_info(
 957     const struct ia_css_binary_info *info,
 958     const struct ia_css_frame_info *in_frame_info,
 959     const struct ia_css_frame_info *out_frame_info,
 960     const struct ia_css_resolution *dvs_env,
 961     const struct ia_css_dz_config *zoom,
 962     const struct ia_css_vector *motion_vector,
 963     struct sh_css_uds_info *uds,                /* out */
 964     struct sh_css_crop_pos *sp_out_crop_pos,    /* out */
 965
 966     bool enable_zoom
 967 );
 968
 969 void
 970 sh_css_invalidate_shading_tables(struct ia_css_stream *stream);
 971
 972 struct ia_css_pipeline *
 973 ia_css_pipe_get_pipeline(const struct ia_css_pipe *pipe);
 974
 975 unsigned int
 976 ia_css_pipe_get_pipe_num(const struct ia_css_pipe *pipe);
 977
 978 unsigned int
 979 ia_css_pipe_get_isp_pipe_version(const struct ia_css_pipe *pipe);
 980
 981 bool
 982 sh_css_continuous_is_enabled(uint8_t pipe_num);
 983
 984 struct ia_css_pipe *
 985 find_pipe_by_num(uint32_t pipe_num);
 986
 987 #ifdef ISP2401
 988 void
 989 ia_css_get_crop_offsets(
 990     struct ia_css_pipe *pipe,
 991     struct ia_css_frame_info *in_frame);
 992 #endif
 993
 994 #endif /* _SH_CSS_INTERNAL_H_ */