1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Medifield PNW Camera Imaging ISP subsystem.
5 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
7 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License version
11 * 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/pm_qos.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
26 #include <linux/dmi.h>
27 #include <linux/interrupt.h>
28 #include <linux/bits.h>
30 #include <asm/iosf_mbi.h>
32 #include "../../include/linux/atomisp_gmin_platform.h"
34 #include "atomisp_cmd.h"
35 #include "atomisp_common.h"
36 #include "atomisp_fops.h"
37 #include "atomisp_file.h"
38 #include "atomisp_ioctl.h"
39 #include "atomisp_internal.h"
40 #include "atomisp_acc.h"
41 #include "atomisp-regs.h"
42 #include "atomisp_dfs_tables.h"
43 #include "atomisp_drvfs.h"
45 #include "atomisp_trace_event.h"
47 #include "sh_css_firmware.h"
49 #include "device_access.h"
51 /* Timeouts to wait for all subdevs to be registered */
52 #define SUBDEV_WAIT_TIMEOUT 50 /* ms */
53 #define SUBDEV_WAIT_TIMEOUT_MAX_COUNT 40 /* up to 2 seconds */
55 /* G-Min addition: pull this in from intel_mid_pm.h */
56 #define CSTATE_EXIT_LATENCY_C1 1
58 static uint skip_fwload;
59 module_param(skip_fwload, uint, 0644);
60 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
62 /* set reserved memory pool size in page */
63 static unsigned int repool_pgnr = 32768;
64 module_param(repool_pgnr, uint, 0644);
65 MODULE_PARM_DESC(repool_pgnr,
66 "Set the reserved memory pool size in page (default:32768)");
68 /* set dynamic memory pool size in page */
69 unsigned int dypool_pgnr = UINT_MAX;
70 module_param(dypool_pgnr, uint, 0644);
71 MODULE_PARM_DESC(dypool_pgnr,
72 "Set the dynamic memory pool size in page (default: unlimited)");
74 bool dypool_enable = true;
75 module_param(dypool_enable, bool, 0644);
76 MODULE_PARM_DESC(dypool_enable,
77 "dynamic memory pool enable/disable (default:enabled)");
79 /* memory optimization: deferred firmware loading */
81 module_param(defer_fw_load, bool, 0644);
82 MODULE_PARM_DESC(defer_fw_load,
83 "Defer FW loading until device is opened (default:disable)");
85 /* cross componnet debug message flag */
87 module_param(dbg_level, int, 0644);
88 MODULE_PARM_DESC(dbg_level, "debug message level (default:0)");
90 /* log function switch */
92 module_param(dbg_func, int, 0644);
93 MODULE_PARM_DESC(dbg_func,
94 "log function switch non/trace_printk/printk (default:printk)");
97 module_param(mipicsi_flag, int, 0644);
98 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
100 static char firmware_name[256];
101 module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
102 MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the default firmware name.");
104 /*set to 16x16 since this is the amount of lines and pixels the sensor
105 exports extra. If these are kept at the 10x8 that they were on, in yuv
106 downscaling modes incorrect resolutions where requested to the sensor
107 driver with strange outcomes as a result. The proper way tot do this
108 would be to have a list of tables the specify the sensor res, mipi rec,
109 output res, and isp output res. however since we do not have this yet,
110 the chosen solution is the next best thing. */
112 module_param(pad_w, int, 0644);
113 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
116 module_param(pad_h, int, 0644);
117 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
120 * FIXME: this is a hack to make easier to support ISP2401 variant.
121 * As a given system will either be ISP2401 or not, we can just use
122 * a boolean, in order to replace existing #ifdef ISP2401 everywhere.
124 * Once this driver gets into a better shape, however, the best would
125 * be to replace this to something stored inside atomisp allocated
129 struct device *atomisp_dev;
131 static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {
133 .width = ISP_FREQ_RULE_ANY,
134 .height = ISP_FREQ_RULE_ANY,
135 .fps = ISP_FREQ_RULE_ANY,
136 .isp_freq = ISP_FREQ_400MHZ,
137 .run_mode = ATOMISP_RUN_MODE_VIDEO,
140 .width = ISP_FREQ_RULE_ANY,
141 .height = ISP_FREQ_RULE_ANY,
142 .fps = ISP_FREQ_RULE_ANY,
143 .isp_freq = ISP_FREQ_400MHZ,
144 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
147 .width = ISP_FREQ_RULE_ANY,
148 .height = ISP_FREQ_RULE_ANY,
149 .fps = ISP_FREQ_RULE_ANY,
150 .isp_freq = ISP_FREQ_400MHZ,
151 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
154 .width = ISP_FREQ_RULE_ANY,
155 .height = ISP_FREQ_RULE_ANY,
156 .fps = ISP_FREQ_RULE_ANY,
157 .isp_freq = ISP_FREQ_400MHZ,
158 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
161 .width = ISP_FREQ_RULE_ANY,
162 .height = ISP_FREQ_RULE_ANY,
163 .fps = ISP_FREQ_RULE_ANY,
164 .isp_freq = ISP_FREQ_457MHZ,
165 .run_mode = ATOMISP_RUN_MODE_SDV,
169 /* Merrifield and Moorefield DFS rules */
170 static const struct atomisp_dfs_config dfs_config_merr = {
171 .lowest_freq = ISP_FREQ_200MHZ,
172 .max_freq_at_vmin = ISP_FREQ_400MHZ,
173 .highest_freq = ISP_FREQ_457MHZ,
174 .dfs_table = dfs_rules_merr,
175 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr),
178 static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = {
180 .width = ISP_FREQ_RULE_ANY,
181 .height = ISP_FREQ_RULE_ANY,
182 .fps = ISP_FREQ_RULE_ANY,
183 .isp_freq = ISP_FREQ_400MHZ,
184 .run_mode = ATOMISP_RUN_MODE_VIDEO,
187 .width = ISP_FREQ_RULE_ANY,
188 .height = ISP_FREQ_RULE_ANY,
189 .fps = ISP_FREQ_RULE_ANY,
190 .isp_freq = ISP_FREQ_400MHZ,
191 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
194 .width = ISP_FREQ_RULE_ANY,
195 .height = ISP_FREQ_RULE_ANY,
196 .fps = ISP_FREQ_RULE_ANY,
197 .isp_freq = ISP_FREQ_400MHZ,
198 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
201 .width = ISP_FREQ_RULE_ANY,
202 .height = ISP_FREQ_RULE_ANY,
203 .fps = ISP_FREQ_RULE_ANY,
204 .isp_freq = ISP_FREQ_400MHZ,
205 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
208 .width = ISP_FREQ_RULE_ANY,
209 .height = ISP_FREQ_RULE_ANY,
210 .fps = ISP_FREQ_RULE_ANY,
211 .isp_freq = ISP_FREQ_400MHZ,
212 .run_mode = ATOMISP_RUN_MODE_SDV,
216 static const struct atomisp_dfs_config dfs_config_merr_1179 = {
217 .lowest_freq = ISP_FREQ_200MHZ,
218 .max_freq_at_vmin = ISP_FREQ_400MHZ,
219 .highest_freq = ISP_FREQ_400MHZ,
220 .dfs_table = dfs_rules_merr_1179,
221 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179),
224 static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = {
229 .isp_freq = ISP_FREQ_266MHZ,
230 .run_mode = ATOMISP_RUN_MODE_VIDEO,
236 .isp_freq = ISP_FREQ_266MHZ,
237 .run_mode = ATOMISP_RUN_MODE_VIDEO,
243 .isp_freq = ISP_FREQ_320MHZ,
244 .run_mode = ATOMISP_RUN_MODE_VIDEO,
250 .isp_freq = ISP_FREQ_320MHZ,
251 .run_mode = ATOMISP_RUN_MODE_VIDEO,
254 .width = ISP_FREQ_RULE_ANY,
255 .height = ISP_FREQ_RULE_ANY,
257 .isp_freq = ISP_FREQ_356MHZ,
258 .run_mode = ATOMISP_RUN_MODE_VIDEO,
261 .width = ISP_FREQ_RULE_ANY,
262 .height = ISP_FREQ_RULE_ANY,
263 .fps = ISP_FREQ_RULE_ANY,
264 .isp_freq = ISP_FREQ_200MHZ,
265 .run_mode = ATOMISP_RUN_MODE_VIDEO,
268 .width = ISP_FREQ_RULE_ANY,
269 .height = ISP_FREQ_RULE_ANY,
270 .fps = ISP_FREQ_RULE_ANY,
271 .isp_freq = ISP_FREQ_400MHZ,
272 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
275 .width = ISP_FREQ_RULE_ANY,
276 .height = ISP_FREQ_RULE_ANY,
277 .fps = ISP_FREQ_RULE_ANY,
278 .isp_freq = ISP_FREQ_400MHZ,
279 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
282 .width = ISP_FREQ_RULE_ANY,
283 .height = ISP_FREQ_RULE_ANY,
284 .fps = ISP_FREQ_RULE_ANY,
285 .isp_freq = ISP_FREQ_200MHZ,
286 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
289 .width = ISP_FREQ_RULE_ANY,
290 .height = ISP_FREQ_RULE_ANY,
291 .fps = ISP_FREQ_RULE_ANY,
292 .isp_freq = ISP_FREQ_400MHZ,
293 .run_mode = ATOMISP_RUN_MODE_SDV,
297 static struct atomisp_dfs_config dfs_config_merr_117a = {
298 .lowest_freq = ISP_FREQ_200MHZ,
299 .max_freq_at_vmin = ISP_FREQ_200MHZ,
300 .highest_freq = ISP_FREQ_400MHZ,
301 .dfs_table = dfs_rules_merr_117a,
302 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a),
305 static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = {
307 .width = ISP_FREQ_RULE_ANY,
308 .height = ISP_FREQ_RULE_ANY,
309 .fps = ISP_FREQ_RULE_ANY,
310 .isp_freq = ISP_FREQ_400MHZ,
311 .run_mode = ATOMISP_RUN_MODE_VIDEO,
314 .width = ISP_FREQ_RULE_ANY,
315 .height = ISP_FREQ_RULE_ANY,
316 .fps = ISP_FREQ_RULE_ANY,
317 .isp_freq = ISP_FREQ_400MHZ,
318 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
321 .width = ISP_FREQ_RULE_ANY,
322 .height = ISP_FREQ_RULE_ANY,
323 .fps = ISP_FREQ_RULE_ANY,
324 .isp_freq = ISP_FREQ_400MHZ,
325 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
328 .width = ISP_FREQ_RULE_ANY,
329 .height = ISP_FREQ_RULE_ANY,
330 .fps = ISP_FREQ_RULE_ANY,
331 .isp_freq = ISP_FREQ_400MHZ,
332 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
335 .width = ISP_FREQ_RULE_ANY,
336 .height = ISP_FREQ_RULE_ANY,
337 .fps = ISP_FREQ_RULE_ANY,
338 .isp_freq = ISP_FREQ_400MHZ,
339 .run_mode = ATOMISP_RUN_MODE_SDV,
343 static const struct atomisp_dfs_config dfs_config_byt = {
344 .lowest_freq = ISP_FREQ_200MHZ,
345 .max_freq_at_vmin = ISP_FREQ_400MHZ,
346 .highest_freq = ISP_FREQ_400MHZ,
347 .dfs_table = dfs_rules_byt,
348 .dfs_table_size = ARRAY_SIZE(dfs_rules_byt),
351 static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = {
353 .width = ISP_FREQ_RULE_ANY,
354 .height = ISP_FREQ_RULE_ANY,
355 .fps = ISP_FREQ_RULE_ANY,
356 .isp_freq = ISP_FREQ_320MHZ,
357 .run_mode = ATOMISP_RUN_MODE_VIDEO,
360 .width = ISP_FREQ_RULE_ANY,
361 .height = ISP_FREQ_RULE_ANY,
362 .fps = ISP_FREQ_RULE_ANY,
363 .isp_freq = ISP_FREQ_356MHZ,
364 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
367 .width = ISP_FREQ_RULE_ANY,
368 .height = ISP_FREQ_RULE_ANY,
369 .fps = ISP_FREQ_RULE_ANY,
370 .isp_freq = ISP_FREQ_320MHZ,
371 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
374 .width = ISP_FREQ_RULE_ANY,
375 .height = ISP_FREQ_RULE_ANY,
376 .fps = ISP_FREQ_RULE_ANY,
377 .isp_freq = ISP_FREQ_320MHZ,
378 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
383 .fps = ISP_FREQ_RULE_ANY,
384 .isp_freq = ISP_FREQ_320MHZ,
385 .run_mode = ATOMISP_RUN_MODE_SDV,
388 .width = ISP_FREQ_RULE_ANY,
389 .height = ISP_FREQ_RULE_ANY,
390 .fps = ISP_FREQ_RULE_ANY,
391 .isp_freq = ISP_FREQ_356MHZ,
392 .run_mode = ATOMISP_RUN_MODE_SDV,
396 static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = {
398 .width = ISP_FREQ_RULE_ANY,
399 .height = ISP_FREQ_RULE_ANY,
400 .fps = ISP_FREQ_RULE_ANY,
401 .isp_freq = ISP_FREQ_356MHZ,
402 .run_mode = ATOMISP_RUN_MODE_VIDEO,
405 .width = ISP_FREQ_RULE_ANY,
406 .height = ISP_FREQ_RULE_ANY,
407 .fps = ISP_FREQ_RULE_ANY,
408 .isp_freq = ISP_FREQ_356MHZ,
409 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
412 .width = ISP_FREQ_RULE_ANY,
413 .height = ISP_FREQ_RULE_ANY,
414 .fps = ISP_FREQ_RULE_ANY,
415 .isp_freq = ISP_FREQ_320MHZ,
416 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
419 .width = ISP_FREQ_RULE_ANY,
420 .height = ISP_FREQ_RULE_ANY,
421 .fps = ISP_FREQ_RULE_ANY,
422 .isp_freq = ISP_FREQ_320MHZ,
423 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
426 .width = ISP_FREQ_RULE_ANY,
427 .height = ISP_FREQ_RULE_ANY,
428 .fps = ISP_FREQ_RULE_ANY,
429 .isp_freq = ISP_FREQ_356MHZ,
430 .run_mode = ATOMISP_RUN_MODE_SDV,
434 static const struct atomisp_dfs_config dfs_config_cht = {
435 .lowest_freq = ISP_FREQ_100MHZ,
436 .max_freq_at_vmin = ISP_FREQ_356MHZ,
437 .highest_freq = ISP_FREQ_356MHZ,
438 .dfs_table = dfs_rules_cht,
439 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht),
442 /* This one should be visible also by atomisp_cmd.c */
443 const struct atomisp_dfs_config dfs_config_cht_soc = {
444 .lowest_freq = ISP_FREQ_100MHZ,
445 .max_freq_at_vmin = ISP_FREQ_356MHZ,
446 .highest_freq = ISP_FREQ_356MHZ,
447 .dfs_table = dfs_rules_cht_soc,
448 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc),
451 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name,
452 unsigned int run_mode)
455 const char *direction;
457 switch (video->type) {
458 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
459 direction = "output";
460 video->pad.flags = MEDIA_PAD_FL_SINK;
461 video->vdev.fops = &atomisp_fops;
462 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
464 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
466 video->pad.flags = MEDIA_PAD_FL_SOURCE;
467 video->vdev.fops = &atomisp_file_fops;
468 video->vdev.ioctl_ops = &atomisp_file_ioctl_ops;
474 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
478 /* Initialize the video device. */
479 snprintf(video->vdev.name, sizeof(video->vdev.name),
480 "ATOMISP ISP %s %s", name, direction);
481 video->vdev.release = video_device_release_empty;
482 video_set_drvdata(&video->vdev, video->isp);
483 video->default_run_mode = run_mode;
488 void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
490 video->vdev.fops = &atomisp_fops;
491 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
493 /* Initialize the video device. */
494 snprintf(video->vdev.name, sizeof(video->vdev.name),
495 "ATOMISP ISP %s", name);
496 video->vdev.release = video_device_release_empty;
497 video_set_drvdata(&video->vdev, video->isp);
500 void atomisp_video_unregister(struct atomisp_video_pipe *video)
502 if (video_is_registered(&video->vdev)) {
503 media_entity_cleanup(&video->vdev.entity);
504 video_unregister_device(&video->vdev);
508 void atomisp_acc_unregister(struct atomisp_acc_pipe *video)
510 if (video_is_registered(&video->vdev))
511 video_unregister_device(&video->vdev);
514 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
516 struct pci_dev *pdev = to_pci_dev(isp->dev);
518 dev_dbg(isp->dev, "%s\n", __func__);
520 pci_read_config_word(pdev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
521 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
522 pci_read_config_dword(pdev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
523 pci_read_config_dword(pdev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
524 pci_read_config_word(pdev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
525 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
526 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &isp->saved_regs.interrupt_control);
528 pci_read_config_dword(pdev, MRFLD_PCI_PMCS, &isp->saved_regs.pmcs);
529 /* Ensure read/write combining is enabled. */
530 pci_read_config_dword(pdev, PCI_I_CONTROL, &isp->saved_regs.i_control);
531 isp->saved_regs.i_control |=
532 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
533 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
534 pci_read_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
535 &isp->saved_regs.csi_access_viol);
536 pci_read_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
537 &isp->saved_regs.csi_rcomp_config);
539 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
540 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
541 * and sensor sending "continuous clock".
542 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
543 * is missed, and IUNIT can hang.
544 * For both issues, setting this bit is a workaround.
546 isp->saved_regs.csi_rcomp_config |= MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
547 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
548 &isp->saved_regs.csi_afe_dly);
549 pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
550 &isp->saved_regs.csi_control);
551 if (isp->media_dev.hw_revision >=
552 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
553 isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_PARPATHEN;
555 * On CHT CSI_READY bit should be enabled before stream on
557 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
558 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
559 isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_CSI_READY;
560 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
561 &isp->saved_regs.csi_afe_rcomp_config);
562 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
563 &isp->saved_regs.csi_afe_hs_control);
564 pci_read_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
565 &isp->saved_regs.csi_deadline_control);
569 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
571 struct pci_dev *pdev = to_pci_dev(isp->dev);
573 dev_dbg(isp->dev, "%s\n", __func__);
575 pci_write_config_word(pdev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
576 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, isp->saved_regs.ispmmadr);
577 pci_write_config_dword(pdev, PCI_MSI_CAPID, isp->saved_regs.msicap);
578 pci_write_config_dword(pdev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
579 pci_write_config_word(pdev, PCI_MSI_DATA, isp->saved_regs.msi_data);
580 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
581 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, isp->saved_regs.interrupt_control);
582 pci_write_config_dword(pdev, PCI_I_CONTROL, isp->saved_regs.i_control);
584 pci_write_config_dword(pdev, MRFLD_PCI_PMCS, isp->saved_regs.pmcs);
585 pci_write_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
586 isp->saved_regs.csi_access_viol);
587 pci_write_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
588 isp->saved_regs.csi_rcomp_config);
589 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
590 isp->saved_regs.csi_afe_dly);
591 pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
592 isp->saved_regs.csi_control);
593 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
594 isp->saved_regs.csi_afe_rcomp_config);
595 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
596 isp->saved_regs.csi_afe_hs_control);
597 pci_write_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
598 isp->saved_regs.csi_deadline_control);
601 * for MRFLD, Software/firmware needs to write a 1 to bit0
602 * of the register at CSI_RECEIVER_SELECTION_REG to enable
603 * SH CSI backend write 0 will enable Arasan CSI backend,
604 * which has bugs(like sighting:4567697 and 4567699) and
605 * will be removed in B0
607 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
611 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
613 struct pci_dev *pdev = to_pci_dev(isp->dev);
617 spin_lock_irqsave(&isp->lock, flags);
618 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
619 spin_unlock_irqrestore(&isp->lock, flags);
620 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
624 * MRFLD HAS requirement: cannot power off i-unit if
625 * ISP has IRQ not serviced.
626 * So, here we need to check if there is any pending
627 * IRQ, if so, waiting for it to be served
629 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
630 irq &= BIT(INTR_IIR);
631 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
633 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
634 if (!(irq & BIT(INTR_IIR)))
637 atomisp_css2_hw_store_32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
638 atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
641 "%s: fail to clear isp interrupt status reg=0x%x\n",
643 spin_unlock_irqrestore(&isp->lock, flags);
646 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
647 irq &= BIT(INTR_IIR);
648 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
650 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
651 if (!(irq & BIT(INTR_IIR))) {
652 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG, 0x0);
656 "%s: error in iunit interrupt. status reg=0x%x\n",
658 spin_unlock_irqrestore(&isp->lock, flags);
664 * before powering off IUNIT, clear the pending interrupts
665 * and disable the interrupt. driver should avoid writing 0
666 * to IIR. It could block subsequent interrupt messages.
667 * HW sighting:4568410.
669 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
670 irq &= ~BIT(INTR_IER);
671 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
673 atomisp_msi_irq_uninit(isp);
674 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
675 spin_unlock_irqrestore(&isp->lock, flags);
681 * WA for DDR DVFS enable/disable
682 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
684 static void punit_ddr_dvfs_enable(bool enable)
686 int door_bell = 1 << 8;
690 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
692 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
694 reg |= (MRFLD_BIT1 | door_bell);
695 reg &= ~(MRFLD_BIT0);
697 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
699 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
700 while ((reg & door_bell) && max_wait--) {
701 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
702 usleep_range(100, 500);
706 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
709 static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable)
711 unsigned long timeout;
712 u32 val = enable ? MRFLD_ISPSSPM0_IUNIT_POWER_ON :
713 MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
715 dev_dbg(isp->dev, "IUNIT power-%s.\n", enable ? "on" : "off");
717 /* WA for P-Unit, if DVFS enabled, ISP timeout observed */
718 if (IS_CHT && enable)
719 punit_ddr_dvfs_enable(false);
722 * FIXME:WA for ECS28A, with this sleep, CTS
723 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
724 * PASS, no impact on other platforms
726 if (IS_BYT && enable)
729 /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
730 iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0,
731 val, MRFLD_ISPSSPM0_ISPSSC_MASK);
734 if (IS_CHT && !enable)
735 punit_ddr_dvfs_enable(true);
738 * There should be no IUNIT access while power-down is
739 * in progress. HW sighting: 4567865.
740 * Wait up to 50 ms for the IUNIT to shut down.
741 * And we do the same for power on.
743 timeout = jiffies + msecs_to_jiffies(50);
747 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
748 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp);
749 tmp = (tmp >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) & MRFLD_ISPSSPM0_ISPSSC_MASK;
751 trace_ipu_cstate(enable);
755 if (time_after(jiffies, timeout))
758 /* FIXME: experienced value for delay */
759 usleep_range(100, 150);
765 dev_err(isp->dev, "IUNIT power-%s timeout.\n", enable ? "on" : "off");
769 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
770 int atomisp_mrfld_power_down(struct atomisp_device *isp)
772 return atomisp_mrfld_power(isp, false);
775 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
776 int atomisp_mrfld_power_up(struct atomisp_device *isp)
778 return atomisp_mrfld_power(isp, true);
781 int atomisp_runtime_suspend(struct device *dev)
783 struct atomisp_device *isp = (struct atomisp_device *)
784 dev_get_drvdata(dev);
787 ret = atomisp_mrfld_pre_power_down(isp);
791 /*Turn off the ISP d-phy*/
792 ret = atomisp_ospm_dphy_down(isp);
795 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
796 return atomisp_mrfld_power_down(isp);
799 int atomisp_runtime_resume(struct device *dev)
801 struct atomisp_device *isp = (struct atomisp_device *)
802 dev_get_drvdata(dev);
805 ret = atomisp_mrfld_power_up(isp);
809 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
810 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
811 /*Turn on ISP d-phy */
812 ret = atomisp_ospm_dphy_up(isp);
814 dev_err(isp->dev, "Failed to power up ISP!.\n");
819 /*restore register values for iUnit and iUnitPHY registers*/
820 if (isp->saved_regs.pcicmdsts)
821 atomisp_restore_iunit_reg(isp);
823 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
827 static int __maybe_unused atomisp_suspend(struct device *dev)
829 struct atomisp_device *isp = (struct atomisp_device *)
830 dev_get_drvdata(dev);
831 /* FIXME: only has one isp_subdev at present */
832 struct atomisp_sub_device *asd = &isp->asd[0];
837 * FIXME: Suspend is not supported by sensors. Abort if any video
840 if (atomisp_dev_users(isp))
843 spin_lock_irqsave(&isp->lock, flags);
844 if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
845 spin_unlock_irqrestore(&isp->lock, flags);
846 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
849 spin_unlock_irqrestore(&isp->lock, flags);
851 ret = atomisp_mrfld_pre_power_down(isp);
855 /*Turn off the ISP d-phy */
856 ret = atomisp_ospm_dphy_down(isp);
858 dev_err(isp->dev, "fail to power off ISP\n");
861 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
862 return atomisp_mrfld_power_down(isp);
865 static int __maybe_unused atomisp_resume(struct device *dev)
867 struct atomisp_device *isp = (struct atomisp_device *)
868 dev_get_drvdata(dev);
871 ret = atomisp_mrfld_power_up(isp);
875 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
877 /*Turn on ISP d-phy */
878 ret = atomisp_ospm_dphy_up(isp);
880 dev_err(isp->dev, "Failed to power up ISP!.\n");
884 /*restore register values for iUnit and iUnitPHY registers*/
885 if (isp->saved_regs.pcicmdsts)
886 atomisp_restore_iunit_reg(isp);
888 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
892 int atomisp_csi_lane_config(struct atomisp_device *isp)
894 struct pci_dev *pdev = to_pci_dev(isp->dev);
895 static const struct {
897 u8 lanes[MRFLD_PORT_NUM];
899 /* Tangier/Merrifield available lane configurations */
900 { 0x00, { 4, 1, 0 } }, /* 00000 */
901 { 0x01, { 3, 1, 0 } }, /* 00001 */
902 { 0x02, { 2, 1, 0 } }, /* 00010 */
903 { 0x03, { 1, 1, 0 } }, /* 00011 */
904 { 0x04, { 2, 1, 2 } }, /* 00100 */
905 { 0x08, { 3, 1, 1 } }, /* 01000 */
906 { 0x09, { 2, 1, 1 } }, /* 01001 */
907 { 0x0a, { 1, 1, 1 } }, /* 01010 */
909 /* Anniedale/Moorefield only configurations */
910 { 0x10, { 4, 2, 0 } }, /* 10000 */
911 { 0x11, { 3, 2, 0 } }, /* 10001 */
912 { 0x12, { 2, 2, 0 } }, /* 10010 */
913 { 0x13, { 1, 2, 0 } }, /* 10011 */
914 { 0x14, { 2, 2, 2 } }, /* 10100 */
915 { 0x18, { 3, 2, 1 } }, /* 11000 */
916 { 0x19, { 2, 2, 1 } }, /* 11001 */
917 { 0x1a, { 1, 2, 1 } }, /* 11010 */
921 u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
924 u32 port_config_mask;
925 int port3_lanes_shift;
927 if (isp->media_dev.hw_revision <
928 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
929 ATOMISP_HW_REVISION_SHIFT) {
931 port_config_mask = MRFLD_PORT_CONFIG_MASK;
932 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
934 /* Moorefield / Cherryview */
935 port_config_mask = CHV_PORT_CONFIG_MASK;
936 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
939 if (isp->media_dev.hw_revision <
940 ATOMISP_HW_REVISION_ISP2401 <<
941 ATOMISP_HW_REVISION_SHIFT) {
942 /* Merrifield / Moorefield legacy input system */
943 nportconfigs = MRFLD_PORT_CONFIG_NUM;
945 /* Moorefield / Cherryview new input system */
946 nportconfigs = ARRAY_SIZE(portconfigs);
949 for (i = 0; i < isp->input_cnt; i++) {
950 struct camera_mipi_info *mipi_info;
952 if (isp->inputs[i].type != RAW_CAMERA &&
953 isp->inputs[i].type != SOC_CAMERA)
956 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
960 switch (mipi_info->port) {
961 case ATOMISP_CAMERA_PORT_PRIMARY:
962 sensor_lanes[0] = mipi_info->num_lanes;
964 case ATOMISP_CAMERA_PORT_SECONDARY:
965 sensor_lanes[1] = mipi_info->num_lanes;
967 case ATOMISP_CAMERA_PORT_TERTIARY:
968 sensor_lanes[2] = mipi_info->num_lanes;
972 "%s: invalid port: %d for the %dth sensor\n",
973 __func__, mipi_info->port, i);
978 for (i = 0; i < nportconfigs; i++) {
979 for (j = 0; j < MRFLD_PORT_NUM; j++)
980 if (sensor_lanes[j] &&
981 sensor_lanes[j] != portconfigs[i].lanes[j])
984 if (j == MRFLD_PORT_NUM)
985 break; /* Found matching setting */
988 if (i >= nportconfigs) {
990 "%s: could not find the CSI port setting for %d-%d-%d\n",
992 sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
996 pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
997 csi_control &= ~port_config_mask;
998 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
999 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
1000 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
1001 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
1002 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
1003 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
1004 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
1006 pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
1009 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
1010 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
1011 portconfigs[i].lanes[2], csi_control);
1016 static int atomisp_subdev_probe(struct atomisp_device *isp)
1018 const struct atomisp_platform_data *pdata;
1019 struct intel_v4l2_subdev_table *subdevs;
1020 int ret, raw_index = -1, count;
1022 pdata = atomisp_get_platform_data();
1024 dev_err(isp->dev, "no platform data available\n");
1028 /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */
1029 for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) {
1030 int camera_count = 0;
1032 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1033 if (subdevs->type == RAW_CAMERA ||
1034 subdevs->type == SOC_CAMERA)
1039 msleep(SUBDEV_WAIT_TIMEOUT);
1041 /* Wait more time to give more time for subdev init code to finish */
1042 msleep(5 * SUBDEV_WAIT_TIMEOUT);
1044 /* FIXME: should, instead, use I2C probe */
1046 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1047 struct v4l2_subdev *subdev;
1048 struct i2c_board_info *board_info =
1049 &subdevs->v4l2_subdev.board_info;
1050 struct i2c_adapter *adapter =
1051 i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
1054 dev_info(isp->dev, "Probing Subdev %s\n", board_info->type);
1058 "Failed to find i2c adapter for subdev %s\n",
1063 /* In G-Min, the sensor devices will already be probed
1064 * (via ACPI) and registered, do not create new
1066 subdev = atomisp_gmin_find_subdev(adapter, board_info);
1068 dev_warn(isp->dev, "Subdev %s not found\n",
1072 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
1074 dev_warn(isp->dev, "Subdev %s detection fail\n",
1080 dev_warn(isp->dev, "Subdev %s detection fail\n",
1085 dev_info(isp->dev, "Subdev %s successfully register\n",
1088 switch (subdevs->type) {
1090 dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
1091 raw_index = isp->input_cnt;
1094 dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
1095 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1097 "too many atomisp inputs, ignored\n");
1101 isp->inputs[isp->input_cnt].type = subdevs->type;
1102 isp->inputs[isp->input_cnt].port = subdevs->port;
1103 isp->inputs[isp->input_cnt].camera = subdev;
1104 isp->inputs[isp->input_cnt].sensor_index = 0;
1106 * initialize the subdev frame size, then next we can
1107 * judge whether frame_size store effective value via
1110 isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
1111 isp->inputs[isp->input_cnt].camera_caps =
1112 atomisp_get_default_camera_caps();
1113 sensor_num = isp->inputs[isp->input_cnt]
1114 .camera_caps->sensor_num;
1116 for (i = 1; i < sensor_num; i++) {
1117 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1119 "atomisp inputs out of range\n");
1122 isp->inputs[isp->input_cnt] =
1123 isp->inputs[isp->input_cnt - 1];
1124 isp->inputs[isp->input_cnt].sensor_index = i;
1131 "too many atomisp motors, ignored %s\n",
1135 isp->motor = subdev;
1141 "too many atomisp flash devices, ignored %s\n",
1145 isp->flash = subdev;
1148 dev_dbg(isp->dev, "unknown subdev probed\n");
1154 * HACK: Currently VCM belongs to primary sensor only, but correct
1155 * approach must be to acquire from platform code which sensor
1158 if (isp->motor && raw_index >= 0)
1159 isp->inputs[raw_index].motor = isp->motor;
1161 /* Proceed even if no modules detected. For COS mode and no modules. */
1162 if (!isp->input_cnt)
1163 dev_warn(isp->dev, "no camera attached or fail to detect\n");
1165 dev_info(isp->dev, "detected %d camera sensors\n",
1168 return atomisp_csi_lane_config(isp);
1171 static void atomisp_unregister_entities(struct atomisp_device *isp)
1174 struct v4l2_subdev *sd, *next;
1176 for (i = 0; i < isp->num_of_streams; i++)
1177 atomisp_subdev_unregister_entities(&isp->asd[i]);
1178 atomisp_tpg_unregister_entities(&isp->tpg);
1179 atomisp_file_input_unregister_entities(&isp->file_dev);
1180 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1181 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1183 list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
1184 v4l2_device_unregister_subdev(sd);
1186 v4l2_device_unregister(&isp->v4l2_dev);
1187 media_device_unregister(&isp->media_dev);
1188 media_device_cleanup(&isp->media_dev);
1191 static int atomisp_register_entities(struct atomisp_device *isp)
1196 isp->media_dev.dev = isp->dev;
1198 strscpy(isp->media_dev.model, "Intel Atom ISP",
1199 sizeof(isp->media_dev.model));
1201 media_device_init(&isp->media_dev);
1202 isp->v4l2_dev.mdev = &isp->media_dev;
1203 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1205 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1207 goto v4l2_device_failed;
1210 ret = atomisp_subdev_probe(isp);
1212 goto csi_and_subdev_probe_failed;
1214 /* Register internal entities */
1215 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
1216 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
1222 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
1223 /* deregister all registered CSI ports */
1225 atomisp_mipi_csi2_unregister_entities(
1226 &isp->csi2_port[i]);
1228 goto csi_and_subdev_probe_failed;
1232 atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
1234 dev_err(isp->dev, "atomisp_file_input_register_entities\n");
1235 goto file_input_register_failed;
1238 ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
1240 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
1241 goto tpg_register_failed;
1244 for (i = 0; i < isp->num_of_streams; i++) {
1245 struct atomisp_sub_device *asd = &isp->asd[i];
1247 ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev);
1250 "atomisp_subdev_register_entities fail\n");
1252 atomisp_subdev_unregister_entities(
1254 goto subdev_register_failed;
1258 for (i = 0; i < isp->num_of_streams; i++) {
1259 struct atomisp_sub_device *asd = &isp->asd[i];
1261 init_completion(&asd->init_done);
1263 asd->delayed_init_workq =
1264 alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
1266 if (!asd->delayed_init_workq) {
1268 "Failed to initialize delayed init workq\n");
1272 destroy_workqueue(isp->asd[i - 1].
1273 delayed_init_workq);
1274 goto wq_alloc_failed;
1276 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
1279 for (i = 0; i < isp->input_cnt; i++) {
1280 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
1281 dev_err(isp->dev, "isp->inputs port %d not supported\n",
1282 isp->inputs[i].port);
1289 "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt);
1290 isp->inputs[isp->input_cnt].type = FILE_INPUT;
1291 isp->inputs[isp->input_cnt].port = -1;
1292 isp->inputs[isp->input_cnt].camera_caps =
1293 atomisp_get_default_camera_caps();
1294 isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
1296 if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
1298 "TPG detected, camera_cnt: %d\n", isp->input_cnt);
1299 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
1300 isp->inputs[isp->input_cnt].port = -1;
1301 isp->inputs[isp->input_cnt].camera_caps =
1302 atomisp_get_default_camera_caps();
1303 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
1305 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
1308 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1312 return media_device_register(&isp->media_dev);
1315 for (i = 0; i < isp->num_of_streams; i++)
1316 destroy_workqueue(isp->asd[i].
1317 delayed_init_workq);
1319 for (i = 0; i < isp->num_of_streams; i++)
1320 atomisp_subdev_unregister_entities(
1322 subdev_register_failed:
1323 atomisp_tpg_unregister_entities(&isp->tpg);
1324 tpg_register_failed:
1325 atomisp_file_input_unregister_entities(&isp->file_dev);
1326 file_input_register_failed:
1327 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1328 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1329 csi_and_subdev_probe_failed:
1330 v4l2_device_unregister(&isp->v4l2_dev);
1332 media_device_unregister(&isp->media_dev);
1333 media_device_cleanup(&isp->media_dev);
1337 static int atomisp_initialize_modules(struct atomisp_device *isp)
1341 ret = atomisp_mipi_csi2_init(isp);
1343 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1344 goto error_mipi_csi2;
1347 ret = atomisp_file_input_init(isp);
1350 "file input device initialization failed\n");
1351 goto error_file_input;
1354 ret = atomisp_tpg_init(isp);
1356 dev_err(isp->dev, "tpg initialization failed\n");
1360 ret = atomisp_subdev_init(isp);
1362 dev_err(isp->dev, "ISP subdev initialization failed\n");
1363 goto error_isp_subdev;
1370 atomisp_tpg_cleanup(isp);
1372 atomisp_file_input_cleanup(isp);
1374 atomisp_mipi_csi2_cleanup(isp);
1378 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1380 atomisp_tpg_cleanup(isp);
1381 atomisp_file_input_cleanup(isp);
1382 atomisp_mipi_csi2_cleanup(isp);
1385 const struct firmware *
1386 atomisp_load_firmware(struct atomisp_device *isp)
1388 const struct firmware *fw;
1390 char *fw_path = NULL;
1395 if (firmware_name[0] != '\0') {
1396 fw_path = firmware_name;
1398 if ((isp->media_dev.hw_revision >> ATOMISP_HW_REVISION_SHIFT)
1399 == ATOMISP_HW_REVISION_ISP2401)
1400 fw_path = "/*(DEBLOBBED)*/";
1402 if (isp->media_dev.hw_revision ==
1403 ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1404 | ATOMISP_HW_STEPPING_A0))
1405 fw_path = "/*(DEBLOBBED)*/";
1407 if (isp->media_dev.hw_revision ==
1408 ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1409 | ATOMISP_HW_STEPPING_B0))
1410 fw_path = "/*(DEBLOBBED)*/";
1414 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1415 isp->media_dev.hw_revision);
1419 rc = reject_firmware(&fw, fw_path, isp->dev);
1422 "atomisp: Error %d while requesting firmware %s\n",
1431 * Check for flags the driver was compiled with against the PCI
1432 * device. Always returns true on other than ISP 2400.
1434 static bool is_valid_device(struct pci_dev *pdev, const struct pci_device_id *id)
1437 const char *product;
1439 product = dmi_get_system_info(DMI_PRODUCT_NAME);
1441 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1442 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1443 name = "Merrifield";
1445 case ATOMISP_PCI_DEVICE_SOC_BYT:
1448 case ATOMISP_PCI_DEVICE_SOC_ANN:
1451 case ATOMISP_PCI_DEVICE_SOC_CHT:
1452 name = "Cherrytrail";
1455 dev_err(&pdev->dev, "%s: unknown device ID %x04:%x04\n",
1456 product, id->vendor, id->device);
1460 if (pdev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1461 dev_err(&pdev->dev, "%s revision %d is not unsupported\n",
1462 name, pdev->revision);
1468 * remove the if once the driver become generic
1473 dev_err(&pdev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
1479 dev_err(&pdev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
1485 dev_info(&pdev->dev, "Detected %s version %d (ISP240%c) on %s\n",
1486 name, pdev->revision, IS_ISP2401 ? '1' : '0', product);
1491 static int init_atomisp_wdts(struct atomisp_device *isp)
1495 atomic_set(&isp->wdt_work_queued, 0);
1496 isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1);
1497 if (!isp->wdt_work_queue) {
1498 dev_err(isp->dev, "Failed to initialize wdt work queue\n");
1502 INIT_WORK(&isp->wdt_work, atomisp_wdt_work);
1504 for (i = 0; i < isp->num_of_streams; i++) {
1505 struct atomisp_sub_device *asd = &isp->asd[i];
1508 timer_setup(&asd->wdt, atomisp_wdt, 0);
1510 timer_setup(&asd->video_out_capture.wdt,
1512 timer_setup(&asd->video_out_preview.wdt,
1514 timer_setup(&asd->video_out_vf.wdt, atomisp_wdt, 0);
1515 timer_setup(&asd->video_out_video_capture.wdt,
1524 #define ATOM_ISP_PCI_BAR 0
1526 static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1528 const struct atomisp_platform_data *pdata;
1529 struct atomisp_device *isp;
1534 if (!is_valid_device(pdev, id))
1537 /* Pointer to struct device. */
1538 atomisp_dev = &pdev->dev;
1540 pdata = atomisp_get_platform_data();
1542 dev_warn(&pdev->dev, "no platform data available\n");
1544 err = pcim_enable_device(pdev);
1546 dev_err(&pdev->dev, "Failed to enable CI ISP device (%d)\n", err);
1550 start = pci_resource_start(pdev, ATOM_ISP_PCI_BAR);
1551 dev_dbg(&pdev->dev, "start: 0x%x\n", start);
1553 err = pcim_iomap_regions(pdev, BIT(ATOM_ISP_PCI_BAR), pci_name(pdev));
1555 dev_err(&pdev->dev, "Failed to I/O memory remapping (%d)\n", err);
1559 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
1562 goto atomisp_dev_alloc_fail;
1565 isp->dev = &pdev->dev;
1566 isp->base = pcim_iomap_table(pdev)[ATOM_ISP_PCI_BAR];
1567 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1568 isp->saved_regs.ispmmadr = start;
1570 dev_dbg(&pdev->dev, "atomisp mmio base: %p\n", isp->base);
1572 rt_mutex_init(&isp->mutex);
1573 rt_mutex_init(&isp->loading);
1574 mutex_init(&isp->streamoff_mutex);
1575 spin_lock_init(&isp->lock);
1577 /* This is not a true PCI device on SoC, so the delay is not needed. */
1578 pdev->d3hot_delay = 0;
1580 pci_set_drvdata(pdev, isp);
1582 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1583 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1584 isp->media_dev.hw_revision =
1585 (ATOMISP_HW_REVISION_ISP2400
1586 << ATOMISP_HW_REVISION_SHIFT) |
1587 ATOMISP_HW_STEPPING_B0;
1589 switch (id->device) {
1590 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1591 isp->dfs = &dfs_config_merr_1179;
1593 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1594 isp->dfs = &dfs_config_merr_117a;
1598 isp->dfs = &dfs_config_merr;
1601 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1603 case ATOMISP_PCI_DEVICE_SOC_BYT:
1604 isp->media_dev.hw_revision =
1605 (ATOMISP_HW_REVISION_ISP2400
1606 << ATOMISP_HW_REVISION_SHIFT) |
1607 ATOMISP_HW_STEPPING_B0;
1610 * Note: some Intel-based tablets with Android use a different
1611 * DFS table. Based on the comments at the Yocto Aero meta
1612 * version of this driver (at the ssid.h header), they're
1613 * identified via a "spid" var:
1615 * androidboot.spid=vend:cust:manu:plat:prod:hard
1617 * As we don't have this upstream, nor we know enough details
1618 * to use a DMI or PCI match table, the old code was just
1619 * removed, but let's keep a note here as a reminder that,
1620 * for certain devices, we may need to limit the max DFS
1621 * frequency to be below certain values, adjusting the
1622 * resolution accordingly.
1624 isp->dfs = &dfs_config_byt;
1627 * HPLL frequency is known to be device-specific, but we don't
1628 * have specs yet for exactly how it varies. Default to
1629 * BYT-CR but let provisioning set it via EFI variable
1631 isp->hpll_freq = gmin_get_var_int(&pdev->dev, false, "HpllFreq", HPLL_FREQ_2000MHZ);
1634 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1635 * in power off. Set d3cold_delay to 0 since default 100ms is not
1638 pdev->d3cold_delay = 0;
1640 case ATOMISP_PCI_DEVICE_SOC_ANN:
1641 isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401
1642 << ATOMISP_HW_REVISION_SHIFT);
1643 isp->media_dev.hw_revision |= pdev->revision < 2 ?
1644 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1645 isp->dfs = &dfs_config_merr;
1646 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1648 case ATOMISP_PCI_DEVICE_SOC_CHT:
1649 isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401
1650 << ATOMISP_HW_REVISION_SHIFT);
1651 isp->media_dev.hw_revision |= pdev->revision < 2 ?
1652 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1654 isp->dfs = &dfs_config_cht;
1655 pdev->d3cold_delay = 0;
1657 iosf_mbi_read(BT_MBI_UNIT_CCK, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1658 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1660 isp->hpll_freq = HPLL_FREQ_800MHZ;
1663 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1666 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1669 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1670 dev_warn(&pdev->dev, "read HPLL from cck failed. Default to 1600 MHz.\n");
1674 dev_err(&pdev->dev, "un-supported IUNIT device\n");
1676 goto atomisp_dev_alloc_fail;
1679 dev_info(&pdev->dev, "ISP HPLL frequency base = %d MHz\n", isp->hpll_freq);
1681 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1683 /* Load isp firmware from user space */
1684 if (!defer_fw_load) {
1685 isp->firmware = atomisp_load_firmware(isp);
1686 if (!isp->firmware) {
1688 dev_dbg(&pdev->dev, "Firmware load failed\n");
1692 err = sh_css_check_firmware_version(isp->dev, isp->firmware->data);
1694 dev_dbg(&pdev->dev, "Firmware version check failed\n");
1695 goto fw_validation_fail;
1698 dev_info(&pdev->dev, "Firmware load will be deferred\n");
1701 pci_set_master(pdev);
1703 err = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
1705 dev_err(&pdev->dev, "Failed to enable msi (%d)\n", err);
1706 goto enable_msi_fail;
1709 atomisp_msi_irq_init(isp);
1711 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
1714 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1715 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1716 * backend write 0 will enable Arasan CSI backend, which has
1717 * bugs(like sighting:4567697 and 4567699) and will be removed
1720 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1722 if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1723 ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1727 * Workaround for imbalance data eye issue which is observed
1730 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, &csi_afe_trim);
1731 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1732 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1733 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1734 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1735 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1736 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1737 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1738 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1739 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1740 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1741 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1742 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1743 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, csi_afe_trim);
1746 rt_mutex_lock(&isp->loading);
1748 err = atomisp_initialize_modules(isp);
1750 dev_err(&pdev->dev, "atomisp_initialize_modules (%d)\n", err);
1751 goto initialize_modules_fail;
1754 err = atomisp_register_entities(isp);
1756 dev_err(&pdev->dev, "atomisp_register_entities failed (%d)\n", err);
1757 goto register_entities_fail;
1759 err = atomisp_create_pads_links(isp);
1761 goto register_entities_fail;
1762 /* init atomisp wdts */
1763 err = init_atomisp_wdts(isp);
1765 goto wdt_work_queue_fail;
1767 /* save the iunit context only once after all the values are init'ed. */
1768 atomisp_save_iunit_reg(isp);
1770 pm_runtime_put_noidle(&pdev->dev);
1771 pm_runtime_allow(&pdev->dev);
1773 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1774 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1776 dev_err(&pdev->dev, "Failed to register reserved memory pool.\n");
1780 /* Init ISP memory management */
1783 err = devm_request_threaded_irq(&pdev->dev, pdev->irq,
1784 atomisp_isr, atomisp_isr_thread,
1785 IRQF_SHARED, "isp_irq", isp);
1787 dev_err(&pdev->dev, "Failed to request irq (%d)\n", err);
1788 goto request_irq_fail;
1791 /* Load firmware into ISP memory */
1792 if (!defer_fw_load) {
1793 err = atomisp_css_load_firmware(isp);
1795 dev_err(&pdev->dev, "Failed to init css.\n");
1799 dev_dbg(&pdev->dev, "Skip css init.\n");
1801 /* Clear FW image from memory */
1802 release_firmware(isp->firmware);
1803 isp->firmware = NULL;
1804 isp->css_env.isp_css_fw.data = NULL;
1806 rt_mutex_unlock(&isp->loading);
1808 atomisp_drvfs_init(isp);
1813 devm_free_irq(&pdev->dev, pdev->irq, isp);
1816 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1818 pm_runtime_get_noresume(&pdev->dev);
1819 destroy_workqueue(isp->wdt_work_queue);
1820 wdt_work_queue_fail:
1821 atomisp_acc_cleanup(isp);
1822 atomisp_unregister_entities(isp);
1823 register_entities_fail:
1824 atomisp_uninitialize_modules(isp);
1825 initialize_modules_fail:
1826 rt_mutex_unlock(&isp->loading);
1827 cpu_latency_qos_remove_request(&isp->pm_qos);
1828 atomisp_msi_irq_uninit(isp);
1829 pci_free_irq_vectors(pdev);
1832 release_firmware(isp->firmware);
1835 * Switch off ISP, as keeping it powered on would prevent
1836 * reaching S0ix states.
1838 * The following lines have been copied from atomisp suspend path
1841 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
1842 irq &= BIT(INTR_IIR);
1843 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
1845 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
1846 irq &= ~BIT(INTR_IER);
1847 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
1849 atomisp_msi_irq_uninit(isp);
1851 atomisp_ospm_dphy_down(isp);
1853 /* Address later when we worry about the ...field chips */
1854 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1855 dev_err(&pdev->dev, "Failed to switch off ISP\n");
1857 atomisp_dev_alloc_fail:
1858 pcim_iounmap_regions(pdev, BIT(ATOM_ISP_PCI_BAR));
1864 static void atomisp_pci_remove(struct pci_dev *pdev)
1866 struct atomisp_device *isp = pci_get_drvdata(pdev);
1868 dev_info(&pdev->dev, "Removing atomisp driver\n");
1870 atomisp_drvfs_exit();
1872 atomisp_acc_cleanup(isp);
1874 ia_css_unload_firmware();
1877 pm_runtime_forbid(&pdev->dev);
1878 pm_runtime_get_noresume(&pdev->dev);
1879 cpu_latency_qos_remove_request(&isp->pm_qos);
1881 atomisp_msi_irq_uninit(isp);
1882 atomisp_unregister_entities(isp);
1884 destroy_workqueue(isp->wdt_work_queue);
1885 atomisp_file_input_cleanup(isp);
1887 release_firmware(isp->firmware);
1889 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1892 static const struct pci_device_id atomisp_pci_tbl[] = {
1894 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD)},
1895 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_1179)},
1896 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_117A)},
1898 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_BYT)},
1899 /* Anniedale (Merrifield+ / Moorefield) */
1900 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_ANN)},
1902 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_CHT)},
1906 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1908 static const struct dev_pm_ops atomisp_pm_ops = {
1909 .runtime_suspend = atomisp_runtime_suspend,
1910 .runtime_resume = atomisp_runtime_resume,
1911 .suspend = atomisp_suspend,
1912 .resume = atomisp_resume,
1915 static struct pci_driver atomisp_pci_driver = {
1917 .pm = &atomisp_pm_ops,
1919 .name = "atomisp-isp2",
1920 .id_table = atomisp_pci_tbl,
1921 .probe = atomisp_pci_probe,
1922 .remove = atomisp_pci_remove,
1925 module_pci_driver(atomisp_pci_driver);
1927 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1928 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1929 MODULE_LICENSE("GPL");
1930 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");