drivers/staging/media/atomisp/pci/atomisp2/css2400/isp/kernels/dp/dp_1.0/ia_css_dp.host.c

   1 /*
   2  * Support for Intel Camera Imaging ISP subsystem.
   3  * Copyright (c) 2015, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include "ia_css_types.h"
  16 #include "sh_css_defs.h"
  17 #include "ia_css_debug.h"
  18 #include "sh_css_frac.h"
  19
  20 #include "ia_css_dp.host.h"
  21
  22 #ifdef ISP2401
  23 /* We use a different set of DPC configuration parameters when
  24  * DPC is used before OBC and NORM. Currently these parameters
  25  * are used in usecases which selects both BDS and DPC.
  26  **/
  27 const struct ia_css_dp_config default_dp_10bpp_config = {
  28         1024,
  29         2048,
  30         32768,
  31         32768,
  32         32768,
  33         32768
  34 };
  35 #endif
  36 const struct ia_css_dp_config default_dp_config = {
  37         8192,
  38         2048,
  39         32768,
  40         32768,
  41         32768,
  42         32768
  43 };
  44
  45 void
  46 ia_css_dp_encode(
  47         struct sh_css_isp_dp_params *to,
  48         const struct ia_css_dp_config *from,
  49         unsigned size)
  50 {
  51         int gain = from->gain;
  52         int gr   = from->gr;
  53         int r    = from->r;
  54         int b    = from->b;
  55         int gb   = from->gb;
  56
  57         (void)size;
  58         to->threshold_single =
  59             SH_CSS_BAYER_MAXVAL;
  60         to->threshold_2adjacent =
  61             uDIGIT_FITTING(from->threshold, 16, SH_CSS_BAYER_BITS);
  62         to->gain =
  63             uDIGIT_FITTING(from->gain, 8, SH_CSS_DP_GAIN_SHIFT);
  64
  65         to->coef_rr_gr =
  66             uDIGIT_FITTING (gain * gr / r, 8, SH_CSS_DP_GAIN_SHIFT);
  67         to->coef_rr_gb =
  68             uDIGIT_FITTING (gain * gb / r, 8, SH_CSS_DP_GAIN_SHIFT);
  69         to->coef_bb_gb =
  70             uDIGIT_FITTING (gain * gb / b, 8, SH_CSS_DP_GAIN_SHIFT);
  71         to->coef_bb_gr =
  72             uDIGIT_FITTING (gain * gr / b, 8, SH_CSS_DP_GAIN_SHIFT);
  73         to->coef_gr_rr =
  74             uDIGIT_FITTING (gain * r / gr, 8, SH_CSS_DP_GAIN_SHIFT);
  75         to->coef_gr_bb =
  76             uDIGIT_FITTING (gain * b / gr, 8, SH_CSS_DP_GAIN_SHIFT);
  77         to->coef_gb_bb =
  78             uDIGIT_FITTING (gain * b / gb, 8, SH_CSS_DP_GAIN_SHIFT);
  79         to->coef_gb_rr =
  80             uDIGIT_FITTING (gain * r / gb, 8, SH_CSS_DP_GAIN_SHIFT);
  81 }
  82
  83 void
  84 ia_css_dp_dump(
  85         const struct sh_css_isp_dp_params *dp,
  86         unsigned level)
  87 {
  88         if (!dp) return;
  89         ia_css_debug_dtrace(level, "Defect Pixel Correction:\n");
  90         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  91                 "dp_threshold_single_w_2adj_on",
  92                 dp->threshold_single);
  93         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  94                 "dp_threshold_2adj_w_2adj_on",
  95                 dp->threshold_2adjacent);
  96         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  97                 "dp_gain", dp->gain);
  98         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
  99                 "dpc_coef_rr_gr", dp->coef_rr_gr);
 100         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 101                 "dpc_coef_rr_gb", dp->coef_rr_gb);
 102         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 103                 "dpc_coef_bb_gb", dp->coef_bb_gb);
 104         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 105                 "dpc_coef_bb_gr", dp->coef_bb_gr);
 106         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 107                 "dpc_coef_gr_rr", dp->coef_gr_rr);
 108         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 109                 "dpc_coef_gr_bb", dp->coef_gr_bb);
 110         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 111                 "dpc_coef_gb_bb", dp->coef_gb_bb);
 112         ia_css_debug_dtrace(level, "\t%-32s = %d\n",
 113                 "dpc_coef_gb_rr", dp->coef_gb_rr);
 114 }
 115
 116 void
 117 ia_css_dp_debug_dtrace(
 118         const struct ia_css_dp_config *config,
 119         unsigned level)
 120 {
 121         ia_css_debug_dtrace(level,
 122                 "config.threshold=%d, config.gain=%d\n",
 123                 config->threshold, config->gain);
 124 }
 125
 126 void
 127 ia_css_init_dp_state(
 128         void/*struct sh_css_isp_dp_vmem_state*/ *state,
 129         size_t size)
 130 {
 131         memset(state, 0, size);
 132 }