2 * Support for Intel Camera Imaging ISP subsystem.
3 * Copyright (c) 2015, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #ifndef __ISP_PUBLIC_H_INCLUDED__
16 #define __ISP_PUBLIC_H_INCLUDED__
18 #include <type_support.h>
19 #include "system_types.h"
21 /*! Enable or disable the program complete irq signal of ISP[ID]
23 \param ID[in] SP identifier
24 \param cnd[in] predicate
26 \return none, if(cnd) enable(ISP[ID].irq) else disable(ISP[ID].irq)
28 extern void cnd_isp_irq_enable(
32 /*! Read the state of cell ISP[ID]
34 \param ID[in] ISP identifier
35 \param state[out] isp state structure
36 \param stall[out] isp stall conditions
38 \return none, state = ISP[ID].state, stall = ISP[ID].stall
40 extern void isp_get_state(
46 /*! Write to the status and control register of ISP[ID]
48 \param ID[in] ISP identifier
49 \param reg[in] register index
50 \param value[in] The data to be written
52 \return none, ISP[ID].sc[reg] = value
54 STORAGE_CLASS_ISP_H void isp_ctrl_store(
56 const unsigned int reg,
57 const hrt_data value);
59 /*! Read from the status and control register of ISP[ID]
61 \param ID[in] ISP identifier
62 \param reg[in] register index
63 \param value[in] The data to be written
65 \return ISP[ID].sc[reg]
67 STORAGE_CLASS_ISP_H hrt_data isp_ctrl_load(
69 const unsigned int reg);
71 /*! Get the status of a bitfield in the control register of ISP[ID]
73 \param ID[in] ISP identifier
74 \param reg[in] register index
75 \param bit[in] The bit index to be checked
77 \return (ISP[ID].sc[reg] & (1<<bit)) != 0
79 STORAGE_CLASS_ISP_H bool isp_ctrl_getbit(
81 const unsigned int reg,
82 const unsigned int bit);
84 /*! Set a bitfield in the control register of ISP[ID]
86 \param ID[in] ISP identifier
87 \param reg[in] register index
88 \param bit[in] The bit index to be set
90 \return none, ISP[ID].sc[reg] |= (1<<bit)
92 STORAGE_CLASS_ISP_H void isp_ctrl_setbit(
94 const unsigned int reg,
95 const unsigned int bit);
97 /*! Clear a bitfield in the control register of ISP[ID]
99 \param ID[in] ISP identifier
100 \param reg[in] register index
101 \param bit[in] The bit index to be set
103 \return none, ISP[ID].sc[reg] &= ~(1<<bit)
105 STORAGE_CLASS_ISP_H void isp_ctrl_clearbit(
107 const unsigned int reg,
108 const unsigned int bit);
110 /*! Write to the DMEM of ISP[ID]
112 \param ID[in] ISP identifier
113 \param addr[in] the address in DMEM
114 \param data[in] The data to be written
115 \param size[in] The size(in bytes) of the data to be written
117 \return none, ISP[ID].dmem[addr...addr+size-1] = data
119 STORAGE_CLASS_ISP_H void isp_dmem_store(
125 /*! Read from the DMEM of ISP[ID]
127 \param ID[in] ISP identifier
128 \param addr[in] the address in DMEM
129 \param data[in] The data to be read
130 \param size[in] The size(in bytes) of the data to be read
132 \return none, data = ISP[ID].dmem[addr...addr+size-1]
134 STORAGE_CLASS_ISP_H void isp_dmem_load(
136 const unsigned int addr,
140 /*! Write a 32-bit datum to the DMEM of ISP[ID]
142 \param ID[in] ISP identifier
143 \param addr[in] the address in DMEM
144 \param data[in] The data to be written
145 \param size[in] The size(in bytes) of the data to be written
147 \return none, ISP[ID].dmem[addr] = data
149 STORAGE_CLASS_ISP_H void isp_dmem_store_uint32(
152 const uint32_t data);
154 /*! Load a 32-bit datum from the DMEM of ISP[ID]
156 \param ID[in] ISP identifier
157 \param addr[in] the address in DMEM
158 \param data[in] The data to be read
159 \param size[in] The size(in bytes) of the data to be read
161 \return none, data = ISP[ID].dmem[addr]
163 STORAGE_CLASS_ISP_H uint32_t isp_dmem_load_uint32(
165 const unsigned int addr);
167 /*! Concatenate the LSW and MSW into a double precision word
169 \param x0[in] Integer containing the LSW
170 \param x1[in] Integer containing the MSW
172 \return x0 | (x1 << bits_per_vector_element)
174 STORAGE_CLASS_ISP_H uint32_t isp_2w_cat_1w(
178 unsigned isp_is_ready(isp_ID_t ID);
180 unsigned isp_is_sleeping(isp_ID_t ID);
182 void isp_start(isp_ID_t ID);
184 void isp_wake(isp_ID_t ID);
186 #endif /* __ISP_PUBLIC_H_INCLUDED__ */