drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c

   1 /*
   2  * Support for Medifield PNW Camera Imaging ISP subsystem.
   3  *
   4  * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
   5  *
   6  * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License version
  10  * 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20  * 02110-1301, USA.
  21  *
  22  */
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/pm_qos.h>
  27 #include <linux/timer.h>
  28 #include <linux/delay.h>
  29 #include <linux/interrupt.h>
  30
  31 #include "../../include/linux/atomisp_gmin_platform.h"
  32
  33 #include "atomisp_cmd.h"
  34 #include "atomisp_common.h"
  35 #include "atomisp_fops.h"
  36 #include "atomisp_file.h"
  37 #include "atomisp_ioctl.h"
  38 #include "atomisp_internal.h"
  39 #include "atomisp_acc.h"
  40 #include "atomisp-regs.h"
  41 #include "atomisp_dfs_tables.h"
  42 #include "atomisp_drvfs.h"
  43 #include "hmm/hmm.h"
  44 #include "atomisp_trace_event.h"
  45
  46 #include "hrt/hive_isp_css_mm_hrt.h"
  47
  48 #include "device_access.h"
  49 #include <asm/intel-mid.h>
  50
  51 /* G-Min addition: pull this in from intel_mid_pm.h */
  52 #define CSTATE_EXIT_LATENCY_C1  1
  53
  54 static uint skip_fwload;
  55 module_param(skip_fwload, uint, 0644);
  56 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
  57
  58 /* set reserved memory pool size in page */
  59 static unsigned int repool_pgnr;
  60 module_param(repool_pgnr, uint, 0644);
  61 MODULE_PARM_DESC(repool_pgnr,
  62                 "Set the reserved memory pool size in page (default:0)");
  63
  64 /* set dynamic memory pool size in page */
  65 unsigned int dypool_pgnr = UINT_MAX;
  66 module_param(dypool_pgnr, uint, 0644);
  67 MODULE_PARM_DESC(dypool_pgnr,
  68                 "Set the dynamic memory pool size in page (default:0)");
  69
  70 bool dypool_enable;
  71 module_param(dypool_enable, bool, 0644);
  72 MODULE_PARM_DESC(dypool_enable,
  73                 "dynamic memory pool enable/disable (default:disable)");
  74
  75 /* memory optimization: deferred firmware loading */
  76 bool defer_fw_load;
  77 module_param(defer_fw_load, bool, 0644);
  78 MODULE_PARM_DESC(defer_fw_load,
  79                 "Defer FW loading until device is opened (default:disable)");
  80
  81 /* cross componnet debug message flag */
  82 int dbg_level;
  83 module_param(dbg_level, int, 0644);
  84 MODULE_PARM_DESC(dbg_level, "debug message on/off (default:off)");
  85
  86 /* log function switch */
  87 int dbg_func = 2;
  88 module_param(dbg_func, int, 0644);
  89 MODULE_PARM_DESC(dbg_func,
  90                 "log function switch non/trace_printk/printk (default:printk)");
  91
  92 int mipicsi_flag;
  93 module_param(mipicsi_flag, int, 0644);
  94 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
  95
  96 /*set to 16x16 since this is the amount of lines and pixels the sensor
  97 exports extra. If these are kept at the 10x8 that they were on, in yuv
  98 downscaling modes incorrect resolutions where requested to the sensor
  99 driver with strange outcomes as a result. The proper way tot do this
 100 would be to have a list of tables the specify the sensor res, mipi rec,
 101 output res, and isp output res. however since we do not have this yet,
 102 the chosen solution is the next best thing. */
 103 int pad_w = 16;
 104 module_param(pad_w, int, 0644);
 105 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
 106
 107 int pad_h = 16;
 108 module_param(pad_h, int, 0644);
 109 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
 110
 111 struct device *atomisp_dev;
 112
 113 void __iomem *atomisp_io_base;
 114
 115 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name)
 116 {
 117         int ret;
 118         const char *direction;
 119
 120         switch (video->type) {
 121         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 122                 direction = "output";
 123                 video->pad.flags = MEDIA_PAD_FL_SINK;
 124                 video->vdev.fops = &atomisp_fops;
 125                 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
 126                 break;
 127         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 128                 direction = "input";
 129                 video->pad.flags = MEDIA_PAD_FL_SOURCE;
 130                 video->vdev.fops = &atomisp_file_fops;
 131                 video->vdev.ioctl_ops = &atomisp_file_ioctl_ops;
 132                 break;
 133         default:
 134                 return -EINVAL;
 135         }
 136
 137         ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
 138         if (ret < 0)
 139                 return ret;
 140
 141         /* Initialize the video device. */
 142         snprintf(video->vdev.name, sizeof(video->vdev.name),
 143                  "ATOMISP ISP %s %s", name, direction);
 144         video->vdev.release = video_device_release_empty;
 145         video_set_drvdata(&video->vdev, video->isp);
 146
 147         return 0;
 148 }
 149
 150 void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
 151 {
 152         video->vdev.fops = &atomisp_fops;
 153         video->vdev.ioctl_ops = &atomisp_ioctl_ops;
 154
 155         /* Initialize the video device. */
 156         snprintf(video->vdev.name, sizeof(video->vdev.name),
 157                  "ATOMISP ISP %s", name);
 158         video->vdev.release = video_device_release_empty;
 159         video_set_drvdata(&video->vdev, video->isp);
 160 }
 161
 162 int atomisp_video_register(struct atomisp_video_pipe *video,
 163         struct v4l2_device *vdev)
 164 {
 165         int ret;
 166
 167         video->vdev.v4l2_dev = vdev;
 168
 169         ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1);
 170         if (ret < 0)
 171                 dev_err(vdev->dev, "%s: could not register video device (%d)\n",
 172                         __func__, ret);
 173
 174         return ret;
 175 }
 176
 177 int atomisp_acc_register(struct atomisp_acc_pipe *video,
 178                 struct v4l2_device *vdev)
 179 {
 180         int ret;
 181
 182         video->vdev.v4l2_dev = vdev;
 183
 184         ret = video_register_device(&video->vdev, VFL_TYPE_GRABBER, -1);
 185         if (ret < 0)
 186                 dev_err(vdev->dev, "%s: could not register video device (%d)\n",
 187                         __func__, ret);
 188
 189         return ret;
 190 }
 191
 192 void atomisp_video_unregister(struct atomisp_video_pipe *video)
 193 {
 194         if (video_is_registered(&video->vdev)) {
 195                 media_entity_cleanup(&video->vdev.entity);
 196                 video_unregister_device(&video->vdev);
 197         }
 198 }
 199
 200 void atomisp_acc_unregister(struct atomisp_acc_pipe *video)
 201 {
 202         if (video_is_registered(&video->vdev))
 203                 video_unregister_device(&video->vdev);
 204 }
 205
 206 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
 207 {
 208         struct pci_dev *dev = isp->pdev;
 209
 210         dev_dbg(isp->dev, "%s\n", __func__);
 211
 212         pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
 213         /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
 214         pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
 215         pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
 216         pci_read_config_word(dev, PCI_MSI_DATA,  &isp->saved_regs.msi_data);
 217         pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
 218         pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,
 219                               &isp->saved_regs.interrupt_control);
 220
 221         pci_read_config_dword(dev, MRFLD_PCI_PMCS,
 222                               &isp->saved_regs.pmcs);
 223         /* Ensure read/write combining is enabled. */
 224         pci_read_config_dword(dev, PCI_I_CONTROL,
 225                         &isp->saved_regs.i_control);
 226         isp->saved_regs.i_control |=
 227                         MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
 228                         MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
 229         pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
 230                               &isp->saved_regs.csi_access_viol);
 231         pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
 232                               &isp->saved_regs.csi_rcomp_config);
 233         /*
 234          * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
 235          * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
 236          * and sensor sending "continuous clock".
 237          * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
 238          * is missed, and IUNIT can hang.
 239          * For both issues, setting this bit is a workaround.
 240          */
 241         isp->saved_regs.csi_rcomp_config |=
 242                 MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
 243         pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
 244                               &isp->saved_regs.csi_afe_dly);
 245         pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
 246                               &isp->saved_regs.csi_control);
 247         if (isp->media_dev.hw_revision >=
 248             (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
 249                 isp->saved_regs.csi_control |=
 250                         MRFLD_PCI_CSI_CONTROL_PARPATHEN;
 251         /*
 252          * On CHT CSI_READY bit should be enabled before stream on
 253          */
 254         if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
 255             ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
 256                 isp->saved_regs.csi_control |=
 257                         MRFLD_PCI_CSI_CONTROL_CSI_READY;
 258         pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
 259                               &isp->saved_regs.csi_afe_rcomp_config);
 260         pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
 261                               &isp->saved_regs.csi_afe_hs_control);
 262         pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
 263                               &isp->saved_regs.csi_deadline_control);
 264         return 0;
 265 }
 266
 267 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
 268 {
 269         struct pci_dev *dev = isp->pdev;
 270
 271         dev_dbg(isp->dev, "%s\n", __func__);
 272
 273         pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
 274         pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
 275                                isp->saved_regs.ispmmadr);
 276         pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);
 277         pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
 278         pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);
 279         pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
 280         pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
 281                                isp->saved_regs.interrupt_control);
 282         pci_write_config_dword(dev, PCI_I_CONTROL,
 283                                         isp->saved_regs.i_control);
 284
 285         pci_write_config_dword(dev, MRFLD_PCI_PMCS,
 286                                         isp->saved_regs.pmcs);
 287         pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
 288                               isp->saved_regs.csi_access_viol);
 289         pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
 290                               isp->saved_regs.csi_rcomp_config);
 291         pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
 292                               isp->saved_regs.csi_afe_dly);
 293         pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
 294                               isp->saved_regs.csi_control);
 295         pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
 296                               isp->saved_regs.csi_afe_rcomp_config);
 297         pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
 298                               isp->saved_regs.csi_afe_hs_control);
 299         pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
 300                               isp->saved_regs.csi_deadline_control);
 301
 302         /*
 303          * for MRFLD, Software/firmware needs to write a 1 to bit0
 304          * of the register at CSI_RECEIVER_SELECTION_REG to enable
 305          * SH CSI backend write 0 will enable Arasan CSI backend,
 306          * which has bugs(like sighting:4567697 and 4567699) and
 307          * will be removed in B0
 308          */
 309         atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
 310         return 0;
 311 }
 312
 313 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
 314 {
 315         struct pci_dev *dev = isp->pdev;
 316         u32 irq;
 317         unsigned long flags;
 318
 319         spin_lock_irqsave(&isp->lock, flags);
 320         if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
 321                 spin_unlock_irqrestore(&isp->lock, flags);
 322                 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
 323                 return 0;
 324         }
 325         /*
 326          * MRFLD HAS requirement: cannot power off i-unit if
 327          * ISP has IRQ not serviced.
 328          * So, here we need to check if there is any pending
 329          * IRQ, if so, waiting for it to be served
 330          */
 331         pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
 332         irq = irq & 1 << INTR_IIR;
 333         pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
 334
 335         pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
 336         if (!(irq & (1 << INTR_IIR)))
 337                 goto done;
 338
 339         atomisp_store_uint32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
 340         atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
 341         if (irq != 0) {
 342                 dev_err(isp->dev,
 343                          "%s: fail to clear isp interrupt status reg=0x%x\n",
 344                          __func__, irq);
 345                 spin_unlock_irqrestore(&isp->lock, flags);
 346                 return -EAGAIN;
 347         } else {
 348                 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
 349                 irq = irq & 1 << INTR_IIR;
 350                 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
 351
 352                 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
 353                 if (!(irq & (1 << INTR_IIR))) {
 354                         atomisp_store_uint32(MRFLD_INTR_ENABLE_REG, 0x0);
 355                         goto done;
 356                 }
 357                 dev_err(isp->dev,
 358                          "%s: error in iunit interrupt. status reg=0x%x\n",
 359                          __func__, irq);
 360                 spin_unlock_irqrestore(&isp->lock, flags);
 361                 return -EAGAIN;
 362         }
 363 done:
 364         /*
 365         * MRFLD WORKAROUND:
 366         * before powering off IUNIT, clear the pending interrupts
 367         * and disable the interrupt. driver should avoid writing 0
 368         * to IIR. It could block subsequent interrupt messages.
 369         * HW sighting:4568410.
 370         */
 371         pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
 372         irq &= ~(1 << INTR_IER);
 373         pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
 374
 375         atomisp_msi_irq_uninit(isp, dev);
 376         atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
 377         spin_unlock_irqrestore(&isp->lock, flags);
 378
 379         return 0;
 380 }
 381
 382
 383  /*
 384  * WA for DDR DVFS enable/disable
 385  * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
 386  */
 387 static void punit_ddr_dvfs_enable(bool enable)
 388 {
 389         int reg = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSDVFS);
 390         int door_bell = 1 << 8;
 391         int max_wait = 30;
 392
 393         if (enable) {
 394                 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
 395         } else {
 396                 reg |= (MRFLD_BIT1 | door_bell);
 397                 reg &= ~(MRFLD_BIT0);
 398         }
 399
 400         intel_mid_msgbus_write32(PUNIT_PORT, MRFLD_ISPSSDVFS, reg);
 401
 402         /*Check Req_ACK to see freq status, wait until door_bell is cleared*/
 403         if (reg & door_bell) {
 404                 while (max_wait--) {
 405                         if (0 == (intel_mid_msgbus_read32(PUNIT_PORT,
 406                                 MRFLD_ISPSSDVFS) & door_bell))
 407                                         break;
 408
 409                         usleep_range(100, 500);
 410                 }
 411         }
 412
 413         if (max_wait == -1)
 414                 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
 415 }
 416
 417 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
 418 int atomisp_mrfld_power_down(struct atomisp_device *isp)
 419 {
 420         unsigned long timeout;
 421         u32 reg_value;
 422
 423         /* writing 0x3 to ISPSSPM0 bit[1:0] to power off the IUNIT */
 424         reg_value = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSPM0);
 425         reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
 426         reg_value |= MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
 427         intel_mid_msgbus_write32(PUNIT_PORT, MRFLD_ISPSSPM0, reg_value);
 428
 429         /*WA:Enable DVFS*/
 430         if (IS_CHT)
 431                 punit_ddr_dvfs_enable(true);
 432
 433         /*
 434          * There should be no iunit access while power-down is
 435          * in progress HW sighting: 4567865
 436          * FIXME: msecs_to_jiffies(50)- experienced value
 437          */
 438         timeout = jiffies + msecs_to_jiffies(50);
 439         while (1) {
 440                 reg_value = intel_mid_msgbus_read32(PUNIT_PORT,
 441                                                         MRFLD_ISPSSPM0);
 442                 dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n",
 443                                 reg_value);
 444                 /* wait until ISPSSPM0 bit[25:24] shows 0x3 */
 445                 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
 446                         MRFLD_ISPSSPM0_IUNIT_POWER_OFF) {
 447                         trace_ipu_cstate(0);
 448                         return 0;
 449                 }
 450
 451                 if (time_after(jiffies, timeout)) {
 452                         dev_err(isp->dev, "power-off iunit timeout.\n");
 453                         return -EBUSY;
 454                 }
 455                 /* FIXME: experienced value for delay */
 456                 usleep_range(100, 150);
 457         }
 458 }
 459
 460
 461 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
 462 int atomisp_mrfld_power_up(struct atomisp_device *isp)
 463 {
 464         unsigned long timeout;
 465         u32 reg_value;
 466
 467         /*WA for PUNIT, if DVFS enabled, ISP timeout observed*/
 468         if (IS_CHT)
 469                 punit_ddr_dvfs_enable(false);
 470
 471         /*
 472          * FIXME:WA for ECS28A, with this sleep, CTS
 473          * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
 474          * PASS, no impact on other platforms
 475         */
 476         if (IS_BYT)
 477                 msleep(10);
 478
 479         /* writing 0x0 to ISPSSPM0 bit[1:0] to power off the IUNIT */
 480         reg_value = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSPM0);
 481         reg_value &= ~MRFLD_ISPSSPM0_ISPSSC_MASK;
 482         intel_mid_msgbus_write32(PUNIT_PORT, MRFLD_ISPSSPM0, reg_value);
 483
 484         /* FIXME: experienced value for delay */
 485         timeout = jiffies + msecs_to_jiffies(50);
 486         while (1) {
 487                 reg_value = intel_mid_msgbus_read32(PUNIT_PORT, MRFLD_ISPSSPM0);
 488                 dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n",
 489                                 reg_value);
 490                 /* wait until ISPSSPM0 bit[25:24] shows 0x0 */
 491                 if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
 492                         MRFLD_ISPSSPM0_IUNIT_POWER_ON) {
 493                         trace_ipu_cstate(1);
 494                         return 0;
 495                 }
 496
 497                 if (time_after(jiffies, timeout)) {
 498                         dev_err(isp->dev, "power-on iunit timeout.\n");
 499                         return -EBUSY;
 500                 }
 501                 /* FIXME: experienced value for delay */
 502                 usleep_range(100, 150);
 503         }
 504 }
 505
 506 int atomisp_runtime_suspend(struct device *dev)
 507 {
 508         struct atomisp_device *isp = (struct atomisp_device *)
 509                 dev_get_drvdata(dev);
 510         int ret;
 511
 512         ret = atomisp_mrfld_pre_power_down(isp);
 513         if (ret)
 514                 return ret;
 515
 516         /*Turn off the ISP d-phy*/
 517         ret = atomisp_ospm_dphy_down(isp);
 518         if (ret)
 519                 return ret;
 520         pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
 521         return atomisp_mrfld_power_down(isp);
 522 }
 523
 524 int atomisp_runtime_resume(struct device *dev)
 525 {
 526         struct atomisp_device *isp = (struct atomisp_device *)
 527                 dev_get_drvdata(dev);
 528         int ret;
 529
 530         ret = atomisp_mrfld_power_up(isp);
 531         if (ret)
 532                         return ret;
 533
 534         pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
 535         if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
 536                 /*Turn on ISP d-phy */
 537                 ret = atomisp_ospm_dphy_up(isp);
 538                 if (ret) {
 539                         dev_err(isp->dev, "Failed to power up ISP!.\n");
 540                         return -EINVAL;
 541                 }
 542         }
 543
 544         /*restore register values for iUnit and iUnitPHY registers*/
 545         if (isp->saved_regs.pcicmdsts)
 546                 atomisp_restore_iunit_reg(isp);
 547
 548         atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
 549         return 0;
 550 }
 551
 552 static int __maybe_unused atomisp_suspend(struct device *dev)
 553 {
 554         struct atomisp_device *isp = (struct atomisp_device *)
 555                 dev_get_drvdata(dev);
 556         /* FIXME: only has one isp_subdev at present */
 557         struct atomisp_sub_device *asd = &isp->asd[0];
 558         unsigned long flags;
 559         int ret;
 560
 561         /*
 562          * FIXME: Suspend is not supported by sensors. Abort if any video
 563          * node was opened.
 564          */
 565         if (atomisp_dev_users(isp))
 566                 return -EBUSY;
 567
 568         spin_lock_irqsave(&isp->lock, flags);
 569         if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
 570                 spin_unlock_irqrestore(&isp->lock, flags);
 571                 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
 572                 return -EINVAL;
 573         }
 574         spin_unlock_irqrestore(&isp->lock, flags);
 575
 576         ret = atomisp_mrfld_pre_power_down(isp);
 577         if (ret)
 578                 return ret;
 579
 580         /*Turn off the ISP d-phy */
 581         ret = atomisp_ospm_dphy_down(isp);
 582         if (ret) {
 583                 dev_err(isp->dev, "fail to power off ISP\n");
 584                 return ret;
 585         }
 586         pm_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
 587         return atomisp_mrfld_power_down(isp);
 588 }
 589
 590 static int __maybe_unused atomisp_resume(struct device *dev)
 591 {
 592         struct atomisp_device *isp = (struct atomisp_device *)
 593                 dev_get_drvdata(dev);
 594         int ret;
 595
 596         ret = atomisp_mrfld_power_up(isp);
 597         if (ret)
 598                 return ret;
 599
 600         pm_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
 601
 602         /*Turn on ISP d-phy */
 603         ret = atomisp_ospm_dphy_up(isp);
 604         if (ret) {
 605                 dev_err(isp->dev, "Failed to power up ISP!.\n");
 606                 return -EINVAL;
 607         }
 608
 609         /*restore register values for iUnit and iUnitPHY registers*/
 610         if (isp->saved_regs.pcicmdsts)
 611                 atomisp_restore_iunit_reg(isp);
 612
 613         atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
 614         return 0;
 615 }
 616
 617 int atomisp_csi_lane_config(struct atomisp_device *isp)
 618 {
 619         static const struct {
 620                 u8 code;
 621                 u8 lanes[MRFLD_PORT_NUM];
 622         } portconfigs[] = {
 623                 /* Tangier/Merrifield available lane configurations */
 624                 { 0x00, { 4, 1, 0 } },          /* 00000 */
 625                 { 0x01, { 3, 1, 0 } },          /* 00001 */
 626                 { 0x02, { 2, 1, 0 } },          /* 00010 */
 627                 { 0x03, { 1, 1, 0 } },          /* 00011 */
 628                 { 0x04, { 2, 1, 2 } },          /* 00100 */
 629                 { 0x08, { 3, 1, 1 } },          /* 01000 */
 630                 { 0x09, { 2, 1, 1 } },          /* 01001 */
 631                 { 0x0a, { 1, 1, 1 } },          /* 01010 */
 632
 633                 /* Anniedale/Moorefield only configurations */
 634                 { 0x10, { 4, 2, 0 } },          /* 10000 */
 635                 { 0x11, { 3, 2, 0 } },          /* 10001 */
 636                 { 0x12, { 2, 2, 0 } },          /* 10010 */
 637                 { 0x13, { 1, 2, 0 } },          /* 10011 */
 638                 { 0x14, { 2, 2, 2 } },          /* 10100 */
 639                 { 0x18, { 3, 2, 1 } },          /* 11000 */
 640                 { 0x19, { 2, 2, 1 } },          /* 11001 */
 641                 { 0x1a, { 1, 2, 1 } },          /* 11010 */
 642         };
 643
 644         unsigned int i, j;
 645         u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
 646         u32 csi_control;
 647         int nportconfigs;
 648         u32 port_config_mask;
 649         int port3_lanes_shift;
 650
 651         if (isp->media_dev.hw_revision <
 652                 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
 653                 ATOMISP_HW_REVISION_SHIFT) {
 654                 /* Merrifield */
 655                 port_config_mask = MRFLD_PORT_CONFIG_MASK;
 656                 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
 657         } else {
 658                 /* Moorefield / Cherryview */
 659                 port_config_mask = CHV_PORT_CONFIG_MASK;
 660                 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
 661         }
 662
 663         if (isp->media_dev.hw_revision <
 664                 ATOMISP_HW_REVISION_ISP2401 <<
 665                 ATOMISP_HW_REVISION_SHIFT) {
 666                 /* Merrifield / Moorefield legacy input system */
 667                 nportconfigs = MRFLD_PORT_CONFIG_NUM;
 668         } else {
 669                 /* Moorefield / Cherryview new input system */
 670                 nportconfigs = ARRAY_SIZE(portconfigs);
 671         }
 672
 673         for (i = 0; i < isp->input_cnt; i++) {
 674                 struct camera_mipi_info *mipi_info;
 675
 676                 if (isp->inputs[i].type != RAW_CAMERA &&
 677                     isp->inputs[i].type != SOC_CAMERA)
 678                         continue;
 679
 680                 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
 681                 if (!mipi_info)
 682                         continue;
 683
 684                 switch (mipi_info->port) {
 685                 case ATOMISP_CAMERA_PORT_PRIMARY:
 686                         sensor_lanes[0] = mipi_info->num_lanes;
 687                         break;
 688                 case ATOMISP_CAMERA_PORT_SECONDARY:
 689                         sensor_lanes[1] = mipi_info->num_lanes;
 690                         break;
 691                 case ATOMISP_CAMERA_PORT_TERTIARY:
 692                         sensor_lanes[2] = mipi_info->num_lanes;
 693                         break;
 694                 default:
 695                         dev_err(isp->dev,
 696                                 "%s: invalid port: %d for the %dth sensor\n",
 697                                 __func__, mipi_info->port, i);
 698                         return -EINVAL;
 699                 }
 700         }
 701
 702         for (i = 0; i < nportconfigs; i++) {
 703                 for (j = 0; j < MRFLD_PORT_NUM; j++)
 704                         if (sensor_lanes[j] &&
 705                             sensor_lanes[j] != portconfigs[i].lanes[j])
 706                                 break;
 707
 708                 if (j == MRFLD_PORT_NUM)
 709                         break;                  /* Found matching setting */
 710         }
 711
 712         if (i >= nportconfigs) {
 713                 dev_err(isp->dev,
 714                         "%s: could not find the CSI port setting for %d-%d-%d\n",
 715                         __func__,
 716                         sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
 717                 return -EINVAL;
 718         }
 719
 720         pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
 721         csi_control &= ~port_config_mask;
 722         csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
 723                 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
 724                 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
 725                 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
 726                 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
 727                 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
 728                 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
 729
 730         pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
 731
 732         dev_dbg(isp->dev,
 733                 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
 734                 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
 735                 portconfigs[i].lanes[2], csi_control);
 736
 737         return 0;
 738 }
 739
 740 static int atomisp_subdev_probe(struct atomisp_device *isp)
 741 {
 742         const struct atomisp_platform_data *pdata;
 743         struct intel_v4l2_subdev_table *subdevs;
 744         int ret, raw_index = -1;
 745
 746         pdata = atomisp_get_platform_data();
 747         if (pdata == NULL) {
 748                 dev_err(isp->dev, "no platform data available\n");
 749                 return 0;
 750         }
 751
 752         for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
 753                 struct v4l2_subdev *subdev;
 754                 struct i2c_board_info *board_info =
 755                         &subdevs->v4l2_subdev.board_info;
 756                 struct i2c_adapter *adapter =
 757                         i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
 758                 struct camera_sensor_platform_data *sensor_pdata;
 759                 int sensor_num, i;
 760
 761                 if (adapter == NULL) {
 762                         dev_err(isp->dev,
 763                                 "Failed to find i2c adapter for subdev %s\n",
 764                                 board_info->type);
 765                         break;
 766                 }
 767
 768                 /* In G-Min, the sensor devices will already be probed
 769                  * (via ACPI) and registered, do not create new
 770                  * ones */
 771                 subdev = atomisp_gmin_find_subdev(adapter, board_info);
 772                 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
 773                 if (ret) {
 774                         dev_warn(isp->dev, "Subdev %s detection fail\n",
 775                                  board_info->type);
 776                         continue;
 777                 }
 778
 779                 if (subdev == NULL) {
 780                         dev_warn(isp->dev, "Subdev %s detection fail\n",
 781                                  board_info->type);
 782                         continue;
 783                 }
 784
 785                 dev_info(isp->dev, "Subdev %s successfully register\n",
 786                          board_info->type);
 787
 788                 switch (subdevs->type) {
 789                 case RAW_CAMERA:
 790                         raw_index = isp->input_cnt;
 791                         dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
 792                 case SOC_CAMERA:
 793                         dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
 794                         if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
 795                                 dev_warn(isp->dev,
 796                                          "too many atomisp inputs, ignored\n");
 797                                 break;
 798                         }
 799
 800                         isp->inputs[isp->input_cnt].type = subdevs->type;
 801                         isp->inputs[isp->input_cnt].port = subdevs->port;
 802                         isp->inputs[isp->input_cnt].camera = subdev;
 803                         isp->inputs[isp->input_cnt].sensor_index = 0;
 804                         /*
 805                          * initialize the subdev frame size, then next we can
 806                          * judge whether frame_size store effective value via
 807                          * pixel_format.
 808                          */
 809                         isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
 810                         sensor_pdata = (struct camera_sensor_platform_data *)
 811                                         board_info->platform_data;
 812                         if (sensor_pdata->get_camera_caps)
 813                                 isp->inputs[isp->input_cnt].camera_caps =
 814                                         sensor_pdata->get_camera_caps();
 815                         else
 816                                 isp->inputs[isp->input_cnt].camera_caps =
 817                                         atomisp_get_default_camera_caps();
 818                         sensor_num = isp->inputs[isp->input_cnt]
 819                                 .camera_caps->sensor_num;
 820                         isp->input_cnt++;
 821                         for (i = 1; i < sensor_num; i++) {
 822                                 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
 823                                         dev_warn(isp->dev,
 824                                                 "atomisp inputs out of range\n");
 825                                         break;
 826                                 }
 827                                 isp->inputs[isp->input_cnt] =
 828                                         isp->inputs[isp->input_cnt - 1];
 829                                 isp->inputs[isp->input_cnt].sensor_index = i;
 830                                 isp->input_cnt++;
 831                         }
 832                         break;
 833                 case CAMERA_MOTOR:
 834                         isp->motor = subdev;
 835                         break;
 836                 case LED_FLASH:
 837                 case XENON_FLASH:
 838                         isp->flash = subdev;
 839                         break;
 840                 default:
 841                         dev_dbg(isp->dev, "unknown subdev probed\n");
 842                         break;
 843                 }
 844
 845         }
 846
 847         /*
 848          * HACK: Currently VCM belongs to primary sensor only, but correct
 849          * approach must be to acquire from platform code which sensor
 850          * owns it.
 851          */
 852         if (isp->motor && raw_index >= 0)
 853                 isp->inputs[raw_index].motor = isp->motor;
 854
 855         /* Proceed even if no modules detected. For COS mode and no modules. */
 856         if (!isp->inputs[0].camera)
 857                 dev_warn(isp->dev, "no camera attached or fail to detect\n");
 858
 859         return atomisp_csi_lane_config(isp);
 860 }
 861
 862 static void atomisp_unregister_entities(struct atomisp_device *isp)
 863 {
 864         unsigned int i;
 865         struct v4l2_subdev *sd, *next;
 866
 867         for (i = 0; i < isp->num_of_streams; i++)
 868                 atomisp_subdev_unregister_entities(&isp->asd[i]);
 869         atomisp_tpg_unregister_entities(&isp->tpg);
 870         atomisp_file_input_unregister_entities(&isp->file_dev);
 871         for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
 872                 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
 873
 874         list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
 875                 v4l2_device_unregister_subdev(sd);
 876
 877         v4l2_device_unregister(&isp->v4l2_dev);
 878         media_device_unregister(&isp->media_dev);
 879 }
 880
 881 static int atomisp_register_entities(struct atomisp_device *isp)
 882 {
 883         int ret = 0;
 884         unsigned int i;
 885
 886         isp->media_dev.dev = isp->dev;
 887
 888         strlcpy(isp->media_dev.model, "Intel Atom ISP",
 889                 sizeof(isp->media_dev.model));
 890
 891         media_device_init(&isp->media_dev);
 892         isp->v4l2_dev.mdev = &isp->media_dev;
 893         ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
 894         if (ret < 0) {
 895                 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
 896                         __func__, ret);
 897                 goto v4l2_device_failed;
 898         }
 899
 900         ret = atomisp_subdev_probe(isp);
 901         if (ret < 0)
 902                 goto csi_and_subdev_probe_failed;
 903
 904         /* Register internal entities */
 905         for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
 906                 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
 907                                                                 &isp->v4l2_dev);
 908                 if (ret == 0)
 909                         continue;
 910
 911                 /* error case */
 912                 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
 913                 /* deregister all registered CSI ports */
 914                 while (i--)
 915                         atomisp_mipi_csi2_unregister_entities(
 916                                                         &isp->csi2_port[i]);
 917
 918                 goto csi_and_subdev_probe_failed;
 919         }
 920
 921         ret =
 922         atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
 923         if (ret < 0) {
 924                 dev_err(isp->dev, "atomisp_file_input_register_entities\n");
 925                 goto file_input_register_failed;
 926         }
 927
 928         ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
 929         if (ret < 0) {
 930                 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
 931                 goto tpg_register_failed;
 932         }
 933
 934         for (i = 0; i < isp->num_of_streams; i++) {
 935                 struct atomisp_sub_device *asd = &isp->asd[i];
 936
 937                 ret = atomisp_subdev_register_entities(asd, &isp->v4l2_dev);
 938                 if (ret < 0) {
 939                         dev_err(isp->dev,
 940                                 "atomisp_subdev_register_entities fail\n");
 941                         for (; i > 0; i--)
 942                                 atomisp_subdev_unregister_entities(
 943                                                 &isp->asd[i - 1]);
 944                         goto subdev_register_failed;
 945                 }
 946         }
 947
 948         for (i = 0; i < isp->num_of_streams; i++) {
 949                 struct atomisp_sub_device *asd = &isp->asd[i];
 950
 951                 init_completion(&asd->init_done);
 952
 953                 asd->delayed_init_workq =
 954                         alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
 955                                         1);
 956                 if (asd->delayed_init_workq == NULL) {
 957                         dev_err(isp->dev,
 958                                         "Failed to initialize delayed init workq\n");
 959                         ret = -ENOMEM;
 960
 961                         for (; i > 0; i--)
 962                                 destroy_workqueue(isp->asd[i - 1].
 963                                                 delayed_init_workq);
 964                         goto wq_alloc_failed;
 965                 }
 966                 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
 967         }
 968
 969         for (i = 0; i < isp->input_cnt; i++) {
 970                 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
 971                         dev_err(isp->dev, "isp->inputs port %d not supported\n",
 972                                         isp->inputs[i].port);
 973                         ret = -EINVAL;
 974                         goto link_failed;
 975                 }
 976         }
 977
 978         dev_dbg(isp->dev,
 979                 "FILE_INPUT enable, camera_cnt: %d\n", isp->input_cnt);
 980         isp->inputs[isp->input_cnt].type = FILE_INPUT;
 981         isp->inputs[isp->input_cnt].port = -1;
 982         isp->inputs[isp->input_cnt].camera_caps =
 983                     atomisp_get_default_camera_caps();
 984         isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
 985
 986         if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
 987                 dev_dbg(isp->dev,
 988                         "TPG detected, camera_cnt: %d\n", isp->input_cnt);
 989                 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
 990                 isp->inputs[isp->input_cnt].port = -1;
 991                 isp->inputs[isp->input_cnt].camera_caps =
 992                     atomisp_get_default_camera_caps();
 993                 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
 994         } else {
 995                 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
 996         }
 997
 998         ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
 999         if (ret < 0)
1000                 goto link_failed;
1001
1002         return media_device_register(&isp->media_dev);
1003
1004 link_failed:
1005         for (i = 0; i < isp->num_of_streams; i++)
1006                 destroy_workqueue(isp->asd[i].
1007                                 delayed_init_workq);
1008 wq_alloc_failed:
1009         for (i = 0; i < isp->num_of_streams; i++)
1010                 atomisp_subdev_unregister_entities(
1011                                         &isp->asd[i]);
1012 subdev_register_failed:
1013         atomisp_tpg_unregister_entities(&isp->tpg);
1014 tpg_register_failed:
1015         atomisp_file_input_unregister_entities(&isp->file_dev);
1016 file_input_register_failed:
1017         for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1018                 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1019 csi_and_subdev_probe_failed:
1020         v4l2_device_unregister(&isp->v4l2_dev);
1021 v4l2_device_failed:
1022         media_device_unregister(&isp->media_dev);
1023     media_device_cleanup(&isp->media_dev);
1024         return ret;
1025 }
1026
1027 static int atomisp_initialize_modules(struct atomisp_device *isp)
1028 {
1029         int ret;
1030
1031         ret = atomisp_mipi_csi2_init(isp);
1032         if (ret < 0) {
1033                 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1034                 goto error_mipi_csi2;
1035         }
1036
1037         ret = atomisp_file_input_init(isp);
1038         if (ret < 0) {
1039                 dev_err(isp->dev,
1040                         "file input device initialization failed\n");
1041                 goto error_file_input;
1042         }
1043
1044         ret = atomisp_tpg_init(isp);
1045         if (ret < 0) {
1046                 dev_err(isp->dev, "tpg initialization failed\n");
1047                 goto error_tpg;
1048         }
1049
1050         ret = atomisp_subdev_init(isp);
1051         if (ret < 0) {
1052                 dev_err(isp->dev, "ISP subdev initialization failed\n");
1053                 goto error_isp_subdev;
1054         }
1055
1056
1057         return 0;
1058
1059 error_isp_subdev:
1060 error_tpg:
1061         atomisp_tpg_cleanup(isp);
1062 error_file_input:
1063         atomisp_file_input_cleanup(isp);
1064 error_mipi_csi2:
1065         atomisp_mipi_csi2_cleanup(isp);
1066         return ret;
1067 }
1068
1069 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1070 {
1071         atomisp_tpg_cleanup(isp);
1072         atomisp_file_input_cleanup(isp);
1073         atomisp_mipi_csi2_cleanup(isp);
1074 }
1075
1076 const struct firmware *
1077 atomisp_load_firmware(struct atomisp_device *isp)
1078 {
1079         const struct firmware *fw;
1080         int rc;
1081         char *fw_path = NULL;
1082
1083         if (skip_fwload)
1084                 return NULL;
1085
1086         if (isp->media_dev.hw_revision ==
1087             ((ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT)
1088              | ATOMISP_HW_STEPPING_A0))
1089                 fw_path = "/*(DEBLOBBED)*/";
1090
1091         if (isp->media_dev.hw_revision ==
1092             ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1093              | ATOMISP_HW_STEPPING_A0))
1094                 fw_path = "/*(DEBLOBBED)*/";
1095
1096         if (isp->media_dev.hw_revision ==
1097             ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1098              | ATOMISP_HW_STEPPING_B0))
1099                 fw_path = "/*(DEBLOBBED)*/";
1100
1101         if (!fw_path) {
1102                 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1103                         isp->media_dev.hw_revision);
1104                 return NULL;
1105         }
1106
1107         rc = reject_firmware(&fw, fw_path, isp->dev);
1108         if (rc) {
1109                 dev_err(isp->dev,
1110                         "atomisp: Error %d while requesting firmware %s\n",
1111                         rc, fw_path);
1112                 return NULL;
1113         }
1114
1115         return fw;
1116 }
1117
1118 /*
1119  * Check for flags the driver was compiled with against the PCI
1120  * device. Always returns true on other than ISP 2400.
1121  */
1122 static bool is_valid_device(struct pci_dev *dev,
1123                             const struct pci_device_id *id)
1124 {
1125         unsigned int a0_max_id;
1126
1127         switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1128         case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1129                 a0_max_id = ATOMISP_PCI_REV_MRFLD_A0_MAX;
1130                 break;
1131         case ATOMISP_PCI_DEVICE_SOC_BYT:
1132                 a0_max_id = ATOMISP_PCI_REV_BYT_A0_MAX;
1133                 break;
1134         default:
1135                 return true;
1136         }
1137
1138         return dev->revision > a0_max_id;
1139 }
1140
1141 static int init_atomisp_wdts(struct atomisp_device *isp)
1142 {
1143         int i, err;
1144
1145         atomic_set(&isp->wdt_work_queued, 0);
1146         isp->wdt_work_queue = alloc_workqueue(isp->v4l2_dev.name, 0, 1);
1147         if (isp->wdt_work_queue == NULL) {
1148                 dev_err(isp->dev, "Failed to initialize wdt work queue\n");
1149                 err = -ENOMEM;
1150                 goto alloc_fail;
1151         }
1152         INIT_WORK(&isp->wdt_work, atomisp_wdt_work);
1153
1154         for (i = 0; i < isp->num_of_streams; i++) {
1155                 struct atomisp_sub_device *asd = &isp->asd[i];
1156                 asd = &isp->asd[i];
1157 #ifndef ISP2401
1158                 setup_timer(&asd->wdt, atomisp_wdt, (unsigned long)isp);
1159 #else
1160                 setup_timer(&asd->video_out_capture.wdt,
1161                         atomisp_wdt, (unsigned long)&asd->video_out_capture);
1162                 setup_timer(&asd->video_out_preview.wdt,
1163                         atomisp_wdt, (unsigned long)&asd->video_out_preview);
1164                 setup_timer(&asd->video_out_vf.wdt,
1165                         atomisp_wdt, (unsigned long)&asd->video_out_vf);
1166                 setup_timer(&asd->video_out_video_capture.wdt,
1167                         atomisp_wdt,
1168                         (unsigned long)&asd->video_out_video_capture);
1169 #endif
1170         }
1171         return 0;
1172 alloc_fail:
1173         return err;
1174 }
1175
1176 static struct pci_driver atomisp_pci_driver;
1177
1178 #define ATOM_ISP_PCI_BAR        0
1179
1180 static int atomisp_pci_probe(struct pci_dev *dev,
1181                                        const struct pci_device_id *id)
1182 {
1183         const struct atomisp_platform_data *pdata;
1184         struct atomisp_device *isp;
1185         unsigned int start;
1186         void __iomem *base;
1187         int err, val;
1188         u32 irq;
1189
1190         if (!dev) {
1191                 dev_err(&dev->dev, "atomisp: error device ptr\n");
1192                 return -EINVAL;
1193         }
1194
1195         if (!is_valid_device(dev, id))
1196                 return -ENODEV;
1197         /* Pointer to struct device. */
1198         atomisp_dev = &dev->dev;
1199
1200         pdata = atomisp_get_platform_data();
1201         if (pdata == NULL)
1202                 dev_warn(&dev->dev, "no platform data available\n");
1203
1204         err = pcim_enable_device(dev);
1205         if (err) {
1206                 dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",
1207                         err);
1208                 return err;
1209         }
1210
1211         start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);
1212         dev_dbg(&dev->dev, "start: 0x%x\n", start);
1213
1214         err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));
1215         if (err) {
1216                 dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",
1217                         err);
1218                 return err;
1219         }
1220
1221         base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];
1222         dev_dbg(&dev->dev, "base: %p\n", base);
1223
1224         atomisp_io_base = base;
1225
1226         dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1227
1228         isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1229         if (!isp) {
1230                 dev_err(&dev->dev, "Failed to alloc CI ISP structure\n");
1231                 return -ENOMEM;
1232         }
1233         isp->pdev = dev;
1234         isp->dev = &dev->dev;
1235         isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1236         isp->pci_root = pci_get_bus_and_slot(0, 0);
1237         if (!isp->pci_root) {
1238                 dev_err(&dev->dev, "Unable to find PCI host\n");
1239                 return -ENODEV;
1240         }
1241         isp->saved_regs.ispmmadr = start;
1242
1243         rt_mutex_init(&isp->mutex);
1244         mutex_init(&isp->streamoff_mutex);
1245         spin_lock_init(&isp->lock);
1246
1247         /* This is not a true PCI device on SoC, so the delay is not needed. */
1248         isp->pdev->d3_delay = 0;
1249
1250         switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1251         case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1252                 isp->media_dev.hw_revision =
1253                         (ATOMISP_HW_REVISION_ISP2400
1254                          << ATOMISP_HW_REVISION_SHIFT) |
1255                         ATOMISP_HW_STEPPING_B0;
1256
1257                 switch (id->device) {
1258                 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1259                         isp->dfs = &dfs_config_merr_1179;
1260                         break;
1261                 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1262                         isp->dfs = &dfs_config_merr_117a;
1263                         break;
1264                 default:
1265                         isp->dfs = &dfs_config_merr;
1266                         break;
1267                 }
1268                 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1269                 break;
1270         case ATOMISP_PCI_DEVICE_SOC_BYT:
1271                 isp->media_dev.hw_revision =
1272                         (ATOMISP_HW_REVISION_ISP2400
1273                          << ATOMISP_HW_REVISION_SHIFT) |
1274                         ATOMISP_HW_STEPPING_B0;
1275 #ifdef FIXME
1276                 if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
1277                         INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) {
1278                         isp->dfs = &dfs_config_byt_cr;
1279                         isp->hpll_freq = HPLL_FREQ_2000MHZ;
1280                 } else
1281 #endif
1282                 {
1283                         isp->dfs = &dfs_config_byt;
1284                         isp->hpll_freq = HPLL_FREQ_1600MHZ;
1285                 }
1286                 /* HPLL frequency is known to be device-specific, but we don't
1287                  * have specs yet for exactly how it varies.  Default to
1288                  * BYT-CR but let provisioning set it via EFI variable */
1289                 isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq",
1290                                         HPLL_FREQ_2000MHZ);
1291
1292                 /*
1293                  * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1294                  * in power off. Set d3cold_delay to 0 since default 100ms is not
1295                  * necessary.
1296                  */
1297                 isp->pdev->d3cold_delay = 0;
1298                 break;
1299         case ATOMISP_PCI_DEVICE_SOC_ANN:
1300                 isp->media_dev.hw_revision = (
1301 #ifdef ISP2401_NEW_INPUT_SYSTEM
1302                          ATOMISP_HW_REVISION_ISP2401
1303 #else
1304                          ATOMISP_HW_REVISION_ISP2401_LEGACY
1305 #endif
1306                          << ATOMISP_HW_REVISION_SHIFT);
1307                 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1308                         ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1309                 isp->dfs = &dfs_config_merr;
1310                 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1311                 break;
1312         case ATOMISP_PCI_DEVICE_SOC_CHT:
1313                 isp->media_dev.hw_revision = (
1314 #ifdef ISP2401_NEW_INPUT_SYSTEM
1315                          ATOMISP_HW_REVISION_ISP2401
1316 #else
1317                          ATOMISP_HW_REVISION_ISP2401_LEGACY
1318 #endif
1319                         << ATOMISP_HW_REVISION_SHIFT);
1320                 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1321                          ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1322
1323                 isp->dfs = &dfs_config_cht;
1324                 isp->pdev->d3cold_delay = 0;
1325
1326                 val = intel_mid_msgbus_read32(CCK_PORT, CCK_FUSE_REG_0);
1327                 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1328                 case 0x00:
1329                         isp->hpll_freq = HPLL_FREQ_800MHZ;
1330                         break;
1331                 case 0x01:
1332                         isp->hpll_freq = HPLL_FREQ_1600MHZ;
1333                         break;
1334                 case 0x02:
1335                         isp->hpll_freq = HPLL_FREQ_2000MHZ;
1336                         break;
1337                 default:
1338                         isp->hpll_freq = HPLL_FREQ_1600MHZ;
1339                         dev_warn(isp->dev,
1340                                  "read HPLL from cck failed.default 1600MHz.\n");
1341                 }
1342                 break;
1343         default:
1344                 dev_err(&dev->dev, "un-supported IUNIT device\n");
1345                 return -ENODEV;
1346         }
1347
1348         dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",
1349                  isp->hpll_freq);
1350
1351         isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1352
1353         /* Load isp firmware from user space */
1354         if (!defer_fw_load) {
1355                 isp->firmware = atomisp_load_firmware(isp);
1356                 if (!isp->firmware) {
1357                         err = -ENOENT;
1358                         goto load_fw_fail;
1359                 }
1360
1361                 err = atomisp_css_check_firmware_version(isp);
1362                 if (err) {
1363                         dev_dbg(&dev->dev, "Firmware version check failed\n");
1364                         goto fw_validation_fail;
1365                 }
1366         }
1367
1368         pci_set_master(dev);
1369         pci_set_drvdata(dev, isp);
1370
1371         err = pci_enable_msi(dev);
1372         if (err) {
1373                 dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);
1374                 goto enable_msi_fail;
1375         }
1376
1377         atomisp_msi_irq_init(isp, dev);
1378
1379         pm_qos_add_request(&isp->pm_qos, PM_QOS_CPU_DMA_LATENCY,
1380                            PM_QOS_DEFAULT_VALUE);
1381
1382         /*
1383          * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1384          * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1385          * backend write 0 will enable Arasan CSI backend, which has
1386          * bugs(like sighting:4567697 and 4567699) and will be removed
1387          * in B0
1388          */
1389         atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1390
1391         if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1392                         ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1393                 u32 csi_afe_trim;
1394
1395                 /*
1396                  * Workaround for imbalance data eye issue which is observed
1397                  * on TNG B0.
1398                  */
1399                 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1400                                       &csi_afe_trim);
1401                 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1402                                         MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1403                                   (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1404                                         MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1405                                   (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1406                                         MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1407                 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1408                                         MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1409                                 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1410                                         MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1411                                 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1412                                         MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1413                 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1414                                       csi_afe_trim);
1415         }
1416
1417         err = atomisp_initialize_modules(isp);
1418         if (err < 0) {
1419                 dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);
1420                 goto initialize_modules_fail;
1421         }
1422
1423         err = atomisp_register_entities(isp);
1424         if (err < 0) {
1425                 dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",
1426                         err);
1427                 goto register_entities_fail;
1428         }
1429         err = atomisp_create_pads_links(isp);
1430         if (err < 0)
1431                 goto register_entities_fail;
1432         /* init atomisp wdts */
1433         if (init_atomisp_wdts(isp) != 0)
1434                 goto wdt_work_queue_fail;
1435
1436         /* save the iunit context only once after all the values are init'ed. */
1437         atomisp_save_iunit_reg(isp);
1438
1439         pm_runtime_put_noidle(&dev->dev);
1440         pm_runtime_allow(&dev->dev);
1441
1442         hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1443         err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1444         if (err) {
1445                 dev_err(&dev->dev, "Failed to register reserved memory pool.\n");
1446                 goto hmm_pool_fail;
1447         }
1448
1449         /* Init ISP memory management */
1450         hmm_init();
1451
1452         err = devm_request_threaded_irq(&dev->dev, dev->irq,
1453                                         atomisp_isr, atomisp_isr_thread,
1454                                         IRQF_SHARED, "isp_irq", isp);
1455         if (err) {
1456                 dev_err(&dev->dev, "Failed to request irq (%d)\n", err);
1457                 goto request_irq_fail;
1458         }
1459
1460         /* Load firmware into ISP memory */
1461         if (!defer_fw_load) {
1462                 err = atomisp_css_load_firmware(isp);
1463                 if (err) {
1464                         dev_err(&dev->dev, "Failed to init css.\n");
1465                         goto css_init_fail;
1466                 }
1467         } else {
1468                 dev_dbg(&dev->dev, "Skip css init.\n");
1469         }
1470         /* Clear FW image from memory */
1471         release_firmware(isp->firmware);
1472         isp->firmware = NULL;
1473         isp->css_env.isp_css_fw.data = NULL;
1474
1475         atomisp_drvfs_init(&atomisp_pci_driver, isp);
1476
1477         return 0;
1478
1479 css_init_fail:
1480         devm_free_irq(&dev->dev, dev->irq, isp);
1481 request_irq_fail:
1482         hmm_cleanup();
1483         hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1484 hmm_pool_fail:
1485         destroy_workqueue(isp->wdt_work_queue);
1486 wdt_work_queue_fail:
1487         atomisp_acc_cleanup(isp);
1488         atomisp_unregister_entities(isp);
1489 register_entities_fail:
1490         atomisp_uninitialize_modules(isp);
1491 initialize_modules_fail:
1492         pm_qos_remove_request(&isp->pm_qos);
1493         atomisp_msi_irq_uninit(isp, dev);
1494 enable_msi_fail:
1495 fw_validation_fail:
1496         release_firmware(isp->firmware);
1497 load_fw_fail:
1498         /*
1499          * Switch off ISP, as keeping it powered on would prevent
1500          * reaching S0ix states.
1501          *
1502          * The following lines have been copied from atomisp suspend path
1503          */
1504
1505         pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1506         irq = irq & 1 << INTR_IIR;
1507         pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1508
1509         pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1510         irq &= ~(1 << INTR_IER);
1511         pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1512
1513         atomisp_msi_irq_uninit(isp, dev);
1514
1515         atomisp_ospm_dphy_down(isp);
1516
1517         /* Address later when we worry about the ...field chips */
1518         if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1519                 dev_err(&dev->dev, "Failed to switch off ISP\n");
1520         pci_dev_put(isp->pci_root);
1521         return err;
1522 }
1523
1524 static void atomisp_pci_remove(struct pci_dev *dev)
1525 {
1526         struct atomisp_device *isp = (struct atomisp_device *)
1527                 pci_get_drvdata(dev);
1528
1529         atomisp_drvfs_exit();
1530
1531         atomisp_acc_cleanup(isp);
1532
1533         atomisp_css_unload_firmware(isp);
1534         hmm_cleanup();
1535
1536         pm_runtime_forbid(&dev->dev);
1537         pm_runtime_get_noresume(&dev->dev);
1538         pm_qos_remove_request(&isp->pm_qos);
1539
1540         atomisp_msi_irq_uninit(isp, dev);
1541         pci_dev_put(isp->pci_root);
1542
1543         atomisp_unregister_entities(isp);
1544
1545         destroy_workqueue(isp->wdt_work_queue);
1546         atomisp_file_input_cleanup(isp);
1547
1548         release_firmware(isp->firmware);
1549
1550         hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
1551 }
1552
1553 static const struct pci_device_id atomisp_pci_tbl[] = {
1554 #if defined(ISP2400) || defined(ISP2400B0)
1555         /* Merrifield */
1556         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1178)},
1557         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1179)},
1558         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x117a)},
1559         /* Baytrail */
1560         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0f38)},
1561 #elif defined(ISP2401)
1562         /* Anniedale (Merrifield+ / Moorefield) */
1563         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1478)},
1564         /* Cherrytrail */
1565         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x22b8)},
1566 #endif
1567         {0,}
1568 };
1569
1570 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1571
1572 static const struct dev_pm_ops atomisp_pm_ops = {
1573         .runtime_suspend = atomisp_runtime_suspend,
1574         .runtime_resume = atomisp_runtime_resume,
1575         .suspend = atomisp_suspend,
1576         .resume = atomisp_resume,
1577 };
1578
1579 static struct pci_driver atomisp_pci_driver = {
1580         .driver = {
1581                 .pm = &atomisp_pm_ops,
1582         },
1583         .name = "atomisp-isp2",
1584         .id_table = atomisp_pci_tbl,
1585         .probe = atomisp_pci_probe,
1586         .remove = atomisp_pci_remove,
1587 };
1588
1589 static int __init atomisp_init(void)
1590 {
1591         return pci_register_driver(&atomisp_pci_driver);
1592 }
1593
1594 static void __exit atomisp_exit(void)
1595 {
1596         pci_unregister_driver(&atomisp_pci_driver);
1597 }
1598
1599 module_init(atomisp_init);
1600 module_exit(atomisp_exit);
1601
1602 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1603 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1604 MODULE_LICENSE("GPL");
1605 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");