GNU Linux-libre 4.14.332-gnu1
[releases.git] / drivers / staging / media / atomisp / i2c / ov8858_btns.h
1 /*
2  * Support for the Omnivision OV8858 camera sensor.
3  *
4  * Copyright (c) 2014 Intel Corporation. All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License version
8  * 2 as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18  * 02110-1301, USA.
19  *
20  */
21
22 #ifndef __OV8858_H__
23 #define __OV8858_H__
24 #include "../include/linux/atomisp_platform.h"
25 #include <media/v4l2-ctrls.h>
26
27 #define I2C_MSG_LENGTH          0x2
28
29 /*
30  * This should be added into include/linux/videodev2.h
31  * NOTE: This is most likely not used anywhere.
32  */
33 #define V4L2_IDENT_OV8858       V4L2_IDENT_UNKNOWN
34
35 /*
36  * Indexes for VCM driver lists
37  */
38 #define OV8858_ID_DEFAULT       0
39 #define OV8858_SUNNY            1
40
41 #define OV8858_OTP_START_ADDR   0x7010
42 #define OV8858_OTP_END_ADDR     0x7186
43
44 /*
45  * ov8858 System control registers
46  */
47
48 #define OV8858_OTP_LOAD_CTRL            0x3D81
49 #define OV8858_OTP_MODE_CTRL            0x3D84
50 #define OV8858_OTP_START_ADDR_REG       0x3D88
51 #define OV8858_OTP_END_ADDR_REG         0x3D8A
52 #define OV8858_OTP_ISP_CTRL2            0x5002
53
54 #define OV8858_OTP_MODE_MANUAL          BIT(6)
55 #define OV8858_OTP_MODE_PROGRAM_DISABLE BIT(7)
56 #define OV8858_OTP_LOAD_ENABLE          BIT(0)
57 #define OV8858_OTP_DPC_ENABLE           BIT(3)
58
59 #define OV8858_PLL1_PREDIV0             0x030A
60 #define OV8858_PLL1_PREDIV              0x0300
61 #define OV8858_PLL1_MULTIPLIER          0x0301
62 #define OV8858_PLL1_SYS_PRE_DIV         0x0305
63 #define OV8858_PLL1_SYS_DIVIDER         0x0306
64
65 #define OV8858_PLL1_PREDIV0_MASK        BIT(0)
66 #define OV8858_PLL1_PREDIV_MASK         (BIT(0) | BIT(1) | BIT(2))
67 #define OV8858_PLL1_MULTIPLIER_MASK     0x01FF
68 #define OV8858_PLL1_SYS_PRE_DIV_MASK    (BIT(0) | BIT(1))
69 #define OV8858_PLL1_SYS_DIVIDER_MASK    BIT(0)
70
71 #define OV8858_PLL2_PREDIV0             0x0312
72 #define OV8858_PLL2_PREDIV              0x030B
73 #define OV8858_PLL2_MULTIPLIER          0x030C
74 #define OV8858_PLL2_DAC_DIVIDER         0x0312
75 #define OV8858_PLL2_SYS_PRE_DIV         0x030F
76 #define OV8858_PLL2_SYS_DIVIDER         0x030E
77
78 #define OV8858_PLL2_PREDIV0_MASK        BIT(4)
79 #define OV8858_PLL2_PREDIV_MASK         (BIT(0) | BIT(1) | BIT(2))
80 #define OV8858_PLL2_MULTIPLIER_MASK     0x01FF
81 #define OV8858_PLL2_DAC_DIVIDER_MASK    (BIT(0) | BIT(1) | BIT(2) | BIT(3))
82 #define OV8858_PLL2_SYS_PRE_DIV_MASK    (BIT(0) | BIT(1) | BIT(2) | BIT(3))
83 #define OV8858_PLL2_SYS_DIVIDER_MASK    (BIT(0) | BIT(1) | BIT(2))
84
85 #define OV8858_PLL_SCLKSEL1             0x3032
86 #define OV8858_PLL_SCLKSEL2             0x3033
87 #define OV8858_SRB_HOST_INPUT_DIS       0x3106
88
89 #define OV8858_PLL_SCLKSEL1_MASK        BIT(7)
90 #define OV8858_PLL_SCLKSEL2_MASK        BIT(1)
91
92 #define OV8858_SYS_PRE_DIV_OFFSET       2
93 #define OV8858_SYS_PRE_DIV_MASK         (BIT(2) | BIT(3))
94 #define OV8858_SCLK_PDIV_OFFSET         4
95 #define OV8858_SCLK_PDIV_MASK           (BIT(4) | BIT(5) | BIT(6) | BIT(7))
96
97 #define OV8858_TIMING_HTS                       0x380C
98 #define OV8858_TIMING_VTS                       0x380E
99
100 #define OV8858_HORIZONTAL_START_H               0x3800
101 #define OV8858_VERTICAL_START_H                 0x3802
102 #define OV8858_HORIZONTAL_END_H                 0x3804
103 #define OV8858_VERTICAL_END_H                   0x3806
104 #define OV8858_HORIZONTAL_OUTPUT_SIZE_H         0x3808
105 #define OV8858_VERTICAL_OUTPUT_SIZE_H           0x380A
106
107 #define OV8858_GROUP_ACCESS                     0x3208
108 #define OV8858_GROUP_ZERO                       0x00
109 #define OV8858_GROUP_ACCESS_HOLD_START          0x00
110 #define OV8858_GROUP_ACCESS_HOLD_END            0x10
111 #define OV8858_GROUP_ACCESS_DELAY_LAUNCH        0xA0
112 #define OV8858_GROUP_ACCESS_QUICK_LAUNCH        0xE0
113
114 #define OV_SUBDEV_PREFIX                        "ov"
115 #define OV_ID_DEFAULT                           0x0000
116 #define OV8858_NAME                             "ov8858"
117 #define OV8858_CHIP_ID                          0x8858
118
119 #define OV8858_LONG_EXPO                        0x3500
120 #define OV8858_LONG_GAIN                        0x3508
121 #define OV8858_LONG_DIGI_GAIN                   0x350A
122 #define OV8858_SHORT_GAIN                       0x350C
123 #define OV8858_SHORT_DIGI_GAIN                  0x350E
124
125 #define OV8858_FORMAT1                          0x3820
126 #define OV8858_FORMAT2                          0x3821
127
128 #define OV8858_FLIP_ENABLE                      0x06
129
130 #define OV8858_MWB_RED_GAIN_H                   0x5032
131 #define OV8858_MWB_GREEN_GAIN_H                 0x5034
132 #define OV8858_MWB_BLUE_GAIN_H                  0x5036
133 #define OV8858_MWB_GAIN_MAX                     0x0FFF
134
135 #define OV8858_CHIP_ID_HIGH                     0x300B
136 #define OV8858_CHIP_ID_LOW                      0x300C
137 #define OV8858_STREAM_MODE                      0x0100
138
139 #define OV8858_FOCAL_LENGTH_NUM                 294     /* 2.94mm */
140 #define OV8858_FOCAL_LENGTH_DEM                 100
141 #define OV8858_F_NUMBER_DEFAULT_NUM             24      /* 2.4 */
142 #define OV8858_F_NUMBER_DEM                     10
143
144 #define OV8858_H_INC_ODD                        0x3814
145 #define OV8858_H_INC_EVEN                       0x3815
146 #define OV8858_V_INC_ODD                        0x382A
147 #define OV8858_V_INC_EVEN                       0x382B
148
149 #define OV8858_READ_MODE_BINNING_ON             0x0400 /* ToDo: Check this */
150 #define OV8858_READ_MODE_BINNING_OFF            0x00   /* ToDo: Check this */
151 #define OV8858_BIN_FACTOR_MAX                   2
152 #define OV8858_INTEGRATION_TIME_MARGIN          14
153
154 #define OV8858_MAX_VTS_VALUE                    0xFFFF
155 #define OV8858_MAX_EXPOSURE_VALUE \
156                 (OV8858_MAX_VTS_VALUE - OV8858_INTEGRATION_TIME_MARGIN)
157 #define OV8858_MAX_GAIN_VALUE                   0x07FF
158
159 #define OV8858_MAX_FOCUS_POS                    1023
160
161 #define OV8858_TEST_PATTERN_REG                 0x5E00
162
163 struct ov8858_vcm {
164         int (*power_up)(struct v4l2_subdev *sd);
165         int (*power_down)(struct v4l2_subdev *sd);
166         int (*init)(struct v4l2_subdev *sd);
167         int (*t_focus_abs)(struct v4l2_subdev *sd, s32 value);
168         int (*t_focus_rel)(struct v4l2_subdev *sd, s32 value);
169         int (*q_focus_status)(struct v4l2_subdev *sd, s32 *value);
170         int (*q_focus_abs)(struct v4l2_subdev *sd, s32 *value);
171         int (*t_vcm_slew)(struct v4l2_subdev *sd, s32 value);
172         int (*t_vcm_timing)(struct v4l2_subdev *sd, s32 value);
173 };
174
175 /*
176  * Defines for register writes and register array processing
177  * */
178 #define OV8858_BYTE_MAX                         32
179 #define OV8858_SHORT_MAX                        16
180 #define OV8858_TOK_MASK                         0xFFF0
181
182 #define MAX_FPS_OPTIONS_SUPPORTED               3
183
184 #define OV8858_DEPTH_COMP_CONST                 2200
185 #define OV8858_DEPTH_VTS_CONST                  2573
186
187 enum ov8858_tok_type {
188         OV8858_8BIT  = 0x0001,
189         OV8858_16BIT = 0x0002,
190         OV8858_TOK_TERM   = 0xF000,     /* terminating token for reg list */
191         OV8858_TOK_DELAY  = 0xFE00      /* delay token for reg list */
192 };
193
194 /*
195  * If register address or register width is not 32 bit width,
196  * user needs to convert it manually
197  */
198 struct s_register_setting {
199         u32 reg;
200         u32 val;
201 };
202
203 /**
204  * struct ov8858_reg - MI sensor register format
205  * @type: type of the register
206  * @reg: 16-bit offset to register
207  * @val: 8/16/32-bit register value
208  *
209  * Define a structure for sensor register initialization values
210  */
211 struct ov8858_reg {
212         enum ov8858_tok_type type;
213         u16 sreg;
214         u32 val;        /* @set value for read/mod/write, @mask */
215 };
216
217 struct ov8858_fps_setting {
218         int fps;
219         unsigned short pixels_per_line;
220         unsigned short lines_per_frame;
221         const struct ov8858_reg *regs; /* regs that the fps setting needs */
222 };
223
224 struct ov8858_resolution {
225         u8 *desc;
226         const struct ov8858_reg *regs;
227         int res;
228         int width;
229         int height;
230         bool used;
231         u8 bin_factor_x;
232         u8 bin_factor_y;
233         unsigned short skip_frames;
234         const struct ov8858_fps_setting fps_options[MAX_FPS_OPTIONS_SUPPORTED];
235 };
236
237 /*
238  * ov8858 device structure
239  * */
240 struct ov8858_device {
241         struct v4l2_subdev sd;
242         struct media_pad pad;
243         struct v4l2_mbus_framefmt format;
244
245         struct camera_sensor_platform_data *platform_data;
246         struct mutex input_lock; /* serialize sensor's ioctl */
247         int fmt_idx;
248         int streaming;
249         int vt_pix_clk_freq_mhz;
250         int fps_index;
251         u16 sensor_id;                  /* Sensor id from registers */
252         u16 i2c_id;                     /* Sensor id from i2c_device_id */
253         int exposure;
254         int gain;
255         u16 digital_gain;
256         u16 pixels_per_line;
257         u16 lines_per_frame;
258         u8 fps;
259         u8 *otp_data;
260         /* Prevent the framerate from being lowered in low light scenes. */
261         int limit_exposure_flag;
262         bool hflip;
263         bool vflip;
264
265         const struct ov8858_reg *regs;
266         struct ov8858_vcm *vcm_driver;
267         const struct ov8858_resolution *curr_res_table;
268         unsigned long entries_curr_table;
269
270         struct v4l2_ctrl_handler ctrl_handler;
271         struct v4l2_ctrl *run_mode;
272 };
273
274 #define to_ov8858_sensor(x) container_of(x, struct ov8858_device, sd)
275
276 #define OV8858_MAX_WRITE_BUF_SIZE       32
277 struct ov8858_write_buffer {
278         u16 addr;
279         u8 data[OV8858_MAX_WRITE_BUF_SIZE];
280 };
281
282 struct ov8858_write_ctrl {
283         int index;
284         struct ov8858_write_buffer buffer;
285 };
286
287 static const struct ov8858_reg ov8858_soft_standby[] = {
288         {OV8858_8BIT, 0x0100, 0x00},
289         {OV8858_TOK_TERM, 0, 0}
290 };
291
292 static const struct ov8858_reg ov8858_streaming[] = {
293         {OV8858_8BIT, 0x0100, 0x01},
294         {OV8858_TOK_TERM, 0, 0}
295 };
296
297 static const struct ov8858_reg ov8858_param_hold[] = {
298         {OV8858_8BIT, OV8858_GROUP_ACCESS,
299                         OV8858_GROUP_ZERO | OV8858_GROUP_ACCESS_HOLD_START},
300         {OV8858_TOK_TERM, 0, 0}
301 };
302
303 static const struct ov8858_reg ov8858_param_update[] = {
304         {OV8858_8BIT, OV8858_GROUP_ACCESS,
305                         OV8858_GROUP_ZERO | OV8858_GROUP_ACCESS_HOLD_END},
306         {OV8858_8BIT, OV8858_GROUP_ACCESS,
307                         OV8858_GROUP_ZERO | OV8858_GROUP_ACCESS_DELAY_LAUNCH},
308         {OV8858_TOK_TERM, 0, 0}
309 };
310
311 extern int dw9718_vcm_power_up(struct v4l2_subdev *sd);
312 extern int dw9718_vcm_power_down(struct v4l2_subdev *sd);
313 extern int dw9718_vcm_init(struct v4l2_subdev *sd);
314 extern int dw9718_t_focus_abs(struct v4l2_subdev *sd, s32 value);
315 extern int dw9718_t_focus_rel(struct v4l2_subdev *sd, s32 value);
316 extern int dw9718_q_focus_status(struct v4l2_subdev *sd, s32 *value);
317 extern int dw9718_q_focus_abs(struct v4l2_subdev *sd, s32 *value);
318 extern int dw9718_t_vcm_slew(struct v4l2_subdev *sd, s32 value);
319 extern int dw9718_t_vcm_timing(struct v4l2_subdev *sd, s32 value);
320
321 extern int vcm_power_up(struct v4l2_subdev *sd);
322 extern int vcm_power_down(struct v4l2_subdev *sd);
323
324 static struct ov8858_vcm ov8858_vcms[] = {
325         [OV8858_SUNNY] = {
326                 .power_up = dw9718_vcm_power_up,
327                 .power_down = dw9718_vcm_power_down,
328                 .init = dw9718_vcm_init,
329                 .t_focus_abs = dw9718_t_focus_abs,
330                 .t_focus_rel = dw9718_t_focus_rel,
331                 .q_focus_status = dw9718_q_focus_status,
332                 .q_focus_abs = dw9718_q_focus_abs,
333                 .t_vcm_slew = dw9718_t_vcm_slew,
334                 .t_vcm_timing = dw9718_t_vcm_timing,
335         },
336         [OV8858_ID_DEFAULT] = {
337                 .power_up = NULL,
338                 .power_down = NULL,
339         },
340 };
341
342
343 #define OV8858_RES_WIDTH_MAX    3280
344 #define OV8858_RES_HEIGHT_MAX   2464
345
346 static struct ov8858_reg ov8858_BasicSettings[] = {
347         {OV8858_8BIT, 0x0103, 0x01}, /* software_reset */
348         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
349         /* PLL settings */
350         {OV8858_8BIT, 0x0300, 0x05}, /* pll1_pre_div = /4 */
351         {OV8858_8BIT, 0x0302, 0xAF}, /* pll1_multiplier = 175 */
352         {OV8858_8BIT, 0x0303, 0x00}, /* pll1_divm = /(1 + 0) */
353         {OV8858_8BIT, 0x0304, 0x03}, /* pll1_div_mipi = /8 */
354         {OV8858_8BIT, 0x030B, 0x02}, /* pll2_pre_div = /2 */
355         {OV8858_8BIT, 0x030D, 0x4E}, /* pll2_r_divp = 78 */
356         {OV8858_8BIT, 0x030E, 0x00}, /* pll2_r_divs = /1 */
357         {OV8858_8BIT, 0x030F, 0x04}, /* pll2_r_divsp = /(1 + 4) */
358         /* pll2_pre_div0 = /1, pll2_r_divdac = /(1 + 1) */
359         {OV8858_8BIT, 0x0312, 0x01},
360         {OV8858_8BIT, 0x031E, 0x0C}, /* pll1_no_lat = 1, mipi_bitsel_man = 0 */
361
362         /* PAD OEN2, VSYNC out enable=0x80, disable=0x00 */
363         {OV8858_8BIT, 0x3002, 0x80},
364         /* PAD OUT2, VSYNC pulse direction low-to-high = 1 */
365         {OV8858_8BIT, 0x3007, 0x01},
366         /* PAD SEL2, VSYNC out value = 0 */
367         {OV8858_8BIT, 0x300D, 0x00},
368         /* PAD OUT2, VSYNC out select = 0 */
369         {OV8858_8BIT, 0x3010, 0x00},
370
371         /* Npump clock div = /2, Ppump clock div = /4 */
372         {OV8858_8BIT, 0x3015, 0x01},
373         /*
374          * mipi_lane_mode = 1+3, mipi_lvds_sel = 1 = MIPI enable,
375          * r_phy_pd_mipi_man = 0, lane_dis_option = 0
376          */
377         {OV8858_8BIT, 0x3018, 0x72},
378         /* Clock switch output = normal, pclk_div = /1 */
379         {OV8858_8BIT, 0x3020, 0x93},
380         /*
381          * lvds_mode_o = 0, clock lane disable when pd_mipi = 0,
382          * pd_mipi enable when rst_sync = 1
383          */
384         {OV8858_8BIT, 0x3022, 0x01},
385         {OV8858_8BIT, 0x3031, 0x0A}, /* mipi_bit_sel = 10 */
386         {OV8858_8BIT, 0x3034, 0x00}, /* Unknown */
387         /* sclk_div = /1, sclk_pre_div = /1, chip debug = 1 */
388         {OV8858_8BIT, 0x3106, 0x01},
389
390         {OV8858_8BIT, 0x3305, 0xF1}, /* Unknown */
391         {OV8858_8BIT, 0x3307, 0x04}, /* Unknown */
392         {OV8858_8BIT, 0x3308, 0x00}, /* Unknown */
393         {OV8858_8BIT, 0x3309, 0x28}, /* Unknown */
394         {OV8858_8BIT, 0x330A, 0x00}, /* Unknown */
395         {OV8858_8BIT, 0x330B, 0x20}, /* Unknown */
396         {OV8858_8BIT, 0x330C, 0x00}, /* Unknown */
397         {OV8858_8BIT, 0x330D, 0x00}, /* Unknown */
398         {OV8858_8BIT, 0x330E, 0x00}, /* Unknown */
399         {OV8858_8BIT, 0x330F, 0x40}, /* Unknown */
400
401         {OV8858_8BIT, 0x3500, 0x00}, /* long exposure = 0x9A20 */
402         {OV8858_8BIT, 0x3501, 0x9A}, /* long exposure = 0x9A20 */
403         {OV8858_8BIT, 0x3502, 0x20}, /* long exposure = 0x9A20 */
404         /*
405          * Digital fraction gain delay option = Delay 1 frame,
406          * Gain change delay option = Delay 1 frame,
407          * Gain delay option = Delay 1 frame,
408          * Gain manual as sensor gain = Input gain as real gain format,
409          * Exposure delay option (must be 0 = Delay 1 frame,
410          * Exposure change delay option (must be 0) = Delay 1 frame
411          */
412         {OV8858_8BIT, 0x3503, 0x00},
413         {OV8858_8BIT, 0x3505, 0x80}, /* gain conversation option */
414         /*
415          * [10:7] are integer gain, [6:0] are fraction gain. For example:
416          * 0x80 is 1x gain, 0x100 is 2x gain, 0x1C0 is 3.5x gain
417          */
418         {OV8858_8BIT, 0x3508, 0x02}, /* long gain = 0x0200 */
419         {OV8858_8BIT, 0x3509, 0x00}, /* long gain = 0x0200 */
420         {OV8858_8BIT, 0x350C, 0x00}, /* short gain = 0x0080 */
421         {OV8858_8BIT, 0x350D, 0x80}, /* short gain = 0x0080 */
422         {OV8858_8BIT, 0x3510, 0x00}, /* short exposure = 0x000200 */
423         {OV8858_8BIT, 0x3511, 0x02}, /* short exposure = 0x000200 */
424         {OV8858_8BIT, 0x3512, 0x00}, /* short exposure = 0x000200 */
425
426         {OV8858_8BIT, 0x3600, 0x00}, /* Unknown */
427         {OV8858_8BIT, 0x3601, 0x00}, /* Unknown */
428         {OV8858_8BIT, 0x3602, 0x00}, /* Unknown */
429         {OV8858_8BIT, 0x3603, 0x00}, /* Unknown */
430         {OV8858_8BIT, 0x3604, 0x22}, /* Unknown */
431         {OV8858_8BIT, 0x3605, 0x30}, /* Unknown */
432         {OV8858_8BIT, 0x3606, 0x00}, /* Unknown */
433         {OV8858_8BIT, 0x3607, 0x20}, /* Unknown */
434         {OV8858_8BIT, 0x3608, 0x11}, /* Unknown */
435         {OV8858_8BIT, 0x3609, 0x28}, /* Unknown */
436         {OV8858_8BIT, 0x360A, 0x00}, /* Unknown */
437         {OV8858_8BIT, 0x360B, 0x06}, /* Unknown */
438         {OV8858_8BIT, 0x360C, 0xDC}, /* Unknown */
439         {OV8858_8BIT, 0x360D, 0x40}, /* Unknown */
440         {OV8858_8BIT, 0x360E, 0x0C}, /* Unknown */
441         {OV8858_8BIT, 0x360F, 0x20}, /* Unknown */
442         {OV8858_8BIT, 0x3610, 0x07}, /* Unknown */
443         {OV8858_8BIT, 0x3611, 0x20}, /* Unknown */
444         {OV8858_8BIT, 0x3612, 0x88}, /* Unknown */
445         {OV8858_8BIT, 0x3613, 0x80}, /* Unknown */
446         {OV8858_8BIT, 0x3614, 0x58}, /* Unknown */
447         {OV8858_8BIT, 0x3615, 0x00}, /* Unknown */
448         {OV8858_8BIT, 0x3616, 0x4A}, /* Unknown */
449         {OV8858_8BIT, 0x3617, 0x90}, /* Unknown */
450         {OV8858_8BIT, 0x3618, 0x56}, /* Unknown */
451         {OV8858_8BIT, 0x3619, 0x70}, /* Unknown */
452         {OV8858_8BIT, 0x361A, 0x99}, /* Unknown */
453         {OV8858_8BIT, 0x361B, 0x00}, /* Unknown */
454         {OV8858_8BIT, 0x361C, 0x07}, /* Unknown */
455         {OV8858_8BIT, 0x361D, 0x00}, /* Unknown */
456         {OV8858_8BIT, 0x361E, 0x00}, /* Unknown */
457         {OV8858_8BIT, 0x361F, 0x00}, /* Unknown */
458         {OV8858_8BIT, 0x3633, 0x0C}, /* Unknown */
459         {OV8858_8BIT, 0x3634, 0x0C}, /* Unknown */
460         {OV8858_8BIT, 0x3635, 0x0C}, /* Unknown */
461         {OV8858_8BIT, 0x3636, 0x0C}, /* Unknown */
462         {OV8858_8BIT, 0x3638, 0xFF}, /* Unknown */
463         {OV8858_8BIT, 0x3645, 0x13}, /* Unknown */
464         {OV8858_8BIT, 0x3646, 0x83}, /* Unknown */
465         {OV8858_8BIT, 0x364A, 0x07}, /* Unknown */
466
467         {OV8858_8BIT, 0x3700, 0x30}, /* Unknown */
468         {OV8858_8BIT, 0x3701, 0x18}, /* Unknown */
469         {OV8858_8BIT, 0x3702, 0x50}, /* Unknown */
470         {OV8858_8BIT, 0x3703, 0x32}, /* Unknown */
471         {OV8858_8BIT, 0x3704, 0x28}, /* Unknown */
472         {OV8858_8BIT, 0x3705, 0x00}, /* Unknown */
473         {OV8858_8BIT, 0x3706, 0x6A}, /* Unknown */
474         {OV8858_8BIT, 0x3707, 0x08}, /* Unknown */
475         {OV8858_8BIT, 0x3708, 0x48}, /* Unknown */
476         {OV8858_8BIT, 0x3709, 0x66}, /* Unknown */
477         {OV8858_8BIT, 0x370A, 0x01}, /* Unknown */
478         {OV8858_8BIT, 0x370B, 0x6A}, /* Unknown */
479         {OV8858_8BIT, 0x370C, 0x07}, /* Unknown */
480         {OV8858_8BIT, 0x3712, 0x44}, /* Unknown */
481         {OV8858_8BIT, 0x3714, 0x24}, /* Unknown */
482         {OV8858_8BIT, 0x3718, 0x14}, /* Unknown */
483         {OV8858_8BIT, 0x3719, 0x31}, /* Unknown */
484         {OV8858_8BIT, 0x371E, 0x31}, /* Unknown */
485         {OV8858_8BIT, 0x371F, 0x7F}, /* Unknown */
486         {OV8858_8BIT, 0x3720, 0x0A}, /* Unknown */
487         {OV8858_8BIT, 0x3721, 0x0A}, /* Unknown */
488         {OV8858_8BIT, 0x3724, 0x0C}, /* Unknown */
489         {OV8858_8BIT, 0x3725, 0x02}, /* Unknown */
490         {OV8858_8BIT, 0x3726, 0x0C}, /* Unknown */
491         {OV8858_8BIT, 0x3728, 0x0A}, /* Unknown */
492         {OV8858_8BIT, 0x3729, 0x03}, /* Unknown */
493         {OV8858_8BIT, 0x372A, 0x06}, /* Unknown */
494         {OV8858_8BIT, 0x372B, 0xA6}, /* Unknown */
495         {OV8858_8BIT, 0x372C, 0xA6}, /* Unknown */
496         {OV8858_8BIT, 0x372D, 0xA6}, /* Unknown */
497         {OV8858_8BIT, 0x372E, 0x0C}, /* Unknown */
498         {OV8858_8BIT, 0x372F, 0x20}, /* Unknown */
499         {OV8858_8BIT, 0x3730, 0x02}, /* Unknown */
500         {OV8858_8BIT, 0x3731, 0x0C}, /* Unknown */
501         {OV8858_8BIT, 0x3732, 0x28}, /* Unknown */
502         {OV8858_8BIT, 0x3733, 0x10}, /* Unknown */
503         {OV8858_8BIT, 0x3734, 0x40}, /* Unknown */
504         {OV8858_8BIT, 0x3736, 0x30}, /* Unknown */
505         {OV8858_8BIT, 0x373A, 0x0A}, /* Unknown */
506         {OV8858_8BIT, 0x373B, 0x0B}, /* Unknown */
507         {OV8858_8BIT, 0x373C, 0x14}, /* Unknown */
508         {OV8858_8BIT, 0x373E, 0x06}, /* Unknown */
509         {OV8858_8BIT, 0x3755, 0x10}, /* Unknown */
510         {OV8858_8BIT, 0x3758, 0x00}, /* Unknown */
511         {OV8858_8BIT, 0x3759, 0x4C}, /* Unknown */
512         {OV8858_8BIT, 0x375A, 0x0C}, /* Unknown */
513         {OV8858_8BIT, 0x375B, 0x26}, /* Unknown */
514         {OV8858_8BIT, 0x375C, 0x20}, /* Unknown */
515         {OV8858_8BIT, 0x375D, 0x04}, /* Unknown */
516         {OV8858_8BIT, 0x375E, 0x00}, /* Unknown */
517         {OV8858_8BIT, 0x375F, 0x28}, /* Unknown */
518         {OV8858_8BIT, 0x3760, 0x00}, /* Unknown */
519         {OV8858_8BIT, 0x3761, 0x00}, /* Unknown */
520         {OV8858_8BIT, 0x3762, 0x00}, /* Unknown */
521         {OV8858_8BIT, 0x3763, 0x00}, /* Unknown */
522         {OV8858_8BIT, 0x3766, 0xFF}, /* Unknown */
523         {OV8858_8BIT, 0x3768, 0x22}, /* Unknown */
524         {OV8858_8BIT, 0x3769, 0x44}, /* Unknown */
525         {OV8858_8BIT, 0x376A, 0x44}, /* Unknown */
526         {OV8858_8BIT, 0x376B, 0x00}, /* Unknown */
527         {OV8858_8BIT, 0x376F, 0x01}, /* Unknown */
528         {OV8858_8BIT, 0x3772, 0x46}, /* Unknown */
529         {OV8858_8BIT, 0x3773, 0x04}, /* Unknown */
530         {OV8858_8BIT, 0x3774, 0x2C}, /* Unknown */
531         {OV8858_8BIT, 0x3775, 0x13}, /* Unknown */
532         {OV8858_8BIT, 0x3776, 0x08}, /* Unknown */
533         {OV8858_8BIT, 0x3777, 0x00}, /* Unknown */
534         {OV8858_8BIT, 0x3778, 0x16}, /* Unknown */
535         {OV8858_8BIT, 0x37A0, 0x88}, /* Unknown */
536         {OV8858_8BIT, 0x37A1, 0x7A}, /* Unknown */
537         {OV8858_8BIT, 0x37A2, 0x7A}, /* Unknown */
538         {OV8858_8BIT, 0x37A3, 0x00}, /* Unknown */
539         {OV8858_8BIT, 0x37A4, 0x00}, /* Unknown */
540         {OV8858_8BIT, 0x37A5, 0x00}, /* Unknown */
541         {OV8858_8BIT, 0x37A6, 0x00}, /* Unknown */
542         {OV8858_8BIT, 0x37A7, 0x88}, /* Unknown */
543         {OV8858_8BIT, 0x37A8, 0x98}, /* Unknown */
544         {OV8858_8BIT, 0x37A9, 0x98}, /* Unknown */
545         {OV8858_8BIT, 0x37AA, 0x88}, /* Unknown */
546         {OV8858_8BIT, 0x37AB, 0x5C}, /* Unknown */
547         {OV8858_8BIT, 0x37AC, 0x5C}, /* Unknown */
548         {OV8858_8BIT, 0x37AD, 0x55}, /* Unknown */
549         {OV8858_8BIT, 0x37AE, 0x19}, /* Unknown */
550         {OV8858_8BIT, 0x37AF, 0x19}, /* Unknown */
551         {OV8858_8BIT, 0x37B0, 0x00}, /* Unknown */
552         {OV8858_8BIT, 0x37B1, 0x00}, /* Unknown */
553         {OV8858_8BIT, 0x37B2, 0x00}, /* Unknown */
554         {OV8858_8BIT, 0x37B3, 0x84}, /* Unknown */
555         {OV8858_8BIT, 0x37B4, 0x84}, /* Unknown */
556         {OV8858_8BIT, 0x37B5, 0x66}, /* Unknown */
557         {OV8858_8BIT, 0x37B6, 0x00}, /* Unknown */
558         {OV8858_8BIT, 0x37B7, 0x00}, /* Unknown */
559         {OV8858_8BIT, 0x37B8, 0x00}, /* Unknown */
560         {OV8858_8BIT, 0x37B9, 0xFF}, /* Unknown */
561
562         {OV8858_8BIT, 0x3800, 0x00}, /* h_crop_start high */
563         {OV8858_8BIT, 0x3801, 0x0C}, /* h_crop_start low */
564         {OV8858_8BIT, 0x3802, 0x00}, /* v_crop_start high */
565         {OV8858_8BIT, 0x3803, 0x0C}, /* v_crop_start low */
566         {OV8858_8BIT, 0x3804, 0x0C}, /* h_crop_end high */
567         {OV8858_8BIT, 0x3805, 0xD3}, /* h_crop_end low */
568         {OV8858_8BIT, 0x3806, 0x09}, /* v_crop_end high */
569         {OV8858_8BIT, 0x3807, 0xA3}, /* v_crop_end low */
570         {OV8858_8BIT, 0x3808, 0x0C}, /* h_output_size high */
571         {OV8858_8BIT, 0x3809, 0xC0}, /* h_output_size low */
572         {OV8858_8BIT, 0x380A, 0x09}, /* v_output_size high */
573         {OV8858_8BIT, 0x380B, 0x90}, /* v_output_size low */
574         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
575         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
576         {OV8858_8BIT, 0x380E, 0x0A}, /* vertical timing size high */
577         {OV8858_8BIT, 0x380F, 0x0D}, /* vertical timing size low */
578         {OV8858_8BIT, 0x3810, 0x00}, /* h_win offset high */
579         {OV8858_8BIT, 0x3811, 0x04}, /* h_win offset low */
580         {OV8858_8BIT, 0x3812, 0x00}, /* v_win offset high */
581         {OV8858_8BIT, 0x3813, 0x02}, /* v_win offset low */
582         {OV8858_8BIT, 0x3814, 0x01}, /* h_odd_inc */
583         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
584         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
585         {OV8858_8BIT, 0x3821, 0x40}, /* format2 */
586         {OV8858_8BIT, 0x382A, 0x01}, /* v_odd_inc */
587         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
588
589         {OV8858_8BIT, 0x3830, 0x06}, /* Unknown */
590         {OV8858_8BIT, 0x3836, 0x01}, /* Unknown */
591         {OV8858_8BIT, 0x3837, 0x18}, /* Unknown */
592         {OV8858_8BIT, 0x3841, 0xFF}, /* AUTO_SIZE_CTRL */
593         {OV8858_8BIT, 0x3846, 0x48}, /* Unknown */
594
595         {OV8858_8BIT, 0x3D85, 0x14}, /* OTP_REG85 */
596         {OV8858_8BIT, 0x3D8C, 0x73}, /* OTP_SETTING_STT_ADDRESS */
597         {OV8858_8BIT, 0x3D8D, 0xDE}, /* OTP_SETTING_STT_ADDRESS */
598         {OV8858_8BIT, 0x3F08, 0x10}, /* PSRAM control register */
599         {OV8858_8BIT, 0x3F0A, 0x80}, /* PSRAM control register */
600
601         {OV8858_8BIT, 0x4000, 0xF1}, /* BLC CTRL00 = default */
602         {OV8858_8BIT, 0x4001, 0x00}, /* BLC CTRL01 */
603         {OV8858_8BIT, 0x4002, 0x27}, /* BLC offset = 0x27 */
604         {OV8858_8BIT, 0x4005, 0x10}, /* BLC target = 0x0010 */
605         {OV8858_8BIT, 0x4009, 0x81}, /* BLC CTRL09 */
606         {OV8858_8BIT, 0x400B, 0x0C}, /* BLC CTRL0B = default */
607         {OV8858_8BIT, 0x400A, 0x01},
608         {OV8858_8BIT, 0x4011, 0x20}, /* BLC CTRL11 = 0x20 */
609         {OV8858_8BIT, 0x401B, 0x00}, /* Zero line R coeff. = 0x0000 */
610         {OV8858_8BIT, 0x401D, 0x00}, /* Zero line T coeff. = 0x0000 */
611         {OV8858_8BIT, 0x401F, 0x00}, /* BLC CTRL1F */
612         {OV8858_8BIT, 0x4020, 0x00}, /* Anchor left start = 0x0004 */
613         {OV8858_8BIT, 0x4021, 0x04}, /* Anchor left start = 0x0004 */
614         {OV8858_8BIT, 0x4022, 0x0C}, /* Anchor left end = 0x0C60 */
615         {OV8858_8BIT, 0x4023, 0x60}, /* Anchor left end = 0x0C60 */
616         {OV8858_8BIT, 0x4024, 0x0F}, /* Anchor right start = 0x0F36 */
617         {OV8858_8BIT, 0x4025, 0x36}, /* Anchor right start = 0x0F36 */
618         {OV8858_8BIT, 0x4026, 0x0F}, /* Anchor right end = 0x0F37 */
619         {OV8858_8BIT, 0x4027, 0x37}, /* Anchor right end = 0x0F37 */
620         {OV8858_8BIT, 0x4028, 0x00}, /* Top zero line start = 0 */
621         {OV8858_8BIT, 0x4029, 0x04}, /* Top zero line number = 4 */
622         {OV8858_8BIT, 0x402A, 0x04}, /* Top black line start = 4 */
623         {OV8858_8BIT, 0x402B, 0x08}, /* Top black line number = 8 */
624         {OV8858_8BIT, 0x402C, 0x00}, /* Bottom zero start line = 0 */
625         {OV8858_8BIT, 0x402D, 0x02}, /* Bottom zero line number = 2 */
626         {OV8858_8BIT, 0x402E, 0x04}, /* Bottom black line start = 4 */
627         {OV8858_8BIT, 0x402F, 0x08}, /* Bottom black line number = 8 */
628
629         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
630         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
631         {OV8858_8BIT, 0x4300, 0xFF}, /* clip_max[11:4] = 0xFFF */
632         {OV8858_8BIT, 0x4301, 0x00}, /* clip_min[11:4] = 0 */
633         {OV8858_8BIT, 0x4302, 0x0F}, /* clip_min/max[3:0] */
634         {OV8858_8BIT, 0x4307, 0x01}, /* Unknown */
635         {OV8858_8BIT, 0x4316, 0x00}, /* CTRL16 = default */
636         {OV8858_8BIT, 0x4503, 0x18}, /* Unknown */
637         {OV8858_8BIT, 0x4500, 0x38}, /* Unknown */
638         {OV8858_8BIT, 0x4600, 0x01}, /* Unknown */
639         {OV8858_8BIT, 0x4601, 0x97}, /* Unknown */
640         /* wkup_dly = Mark1 wakeup delay/2^10 = 0x25 */
641         {OV8858_8BIT, 0x4808, 0x25},
642         {OV8858_8BIT, 0x4816, 0x52}, /* Embedded data type*/
643         {OV8858_8BIT, 0x481F, 0x32}, /* clk_prepare_min = 0x32 */
644         {OV8858_8BIT, 0x4825, 0x3A}, /* lpx_p_min = 0x3A */
645         {OV8858_8BIT, 0x4826, 0x40}, /* hs_prepare_min = 0x40 */
646         {OV8858_8BIT, 0x4837, 0x14}, /* pclk_period = 0x14 */
647         {OV8858_8BIT, 0x4850, 0x10}, /* LANE SEL01 */
648         {OV8858_8BIT, 0x4851, 0x32}, /* LANE SEL02 */
649
650         {OV8858_8BIT, 0x4B00, 0x2A}, /* Unknown */
651         {OV8858_8BIT, 0x4B0D, 0x00}, /* Unknown */
652         {OV8858_8BIT, 0x4D00, 0x04}, /* TPM_CTRL_REG */
653         {OV8858_8BIT, 0x4D01, 0x18}, /* TPM_CTRL_REG */
654         {OV8858_8BIT, 0x4D02, 0xC3}, /* TPM_CTRL_REG */
655         {OV8858_8BIT, 0x4D03, 0xFF}, /* TPM_CTRL_REG */
656         {OV8858_8BIT, 0x4D04, 0xFF}, /* TPM_CTRL_REG */
657         {OV8858_8BIT, 0x4D05, 0xFF}, /* TPM_CTRL_REG */
658
659         /*
660          * Lens correction (LENC) function enable = 0
661          * Slave sensor AWB Gain function enable = 1
662          * Slave sensor AWB Statistics function enable = 1
663          * Master sensor AWB Gain function enable = 1
664          * Master sensor AWB Statistics function enable = 1
665          * Black DPC function enable = 1
666          * White DPC function enable =1
667          */
668         {OV8858_8BIT, 0x5000, 0x7E},
669         {OV8858_8BIT, 0x5001, 0x01}, /* BLC function enable = 1 */
670         /*
671          * Horizontal scale function enable = 0
672          * WBMATCH bypass mode = Select slave sensor's gain
673          * WBMATCH function enable = 0
674          * Master MWB gain support RGBC = 0
675          * OTP_DPC function enable = 1
676          * Manual mode of VarioPixel function enable = 0
677          * Manual enable of VarioPixel function enable = 0
678          * Use VSYNC to latch ISP modules's function enable signals = 0
679          */
680         {OV8858_8BIT, 0x5002, 0x08},
681         /*
682          * Bypass all ISP modules after BLC module = 0
683          * DPC_DBC buffer control enable = 1
684          * WBMATCH VSYNC selection = Select master sensor's VSYNC fall
685          * Select master AWB gain to embed line = AWB gain before manual mode
686          * Enable BLC's input flip_i signal = 0
687          */
688         {OV8858_8BIT, 0x5003, 0x20},
689         {OV8858_8BIT, 0x5041, 0x1D}, /* ISP CTRL41 - embedded data=on */
690         {OV8858_8BIT, 0x5046, 0x12}, /* ISP CTRL46 = default */
691         /*
692          * Tail enable = 1
693          * Saturate cross cluster enable = 1
694          * Remove cross cluster enable = 1
695          * Enable to remove connected defect pixels in same channel = 1
696          * Enable to remove connected defect pixels in different channel = 1
697          * Smooth enable, use average G for recovery = 1
698          * Black/white sensor mode enable = 0
699          * Manual mode enable = 0
700          */
701         {OV8858_8BIT, 0x5780, 0xFC},
702         {OV8858_8BIT, 0x5784, 0x0C}, /* DPC CTRL04 */
703         {OV8858_8BIT, 0x5787, 0x40}, /* DPC CTRL07 */
704         {OV8858_8BIT, 0x5788, 0x08}, /* DPC CTRL08 */
705         {OV8858_8BIT, 0x578A, 0x02}, /* DPC CTRL0A */
706         {OV8858_8BIT, 0x578B, 0x01}, /* DPC CTRL0B */
707         {OV8858_8BIT, 0x578C, 0x01}, /* DPC CTRL0C */
708         {OV8858_8BIT, 0x578E, 0x02}, /* DPC CTRL0E */
709         {OV8858_8BIT, 0x578F, 0x01}, /* DPC CTRL0F */
710         {OV8858_8BIT, 0x5790, 0x01}, /* DPC CTRL10 */
711         {OV8858_8BIT, 0x5901, 0x00}, /* VAP CTRL01 = default */
712         /* WINC CTRL08 = embedded data in 1st line*/
713         {OV8858_8BIT, 0x5A08, 0x00},
714         {OV8858_8BIT, 0x5B00, 0x02}, /* OTP CTRL00 */
715         {OV8858_8BIT, 0x5B01, 0x10}, /* OTP CTRL01 */
716         {OV8858_8BIT, 0x5B02, 0x03}, /* OTP CTRL02 */
717         {OV8858_8BIT, 0x5B03, 0xCF}, /* OTP CTRL03 */
718         {OV8858_8BIT, 0x5B05, 0x6C}, /* OTP CTRL05 = default */
719         {OV8858_8BIT, 0x5E00, 0x00}, /* PRE CTRL00 = default */
720         {OV8858_8BIT, 0x5E01, 0x41}, /* PRE_CTRL01 = default */
721
722         {OV8858_TOK_TERM, 0, 0}
723 };
724
725 /*****************************STILL********************************/
726
727 static const struct ov8858_reg ov8858_8M[] = {
728         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
729         {OV8858_8BIT, 0x3778, 0x16}, /* Unknown */
730         {OV8858_8BIT, 0x3800, 0x00}, /* h_crop_start high */
731         {OV8858_8BIT, 0x3801, 0x0C}, /* h_crop_start low 12 */
732         {OV8858_8BIT, 0x3802, 0x00}, /* v_crop_start high */
733         {OV8858_8BIT, 0x3803, 0x0C}, /* v_crop_start low */
734         {OV8858_8BIT, 0x3804, 0x0C}, /* h_crop_end high */
735         {OV8858_8BIT, 0x3805, 0xD3}, /* h_crop_end low 3283 */
736         {OV8858_8BIT, 0x3806, 0x09}, /* v_crop_end high */
737         {OV8858_8BIT, 0x3807, 0xA3}, /* v_crop_end low */
738         {OV8858_8BIT, 0x3808, 0x0C}, /* h_output_size high 3280 x 2464 */
739         {OV8858_8BIT, 0x3809, 0xD0}, /* h_output_size low */
740         {OV8858_8BIT, 0x380A, 0x09}, /* v_output_size high */
741         {OV8858_8BIT, 0x380B, 0xa0}, /* v_output_size low */
742         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
743         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
744         {OV8858_8BIT, 0x380E, 0x0A}, /* vertical timing size high */
745         {OV8858_8BIT, 0x380F, 0x0D}, /* vertical timing size low */
746         {OV8858_8BIT, 0x3814, 0x01}, /* h_odd_inc */
747         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
748         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
749         {OV8858_8BIT, 0x3821, 0x40}, /* format2 */
750         {OV8858_8BIT, 0x382A, 0x01}, /* v_odd_inc */
751         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
752         {OV8858_8BIT, 0x3830, 0x06}, /* Unknown */
753         {OV8858_8BIT, 0x3836, 0x01}, /* Unknown */
754         {OV8858_8BIT, 0x3D85, 0x14}, /* OTP_REG85 */
755         {OV8858_8BIT, 0x3F08, 0x10}, /* PSRAM control register */
756         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
757         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
758         {OV8858_8BIT, 0x4600, 0x01}, /* Unknown */
759         {OV8858_8BIT, 0x4601, 0x97}, /* Unknown */
760         {OV8858_8BIT, 0x4837, 0x14}, /* pclk_period = 0x14 */
761         {OV8858_TOK_TERM, 0, 0}
762 };
763
764 static const struct ov8858_reg ov8858_3276x1848[] = {
765         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
766         {OV8858_8BIT, 0x3778, 0x16}, /* Unknown */
767         {OV8858_8BIT, 0x3800, 0x00}, /* h_crop_start high */
768         {OV8858_8BIT, 0x3801, 0x10}, /* h_crop_start low  0c->10*/
769         {OV8858_8BIT, 0x3802, 0x01}, /* v_crop_start high */
770         {OV8858_8BIT, 0x3803, 0x42}, /* v_crop_start low 3e->42*/
771         {OV8858_8BIT, 0x3804, 0x0C}, /* h_crop_end high */
772         {OV8858_8BIT, 0x3805, 0xD3}, /* h_crop_end low */
773         {OV8858_8BIT, 0x3806, 0x08}, /* v_crop_end high */
774         {OV8858_8BIT, 0x3807, 0x71}, /* v_crop_end low */
775         {OV8858_8BIT, 0x3808, 0x0C}, /* h_output_size high 3276 x 1848 */
776         {OV8858_8BIT, 0x3809, 0xCC}, /* h_output_size low d0->cc*/
777         {OV8858_8BIT, 0x380A, 0x07}, /* v_output_size high */
778         {OV8858_8BIT, 0x380B, 0x38}, /* v_output_size low 3c->38*/
779         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
780         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
781         {OV8858_8BIT, 0x380E, 0x0A}, /* vertical timing size high */
782         {OV8858_8BIT, 0x380F, 0x0D}, /* vertical timing size low */
783         {OV8858_8BIT, 0x3814, 0x01}, /* h_odd_inc */
784         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
785         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
786         {OV8858_8BIT, 0x3821, 0x40}, /* format2 */
787         {OV8858_8BIT, 0x382A, 0x01}, /* v_odd_inc */
788         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
789         {OV8858_8BIT, 0x3830, 0x06}, /* Unknown */
790         {OV8858_8BIT, 0x3836, 0x01}, /* Unknown */
791         {OV8858_8BIT, 0x3D85, 0x14}, /* OTP_REG85 */
792         {OV8858_8BIT, 0x3F08, 0x10}, /* PSRAM control register */
793         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
794         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
795         {OV8858_8BIT, 0x4600, 0x01}, /* Unknown */
796         {OV8858_8BIT, 0x4601, 0x97}, /* Unknown */
797         {OV8858_8BIT, 0x4837, 0x14}, /* pclk_period = 0x14 */
798         {OV8858_TOK_TERM, 0, 0}
799 };
800
801 static const struct ov8858_reg ov8858_6M[] = {
802         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
803         {OV8858_8BIT, 0x3778, 0x16}, /* Unknown */
804         {OV8858_8BIT, 0x3800, 0x00}, /* h_crop_start high */
805         {OV8858_8BIT, 0x3801, 0x0C}, /* h_crop_start low */
806         {OV8858_8BIT, 0x3802, 0x01}, /* v_crop_start high */
807         {OV8858_8BIT, 0x3803, 0x3E}, /* v_crop_start low */
808         {OV8858_8BIT, 0x3804, 0x0C}, /* h_crop_end high */
809         {OV8858_8BIT, 0x3805, 0xD3}, /* h_crop_end low */
810         {OV8858_8BIT, 0x3806, 0x08}, /* v_crop_end high */
811         {OV8858_8BIT, 0x3807, 0x71}, /* v_crop_end low */
812         {OV8858_8BIT, 0x3808, 0x0C}, /* h_output_size high 3280 x 1852 */
813         {OV8858_8BIT, 0x3809, 0xD0}, /* h_output_size low */
814         {OV8858_8BIT, 0x380A, 0x07}, /* v_output_size high */
815         {OV8858_8BIT, 0x380B, 0x3C}, /* v_output_size low */
816         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
817         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
818         {OV8858_8BIT, 0x380E, 0x0A}, /* vertical timing size high */
819         {OV8858_8BIT, 0x380F, 0x0D}, /* vertical timing size low */
820         {OV8858_8BIT, 0x3814, 0x01}, /* h_odd_inc */
821         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
822         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
823         {OV8858_8BIT, 0x3821, 0x40}, /* format2 */
824         {OV8858_8BIT, 0x382A, 0x01}, /* v_odd_inc */
825         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
826         {OV8858_8BIT, 0x3830, 0x06}, /* Unknown */
827         {OV8858_8BIT, 0x3836, 0x01}, /* Unknown */
828         {OV8858_8BIT, 0x3D85, 0x14}, /* OTP_REG85 */
829         {OV8858_8BIT, 0x3F08, 0x10}, /* PSRAM control register */
830         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
831         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
832         {OV8858_8BIT, 0x4600, 0x01}, /* Unknown */
833         {OV8858_8BIT, 0x4601, 0x97}, /* Unknown */
834         {OV8858_8BIT, 0x4837, 0x14}, /* pclk_period = 0x14 */
835         {OV8858_TOK_TERM, 0, 0}
836 };
837
838 static const struct ov8858_reg ov8858_1080P_60[] = {
839         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
840         {OV8858_8BIT, 0x3778, 0x17}, /* Unknown */
841         {OV8858_8BIT, 0x3800, 0x02}, /* h_crop_start high */
842         {OV8858_8BIT, 0x3801, 0x26}, /* h_crop_start low */
843         {OV8858_8BIT, 0x3802, 0x02}, /* v_crop_start high */
844         {OV8858_8BIT, 0x3803, 0x8C}, /* v_crop_start low */
845         {OV8858_8BIT, 0x3804, 0x0A}, /* h_crop_end high */
846         {OV8858_8BIT, 0x3805, 0x9D}, /* h_crop_end low */
847         {OV8858_8BIT, 0x3806, 0x07}, /* v_crop_end high */
848         {OV8858_8BIT, 0x3807, 0x0A}, /* v_crop_end low */
849         {OV8858_8BIT, 0x3808, 0x07}, /* h_output_size high*/
850         {OV8858_8BIT, 0x3809, 0x90}, /* h_output_size low */
851         {OV8858_8BIT, 0x380A, 0x04}, /* v_output_size high */
852         {OV8858_8BIT, 0x380B, 0x48}, /* v_output_size low */
853         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
854         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
855         {OV8858_8BIT, 0x380E, 0x04}, /* vertical timing size high */
856         {OV8858_8BIT, 0x380F, 0xEC}, /* vertical timing size low */
857         {OV8858_8BIT, 0x3814, 0x01}, /* h_odd_inc */
858         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
859         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
860         {OV8858_8BIT, 0x3821, 0x40}, /* format2 */
861         {OV8858_8BIT, 0x382A, 0x01}, /* v_odd_inc */
862         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
863         {OV8858_8BIT, 0x3830, 0x06}, /* Unknown */
864         {OV8858_8BIT, 0x3836, 0x01}, /* Unknown */
865         {OV8858_8BIT, 0x3D85, 0x14}, /* OTP_REG85 */
866         {OV8858_8BIT, 0x3F08, 0x10}, /* PSRAM control register */
867         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
868         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
869         {OV8858_8BIT, 0x4600, 0x00}, /* Unknown */
870         {OV8858_8BIT, 0x4601, 0xef}, /* Unknown */
871         {OV8858_8BIT, 0x4837, 0x16}, /* pclk_period = 0x16 */
872         {OV8858_TOK_TERM, 0, 0}
873 };
874
875 static const struct ov8858_reg ov8858_1080P_30[] = {
876         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
877         {OV8858_8BIT, 0x3778, 0x17}, /* Unknown */
878         {OV8858_8BIT, 0x3800, 0x02}, /* h_crop_start high */
879         {OV8858_8BIT, 0x3801, 0x26}, /* h_crop_start low */
880         {OV8858_8BIT, 0x3802, 0x02}, /* v_crop_start high */
881         {OV8858_8BIT, 0x3803, 0x8C}, /* v_crop_start low */
882         {OV8858_8BIT, 0x3804, 0x0A}, /* h_crop_end high */
883         {OV8858_8BIT, 0x3805, 0x9D}, /* h_crop_end low */
884         {OV8858_8BIT, 0x3806, 0x07}, /* v_crop_end high */
885         {OV8858_8BIT, 0x3807, 0x0A}, /* v_crop_end low */
886         {OV8858_8BIT, 0x3808, 0x07}, /* h_output_size high*/
887         {OV8858_8BIT, 0x3809, 0x90}, /* h_output_size low */
888         {OV8858_8BIT, 0x380A, 0x04}, /* v_output_size high */
889         {OV8858_8BIT, 0x380B, 0x48}, /* v_output_size low */
890         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
891         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
892         {OV8858_8BIT, 0x380E, 0x0A}, /* vertical timing size high */
893         {OV8858_8BIT, 0x380F, 0x0D}, /* vertical timing size low */
894         {OV8858_8BIT, 0x3814, 0x01}, /* h_odd_inc */
895         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
896         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
897         {OV8858_8BIT, 0x3821, 0x40}, /* format2 */
898         {OV8858_8BIT, 0x382A, 0x01}, /* v_odd_inc */
899         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
900         {OV8858_8BIT, 0x3830, 0x06}, /* Unknown */
901         {OV8858_8BIT, 0x3836, 0x01}, /* Unknown */
902         {OV8858_8BIT, 0x3D85, 0x14}, /* OTP_REG85 */
903         {OV8858_8BIT, 0x3F08, 0x10}, /* PSRAM control register */
904         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
905         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
906         {OV8858_8BIT, 0x4600, 0x00}, /* Unknown */
907         {OV8858_8BIT, 0x4601, 0xef}, /* Unknown */
908         {OV8858_8BIT, 0x4837, 0x16}, /* pclk_period = 0x16 */
909         {OV8858_TOK_TERM, 0, 0}
910 };
911
912 static const struct ov8858_reg ov8858_1640x1232[] = {
913         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
914         {OV8858_8BIT, 0x3778, 0x16}, /* Unknown */
915         {OV8858_8BIT, 0x3800, 0x00}, /* h_crop_start high */
916         {OV8858_8BIT, 0x3801, 0x0C}, /* h_crop_start low 12 */
917         {OV8858_8BIT, 0x3802, 0x00}, /* v_crop_start high */
918         {OV8858_8BIT, 0x3803, 0x0C}, /* v_crop_start low */
919         {OV8858_8BIT, 0x3804, 0x0C}, /* h_crop_end high 3283 */
920         {OV8858_8BIT, 0x3805, 0xD3}, /* h_crop_end low */
921         {OV8858_8BIT, 0x3806, 0x09}, /* v_crop_end high */
922         {OV8858_8BIT, 0x3807, 0xA3}, /* v_crop_end low */
923         {OV8858_8BIT, 0x3808, 0x06}, /* h_output_size high 1640 x 1232 */
924         {OV8858_8BIT, 0x3809, 0x68}, /* h_output_size low */
925         {OV8858_8BIT, 0x380A, 0x04}, /* v_output_size high */
926         {OV8858_8BIT, 0x380B, 0xD0}, /* v_output_size low */
927         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
928         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
929         {OV8858_8BIT, 0x380E, 0x09}, /* vertical timing size high */
930         {OV8858_8BIT, 0x380F, 0xAA}, /* vertical timing size low */
931         {OV8858_8BIT, 0x3814, 0x03}, /* h_odd_inc */
932         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
933         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
934         {OV8858_8BIT, 0x3821, 0x67}, /* format2 */
935         {OV8858_8BIT, 0x382A, 0x03}, /* v_odd_inc */
936         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
937         {OV8858_8BIT, 0x3830, 0x08}, /* Unknown */
938         {OV8858_8BIT, 0x3836, 0x02}, /* Unknown */
939         {OV8858_8BIT, 0x3D85, 0x16}, /* OTP_REG85 */
940         {OV8858_8BIT, 0x3F08, 0x08}, /* PSRAM control register */
941         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
942         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
943         {OV8858_8BIT, 0x4600, 0x00}, /* Unknown */
944         {OV8858_8BIT, 0x4601, 0xCB}, /* Unknown */
945         {OV8858_8BIT, 0x4837, 0x14}, /* pclk_period = 0x14 */
946         {OV8858_TOK_TERM, 0, 0}
947 };
948
949 static const struct ov8858_reg ov8858_1640x1096[] = {
950         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
951         {OV8858_8BIT, 0x3778, 0x16}, /* Unknown */
952         {OV8858_8BIT, 0x3800, 0x00}, /* h_crop_start high */
953         {OV8858_8BIT, 0x3801, 0x0C}, /* h_crop_start low 12 */
954         {OV8858_8BIT, 0x3802, 0x00}, /* v_crop_start high */
955         {OV8858_8BIT, 0x3803, 0x0C}, /* v_crop_start low */
956         {OV8858_8BIT, 0x3804, 0x0C}, /* h_crop_end high 3283 */
957         {OV8858_8BIT, 0x3805, 0xD3}, /* h_crop_end low */
958         {OV8858_8BIT, 0x3806, 0x09}, /* v_crop_end high */
959         {OV8858_8BIT, 0x3807, 0xA3}, /* v_crop_end low */
960         {OV8858_8BIT, 0x3808, 0x06}, /* h_output_size high 1640 x 1096 */
961         {OV8858_8BIT, 0x3809, 0x68}, /* h_output_size low */
962         {OV8858_8BIT, 0x380A, 0x04}, /* v_output_size high */
963         {OV8858_8BIT, 0x380B, 0x48}, /* v_output_size low */
964         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
965         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
966         {OV8858_8BIT, 0x380E, 0x09}, /* vertical timing size high */
967         {OV8858_8BIT, 0x380F, 0xAA}, /* vertical timing size low */
968         {OV8858_8BIT, 0x3814, 0x03}, /* h_odd_inc */
969         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
970         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
971         {OV8858_8BIT, 0x3821, 0x67}, /* format2 */
972         {OV8858_8BIT, 0x382A, 0x03}, /* v_odd_inc */
973         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
974         {OV8858_8BIT, 0x3830, 0x08}, /* Unknown */
975         {OV8858_8BIT, 0x3836, 0x02}, /* Unknown */
976         {OV8858_8BIT, 0x3D85, 0x16}, /* OTP_REG85 */
977         {OV8858_8BIT, 0x3F08, 0x08}, /* PSRAM control register */
978         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
979         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
980         {OV8858_8BIT, 0x4600, 0x00}, /* Unknown */
981         {OV8858_8BIT, 0x4601, 0xCB}, /* Unknown */
982         {OV8858_8BIT, 0x4837, 0x14}, /* pclk_period = 0x14 */
983         {OV8858_TOK_TERM, 0, 0}
984 };
985
986
987 static const struct ov8858_reg ov8858_1640x926[] = {
988         {OV8858_8BIT, 0x0100, 0x00}, /* software_standby */
989         {OV8858_8BIT, 0x3778, 0x16}, /* Unknown */
990         {OV8858_8BIT, 0x3800, 0x00}, /* h_crop_start high */
991         {OV8858_8BIT, 0x3801, 0x0C}, /* h_crop_start low */
992         {OV8858_8BIT, 0x3802, 0x00},  /* v_crop_start high */
993         {OV8858_8BIT, 0x3803, 0x0C}, /* v_crop_start low */
994         {OV8858_8BIT, 0x3804, 0x0C}, /* h_crop_end high */
995         {OV8858_8BIT, 0x3805, 0xD3}, /* h_crop_end low */
996         {OV8858_8BIT, 0x3806, 0x09}, /* v_crop_end high */
997         {OV8858_8BIT, 0x3807, 0xA3}, /* v_crop_end low */
998         {OV8858_8BIT, 0x3808, 0x06}, /* h_output_size high 1640 x 926 */
999         {OV8858_8BIT, 0x3809, 0x68}, /* h_output_size low */
1000         {OV8858_8BIT, 0x380A, 0x03}, /* v_output_size high */
1001         {OV8858_8BIT, 0x380B, 0x9E}, /* v_output_size low */
1002         {OV8858_8BIT, 0x380C, 0x07}, /* horizontal timing size high */
1003         {OV8858_8BIT, 0x380D, 0x94}, /* horizontal timing size low */
1004         {OV8858_8BIT, 0x380E, 0x09}, /* vertical timing size high */
1005         {OV8858_8BIT, 0x380F, 0xAA}, /* vertical timing size low */
1006         {OV8858_8BIT, 0x3814, 0x03}, /* h_odd_inc */
1007         {OV8858_8BIT, 0x3815, 0x01}, /* h_even_inc */
1008         {OV8858_8BIT, 0x3820, 0x00}, /* format1 */
1009         {OV8858_8BIT, 0x3821, 0x67}, /* format2 */
1010         {OV8858_8BIT, 0x382A, 0x03}, /* v_odd_inc */
1011         {OV8858_8BIT, 0x382B, 0x01}, /* v_even_inc */
1012         {OV8858_8BIT, 0x3830, 0x08}, /* Unknown */
1013         {OV8858_8BIT, 0x3836, 0x02}, /* Unknown */
1014         {OV8858_8BIT, 0x3D85, 0x16}, /* OTP_REG85 */
1015         {OV8858_8BIT, 0x3F08, 0x08}, /* PSRAM control register */
1016         {OV8858_8BIT, 0x4034, 0x3F}, /* Unknown */
1017         {OV8858_8BIT, 0x403D, 0x04}, /* BLC CTRL3D */
1018         {OV8858_8BIT, 0x4600, 0x00}, /* Unknown */
1019         {OV8858_8BIT, 0x4601, 0xCB}, /* Unknown */
1020         {OV8858_8BIT, 0x4837, 0x14}, /* pclk_period = 0x14 */
1021         {OV8858_TOK_TERM, 0, 0}
1022 };
1023
1024 static struct ov8858_resolution ov8858_res_preview[] = {
1025         {
1026                 .desc = "ov8858_1640x926_PREVIEW",
1027                 .width = 1640,
1028                 .height = 926,
1029                 .used = 0,
1030                 .regs = ov8858_1640x926,
1031                 .bin_factor_x = 0,
1032                 .bin_factor_y = 0,
1033                 .skip_frames = 0,
1034                 .fps_options = {
1035                         {
1036                                 .fps = 30,
1037                                 .pixels_per_line = 3880,
1038                                 .lines_per_frame = 2573,
1039                         },
1040                         {
1041                         }
1042                 },
1043         },
1044         {
1045                 .desc = "ov8858_1640x1232_PREVIEW",
1046                 .width = 1640,
1047                 .height = 1232,
1048                 .used = 0,
1049                 .regs = ov8858_1640x1232,
1050                 .bin_factor_x = 0,
1051                 .bin_factor_y = 0,
1052                 .skip_frames = 0,
1053                 .fps_options = {
1054                         {
1055                                 .fps = 30,
1056                                 .pixels_per_line = 3880,
1057                                 .lines_per_frame = 2573,
1058                         },
1059                         {
1060                         }
1061                 },
1062         },
1063         {
1064                 .desc = "ov8858_1936x1096_PREVIEW",
1065                 .width = 1936,
1066                 .height = 1096,
1067                 .used = 0,
1068                 .regs = ov8858_1080P_30,
1069                 .bin_factor_x = 0,
1070                 .bin_factor_y = 0,
1071                 .skip_frames = 0,
1072                 .fps_options = {
1073                         {
1074                                 .fps = 30,
1075                                 .pixels_per_line = 3880,
1076                                 .lines_per_frame = 2573,
1077                         },
1078                         {
1079                         }
1080                 },
1081         },
1082         {
1083                 .desc = "ov8858_3276x1848_PREVIEW",
1084                 .width = 3276,
1085                 .height = 1848,
1086                 .used = 0,
1087                 .regs = ov8858_3276x1848,
1088                 .bin_factor_x = 0,
1089                 .bin_factor_y = 0,
1090                 .skip_frames = 0,
1091                 .fps_options = {
1092                         {
1093                                 .fps = 30,
1094                                 .pixels_per_line = 3880,
1095                                 .lines_per_frame = 2573,
1096                         },
1097                         {
1098                         }
1099                 },
1100         },
1101         {
1102                 .desc = "ov8858_8M_PREVIEW",
1103                 .width = 3280,
1104                 .height = 2464,
1105                 .used = 0,
1106                 .regs = ov8858_8M,
1107                 .bin_factor_x = 0,
1108                 .bin_factor_y = 0,
1109                 .skip_frames = 0,
1110                 .fps_options = {
1111                         {
1112                                 .fps = 30,
1113                                 .pixels_per_line = 3880,
1114                                 .lines_per_frame = 2573,
1115                         },
1116                         {
1117                         }
1118                 },
1119         },
1120 };
1121
1122 static struct ov8858_resolution ov8858_res_still[] = {
1123         {
1124                 .desc = "ov8858_1640x1232_STILL",
1125                 .width = 1640,
1126                 .height = 1232,
1127                 .used = 0,
1128                 .regs = ov8858_1640x1232,
1129                 .bin_factor_x = 0,
1130                 .bin_factor_y = 0,
1131                 .skip_frames = 0,
1132                 .fps_options = {
1133                         {
1134                                 .fps = 30,
1135                                 .pixels_per_line = 3880,
1136                                 .lines_per_frame = 2573,
1137                         },
1138                         {
1139                         }
1140                 },
1141         },
1142         {
1143                 .desc = "ov8858_1640x926_STILL",
1144                 .width = 1640,
1145                 .height = 926,
1146                 .used = 0,
1147                 .regs = ov8858_1640x926,
1148                 .bin_factor_x = 0,
1149                 .bin_factor_y = 0,
1150                 .skip_frames = 1,
1151                 .fps_options = {
1152                         {
1153                                 .fps = 30,
1154                                 .pixels_per_line = 3880,
1155                                 .lines_per_frame = 2573,
1156                         },
1157                         {
1158                         }
1159                 },
1160         },
1161         {
1162                 .desc = "ov8858_3276X1848_STILL",
1163                 .width = 3276,
1164                 .height = 1848,
1165                 .used = 0,
1166                 .regs = ov8858_3276x1848,
1167                 .bin_factor_x = 0,
1168                 .bin_factor_y = 0,
1169                 .skip_frames = 1,
1170                 .fps_options =  {
1171                         {
1172                                 .fps = 30,
1173                                 .pixels_per_line = 3880,
1174                                 .lines_per_frame = 2573,
1175                         },
1176                         {
1177                         }
1178                 },
1179         },
1180         {
1181                 .desc = "ov8858_8M_STILL",
1182                 .width = 3280,
1183                 .height = 2464,
1184                 .used = 0,
1185                 .regs = ov8858_8M,
1186                 .bin_factor_x = 0,
1187                 .bin_factor_y = 0,
1188                 .skip_frames = 1,
1189                 .fps_options = {
1190                         {
1191                                 /* Pixel clock: 149.76MHZ */
1192                                 .fps = 10,
1193                                 .pixels_per_line = 3880,
1194                                 .lines_per_frame = 3859,
1195                         },
1196                         {
1197                         }
1198                 },
1199         },
1200 };
1201
1202 static struct ov8858_resolution ov8858_res_video[] = {
1203         {
1204                 .desc = "ov8858_1640x926_VIDEO",
1205                 .width = 1640,
1206                 .height = 926,
1207                 .used = 0,
1208                 .regs = ov8858_1640x926,
1209                 .bin_factor_x = 0,
1210                 .bin_factor_y = 0,
1211                 .skip_frames = 1,
1212                 .fps_options = {
1213                         {
1214                                 .fps = 30,
1215                                 .pixels_per_line = 3880,
1216                                 .lines_per_frame = 2573,
1217                         },
1218                         {
1219                         }
1220                 },
1221         },
1222         {
1223                 .desc = "ov8858_1640x1232_VIDEO",
1224                 .width = 1640,
1225                 .height = 1232,
1226                 .used = 0,
1227                 .regs = ov8858_1640x1232,
1228                 .bin_factor_x = 0,
1229                 .bin_factor_y = 0,
1230                 .skip_frames = 1,
1231                 .fps_options = {
1232                         {
1233                                 .fps = 30,
1234                                 .pixels_per_line = 3880,
1235                                 .lines_per_frame = 2573,
1236                         },
1237                         {
1238                         }
1239                 },
1240         },
1241         {
1242                 .desc = "ov8858_1640x1096_VIDEO",
1243                 .width = 1640,
1244                 .height = 1096,
1245                 .used = 0,
1246                 .regs = ov8858_1640x1096,
1247                 .bin_factor_x = 0,
1248                 .bin_factor_y = 0,
1249                 .skip_frames = 1,
1250                 .fps_options = {
1251                         {
1252                                 .fps = 30,
1253                                 .pixels_per_line = 3880,
1254                                 .lines_per_frame = 2573,
1255                         },
1256                         {
1257                         }
1258                 },
1259         },
1260     {
1261                 .desc = "ov8858_1080P_30_VIDEO",
1262                 .width = 1936,
1263                 .height = 1096,
1264                 .used = 0,
1265                 .regs = ov8858_1080P_30,
1266                 .bin_factor_x = 0,
1267                 .bin_factor_y = 0,
1268                 .skip_frames = 1,
1269                 .fps_options = {
1270                         {
1271                                 .fps = 30,
1272                                 .pixels_per_line = 3880,
1273                                 .lines_per_frame = 2573,
1274                         },
1275                         {
1276                         }
1277                 },
1278         },
1279 };
1280
1281 #endif /* __OV8858_H__ */