drivers/staging/media/atomisp/i2c/ov2680.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Support for OmniVision OV2680 5M camera sensor.
   4  *
   5  * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License version
   9  * 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  *
  17  */
  18
  19 #ifndef __OV2680_H__
  20 #define __OV2680_H__
  21 #include <linux/kernel.h>
  22 #include <linux/types.h>
  23 #include <linux/i2c.h>
  24 #include <linux/delay.h>
  25 #include <linux/videodev2.h>
  26 #include <linux/spinlock.h>
  27 #include <media/v4l2-subdev.h>
  28 #include <media/v4l2-device.h>
  29 #include <media/v4l2-ctrls.h>
  30 #include <linux/v4l2-mediabus.h>
  31 #include <media/media-entity.h>
  32
  33 #include "../include/linux/atomisp_platform.h"
  34
  35 /* Defines for register writes and register array processing */
  36 #define I2C_MSG_LENGTH          0x2
  37 #define I2C_RETRY_COUNT         5
  38
  39 #define OV2680_FOCAL_LENGTH_NUM 334     /*3.34mm*/
  40 #define OV2680_FOCAL_LENGTH_DEM 100
  41 #define OV2680_F_NUMBER_DEFAULT_NUM     24
  42 #define OV2680_F_NUMBER_DEM     10
  43
  44 #define OV2680_BIN_FACTOR_MAX 4
  45
  46 #define MAX_FMTS                1
  47
  48 /* sensor_mode_data read_mode adaptation */
  49 #define OV2680_READ_MODE_BINNING_ON     0x0400
  50 #define OV2680_READ_MODE_BINNING_OFF    0x00
  51 #define OV2680_INTEGRATION_TIME_MARGIN  8
  52
  53 #define OV2680_MAX_EXPOSURE_VALUE       0xFFF1
  54 #define OV2680_MAX_GAIN_VALUE           0xFF
  55
  56 /*
  57  * focal length bits definition:
  58  * bits 31-16: numerator, bits 15-0: denominator
  59  */
  60 #define OV2680_FOCAL_LENGTH_DEFAULT 0x1B70064
  61
  62 /*
  63  * current f-number bits definition:
  64  * bits 31-16: numerator, bits 15-0: denominator
  65  */
  66 #define OV2680_F_NUMBER_DEFAULT 0x18000a
  67
  68 /*
  69  * f-number range bits definition:
  70  * bits 31-24: max f-number numerator
  71  * bits 23-16: max f-number denominator
  72  * bits 15-8: min f-number numerator
  73  * bits 7-0: min f-number denominator
  74  */
  75 #define OV2680_F_NUMBER_RANGE 0x180a180a
  76 #define OV2680_ID       0x2680
  77
  78 #define OV2680_FINE_INTG_TIME_MIN 0
  79 #define OV2680_FINE_INTG_TIME_MAX_MARGIN 0
  80 #define OV2680_COARSE_INTG_TIME_MIN 1
  81 #define OV2680_COARSE_INTG_TIME_MAX_MARGIN 6
  82
  83 /*
  84  * OV2680 System control registers
  85  */
  86 #define OV2680_SW_SLEEP                         0x0100
  87 #define OV2680_SW_RESET                         0x0103
  88 #define OV2680_SW_STREAM                        0x0100
  89
  90 #define OV2680_SC_CMMN_CHIP_ID_H                0x300A
  91 #define OV2680_SC_CMMN_CHIP_ID_L                0x300B
  92 #define OV2680_SC_CMMN_SCCB_ID                  0x302B /* 0x300C*/
  93 #define OV2680_SC_CMMN_SUB_ID                   0x302A /* process, version*/
  94
  95 #define OV2680_GROUP_ACCESS                                                     0x3208 /*Bit[7:4] Group control, Bit[3:0] Group ID*/
  96
  97 #define OV2680_EXPOSURE_H                                                       0x3500 /*Bit[3:0] Bit[19:16] of exposure, remaining 16 bits lies in Reg0x3501&Reg0x3502*/
  98 #define OV2680_EXPOSURE_M                                                       0x3501
  99 #define OV2680_EXPOSURE_L                                                       0x3502
 100 #define OV2680_AGC_H                                                            0x350A /*Bit[1:0] means Bit[9:8] of gain*/
 101 #define OV2680_AGC_L                                                            0x350B /*Bit[7:0] of gain*/
 102
 103 #define OV2680_HORIZONTAL_START_H                                       0x3800 /*Bit[11:8]*/
 104 #define OV2680_HORIZONTAL_START_L                                       0x3801 /*Bit[7:0]*/
 105 #define OV2680_VERTICAL_START_H                                         0x3802 /*Bit[11:8]*/
 106 #define OV2680_VERTICAL_START_L                                         0x3803 /*Bit[7:0]*/
 107 #define OV2680_HORIZONTAL_END_H                                         0x3804 /*Bit[11:8]*/
 108 #define OV2680_HORIZONTAL_END_L                                         0x3805 /*Bit[7:0]*/
 109 #define OV2680_VERTICAL_END_H                                           0x3806 /*Bit[11:8]*/
 110 #define OV2680_VERTICAL_END_L                                           0x3807 /*Bit[7:0]*/
 111 #define OV2680_HORIZONTAL_OUTPUT_SIZE_H                         0x3808 /*Bit[3:0]*/
 112 #define OV2680_HORIZONTAL_OUTPUT_SIZE_L                         0x3809 /*Bit[7:0]*/
 113 #define OV2680_VERTICAL_OUTPUT_SIZE_H                           0x380a /*Bit[3:0]*/
 114 #define OV2680_VERTICAL_OUTPUT_SIZE_L                           0x380b /*Bit[7:0]*/
 115 #define OV2680_TIMING_HTS_H                                                     0x380C  /*High 8-bit, and low 8-bit HTS address is 0x380d*/
 116 #define OV2680_TIMING_HTS_L                                                     0x380D  /*High 8-bit, and low 8-bit HTS address is 0x380d*/
 117 #define OV2680_TIMING_VTS_H                                                     0x380e  /*High 8-bit, and low 8-bit HTS address is 0x380f*/
 118 #define OV2680_TIMING_VTS_L                                                     0x380f  /*High 8-bit, and low 8-bit HTS address is 0x380f*/
 119 #define OV2680_FRAME_OFF_NUM                                            0x4202
 120
 121 /*Flip/Mirror*/
 122 #define OV2680_FLIP_REG                         0x3820
 123 #define OV2680_MIRROR_REG                       0x3821
 124 #define OV2680_FLIP_BIT                         1
 125 #define OV2680_MIRROR_BIT                       2
 126 #define OV2680_FLIP_MIRROR_BIT_ENABLE           4
 127
 128 #define OV2680_MWB_RED_GAIN_H                   0x5004/*0x3400*/
 129 #define OV2680_MWB_GREEN_GAIN_H                 0x5006/*0x3402*/
 130 #define OV2680_MWB_BLUE_GAIN_H                  0x5008/*0x3404*/
 131 #define OV2680_MWB_GAIN_MAX                             0x0fff
 132
 133 #define OV2680_START_STREAMING                  0x01
 134 #define OV2680_STOP_STREAMING                   0x00
 135
 136 #define OV2680_INVALID_CONFIG   0xffffffff
 137
 138 struct regval_list {
 139         u16 reg_num;
 140         u8 value;
 141 };
 142
 143 struct ov2680_resolution {
 144         const struct ov2680_reg *regs;
 145         int res;
 146         int width;
 147         int height;
 148         int fps;
 149         int pix_clk_freq;
 150         u32 skip_frames;
 151         u16 pixels_per_line;
 152         u16 lines_per_frame;
 153         u8 bin_factor_x;
 154         u8 bin_factor_y;
 155         u8 bin_mode;
 156 };
 157
 158 struct ov2680_format {
 159         u8 *desc;
 160         u32 pixelformat;
 161         struct ov2680_reg *regs;
 162 };
 163
 164 /*
 165  * ov2680 device structure.
 166  */
 167 struct ov2680_device {
 168         struct v4l2_subdev sd;
 169         struct media_pad pad;
 170         struct mutex input_lock;
 171         struct v4l2_ctrl_handler ctrl_handler;
 172         struct ov2680_resolution *res;
 173         struct camera_sensor_platform_data *platform_data;
 174         bool power_on;
 175         u16 exposure;
 176         u16 gain;
 177         u16 digitgain;
 178 };
 179
 180 /**
 181  * struct ov2680_reg - MI sensor  register format
 182  * @type: type of the register
 183  * @reg: 16-bit offset to register
 184  * @val: 8/16/32-bit register value
 185  *
 186  * Define a structure for sensor register initialization values
 187  */
 188 struct ov2680_reg {
 189         u16 reg;
 190         u32 val;        /* @set value for read/mod/write, @mask */
 191 };
 192
 193 #define to_ov2680_sensor(x) container_of(x, struct ov2680_device, sd)
 194
 195 #define OV2680_MAX_WRITE_BUF_SIZE       30
 196
 197 struct ov2680_write_buffer {
 198         u16 addr;
 199         u8 data[OV2680_MAX_WRITE_BUF_SIZE];
 200 };
 201
 202 struct ov2680_write_ctrl {
 203         int index;
 204         struct ov2680_write_buffer buffer;
 205 };
 206
 207 static struct ov2680_reg const ov2680_global_setting[] = {
 208         {0x0103, 0x01},
 209         {0x3002, 0x00},
 210         {0x3016, 0x1c},
 211         {0x3018, 0x44},
 212         {0x3020, 0x00},
 213         {0x3080, 0x02},
 214         {0x3082, 0x45},
 215         {0x3084, 0x09},
 216         {0x3085, 0x04},
 217         {0x3503, 0x03},
 218         {0x350b, 0x36},
 219         {0x3600, 0xb4},
 220         {0x3603, 0x39},
 221         {0x3604, 0x24},
 222         {0x3605, 0x00},
 223         {0x3620, 0x26},
 224         {0x3621, 0x37},
 225         {0x3622, 0x04},
 226         {0x3628, 0x00},
 227         {0x3705, 0x3c},
 228         {0x370c, 0x50},
 229         {0x370d, 0xc0},
 230         {0x3718, 0x88},
 231         {0x3720, 0x00},
 232         {0x3721, 0x00},
 233         {0x3722, 0x00},
 234         {0x3723, 0x00},
 235         {0x3738, 0x00},
 236         {0x3717, 0x58},
 237         {0x3781, 0x80},
 238         {0x3789, 0x60},
 239         {0x3800, 0x00},
 240         {0x3819, 0x04},
 241         {0x4000, 0x81},
 242         {0x4001, 0x40},
 243         {0x4602, 0x02},
 244         {0x481f, 0x36},
 245         {0x4825, 0x36},
 246         {0x4837, 0x18},
 247         {0x5002, 0x30},
 248         {0x5004, 0x04},//manual awb 1x
 249         {0x5005, 0x00},
 250         {0x5006, 0x04},
 251         {0x5007, 0x00},
 252         {0x5008, 0x04},
 253         {0x5009, 0x00},
 254         {0x5080, 0x00},
 255         {0x3701, 0x64},  //add on 14/05/13
 256         {0x3784, 0x0c},  //based OV2680_R1A_AM10.ovt add on 14/06/13
 257         {0x5780, 0x3e},  //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13
 258         {0x5781, 0x0f},
 259         {0x5782, 0x04},
 260         {0x5783, 0x02},
 261         {0x5784, 0x01},
 262         {0x5785, 0x01},
 263         {0x5786, 0x00},
 264         {0x5787, 0x04},
 265         {0x5788, 0x02},
 266         {0x5789, 0x00},
 267         {0x578a, 0x01},
 268         {0x578b, 0x02},
 269         {0x578c, 0x03},
 270         {0x578d, 0x03},
 271         {0x578e, 0x08},
 272         {0x578f, 0x0c},
 273         {0x5790, 0x08},
 274         {0x5791, 0x04},
 275         {0x5792, 0x00},
 276         {0x5793, 0x00},
 277         {0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13
 278         {0x0100, 0x00}, //stream off
 279
 280         {}
 281 };
 282
 283 /*
 284  * 176x144 30fps  VBlanking 1lane 10Bit (binning)
 285  */
 286 static struct ov2680_reg const ov2680_QCIF_30fps[] = {
 287         {0x3086, 0x01},
 288         {0x370a, 0x23},
 289         {0x3801, 0xa0},
 290         {0x3802, 0x00},
 291         {0x3803, 0x78},
 292         {0x3804, 0x05},
 293         {0x3805, 0xaf},
 294         {0x3806, 0x04},
 295         {0x3807, 0x47},
 296         {0x3808, 0x00},
 297         {0x3809, 0xC0},
 298         {0x380a, 0x00},
 299         {0x380b, 0xa0},
 300         {0x380c, 0x06},
 301         {0x380d, 0xb0},
 302         {0x3810, 0x00},
 303         {0x3811, 0x04},
 304         {0x3812, 0x00},
 305         {0x3813, 0x04},
 306         {0x3814, 0x31},
 307         {0x3815, 0x31},
 308         {0x4000, 0x81},
 309         {0x4001, 0x40},
 310         {0x4008, 0x00},
 311         {0x4009, 0x03},
 312         {0x5081, 0x41},
 313         {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
 314         {0x5704, 0x10},
 315         {0x5705, 0xa0},
 316         {0x5706, 0x0c},
 317         {0x5707, 0x78},
 318         {0x3820, 0xc2},
 319         {0x3821, 0x01},
 320         // {0x5090, 0x0c},
 321         {}
 322 };
 323
 324 /*
 325  * 352x288 30fps  VBlanking 1lane 10Bit (binning)
 326  */
 327 static struct ov2680_reg const ov2680_CIF_30fps[] = {
 328         {0x3086, 0x01},
 329         {0x370a, 0x23},
 330         {0x3801, 0xa0},
 331         {0x3802, 0x00},
 332         {0x3803, 0x78},
 333         {0x3804, 0x03},
 334         {0x3805, 0x8f},
 335         {0x3806, 0x02},
 336         {0x3807, 0xe7},
 337         {0x3808, 0x01},
 338         {0x3809, 0x70},
 339         {0x380a, 0x01},
 340         {0x380b, 0x30},
 341         {0x380c, 0x06},
 342         {0x380d, 0xb0},
 343         {0x3810, 0x00},
 344         {0x3811, 0x04},
 345         {0x3812, 0x00},
 346         {0x3813, 0x04},
 347         {0x3814, 0x31},
 348         {0x3815, 0x31},
 349         {0x4008, 0x00},
 350         {0x4009, 0x03},
 351         {0x5081, 0x41},
 352         {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
 353         {0x5704, 0x10},
 354         {0x5705, 0xa0},
 355         {0x5706, 0x0c},
 356         {0x5707, 0x78},
 357         {0x3820, 0xc2},
 358         {0x3821, 0x01},
 359         // {0x5090, 0x0c},
 360         {}
 361 };
 362
 363 /*
 364  * 336x256 30fps  VBlanking 1lane 10Bit (binning)
 365  */
 366 static struct ov2680_reg const ov2680_QVGA_30fps[] = {
 367         {0x3086, 0x01},
 368         {0x370a, 0x23},
 369         {0x3801, 0xa0},
 370         {0x3802, 0x00},
 371         {0x3803, 0x78},
 372         {0x3804, 0x03},
 373         {0x3805, 0x4f},
 374         {0x3806, 0x02},
 375         {0x3807, 0x87},
 376         {0x3808, 0x01},
 377         {0x3809, 0x50},
 378         {0x380a, 0x01},
 379         {0x380b, 0x00},
 380         {0x380c, 0x06},
 381         {0x380d, 0xb0},
 382         {0x3810, 0x00},
 383         {0x3811, 0x04},
 384         {0x3812, 0x00},
 385         {0x3813, 0x04},
 386         {0x3814, 0x31},
 387         {0x3815, 0x31},
 388         {0x4008, 0x00},
 389         {0x4009, 0x03},
 390         {0x5081, 0x41},
 391         {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
 392         {0x5704, 0x10},
 393         {0x5705, 0xa0},
 394         {0x5706, 0x0c},
 395         {0x5707, 0x78},
 396         {0x3820, 0xc2},
 397         {0x3821, 0x01},
 398         // {0x5090, 0x0c},
 399         {}
 400 };
 401
 402 /*
 403  * 656x496 30fps  VBlanking 1lane 10Bit (binning)
 404  */
 405 static struct ov2680_reg const ov2680_656x496_30fps[] = {
 406         {0x3086, 0x01},
 407         {0x370a, 0x23},
 408         {0x3801, 0xa0},
 409         {0x3802, 0x00},
 410         {0x3803, 0x78},
 411         {0x3804, 0x05},
 412         {0x3805, 0xcf},
 413         {0x3806, 0x04},
 414         {0x3807, 0x67},
 415         {0x3808, 0x02},
 416         {0x3809, 0x90},
 417         {0x380a, 0x01},
 418         {0x380b, 0xf0},
 419         {0x380c, 0x06},
 420         {0x380d, 0xb0},
 421         {0x3810, 0x00},
 422         {0x3811, 0x04},
 423         {0x3812, 0x00},
 424         {0x3813, 0x04},
 425         {0x3814, 0x31},
 426         {0x3815, 0x31},
 427         {0x4008, 0x00},
 428         {0x4009, 0x03},
 429         {0x5081, 0x41},
 430         {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
 431         {0x5704, 0x10},
 432         {0x5705, 0xa0},
 433         {0x5706, 0x0c},
 434         {0x5707, 0x78},
 435         {0x3820, 0xc2},
 436         {0x3821, 0x01},
 437         // {0x5090, 0x0c},
 438         {}
 439 };
 440
 441 /*
 442  * 720x592 30fps  VBlanking 1lane 10Bit (binning)
 443  */
 444 static struct ov2680_reg const ov2680_720x592_30fps[] = {
 445         {0x3086, 0x01},
 446         {0x370a, 0x23},
 447         {0x3801, 0x00}, // X_ADDR_START;
 448         {0x3802, 0x00},
 449         {0x3803, 0x00}, // Y_ADDR_START;
 450         {0x3804, 0x05},
 451         {0x3805, 0xaf}, // X_ADDR_END;
 452         {0x3806, 0x04},
 453         {0x3807, 0xaf}, // Y_ADDR_END;
 454         {0x3808, 0x02},
 455         {0x3809, 0xd0}, // X_OUTPUT_SIZE;
 456         {0x380a, 0x02},
 457         {0x380b, 0x50}, // Y_OUTPUT_SIZE;
 458         {0x380c, 0x06},
 459         {0x380d, 0xac}, // HTS;
 460         {0x3810, 0x00},
 461         {0x3811, 0x00},
 462         {0x3812, 0x00},
 463         {0x3813, 0x00},
 464         {0x3814, 0x31},
 465         {0x3815, 0x31},
 466         {0x4008, 0x00},
 467         {0x4009, 0x03},
 468         {0x5708, 0x00},
 469         {0x5704, 0x02},
 470         {0x5705, 0xd0}, // X_WIN;
 471         {0x5706, 0x02},
 472         {0x5707, 0x50}, // Y_WIN;
 473         {0x3820, 0xc2}, // FLIP_FORMAT;
 474         {0x3821, 0x01}, // MIRROR_FORMAT;
 475         {0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C;
 476         // BIT[3]: Mirror order, BG or GB;
 477         // BIT[2]: Flip order, BR or RB;
 478         {0x5081, 0x41},
 479         {}
 480 };
 481
 482 /*
 483  * 800x600 30fps  VBlanking 1lane 10Bit (binning)
 484  */
 485 static struct ov2680_reg const ov2680_800x600_30fps[] = {
 486         {0x3086, 0x01},
 487         {0x370a, 0x23},
 488         {0x3801, 0x00},
 489         {0x3802, 0x00},
 490         {0x3803, 0x00},
 491         {0x3804, 0x06},
 492         {0x3805, 0x4f},
 493         {0x3806, 0x04},
 494         {0x3807, 0xbf},
 495         {0x3808, 0x03},
 496         {0x3809, 0x20},
 497         {0x380a, 0x02},
 498         {0x380b, 0x58},
 499         {0x380c, 0x06},
 500         {0x380d, 0xac},
 501         {0x3810, 0x00},
 502         {0x3811, 0x00},
 503         {0x3812, 0x00},
 504         {0x3813, 0x00},
 505         {0x3814, 0x31},
 506         {0x3815, 0x31},
 507         {0x5708, 0x00},
 508         {0x5704, 0x03},
 509         {0x5705, 0x20},
 510         {0x5706, 0x02},
 511         {0x5707, 0x58},
 512         {0x3820, 0xc2},
 513         {0x3821, 0x01},
 514         {0x5090, 0x00},
 515         {0x4008, 0x00},
 516         {0x4009, 0x03},
 517         {0x5081, 0x41},
 518         {}
 519 };
 520
 521 /*
 522  * 720p=1280*720 30fps  VBlanking 1lane 10Bit (no-Scaling)
 523  */
 524 static struct ov2680_reg const ov2680_720p_30fps[] = {
 525         {0x3086, 0x00},
 526         {0x370a, 0x21},
 527         {0x3801, 0xa0},
 528         {0x3802, 0x00},
 529         {0x3803, 0xf2},
 530         {0x3804, 0x05},
 531         {0x3805, 0xbf},
 532         {0x3806, 0x03},
 533         {0x3807, 0xdd},
 534         {0x3808, 0x05},
 535         {0x3809, 0x10},
 536         {0x380a, 0x02},
 537         {0x380b, 0xe0},
 538         {0x380c, 0x06},
 539         {0x380d, 0xa8},
 540         {0x3810, 0x00},
 541         {0x3811, 0x08},
 542         {0x3812, 0x00},
 543         {0x3813, 0x06},
 544         {0x3814, 0x11},
 545         {0x3815, 0x11},
 546         {0x4008, 0x02},
 547         {0x4009, 0x09},
 548         {0x5081, 0x41},
 549         {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
 550         {0x5704, 0x10},
 551         {0x5705, 0xa0},
 552         {0x5706, 0x0c},
 553         {0x5707, 0x78},
 554         {0x3820, 0xc0},
 555         {0x3821, 0x00},
 556         // {0x5090, 0x0c},
 557         {}
 558 };
 559
 560 /*
 561  * 1296x976 30fps  VBlanking 1lane 10Bit(no-scaling)
 562  */
 563 static struct ov2680_reg const ov2680_1296x976_30fps[] = {
 564         {0x3086, 0x00},
 565         {0x370a, 0x21},
 566         {0x3801, 0xa0},
 567         {0x3802, 0x00},
 568         {0x3803, 0x78},
 569         {0x3804, 0x05},
 570         {0x3805, 0xbf},
 571         {0x3806, 0x04},
 572         {0x3807, 0x57},
 573         {0x3808, 0x05},
 574         {0x3809, 0x10},
 575         {0x380a, 0x03},
 576         {0x380b, 0xd0},
 577         {0x380c, 0x06},
 578         {0x380d, 0xa8},
 579         {0x3810, 0x00},
 580         {0x3811, 0x08},
 581         {0x3812, 0x00},
 582         {0x3813, 0x08},
 583         {0x3814, 0x11},
 584         {0x3815, 0x11},
 585         {0x4008, 0x02},
 586         {0x4009, 0x09},
 587         {0x5081, 0x41},
 588         {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
 589         {0x5704, 0x10},
 590         {0x5705, 0xa0},
 591         {0x5706, 0x0c},
 592         {0x5707, 0x78},
 593         {0x3820, 0xc0},
 594         {0x3821, 0x00}, //mirror/flip
 595         // {0x5090, 0x0c},
 596         {}
 597 };
 598
 599 /*
 600  *   1456*1096 30fps  VBlanking 1lane 10bit(no-scaling)
 601  */
 602 static struct ov2680_reg const ov2680_1456x1096_30fps[] = {
 603         {0x3086, 0x00},
 604         {0x370a, 0x21},
 605         {0x3801, 0x90},
 606         {0x3802, 0x00},
 607         {0x3803, 0x78},
 608         {0x3804, 0x06},
 609         {0x3805, 0x4f},
 610         {0x3806, 0x04},
 611         {0x3807, 0xC0},
 612         {0x3808, 0x05},
 613         {0x3809, 0xb0},
 614         {0x380a, 0x04},
 615         {0x380b, 0x48},
 616         {0x380c, 0x06},
 617         {0x380d, 0xa8},
 618         {0x3810, 0x00},
 619         {0x3811, 0x08},
 620         {0x3812, 0x00},
 621         {0x3813, 0x00},
 622         {0x3814, 0x11},
 623         {0x3815, 0x11},
 624         {0x4008, 0x02},
 625         {0x4009, 0x09},
 626         {0x5081, 0x41},
 627         {0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11
 628         {0x5704, 0x10},
 629         {0x5705, 0xa0},
 630         {0x5706, 0x0c},
 631         {0x5707, 0x78},
 632         {0x3820, 0xc0},
 633         {0x3821, 0x00},
 634         // {0x5090, 0x0c},
 635         {}
 636 };
 637
 638 /*
 639  *1616x916  30fps  VBlanking 1lane 10bit
 640  */
 641
 642 static struct ov2680_reg const ov2680_1616x916_30fps[] = {
 643         {0x3086, 0x00},
 644         {0x370a, 0x21},
 645         {0x3801, 0x00},
 646         {0x3802, 0x00},
 647         {0x3803, 0x96},
 648         {0x3804, 0x06},
 649         {0x3805, 0x4f},
 650         {0x3806, 0x04},
 651         {0x3807, 0x39},
 652         {0x3808, 0x06},
 653         {0x3809, 0x50},
 654         {0x380a, 0x03},
 655         {0x380b, 0x94},
 656         {0x380c, 0x06},
 657         {0x380d, 0xa8},
 658         {0x3810, 0x00},
 659         {0x3811, 0x00},
 660         {0x3812, 0x00},
 661         {0x3813, 0x08},
 662         {0x3814, 0x11},
 663         {0x3815, 0x11},
 664         {0x4008, 0x02},
 665         {0x4009, 0x09},
 666         {0x5081, 0x41},
 667         {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11
 668         {0x5704, 0x06},
 669         {0x5705, 0x50},
 670         {0x5706, 0x03},
 671         {0x5707, 0x94},
 672         {0x3820, 0xc0},
 673         {0x3821, 0x00},
 674         // {0x5090, 0x0C},
 675         {}
 676 };
 677
 678 /*
 679  * 1616x1082 30fps VBlanking 1lane 10Bit
 680  */
 681 static struct ov2680_reg const ov2680_1616x1082_30fps[] = {
 682         {0x3086, 0x00},
 683         {0x370a, 0x21},
 684         {0x3801, 0x00},
 685         {0x3802, 0x00},
 686         {0x3803, 0x86},
 687         {0x3804, 0x06},
 688         {0x3805, 0x4f},
 689         {0x3806, 0x04},
 690         {0x3807, 0xbf},
 691         {0x3808, 0x06},
 692         {0x3809, 0x50},
 693         {0x380a, 0x04},
 694         {0x380b, 0x3a},
 695         {0x380c, 0x06},
 696         {0x380d, 0xa8},
 697         {0x3810, 0x00},
 698         {0x3811, 0x00},
 699         {0x3812, 0x00},
 700         {0x3813, 0x00},
 701         {0x3814, 0x11},
 702         {0x3815, 0x11},
 703         {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11
 704         {0x5704, 0x06},
 705         {0x5705, 0x50},
 706         {0x5706, 0x04},
 707         {0x5707, 0x3a},
 708         {0x3820, 0xc0},
 709         {0x3821, 0x00},
 710         // {0x5090, 0x0C},
 711         {0x4008, 0x02},
 712         {0x4009, 0x09},
 713         {0x5081, 0x41},
 714         {}
 715 };
 716
 717 /*
 718  * 1616x1216 30fps VBlanking 1lane 10Bit
 719  */
 720 static struct ov2680_reg const ov2680_1616x1216_30fps[] = {
 721         {0x3086, 0x00},
 722         {0x370a, 0x21},
 723         {0x3801, 0x00},
 724         {0x3802, 0x00},
 725         {0x3803, 0x00},
 726         {0x3804, 0x06},
 727         {0x3805, 0x4f},
 728         {0x3806, 0x04},
 729         {0x3807, 0xbf},
 730         {0x3808, 0x06},
 731         {0x3809, 0x50},//50},//4line for mirror and flip
 732         {0x380a, 0x04},
 733         {0x380b, 0xc0},//c0},
 734         {0x380c, 0x06},
 735         {0x380d, 0xa8},
 736         {0x3810, 0x00},
 737         {0x3811, 0x00},
 738         {0x3812, 0x00},
 739         {0x3813, 0x00},
 740         {0x3814, 0x11},
 741         {0x3815, 0x11},
 742         {0x4008, 0x00},
 743         {0x4009, 0x0b},
 744         {0x5081, 0x01},
 745         {0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11
 746         {0x5704, 0x06},
 747         {0x5705, 0x50},
 748         {0x5706, 0x04},
 749         {0x5707, 0xcc},
 750         {0x3820, 0xc0},
 751         {0x3821, 0x00},
 752         // {0x5090, 0x0C},
 753         {}
 754 };
 755
 756 static struct ov2680_resolution ov2680_res_preview[] = {
 757         {
 758                 .width = 1616,
 759                 .height = 1216,
 760                 .pix_clk_freq = 66,
 761                 .fps = 30,
 762                 .pixels_per_line = 1698,//1704,
 763                 .lines_per_frame = 1294,
 764                 .bin_factor_x = 0,
 765                 .bin_factor_y = 0,
 766                 .bin_mode = 0,
 767                 .skip_frames = 3,
 768                 .regs = ov2680_1616x1216_30fps,
 769         },
 770         {
 771                 .width = 1616,
 772                 .height = 1082,
 773                 .pix_clk_freq = 66,
 774                 .fps = 30,
 775                 .pixels_per_line = 1698,//1704,
 776                 .lines_per_frame = 1294,
 777                 .bin_factor_x = 0,
 778                 .bin_factor_y = 0,
 779                 .bin_mode = 0,
 780                 .skip_frames = 3,
 781                 .regs = ov2680_1616x1082_30fps,
 782         },
 783         {
 784                 .width = 1616,
 785                 .height = 916,
 786                 .fps = 30,
 787                 .pix_clk_freq = 66,
 788                 .pixels_per_line = 1698,//1704,
 789                 .lines_per_frame = 1294,
 790                 .bin_factor_x = 0,
 791                 .bin_factor_y = 0,
 792                 .bin_mode = 0,
 793                 .skip_frames = 3,
 794                 .regs = ov2680_1616x916_30fps,
 795         },
 796         {
 797                 .width = 1456,
 798                 .height = 1096,
 799                 .fps = 30,
 800                 .pix_clk_freq = 66,
 801                 .pixels_per_line = 1698,//1704,
 802                 .lines_per_frame = 1294,
 803                 .bin_factor_x = 0,
 804                 .bin_factor_y = 0,
 805                 .bin_mode = 0,
 806                 .skip_frames = 3,
 807                 .regs = ov2680_1456x1096_30fps,
 808         },
 809         {
 810                 .width = 1296,
 811                 .height = 976,
 812                 .fps = 30,
 813                 .pix_clk_freq = 66,
 814                 .pixels_per_line = 1698,//1704,
 815                 .lines_per_frame = 1294,
 816                 .bin_factor_x = 0,
 817                 .bin_factor_y = 0,
 818                 .bin_mode = 0,
 819                 .skip_frames = 3,
 820                 .regs = ov2680_1296x976_30fps,
 821         },
 822         {
 823                 .width = 1280,
 824                 .height = 720,
 825                 .fps = 60,
 826                 .pix_clk_freq = 66,
 827                 .pixels_per_line = 1698,//1704,
 828                 .lines_per_frame = 1294,
 829                 .bin_factor_x = 0,
 830                 .bin_factor_y = 0,
 831                 .bin_mode = 0,
 832                 .skip_frames = 3,
 833                 .regs = ov2680_720p_30fps,
 834         },
 835         {
 836                 .width = 800,
 837                 .height = 600,
 838                 .fps = 60,
 839                 .pix_clk_freq = 66,
 840                 .pixels_per_line = 1698,//1704,
 841                 .lines_per_frame = 1294,
 842                 .bin_factor_x = 0,
 843                 .bin_factor_y = 0,
 844                 .bin_mode = 0,
 845                 .skip_frames = 3,
 846                 .regs = ov2680_800x600_30fps,
 847         },
 848         {
 849                 .width = 720,
 850                 .height = 592,
 851                 .fps = 60,
 852                 .pix_clk_freq = 66,
 853                 .pixels_per_line = 1698,//1704,
 854                 .lines_per_frame = 1294,
 855                 .bin_factor_x = 0,
 856                 .bin_factor_y = 0,
 857                 .bin_mode = 0,
 858                 .skip_frames = 3,
 859                 .regs = ov2680_720x592_30fps,
 860         },
 861         {
 862                 .width = 656,
 863                 .height = 496,
 864                 .fps = 60,
 865                 .pix_clk_freq = 66,
 866                 .pixels_per_line = 1698,//1704,
 867                 .lines_per_frame = 1294,
 868                 .bin_factor_x = 0,
 869                 .bin_factor_y = 0,
 870                 .bin_mode = 0,
 871                 .skip_frames = 3,
 872                 .regs = ov2680_656x496_30fps,
 873         },
 874         {
 875                 .width = 336,
 876                 .height = 256,
 877                 .fps = 60,
 878                 .pix_clk_freq = 66,
 879                 .pixels_per_line = 1698,//1704,
 880                 .lines_per_frame = 1294,
 881                 .bin_factor_x = 0,
 882                 .bin_factor_y = 0,
 883                 .bin_mode = 0,
 884                 .skip_frames = 3,
 885                 .regs = ov2680_QVGA_30fps,
 886         },
 887         {
 888                 .width = 352,
 889                 .height = 288,
 890                 .fps = 60,
 891                 .pix_clk_freq = 66,
 892                 .pixels_per_line = 1698,//1704,
 893                 .lines_per_frame = 1294,
 894                 .bin_factor_x = 0,
 895                 .bin_factor_y = 0,
 896                 .bin_mode = 0,
 897                 .skip_frames = 3,
 898                 .regs = ov2680_CIF_30fps,
 899         },
 900         {
 901                 .width = 176,
 902                 .height = 144,
 903                 .fps = 60,
 904                 .pix_clk_freq = 66,
 905                 .pixels_per_line = 1698,//1704,
 906                 .lines_per_frame = 1294,
 907                 .bin_factor_x = 0,
 908                 .bin_factor_y = 0,
 909                 .bin_mode = 0,
 910                 .skip_frames = 3,
 911                 .regs = ov2680_QCIF_30fps,
 912         },
 913 };
 914
 915 #define N_RES_PREVIEW (ARRAY_SIZE(ov2680_res_preview))
 916
 917 #endif