drivers/staging/iio/meter/ade7753.c

   1 /*
   2  * ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
   3  *
   4  * Copyright 2010 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/delay.h>
  10 #include <linux/device.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/irq.h>
  13 #include <linux/kernel.h>
  14 #include <linux/list.h>
  15 #include <linux/module.h>
  16 #include <linux/mutex.h>
  17 #include <linux/slab.h>
  18 #include <linux/sysfs.h>
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21 #include <linux/spi/spi.h>
  22 #include "meter.h"
  23
  24 #define ADE7753_WAVEFORM   0x01
  25 #define ADE7753_AENERGY    0x02
  26 #define ADE7753_RAENERGY   0x03
  27 #define ADE7753_LAENERGY   0x04
  28 #define ADE7753_VAENERGY   0x05
  29 #define ADE7753_RVAENERGY  0x06
  30 #define ADE7753_LVAENERGY  0x07
  31 #define ADE7753_LVARENERGY 0x08
  32 #define ADE7753_MODE       0x09
  33 #define ADE7753_IRQEN      0x0A
  34 #define ADE7753_STATUS     0x0B
  35 #define ADE7753_RSTSTATUS  0x0C
  36 #define ADE7753_CH1OS      0x0D
  37 #define ADE7753_CH2OS      0x0E
  38 #define ADE7753_GAIN       0x0F
  39 #define ADE7753_PHCAL      0x10
  40 #define ADE7753_APOS       0x11
  41 #define ADE7753_WGAIN      0x12
  42 #define ADE7753_WDIV       0x13
  43 #define ADE7753_CFNUM      0x14
  44 #define ADE7753_CFDEN      0x15
  45 #define ADE7753_IRMS       0x16
  46 #define ADE7753_VRMS       0x17
  47 #define ADE7753_IRMSOS     0x18
  48 #define ADE7753_VRMSOS     0x19
  49 #define ADE7753_VAGAIN     0x1A
  50 #define ADE7753_VADIV      0x1B
  51 #define ADE7753_LINECYC    0x1C
  52 #define ADE7753_ZXTOUT     0x1D
  53 #define ADE7753_SAGCYC     0x1E
  54 #define ADE7753_SAGLVL     0x1F
  55 #define ADE7753_IPKLVL     0x20
  56 #define ADE7753_VPKLVL     0x21
  57 #define ADE7753_IPEAK      0x22
  58 #define ADE7753_RSTIPEAK   0x23
  59 #define ADE7753_VPEAK      0x24
  60 #define ADE7753_RSTVPEAK   0x25
  61 #define ADE7753_TEMP       0x26
  62 #define ADE7753_PERIOD     0x27
  63 #define ADE7753_TMODE      0x3D
  64 #define ADE7753_CHKSUM     0x3E
  65 #define ADE7753_DIEREV     0x3F
  66
  67 #define ADE7753_READ_REG(a)    a
  68 #define ADE7753_WRITE_REG(a) ((a) | 0x80)
  69
  70 #define ADE7753_MAX_TX    4
  71 #define ADE7753_MAX_RX    4
  72 #define ADE7753_STARTUP_DELAY 1000
  73
  74 #define ADE7753_SPI_SLOW    (u32)(300 * 1000)
  75 #define ADE7753_SPI_BURST   (u32)(1000 * 1000)
  76 #define ADE7753_SPI_FAST    (u32)(2000 * 1000)
  77
  78 /**
  79  * struct ade7753_state - device instance specific data
  80  * @us:         actual spi_device
  81  * @tx:         transmit buffer
  82  * @rx:         receive buffer
  83  * @buf_lock:       mutex to protect tx and rx
  84  **/
  85 struct ade7753_state {
  86         struct spi_device   *us;
  87         struct mutex        buf_lock;
  88         u8          tx[ADE7753_MAX_TX] ____cacheline_aligned;
  89         u8          rx[ADE7753_MAX_RX];
  90 };
  91
  92 static int ade7753_spi_write_reg_8(struct device *dev,
  93                                    u8 reg_address,
  94                                    u8 val)
  95 {
  96         int ret;
  97         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  98         struct ade7753_state *st = iio_priv(indio_dev);
  99
 100         mutex_lock(&st->buf_lock);
 101         st->tx[0] = ADE7753_WRITE_REG(reg_address);
 102         st->tx[1] = val;
 103
 104         ret = spi_write(st->us, st->tx, 2);
 105         mutex_unlock(&st->buf_lock);
 106
 107         return ret;
 108 }
 109
 110 static int ade7753_spi_write_reg_16(struct device *dev, u8 reg_address,
 111                                     u16 value)
 112 {
 113         int ret;
 114         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 115         struct ade7753_state *st = iio_priv(indio_dev);
 116
 117         mutex_lock(&st->buf_lock);
 118         st->tx[0] = ADE7753_WRITE_REG(reg_address);
 119         st->tx[1] = (value >> 8) & 0xFF;
 120         st->tx[2] = value & 0xFF;
 121         ret = spi_write(st->us, st->tx, 3);
 122         mutex_unlock(&st->buf_lock);
 123
 124         return ret;
 125 }
 126
 127 static int ade7753_spi_read_reg_8(struct device *dev,
 128                                   u8 reg_address,
 129                                   u8 *val)
 130 {
 131         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 132         struct ade7753_state *st = iio_priv(indio_dev);
 133         ssize_t ret;
 134
 135         ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
 136         if (ret < 0) {
 137                 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
 138                         reg_address);
 139                 return ret;
 140         }
 141         *val = ret;
 142
 143         return 0;
 144 }
 145
 146 static int ade7753_spi_read_reg_16(struct device *dev,
 147                                    u8 reg_address,
 148                                    u16 *val)
 149 {
 150         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 151         struct ade7753_state *st = iio_priv(indio_dev);
 152         ssize_t ret;
 153
 154         ret = spi_w8r16be(st->us, ADE7753_READ_REG(reg_address));
 155         if (ret < 0) {
 156                 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
 157                         reg_address);
 158                 return ret;
 159         }
 160
 161         *val = ret;
 162
 163         return 0;
 164 }
 165
 166 static int ade7753_spi_read_reg_24(struct device *dev,
 167                                    u8 reg_address,
 168                                    u32 *val)
 169 {
 170         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 171         struct ade7753_state *st = iio_priv(indio_dev);
 172         int ret;
 173         struct spi_transfer xfers[] = {
 174                 {
 175                         .tx_buf = st->tx,
 176                         .bits_per_word = 8,
 177                         .len = 1,
 178                 }, {
 179                         .rx_buf = st->tx,
 180                         .bits_per_word = 8,
 181                         .len = 3,
 182                 }
 183         };
 184
 185         mutex_lock(&st->buf_lock);
 186         st->tx[0] = ADE7753_READ_REG(reg_address);
 187
 188         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 189         if (ret) {
 190                 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
 191                         reg_address);
 192                 goto error_ret;
 193         }
 194         *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
 195
 196 error_ret:
 197         mutex_unlock(&st->buf_lock);
 198         return ret;
 199 }
 200
 201 static ssize_t ade7753_read_8bit(struct device *dev,
 202                                  struct device_attribute *attr,
 203                                  char *buf)
 204 {
 205         int ret;
 206         u8 val;
 207         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 208
 209         ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
 210         if (ret)
 211                 return ret;
 212
 213         return sprintf(buf, "%u\n", val);
 214 }
 215
 216 static ssize_t ade7753_read_16bit(struct device *dev,
 217                                   struct device_attribute *attr,
 218                                   char *buf)
 219 {
 220         int ret;
 221         u16 val;
 222         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 223
 224         ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
 225         if (ret)
 226                 return ret;
 227
 228         return sprintf(buf, "%u\n", val);
 229 }
 230
 231 static ssize_t ade7753_read_24bit(struct device *dev,
 232                                   struct device_attribute *attr,
 233                                   char *buf)
 234 {
 235         int ret;
 236         u32 val;
 237         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 238
 239         ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
 240         if (ret)
 241                 return ret;
 242
 243         return sprintf(buf, "%u\n", val);
 244 }
 245
 246 static ssize_t ade7753_write_8bit(struct device *dev,
 247                                   struct device_attribute *attr,
 248                                   const char *buf,
 249                                   size_t len)
 250 {
 251         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 252         int ret;
 253         u8 val;
 254
 255         ret = kstrtou8(buf, 10, &val);
 256         if (ret)
 257                 goto error_ret;
 258         ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);
 259
 260 error_ret:
 261         return ret ? ret : len;
 262 }
 263
 264 static ssize_t ade7753_write_16bit(struct device *dev,
 265                                    struct device_attribute *attr,
 266                                    const char *buf,
 267                                    size_t len)
 268 {
 269         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 270         int ret;
 271         u16 val;
 272
 273         ret = kstrtou16(buf, 10, &val);
 274         if (ret)
 275                 goto error_ret;
 276         ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);
 277
 278 error_ret:
 279         return ret ? ret : len;
 280 }
 281
 282 static int ade7753_reset(struct device *dev)
 283 {
 284         u16 val;
 285         int ret;
 286
 287         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
 288         if (ret)
 289                 return ret;
 290
 291         val |= BIT(6); /* Software Chip Reset */
 292
 293         return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
 294 }
 295
 296 static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
 297 static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
 298 static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
 299 static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
 300 static IIO_DEV_ATTR_CFDEN(0644,
 301                 ade7753_read_16bit,
 302                 ade7753_write_16bit,
 303                 ADE7753_CFDEN);
 304 static IIO_DEV_ATTR_CFNUM(0644,
 305                 ade7753_read_8bit,
 306                 ade7753_write_8bit,
 307                 ADE7753_CFNUM);
 308 static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
 309 static IIO_DEV_ATTR_PHCAL(0644,
 310                 ade7753_read_16bit,
 311                 ade7753_write_16bit,
 312                 ADE7753_PHCAL);
 313 static IIO_DEV_ATTR_APOS(0644,
 314                 ade7753_read_16bit,
 315                 ade7753_write_16bit,
 316                 ADE7753_APOS);
 317 static IIO_DEV_ATTR_SAGCYC(0644,
 318                 ade7753_read_8bit,
 319                 ade7753_write_8bit,
 320                 ADE7753_SAGCYC);
 321 static IIO_DEV_ATTR_SAGLVL(0644,
 322                 ade7753_read_8bit,
 323                 ade7753_write_8bit,
 324                 ADE7753_SAGLVL);
 325 static IIO_DEV_ATTR_LINECYC(0644,
 326                 ade7753_read_8bit,
 327                 ade7753_write_8bit,
 328                 ADE7753_LINECYC);
 329 static IIO_DEV_ATTR_WDIV(0644,
 330                 ade7753_read_8bit,
 331                 ade7753_write_8bit,
 332                 ADE7753_WDIV);
 333 static IIO_DEV_ATTR_IRMS(0644,
 334                 ade7753_read_24bit,
 335                 NULL,
 336                 ADE7753_IRMS);
 337 static IIO_DEV_ATTR_VRMS(0444,
 338                 ade7753_read_24bit,
 339                 NULL,
 340                 ADE7753_VRMS);
 341 static IIO_DEV_ATTR_IRMSOS(0644,
 342                 ade7753_read_16bit,
 343                 ade7753_write_16bit,
 344                 ADE7753_IRMSOS);
 345 static IIO_DEV_ATTR_VRMSOS(0644,
 346                 ade7753_read_16bit,
 347                 ade7753_write_16bit,
 348                 ADE7753_VRMSOS);
 349 static IIO_DEV_ATTR_WGAIN(0644,
 350                 ade7753_read_16bit,
 351                 ade7753_write_16bit,
 352                 ADE7753_WGAIN);
 353 static IIO_DEV_ATTR_VAGAIN(0644,
 354                 ade7753_read_16bit,
 355                 ade7753_write_16bit,
 356                 ADE7753_VAGAIN);
 357 static IIO_DEV_ATTR_PGA_GAIN(0644,
 358                 ade7753_read_16bit,
 359                 ade7753_write_16bit,
 360                 ADE7753_GAIN);
 361 static IIO_DEV_ATTR_IPKLVL(0644,
 362                 ade7753_read_8bit,
 363                 ade7753_write_8bit,
 364                 ADE7753_IPKLVL);
 365 static IIO_DEV_ATTR_VPKLVL(0644,
 366                 ade7753_read_8bit,
 367                 ade7753_write_8bit,
 368                 ADE7753_VPKLVL);
 369 static IIO_DEV_ATTR_IPEAK(0444,
 370                 ade7753_read_24bit,
 371                 NULL,
 372                 ADE7753_IPEAK);
 373 static IIO_DEV_ATTR_VPEAK(0444,
 374                 ade7753_read_24bit,
 375                 NULL,
 376                 ADE7753_VPEAK);
 377 static IIO_DEV_ATTR_VPERIOD(0444,
 378                 ade7753_read_16bit,
 379                 NULL,
 380                 ADE7753_PERIOD);
 381 static IIO_DEV_ATTR_CH_OFF(1, 0644,
 382                 ade7753_read_8bit,
 383                 ade7753_write_8bit,
 384                 ADE7753_CH1OS);
 385 static IIO_DEV_ATTR_CH_OFF(2, 0644,
 386                 ade7753_read_8bit,
 387                 ade7753_write_8bit,
 388                 ADE7753_CH2OS);
 389
 390 static int ade7753_set_irq(struct device *dev, bool enable)
 391 {
 392         int ret;
 393         u8 irqen;
 394
 395         ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
 396         if (ret)
 397                 goto error_ret;
 398
 399         if (enable)
 400                 irqen |= BIT(3); /* Enables an interrupt when a data is
 401                                   * present in the waveform register
 402                                   */
 403         else
 404                 irqen &= ~BIT(3);
 405
 406         ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
 407
 408 error_ret:
 409         return ret;
 410 }
 411
 412 /* Power down the device */
 413 static int ade7753_stop_device(struct device *dev)
 414 {
 415         u16 val;
 416         int ret;
 417
 418         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
 419         if (ret)
 420                 return ret;
 421
 422         val |= BIT(4);  /* AD converters can be turned off */
 423
 424         return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
 425 }
 426
 427 static int ade7753_initial_setup(struct iio_dev *indio_dev)
 428 {
 429         int ret;
 430         struct device *dev = &indio_dev->dev;
 431         struct ade7753_state *st = iio_priv(indio_dev);
 432
 433         /* use low spi speed for init */
 434         st->us->mode = SPI_MODE_3;
 435         spi_setup(st->us);
 436
 437         /* Disable IRQ */
 438         ret = ade7753_set_irq(dev, false);
 439         if (ret) {
 440                 dev_err(dev, "disable irq failed");
 441                 goto err_ret;
 442         }
 443
 444         ade7753_reset(dev);
 445         usleep_range(ADE7753_STARTUP_DELAY, ADE7753_STARTUP_DELAY + 100);
 446
 447 err_ret:
 448         return ret;
 449 }
 450
 451 static ssize_t ade7753_read_frequency(struct device *dev,
 452                                       struct device_attribute *attr,
 453                                       char *buf)
 454 {
 455         int ret;
 456         u16 t;
 457         int sps;
 458
 459         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t);
 460         if (ret)
 461                 return ret;
 462
 463         t = (t >> 11) & 0x3;
 464         sps = 27900 / (1 + t);
 465
 466         return sprintf(buf, "%d\n", sps);
 467 }
 468
 469 static ssize_t ade7753_write_frequency(struct device *dev,
 470                                        struct device_attribute *attr,
 471                                        const char *buf,
 472                                        size_t len)
 473 {
 474         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 475         struct ade7753_state *st = iio_priv(indio_dev);
 476         u16 val;
 477         int ret;
 478         u16 reg, t;
 479
 480         ret = kstrtou16(buf, 10, &val);
 481         if (ret)
 482                 return ret;
 483         if (!val)
 484                 return -EINVAL;
 485
 486         mutex_lock(&indio_dev->mlock);
 487
 488         t = 27900 / val;
 489         if (t > 0)
 490                 t--;
 491
 492         if (t > 1)
 493                 st->us->max_speed_hz = ADE7753_SPI_SLOW;
 494         else
 495                 st->us->max_speed_hz = ADE7753_SPI_FAST;
 496
 497         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
 498         if (ret)
 499                 goto out;
 500
 501         reg &= ~(3 << 11);
 502         reg |= t << 11;
 503
 504         ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);
 505
 506 out:
 507         mutex_unlock(&indio_dev->mlock);
 508
 509         return ret ? ret : len;
 510 }
 511
 512 static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
 513 static IIO_CONST_ATTR(in_temp_offset, "-25 C");
 514 static IIO_CONST_ATTR(in_temp_scale, "0.67 C");
 515
 516 static IIO_DEV_ATTR_SAMP_FREQ(0644,
 517                 ade7753_read_frequency,
 518                 ade7753_write_frequency);
 519
 520 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
 521
 522 static struct attribute *ade7753_attributes[] = {
 523         &iio_dev_attr_in_temp_raw.dev_attr.attr,
 524         &iio_const_attr_in_temp_offset.dev_attr.attr,
 525         &iio_const_attr_in_temp_scale.dev_attr.attr,
 526         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 527         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 528         &iio_dev_attr_phcal.dev_attr.attr,
 529         &iio_dev_attr_cfden.dev_attr.attr,
 530         &iio_dev_attr_aenergy.dev_attr.attr,
 531         &iio_dev_attr_laenergy.dev_attr.attr,
 532         &iio_dev_attr_vaenergy.dev_attr.attr,
 533         &iio_dev_attr_lvaenergy.dev_attr.attr,
 534         &iio_dev_attr_cfnum.dev_attr.attr,
 535         &iio_dev_attr_apos.dev_attr.attr,
 536         &iio_dev_attr_sagcyc.dev_attr.attr,
 537         &iio_dev_attr_saglvl.dev_attr.attr,
 538         &iio_dev_attr_linecyc.dev_attr.attr,
 539         &iio_dev_attr_chksum.dev_attr.attr,
 540         &iio_dev_attr_pga_gain.dev_attr.attr,
 541         &iio_dev_attr_wgain.dev_attr.attr,
 542         &iio_dev_attr_choff_1.dev_attr.attr,
 543         &iio_dev_attr_choff_2.dev_attr.attr,
 544         &iio_dev_attr_wdiv.dev_attr.attr,
 545         &iio_dev_attr_irms.dev_attr.attr,
 546         &iio_dev_attr_vrms.dev_attr.attr,
 547         &iio_dev_attr_irmsos.dev_attr.attr,
 548         &iio_dev_attr_vrmsos.dev_attr.attr,
 549         &iio_dev_attr_vagain.dev_attr.attr,
 550         &iio_dev_attr_ipklvl.dev_attr.attr,
 551         &iio_dev_attr_vpklvl.dev_attr.attr,
 552         &iio_dev_attr_ipeak.dev_attr.attr,
 553         &iio_dev_attr_vpeak.dev_attr.attr,
 554         &iio_dev_attr_vperiod.dev_attr.attr,
 555         NULL,
 556 };
 557
 558 static const struct attribute_group ade7753_attribute_group = {
 559         .attrs = ade7753_attributes,
 560 };
 561
 562 static const struct iio_info ade7753_info = {
 563         .attrs = &ade7753_attribute_group,
 564         .driver_module = THIS_MODULE,
 565 };
 566
 567 static int ade7753_probe(struct spi_device *spi)
 568 {
 569         int ret;
 570         struct ade7753_state *st;
 571         struct iio_dev *indio_dev;
 572
 573         /* setup the industrialio driver allocated elements */
 574         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 575         if (!indio_dev)
 576                 return -ENOMEM;
 577         /* this is only used for removal purposes */
 578         spi_set_drvdata(spi, indio_dev);
 579
 580         st = iio_priv(indio_dev);
 581         st->us = spi;
 582         mutex_init(&st->buf_lock);
 583
 584         indio_dev->name = spi->dev.driver->name;
 585         indio_dev->dev.parent = &spi->dev;
 586         indio_dev->info = &ade7753_info;
 587         indio_dev->modes = INDIO_DIRECT_MODE;
 588
 589         /* Get the device into a sane initial state */
 590         ret = ade7753_initial_setup(indio_dev);
 591         if (ret)
 592                 return ret;
 593
 594         return iio_device_register(indio_dev);
 595 }
 596
 597 static int ade7753_remove(struct spi_device *spi)
 598 {
 599         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 600
 601         iio_device_unregister(indio_dev);
 602         ade7753_stop_device(&indio_dev->dev);
 603
 604         return 0;
 605 }
 606
 607 static struct spi_driver ade7753_driver = {
 608         .driver = {
 609                 .name = "ade7753",
 610         },
 611         .probe = ade7753_probe,
 612         .remove = ade7753_remove,
 613 };
 614 module_spi_driver(ade7753_driver);
 615
 616 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
 617 MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
 618 MODULE_LICENSE("GPL v2");
 619 MODULE_ALIAS("spi:ade7753");